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2a2336f8 YP |
1 | /* |
2 | * Copyright (c) 2007 Mellanox Technologies. All rights reserved. | |
3 | * | |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | */ | |
32 | ||
33 | #include <linux/errno.h> | |
34 | #include <linux/if_ether.h> | |
c59fec20 | 35 | #include <linux/if_vlan.h> |
ee40fa06 | 36 | #include <linux/export.h> |
2a2336f8 YP |
37 | |
38 | #include <linux/mlx4/cmd.h> | |
39 | ||
40 | #include "mlx4.h" | |
b4b6e842 | 41 | #include "mlx4_stats.h" |
2a2336f8 YP |
42 | |
43 | #define MLX4_MAC_VALID (1ull << 63) | |
2a2336f8 YP |
44 | |
45 | #define MLX4_VLAN_VALID (1u << 31) | |
46 | #define MLX4_VLAN_MASK 0xfff | |
47 | ||
48 | void mlx4_init_mac_table(struct mlx4_dev *dev, struct mlx4_mac_table *table) | |
49 | { | |
50 | int i; | |
51 | ||
52 | mutex_init(&table->mutex); | |
53 | for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { | |
54 | table->entries[i] = 0; | |
55 | table->refs[i] = 0; | |
56 | } | |
57 | table->max = 1 << dev->caps.log_num_macs; | |
58 | table->total = 0; | |
59 | } | |
60 | ||
61 | void mlx4_init_vlan_table(struct mlx4_dev *dev, struct mlx4_vlan_table *table) | |
62 | { | |
63 | int i; | |
64 | ||
65 | mutex_init(&table->mutex); | |
66 | for (i = 0; i < MLX4_MAX_VLAN_NUM; i++) { | |
67 | table->entries[i] = 0; | |
68 | table->refs[i] = 0; | |
69 | } | |
e72ebf5a | 70 | table->max = (1 << dev->caps.log_num_vlans) - MLX4_VLAN_REGULAR; |
2a2336f8 YP |
71 | table->total = 0; |
72 | } | |
73 | ||
111c6094 JM |
74 | void mlx4_init_roce_gid_table(struct mlx4_dev *dev, |
75 | struct mlx4_roce_gid_table *table) | |
76 | { | |
77 | int i; | |
78 | ||
79 | mutex_init(&table->mutex); | |
80 | for (i = 0; i < MLX4_ROCE_MAX_GIDS; i++) | |
81 | memset(table->roce_gids[i].raw, 0, MLX4_ROCE_GID_ENTRY_SIZE); | |
82 | } | |
83 | ||
ffe455ad EE |
84 | static int validate_index(struct mlx4_dev *dev, |
85 | struct mlx4_mac_table *table, int index) | |
86 | { | |
87 | int err = 0; | |
88 | ||
89 | if (index < 0 || index >= table->max || !table->entries[index]) { | |
90 | mlx4_warn(dev, "No valid Mac entry for the given index\n"); | |
91 | err = -EINVAL; | |
92 | } | |
93 | return err; | |
94 | } | |
95 | ||
96 | static int find_index(struct mlx4_dev *dev, | |
97 | struct mlx4_mac_table *table, u64 mac) | |
98 | { | |
99 | int i; | |
100 | ||
101 | for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { | |
f4fd40b2 JM |
102 | if (table->refs[i] && |
103 | (MLX4_MAC_MASK & mac) == | |
ffe455ad EE |
104 | (MLX4_MAC_MASK & be64_to_cpu(table->entries[i]))) |
105 | return i; | |
106 | } | |
107 | /* Mac not found */ | |
108 | return -EINVAL; | |
1679200f YP |
109 | } |
110 | ||
ffe455ad EE |
111 | static int mlx4_set_port_mac_table(struct mlx4_dev *dev, u8 port, |
112 | __be64 *entries) | |
113 | { | |
114 | struct mlx4_cmd_mailbox *mailbox; | |
115 | u32 in_mod; | |
116 | int err; | |
117 | ||
118 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
119 | if (IS_ERR(mailbox)) | |
120 | return PTR_ERR(mailbox); | |
121 | ||
122 | memcpy(mailbox->buf, entries, MLX4_MAC_TABLE_SIZE); | |
123 | ||
124 | in_mod = MLX4_SET_PORT_MAC_TABLE << 8 | port; | |
0f6740c7 | 125 | |
a130b590 IS |
126 | err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE, |
127 | MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, | |
128 | MLX4_CMD_NATIVE); | |
ffe455ad EE |
129 | |
130 | mlx4_free_cmd_mailbox(dev, mailbox); | |
131 | return err; | |
132 | } | |
133 | ||
297e0dad MS |
134 | int mlx4_find_cached_mac(struct mlx4_dev *dev, u8 port, u64 mac, int *idx) |
135 | { | |
136 | struct mlx4_port_info *info = &mlx4_priv(dev)->port[port]; | |
137 | struct mlx4_mac_table *table = &info->mac_table; | |
138 | int i; | |
139 | ||
140 | for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { | |
141 | if (!table->refs[i]) | |
142 | continue; | |
143 | ||
144 | if (mac == (MLX4_MAC_MASK & be64_to_cpu(table->entries[i]))) { | |
145 | *idx = i; | |
146 | return 0; | |
147 | } | |
148 | } | |
149 | ||
150 | return -ENOENT; | |
151 | } | |
152 | EXPORT_SYMBOL_GPL(mlx4_find_cached_mac); | |
153 | ||
ffe455ad EE |
154 | int __mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac) |
155 | { | |
156 | struct mlx4_port_info *info = &mlx4_priv(dev)->port[port]; | |
157 | struct mlx4_mac_table *table = &info->mac_table; | |
158 | int i, err = 0; | |
159 | int free = -1; | |
160 | ||
161 | mlx4_dbg(dev, "Registering MAC: 0x%llx for port %d\n", | |
162 | (unsigned long long) mac, port); | |
0f6740c7 | 163 | |
2a2336f8 | 164 | mutex_lock(&table->mutex); |
ffe455ad | 165 | for (i = 0; i < MLX4_MAX_MAC_NUM; i++) { |
f4fd40b2 JM |
166 | if (!table->refs[i]) { |
167 | if (free < 0) | |
168 | free = i; | |
2a2336f8 YP |
169 | continue; |
170 | } | |
171 | ||
f4fd40b2 JM |
172 | if ((MLX4_MAC_MASK & mac) == |
173 | (MLX4_MAC_MASK & be64_to_cpu(table->entries[i]))) { | |
6ce71acd RE |
174 | /* MAC already registered, increment ref count */ |
175 | err = i; | |
176 | ++table->refs[i]; | |
2a2336f8 YP |
177 | goto out; |
178 | } | |
179 | } | |
0926f910 | 180 | |
2a2336f8 YP |
181 | mlx4_dbg(dev, "Free MAC index is %d\n", free); |
182 | ||
183 | if (table->total == table->max) { | |
184 | /* No free mac entries */ | |
185 | err = -ENOSPC; | |
186 | goto out; | |
187 | } | |
188 | ||
189 | /* Register new MAC */ | |
2a2336f8 YP |
190 | table->entries[free] = cpu_to_be64(mac | MLX4_MAC_VALID); |
191 | ||
192 | err = mlx4_set_port_mac_table(dev, port, table->entries); | |
193 | if (unlikely(err)) { | |
ffe455ad EE |
194 | mlx4_err(dev, "Failed adding MAC: 0x%llx\n", |
195 | (unsigned long long) mac); | |
2a2336f8 YP |
196 | table->entries[free] = 0; |
197 | goto out; | |
198 | } | |
6ce71acd | 199 | table->refs[free] = 1; |
ffe455ad | 200 | err = free; |
2a2336f8 YP |
201 | ++table->total; |
202 | out: | |
203 | mutex_unlock(&table->mutex); | |
204 | return err; | |
205 | } | |
ffe455ad | 206 | EXPORT_SYMBOL_GPL(__mlx4_register_mac); |
2a2336f8 | 207 | |
ffe455ad | 208 | int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac) |
2a2336f8 | 209 | { |
e7dbeba8 | 210 | u64 out_param = 0; |
acddd5dd | 211 | int err = -EINVAL; |
2a2336f8 | 212 | |
ffe455ad | 213 | if (mlx4_is_mfunc(dev)) { |
acddd5dd JM |
214 | if (!(dev->flags & MLX4_FLAG_OLD_REG_MAC)) { |
215 | err = mlx4_cmd_imm(dev, mac, &out_param, | |
216 | ((u32) port) << 8 | (u32) RES_MAC, | |
217 | RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES, | |
218 | MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); | |
219 | } | |
220 | if (err && err == -EINVAL && mlx4_is_slave(dev)) { | |
221 | /* retry using old REG_MAC format */ | |
222 | set_param_l(&out_param, port); | |
223 | err = mlx4_cmd_imm(dev, mac, &out_param, RES_MAC, | |
224 | RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES, | |
225 | MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); | |
226 | if (!err) | |
227 | dev->flags |= MLX4_FLAG_OLD_REG_MAC; | |
228 | } | |
ffe455ad EE |
229 | if (err) |
230 | return err; | |
1679200f | 231 | |
ffe455ad | 232 | return get_param_l(&out_param); |
1679200f | 233 | } |
ffe455ad | 234 | return __mlx4_register_mac(dev, port, mac); |
1679200f | 235 | } |
ffe455ad EE |
236 | EXPORT_SYMBOL_GPL(mlx4_register_mac); |
237 | ||
16a10ffd YB |
238 | int mlx4_get_base_qpn(struct mlx4_dev *dev, u8 port) |
239 | { | |
240 | return dev->caps.reserved_qps_base[MLX4_QP_REGION_ETH_ADDR] + | |
241 | (port - 1) * (1 << dev->caps.log_num_macs); | |
242 | } | |
243 | EXPORT_SYMBOL_GPL(mlx4_get_base_qpn); | |
1679200f | 244 | |
ffe455ad | 245 | void __mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac) |
1679200f | 246 | { |
143b3efb EE |
247 | struct mlx4_port_info *info; |
248 | struct mlx4_mac_table *table; | |
ffe455ad | 249 | int index; |
1679200f | 250 | |
143b3efb EE |
251 | if (port < 1 || port > dev->caps.num_ports) { |
252 | mlx4_warn(dev, "invalid port number (%d), aborting...\n", port); | |
253 | return; | |
254 | } | |
255 | info = &mlx4_priv(dev)->port[port]; | |
256 | table = &info->mac_table; | |
1679200f | 257 | mutex_lock(&table->mutex); |
6ce71acd | 258 | index = find_index(dev, table, mac); |
1679200f YP |
259 | |
260 | if (validate_index(dev, table, index)) | |
261 | goto out; | |
6ce71acd | 262 | if (--table->refs[index]) { |
1a91de28 JP |
263 | mlx4_dbg(dev, "Have more references for index %d, no need to modify mac table\n", |
264 | index); | |
6ce71acd RE |
265 | goto out; |
266 | } | |
1679200f | 267 | |
ffe455ad EE |
268 | table->entries[index] = 0; |
269 | mlx4_set_port_mac_table(dev, port, table->entries); | |
270 | --table->total; | |
2a2336f8 YP |
271 | out: |
272 | mutex_unlock(&table->mutex); | |
273 | } | |
ffe455ad EE |
274 | EXPORT_SYMBOL_GPL(__mlx4_unregister_mac); |
275 | ||
276 | void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac) | |
277 | { | |
e7dbeba8 | 278 | u64 out_param = 0; |
ffe455ad EE |
279 | |
280 | if (mlx4_is_mfunc(dev)) { | |
acddd5dd JM |
281 | if (!(dev->flags & MLX4_FLAG_OLD_REG_MAC)) { |
282 | (void) mlx4_cmd_imm(dev, mac, &out_param, | |
283 | ((u32) port) << 8 | (u32) RES_MAC, | |
284 | RES_OP_RESERVE_AND_MAP, MLX4_CMD_FREE_RES, | |
285 | MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); | |
286 | } else { | |
287 | /* use old unregister mac format */ | |
288 | set_param_l(&out_param, port); | |
289 | (void) mlx4_cmd_imm(dev, mac, &out_param, RES_MAC, | |
290 | RES_OP_RESERVE_AND_MAP, MLX4_CMD_FREE_RES, | |
291 | MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); | |
292 | } | |
ffe455ad EE |
293 | return; |
294 | } | |
295 | __mlx4_unregister_mac(dev, port, mac); | |
296 | return; | |
297 | } | |
2a2336f8 YP |
298 | EXPORT_SYMBOL_GPL(mlx4_unregister_mac); |
299 | ||
16a10ffd | 300 | int __mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac) |
1679200f YP |
301 | { |
302 | struct mlx4_port_info *info = &mlx4_priv(dev)->port[port]; | |
303 | struct mlx4_mac_table *table = &info->mac_table; | |
ffe455ad EE |
304 | int index = qpn - info->base_qpn; |
305 | int err = 0; | |
1679200f | 306 | |
ffe455ad | 307 | /* CX1 doesn't support multi-functions */ |
1679200f YP |
308 | mutex_lock(&table->mutex); |
309 | ||
310 | err = validate_index(dev, table, index); | |
311 | if (err) | |
312 | goto out; | |
313 | ||
314 | table->entries[index] = cpu_to_be64(new_mac | MLX4_MAC_VALID); | |
315 | ||
316 | err = mlx4_set_port_mac_table(dev, port, table->entries); | |
317 | if (unlikely(err)) { | |
ffe455ad EE |
318 | mlx4_err(dev, "Failed adding MAC: 0x%llx\n", |
319 | (unsigned long long) new_mac); | |
1679200f YP |
320 | table->entries[index] = 0; |
321 | } | |
322 | out: | |
323 | mutex_unlock(&table->mutex); | |
324 | return err; | |
325 | } | |
16a10ffd | 326 | EXPORT_SYMBOL_GPL(__mlx4_replace_mac); |
ffe455ad | 327 | |
2a2336f8 YP |
328 | static int mlx4_set_port_vlan_table(struct mlx4_dev *dev, u8 port, |
329 | __be32 *entries) | |
330 | { | |
331 | struct mlx4_cmd_mailbox *mailbox; | |
332 | u32 in_mod; | |
333 | int err; | |
334 | ||
335 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
336 | if (IS_ERR(mailbox)) | |
337 | return PTR_ERR(mailbox); | |
338 | ||
339 | memcpy(mailbox->buf, entries, MLX4_VLAN_TABLE_SIZE); | |
340 | in_mod = MLX4_SET_PORT_VLAN_TABLE << 8 | port; | |
a130b590 IS |
341 | err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE, |
342 | MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, | |
343 | MLX4_CMD_NATIVE); | |
2a2336f8 YP |
344 | |
345 | mlx4_free_cmd_mailbox(dev, mailbox); | |
346 | ||
347 | return err; | |
348 | } | |
349 | ||
4c3eb3ca EC |
350 | int mlx4_find_cached_vlan(struct mlx4_dev *dev, u8 port, u16 vid, int *idx) |
351 | { | |
352 | struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table; | |
353 | int i; | |
354 | ||
355 | for (i = 0; i < MLX4_MAX_VLAN_NUM; ++i) { | |
356 | if (table->refs[i] && | |
357 | (vid == (MLX4_VLAN_MASK & | |
358 | be32_to_cpu(table->entries[i])))) { | |
359 | /* VLAN already registered, increase reference count */ | |
360 | *idx = i; | |
361 | return 0; | |
362 | } | |
363 | } | |
364 | ||
365 | return -ENOENT; | |
366 | } | |
367 | EXPORT_SYMBOL_GPL(mlx4_find_cached_vlan); | |
368 | ||
3f7fb021 | 369 | int __mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, |
ffe455ad | 370 | int *index) |
2a2336f8 YP |
371 | { |
372 | struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table; | |
373 | int i, err = 0; | |
374 | int free = -1; | |
375 | ||
376 | mutex_lock(&table->mutex); | |
e72ebf5a YP |
377 | |
378 | if (table->total == table->max) { | |
379 | /* No free vlan entries */ | |
380 | err = -ENOSPC; | |
381 | goto out; | |
382 | } | |
383 | ||
2a2336f8 YP |
384 | for (i = MLX4_VLAN_REGULAR; i < MLX4_MAX_VLAN_NUM; i++) { |
385 | if (free < 0 && (table->refs[i] == 0)) { | |
386 | free = i; | |
387 | continue; | |
388 | } | |
389 | ||
390 | if (table->refs[i] && | |
391 | (vlan == (MLX4_VLAN_MASK & | |
392 | be32_to_cpu(table->entries[i])))) { | |
25985edc | 393 | /* Vlan already registered, increase references count */ |
2a2336f8 YP |
394 | *index = i; |
395 | ++table->refs[i]; | |
396 | goto out; | |
397 | } | |
398 | } | |
399 | ||
0926f910 EC |
400 | if (free < 0) { |
401 | err = -ENOMEM; | |
402 | goto out; | |
403 | } | |
404 | ||
ffe455ad | 405 | /* Register new VLAN */ |
2a2336f8 YP |
406 | table->refs[free] = 1; |
407 | table->entries[free] = cpu_to_be32(vlan | MLX4_VLAN_VALID); | |
408 | ||
409 | err = mlx4_set_port_vlan_table(dev, port, table->entries); | |
410 | if (unlikely(err)) { | |
411 | mlx4_warn(dev, "Failed adding vlan: %u\n", vlan); | |
412 | table->refs[free] = 0; | |
413 | table->entries[free] = 0; | |
414 | goto out; | |
415 | } | |
416 | ||
417 | *index = free; | |
418 | ++table->total; | |
419 | out: | |
420 | mutex_unlock(&table->mutex); | |
421 | return err; | |
422 | } | |
ffe455ad EE |
423 | |
424 | int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index) | |
425 | { | |
e7dbeba8 | 426 | u64 out_param = 0; |
ffe455ad EE |
427 | int err; |
428 | ||
162226a1 JM |
429 | if (vlan > 4095) |
430 | return -EINVAL; | |
431 | ||
ffe455ad | 432 | if (mlx4_is_mfunc(dev)) { |
acddd5dd JM |
433 | err = mlx4_cmd_imm(dev, vlan, &out_param, |
434 | ((u32) port) << 8 | (u32) RES_VLAN, | |
ffe455ad EE |
435 | RES_OP_RESERVE_AND_MAP, MLX4_CMD_ALLOC_RES, |
436 | MLX4_CMD_TIME_CLASS_A, MLX4_CMD_WRAPPED); | |
437 | if (!err) | |
438 | *index = get_param_l(&out_param); | |
439 | ||
440 | return err; | |
441 | } | |
442 | return __mlx4_register_vlan(dev, port, vlan, index); | |
443 | } | |
2a2336f8 YP |
444 | EXPORT_SYMBOL_GPL(mlx4_register_vlan); |
445 | ||
2009d005 | 446 | void __mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, u16 vlan) |
2a2336f8 YP |
447 | { |
448 | struct mlx4_vlan_table *table = &mlx4_priv(dev)->port[port].vlan_table; | |
2009d005 | 449 | int index; |
2a2336f8 | 450 | |
2009d005 JM |
451 | mutex_lock(&table->mutex); |
452 | if (mlx4_find_cached_vlan(dev, port, vlan, &index)) { | |
453 | mlx4_warn(dev, "vlan 0x%x is not in the vlan table\n", vlan); | |
454 | goto out; | |
2a2336f8 YP |
455 | } |
456 | ||
2009d005 JM |
457 | if (index < MLX4_VLAN_REGULAR) { |
458 | mlx4_warn(dev, "Trying to free special vlan index %d\n", index); | |
2a2336f8 YP |
459 | goto out; |
460 | } | |
2009d005 | 461 | |
2a2336f8 | 462 | if (--table->refs[index]) { |
1a91de28 JP |
463 | mlx4_dbg(dev, "Have %d more references for index %d, no need to modify vlan table\n", |
464 | table->refs[index], index); | |
2a2336f8 YP |
465 | goto out; |
466 | } | |
467 | table->entries[index] = 0; | |
468 | mlx4_set_port_vlan_table(dev, port, table->entries); | |
469 | --table->total; | |
470 | out: | |
471 | mutex_unlock(&table->mutex); | |
472 | } | |
ffe455ad | 473 | |
2009d005 | 474 | void mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, u16 vlan) |
ffe455ad | 475 | { |
162226a1 | 476 | u64 out_param = 0; |
ffe455ad EE |
477 | |
478 | if (mlx4_is_mfunc(dev)) { | |
2009d005 | 479 | (void) mlx4_cmd_imm(dev, vlan, &out_param, |
acddd5dd | 480 | ((u32) port) << 8 | (u32) RES_VLAN, |
162226a1 JM |
481 | RES_OP_RESERVE_AND_MAP, |
482 | MLX4_CMD_FREE_RES, MLX4_CMD_TIME_CLASS_A, | |
483 | MLX4_CMD_WRAPPED); | |
ffe455ad EE |
484 | return; |
485 | } | |
2009d005 | 486 | __mlx4_unregister_vlan(dev, port, vlan); |
ffe455ad | 487 | } |
2a2336f8 | 488 | EXPORT_SYMBOL_GPL(mlx4_unregister_vlan); |
7ff93f8b | 489 | |
9a5aa622 JM |
490 | int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps) |
491 | { | |
492 | struct mlx4_cmd_mailbox *inmailbox, *outmailbox; | |
493 | u8 *inbuf, *outbuf; | |
494 | int err; | |
495 | ||
496 | inmailbox = mlx4_alloc_cmd_mailbox(dev); | |
497 | if (IS_ERR(inmailbox)) | |
498 | return PTR_ERR(inmailbox); | |
499 | ||
500 | outmailbox = mlx4_alloc_cmd_mailbox(dev); | |
501 | if (IS_ERR(outmailbox)) { | |
502 | mlx4_free_cmd_mailbox(dev, inmailbox); | |
503 | return PTR_ERR(outmailbox); | |
504 | } | |
505 | ||
506 | inbuf = inmailbox->buf; | |
507 | outbuf = outmailbox->buf; | |
9a5aa622 JM |
508 | inbuf[0] = 1; |
509 | inbuf[1] = 1; | |
510 | inbuf[2] = 1; | |
511 | inbuf[3] = 1; | |
512 | *(__be16 *) (&inbuf[16]) = cpu_to_be16(0x0015); | |
513 | *(__be32 *) (&inbuf[20]) = cpu_to_be32(port); | |
514 | ||
515 | err = mlx4_cmd_box(dev, inmailbox->dma, outmailbox->dma, port, 3, | |
f9baff50 JM |
516 | MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C, |
517 | MLX4_CMD_NATIVE); | |
9a5aa622 JM |
518 | if (!err) |
519 | *caps = *(__be32 *) (outbuf + 84); | |
520 | mlx4_free_cmd_mailbox(dev, inmailbox); | |
521 | mlx4_free_cmd_mailbox(dev, outmailbox); | |
522 | return err; | |
523 | } | |
9cd59352 | 524 | static struct mlx4_roce_gid_entry zgid_entry; |
9a5aa622 | 525 | |
449fc488 | 526 | int mlx4_get_slave_num_gids(struct mlx4_dev *dev, int slave, int port) |
b6ffaeff | 527 | { |
449fc488 MB |
528 | int vfs; |
529 | int slave_gid = slave; | |
530 | unsigned i; | |
531 | struct mlx4_slaves_pport slaves_pport; | |
532 | struct mlx4_active_ports actv_ports; | |
533 | unsigned max_port_p_one; | |
534 | ||
b6ffaeff JM |
535 | if (slave == 0) |
536 | return MLX4_ROCE_PF_GIDS; | |
449fc488 MB |
537 | |
538 | /* Slave is a VF */ | |
539 | slaves_pport = mlx4_phys_to_slaves_pport(dev, port); | |
540 | actv_ports = mlx4_get_active_ports(dev, slave); | |
541 | max_port_p_one = find_first_bit(actv_ports.ports, dev->caps.num_ports) + | |
542 | bitmap_weight(actv_ports.ports, dev->caps.num_ports) + 1; | |
543 | ||
544 | for (i = 1; i < max_port_p_one; i++) { | |
545 | struct mlx4_active_ports exclusive_ports; | |
546 | struct mlx4_slaves_pport slaves_pport_actv; | |
547 | bitmap_zero(exclusive_ports.ports, dev->caps.num_ports); | |
548 | set_bit(i - 1, exclusive_ports.ports); | |
549 | if (i == port) | |
550 | continue; | |
551 | slaves_pport_actv = mlx4_phys_to_slaves_pport_actv( | |
552 | dev, &exclusive_ports); | |
553 | slave_gid -= bitmap_weight(slaves_pport_actv.slaves, | |
872bf2fb | 554 | dev->persist->num_vfs + 1); |
449fc488 | 555 | } |
872bf2fb | 556 | vfs = bitmap_weight(slaves_pport.slaves, dev->persist->num_vfs + 1) - 1; |
449fc488 MB |
557 | if (slave_gid <= ((MLX4_ROCE_MAX_GIDS - MLX4_ROCE_PF_GIDS) % vfs)) |
558 | return ((MLX4_ROCE_MAX_GIDS - MLX4_ROCE_PF_GIDS) / vfs) + 1; | |
559 | return (MLX4_ROCE_MAX_GIDS - MLX4_ROCE_PF_GIDS) / vfs; | |
b6ffaeff JM |
560 | } |
561 | ||
449fc488 | 562 | int mlx4_get_base_gid_ix(struct mlx4_dev *dev, int slave, int port) |
b6ffaeff JM |
563 | { |
564 | int gids; | |
449fc488 MB |
565 | unsigned i; |
566 | int slave_gid = slave; | |
b6ffaeff JM |
567 | int vfs; |
568 | ||
449fc488 MB |
569 | struct mlx4_slaves_pport slaves_pport; |
570 | struct mlx4_active_ports actv_ports; | |
571 | unsigned max_port_p_one; | |
b6ffaeff JM |
572 | |
573 | if (slave == 0) | |
574 | return 0; | |
b6ffaeff | 575 | |
449fc488 MB |
576 | slaves_pport = mlx4_phys_to_slaves_pport(dev, port); |
577 | actv_ports = mlx4_get_active_ports(dev, slave); | |
578 | max_port_p_one = find_first_bit(actv_ports.ports, dev->caps.num_ports) + | |
579 | bitmap_weight(actv_ports.ports, dev->caps.num_ports) + 1; | |
580 | ||
581 | for (i = 1; i < max_port_p_one; i++) { | |
582 | struct mlx4_active_ports exclusive_ports; | |
583 | struct mlx4_slaves_pport slaves_pport_actv; | |
584 | bitmap_zero(exclusive_ports.ports, dev->caps.num_ports); | |
585 | set_bit(i - 1, exclusive_ports.ports); | |
586 | if (i == port) | |
587 | continue; | |
588 | slaves_pport_actv = mlx4_phys_to_slaves_pport_actv( | |
589 | dev, &exclusive_ports); | |
590 | slave_gid -= bitmap_weight(slaves_pport_actv.slaves, | |
872bf2fb | 591 | dev->persist->num_vfs + 1); |
449fc488 MB |
592 | } |
593 | gids = MLX4_ROCE_MAX_GIDS - MLX4_ROCE_PF_GIDS; | |
872bf2fb | 594 | vfs = bitmap_weight(slaves_pport.slaves, dev->persist->num_vfs + 1) - 1; |
449fc488 MB |
595 | if (slave_gid <= gids % vfs) |
596 | return MLX4_ROCE_PF_GIDS + ((gids / vfs) + 1) * (slave_gid - 1); | |
597 | ||
598 | return MLX4_ROCE_PF_GIDS + (gids % vfs) + | |
599 | ((gids / vfs) * (slave_gid - 1)); | |
b6ffaeff | 600 | } |
449fc488 | 601 | EXPORT_SYMBOL_GPL(mlx4_get_base_gid_ix); |
b6ffaeff | 602 | |
111c6094 JM |
603 | static int mlx4_reset_roce_port_gids(struct mlx4_dev *dev, int slave, |
604 | int port, struct mlx4_cmd_mailbox *mailbox) | |
605 | { | |
606 | struct mlx4_roce_gid_entry *gid_entry_mbox; | |
607 | struct mlx4_priv *priv = mlx4_priv(dev); | |
608 | int num_gids, base, offset; | |
609 | int i, err; | |
610 | ||
611 | num_gids = mlx4_get_slave_num_gids(dev, slave, port); | |
612 | base = mlx4_get_base_gid_ix(dev, slave, port); | |
613 | ||
614 | memset(mailbox->buf, 0, MLX4_MAILBOX_SIZE); | |
615 | ||
616 | mutex_lock(&(priv->port[port].gid_table.mutex)); | |
617 | /* Zero-out gids belonging to that slave in the port GID table */ | |
618 | for (i = 0, offset = base; i < num_gids; offset++, i++) | |
619 | memcpy(priv->port[port].gid_table.roce_gids[offset].raw, | |
620 | zgid_entry.raw, MLX4_ROCE_GID_ENTRY_SIZE); | |
621 | ||
622 | /* Now, copy roce port gids table to mailbox for passing to FW */ | |
623 | gid_entry_mbox = (struct mlx4_roce_gid_entry *)mailbox->buf; | |
624 | for (i = 0; i < MLX4_ROCE_MAX_GIDS; gid_entry_mbox++, i++) | |
625 | memcpy(gid_entry_mbox->raw, | |
626 | priv->port[port].gid_table.roce_gids[i].raw, | |
627 | MLX4_ROCE_GID_ENTRY_SIZE); | |
628 | ||
629 | err = mlx4_cmd(dev, mailbox->dma, | |
a130b590 IS |
630 | ((u32)port) | (MLX4_SET_PORT_GID_TABLE << 8), |
631 | MLX4_SET_PORT_ETH_OPCODE, MLX4_CMD_SET_PORT, | |
632 | MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE); | |
111c6094 JM |
633 | mutex_unlock(&(priv->port[port].gid_table.mutex)); |
634 | return err; | |
635 | } | |
636 | ||
637 | ||
638 | void mlx4_reset_roce_gids(struct mlx4_dev *dev, int slave) | |
639 | { | |
640 | struct mlx4_active_ports actv_ports; | |
641 | struct mlx4_cmd_mailbox *mailbox; | |
642 | int num_eth_ports, err; | |
643 | int i; | |
644 | ||
872bf2fb | 645 | if (slave < 0 || slave > dev->persist->num_vfs) |
111c6094 JM |
646 | return; |
647 | ||
648 | actv_ports = mlx4_get_active_ports(dev, slave); | |
649 | ||
650 | for (i = 0, num_eth_ports = 0; i < dev->caps.num_ports; i++) { | |
651 | if (test_bit(i, actv_ports.ports)) { | |
652 | if (dev->caps.port_type[i + 1] != MLX4_PORT_TYPE_ETH) | |
653 | continue; | |
654 | num_eth_ports++; | |
655 | } | |
656 | } | |
657 | ||
658 | if (!num_eth_ports) | |
659 | return; | |
660 | ||
661 | /* have ETH ports. Alloc mailbox for SET_PORT command */ | |
662 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
663 | if (IS_ERR(mailbox)) | |
664 | return; | |
665 | ||
666 | for (i = 0; i < dev->caps.num_ports; i++) { | |
667 | if (test_bit(i, actv_ports.ports)) { | |
668 | if (dev->caps.port_type[i + 1] != MLX4_PORT_TYPE_ETH) | |
669 | continue; | |
670 | err = mlx4_reset_roce_port_gids(dev, slave, i + 1, mailbox); | |
671 | if (err) | |
672 | mlx4_warn(dev, "Could not reset ETH port GID table for slave %d, port %d (%d)\n", | |
673 | slave, i + 1, err); | |
674 | } | |
675 | } | |
676 | ||
677 | mlx4_free_cmd_mailbox(dev, mailbox); | |
678 | return; | |
679 | } | |
680 | ||
ffe455ad EE |
681 | static int mlx4_common_set_port(struct mlx4_dev *dev, int slave, u32 in_mod, |
682 | u8 op_mod, struct mlx4_cmd_mailbox *inbox) | |
683 | { | |
684 | struct mlx4_priv *priv = mlx4_priv(dev); | |
685 | struct mlx4_port_info *port_info; | |
686 | struct mlx4_mfunc_master_ctx *master = &priv->mfunc.master; | |
687 | struct mlx4_slave_state *slave_st = &master->slave_state[slave]; | |
688 | struct mlx4_set_port_rqp_calc_context *qpn_context; | |
689 | struct mlx4_set_port_general_context *gen_context; | |
b6ffaeff | 690 | struct mlx4_roce_gid_entry *gid_entry_tbl, *gid_entry_mbox, *gid_entry_mb1; |
ffe455ad EE |
691 | int reset_qkey_viols; |
692 | int port; | |
693 | int is_eth; | |
b6ffaeff JM |
694 | int num_gids; |
695 | int base; | |
ffe455ad EE |
696 | u32 in_modifier; |
697 | u32 promisc; | |
698 | u16 mtu, prev_mtu; | |
699 | int err; | |
b6ffaeff JM |
700 | int i, j; |
701 | int offset; | |
ffe455ad EE |
702 | __be32 agg_cap_mask; |
703 | __be32 slave_cap_mask; | |
704 | __be32 new_cap_mask; | |
705 | ||
706 | port = in_mod & 0xff; | |
707 | in_modifier = in_mod >> 8; | |
708 | is_eth = op_mod; | |
709 | port_info = &priv->port[port]; | |
710 | ||
711 | /* Slaves cannot perform SET_PORT operations except changing MTU */ | |
712 | if (is_eth) { | |
713 | if (slave != dev->caps.function && | |
9cd59352 JM |
714 | in_modifier != MLX4_SET_PORT_GENERAL && |
715 | in_modifier != MLX4_SET_PORT_GID_TABLE) { | |
ffe455ad EE |
716 | mlx4_warn(dev, "denying SET_PORT for slave:%d\n", |
717 | slave); | |
718 | return -EINVAL; | |
719 | } | |
720 | switch (in_modifier) { | |
721 | case MLX4_SET_PORT_RQP_CALC: | |
722 | qpn_context = inbox->buf; | |
723 | qpn_context->base_qpn = | |
724 | cpu_to_be32(port_info->base_qpn); | |
725 | qpn_context->n_mac = 0x7; | |
726 | promisc = be32_to_cpu(qpn_context->promisc) >> | |
727 | SET_PORT_PROMISC_SHIFT; | |
728 | qpn_context->promisc = cpu_to_be32( | |
729 | promisc << SET_PORT_PROMISC_SHIFT | | |
730 | port_info->base_qpn); | |
731 | promisc = be32_to_cpu(qpn_context->mcast) >> | |
732 | SET_PORT_MC_PROMISC_SHIFT; | |
733 | qpn_context->mcast = cpu_to_be32( | |
734 | promisc << SET_PORT_MC_PROMISC_SHIFT | | |
735 | port_info->base_qpn); | |
736 | break; | |
737 | case MLX4_SET_PORT_GENERAL: | |
738 | gen_context = inbox->buf; | |
739 | /* Mtu is configured as the max MTU among all the | |
740 | * the functions on the port. */ | |
741 | mtu = be16_to_cpu(gen_context->mtu); | |
c59fec20 EE |
742 | mtu = min_t(int, mtu, dev->caps.eth_mtu_cap[port] + |
743 | ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN); | |
ffe455ad EE |
744 | prev_mtu = slave_st->mtu[port]; |
745 | slave_st->mtu[port] = mtu; | |
746 | if (mtu > master->max_mtu[port]) | |
747 | master->max_mtu[port] = mtu; | |
748 | if (mtu < prev_mtu && prev_mtu == | |
749 | master->max_mtu[port]) { | |
750 | slave_st->mtu[port] = mtu; | |
751 | master->max_mtu[port] = mtu; | |
752 | for (i = 0; i < dev->num_slaves; i++) { | |
753 | master->max_mtu[port] = | |
754 | max(master->max_mtu[port], | |
755 | master->slave_state[i].mtu[port]); | |
756 | } | |
757 | } | |
758 | ||
759 | gen_context->mtu = cpu_to_be16(master->max_mtu[port]); | |
760 | break; | |
9cd59352 | 761 | case MLX4_SET_PORT_GID_TABLE: |
b6ffaeff JM |
762 | /* change to MULTIPLE entries: number of guest's gids |
763 | * need a FOR-loop here over number of gids the guest has. | |
764 | * 1. Check no duplicates in gids passed by slave | |
765 | */ | |
449fc488 MB |
766 | num_gids = mlx4_get_slave_num_gids(dev, slave, port); |
767 | base = mlx4_get_base_gid_ix(dev, slave, port); | |
b6ffaeff JM |
768 | gid_entry_mbox = (struct mlx4_roce_gid_entry *)(inbox->buf); |
769 | for (i = 0; i < num_gids; gid_entry_mbox++, i++) { | |
770 | if (!memcmp(gid_entry_mbox->raw, zgid_entry.raw, | |
771 | sizeof(zgid_entry))) | |
772 | continue; | |
773 | gid_entry_mb1 = gid_entry_mbox + 1; | |
774 | for (j = i + 1; j < num_gids; gid_entry_mb1++, j++) { | |
775 | if (!memcmp(gid_entry_mb1->raw, | |
776 | zgid_entry.raw, sizeof(zgid_entry))) | |
777 | continue; | |
778 | if (!memcmp(gid_entry_mb1->raw, gid_entry_mbox->raw, | |
779 | sizeof(gid_entry_mbox->raw))) { | |
780 | /* found duplicate */ | |
781 | return -EINVAL; | |
9cd59352 JM |
782 | } |
783 | } | |
784 | } | |
b6ffaeff JM |
785 | |
786 | /* 2. Check that do not have duplicates in OTHER | |
787 | * entries in the port GID table | |
788 | */ | |
111c6094 JM |
789 | |
790 | mutex_lock(&(priv->port[port].gid_table.mutex)); | |
9cd59352 | 791 | for (i = 0; i < MLX4_ROCE_MAX_GIDS; i++) { |
b6ffaeff JM |
792 | if (i >= base && i < base + num_gids) |
793 | continue; /* don't compare to slave's current gids */ | |
111c6094 | 794 | gid_entry_tbl = &priv->port[port].gid_table.roce_gids[i]; |
b6ffaeff JM |
795 | if (!memcmp(gid_entry_tbl->raw, zgid_entry.raw, sizeof(zgid_entry))) |
796 | continue; | |
797 | gid_entry_mbox = (struct mlx4_roce_gid_entry *)(inbox->buf); | |
798 | for (j = 0; j < num_gids; gid_entry_mbox++, j++) { | |
799 | if (!memcmp(gid_entry_mbox->raw, zgid_entry.raw, | |
800 | sizeof(zgid_entry))) | |
801 | continue; | |
802 | if (!memcmp(gid_entry_mbox->raw, gid_entry_tbl->raw, | |
803 | sizeof(gid_entry_tbl->raw))) { | |
804 | /* found duplicate */ | |
1a91de28 | 805 | mlx4_warn(dev, "requested gid entry for slave:%d is a duplicate of gid at index %d\n", |
b6ffaeff | 806 | slave, i); |
111c6094 | 807 | mutex_unlock(&(priv->port[port].gid_table.mutex)); |
b6ffaeff JM |
808 | return -EINVAL; |
809 | } | |
810 | } | |
9cd59352 | 811 | } |
b6ffaeff JM |
812 | |
813 | /* insert slave GIDs with memcpy, starting at slave's base index */ | |
814 | gid_entry_mbox = (struct mlx4_roce_gid_entry *)(inbox->buf); | |
815 | for (i = 0, offset = base; i < num_gids; gid_entry_mbox++, offset++, i++) | |
111c6094 JM |
816 | memcpy(priv->port[port].gid_table.roce_gids[offset].raw, |
817 | gid_entry_mbox->raw, MLX4_ROCE_GID_ENTRY_SIZE); | |
b6ffaeff JM |
818 | |
819 | /* Now, copy roce port gids table to current mailbox for passing to FW */ | |
820 | gid_entry_mbox = (struct mlx4_roce_gid_entry *)(inbox->buf); | |
821 | for (i = 0; i < MLX4_ROCE_MAX_GIDS; gid_entry_mbox++, i++) | |
111c6094 JM |
822 | memcpy(gid_entry_mbox->raw, |
823 | priv->port[port].gid_table.roce_gids[i].raw, | |
824 | MLX4_ROCE_GID_ENTRY_SIZE); | |
825 | ||
826 | err = mlx4_cmd(dev, inbox->dma, in_mod & 0xffff, op_mod, | |
827 | MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, | |
828 | MLX4_CMD_NATIVE); | |
829 | mutex_unlock(&(priv->port[port].gid_table.mutex)); | |
830 | return err; | |
ffe455ad | 831 | } |
111c6094 JM |
832 | |
833 | return mlx4_cmd(dev, inbox->dma, in_mod & 0xffff, op_mod, | |
ffe455ad EE |
834 | MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, |
835 | MLX4_CMD_NATIVE); | |
836 | } | |
837 | ||
51af33cf IS |
838 | /* Slaves are not allowed to SET_PORT beacon (LED) blink */ |
839 | if (op_mod == MLX4_SET_PORT_BEACON_OPCODE) { | |
840 | mlx4_warn(dev, "denying SET_PORT Beacon slave:%d\n", slave); | |
841 | return -EPERM; | |
842 | } | |
843 | ||
ffe455ad EE |
844 | /* For IB, we only consider: |
845 | * - The capability mask, which is set to the aggregate of all | |
846 | * slave function capabilities | |
847 | * - The QKey violatin counter - reset according to each request. | |
848 | */ | |
849 | ||
850 | if (dev->flags & MLX4_FLAG_OLD_PORT_CMDS) { | |
851 | reset_qkey_viols = (*(u8 *) inbox->buf) & 0x40; | |
852 | new_cap_mask = ((__be32 *) inbox->buf)[2]; | |
853 | } else { | |
854 | reset_qkey_viols = ((u8 *) inbox->buf)[3] & 0x1; | |
855 | new_cap_mask = ((__be32 *) inbox->buf)[1]; | |
856 | } | |
857 | ||
efcd235d JM |
858 | /* slave may not set the IS_SM capability for the port */ |
859 | if (slave != mlx4_master_func_num(dev) && | |
860 | (be32_to_cpu(new_cap_mask) & MLX4_PORT_CAP_IS_SM)) | |
861 | return -EINVAL; | |
862 | ||
863 | /* No DEV_MGMT in multifunc mode */ | |
864 | if (mlx4_is_mfunc(dev) && | |
865 | (be32_to_cpu(new_cap_mask) & MLX4_PORT_CAP_DEV_MGMT_SUP)) | |
866 | return -EINVAL; | |
867 | ||
ffe455ad EE |
868 | agg_cap_mask = 0; |
869 | slave_cap_mask = | |
870 | priv->mfunc.master.slave_state[slave].ib_cap_mask[port]; | |
871 | priv->mfunc.master.slave_state[slave].ib_cap_mask[port] = new_cap_mask; | |
872 | for (i = 0; i < dev->num_slaves; i++) | |
873 | agg_cap_mask |= | |
874 | priv->mfunc.master.slave_state[i].ib_cap_mask[port]; | |
875 | ||
876 | /* only clear mailbox for guests. Master may be setting | |
877 | * MTU or PKEY table size | |
878 | */ | |
879 | if (slave != dev->caps.function) | |
880 | memset(inbox->buf, 0, 256); | |
881 | if (dev->flags & MLX4_FLAG_OLD_PORT_CMDS) { | |
edc4a67e | 882 | *(u8 *) inbox->buf |= !!reset_qkey_viols << 6; |
ffe455ad EE |
883 | ((__be32 *) inbox->buf)[2] = agg_cap_mask; |
884 | } else { | |
edc4a67e | 885 | ((u8 *) inbox->buf)[3] |= !!reset_qkey_viols; |
ffe455ad EE |
886 | ((__be32 *) inbox->buf)[1] = agg_cap_mask; |
887 | } | |
888 | ||
889 | err = mlx4_cmd(dev, inbox->dma, port, is_eth, MLX4_CMD_SET_PORT, | |
890 | MLX4_CMD_TIME_CLASS_B, MLX4_CMD_NATIVE); | |
891 | if (err) | |
892 | priv->mfunc.master.slave_state[slave].ib_cap_mask[port] = | |
893 | slave_cap_mask; | |
894 | return err; | |
895 | } | |
896 | ||
897 | int mlx4_SET_PORT_wrapper(struct mlx4_dev *dev, int slave, | |
898 | struct mlx4_vhcr *vhcr, | |
899 | struct mlx4_cmd_mailbox *inbox, | |
900 | struct mlx4_cmd_mailbox *outbox, | |
901 | struct mlx4_cmd_info *cmd) | |
902 | { | |
449fc488 MB |
903 | int port = mlx4_slave_convert_port( |
904 | dev, slave, vhcr->in_modifier & 0xFF); | |
905 | ||
906 | if (port < 0) | |
907 | return -EINVAL; | |
908 | ||
909 | vhcr->in_modifier = (vhcr->in_modifier & ~0xFF) | | |
910 | (port & 0xFF); | |
911 | ||
ffe455ad EE |
912 | return mlx4_common_set_port(dev, slave, vhcr->in_modifier, |
913 | vhcr->op_modifier, inbox); | |
914 | } | |
915 | ||
096335b3 OG |
916 | /* bit locations for set port command with zero op modifier */ |
917 | enum { | |
918 | MLX4_SET_PORT_VL_CAP = 4, /* bits 7:4 */ | |
919 | MLX4_SET_PORT_MTU_CAP = 12, /* bits 15:12 */ | |
6634961c | 920 | MLX4_CHANGE_PORT_PKEY_TBL_SZ = 20, |
096335b3 OG |
921 | MLX4_CHANGE_PORT_VL_CAP = 21, |
922 | MLX4_CHANGE_PORT_MTU_CAP = 22, | |
923 | }; | |
924 | ||
6634961c | 925 | int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port, int pkey_tbl_sz) |
7ff93f8b YP |
926 | { |
927 | struct mlx4_cmd_mailbox *mailbox; | |
6634961c | 928 | int err, vl_cap, pkey_tbl_flag = 0; |
7ff93f8b | 929 | |
352b09ed RD |
930 | if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH) |
931 | return 0; | |
932 | ||
7ff93f8b YP |
933 | mailbox = mlx4_alloc_cmd_mailbox(dev); |
934 | if (IS_ERR(mailbox)) | |
935 | return PTR_ERR(mailbox); | |
936 | ||
793730bf | 937 | ((__be32 *) mailbox->buf)[1] = dev->caps.ib_port_def_cap[port]; |
096335b3 | 938 | |
6634961c JM |
939 | if (pkey_tbl_sz >= 0 && mlx4_is_master(dev)) { |
940 | pkey_tbl_flag = 1; | |
941 | ((__be16 *) mailbox->buf)[20] = cpu_to_be16(pkey_tbl_sz); | |
942 | } | |
943 | ||
096335b3 OG |
944 | /* IB VL CAP enum isn't used by the firmware, just numerical values */ |
945 | for (vl_cap = 8; vl_cap >= 1; vl_cap >>= 1) { | |
946 | ((__be32 *) mailbox->buf)[0] = cpu_to_be32( | |
947 | (1 << MLX4_CHANGE_PORT_MTU_CAP) | | |
948 | (1 << MLX4_CHANGE_PORT_VL_CAP) | | |
6634961c | 949 | (pkey_tbl_flag << MLX4_CHANGE_PORT_PKEY_TBL_SZ) | |
096335b3 OG |
950 | (dev->caps.port_ib_mtu[port] << MLX4_SET_PORT_MTU_CAP) | |
951 | (vl_cap << MLX4_SET_PORT_VL_CAP)); | |
a130b590 IS |
952 | err = mlx4_cmd(dev, mailbox->dma, port, |
953 | MLX4_SET_PORT_IB_OPCODE, MLX4_CMD_SET_PORT, | |
954 | MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED); | |
096335b3 OG |
955 | if (err != -ENOMEM) |
956 | break; | |
957 | } | |
7ff93f8b YP |
958 | |
959 | mlx4_free_cmd_mailbox(dev, mailbox); | |
960 | return err; | |
961 | } | |
ffe455ad | 962 | |
cb9ffb76 | 963 | int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu, |
ffe455ad EE |
964 | u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx) |
965 | { | |
966 | struct mlx4_cmd_mailbox *mailbox; | |
967 | struct mlx4_set_port_general_context *context; | |
968 | int err; | |
969 | u32 in_mod; | |
970 | ||
971 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
972 | if (IS_ERR(mailbox)) | |
973 | return PTR_ERR(mailbox); | |
974 | context = mailbox->buf; | |
ffe455ad EE |
975 | context->flags = SET_PORT_GEN_ALL_VALID; |
976 | context->mtu = cpu_to_be16(mtu); | |
977 | context->pptx = (pptx * (!pfctx)) << 7; | |
978 | context->pfctx = pfctx; | |
979 | context->pprx = (pprx * (!pfcrx)) << 7; | |
980 | context->pfcrx = pfcrx; | |
981 | ||
982 | in_mod = MLX4_SET_PORT_GENERAL << 8 | port; | |
a130b590 IS |
983 | err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE, |
984 | MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, | |
985 | MLX4_CMD_WRAPPED); | |
ffe455ad EE |
986 | |
987 | mlx4_free_cmd_mailbox(dev, mailbox); | |
988 | return err; | |
989 | } | |
990 | EXPORT_SYMBOL(mlx4_SET_PORT_general); | |
991 | ||
cb9ffb76 | 992 | int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn, |
ffe455ad EE |
993 | u8 promisc) |
994 | { | |
995 | struct mlx4_cmd_mailbox *mailbox; | |
996 | struct mlx4_set_port_rqp_calc_context *context; | |
997 | int err; | |
998 | u32 in_mod; | |
999 | u32 m_promisc = (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) ? | |
1000 | MCAST_DIRECT : MCAST_DEFAULT; | |
1001 | ||
c96d97f4 | 1002 | if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) |
ffe455ad EE |
1003 | return 0; |
1004 | ||
1005 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
1006 | if (IS_ERR(mailbox)) | |
1007 | return PTR_ERR(mailbox); | |
1008 | context = mailbox->buf; | |
ffe455ad EE |
1009 | context->base_qpn = cpu_to_be32(base_qpn); |
1010 | context->n_mac = dev->caps.log_num_macs; | |
1011 | context->promisc = cpu_to_be32(promisc << SET_PORT_PROMISC_SHIFT | | |
1012 | base_qpn); | |
1013 | context->mcast = cpu_to_be32(m_promisc << SET_PORT_MC_PROMISC_SHIFT | | |
1014 | base_qpn); | |
1015 | context->intra_no_vlan = 0; | |
1016 | context->no_vlan = MLX4_NO_VLAN_IDX; | |
1017 | context->intra_vlan_miss = 0; | |
1018 | context->vlan_miss = MLX4_VLAN_MISS_IDX; | |
1019 | ||
1020 | in_mod = MLX4_SET_PORT_RQP_CALC << 8 | port; | |
a130b590 IS |
1021 | err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE, |
1022 | MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, | |
1023 | MLX4_CMD_WRAPPED); | |
ffe455ad EE |
1024 | |
1025 | mlx4_free_cmd_mailbox(dev, mailbox); | |
1026 | return err; | |
1027 | } | |
1028 | EXPORT_SYMBOL(mlx4_SET_PORT_qpn_calc); | |
1029 | ||
7ffdf726 OG |
1030 | enum { |
1031 | VXLAN_ENABLE_MODIFY = 1 << 7, | |
1032 | VXLAN_STEERING_MODIFY = 1 << 6, | |
1033 | ||
1034 | VXLAN_ENABLE = 1 << 7, | |
1035 | }; | |
1036 | ||
1037 | struct mlx4_set_port_vxlan_context { | |
1038 | u32 reserved1; | |
1039 | u8 modify_flags; | |
1040 | u8 reserved2; | |
1041 | u8 enable_flags; | |
1042 | u8 steering; | |
1043 | }; | |
1044 | ||
1b136de1 | 1045 | int mlx4_SET_PORT_VXLAN(struct mlx4_dev *dev, u8 port, u8 steering, int enable) |
7ffdf726 OG |
1046 | { |
1047 | int err; | |
1048 | u32 in_mod; | |
1049 | struct mlx4_cmd_mailbox *mailbox; | |
1050 | struct mlx4_set_port_vxlan_context *context; | |
1051 | ||
1052 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
1053 | if (IS_ERR(mailbox)) | |
1054 | return PTR_ERR(mailbox); | |
1055 | context = mailbox->buf; | |
1056 | memset(context, 0, sizeof(*context)); | |
1057 | ||
1058 | context->modify_flags = VXLAN_ENABLE_MODIFY | VXLAN_STEERING_MODIFY; | |
1b136de1 OG |
1059 | if (enable) |
1060 | context->enable_flags = VXLAN_ENABLE; | |
7ffdf726 OG |
1061 | context->steering = steering; |
1062 | ||
1063 | in_mod = MLX4_SET_PORT_VXLAN << 8 | port; | |
a130b590 IS |
1064 | err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE, |
1065 | MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, | |
1066 | MLX4_CMD_NATIVE); | |
7ffdf726 OG |
1067 | |
1068 | mlx4_free_cmd_mailbox(dev, mailbox); | |
1069 | return err; | |
1070 | } | |
1071 | EXPORT_SYMBOL(mlx4_SET_PORT_VXLAN); | |
1072 | ||
51af33cf IS |
1073 | int mlx4_SET_PORT_BEACON(struct mlx4_dev *dev, u8 port, u16 time) |
1074 | { | |
1075 | int err; | |
1076 | struct mlx4_cmd_mailbox *mailbox; | |
1077 | ||
1078 | mailbox = mlx4_alloc_cmd_mailbox(dev); | |
1079 | if (IS_ERR(mailbox)) | |
1080 | return PTR_ERR(mailbox); | |
1081 | ||
1082 | *((__be32 *)mailbox->buf) = cpu_to_be32(time); | |
1083 | ||
1084 | err = mlx4_cmd(dev, mailbox->dma, port, MLX4_SET_PORT_BEACON_OPCODE, | |
1085 | MLX4_CMD_SET_PORT, MLX4_CMD_TIME_CLASS_B, | |
1086 | MLX4_CMD_NATIVE); | |
1087 | ||
1088 | mlx4_free_cmd_mailbox(dev, mailbox); | |
1089 | return err; | |
1090 | } | |
1091 | EXPORT_SYMBOL(mlx4_SET_PORT_BEACON); | |
1092 | ||
ffe455ad EE |
1093 | int mlx4_SET_MCAST_FLTR_wrapper(struct mlx4_dev *dev, int slave, |
1094 | struct mlx4_vhcr *vhcr, | |
1095 | struct mlx4_cmd_mailbox *inbox, | |
1096 | struct mlx4_cmd_mailbox *outbox, | |
1097 | struct mlx4_cmd_info *cmd) | |
1098 | { | |
1099 | int err = 0; | |
1100 | ||
1101 | return err; | |
1102 | } | |
1103 | ||
1104 | int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port, | |
1105 | u64 mac, u64 clear, u8 mode) | |
1106 | { | |
1107 | return mlx4_cmd(dev, (mac | (clear << 63)), port, mode, | |
1108 | MLX4_CMD_SET_MCAST_FLTR, MLX4_CMD_TIME_CLASS_B, | |
1109 | MLX4_CMD_WRAPPED); | |
1110 | } | |
1111 | EXPORT_SYMBOL(mlx4_SET_MCAST_FLTR); | |
1112 | ||
1113 | int mlx4_SET_VLAN_FLTR_wrapper(struct mlx4_dev *dev, int slave, | |
1114 | struct mlx4_vhcr *vhcr, | |
1115 | struct mlx4_cmd_mailbox *inbox, | |
1116 | struct mlx4_cmd_mailbox *outbox, | |
1117 | struct mlx4_cmd_info *cmd) | |
1118 | { | |
1119 | int err = 0; | |
1120 | ||
1121 | return err; | |
1122 | } | |
1123 | ||
1124 | int mlx4_common_dump_eth_stats(struct mlx4_dev *dev, int slave, | |
1125 | u32 in_mod, struct mlx4_cmd_mailbox *outbox) | |
1126 | { | |
1127 | return mlx4_cmd_box(dev, 0, outbox->dma, in_mod, 0, | |
1128 | MLX4_CMD_DUMP_ETH_STATS, MLX4_CMD_TIME_CLASS_B, | |
1129 | MLX4_CMD_NATIVE); | |
1130 | } | |
1131 | ||
1132 | int mlx4_DUMP_ETH_STATS_wrapper(struct mlx4_dev *dev, int slave, | |
1133 | struct mlx4_vhcr *vhcr, | |
1134 | struct mlx4_cmd_mailbox *inbox, | |
1135 | struct mlx4_cmd_mailbox *outbox, | |
1136 | struct mlx4_cmd_info *cmd) | |
1137 | { | |
35fb9afb EE |
1138 | if (slave != dev->caps.function) |
1139 | return 0; | |
ffe455ad EE |
1140 | return mlx4_common_dump_eth_stats(dev, slave, |
1141 | vhcr->in_modifier, outbox); | |
1142 | } | |
93ece0c1 | 1143 | |
9cd59352 JM |
1144 | int mlx4_get_slave_from_roce_gid(struct mlx4_dev *dev, int port, u8 *gid, |
1145 | int *slave_id) | |
6ee51a4e JM |
1146 | { |
1147 | struct mlx4_priv *priv = mlx4_priv(dev); | |
1148 | int i, found_ix = -1; | |
b6ffaeff | 1149 | int vf_gids = MLX4_ROCE_MAX_GIDS - MLX4_ROCE_PF_GIDS; |
449fc488 MB |
1150 | struct mlx4_slaves_pport slaves_pport; |
1151 | unsigned num_vfs; | |
1152 | int slave_gid; | |
6ee51a4e JM |
1153 | |
1154 | if (!mlx4_is_mfunc(dev)) | |
1155 | return -EINVAL; | |
1156 | ||
449fc488 | 1157 | slaves_pport = mlx4_phys_to_slaves_pport(dev, port); |
872bf2fb YH |
1158 | num_vfs = bitmap_weight(slaves_pport.slaves, |
1159 | dev->persist->num_vfs + 1) - 1; | |
449fc488 | 1160 | |
6ee51a4e | 1161 | for (i = 0; i < MLX4_ROCE_MAX_GIDS; i++) { |
111c6094 JM |
1162 | if (!memcmp(priv->port[port].gid_table.roce_gids[i].raw, gid, |
1163 | MLX4_ROCE_GID_ENTRY_SIZE)) { | |
6ee51a4e JM |
1164 | found_ix = i; |
1165 | break; | |
1166 | } | |
1167 | } | |
1168 | ||
b6ffaeff | 1169 | if (found_ix >= 0) { |
0254bc82 MB |
1170 | /* Calculate a slave_gid which is the slave number in the gid |
1171 | * table and not a globally unique slave number. | |
1172 | */ | |
b6ffaeff | 1173 | if (found_ix < MLX4_ROCE_PF_GIDS) |
449fc488 MB |
1174 | slave_gid = 0; |
1175 | else if (found_ix < MLX4_ROCE_PF_GIDS + (vf_gids % num_vfs) * | |
1176 | (vf_gids / num_vfs + 1)) | |
1177 | slave_gid = ((found_ix - MLX4_ROCE_PF_GIDS) / | |
1178 | (vf_gids / num_vfs + 1)) + 1; | |
b6ffaeff | 1179 | else |
449fc488 | 1180 | slave_gid = |
b6ffaeff | 1181 | ((found_ix - MLX4_ROCE_PF_GIDS - |
449fc488 MB |
1182 | ((vf_gids % num_vfs) * ((vf_gids / num_vfs + 1)))) / |
1183 | (vf_gids / num_vfs)) + vf_gids % num_vfs + 1; | |
1184 | ||
0254bc82 | 1185 | /* Calculate the globally unique slave id */ |
449fc488 MB |
1186 | if (slave_gid) { |
1187 | struct mlx4_active_ports exclusive_ports; | |
1188 | struct mlx4_active_ports actv_ports; | |
1189 | struct mlx4_slaves_pport slaves_pport_actv; | |
1190 | unsigned max_port_p_one; | |
0254bc82 MB |
1191 | int num_vfs_before = 0; |
1192 | int candidate_slave_gid; | |
449fc488 | 1193 | |
0254bc82 | 1194 | /* Calculate how many VFs are on the previous port, if exists */ |
449fc488 MB |
1195 | for (i = 1; i < port; i++) { |
1196 | bitmap_zero(exclusive_ports.ports, dev->caps.num_ports); | |
0254bc82 | 1197 | set_bit(i - 1, exclusive_ports.ports); |
449fc488 MB |
1198 | slaves_pport_actv = |
1199 | mlx4_phys_to_slaves_pport_actv( | |
1200 | dev, &exclusive_ports); | |
0254bc82 | 1201 | num_vfs_before += bitmap_weight( |
449fc488 | 1202 | slaves_pport_actv.slaves, |
872bf2fb | 1203 | dev->persist->num_vfs + 1); |
449fc488 MB |
1204 | } |
1205 | ||
0254bc82 MB |
1206 | /* candidate_slave_gid isn't necessarily the correct slave, but |
1207 | * it has the same number of ports and is assigned to the same | |
1208 | * ports as the real slave we're looking for. On dual port VF, | |
1209 | * slave_gid = [single port VFs on port <port>] + | |
1210 | * [offset of the current slave from the first dual port VF] + | |
1211 | * 1 (for the PF). | |
1212 | */ | |
1213 | candidate_slave_gid = slave_gid + num_vfs_before; | |
1214 | ||
1215 | actv_ports = mlx4_get_active_ports(dev, candidate_slave_gid); | |
449fc488 MB |
1216 | max_port_p_one = find_first_bit( |
1217 | actv_ports.ports, dev->caps.num_ports) + | |
1218 | bitmap_weight(actv_ports.ports, | |
1219 | dev->caps.num_ports) + 1; | |
1220 | ||
0254bc82 | 1221 | /* Calculate the real slave number */ |
449fc488 MB |
1222 | for (i = 1; i < max_port_p_one; i++) { |
1223 | if (i == port) | |
1224 | continue; | |
1225 | bitmap_zero(exclusive_ports.ports, | |
1226 | dev->caps.num_ports); | |
1227 | set_bit(i - 1, exclusive_ports.ports); | |
1228 | slaves_pport_actv = | |
1229 | mlx4_phys_to_slaves_pport_actv( | |
1230 | dev, &exclusive_ports); | |
1231 | slave_gid += bitmap_weight( | |
1232 | slaves_pport_actv.slaves, | |
872bf2fb | 1233 | dev->persist->num_vfs + 1); |
449fc488 MB |
1234 | } |
1235 | } | |
1236 | *slave_id = slave_gid; | |
b6ffaeff | 1237 | } |
6ee51a4e JM |
1238 | |
1239 | return (found_ix >= 0) ? 0 : -EINVAL; | |
1240 | } | |
1241 | EXPORT_SYMBOL(mlx4_get_slave_from_roce_gid); | |
1242 | ||
9cd59352 JM |
1243 | int mlx4_get_roce_gid_from_slave(struct mlx4_dev *dev, int port, int slave_id, |
1244 | u8 *gid) | |
6ee51a4e JM |
1245 | { |
1246 | struct mlx4_priv *priv = mlx4_priv(dev); | |
1247 | ||
1248 | if (!mlx4_is_master(dev)) | |
1249 | return -EINVAL; | |
1250 | ||
111c6094 JM |
1251 | memcpy(gid, priv->port[port].gid_table.roce_gids[slave_id].raw, |
1252 | MLX4_ROCE_GID_ENTRY_SIZE); | |
6ee51a4e JM |
1253 | return 0; |
1254 | } | |
1255 | EXPORT_SYMBOL(mlx4_get_roce_gid_from_slave); | |
32a173c7 SM |
1256 | |
1257 | /* Cable Module Info */ | |
1258 | #define MODULE_INFO_MAX_READ 48 | |
1259 | ||
1260 | #define I2C_ADDR_LOW 0x50 | |
1261 | #define I2C_ADDR_HIGH 0x51 | |
1262 | #define I2C_PAGE_SIZE 256 | |
1263 | ||
1264 | /* Module Info Data */ | |
1265 | struct mlx4_cable_info { | |
1266 | u8 i2c_addr; | |
1267 | u8 page_num; | |
1268 | __be16 dev_mem_address; | |
1269 | __be16 reserved1; | |
1270 | __be16 size; | |
1271 | __be32 reserved2[2]; | |
1272 | u8 data[MODULE_INFO_MAX_READ]; | |
1273 | }; | |
1274 | ||
1275 | enum cable_info_err { | |
1276 | CABLE_INF_INV_PORT = 0x1, | |
1277 | CABLE_INF_OP_NOSUP = 0x2, | |
1278 | CABLE_INF_NOT_CONN = 0x3, | |
1279 | CABLE_INF_NO_EEPRM = 0x4, | |
1280 | CABLE_INF_PAGE_ERR = 0x5, | |
1281 | CABLE_INF_INV_ADDR = 0x6, | |
1282 | CABLE_INF_I2C_ADDR = 0x7, | |
1283 | CABLE_INF_QSFP_VIO = 0x8, | |
1284 | CABLE_INF_I2C_BUSY = 0x9, | |
1285 | }; | |
1286 | ||
1287 | #define MAD_STATUS_2_CABLE_ERR(mad_status) ((mad_status >> 8) & 0xFF) | |
1288 | ||
1289 | static inline const char *cable_info_mad_err_str(u16 mad_status) | |
1290 | { | |
1291 | u8 err = MAD_STATUS_2_CABLE_ERR(mad_status); | |
1292 | ||
1293 | switch (err) { | |
1294 | case CABLE_INF_INV_PORT: | |
1295 | return "invalid port selected"; | |
1296 | case CABLE_INF_OP_NOSUP: | |
1297 | return "operation not supported for this port (the port is of type CX4 or internal)"; | |
1298 | case CABLE_INF_NOT_CONN: | |
1299 | return "cable is not connected"; | |
1300 | case CABLE_INF_NO_EEPRM: | |
1301 | return "the connected cable has no EPROM (passive copper cable)"; | |
1302 | case CABLE_INF_PAGE_ERR: | |
1303 | return "page number is greater than 15"; | |
1304 | case CABLE_INF_INV_ADDR: | |
1305 | return "invalid device_address or size (that is, size equals 0 or address+size is greater than 256)"; | |
1306 | case CABLE_INF_I2C_ADDR: | |
1307 | return "invalid I2C slave address"; | |
1308 | case CABLE_INF_QSFP_VIO: | |
1309 | return "at least one cable violates the QSFP specification and ignores the modsel signal"; | |
1310 | case CABLE_INF_I2C_BUSY: | |
1311 | return "I2C bus is constantly busy"; | |
1312 | } | |
1313 | return "Unknown Error"; | |
1314 | } | |
1315 | ||
1316 | /** | |
1317 | * mlx4_get_module_info - Read cable module eeprom data | |
1318 | * @dev: mlx4_dev. | |
1319 | * @port: port number. | |
1320 | * @offset: byte offset in eeprom to start reading data from. | |
1321 | * @size: num of bytes to read. | |
1322 | * @data: output buffer to put the requested data into. | |
1323 | * | |
1324 | * Reads cable module eeprom data, puts the outcome data into | |
1325 | * data pointer paramer. | |
1326 | * Returns num of read bytes on success or a negative error | |
1327 | * code. | |
1328 | */ | |
1329 | int mlx4_get_module_info(struct mlx4_dev *dev, u8 port, | |
1330 | u16 offset, u16 size, u8 *data) | |
1331 | { | |
1332 | struct mlx4_cmd_mailbox *inbox, *outbox; | |
1333 | struct mlx4_mad_ifc *inmad, *outmad; | |
1334 | struct mlx4_cable_info *cable_info; | |
1335 | u16 i2c_addr; | |
1336 | int ret; | |
1337 | ||
1338 | if (size > MODULE_INFO_MAX_READ) | |
1339 | size = MODULE_INFO_MAX_READ; | |
1340 | ||
1341 | inbox = mlx4_alloc_cmd_mailbox(dev); | |
1342 | if (IS_ERR(inbox)) | |
1343 | return PTR_ERR(inbox); | |
1344 | ||
1345 | outbox = mlx4_alloc_cmd_mailbox(dev); | |
1346 | if (IS_ERR(outbox)) { | |
1347 | mlx4_free_cmd_mailbox(dev, inbox); | |
1348 | return PTR_ERR(outbox); | |
1349 | } | |
1350 | ||
1351 | inmad = (struct mlx4_mad_ifc *)(inbox->buf); | |
1352 | outmad = (struct mlx4_mad_ifc *)(outbox->buf); | |
1353 | ||
1354 | inmad->method = 0x1; /* Get */ | |
1355 | inmad->class_version = 0x1; | |
1356 | inmad->mgmt_class = 0x1; | |
1357 | inmad->base_version = 0x1; | |
1358 | inmad->attr_id = cpu_to_be16(0xFF60); /* Module Info */ | |
1359 | ||
1360 | if (offset < I2C_PAGE_SIZE && offset + size > I2C_PAGE_SIZE) | |
1361 | /* Cross pages reads are not allowed | |
1362 | * read until offset 256 in low page | |
1363 | */ | |
1364 | size -= offset + size - I2C_PAGE_SIZE; | |
1365 | ||
1366 | i2c_addr = I2C_ADDR_LOW; | |
1367 | if (offset >= I2C_PAGE_SIZE) { | |
1368 | /* Reset offset to high page */ | |
1369 | i2c_addr = I2C_ADDR_HIGH; | |
1370 | offset -= I2C_PAGE_SIZE; | |
1371 | } | |
1372 | ||
1373 | cable_info = (struct mlx4_cable_info *)inmad->data; | |
1374 | cable_info->dev_mem_address = cpu_to_be16(offset); | |
1375 | cable_info->page_num = 0; | |
1376 | cable_info->i2c_addr = i2c_addr; | |
1377 | cable_info->size = cpu_to_be16(size); | |
1378 | ||
1379 | ret = mlx4_cmd_box(dev, inbox->dma, outbox->dma, port, 3, | |
1380 | MLX4_CMD_MAD_IFC, MLX4_CMD_TIME_CLASS_C, | |
1381 | MLX4_CMD_NATIVE); | |
1382 | if (ret) | |
1383 | goto out; | |
1384 | ||
1385 | if (be16_to_cpu(outmad->status)) { | |
1386 | /* Mad returned with bad status */ | |
1387 | ret = be16_to_cpu(outmad->status); | |
1388 | mlx4_warn(dev, | |
1389 | "MLX4_CMD_MAD_IFC Get Module info attr(%x) port(%d) i2c_addr(%x) offset(%d) size(%d): Response Mad Status(%x) - %s\n", | |
1390 | 0xFF60, port, i2c_addr, offset, size, | |
1391 | ret, cable_info_mad_err_str(ret)); | |
1392 | ||
1393 | if (i2c_addr == I2C_ADDR_HIGH && | |
1394 | MAD_STATUS_2_CABLE_ERR(ret) == CABLE_INF_I2C_ADDR) | |
1395 | /* Some SFP cables do not support i2c slave | |
1396 | * address 0x51 (high page), abort silently. | |
1397 | */ | |
1398 | ret = 0; | |
1399 | else | |
1400 | ret = -ret; | |
1401 | goto out; | |
1402 | } | |
1403 | cable_info = (struct mlx4_cable_info *)outmad->data; | |
1404 | memcpy(data, cable_info->data, size); | |
1405 | ret = size; | |
1406 | out: | |
1407 | mlx4_free_cmd_mailbox(dev, inbox); | |
1408 | mlx4_free_cmd_mailbox(dev, outbox); | |
1409 | return ret; | |
1410 | } | |
1411 | EXPORT_SYMBOL(mlx4_get_module_info); |