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cb67b832 HHZ |
1 | /* |
2 | * Copyright (c) 2016, Mellanox Technologies. All rights reserved. | |
3 | * | |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | */ | |
32 | ||
33 | #include <generated/utsrelease.h> | |
34 | #include <linux/mlx5/fs.h> | |
35 | #include <net/switchdev.h> | |
d957b4e3 | 36 | #include <net/pkt_cls.h> |
717503b9 | 37 | #include <net/act_api.h> |
232c0013 HHZ |
38 | #include <net/netevent.h> |
39 | #include <net/arp.h> | |
cb67b832 HHZ |
40 | |
41 | #include "eswitch.h" | |
42 | #include "en.h" | |
1d447a39 | 43 | #include "en_rep.h" |
adb4c123 | 44 | #include "en_tc.h" |
101f4de9 | 45 | #include "en/tc_tun.h" |
f6dfb4c3 | 46 | #include "fs_core.h" |
cb67b832 | 47 | |
4c8fb298 | 48 | #define MLX5E_REP_PARAMS_DEF_LOG_SQ_SIZE \ |
e7164313 | 49 | max(0x7, MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE) |
8956f001 | 50 | #define MLX5E_REP_PARAMS_DEF_NUM_CHANNELS 1 |
4246f698 | 51 | |
cb67b832 HHZ |
52 | static const char mlx5e_rep_driver_name[] = "mlx5e_rep"; |
53 | ||
f5bc2c5d OS |
54 | struct mlx5e_rep_indr_block_priv { |
55 | struct net_device *netdev; | |
56 | struct mlx5e_rep_priv *rpriv; | |
57 | ||
58 | struct list_head list; | |
59 | }; | |
60 | ||
25f2d0e7 EB |
61 | static void mlx5e_rep_indr_unregister_block(struct mlx5e_rep_priv *rpriv, |
62 | struct net_device *netdev); | |
f5bc2c5d | 63 | |
cb67b832 HHZ |
64 | static void mlx5e_rep_get_drvinfo(struct net_device *dev, |
65 | struct ethtool_drvinfo *drvinfo) | |
66 | { | |
67 | strlcpy(drvinfo->driver, mlx5e_rep_driver_name, | |
68 | sizeof(drvinfo->driver)); | |
69 | strlcpy(drvinfo->version, UTS_RELEASE, sizeof(drvinfo->version)); | |
70 | } | |
71 | ||
72 | static const struct counter_desc sw_rep_stats_desc[] = { | |
73 | { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_packets) }, | |
74 | { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_bytes) }, | |
75 | { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_packets) }, | |
76 | { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_bytes) }, | |
77 | }; | |
78 | ||
a228060a OG |
79 | struct vport_stats { |
80 | u64 vport_rx_packets; | |
81 | u64 vport_tx_packets; | |
82 | u64 vport_rx_bytes; | |
83 | u64 vport_tx_bytes; | |
84 | }; | |
85 | ||
86 | static const struct counter_desc vport_rep_stats_desc[] = { | |
87 | { MLX5E_DECLARE_STAT(struct vport_stats, vport_rx_packets) }, | |
88 | { MLX5E_DECLARE_STAT(struct vport_stats, vport_rx_bytes) }, | |
89 | { MLX5E_DECLARE_STAT(struct vport_stats, vport_tx_packets) }, | |
90 | { MLX5E_DECLARE_STAT(struct vport_stats, vport_tx_bytes) }, | |
91 | }; | |
92 | ||
93 | #define NUM_VPORT_REP_SW_COUNTERS ARRAY_SIZE(sw_rep_stats_desc) | |
94 | #define NUM_VPORT_REP_HW_COUNTERS ARRAY_SIZE(vport_rep_stats_desc) | |
cb67b832 HHZ |
95 | |
96 | static void mlx5e_rep_get_strings(struct net_device *dev, | |
97 | u32 stringset, uint8_t *data) | |
98 | { | |
a228060a | 99 | int i, j; |
cb67b832 HHZ |
100 | |
101 | switch (stringset) { | |
102 | case ETH_SS_STATS: | |
a228060a | 103 | for (i = 0; i < NUM_VPORT_REP_SW_COUNTERS; i++) |
cb67b832 HHZ |
104 | strcpy(data + (i * ETH_GSTRING_LEN), |
105 | sw_rep_stats_desc[i].format); | |
a228060a OG |
106 | for (j = 0; j < NUM_VPORT_REP_HW_COUNTERS; j++, i++) |
107 | strcpy(data + (i * ETH_GSTRING_LEN), | |
108 | vport_rep_stats_desc[j].format); | |
cb67b832 HHZ |
109 | break; |
110 | } | |
111 | } | |
112 | ||
d9ee0491 | 113 | static void mlx5e_vf_rep_update_hw_counters(struct mlx5e_priv *priv) |
370bad0f OG |
114 | { |
115 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
1d447a39 SM |
116 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
117 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
370bad0f OG |
118 | struct rtnl_link_stats64 *vport_stats; |
119 | struct ifla_vf_stats vf_stats; | |
120 | int err; | |
121 | ||
122 | err = mlx5_eswitch_get_vport_stats(esw, rep->vport, &vf_stats); | |
123 | if (err) { | |
124 | pr_warn("vport %d error %d reading stats\n", rep->vport, err); | |
125 | return; | |
126 | } | |
127 | ||
128 | vport_stats = &priv->stats.vf_vport; | |
129 | /* flip tx/rx as we are reporting the counters for the switch vport */ | |
130 | vport_stats->rx_packets = vf_stats.tx_packets; | |
131 | vport_stats->rx_bytes = vf_stats.tx_bytes; | |
132 | vport_stats->tx_packets = vf_stats.rx_packets; | |
133 | vport_stats->tx_bytes = vf_stats.rx_bytes; | |
134 | } | |
135 | ||
d9ee0491 OG |
136 | static void mlx5e_uplink_rep_update_hw_counters(struct mlx5e_priv *priv) |
137 | { | |
138 | struct mlx5e_pport_stats *pstats = &priv->stats.pport; | |
139 | struct rtnl_link_stats64 *vport_stats; | |
140 | ||
141 | mlx5e_grp_802_3_update_stats(priv); | |
142 | ||
143 | vport_stats = &priv->stats.vf_vport; | |
144 | ||
145 | vport_stats->rx_packets = PPORT_802_3_GET(pstats, a_frames_received_ok); | |
146 | vport_stats->rx_bytes = PPORT_802_3_GET(pstats, a_octets_received_ok); | |
147 | vport_stats->tx_packets = PPORT_802_3_GET(pstats, a_frames_transmitted_ok); | |
148 | vport_stats->tx_bytes = PPORT_802_3_GET(pstats, a_octets_transmitted_ok); | |
149 | } | |
150 | ||
151 | static void mlx5e_rep_update_hw_counters(struct mlx5e_priv *priv) | |
152 | { | |
153 | struct mlx5e_rep_priv *rpriv = priv->ppriv; | |
154 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
155 | ||
156 | if (rep->vport == FDB_UPLINK_VPORT) | |
157 | mlx5e_uplink_rep_update_hw_counters(priv); | |
158 | else | |
159 | mlx5e_vf_rep_update_hw_counters(priv); | |
160 | } | |
161 | ||
370bad0f | 162 | static void mlx5e_rep_update_sw_counters(struct mlx5e_priv *priv) |
cb67b832 HHZ |
163 | { |
164 | struct mlx5e_sw_stats *s = &priv->stats.sw; | |
cb67b832 HHZ |
165 | int i, j; |
166 | ||
167 | memset(s, 0, sizeof(*s)); | |
168af00a TT |
168 | for (i = 0; i < mlx5e_get_netdev_max_channels(priv->netdev); i++) { |
169 | struct mlx5e_channel_stats *channel_stats = | |
170 | &priv->channel_stats[i]; | |
171 | struct mlx5e_rq_stats *rq_stats = &channel_stats->rq; | |
cb67b832 HHZ |
172 | |
173 | s->rx_packets += rq_stats->packets; | |
174 | s->rx_bytes += rq_stats->bytes; | |
175 | ||
168af00a TT |
176 | for (j = 0; j < priv->max_opened_tc; j++) { |
177 | struct mlx5e_sq_stats *sq_stats = &channel_stats->sq[j]; | |
cb67b832 HHZ |
178 | |
179 | s->tx_packets += sq_stats->packets; | |
180 | s->tx_bytes += sq_stats->bytes; | |
7fdc1adc | 181 | s->tx_queue_dropped += sq_stats->dropped; |
cb67b832 HHZ |
182 | } |
183 | } | |
370bad0f OG |
184 | } |
185 | ||
cb67b832 HHZ |
186 | static void mlx5e_rep_get_ethtool_stats(struct net_device *dev, |
187 | struct ethtool_stats *stats, u64 *data) | |
188 | { | |
189 | struct mlx5e_priv *priv = netdev_priv(dev); | |
a228060a | 190 | int i, j; |
cb67b832 HHZ |
191 | |
192 | if (!data) | |
193 | return; | |
194 | ||
195 | mutex_lock(&priv->state_lock); | |
168af00a | 196 | mlx5e_rep_update_sw_counters(priv); |
a228060a | 197 | mlx5e_rep_update_hw_counters(priv); |
cb67b832 HHZ |
198 | mutex_unlock(&priv->state_lock); |
199 | ||
a228060a | 200 | for (i = 0; i < NUM_VPORT_REP_SW_COUNTERS; i++) |
cb67b832 HHZ |
201 | data[i] = MLX5E_READ_CTR64_CPU(&priv->stats.sw, |
202 | sw_rep_stats_desc, i); | |
a228060a OG |
203 | |
204 | for (j = 0; j < NUM_VPORT_REP_HW_COUNTERS; j++, i++) | |
205 | data[i] = MLX5E_READ_CTR64_CPU(&priv->stats.vf_vport, | |
206 | vport_rep_stats_desc, j); | |
cb67b832 HHZ |
207 | } |
208 | ||
209 | static int mlx5e_rep_get_sset_count(struct net_device *dev, int sset) | |
210 | { | |
211 | switch (sset) { | |
212 | case ETH_SS_STATS: | |
a228060a | 213 | return NUM_VPORT_REP_SW_COUNTERS + NUM_VPORT_REP_HW_COUNTERS; |
cb67b832 HHZ |
214 | default: |
215 | return -EOPNOTSUPP; | |
216 | } | |
217 | } | |
218 | ||
f128f138 GT |
219 | static void mlx5e_rep_get_ringparam(struct net_device *dev, |
220 | struct ethtool_ringparam *param) | |
221 | { | |
222 | struct mlx5e_priv *priv = netdev_priv(dev); | |
223 | ||
224 | mlx5e_ethtool_get_ringparam(priv, param); | |
225 | } | |
226 | ||
227 | static int mlx5e_rep_set_ringparam(struct net_device *dev, | |
228 | struct ethtool_ringparam *param) | |
229 | { | |
230 | struct mlx5e_priv *priv = netdev_priv(dev); | |
231 | ||
232 | return mlx5e_ethtool_set_ringparam(priv, param); | |
233 | } | |
234 | ||
84a09733 GT |
235 | static int mlx5e_replace_rep_vport_rx_rule(struct mlx5e_priv *priv, |
236 | struct mlx5_flow_destination *dest) | |
237 | { | |
238 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
239 | struct mlx5e_rep_priv *rpriv = priv->ppriv; | |
240 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
241 | struct mlx5_flow_handle *flow_rule; | |
242 | ||
243 | flow_rule = mlx5_eswitch_create_vport_rx_rule(esw, | |
244 | rep->vport, | |
245 | dest); | |
246 | if (IS_ERR(flow_rule)) | |
247 | return PTR_ERR(flow_rule); | |
248 | ||
249 | mlx5_del_flow_rules(rpriv->vport_rx_rule); | |
250 | rpriv->vport_rx_rule = flow_rule; | |
251 | return 0; | |
252 | } | |
253 | ||
254 | static void mlx5e_rep_get_channels(struct net_device *dev, | |
255 | struct ethtool_channels *ch) | |
256 | { | |
257 | struct mlx5e_priv *priv = netdev_priv(dev); | |
258 | ||
259 | mlx5e_ethtool_get_channels(priv, ch); | |
260 | } | |
261 | ||
262 | static int mlx5e_rep_set_channels(struct net_device *dev, | |
263 | struct ethtool_channels *ch) | |
264 | { | |
265 | struct mlx5e_priv *priv = netdev_priv(dev); | |
266 | u16 curr_channels_amount = priv->channels.params.num_channels; | |
267 | u32 new_channels_amount = ch->combined_count; | |
268 | struct mlx5_flow_destination new_dest; | |
269 | int err = 0; | |
270 | ||
271 | err = mlx5e_ethtool_set_channels(priv, ch); | |
272 | if (err) | |
273 | return err; | |
274 | ||
275 | if (curr_channels_amount == 1 && new_channels_amount > 1) { | |
276 | new_dest.type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE; | |
277 | new_dest.ft = priv->fs.ttc.ft.t; | |
278 | } else if (new_channels_amount == 1 && curr_channels_amount > 1) { | |
279 | new_dest.type = MLX5_FLOW_DESTINATION_TYPE_TIR; | |
280 | new_dest.tir_num = priv->direct_tir[0].tirn; | |
281 | } else { | |
282 | return 0; | |
283 | } | |
284 | ||
285 | err = mlx5e_replace_rep_vport_rx_rule(priv, &new_dest); | |
286 | if (err) { | |
287 | netdev_warn(priv->netdev, "Failed to update vport rx rule, when going from (%d) channels to (%d) channels\n", | |
288 | curr_channels_amount, new_channels_amount); | |
289 | return err; | |
290 | } | |
291 | ||
292 | return 0; | |
293 | } | |
294 | ||
ff9b85de OG |
295 | static int mlx5e_rep_get_coalesce(struct net_device *netdev, |
296 | struct ethtool_coalesce *coal) | |
297 | { | |
298 | struct mlx5e_priv *priv = netdev_priv(netdev); | |
299 | ||
300 | return mlx5e_ethtool_get_coalesce(priv, coal); | |
301 | } | |
302 | ||
303 | static int mlx5e_rep_set_coalesce(struct net_device *netdev, | |
304 | struct ethtool_coalesce *coal) | |
305 | { | |
306 | struct mlx5e_priv *priv = netdev_priv(netdev); | |
307 | ||
308 | return mlx5e_ethtool_set_coalesce(priv, coal); | |
309 | } | |
310 | ||
84a09733 GT |
311 | static u32 mlx5e_rep_get_rxfh_key_size(struct net_device *netdev) |
312 | { | |
313 | struct mlx5e_priv *priv = netdev_priv(netdev); | |
314 | ||
315 | return mlx5e_ethtool_get_rxfh_key_size(priv); | |
316 | } | |
317 | ||
318 | static u32 mlx5e_rep_get_rxfh_indir_size(struct net_device *netdev) | |
319 | { | |
320 | struct mlx5e_priv *priv = netdev_priv(netdev); | |
321 | ||
322 | return mlx5e_ethtool_get_rxfh_indir_size(priv); | |
323 | } | |
324 | ||
ff9b85de OG |
325 | static void mlx5e_uplink_rep_get_pauseparam(struct net_device *netdev, |
326 | struct ethtool_pauseparam *pauseparam) | |
327 | { | |
328 | struct mlx5e_priv *priv = netdev_priv(netdev); | |
329 | ||
330 | mlx5e_ethtool_get_pauseparam(priv, pauseparam); | |
331 | } | |
332 | ||
333 | static int mlx5e_uplink_rep_set_pauseparam(struct net_device *netdev, | |
334 | struct ethtool_pauseparam *pauseparam) | |
335 | { | |
336 | struct mlx5e_priv *priv = netdev_priv(netdev); | |
337 | ||
338 | return mlx5e_ethtool_set_pauseparam(priv, pauseparam); | |
339 | } | |
340 | ||
341 | static int mlx5e_uplink_rep_get_link_ksettings(struct net_device *netdev, | |
342 | struct ethtool_link_ksettings *link_ksettings) | |
343 | { | |
344 | struct mlx5e_priv *priv = netdev_priv(netdev); | |
345 | ||
346 | return mlx5e_ethtool_get_link_ksettings(priv, link_ksettings); | |
347 | } | |
348 | ||
349 | static int mlx5e_uplink_rep_set_link_ksettings(struct net_device *netdev, | |
350 | const struct ethtool_link_ksettings *link_ksettings) | |
351 | { | |
352 | struct mlx5e_priv *priv = netdev_priv(netdev); | |
353 | ||
354 | return mlx5e_ethtool_set_link_ksettings(priv, link_ksettings); | |
355 | } | |
356 | ||
357 | static const struct ethtool_ops mlx5e_vf_rep_ethtool_ops = { | |
358 | .get_drvinfo = mlx5e_rep_get_drvinfo, | |
359 | .get_link = ethtool_op_get_link, | |
360 | .get_strings = mlx5e_rep_get_strings, | |
361 | .get_sset_count = mlx5e_rep_get_sset_count, | |
362 | .get_ethtool_stats = mlx5e_rep_get_ethtool_stats, | |
363 | .get_ringparam = mlx5e_rep_get_ringparam, | |
364 | .set_ringparam = mlx5e_rep_set_ringparam, | |
365 | .get_channels = mlx5e_rep_get_channels, | |
366 | .set_channels = mlx5e_rep_set_channels, | |
367 | .get_coalesce = mlx5e_rep_get_coalesce, | |
368 | .set_coalesce = mlx5e_rep_set_coalesce, | |
369 | .get_rxfh_key_size = mlx5e_rep_get_rxfh_key_size, | |
370 | .get_rxfh_indir_size = mlx5e_rep_get_rxfh_indir_size, | |
371 | }; | |
372 | ||
373 | static const struct ethtool_ops mlx5e_uplink_rep_ethtool_ops = { | |
cb67b832 HHZ |
374 | .get_drvinfo = mlx5e_rep_get_drvinfo, |
375 | .get_link = ethtool_op_get_link, | |
376 | .get_strings = mlx5e_rep_get_strings, | |
377 | .get_sset_count = mlx5e_rep_get_sset_count, | |
378 | .get_ethtool_stats = mlx5e_rep_get_ethtool_stats, | |
f128f138 GT |
379 | .get_ringparam = mlx5e_rep_get_ringparam, |
380 | .set_ringparam = mlx5e_rep_set_ringparam, | |
84a09733 GT |
381 | .get_channels = mlx5e_rep_get_channels, |
382 | .set_channels = mlx5e_rep_set_channels, | |
ff9b85de OG |
383 | .get_coalesce = mlx5e_rep_get_coalesce, |
384 | .set_coalesce = mlx5e_rep_set_coalesce, | |
385 | .get_link_ksettings = mlx5e_uplink_rep_get_link_ksettings, | |
386 | .set_link_ksettings = mlx5e_uplink_rep_set_link_ksettings, | |
84a09733 GT |
387 | .get_rxfh_key_size = mlx5e_rep_get_rxfh_key_size, |
388 | .get_rxfh_indir_size = mlx5e_rep_get_rxfh_indir_size, | |
ff9b85de OG |
389 | .get_pauseparam = mlx5e_uplink_rep_get_pauseparam, |
390 | .set_pauseparam = mlx5e_uplink_rep_set_pauseparam, | |
cb67b832 HHZ |
391 | }; |
392 | ||
d9ee0491 | 393 | static int mlx5e_attr_get(struct net_device *dev, struct switchdev_attr *attr) |
cb67b832 HHZ |
394 | { |
395 | struct mlx5e_priv *priv = netdev_priv(dev); | |
396 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
491c37e4 RL |
397 | struct net_device *uplink_upper = NULL; |
398 | struct mlx5e_priv *uplink_priv = NULL; | |
399 | struct net_device *uplink_dev; | |
cb67b832 HHZ |
400 | |
401 | if (esw->mode == SRIOV_NONE) | |
402 | return -EOPNOTSUPP; | |
403 | ||
491c37e4 RL |
404 | uplink_dev = mlx5_eswitch_uplink_get_proto_dev(esw, REP_ETH); |
405 | if (uplink_dev) { | |
406 | uplink_upper = netdev_master_upper_dev_get(uplink_dev); | |
407 | uplink_priv = netdev_priv(uplink_dev); | |
408 | } | |
409 | ||
cb67b832 HHZ |
410 | switch (attr->id) { |
411 | case SWITCHDEV_ATTR_ID_PORT_PARENT_ID: | |
cb67b832 | 412 | attr->u.ppid.id_len = ETH_ALEN; |
7c34ec19 | 413 | if (uplink_upper && mlx5_lag_is_sriov(uplink_priv->mdev)) { |
491c37e4 RL |
414 | ether_addr_copy(attr->u.ppid.id, uplink_upper->dev_addr); |
415 | } else { | |
416 | struct mlx5e_rep_priv *rpriv = priv->ppriv; | |
417 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
418 | ||
419 | ether_addr_copy(attr->u.ppid.id, rep->hw_id); | |
420 | } | |
cb67b832 HHZ |
421 | break; |
422 | default: | |
423 | return -EOPNOTSUPP; | |
424 | } | |
425 | ||
426 | return 0; | |
427 | } | |
428 | ||
f7a68945 MB |
429 | static void mlx5e_sqs2vport_stop(struct mlx5_eswitch *esw, |
430 | struct mlx5_eswitch_rep *rep) | |
431 | { | |
2c47bf80 | 432 | struct mlx5e_rep_sq *rep_sq, *tmp; |
5ed99fb4 | 433 | struct mlx5e_rep_priv *rpriv; |
f7a68945 MB |
434 | |
435 | if (esw->mode != SRIOV_OFFLOADS) | |
436 | return; | |
437 | ||
5ed99fb4 | 438 | rpriv = mlx5e_rep_to_rep_priv(rep); |
2c47bf80 MB |
439 | list_for_each_entry_safe(rep_sq, tmp, &rpriv->vport_sqs_list, list) { |
440 | mlx5_eswitch_del_send_to_vport_rule(rep_sq->send_to_vport_rule); | |
441 | list_del(&rep_sq->list); | |
442 | kfree(rep_sq); | |
f7a68945 MB |
443 | } |
444 | } | |
445 | ||
446 | static int mlx5e_sqs2vport_start(struct mlx5_eswitch *esw, | |
447 | struct mlx5_eswitch_rep *rep, | |
5ecadff0 | 448 | u32 *sqns_array, int sqns_num) |
f7a68945 MB |
449 | { |
450 | struct mlx5_flow_handle *flow_rule; | |
5ed99fb4 | 451 | struct mlx5e_rep_priv *rpriv; |
2c47bf80 | 452 | struct mlx5e_rep_sq *rep_sq; |
f7a68945 MB |
453 | int err; |
454 | int i; | |
455 | ||
456 | if (esw->mode != SRIOV_OFFLOADS) | |
457 | return 0; | |
458 | ||
5ed99fb4 | 459 | rpriv = mlx5e_rep_to_rep_priv(rep); |
f7a68945 | 460 | for (i = 0; i < sqns_num; i++) { |
2c47bf80 MB |
461 | rep_sq = kzalloc(sizeof(*rep_sq), GFP_KERNEL); |
462 | if (!rep_sq) { | |
f7a68945 MB |
463 | err = -ENOMEM; |
464 | goto out_err; | |
465 | } | |
466 | ||
467 | /* Add re-inject rule to the PF/representor sqs */ | |
468 | flow_rule = mlx5_eswitch_add_send_to_vport_rule(esw, | |
469 | rep->vport, | |
470 | sqns_array[i]); | |
471 | if (IS_ERR(flow_rule)) { | |
472 | err = PTR_ERR(flow_rule); | |
2c47bf80 | 473 | kfree(rep_sq); |
f7a68945 MB |
474 | goto out_err; |
475 | } | |
2c47bf80 MB |
476 | rep_sq->send_to_vport_rule = flow_rule; |
477 | list_add(&rep_sq->list, &rpriv->vport_sqs_list); | |
f7a68945 MB |
478 | } |
479 | return 0; | |
480 | ||
481 | out_err: | |
482 | mlx5e_sqs2vport_stop(esw, rep); | |
483 | return err; | |
484 | } | |
485 | ||
cb67b832 | 486 | int mlx5e_add_sqs_fwd_rules(struct mlx5e_priv *priv) |
cb67b832 HHZ |
487 | { |
488 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
1d447a39 SM |
489 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
490 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
cb67b832 | 491 | struct mlx5e_channel *c; |
9008ae07 SM |
492 | int n, tc, num_sqs = 0; |
493 | int err = -ENOMEM; | |
5ecadff0 | 494 | u32 *sqs; |
cb67b832 | 495 | |
5ecadff0 | 496 | sqs = kcalloc(priv->channels.num * priv->channels.params.num_tc, sizeof(*sqs), GFP_KERNEL); |
cb67b832 | 497 | if (!sqs) |
9008ae07 | 498 | goto out; |
cb67b832 | 499 | |
ff9c852f SM |
500 | for (n = 0; n < priv->channels.num; n++) { |
501 | c = priv->channels.c[n]; | |
cb67b832 HHZ |
502 | for (tc = 0; tc < c->num_tc; tc++) |
503 | sqs[num_sqs++] = c->sq[tc].sqn; | |
504 | } | |
505 | ||
f7a68945 | 506 | err = mlx5e_sqs2vport_start(esw, rep, sqs, num_sqs); |
cb67b832 | 507 | kfree(sqs); |
9008ae07 SM |
508 | |
509 | out: | |
510 | if (err) | |
511 | netdev_warn(priv->netdev, "Failed to add SQs FWD rules %d\n", err); | |
cb67b832 HHZ |
512 | return err; |
513 | } | |
514 | ||
cb67b832 HHZ |
515 | void mlx5e_remove_sqs_fwd_rules(struct mlx5e_priv *priv) |
516 | { | |
517 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
1d447a39 SM |
518 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
519 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
cb67b832 | 520 | |
f7a68945 | 521 | mlx5e_sqs2vport_stop(esw, rep); |
cb67b832 HHZ |
522 | } |
523 | ||
f6dfb4c3 HHZ |
524 | static void mlx5e_rep_neigh_update_init_interval(struct mlx5e_rep_priv *rpriv) |
525 | { | |
526 | #if IS_ENABLED(CONFIG_IPV6) | |
423c9db2 | 527 | unsigned long ipv6_interval = NEIGH_VAR(&nd_tbl.parms, |
f6dfb4c3 HHZ |
528 | DELAY_PROBE_TIME); |
529 | #else | |
530 | unsigned long ipv6_interval = ~0UL; | |
531 | #endif | |
532 | unsigned long ipv4_interval = NEIGH_VAR(&arp_tbl.parms, | |
533 | DELAY_PROBE_TIME); | |
5ed99fb4 | 534 | struct net_device *netdev = rpriv->netdev; |
f6dfb4c3 HHZ |
535 | struct mlx5e_priv *priv = netdev_priv(netdev); |
536 | ||
537 | rpriv->neigh_update.min_interval = min_t(unsigned long, ipv6_interval, ipv4_interval); | |
538 | mlx5_fc_update_sampling_interval(priv->mdev, rpriv->neigh_update.min_interval); | |
539 | } | |
540 | ||
541 | void mlx5e_rep_queue_neigh_stats_work(struct mlx5e_priv *priv) | |
542 | { | |
543 | struct mlx5e_rep_priv *rpriv = priv->ppriv; | |
544 | struct mlx5e_neigh_update_table *neigh_update = &rpriv->neigh_update; | |
545 | ||
546 | mlx5_fc_queue_stats_work(priv->mdev, | |
547 | &neigh_update->neigh_stats_work, | |
548 | neigh_update->min_interval); | |
549 | } | |
550 | ||
551 | static void mlx5e_rep_neigh_stats_work(struct work_struct *work) | |
552 | { | |
553 | struct mlx5e_rep_priv *rpriv = container_of(work, struct mlx5e_rep_priv, | |
554 | neigh_update.neigh_stats_work.work); | |
5ed99fb4 | 555 | struct net_device *netdev = rpriv->netdev; |
f6dfb4c3 HHZ |
556 | struct mlx5e_priv *priv = netdev_priv(netdev); |
557 | struct mlx5e_neigh_hash_entry *nhe; | |
558 | ||
559 | rtnl_lock(); | |
560 | if (!list_empty(&rpriv->neigh_update.neigh_list)) | |
561 | mlx5e_rep_queue_neigh_stats_work(priv); | |
562 | ||
563 | list_for_each_entry(nhe, &rpriv->neigh_update.neigh_list, neigh_list) | |
564 | mlx5e_tc_update_neigh_used_value(nhe); | |
565 | ||
566 | rtnl_unlock(); | |
567 | } | |
568 | ||
232c0013 HHZ |
569 | static void mlx5e_rep_neigh_entry_hold(struct mlx5e_neigh_hash_entry *nhe) |
570 | { | |
571 | refcount_inc(&nhe->refcnt); | |
572 | } | |
573 | ||
574 | static void mlx5e_rep_neigh_entry_release(struct mlx5e_neigh_hash_entry *nhe) | |
575 | { | |
576 | if (refcount_dec_and_test(&nhe->refcnt)) | |
577 | kfree(nhe); | |
578 | } | |
579 | ||
580 | static void mlx5e_rep_update_flows(struct mlx5e_priv *priv, | |
581 | struct mlx5e_encap_entry *e, | |
582 | bool neigh_connected, | |
583 | unsigned char ha[ETH_ALEN]) | |
584 | { | |
585 | struct ethhdr *eth = (struct ethhdr *)e->encap_header; | |
586 | ||
587 | ASSERT_RTNL(); | |
588 | ||
61c806da OG |
589 | if ((e->flags & MLX5_ENCAP_ENTRY_VALID) && |
590 | (!neigh_connected || !ether_addr_equal(e->h_dest, ha))) | |
232c0013 HHZ |
591 | mlx5e_tc_encap_flows_del(priv, e); |
592 | ||
593 | if (neigh_connected && !(e->flags & MLX5_ENCAP_ENTRY_VALID)) { | |
594 | ether_addr_copy(e->h_dest, ha); | |
595 | ether_addr_copy(eth->h_dest, ha); | |
596 | ||
597 | mlx5e_tc_encap_flows_add(priv, e); | |
598 | } | |
599 | } | |
600 | ||
601 | static void mlx5e_rep_neigh_update(struct work_struct *work) | |
602 | { | |
603 | struct mlx5e_neigh_hash_entry *nhe = | |
604 | container_of(work, struct mlx5e_neigh_hash_entry, neigh_update_work); | |
605 | struct neighbour *n = nhe->n; | |
606 | struct mlx5e_encap_entry *e; | |
607 | unsigned char ha[ETH_ALEN]; | |
608 | struct mlx5e_priv *priv; | |
609 | bool neigh_connected; | |
610 | bool encap_connected; | |
611 | u8 nud_state, dead; | |
612 | ||
613 | rtnl_lock(); | |
614 | ||
615 | /* If these parameters are changed after we release the lock, | |
616 | * we'll receive another event letting us know about it. | |
617 | * We use this lock to avoid inconsistency between the neigh validity | |
618 | * and it's hw address. | |
619 | */ | |
620 | read_lock_bh(&n->lock); | |
621 | memcpy(ha, n->ha, ETH_ALEN); | |
622 | nud_state = n->nud_state; | |
623 | dead = n->dead; | |
624 | read_unlock_bh(&n->lock); | |
625 | ||
626 | neigh_connected = (nud_state & NUD_VALID) && !dead; | |
627 | ||
628 | list_for_each_entry(e, &nhe->encap_list, encap_list) { | |
629 | encap_connected = !!(e->flags & MLX5_ENCAP_ENTRY_VALID); | |
630 | priv = netdev_priv(e->out_dev); | |
631 | ||
632 | if (encap_connected != neigh_connected || | |
633 | !ether_addr_equal(e->h_dest, ha)) | |
634 | mlx5e_rep_update_flows(priv, e, neigh_connected, ha); | |
635 | } | |
636 | mlx5e_rep_neigh_entry_release(nhe); | |
637 | rtnl_unlock(); | |
638 | neigh_release(n); | |
639 | } | |
640 | ||
f5bc2c5d OS |
641 | static struct mlx5e_rep_indr_block_priv * |
642 | mlx5e_rep_indr_block_priv_lookup(struct mlx5e_rep_priv *rpriv, | |
643 | struct net_device *netdev) | |
644 | { | |
645 | struct mlx5e_rep_indr_block_priv *cb_priv; | |
646 | ||
647 | /* All callback list access should be protected by RTNL. */ | |
648 | ASSERT_RTNL(); | |
649 | ||
650 | list_for_each_entry(cb_priv, | |
651 | &rpriv->uplink_priv.tc_indr_block_priv_list, | |
652 | list) | |
653 | if (cb_priv->netdev == netdev) | |
654 | return cb_priv; | |
655 | ||
656 | return NULL; | |
657 | } | |
658 | ||
659 | static void mlx5e_rep_indr_clean_block_privs(struct mlx5e_rep_priv *rpriv) | |
660 | { | |
661 | struct mlx5e_rep_indr_block_priv *cb_priv, *temp; | |
662 | struct list_head *head = &rpriv->uplink_priv.tc_indr_block_priv_list; | |
663 | ||
664 | list_for_each_entry_safe(cb_priv, temp, head, list) { | |
25f2d0e7 | 665 | mlx5e_rep_indr_unregister_block(rpriv, cb_priv->netdev); |
f5bc2c5d OS |
666 | kfree(cb_priv); |
667 | } | |
668 | } | |
669 | ||
670 | static int | |
671 | mlx5e_rep_indr_offload(struct net_device *netdev, | |
672 | struct tc_cls_flower_offload *flower, | |
673 | struct mlx5e_rep_indr_block_priv *indr_priv) | |
674 | { | |
ef381359 | 675 | struct mlx5e_priv *priv = netdev_priv(indr_priv->rpriv->netdev); |
d9ee0491 OG |
676 | int flags = MLX5E_TC_EGRESS | MLX5E_TC_ESW_OFFLOAD; |
677 | int err = 0; | |
ef381359 OS |
678 | |
679 | switch (flower->command) { | |
680 | case TC_CLSFLOWER_REPLACE: | |
d9ee0491 | 681 | err = mlx5e_configure_flower(netdev, priv, flower, flags); |
ef381359 OS |
682 | break; |
683 | case TC_CLSFLOWER_DESTROY: | |
d9ee0491 | 684 | err = mlx5e_delete_flower(netdev, priv, flower, flags); |
ef381359 OS |
685 | break; |
686 | case TC_CLSFLOWER_STATS: | |
d9ee0491 | 687 | err = mlx5e_stats_flower(netdev, priv, flower, flags); |
ef381359 OS |
688 | break; |
689 | default: | |
690 | err = -EOPNOTSUPP; | |
691 | } | |
692 | ||
693 | return err; | |
f5bc2c5d OS |
694 | } |
695 | ||
696 | static int mlx5e_rep_indr_setup_block_cb(enum tc_setup_type type, | |
697 | void *type_data, void *indr_priv) | |
698 | { | |
699 | struct mlx5e_rep_indr_block_priv *priv = indr_priv; | |
700 | ||
701 | switch (type) { | |
702 | case TC_SETUP_CLSFLOWER: | |
703 | return mlx5e_rep_indr_offload(priv->netdev, type_data, priv); | |
704 | default: | |
705 | return -EOPNOTSUPP; | |
706 | } | |
707 | } | |
708 | ||
709 | static int | |
710 | mlx5e_rep_indr_setup_tc_block(struct net_device *netdev, | |
711 | struct mlx5e_rep_priv *rpriv, | |
712 | struct tc_block_offload *f) | |
713 | { | |
714 | struct mlx5e_rep_indr_block_priv *indr_priv; | |
715 | int err = 0; | |
716 | ||
717 | if (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS) | |
718 | return -EOPNOTSUPP; | |
719 | ||
720 | switch (f->command) { | |
721 | case TC_BLOCK_BIND: | |
722 | indr_priv = mlx5e_rep_indr_block_priv_lookup(rpriv, netdev); | |
723 | if (indr_priv) | |
724 | return -EEXIST; | |
725 | ||
726 | indr_priv = kmalloc(sizeof(*indr_priv), GFP_KERNEL); | |
727 | if (!indr_priv) | |
728 | return -ENOMEM; | |
729 | ||
730 | indr_priv->netdev = netdev; | |
731 | indr_priv->rpriv = rpriv; | |
732 | list_add(&indr_priv->list, | |
733 | &rpriv->uplink_priv.tc_indr_block_priv_list); | |
734 | ||
735 | err = tcf_block_cb_register(f->block, | |
736 | mlx5e_rep_indr_setup_block_cb, | |
25f2d0e7 | 737 | indr_priv, indr_priv, f->extack); |
f5bc2c5d OS |
738 | if (err) { |
739 | list_del(&indr_priv->list); | |
740 | kfree(indr_priv); | |
741 | } | |
742 | ||
743 | return err; | |
744 | case TC_BLOCK_UNBIND: | |
25f2d0e7 EB |
745 | indr_priv = mlx5e_rep_indr_block_priv_lookup(rpriv, netdev); |
746 | if (!indr_priv) | |
747 | return -ENOENT; | |
748 | ||
f5bc2c5d OS |
749 | tcf_block_cb_unregister(f->block, |
750 | mlx5e_rep_indr_setup_block_cb, | |
25f2d0e7 EB |
751 | indr_priv); |
752 | list_del(&indr_priv->list); | |
753 | kfree(indr_priv); | |
f5bc2c5d OS |
754 | |
755 | return 0; | |
756 | default: | |
757 | return -EOPNOTSUPP; | |
758 | } | |
759 | return 0; | |
760 | } | |
761 | ||
762 | static | |
763 | int mlx5e_rep_indr_setup_tc_cb(struct net_device *netdev, void *cb_priv, | |
764 | enum tc_setup_type type, void *type_data) | |
765 | { | |
766 | switch (type) { | |
767 | case TC_SETUP_BLOCK: | |
768 | return mlx5e_rep_indr_setup_tc_block(netdev, cb_priv, | |
769 | type_data); | |
770 | default: | |
771 | return -EOPNOTSUPP; | |
772 | } | |
773 | } | |
774 | ||
775 | static int mlx5e_rep_indr_register_block(struct mlx5e_rep_priv *rpriv, | |
776 | struct net_device *netdev) | |
777 | { | |
778 | int err; | |
779 | ||
780 | err = __tc_indr_block_cb_register(netdev, rpriv, | |
781 | mlx5e_rep_indr_setup_tc_cb, | |
25f2d0e7 | 782 | rpriv); |
f5bc2c5d OS |
783 | if (err) { |
784 | struct mlx5e_priv *priv = netdev_priv(rpriv->netdev); | |
785 | ||
786 | mlx5_core_err(priv->mdev, "Failed to register remote block notifier for %s err=%d\n", | |
787 | netdev_name(netdev), err); | |
788 | } | |
789 | return err; | |
790 | } | |
791 | ||
25f2d0e7 EB |
792 | static void mlx5e_rep_indr_unregister_block(struct mlx5e_rep_priv *rpriv, |
793 | struct net_device *netdev) | |
f5bc2c5d OS |
794 | { |
795 | __tc_indr_block_cb_unregister(netdev, mlx5e_rep_indr_setup_tc_cb, | |
25f2d0e7 | 796 | rpriv); |
f5bc2c5d OS |
797 | } |
798 | ||
799 | static int mlx5e_nic_rep_netdevice_event(struct notifier_block *nb, | |
800 | unsigned long event, void *ptr) | |
801 | { | |
802 | struct mlx5e_rep_priv *rpriv = container_of(nb, struct mlx5e_rep_priv, | |
803 | uplink_priv.netdevice_nb); | |
804 | struct mlx5e_priv *priv = netdev_priv(rpriv->netdev); | |
805 | struct net_device *netdev = netdev_notifier_info_to_dev(ptr); | |
806 | ||
807 | if (!mlx5e_tc_tun_device_to_offload(priv, netdev)) | |
808 | return NOTIFY_OK; | |
809 | ||
810 | switch (event) { | |
811 | case NETDEV_REGISTER: | |
812 | mlx5e_rep_indr_register_block(rpriv, netdev); | |
813 | break; | |
814 | case NETDEV_UNREGISTER: | |
25f2d0e7 | 815 | mlx5e_rep_indr_unregister_block(rpriv, netdev); |
f5bc2c5d OS |
816 | break; |
817 | } | |
818 | return NOTIFY_OK; | |
819 | } | |
820 | ||
232c0013 HHZ |
821 | static struct mlx5e_neigh_hash_entry * |
822 | mlx5e_rep_neigh_entry_lookup(struct mlx5e_priv *priv, | |
823 | struct mlx5e_neigh *m_neigh); | |
824 | ||
825 | static int mlx5e_rep_netevent_event(struct notifier_block *nb, | |
826 | unsigned long event, void *ptr) | |
827 | { | |
828 | struct mlx5e_rep_priv *rpriv = container_of(nb, struct mlx5e_rep_priv, | |
829 | neigh_update.netevent_nb); | |
830 | struct mlx5e_neigh_update_table *neigh_update = &rpriv->neigh_update; | |
5ed99fb4 | 831 | struct net_device *netdev = rpriv->netdev; |
232c0013 HHZ |
832 | struct mlx5e_priv *priv = netdev_priv(netdev); |
833 | struct mlx5e_neigh_hash_entry *nhe = NULL; | |
834 | struct mlx5e_neigh m_neigh = {}; | |
a2fa1fe5 | 835 | struct neigh_parms *p; |
232c0013 | 836 | struct neighbour *n; |
a2fa1fe5 | 837 | bool found = false; |
232c0013 HHZ |
838 | |
839 | switch (event) { | |
840 | case NETEVENT_NEIGH_UPDATE: | |
841 | n = ptr; | |
842 | #if IS_ENABLED(CONFIG_IPV6) | |
423c9db2 | 843 | if (n->tbl != &nd_tbl && n->tbl != &arp_tbl) |
232c0013 HHZ |
844 | #else |
845 | if (n->tbl != &arp_tbl) | |
846 | #endif | |
847 | return NOTIFY_DONE; | |
848 | ||
849 | m_neigh.dev = n->dev; | |
f6dfb4c3 | 850 | m_neigh.family = n->ops->family; |
232c0013 HHZ |
851 | memcpy(&m_neigh.dst_ip, n->primary_key, n->tbl->key_len); |
852 | ||
853 | /* We are in atomic context and can't take RTNL mutex, so use | |
854 | * spin_lock_bh to lookup the neigh table. bh is used since | |
855 | * netevent can be called from a softirq context. | |
856 | */ | |
857 | spin_lock_bh(&neigh_update->encap_lock); | |
858 | nhe = mlx5e_rep_neigh_entry_lookup(priv, &m_neigh); | |
859 | if (!nhe) { | |
860 | spin_unlock_bh(&neigh_update->encap_lock); | |
861 | return NOTIFY_DONE; | |
862 | } | |
863 | ||
864 | /* This assignment is valid as long as the the neigh reference | |
865 | * is taken | |
866 | */ | |
867 | nhe->n = n; | |
868 | ||
869 | /* Take a reference to ensure the neighbour and mlx5 encap | |
870 | * entry won't be destructed until we drop the reference in | |
871 | * delayed work. | |
872 | */ | |
873 | neigh_hold(n); | |
874 | mlx5e_rep_neigh_entry_hold(nhe); | |
875 | ||
876 | if (!queue_work(priv->wq, &nhe->neigh_update_work)) { | |
877 | mlx5e_rep_neigh_entry_release(nhe); | |
878 | neigh_release(n); | |
879 | } | |
880 | spin_unlock_bh(&neigh_update->encap_lock); | |
881 | break; | |
a2fa1fe5 HHZ |
882 | |
883 | case NETEVENT_DELAY_PROBE_TIME_UPDATE: | |
884 | p = ptr; | |
885 | ||
886 | /* We check the device is present since we don't care about | |
887 | * changes in the default table, we only care about changes | |
888 | * done per device delay prob time parameter. | |
889 | */ | |
890 | #if IS_ENABLED(CONFIG_IPV6) | |
423c9db2 | 891 | if (!p->dev || (p->tbl != &nd_tbl && p->tbl != &arp_tbl)) |
a2fa1fe5 HHZ |
892 | #else |
893 | if (!p->dev || p->tbl != &arp_tbl) | |
894 | #endif | |
895 | return NOTIFY_DONE; | |
896 | ||
897 | /* We are in atomic context and can't take RTNL mutex, | |
898 | * so use spin_lock_bh to walk the neigh list and look for | |
899 | * the relevant device. bh is used since netevent can be | |
900 | * called from a softirq context. | |
901 | */ | |
902 | spin_lock_bh(&neigh_update->encap_lock); | |
903 | list_for_each_entry(nhe, &neigh_update->neigh_list, neigh_list) { | |
904 | if (p->dev == nhe->m_neigh.dev) { | |
905 | found = true; | |
906 | break; | |
907 | } | |
908 | } | |
909 | spin_unlock_bh(&neigh_update->encap_lock); | |
910 | if (!found) | |
911 | return NOTIFY_DONE; | |
912 | ||
913 | neigh_update->min_interval = min_t(unsigned long, | |
914 | NEIGH_VAR(p, DELAY_PROBE_TIME), | |
915 | neigh_update->min_interval); | |
916 | mlx5_fc_update_sampling_interval(priv->mdev, | |
917 | neigh_update->min_interval); | |
918 | break; | |
232c0013 HHZ |
919 | } |
920 | return NOTIFY_DONE; | |
921 | } | |
922 | ||
37b498ff HHZ |
923 | static const struct rhashtable_params mlx5e_neigh_ht_params = { |
924 | .head_offset = offsetof(struct mlx5e_neigh_hash_entry, rhash_node), | |
925 | .key_offset = offsetof(struct mlx5e_neigh_hash_entry, m_neigh), | |
926 | .key_len = sizeof(struct mlx5e_neigh), | |
927 | .automatic_shrinking = true, | |
928 | }; | |
929 | ||
930 | static int mlx5e_rep_neigh_init(struct mlx5e_rep_priv *rpriv) | |
931 | { | |
932 | struct mlx5e_neigh_update_table *neigh_update = &rpriv->neigh_update; | |
232c0013 HHZ |
933 | int err; |
934 | ||
935 | err = rhashtable_init(&neigh_update->neigh_ht, &mlx5e_neigh_ht_params); | |
936 | if (err) | |
937 | return err; | |
37b498ff HHZ |
938 | |
939 | INIT_LIST_HEAD(&neigh_update->neigh_list); | |
232c0013 | 940 | spin_lock_init(&neigh_update->encap_lock); |
f6dfb4c3 HHZ |
941 | INIT_DELAYED_WORK(&neigh_update->neigh_stats_work, |
942 | mlx5e_rep_neigh_stats_work); | |
943 | mlx5e_rep_neigh_update_init_interval(rpriv); | |
232c0013 HHZ |
944 | |
945 | rpriv->neigh_update.netevent_nb.notifier_call = mlx5e_rep_netevent_event; | |
946 | err = register_netevent_notifier(&rpriv->neigh_update.netevent_nb); | |
947 | if (err) | |
948 | goto out_err; | |
949 | return 0; | |
950 | ||
951 | out_err: | |
952 | rhashtable_destroy(&neigh_update->neigh_ht); | |
953 | return err; | |
37b498ff HHZ |
954 | } |
955 | ||
956 | static void mlx5e_rep_neigh_cleanup(struct mlx5e_rep_priv *rpriv) | |
957 | { | |
958 | struct mlx5e_neigh_update_table *neigh_update = &rpriv->neigh_update; | |
5ed99fb4 | 959 | struct mlx5e_priv *priv = netdev_priv(rpriv->netdev); |
232c0013 HHZ |
960 | |
961 | unregister_netevent_notifier(&neigh_update->netevent_nb); | |
962 | ||
963 | flush_workqueue(priv->wq); /* flush neigh update works */ | |
37b498ff | 964 | |
f6dfb4c3 HHZ |
965 | cancel_delayed_work_sync(&rpriv->neigh_update.neigh_stats_work); |
966 | ||
37b498ff HHZ |
967 | rhashtable_destroy(&neigh_update->neigh_ht); |
968 | } | |
969 | ||
970 | static int mlx5e_rep_neigh_entry_insert(struct mlx5e_priv *priv, | |
971 | struct mlx5e_neigh_hash_entry *nhe) | |
972 | { | |
973 | struct mlx5e_rep_priv *rpriv = priv->ppriv; | |
974 | int err; | |
975 | ||
976 | err = rhashtable_insert_fast(&rpriv->neigh_update.neigh_ht, | |
977 | &nhe->rhash_node, | |
978 | mlx5e_neigh_ht_params); | |
979 | if (err) | |
980 | return err; | |
981 | ||
982 | list_add(&nhe->neigh_list, &rpriv->neigh_update.neigh_list); | |
983 | ||
984 | return err; | |
985 | } | |
986 | ||
987 | static void mlx5e_rep_neigh_entry_remove(struct mlx5e_priv *priv, | |
988 | struct mlx5e_neigh_hash_entry *nhe) | |
989 | { | |
990 | struct mlx5e_rep_priv *rpriv = priv->ppriv; | |
991 | ||
232c0013 HHZ |
992 | spin_lock_bh(&rpriv->neigh_update.encap_lock); |
993 | ||
37b498ff HHZ |
994 | list_del(&nhe->neigh_list); |
995 | ||
996 | rhashtable_remove_fast(&rpriv->neigh_update.neigh_ht, | |
997 | &nhe->rhash_node, | |
998 | mlx5e_neigh_ht_params); | |
232c0013 | 999 | spin_unlock_bh(&rpriv->neigh_update.encap_lock); |
37b498ff HHZ |
1000 | } |
1001 | ||
232c0013 HHZ |
1002 | /* This function must only be called under RTNL lock or under the |
1003 | * representor's encap_lock in case RTNL mutex can't be held. | |
1004 | */ | |
37b498ff HHZ |
1005 | static struct mlx5e_neigh_hash_entry * |
1006 | mlx5e_rep_neigh_entry_lookup(struct mlx5e_priv *priv, | |
1007 | struct mlx5e_neigh *m_neigh) | |
1008 | { | |
1009 | struct mlx5e_rep_priv *rpriv = priv->ppriv; | |
1010 | struct mlx5e_neigh_update_table *neigh_update = &rpriv->neigh_update; | |
1011 | ||
1012 | return rhashtable_lookup_fast(&neigh_update->neigh_ht, m_neigh, | |
1013 | mlx5e_neigh_ht_params); | |
1014 | } | |
1015 | ||
232c0013 HHZ |
1016 | static int mlx5e_rep_neigh_entry_create(struct mlx5e_priv *priv, |
1017 | struct mlx5e_encap_entry *e, | |
1018 | struct mlx5e_neigh_hash_entry **nhe) | |
1019 | { | |
1020 | int err; | |
1021 | ||
1022 | *nhe = kzalloc(sizeof(**nhe), GFP_KERNEL); | |
1023 | if (!*nhe) | |
1024 | return -ENOMEM; | |
1025 | ||
1026 | memcpy(&(*nhe)->m_neigh, &e->m_neigh, sizeof(e->m_neigh)); | |
1027 | INIT_WORK(&(*nhe)->neigh_update_work, mlx5e_rep_neigh_update); | |
1028 | INIT_LIST_HEAD(&(*nhe)->encap_list); | |
1029 | refcount_set(&(*nhe)->refcnt, 1); | |
1030 | ||
1031 | err = mlx5e_rep_neigh_entry_insert(priv, *nhe); | |
1032 | if (err) | |
1033 | goto out_free; | |
1034 | return 0; | |
1035 | ||
1036 | out_free: | |
1037 | kfree(*nhe); | |
1038 | return err; | |
1039 | } | |
1040 | ||
1041 | static void mlx5e_rep_neigh_entry_destroy(struct mlx5e_priv *priv, | |
1042 | struct mlx5e_neigh_hash_entry *nhe) | |
1043 | { | |
1044 | /* The neigh hash entry must be removed from the hash table regardless | |
1045 | * of the reference count value, so it won't be found by the next | |
1046 | * neigh notification call. The neigh hash entry reference count is | |
1047 | * incremented only during creation and neigh notification calls and | |
1048 | * protects from freeing the nhe struct. | |
1049 | */ | |
1050 | mlx5e_rep_neigh_entry_remove(priv, nhe); | |
1051 | mlx5e_rep_neigh_entry_release(nhe); | |
1052 | } | |
1053 | ||
1054 | int mlx5e_rep_encap_entry_attach(struct mlx5e_priv *priv, | |
1055 | struct mlx5e_encap_entry *e) | |
1056 | { | |
1057 | struct mlx5e_neigh_hash_entry *nhe; | |
1058 | int err; | |
1059 | ||
1060 | nhe = mlx5e_rep_neigh_entry_lookup(priv, &e->m_neigh); | |
1061 | if (!nhe) { | |
1062 | err = mlx5e_rep_neigh_entry_create(priv, e, &nhe); | |
1063 | if (err) | |
1064 | return err; | |
1065 | } | |
1066 | list_add(&e->encap_list, &nhe->encap_list); | |
1067 | return 0; | |
1068 | } | |
1069 | ||
1070 | void mlx5e_rep_encap_entry_detach(struct mlx5e_priv *priv, | |
1071 | struct mlx5e_encap_entry *e) | |
1072 | { | |
1073 | struct mlx5e_neigh_hash_entry *nhe; | |
1074 | ||
1075 | list_del(&e->encap_list); | |
1076 | nhe = mlx5e_rep_neigh_entry_lookup(priv, &e->m_neigh); | |
1077 | ||
1078 | if (list_empty(&nhe->encap_list)) | |
1079 | mlx5e_rep_neigh_entry_destroy(priv, nhe); | |
1080 | } | |
1081 | ||
d9ee0491 | 1082 | static int mlx5e_vf_rep_open(struct net_device *dev) |
20a1ea67 OG |
1083 | { |
1084 | struct mlx5e_priv *priv = netdev_priv(dev); | |
1d447a39 SM |
1085 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
1086 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
20a1ea67 OG |
1087 | int err; |
1088 | ||
63bfd399 EBE |
1089 | mutex_lock(&priv->state_lock); |
1090 | err = mlx5e_open_locked(dev); | |
20a1ea67 | 1091 | if (err) |
63bfd399 | 1092 | goto unlock; |
20a1ea67 | 1093 | |
84c9c8f2 | 1094 | if (!mlx5_modify_vport_admin_state(priv->mdev, |
cc9c82a8 EBE |
1095 | MLX5_VPORT_STATE_OP_MOD_ESW_VPORT, |
1096 | rep->vport, MLX5_VPORT_ADMIN_STATE_UP)) | |
20a1ea67 OG |
1097 | netif_carrier_on(dev); |
1098 | ||
63bfd399 EBE |
1099 | unlock: |
1100 | mutex_unlock(&priv->state_lock); | |
1101 | return err; | |
20a1ea67 OG |
1102 | } |
1103 | ||
d9ee0491 | 1104 | static int mlx5e_vf_rep_close(struct net_device *dev) |
20a1ea67 OG |
1105 | { |
1106 | struct mlx5e_priv *priv = netdev_priv(dev); | |
1d447a39 SM |
1107 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
1108 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
63bfd399 | 1109 | int ret; |
20a1ea67 | 1110 | |
63bfd399 | 1111 | mutex_lock(&priv->state_lock); |
84c9c8f2 | 1112 | mlx5_modify_vport_admin_state(priv->mdev, |
cc9c82a8 EBE |
1113 | MLX5_VPORT_STATE_OP_MOD_ESW_VPORT, |
1114 | rep->vport, MLX5_VPORT_ADMIN_STATE_DOWN); | |
63bfd399 EBE |
1115 | ret = mlx5e_close_locked(dev); |
1116 | mutex_unlock(&priv->state_lock); | |
1117 | return ret; | |
20a1ea67 OG |
1118 | } |
1119 | ||
cb67b832 HHZ |
1120 | static int mlx5e_rep_get_phys_port_name(struct net_device *dev, |
1121 | char *buf, size_t len) | |
1122 | { | |
1123 | struct mlx5e_priv *priv = netdev_priv(dev); | |
1d447a39 SM |
1124 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
1125 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
cb67b832 HHZ |
1126 | int ret; |
1127 | ||
1128 | ret = snprintf(buf, len, "%d", rep->vport - 1); | |
1129 | if (ret >= len) | |
1130 | return -EOPNOTSUPP; | |
1131 | ||
1132 | return 0; | |
1133 | } | |
1134 | ||
de4784ca | 1135 | static int |
855afa09 | 1136 | mlx5e_rep_setup_tc_cls_flower(struct mlx5e_priv *priv, |
60bd4af8 | 1137 | struct tc_cls_flower_offload *cls_flower, int flags) |
d957b4e3 | 1138 | { |
8c818c27 JP |
1139 | switch (cls_flower->command) { |
1140 | case TC_CLSFLOWER_REPLACE: | |
71d82d2a OS |
1141 | return mlx5e_configure_flower(priv->netdev, priv, cls_flower, |
1142 | flags); | |
8c818c27 | 1143 | case TC_CLSFLOWER_DESTROY: |
71d82d2a OS |
1144 | return mlx5e_delete_flower(priv->netdev, priv, cls_flower, |
1145 | flags); | |
8c818c27 | 1146 | case TC_CLSFLOWER_STATS: |
71d82d2a OS |
1147 | return mlx5e_stats_flower(priv->netdev, priv, cls_flower, |
1148 | flags); | |
60bd4af8 OG |
1149 | default: |
1150 | return -EOPNOTSUPP; | |
1151 | } | |
1152 | } | |
1153 | ||
855afa09 JP |
1154 | static int mlx5e_rep_setup_tc_cb(enum tc_setup_type type, void *type_data, |
1155 | void *cb_priv) | |
1156 | { | |
1157 | struct mlx5e_priv *priv = cb_priv; | |
1158 | ||
1159 | switch (type) { | |
1160 | case TC_SETUP_CLSFLOWER: | |
d9ee0491 OG |
1161 | return mlx5e_rep_setup_tc_cls_flower(priv, type_data, MLX5E_TC_INGRESS | |
1162 | MLX5E_TC_ESW_OFFLOAD); | |
855afa09 JP |
1163 | default: |
1164 | return -EOPNOTSUPP; | |
1165 | } | |
1166 | } | |
1167 | ||
1168 | static int mlx5e_rep_setup_tc_block(struct net_device *dev, | |
1169 | struct tc_block_offload *f) | |
1170 | { | |
1171 | struct mlx5e_priv *priv = netdev_priv(dev); | |
1172 | ||
1173 | if (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS) | |
1174 | return -EOPNOTSUPP; | |
1175 | ||
1176 | switch (f->command) { | |
1177 | case TC_BLOCK_BIND: | |
1178 | return tcf_block_cb_register(f->block, mlx5e_rep_setup_tc_cb, | |
60513bd8 | 1179 | priv, priv, f->extack); |
855afa09 JP |
1180 | case TC_BLOCK_UNBIND: |
1181 | tcf_block_cb_unregister(f->block, mlx5e_rep_setup_tc_cb, priv); | |
1182 | return 0; | |
1183 | default: | |
1184 | return -EOPNOTSUPP; | |
1185 | } | |
1186 | } | |
1187 | ||
8c818c27 | 1188 | static int mlx5e_rep_setup_tc(struct net_device *dev, enum tc_setup_type type, |
de4784ca | 1189 | void *type_data) |
8c818c27 | 1190 | { |
2572ac53 | 1191 | switch (type) { |
855afa09 JP |
1192 | case TC_SETUP_BLOCK: |
1193 | return mlx5e_rep_setup_tc_block(dev, type_data); | |
d957b4e3 OG |
1194 | default: |
1195 | return -EOPNOTSUPP; | |
1196 | } | |
1197 | } | |
1198 | ||
370bad0f OG |
1199 | bool mlx5e_is_uplink_rep(struct mlx5e_priv *priv) |
1200 | { | |
1d447a39 SM |
1201 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
1202 | struct mlx5_eswitch_rep *rep; | |
1203 | ||
733d3e54 | 1204 | if (!MLX5_ESWITCH_MANAGER(priv->mdev)) |
1d447a39 | 1205 | return false; |
370bad0f | 1206 | |
d9ee0491 OG |
1207 | if (!rpriv) /* non vport rep mlx5e instances don't use this field */ |
1208 | return false; | |
370bad0f | 1209 | |
d9ee0491 OG |
1210 | rep = rpriv->rep; |
1211 | return (rep->vport == FDB_UPLINK_VPORT); | |
370bad0f OG |
1212 | } |
1213 | ||
13e509a4 | 1214 | static bool mlx5e_rep_has_offload_stats(const struct net_device *dev, int attr_id) |
370bad0f | 1215 | { |
370bad0f OG |
1216 | switch (attr_id) { |
1217 | case IFLA_OFFLOAD_XSTATS_CPU_HIT: | |
370bad0f OG |
1218 | return true; |
1219 | } | |
1220 | ||
1221 | return false; | |
1222 | } | |
1223 | ||
1224 | static int | |
1225 | mlx5e_get_sw_stats64(const struct net_device *dev, | |
1226 | struct rtnl_link_stats64 *stats) | |
1227 | { | |
1228 | struct mlx5e_priv *priv = netdev_priv(dev); | |
1229 | struct mlx5e_sw_stats *sstats = &priv->stats.sw; | |
1230 | ||
868a01a2 SL |
1231 | mlx5e_rep_update_sw_counters(priv); |
1232 | ||
370bad0f OG |
1233 | stats->rx_packets = sstats->rx_packets; |
1234 | stats->rx_bytes = sstats->rx_bytes; | |
1235 | stats->tx_packets = sstats->tx_packets; | |
1236 | stats->tx_bytes = sstats->tx_bytes; | |
1237 | ||
1238 | stats->tx_dropped = sstats->tx_queue_dropped; | |
1239 | ||
1240 | return 0; | |
1241 | } | |
1242 | ||
13e509a4 OG |
1243 | static int mlx5e_rep_get_offload_stats(int attr_id, const struct net_device *dev, |
1244 | void *sp) | |
370bad0f OG |
1245 | { |
1246 | switch (attr_id) { | |
1247 | case IFLA_OFFLOAD_XSTATS_CPU_HIT: | |
1248 | return mlx5e_get_sw_stats64(dev, sp); | |
1249 | } | |
1250 | ||
1251 | return -EINVAL; | |
1252 | } | |
1253 | ||
bc1f4470 | 1254 | static void |
d9ee0491 | 1255 | mlx5e_vf_rep_get_stats(struct net_device *dev, struct rtnl_link_stats64 *stats) |
370bad0f OG |
1256 | { |
1257 | struct mlx5e_priv *priv = netdev_priv(dev); | |
1258 | ||
ed56c519 | 1259 | /* update HW stats in background for next time */ |
cdeef2b1 | 1260 | mlx5e_queue_update_stats(priv); |
370bad0f | 1261 | memcpy(stats, &priv->stats.vf_vport, sizeof(*stats)); |
370bad0f OG |
1262 | } |
1263 | ||
d9ee0491 OG |
1264 | static int mlx5e_vf_rep_change_mtu(struct net_device *netdev, int new_mtu) |
1265 | { | |
1266 | return mlx5e_change_mtu(netdev, new_mtu, NULL); | |
1267 | } | |
1268 | ||
b36cdb42 | 1269 | static int mlx5e_uplink_rep_change_mtu(struct net_device *netdev, int new_mtu) |
d9ee0491 | 1270 | { |
b36cdb42 | 1271 | return mlx5e_change_mtu(netdev, new_mtu, mlx5e_set_dev_port_mtu); |
d9ee0491 OG |
1272 | } |
1273 | ||
b36cdb42 | 1274 | static int mlx5e_uplink_rep_set_mac(struct net_device *netdev, void *addr) |
d9ee0491 | 1275 | { |
b36cdb42 OG |
1276 | struct sockaddr *saddr = addr; |
1277 | ||
1278 | if (!is_valid_ether_addr(saddr->sa_data)) | |
1279 | return -EADDRNOTAVAIL; | |
1280 | ||
1281 | ether_addr_copy(netdev->dev_addr, saddr->sa_data); | |
1282 | return 0; | |
d9ee0491 OG |
1283 | } |
1284 | ||
cb67b832 HHZ |
1285 | static const struct switchdev_ops mlx5e_rep_switchdev_ops = { |
1286 | .switchdev_port_attr_get = mlx5e_attr_get, | |
1287 | }; | |
1288 | ||
d9ee0491 OG |
1289 | static const struct net_device_ops mlx5e_netdev_ops_vf_rep = { |
1290 | .ndo_open = mlx5e_vf_rep_open, | |
1291 | .ndo_stop = mlx5e_vf_rep_close, | |
1292 | .ndo_start_xmit = mlx5e_xmit, | |
1293 | .ndo_get_phys_port_name = mlx5e_rep_get_phys_port_name, | |
1294 | .ndo_setup_tc = mlx5e_rep_setup_tc, | |
1295 | .ndo_get_stats64 = mlx5e_vf_rep_get_stats, | |
13e509a4 OG |
1296 | .ndo_has_offload_stats = mlx5e_rep_has_offload_stats, |
1297 | .ndo_get_offload_stats = mlx5e_rep_get_offload_stats, | |
d9ee0491 OG |
1298 | .ndo_change_mtu = mlx5e_vf_rep_change_mtu, |
1299 | }; | |
250a42b6 | 1300 | |
d9ee0491 | 1301 | static const struct net_device_ops mlx5e_netdev_ops_uplink_rep = { |
b36cdb42 | 1302 | .ndo_open = mlx5e_open, |
d9ee0491 | 1303 | .ndo_stop = mlx5e_close, |
cb67b832 | 1304 | .ndo_start_xmit = mlx5e_xmit, |
b36cdb42 | 1305 | .ndo_set_mac_address = mlx5e_uplink_rep_set_mac, |
cb67b832 | 1306 | .ndo_get_phys_port_name = mlx5e_rep_get_phys_port_name, |
8c818c27 | 1307 | .ndo_setup_tc = mlx5e_rep_setup_tc, |
d9ee0491 | 1308 | .ndo_get_stats64 = mlx5e_get_stats, |
13e509a4 OG |
1309 | .ndo_has_offload_stats = mlx5e_rep_has_offload_stats, |
1310 | .ndo_get_offload_stats = mlx5e_rep_get_offload_stats, | |
d9ee0491 | 1311 | .ndo_change_mtu = mlx5e_uplink_rep_change_mtu, |
073caf50 OG |
1312 | .ndo_udp_tunnel_add = mlx5e_add_vxlan_port, |
1313 | .ndo_udp_tunnel_del = mlx5e_del_vxlan_port, | |
1314 | .ndo_features_check = mlx5e_features_check, | |
1315 | .ndo_set_vf_mac = mlx5e_set_vf_mac, | |
1316 | .ndo_set_vf_rate = mlx5e_set_vf_rate, | |
1317 | .ndo_get_vf_config = mlx5e_get_vf_config, | |
1318 | .ndo_get_vf_stats = mlx5e_get_vf_stats, | |
cb67b832 HHZ |
1319 | }; |
1320 | ||
a0646c88 EB |
1321 | bool mlx5e_eswitch_rep(struct net_device *netdev) |
1322 | { | |
1323 | if (netdev->netdev_ops == &mlx5e_netdev_ops_vf_rep || | |
1324 | netdev->netdev_ops == &mlx5e_netdev_ops_uplink_rep) | |
1325 | return true; | |
1326 | ||
1327 | return false; | |
1328 | } | |
1329 | ||
025380b2 | 1330 | static void mlx5e_build_rep_params(struct net_device *netdev) |
cb67b832 | 1331 | { |
025380b2 | 1332 | struct mlx5e_priv *priv = netdev_priv(netdev); |
d9ee0491 OG |
1333 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
1334 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
025380b2 OG |
1335 | struct mlx5_core_dev *mdev = priv->mdev; |
1336 | struct mlx5e_params *params; | |
1337 | ||
cb67b832 HHZ |
1338 | u8 cq_period_mode = MLX5_CAP_GEN(mdev, cq_period_start_from_cqe) ? |
1339 | MLX5_CQ_PERIOD_MODE_START_FROM_CQE : | |
1340 | MLX5_CQ_PERIOD_MODE_START_FROM_EQE; | |
1341 | ||
025380b2 | 1342 | params = &priv->channels.params; |
472a1e44 | 1343 | params->hard_mtu = MLX5E_ETH_HARD_MTU; |
025380b2 | 1344 | params->sw_mtu = netdev->mtu; |
d9ee0491 OG |
1345 | |
1346 | /* SQ */ | |
1347 | if (rep->vport == FDB_UPLINK_VPORT) | |
1348 | params->log_sq_size = MLX5E_PARAMS_DEFAULT_LOG_SQ_SIZE; | |
1349 | else | |
5d1f7354 | 1350 | params->log_sq_size = MLX5E_REP_PARAMS_DEF_LOG_SQ_SIZE; |
cb67b832 | 1351 | |
749359f4 GT |
1352 | /* RQ */ |
1353 | mlx5e_build_rq_params(mdev, params); | |
1354 | ||
1355 | /* CQ moderation params */ | |
9a317425 | 1356 | params->rx_dim_enabled = MLX5_CAP_GEN(mdev, cq_moderation); |
6a9764ef | 1357 | mlx5e_set_rx_cq_mode_params(params, cq_period_mode); |
cb67b832 | 1358 | |
6a9764ef | 1359 | params->num_tc = 1; |
5f195c2c CM |
1360 | |
1361 | mlx5_query_min_inline(mdev, ¶ms->tx_min_inline_mode); | |
84a09733 GT |
1362 | |
1363 | /* RSS */ | |
025380b2 | 1364 | mlx5e_build_rss_params(&priv->rss_params, params->num_channels); |
cb67b832 HHZ |
1365 | } |
1366 | ||
1367 | static void mlx5e_build_rep_netdev(struct net_device *netdev) | |
1368 | { | |
250a42b6 | 1369 | struct mlx5e_priv *priv = netdev_priv(netdev); |
d9ee0491 OG |
1370 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
1371 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
250a42b6 | 1372 | struct mlx5_core_dev *mdev = priv->mdev; |
250a42b6 | 1373 | |
d9ee0491 OG |
1374 | if (rep->vport == FDB_UPLINK_VPORT) { |
1375 | SET_NETDEV_DEV(netdev, &priv->mdev->pdev->dev); | |
1376 | netdev->netdev_ops = &mlx5e_netdev_ops_uplink_rep; | |
1377 | /* we want a persistent mac for the uplink rep */ | |
1378 | mlx5_query_nic_vport_mac_address(mdev, 0, netdev->dev_addr); | |
ff9b85de | 1379 | netdev->ethtool_ops = &mlx5e_uplink_rep_ethtool_ops; |
b36cdb42 OG |
1380 | #ifdef CONFIG_MLX5_CORE_EN_DCB |
1381 | if (MLX5_CAP_GEN(mdev, qos)) | |
1382 | netdev->dcbnl_ops = &mlx5e_dcbnl_ops; | |
1383 | #endif | |
d9ee0491 OG |
1384 | } else { |
1385 | netdev->netdev_ops = &mlx5e_netdev_ops_vf_rep; | |
1386 | eth_hw_addr_random(netdev); | |
ff9b85de | 1387 | netdev->ethtool_ops = &mlx5e_vf_rep_ethtool_ops; |
d9ee0491 | 1388 | } |
cb67b832 HHZ |
1389 | |
1390 | netdev->watchdog_timeo = 15 * HZ; | |
1391 | ||
cb67b832 | 1392 | |
cb67b832 | 1393 | netdev->switchdev_ops = &mlx5e_rep_switchdev_ops; |
cb67b832 | 1394 | |
1ee4457c | 1395 | netdev->features |= NETIF_F_HW_TC | NETIF_F_NETNS_LOCAL; |
d957b4e3 | 1396 | netdev->hw_features |= NETIF_F_HW_TC; |
cb67b832 | 1397 | |
dabeb3b0 GT |
1398 | netdev->hw_features |= NETIF_F_SG; |
1399 | netdev->hw_features |= NETIF_F_IP_CSUM; | |
1400 | netdev->hw_features |= NETIF_F_IPV6_CSUM; | |
1401 | netdev->hw_features |= NETIF_F_GRO; | |
1402 | netdev->hw_features |= NETIF_F_TSO; | |
1403 | netdev->hw_features |= NETIF_F_TSO6; | |
1404 | netdev->hw_features |= NETIF_F_RXCSUM; | |
1405 | ||
1ee4457c OG |
1406 | if (rep->vport != FDB_UPLINK_VPORT) |
1407 | netdev->features |= NETIF_F_VLAN_CHALLENGED; | |
1408 | ||
dabeb3b0 | 1409 | netdev->features |= netdev->hw_features; |
cb67b832 HHZ |
1410 | } |
1411 | ||
182570b2 FD |
1412 | static int mlx5e_init_rep(struct mlx5_core_dev *mdev, |
1413 | struct net_device *netdev, | |
1414 | const struct mlx5e_profile *profile, | |
1415 | void *ppriv) | |
cb67b832 | 1416 | { |
6a9764ef | 1417 | struct mlx5e_priv *priv = netdev_priv(netdev); |
182570b2 | 1418 | int err; |
6a9764ef | 1419 | |
519a0bf5 | 1420 | err = mlx5e_netdev_init(netdev, priv, mdev, profile, ppriv); |
182570b2 FD |
1421 | if (err) |
1422 | return err; | |
6a9764ef | 1423 | |
8956f001 | 1424 | priv->channels.params.num_channels = MLX5E_REP_PARAMS_DEF_NUM_CHANNELS; |
c139dbfd | 1425 | |
025380b2 | 1426 | mlx5e_build_rep_params(netdev); |
cb67b832 | 1427 | mlx5e_build_rep_netdev(netdev); |
237f258c FD |
1428 | |
1429 | mlx5e_timestamp_init(priv); | |
182570b2 FD |
1430 | |
1431 | return 0; | |
1432 | } | |
1433 | ||
1434 | static void mlx5e_cleanup_rep(struct mlx5e_priv *priv) | |
1435 | { | |
1436 | mlx5e_netdev_cleanup(priv->netdev, priv); | |
cb67b832 HHZ |
1437 | } |
1438 | ||
84a09733 GT |
1439 | static int mlx5e_create_rep_ttc_table(struct mlx5e_priv *priv) |
1440 | { | |
1441 | struct ttc_params ttc_params = {}; | |
1442 | int tt, err; | |
1443 | ||
1444 | priv->fs.ns = mlx5_get_flow_namespace(priv->mdev, | |
1445 | MLX5_FLOW_NAMESPACE_KERNEL); | |
1446 | ||
1447 | /* The inner_ttc in the ttc params is intentionally not set */ | |
1448 | ttc_params.any_tt_tirn = priv->direct_tir[0].tirn; | |
1449 | mlx5e_set_ttc_ft_params(&ttc_params); | |
1450 | for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) | |
1451 | ttc_params.indir_tirn[tt] = priv->indir_tir[tt].tirn; | |
1452 | ||
1453 | err = mlx5e_create_ttc_table(priv, &ttc_params, &priv->fs.ttc); | |
1454 | if (err) { | |
1455 | netdev_err(priv->netdev, "Failed to create rep ttc table, err=%d\n", err); | |
1456 | return err; | |
1457 | } | |
1458 | return 0; | |
1459 | } | |
1460 | ||
092297e0 | 1461 | static int mlx5e_create_rep_vport_rx_rule(struct mlx5e_priv *priv) |
cb67b832 HHZ |
1462 | { |
1463 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
1d447a39 SM |
1464 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
1465 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
74491de9 | 1466 | struct mlx5_flow_handle *flow_rule; |
c966f7d5 | 1467 | struct mlx5_flow_destination dest; |
092297e0 | 1468 | |
c966f7d5 GT |
1469 | dest.type = MLX5_FLOW_DESTINATION_TYPE_TIR; |
1470 | dest.tir_num = priv->direct_tir[0].tirn; | |
092297e0 GT |
1471 | flow_rule = mlx5_eswitch_create_vport_rx_rule(esw, |
1472 | rep->vport, | |
c966f7d5 | 1473 | &dest); |
092297e0 GT |
1474 | if (IS_ERR(flow_rule)) |
1475 | return PTR_ERR(flow_rule); | |
1476 | rpriv->vport_rx_rule = flow_rule; | |
1477 | return 0; | |
1478 | } | |
1479 | ||
1480 | static int mlx5e_init_rep_rx(struct mlx5e_priv *priv) | |
1481 | { | |
1482 | struct mlx5_core_dev *mdev = priv->mdev; | |
cb67b832 | 1483 | int err; |
cb67b832 | 1484 | |
2c3b5bee SM |
1485 | mlx5e_init_l2_addr(priv); |
1486 | ||
1462e48d RD |
1487 | err = mlx5e_open_drop_rq(priv, &priv->drop_rq); |
1488 | if (err) { | |
1489 | mlx5_core_err(mdev, "open drop rq failed, %d\n", err); | |
1490 | return err; | |
1491 | } | |
1492 | ||
84a09733 | 1493 | err = mlx5e_create_indirect_rqt(priv); |
8f493ffd | 1494 | if (err) |
1462e48d | 1495 | goto err_close_drop_rq; |
cb67b832 | 1496 | |
84a09733 GT |
1497 | err = mlx5e_create_direct_rqts(priv); |
1498 | if (err) | |
1499 | goto err_destroy_indirect_rqts; | |
1500 | ||
1501 | err = mlx5e_create_indirect_tirs(priv, false); | |
8f493ffd | 1502 | if (err) |
cb67b832 | 1503 | goto err_destroy_direct_rqts; |
cb67b832 | 1504 | |
84a09733 GT |
1505 | err = mlx5e_create_direct_tirs(priv); |
1506 | if (err) | |
1507 | goto err_destroy_indirect_tirs; | |
1508 | ||
1509 | err = mlx5e_create_rep_ttc_table(priv); | |
092297e0 | 1510 | if (err) |
cb67b832 | 1511 | goto err_destroy_direct_tirs; |
cb67b832 | 1512 | |
84a09733 GT |
1513 | err = mlx5e_create_rep_vport_rx_rule(priv); |
1514 | if (err) | |
1515 | goto err_destroy_ttc_table; | |
1516 | ||
cb67b832 HHZ |
1517 | return 0; |
1518 | ||
84a09733 GT |
1519 | err_destroy_ttc_table: |
1520 | mlx5e_destroy_ttc_table(priv, &priv->fs.ttc); | |
cb67b832 HHZ |
1521 | err_destroy_direct_tirs: |
1522 | mlx5e_destroy_direct_tirs(priv); | |
84a09733 GT |
1523 | err_destroy_indirect_tirs: |
1524 | mlx5e_destroy_indirect_tirs(priv, false); | |
cb67b832 | 1525 | err_destroy_direct_rqts: |
8f493ffd | 1526 | mlx5e_destroy_direct_rqts(priv); |
84a09733 GT |
1527 | err_destroy_indirect_rqts: |
1528 | mlx5e_destroy_rqt(priv, &priv->indir_rqt); | |
1462e48d RD |
1529 | err_close_drop_rq: |
1530 | mlx5e_close_drop_rq(&priv->drop_rq); | |
cb67b832 HHZ |
1531 | return err; |
1532 | } | |
1533 | ||
1534 | static void mlx5e_cleanup_rep_rx(struct mlx5e_priv *priv) | |
1535 | { | |
1d447a39 | 1536 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
cb67b832 | 1537 | |
5ed99fb4 | 1538 | mlx5_del_flow_rules(rpriv->vport_rx_rule); |
84a09733 | 1539 | mlx5e_destroy_ttc_table(priv, &priv->fs.ttc); |
cb67b832 | 1540 | mlx5e_destroy_direct_tirs(priv); |
84a09733 | 1541 | mlx5e_destroy_indirect_tirs(priv, false); |
8f493ffd | 1542 | mlx5e_destroy_direct_rqts(priv); |
84a09733 | 1543 | mlx5e_destroy_rqt(priv, &priv->indir_rqt); |
1462e48d | 1544 | mlx5e_close_drop_rq(&priv->drop_rq); |
cb67b832 HHZ |
1545 | } |
1546 | ||
1547 | static int mlx5e_init_rep_tx(struct mlx5e_priv *priv) | |
1548 | { | |
d9ee0491 OG |
1549 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
1550 | struct mlx5_rep_uplink_priv *uplink_priv; | |
1551 | int tc, err; | |
cb67b832 HHZ |
1552 | |
1553 | err = mlx5e_create_tises(priv); | |
1554 | if (err) { | |
1555 | mlx5_core_warn(priv->mdev, "create tises failed, %d\n", err); | |
1556 | return err; | |
1557 | } | |
d9ee0491 OG |
1558 | |
1559 | if (rpriv->rep->vport == FDB_UPLINK_VPORT) { | |
1560 | uplink_priv = &rpriv->uplink_priv; | |
1561 | ||
1562 | /* init shared tc flow table */ | |
1563 | err = mlx5e_tc_esw_init(&uplink_priv->tc_ht); | |
1564 | if (err) | |
1565 | goto destroy_tises; | |
1566 | ||
1567 | /* init indirect block notifications */ | |
1568 | INIT_LIST_HEAD(&uplink_priv->tc_indr_block_priv_list); | |
1569 | uplink_priv->netdevice_nb.notifier_call = mlx5e_nic_rep_netdevice_event; | |
1570 | err = register_netdevice_notifier(&uplink_priv->netdevice_nb); | |
1571 | if (err) { | |
1572 | mlx5_core_err(priv->mdev, "Failed to register netdev notifier\n"); | |
1573 | goto tc_esw_cleanup; | |
1574 | } | |
1575 | } | |
1576 | ||
cb67b832 | 1577 | return 0; |
d9ee0491 OG |
1578 | |
1579 | tc_esw_cleanup: | |
1580 | mlx5e_tc_esw_cleanup(&uplink_priv->tc_ht); | |
1581 | destroy_tises: | |
1582 | for (tc = 0; tc < priv->profile->max_tc; tc++) | |
1583 | mlx5e_destroy_tis(priv->mdev, priv->tisn[tc]); | |
1584 | return err; | |
1585 | } | |
1586 | ||
1587 | static void mlx5e_cleanup_rep_tx(struct mlx5e_priv *priv) | |
1588 | { | |
1589 | struct mlx5e_rep_priv *rpriv = priv->ppriv; | |
1590 | int tc; | |
1591 | ||
1592 | for (tc = 0; tc < priv->profile->max_tc; tc++) | |
1593 | mlx5e_destroy_tis(priv->mdev, priv->tisn[tc]); | |
1594 | ||
1595 | if (rpriv->rep->vport == FDB_UPLINK_VPORT) { | |
1596 | /* clean indirect TC block notifications */ | |
1597 | unregister_netdevice_notifier(&rpriv->uplink_priv.netdevice_nb); | |
1598 | mlx5e_rep_indr_clean_block_privs(rpriv); | |
1599 | ||
1600 | /* delete shared tc flow table */ | |
1601 | mlx5e_tc_esw_cleanup(&rpriv->uplink_priv.tc_ht); | |
1602 | } | |
cb67b832 HHZ |
1603 | } |
1604 | ||
b36cdb42 OG |
1605 | static void mlx5e_vf_rep_enable(struct mlx5e_priv *priv) |
1606 | { | |
1607 | struct net_device *netdev = priv->netdev; | |
1608 | struct mlx5_core_dev *mdev = priv->mdev; | |
1609 | u16 max_mtu; | |
1610 | ||
1611 | netdev->min_mtu = ETH_MIN_MTU; | |
1612 | mlx5_query_port_max_mtu(mdev, &max_mtu, 1); | |
1613 | netdev->max_mtu = MLX5E_HW2SW_MTU(&priv->channels.params, max_mtu); | |
1614 | } | |
1615 | ||
1616 | static int uplink_rep_async_event(struct notifier_block *nb, unsigned long event, void *data) | |
1617 | { | |
1618 | struct mlx5e_priv *priv = container_of(nb, struct mlx5e_priv, events_nb); | |
1619 | struct mlx5_eqe *eqe = data; | |
1620 | ||
1621 | if (event != MLX5_EVENT_TYPE_PORT_CHANGE) | |
1622 | return NOTIFY_DONE; | |
1623 | ||
1624 | switch (eqe->sub_type) { | |
1625 | case MLX5_PORT_CHANGE_SUBTYPE_DOWN: | |
1626 | case MLX5_PORT_CHANGE_SUBTYPE_ACTIVE: | |
1627 | queue_work(priv->wq, &priv->update_carrier_work); | |
1628 | break; | |
1629 | default: | |
1630 | return NOTIFY_DONE; | |
1631 | } | |
1632 | ||
1633 | return NOTIFY_OK; | |
1634 | } | |
1635 | ||
1636 | static void mlx5e_uplink_rep_enable(struct mlx5e_priv *priv) | |
1637 | { | |
1638 | struct net_device *netdev = priv->netdev; | |
1639 | struct mlx5_core_dev *mdev = priv->mdev; | |
1640 | u16 max_mtu; | |
1641 | ||
1642 | netdev->min_mtu = ETH_MIN_MTU; | |
1643 | mlx5_query_port_max_mtu(priv->mdev, &max_mtu, 1); | |
1644 | netdev->max_mtu = MLX5E_HW2SW_MTU(&priv->channels.params, max_mtu); | |
1645 | mlx5e_set_dev_port_mtu(priv); | |
1646 | ||
1647 | mlx5_lag_add(mdev, netdev); | |
1648 | priv->events_nb.notifier_call = uplink_rep_async_event; | |
1649 | mlx5_notifier_register(mdev, &priv->events_nb); | |
1650 | #ifdef CONFIG_MLX5_CORE_EN_DCB | |
1651 | mlx5e_dcbnl_initialize(priv); | |
1652 | mlx5e_dcbnl_init_app(priv); | |
1653 | #endif | |
1654 | } | |
1655 | ||
1656 | static void mlx5e_uplink_rep_disable(struct mlx5e_priv *priv) | |
1657 | { | |
1658 | struct mlx5_core_dev *mdev = priv->mdev; | |
1659 | ||
1660 | #ifdef CONFIG_MLX5_CORE_EN_DCB | |
1661 | mlx5e_dcbnl_delete_app(priv); | |
1662 | #endif | |
1663 | mlx5_notifier_unregister(mdev, &priv->events_nb); | |
1664 | mlx5_lag_remove(mdev); | |
1665 | } | |
1666 | ||
1667 | static const struct mlx5e_profile mlx5e_vf_rep_profile = { | |
cb67b832 | 1668 | .init = mlx5e_init_rep, |
182570b2 | 1669 | .cleanup = mlx5e_cleanup_rep, |
cb67b832 HHZ |
1670 | .init_rx = mlx5e_init_rep_rx, |
1671 | .cleanup_rx = mlx5e_cleanup_rep_rx, | |
1672 | .init_tx = mlx5e_init_rep_tx, | |
d9ee0491 | 1673 | .cleanup_tx = mlx5e_cleanup_rep_tx, |
b36cdb42 OG |
1674 | .enable = mlx5e_vf_rep_enable, |
1675 | .update_stats = mlx5e_vf_rep_update_hw_counters, | |
20fd0c19 | 1676 | .rx_handlers.handle_rx_cqe = mlx5e_handle_rx_cqe_rep, |
749359f4 | 1677 | .rx_handlers.handle_rx_cqe_mpwqe = mlx5e_handle_rx_cqe_mpwrq, |
cb67b832 HHZ |
1678 | .max_tc = 1, |
1679 | }; | |
1680 | ||
b36cdb42 OG |
1681 | static const struct mlx5e_profile mlx5e_uplink_rep_profile = { |
1682 | .init = mlx5e_init_rep, | |
1683 | .cleanup = mlx5e_cleanup_rep, | |
1684 | .init_rx = mlx5e_init_rep_rx, | |
1685 | .cleanup_rx = mlx5e_cleanup_rep_rx, | |
1686 | .init_tx = mlx5e_init_rep_tx, | |
1687 | .cleanup_tx = mlx5e_cleanup_rep_tx, | |
1688 | .enable = mlx5e_uplink_rep_enable, | |
1689 | .disable = mlx5e_uplink_rep_disable, | |
1690 | .update_stats = mlx5e_uplink_rep_update_hw_counters, | |
1691 | .update_carrier = mlx5e_update_carrier, | |
1692 | .rx_handlers.handle_rx_cqe = mlx5e_handle_rx_cqe_rep, | |
1693 | .rx_handlers.handle_rx_cqe_mpwqe = mlx5e_handle_rx_cqe_mpwrq, | |
1694 | .max_tc = MLX5E_MAX_NUM_TC, | |
1695 | }; | |
1696 | ||
1d447a39 | 1697 | /* e-Switch vport representors */ |
1d447a39 | 1698 | static int |
4c66df01 | 1699 | mlx5e_vport_rep_load(struct mlx5_core_dev *dev, struct mlx5_eswitch_rep *rep) |
1d447a39 | 1700 | { |
b36cdb42 | 1701 | const struct mlx5e_profile *profile; |
1d447a39 | 1702 | struct mlx5e_rep_priv *rpriv; |
26e59d80 | 1703 | struct net_device *netdev; |
779d986d | 1704 | int nch, err; |
26e59d80 | 1705 | |
1d447a39 SM |
1706 | rpriv = kzalloc(sizeof(*rpriv), GFP_KERNEL); |
1707 | if (!rpriv) | |
1708 | return -ENOMEM; | |
1709 | ||
d9ee0491 OG |
1710 | /* rpriv->rep to be looked up when profile->init() is called */ |
1711 | rpriv->rep = rep; | |
1712 | ||
779d986d | 1713 | nch = mlx5e_get_max_num_channels(dev); |
b36cdb42 OG |
1714 | profile = (rep->vport == FDB_UPLINK_VPORT) ? &mlx5e_uplink_rep_profile : &mlx5e_vf_rep_profile; |
1715 | netdev = mlx5e_create_netdev(dev, profile, nch, rpriv); | |
26e59d80 MHY |
1716 | if (!netdev) { |
1717 | pr_warn("Failed to create representor netdev for vport %d\n", | |
1718 | rep->vport); | |
1d447a39 | 1719 | kfree(rpriv); |
cb67b832 HHZ |
1720 | return -EINVAL; |
1721 | } | |
26e59d80 | 1722 | |
5ed99fb4 | 1723 | rpriv->netdev = netdev; |
a4b97ab4 | 1724 | rep->rep_if[REP_ETH].priv = rpriv; |
5ed99fb4 | 1725 | INIT_LIST_HEAD(&rpriv->vport_sqs_list); |
26e59d80 | 1726 | |
aec002f6 OG |
1727 | if (rep->vport == FDB_UPLINK_VPORT) { |
1728 | err = mlx5e_create_mdev_resources(dev); | |
1729 | if (err) | |
1730 | goto err_destroy_netdev; | |
1731 | } | |
1732 | ||
2c3b5bee | 1733 | err = mlx5e_attach_netdev(netdev_priv(netdev)); |
26e59d80 MHY |
1734 | if (err) { |
1735 | pr_warn("Failed to attach representor netdev for vport %d\n", | |
1736 | rep->vport); | |
aec002f6 | 1737 | goto err_destroy_mdev_resources; |
26e59d80 MHY |
1738 | } |
1739 | ||
37b498ff HHZ |
1740 | err = mlx5e_rep_neigh_init(rpriv); |
1741 | if (err) { | |
1742 | pr_warn("Failed to initialized neighbours handling for vport %d\n", | |
1743 | rep->vport); | |
1744 | goto err_detach_netdev; | |
1745 | } | |
1746 | ||
26e59d80 MHY |
1747 | err = register_netdev(netdev); |
1748 | if (err) { | |
1749 | pr_warn("Failed to register representor netdev for vport %d\n", | |
1750 | rep->vport); | |
ef381359 | 1751 | goto err_neigh_cleanup; |
26e59d80 MHY |
1752 | } |
1753 | ||
cb67b832 | 1754 | return 0; |
26e59d80 | 1755 | |
37b498ff HHZ |
1756 | err_neigh_cleanup: |
1757 | mlx5e_rep_neigh_cleanup(rpriv); | |
1758 | ||
26e59d80 | 1759 | err_detach_netdev: |
2c3b5bee | 1760 | mlx5e_detach_netdev(netdev_priv(netdev)); |
26e59d80 | 1761 | |
aec002f6 OG |
1762 | err_destroy_mdev_resources: |
1763 | if (rep->vport == FDB_UPLINK_VPORT) | |
1764 | mlx5e_destroy_mdev_resources(dev); | |
1765 | ||
26e59d80 | 1766 | err_destroy_netdev: |
2c3b5bee | 1767 | mlx5e_destroy_netdev(netdev_priv(netdev)); |
1d447a39 | 1768 | kfree(rpriv); |
26e59d80 | 1769 | return err; |
cb67b832 HHZ |
1770 | } |
1771 | ||
1d447a39 | 1772 | static void |
4c66df01 | 1773 | mlx5e_vport_rep_unload(struct mlx5_eswitch_rep *rep) |
cb67b832 | 1774 | { |
5ed99fb4 MB |
1775 | struct mlx5e_rep_priv *rpriv = mlx5e_rep_to_rep_priv(rep); |
1776 | struct net_device *netdev = rpriv->netdev; | |
1d447a39 SM |
1777 | struct mlx5e_priv *priv = netdev_priv(netdev); |
1778 | void *ppriv = priv->ppriv; | |
cb67b832 | 1779 | |
5ed99fb4 | 1780 | unregister_netdev(netdev); |
37b498ff | 1781 | mlx5e_rep_neigh_cleanup(rpriv); |
1d447a39 | 1782 | mlx5e_detach_netdev(priv); |
aec002f6 OG |
1783 | if (rep->vport == FDB_UPLINK_VPORT) |
1784 | mlx5e_destroy_mdev_resources(priv->mdev); | |
1d447a39 SM |
1785 | mlx5e_destroy_netdev(priv); |
1786 | kfree(ppriv); /* mlx5e_rep_priv */ | |
1787 | } | |
1788 | ||
22215908 MB |
1789 | static void *mlx5e_vport_rep_get_proto_dev(struct mlx5_eswitch_rep *rep) |
1790 | { | |
1791 | struct mlx5e_rep_priv *rpriv; | |
1792 | ||
1793 | rpriv = mlx5e_rep_to_rep_priv(rep); | |
1794 | ||
1795 | return rpriv->netdev; | |
1796 | } | |
1797 | ||
aec002f6 | 1798 | void mlx5e_rep_register_vport_reps(struct mlx5_core_dev *mdev) |
1d447a39 | 1799 | { |
aec002f6 | 1800 | struct mlx5_eswitch *esw = mdev->priv.eswitch; |
1d447a39 SM |
1801 | int total_vfs = MLX5_TOTAL_VPORTS(mdev); |
1802 | int vport; | |
1d447a39 | 1803 | |
d9ee0491 | 1804 | for (vport = 0; vport < total_vfs; vport++) { |
a4b97ab4 | 1805 | struct mlx5_eswitch_rep_if rep_if = {}; |
1d447a39 | 1806 | |
a4b97ab4 MB |
1807 | rep_if.load = mlx5e_vport_rep_load; |
1808 | rep_if.unload = mlx5e_vport_rep_unload; | |
22215908 | 1809 | rep_if.get_proto_dev = mlx5e_vport_rep_get_proto_dev; |
a4b97ab4 | 1810 | mlx5_eswitch_register_vport_rep(esw, vport, &rep_if, REP_ETH); |
1d447a39 SM |
1811 | } |
1812 | } | |
1813 | ||
aec002f6 | 1814 | void mlx5e_rep_unregister_vport_reps(struct mlx5_core_dev *mdev) |
1d447a39 | 1815 | { |
1d447a39 SM |
1816 | struct mlx5_eswitch *esw = mdev->priv.eswitch; |
1817 | int total_vfs = MLX5_TOTAL_VPORTS(mdev); | |
1818 | int vport; | |
1819 | ||
d9ee0491 | 1820 | for (vport = total_vfs - 1; vport >= 0; vport--) |
a4b97ab4 | 1821 | mlx5_eswitch_unregister_vport_rep(esw, vport, REP_ETH); |
1d447a39 | 1822 | } |