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CommitLineData
cb67b832
HHZ
1/*
2 * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33#include <generated/utsrelease.h>
34#include <linux/mlx5/fs.h>
35#include <net/switchdev.h>
d957b4e3 36#include <net/pkt_cls.h>
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HHZ
37
38#include "eswitch.h"
39#include "en.h"
adb4c123 40#include "en_tc.h"
cb67b832
HHZ
41
42static const char mlx5e_rep_driver_name[] = "mlx5e_rep";
43
44static void mlx5e_rep_get_drvinfo(struct net_device *dev,
45 struct ethtool_drvinfo *drvinfo)
46{
47 strlcpy(drvinfo->driver, mlx5e_rep_driver_name,
48 sizeof(drvinfo->driver));
49 strlcpy(drvinfo->version, UTS_RELEASE, sizeof(drvinfo->version));
50}
51
52static const struct counter_desc sw_rep_stats_desc[] = {
53 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_packets) },
54 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_bytes) },
55 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_packets) },
56 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_bytes) },
57};
58
59#define NUM_VPORT_REP_COUNTERS ARRAY_SIZE(sw_rep_stats_desc)
60
61static void mlx5e_rep_get_strings(struct net_device *dev,
62 u32 stringset, uint8_t *data)
63{
64 int i;
65
66 switch (stringset) {
67 case ETH_SS_STATS:
68 for (i = 0; i < NUM_VPORT_REP_COUNTERS; i++)
69 strcpy(data + (i * ETH_GSTRING_LEN),
70 sw_rep_stats_desc[i].format);
71 break;
72 }
73}
74
370bad0f
OG
75static void mlx5e_rep_update_hw_counters(struct mlx5e_priv *priv)
76{
77 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
78 struct mlx5_eswitch_rep *rep = priv->ppriv;
79 struct rtnl_link_stats64 *vport_stats;
80 struct ifla_vf_stats vf_stats;
81 int err;
82
83 err = mlx5_eswitch_get_vport_stats(esw, rep->vport, &vf_stats);
84 if (err) {
85 pr_warn("vport %d error %d reading stats\n", rep->vport, err);
86 return;
87 }
88
89 vport_stats = &priv->stats.vf_vport;
90 /* flip tx/rx as we are reporting the counters for the switch vport */
91 vport_stats->rx_packets = vf_stats.tx_packets;
92 vport_stats->rx_bytes = vf_stats.tx_bytes;
93 vport_stats->tx_packets = vf_stats.rx_packets;
94 vport_stats->tx_bytes = vf_stats.rx_bytes;
95}
96
97static void mlx5e_rep_update_sw_counters(struct mlx5e_priv *priv)
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HHZ
98{
99 struct mlx5e_sw_stats *s = &priv->stats.sw;
100 struct mlx5e_rq_stats *rq_stats;
101 struct mlx5e_sq_stats *sq_stats;
102 int i, j;
103
104 memset(s, 0, sizeof(*s));
105 for (i = 0; i < priv->params.num_channels; i++) {
106 rq_stats = &priv->channel[i]->rq.stats;
107
108 s->rx_packets += rq_stats->packets;
109 s->rx_bytes += rq_stats->bytes;
110
111 for (j = 0; j < priv->params.num_tc; j++) {
112 sq_stats = &priv->channel[i]->sq[j].stats;
113
114 s->tx_packets += sq_stats->packets;
115 s->tx_bytes += sq_stats->bytes;
116 }
117 }
118}
119
370bad0f
OG
120static void mlx5e_rep_update_stats(struct mlx5e_priv *priv)
121{
122 mlx5e_rep_update_sw_counters(priv);
123 mlx5e_rep_update_hw_counters(priv);
124}
125
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HHZ
126static void mlx5e_rep_get_ethtool_stats(struct net_device *dev,
127 struct ethtool_stats *stats, u64 *data)
128{
129 struct mlx5e_priv *priv = netdev_priv(dev);
130 int i;
131
132 if (!data)
133 return;
134
135 mutex_lock(&priv->state_lock);
136 if (test_bit(MLX5E_STATE_OPENED, &priv->state))
370bad0f 137 mlx5e_rep_update_sw_counters(priv);
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HHZ
138 mutex_unlock(&priv->state_lock);
139
140 for (i = 0; i < NUM_VPORT_REP_COUNTERS; i++)
141 data[i] = MLX5E_READ_CTR64_CPU(&priv->stats.sw,
142 sw_rep_stats_desc, i);
143}
144
145static int mlx5e_rep_get_sset_count(struct net_device *dev, int sset)
146{
147 switch (sset) {
148 case ETH_SS_STATS:
149 return NUM_VPORT_REP_COUNTERS;
150 default:
151 return -EOPNOTSUPP;
152 }
153}
154
155static const struct ethtool_ops mlx5e_rep_ethtool_ops = {
156 .get_drvinfo = mlx5e_rep_get_drvinfo,
157 .get_link = ethtool_op_get_link,
158 .get_strings = mlx5e_rep_get_strings,
159 .get_sset_count = mlx5e_rep_get_sset_count,
160 .get_ethtool_stats = mlx5e_rep_get_ethtool_stats,
161};
162
163int mlx5e_attr_get(struct net_device *dev, struct switchdev_attr *attr)
164{
165 struct mlx5e_priv *priv = netdev_priv(dev);
dbe413e3 166 struct mlx5_eswitch_rep *rep = priv->ppriv;
cb67b832 167 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
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HHZ
168
169 if (esw->mode == SRIOV_NONE)
170 return -EOPNOTSUPP;
171
172 switch (attr->id) {
173 case SWITCHDEV_ATTR_ID_PORT_PARENT_ID:
cb67b832 174 attr->u.ppid.id_len = ETH_ALEN;
dbe413e3 175 ether_addr_copy(attr->u.ppid.id, rep->hw_id);
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HHZ
176 break;
177 default:
178 return -EOPNOTSUPP;
179 }
180
181 return 0;
182}
183
184int mlx5e_add_sqs_fwd_rules(struct mlx5e_priv *priv)
185
186{
187 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
188 struct mlx5_eswitch_rep *rep = priv->ppriv;
189 struct mlx5e_channel *c;
190 int n, tc, err, num_sqs = 0;
191 u16 *sqs;
192
193 sqs = kcalloc(priv->params.num_channels * priv->params.num_tc, sizeof(u16), GFP_KERNEL);
194 if (!sqs)
195 return -ENOMEM;
196
197 for (n = 0; n < priv->params.num_channels; n++) {
198 c = priv->channel[n];
199 for (tc = 0; tc < c->num_tc; tc++)
200 sqs[num_sqs++] = c->sq[tc].sqn;
201 }
202
203 err = mlx5_eswitch_sqs2vport_start(esw, rep, sqs, num_sqs);
204
205 kfree(sqs);
206 return err;
207}
208
209int mlx5e_nic_rep_load(struct mlx5_eswitch *esw, struct mlx5_eswitch_rep *rep)
210{
726293f1
HHZ
211 struct net_device *netdev = rep->netdev;
212 struct mlx5e_priv *priv = netdev_priv(netdev);
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HHZ
213
214 if (test_bit(MLX5E_STATE_OPENED, &priv->state))
215 return mlx5e_add_sqs_fwd_rules(priv);
216 return 0;
217}
218
219void mlx5e_remove_sqs_fwd_rules(struct mlx5e_priv *priv)
220{
221 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
222 struct mlx5_eswitch_rep *rep = priv->ppriv;
223
224 mlx5_eswitch_sqs2vport_stop(esw, rep);
225}
226
227void mlx5e_nic_rep_unload(struct mlx5_eswitch *esw,
228 struct mlx5_eswitch_rep *rep)
229{
726293f1
HHZ
230 struct net_device *netdev = rep->netdev;
231 struct mlx5e_priv *priv = netdev_priv(netdev);
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HHZ
232
233 if (test_bit(MLX5E_STATE_OPENED, &priv->state))
234 mlx5e_remove_sqs_fwd_rules(priv);
adb4c123
OG
235
236 /* clean (and re-init) existing uplink offloaded TC rules */
237 mlx5e_tc_cleanup(priv);
238 mlx5e_tc_init(priv);
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HHZ
239}
240
20a1ea67
OG
241static int mlx5e_rep_open(struct net_device *dev)
242{
243 struct mlx5e_priv *priv = netdev_priv(dev);
244 struct mlx5_eswitch_rep *rep = priv->ppriv;
245 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
246 int err;
247
248 err = mlx5e_open(dev);
249 if (err)
250 return err;
251
252 err = mlx5_eswitch_set_vport_state(esw, rep->vport, MLX5_ESW_VPORT_ADMIN_STATE_UP);
253 if (!err)
254 netif_carrier_on(dev);
255
256 return 0;
257}
258
259static int mlx5e_rep_close(struct net_device *dev)
260{
261 struct mlx5e_priv *priv = netdev_priv(dev);
262 struct mlx5_eswitch_rep *rep = priv->ppriv;
263 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
264
265 (void)mlx5_eswitch_set_vport_state(esw, rep->vport, MLX5_ESW_VPORT_ADMIN_STATE_DOWN);
266
267 return mlx5e_close(dev);
268}
269
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HHZ
270static int mlx5e_rep_get_phys_port_name(struct net_device *dev,
271 char *buf, size_t len)
272{
273 struct mlx5e_priv *priv = netdev_priv(dev);
274 struct mlx5_eswitch_rep *rep = priv->ppriv;
275 int ret;
276
277 ret = snprintf(buf, len, "%d", rep->vport - 1);
278 if (ret >= len)
279 return -EOPNOTSUPP;
280
281 return 0;
282}
283
d957b4e3
OG
284static int mlx5e_rep_ndo_setup_tc(struct net_device *dev, u32 handle,
285 __be16 proto, struct tc_to_netdev *tc)
286{
287 struct mlx5e_priv *priv = netdev_priv(dev);
288
289 if (TC_H_MAJ(handle) != TC_H_MAJ(TC_H_INGRESS))
290 return -EOPNOTSUPP;
291
ebe06875
HHZ
292 if (tc->egress_dev) {
293 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
294 struct net_device *uplink_dev = mlx5_eswitch_get_uplink_netdev(esw);
295
296 return uplink_dev->netdev_ops->ndo_setup_tc(uplink_dev, handle,
297 proto, tc);
298 }
299
d957b4e3
OG
300 switch (tc->type) {
301 case TC_SETUP_CLSFLOWER:
302 switch (tc->cls_flower->command) {
303 case TC_CLSFLOWER_REPLACE:
304 return mlx5e_configure_flower(priv, proto, tc->cls_flower);
305 case TC_CLSFLOWER_DESTROY:
306 return mlx5e_delete_flower(priv, tc->cls_flower);
307 case TC_CLSFLOWER_STATS:
308 return mlx5e_stats_flower(priv, tc->cls_flower);
309 }
310 default:
311 return -EOPNOTSUPP;
312 }
313}
314
370bad0f
OG
315bool mlx5e_is_uplink_rep(struct mlx5e_priv *priv)
316{
317 struct mlx5_eswitch_rep *rep = (struct mlx5_eswitch_rep *)priv->ppriv;
318 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
319
320 if (rep && rep->vport == FDB_UPLINK_VPORT && esw->mode == SRIOV_OFFLOADS)
321 return true;
322
323 return false;
324}
325
326bool mlx5e_is_vf_vport_rep(struct mlx5e_priv *priv)
327{
328 struct mlx5_eswitch_rep *rep = (struct mlx5_eswitch_rep *)priv->ppriv;
329
330 if (rep && rep->vport != FDB_UPLINK_VPORT)
331 return true;
332
333 return false;
334}
335
336bool mlx5e_has_offload_stats(const struct net_device *dev, int attr_id)
337{
338 struct mlx5e_priv *priv = netdev_priv(dev);
339
340 switch (attr_id) {
341 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
342 if (mlx5e_is_vf_vport_rep(priv) || mlx5e_is_uplink_rep(priv))
343 return true;
344 }
345
346 return false;
347}
348
349static int
350mlx5e_get_sw_stats64(const struct net_device *dev,
351 struct rtnl_link_stats64 *stats)
352{
353 struct mlx5e_priv *priv = netdev_priv(dev);
354 struct mlx5e_sw_stats *sstats = &priv->stats.sw;
355
356 stats->rx_packets = sstats->rx_packets;
357 stats->rx_bytes = sstats->rx_bytes;
358 stats->tx_packets = sstats->tx_packets;
359 stats->tx_bytes = sstats->tx_bytes;
360
361 stats->tx_dropped = sstats->tx_queue_dropped;
362
363 return 0;
364}
365
366int mlx5e_get_offload_stats(int attr_id, const struct net_device *dev,
367 void *sp)
368{
369 switch (attr_id) {
370 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
371 return mlx5e_get_sw_stats64(dev, sp);
372 }
373
374 return -EINVAL;
375}
376
bc1f4470 377static void
370bad0f
OG
378mlx5e_rep_get_stats(struct net_device *dev, struct rtnl_link_stats64 *stats)
379{
380 struct mlx5e_priv *priv = netdev_priv(dev);
381
382 memcpy(stats, &priv->stats.vf_vport, sizeof(*stats));
370bad0f
OG
383}
384
cb67b832
HHZ
385static const struct switchdev_ops mlx5e_rep_switchdev_ops = {
386 .switchdev_port_attr_get = mlx5e_attr_get,
387};
388
389static const struct net_device_ops mlx5e_netdev_ops_rep = {
20a1ea67
OG
390 .ndo_open = mlx5e_rep_open,
391 .ndo_stop = mlx5e_rep_close,
cb67b832
HHZ
392 .ndo_start_xmit = mlx5e_xmit,
393 .ndo_get_phys_port_name = mlx5e_rep_get_phys_port_name,
d957b4e3 394 .ndo_setup_tc = mlx5e_rep_ndo_setup_tc,
370bad0f
OG
395 .ndo_get_stats64 = mlx5e_rep_get_stats,
396 .ndo_has_offload_stats = mlx5e_has_offload_stats,
397 .ndo_get_offload_stats = mlx5e_get_offload_stats,
cb67b832
HHZ
398};
399
400static void mlx5e_build_rep_netdev_priv(struct mlx5_core_dev *mdev,
401 struct net_device *netdev,
402 const struct mlx5e_profile *profile,
403 void *ppriv)
404{
405 struct mlx5e_priv *priv = netdev_priv(netdev);
406 u8 cq_period_mode = MLX5_CAP_GEN(mdev, cq_period_start_from_cqe) ?
407 MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
408 MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
409
410 priv->params.log_sq_size =
411 MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE;
412 priv->params.rq_wq_type = MLX5_WQ_TYPE_LINKED_LIST;
413 priv->params.log_rq_size = MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE;
414
415 priv->params.min_rx_wqes = mlx5_min_rx_wqes(priv->params.rq_wq_type,
416 BIT(priv->params.log_rq_size));
417
418 priv->params.rx_am_enabled = MLX5_CAP_GEN(mdev, cq_moderation);
419 mlx5e_set_rx_cq_mode_params(&priv->params, cq_period_mode);
420
421 priv->params.tx_max_inline = mlx5e_get_max_inline_cap(mdev);
422 priv->params.num_tc = 1;
423
424 priv->params.lro_wqe_sz =
425 MLX5E_PARAMS_DEFAULT_LRO_WQE_SZ;
426
427 priv->mdev = mdev;
428 priv->netdev = netdev;
429 priv->params.num_channels = profile->max_nch(mdev);
430 priv->profile = profile;
431 priv->ppriv = ppriv;
432
433 mutex_init(&priv->state_lock);
434
435 INIT_DELAYED_WORK(&priv->update_stats_work, mlx5e_update_stats_work);
436}
437
438static void mlx5e_build_rep_netdev(struct net_device *netdev)
439{
440 netdev->netdev_ops = &mlx5e_netdev_ops_rep;
441
442 netdev->watchdog_timeo = 15 * HZ;
443
444 netdev->ethtool_ops = &mlx5e_rep_ethtool_ops;
445
446#ifdef CONFIG_NET_SWITCHDEV
447 netdev->switchdev_ops = &mlx5e_rep_switchdev_ops;
448#endif
449
abd32772 450 netdev->features |= NETIF_F_VLAN_CHALLENGED | NETIF_F_HW_TC | NETIF_F_NETNS_LOCAL;
d957b4e3 451 netdev->hw_features |= NETIF_F_HW_TC;
cb67b832
HHZ
452
453 eth_hw_addr_random(netdev);
454}
455
456static void mlx5e_init_rep(struct mlx5_core_dev *mdev,
457 struct net_device *netdev,
458 const struct mlx5e_profile *profile,
459 void *ppriv)
460{
461 mlx5e_build_rep_netdev_priv(mdev, netdev, profile, ppriv);
462 mlx5e_build_rep_netdev(netdev);
463}
464
465static int mlx5e_init_rep_rx(struct mlx5e_priv *priv)
466{
467 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
468 struct mlx5_eswitch_rep *rep = priv->ppriv;
469 struct mlx5_core_dev *mdev = priv->mdev;
74491de9 470 struct mlx5_flow_handle *flow_rule;
cb67b832
HHZ
471 int err;
472 int i;
473
474 err = mlx5e_create_direct_rqts(priv);
475 if (err) {
476 mlx5_core_warn(mdev, "create direct rqts failed, %d\n", err);
477 return err;
478 }
479
480 err = mlx5e_create_direct_tirs(priv);
481 if (err) {
482 mlx5_core_warn(mdev, "create direct tirs failed, %d\n", err);
483 goto err_destroy_direct_rqts;
484 }
485
486 flow_rule = mlx5_eswitch_create_vport_rx_rule(esw,
487 rep->vport,
488 priv->direct_tir[0].tirn);
489 if (IS_ERR(flow_rule)) {
490 err = PTR_ERR(flow_rule);
491 goto err_destroy_direct_tirs;
492 }
493 rep->vport_rx_rule = flow_rule;
494
d957b4e3
OG
495 err = mlx5e_tc_init(priv);
496 if (err)
497 goto err_del_flow_rule;
498
cb67b832
HHZ
499 return 0;
500
d957b4e3 501err_del_flow_rule:
74491de9 502 mlx5_del_flow_rules(rep->vport_rx_rule);
cb67b832
HHZ
503err_destroy_direct_tirs:
504 mlx5e_destroy_direct_tirs(priv);
505err_destroy_direct_rqts:
506 for (i = 0; i < priv->params.num_channels; i++)
507 mlx5e_destroy_rqt(priv, &priv->direct_tir[i].rqt);
508 return err;
509}
510
511static void mlx5e_cleanup_rep_rx(struct mlx5e_priv *priv)
512{
513 struct mlx5_eswitch_rep *rep = priv->ppriv;
514 int i;
515
d957b4e3 516 mlx5e_tc_cleanup(priv);
74491de9 517 mlx5_del_flow_rules(rep->vport_rx_rule);
cb67b832
HHZ
518 mlx5e_destroy_direct_tirs(priv);
519 for (i = 0; i < priv->params.num_channels; i++)
520 mlx5e_destroy_rqt(priv, &priv->direct_tir[i].rqt);
521}
522
523static int mlx5e_init_rep_tx(struct mlx5e_priv *priv)
524{
525 int err;
526
527 err = mlx5e_create_tises(priv);
528 if (err) {
529 mlx5_core_warn(priv->mdev, "create tises failed, %d\n", err);
530 return err;
531 }
532 return 0;
533}
534
535static int mlx5e_get_rep_max_num_channels(struct mlx5_core_dev *mdev)
536{
537#define MLX5E_PORT_REPRESENTOR_NCH 1
538 return MLX5E_PORT_REPRESENTOR_NCH;
539}
540
541static struct mlx5e_profile mlx5e_rep_profile = {
542 .init = mlx5e_init_rep,
543 .init_rx = mlx5e_init_rep_rx,
544 .cleanup_rx = mlx5e_cleanup_rep_rx,
545 .init_tx = mlx5e_init_rep_tx,
546 .cleanup_tx = mlx5e_cleanup_nic_tx,
370bad0f 547 .update_stats = mlx5e_rep_update_stats,
cb67b832
HHZ
548 .max_nch = mlx5e_get_rep_max_num_channels,
549 .max_tc = 1,
550};
551
552int mlx5e_vport_rep_load(struct mlx5_eswitch *esw,
553 struct mlx5_eswitch_rep *rep)
554{
26e59d80
MHY
555 struct net_device *netdev;
556 int err;
557
558 netdev = mlx5e_create_netdev(esw->dev, &mlx5e_rep_profile, rep);
559 if (!netdev) {
560 pr_warn("Failed to create representor netdev for vport %d\n",
561 rep->vport);
cb67b832
HHZ
562 return -EINVAL;
563 }
26e59d80 564
726293f1 565 rep->netdev = netdev;
26e59d80
MHY
566
567 err = mlx5e_attach_netdev(esw->dev, netdev);
568 if (err) {
569 pr_warn("Failed to attach representor netdev for vport %d\n",
570 rep->vport);
571 goto err_destroy_netdev;
572 }
573
574 err = register_netdev(netdev);
575 if (err) {
576 pr_warn("Failed to register representor netdev for vport %d\n",
577 rep->vport);
578 goto err_detach_netdev;
579 }
580
cb67b832 581 return 0;
26e59d80
MHY
582
583err_detach_netdev:
584 mlx5e_detach_netdev(esw->dev, netdev);
585
586err_destroy_netdev:
726293f1 587 mlx5e_destroy_netdev(esw->dev, netdev_priv(netdev));
26e59d80
MHY
588
589 return err;
590
cb67b832
HHZ
591}
592
593void mlx5e_vport_rep_unload(struct mlx5_eswitch *esw,
594 struct mlx5_eswitch_rep *rep)
595{
726293f1 596 struct net_device *netdev = rep->netdev;
cb67b832 597
5e1e93c7 598 unregister_netdev(netdev);
26e59d80 599 mlx5e_detach_netdev(esw->dev, netdev);
726293f1 600 mlx5e_destroy_netdev(esw->dev, netdev_priv(netdev));
cb67b832 601}