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cb67b832 HHZ |
1 | /* |
2 | * Copyright (c) 2016, Mellanox Technologies. All rights reserved. | |
3 | * | |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | */ | |
32 | ||
33 | #include <generated/utsrelease.h> | |
34 | #include <linux/mlx5/fs.h> | |
35 | #include <net/switchdev.h> | |
d957b4e3 | 36 | #include <net/pkt_cls.h> |
717503b9 | 37 | #include <net/act_api.h> |
232c0013 HHZ |
38 | #include <net/netevent.h> |
39 | #include <net/arp.h> | |
cb67b832 HHZ |
40 | |
41 | #include "eswitch.h" | |
42 | #include "en.h" | |
1d447a39 | 43 | #include "en_rep.h" |
adb4c123 | 44 | #include "en_tc.h" |
101f4de9 | 45 | #include "en/tc_tun.h" |
f6dfb4c3 | 46 | #include "fs_core.h" |
cb67b832 | 47 | |
4c8fb298 | 48 | #define MLX5E_REP_PARAMS_DEF_LOG_SQ_SIZE \ |
e7164313 | 49 | max(0x7, MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE) |
8956f001 | 50 | #define MLX5E_REP_PARAMS_DEF_NUM_CHANNELS 1 |
4246f698 | 51 | |
cb67b832 HHZ |
52 | static const char mlx5e_rep_driver_name[] = "mlx5e_rep"; |
53 | ||
f5bc2c5d OS |
54 | struct mlx5e_rep_indr_block_priv { |
55 | struct net_device *netdev; | |
56 | struct mlx5e_rep_priv *rpriv; | |
57 | ||
58 | struct list_head list; | |
59 | }; | |
60 | ||
25f2d0e7 EB |
61 | static void mlx5e_rep_indr_unregister_block(struct mlx5e_rep_priv *rpriv, |
62 | struct net_device *netdev); | |
f5bc2c5d | 63 | |
cb67b832 HHZ |
64 | static void mlx5e_rep_get_drvinfo(struct net_device *dev, |
65 | struct ethtool_drvinfo *drvinfo) | |
66 | { | |
67 | strlcpy(drvinfo->driver, mlx5e_rep_driver_name, | |
68 | sizeof(drvinfo->driver)); | |
69 | strlcpy(drvinfo->version, UTS_RELEASE, sizeof(drvinfo->version)); | |
70 | } | |
71 | ||
72 | static const struct counter_desc sw_rep_stats_desc[] = { | |
73 | { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_packets) }, | |
74 | { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_bytes) }, | |
75 | { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_packets) }, | |
76 | { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_bytes) }, | |
77 | }; | |
78 | ||
a228060a OG |
79 | struct vport_stats { |
80 | u64 vport_rx_packets; | |
81 | u64 vport_tx_packets; | |
82 | u64 vport_rx_bytes; | |
83 | u64 vport_tx_bytes; | |
84 | }; | |
85 | ||
86 | static const struct counter_desc vport_rep_stats_desc[] = { | |
87 | { MLX5E_DECLARE_STAT(struct vport_stats, vport_rx_packets) }, | |
88 | { MLX5E_DECLARE_STAT(struct vport_stats, vport_rx_bytes) }, | |
89 | { MLX5E_DECLARE_STAT(struct vport_stats, vport_tx_packets) }, | |
90 | { MLX5E_DECLARE_STAT(struct vport_stats, vport_tx_bytes) }, | |
91 | }; | |
92 | ||
93 | #define NUM_VPORT_REP_SW_COUNTERS ARRAY_SIZE(sw_rep_stats_desc) | |
94 | #define NUM_VPORT_REP_HW_COUNTERS ARRAY_SIZE(vport_rep_stats_desc) | |
cb67b832 HHZ |
95 | |
96 | static void mlx5e_rep_get_strings(struct net_device *dev, | |
97 | u32 stringset, uint8_t *data) | |
98 | { | |
a228060a | 99 | int i, j; |
cb67b832 HHZ |
100 | |
101 | switch (stringset) { | |
102 | case ETH_SS_STATS: | |
a228060a | 103 | for (i = 0; i < NUM_VPORT_REP_SW_COUNTERS; i++) |
cb67b832 HHZ |
104 | strcpy(data + (i * ETH_GSTRING_LEN), |
105 | sw_rep_stats_desc[i].format); | |
a228060a OG |
106 | for (j = 0; j < NUM_VPORT_REP_HW_COUNTERS; j++, i++) |
107 | strcpy(data + (i * ETH_GSTRING_LEN), | |
108 | vport_rep_stats_desc[j].format); | |
cb67b832 HHZ |
109 | break; |
110 | } | |
111 | } | |
112 | ||
d9ee0491 | 113 | static void mlx5e_vf_rep_update_hw_counters(struct mlx5e_priv *priv) |
370bad0f OG |
114 | { |
115 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
1d447a39 SM |
116 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
117 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
370bad0f OG |
118 | struct rtnl_link_stats64 *vport_stats; |
119 | struct ifla_vf_stats vf_stats; | |
120 | int err; | |
121 | ||
122 | err = mlx5_eswitch_get_vport_stats(esw, rep->vport, &vf_stats); | |
123 | if (err) { | |
124 | pr_warn("vport %d error %d reading stats\n", rep->vport, err); | |
125 | return; | |
126 | } | |
127 | ||
128 | vport_stats = &priv->stats.vf_vport; | |
129 | /* flip tx/rx as we are reporting the counters for the switch vport */ | |
130 | vport_stats->rx_packets = vf_stats.tx_packets; | |
131 | vport_stats->rx_bytes = vf_stats.tx_bytes; | |
132 | vport_stats->tx_packets = vf_stats.rx_packets; | |
133 | vport_stats->tx_bytes = vf_stats.rx_bytes; | |
134 | } | |
135 | ||
d9ee0491 OG |
136 | static void mlx5e_uplink_rep_update_hw_counters(struct mlx5e_priv *priv) |
137 | { | |
138 | struct mlx5e_pport_stats *pstats = &priv->stats.pport; | |
139 | struct rtnl_link_stats64 *vport_stats; | |
140 | ||
141 | mlx5e_grp_802_3_update_stats(priv); | |
142 | ||
143 | vport_stats = &priv->stats.vf_vport; | |
144 | ||
145 | vport_stats->rx_packets = PPORT_802_3_GET(pstats, a_frames_received_ok); | |
146 | vport_stats->rx_bytes = PPORT_802_3_GET(pstats, a_octets_received_ok); | |
147 | vport_stats->tx_packets = PPORT_802_3_GET(pstats, a_frames_transmitted_ok); | |
148 | vport_stats->tx_bytes = PPORT_802_3_GET(pstats, a_octets_transmitted_ok); | |
149 | } | |
150 | ||
151 | static void mlx5e_rep_update_hw_counters(struct mlx5e_priv *priv) | |
152 | { | |
153 | struct mlx5e_rep_priv *rpriv = priv->ppriv; | |
154 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
155 | ||
156 | if (rep->vport == FDB_UPLINK_VPORT) | |
157 | mlx5e_uplink_rep_update_hw_counters(priv); | |
158 | else | |
159 | mlx5e_vf_rep_update_hw_counters(priv); | |
160 | } | |
161 | ||
370bad0f | 162 | static void mlx5e_rep_update_sw_counters(struct mlx5e_priv *priv) |
cb67b832 HHZ |
163 | { |
164 | struct mlx5e_sw_stats *s = &priv->stats.sw; | |
165 | struct mlx5e_rq_stats *rq_stats; | |
166 | struct mlx5e_sq_stats *sq_stats; | |
167 | int i, j; | |
168 | ||
169 | memset(s, 0, sizeof(*s)); | |
ff9c852f SM |
170 | for (i = 0; i < priv->channels.num; i++) { |
171 | struct mlx5e_channel *c = priv->channels.c[i]; | |
172 | ||
05909bab | 173 | rq_stats = c->rq.stats; |
cb67b832 HHZ |
174 | |
175 | s->rx_packets += rq_stats->packets; | |
176 | s->rx_bytes += rq_stats->bytes; | |
177 | ||
6a9764ef | 178 | for (j = 0; j < priv->channels.params.num_tc; j++) { |
05909bab | 179 | sq_stats = c->sq[j].stats; |
cb67b832 HHZ |
180 | |
181 | s->tx_packets += sq_stats->packets; | |
182 | s->tx_bytes += sq_stats->bytes; | |
7fdc1adc | 183 | s->tx_queue_dropped += sq_stats->dropped; |
cb67b832 HHZ |
184 | } |
185 | } | |
370bad0f OG |
186 | } |
187 | ||
cb67b832 HHZ |
188 | static void mlx5e_rep_get_ethtool_stats(struct net_device *dev, |
189 | struct ethtool_stats *stats, u64 *data) | |
190 | { | |
191 | struct mlx5e_priv *priv = netdev_priv(dev); | |
a228060a | 192 | int i, j; |
cb67b832 HHZ |
193 | |
194 | if (!data) | |
195 | return; | |
196 | ||
197 | mutex_lock(&priv->state_lock); | |
198 | if (test_bit(MLX5E_STATE_OPENED, &priv->state)) | |
370bad0f | 199 | mlx5e_rep_update_sw_counters(priv); |
a228060a | 200 | mlx5e_rep_update_hw_counters(priv); |
cb67b832 HHZ |
201 | mutex_unlock(&priv->state_lock); |
202 | ||
a228060a | 203 | for (i = 0; i < NUM_VPORT_REP_SW_COUNTERS; i++) |
cb67b832 HHZ |
204 | data[i] = MLX5E_READ_CTR64_CPU(&priv->stats.sw, |
205 | sw_rep_stats_desc, i); | |
a228060a OG |
206 | |
207 | for (j = 0; j < NUM_VPORT_REP_HW_COUNTERS; j++, i++) | |
208 | data[i] = MLX5E_READ_CTR64_CPU(&priv->stats.vf_vport, | |
209 | vport_rep_stats_desc, j); | |
cb67b832 HHZ |
210 | } |
211 | ||
212 | static int mlx5e_rep_get_sset_count(struct net_device *dev, int sset) | |
213 | { | |
214 | switch (sset) { | |
215 | case ETH_SS_STATS: | |
a228060a | 216 | return NUM_VPORT_REP_SW_COUNTERS + NUM_VPORT_REP_HW_COUNTERS; |
cb67b832 HHZ |
217 | default: |
218 | return -EOPNOTSUPP; | |
219 | } | |
220 | } | |
221 | ||
f128f138 GT |
222 | static void mlx5e_rep_get_ringparam(struct net_device *dev, |
223 | struct ethtool_ringparam *param) | |
224 | { | |
225 | struct mlx5e_priv *priv = netdev_priv(dev); | |
226 | ||
227 | mlx5e_ethtool_get_ringparam(priv, param); | |
228 | } | |
229 | ||
230 | static int mlx5e_rep_set_ringparam(struct net_device *dev, | |
231 | struct ethtool_ringparam *param) | |
232 | { | |
233 | struct mlx5e_priv *priv = netdev_priv(dev); | |
234 | ||
235 | return mlx5e_ethtool_set_ringparam(priv, param); | |
236 | } | |
237 | ||
84a09733 GT |
238 | static int mlx5e_replace_rep_vport_rx_rule(struct mlx5e_priv *priv, |
239 | struct mlx5_flow_destination *dest) | |
240 | { | |
241 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
242 | struct mlx5e_rep_priv *rpriv = priv->ppriv; | |
243 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
244 | struct mlx5_flow_handle *flow_rule; | |
245 | ||
246 | flow_rule = mlx5_eswitch_create_vport_rx_rule(esw, | |
247 | rep->vport, | |
248 | dest); | |
249 | if (IS_ERR(flow_rule)) | |
250 | return PTR_ERR(flow_rule); | |
251 | ||
252 | mlx5_del_flow_rules(rpriv->vport_rx_rule); | |
253 | rpriv->vport_rx_rule = flow_rule; | |
254 | return 0; | |
255 | } | |
256 | ||
257 | static void mlx5e_rep_get_channels(struct net_device *dev, | |
258 | struct ethtool_channels *ch) | |
259 | { | |
260 | struct mlx5e_priv *priv = netdev_priv(dev); | |
261 | ||
262 | mlx5e_ethtool_get_channels(priv, ch); | |
263 | } | |
264 | ||
265 | static int mlx5e_rep_set_channels(struct net_device *dev, | |
266 | struct ethtool_channels *ch) | |
267 | { | |
268 | struct mlx5e_priv *priv = netdev_priv(dev); | |
269 | u16 curr_channels_amount = priv->channels.params.num_channels; | |
270 | u32 new_channels_amount = ch->combined_count; | |
271 | struct mlx5_flow_destination new_dest; | |
272 | int err = 0; | |
273 | ||
274 | err = mlx5e_ethtool_set_channels(priv, ch); | |
275 | if (err) | |
276 | return err; | |
277 | ||
278 | if (curr_channels_amount == 1 && new_channels_amount > 1) { | |
279 | new_dest.type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE; | |
280 | new_dest.ft = priv->fs.ttc.ft.t; | |
281 | } else if (new_channels_amount == 1 && curr_channels_amount > 1) { | |
282 | new_dest.type = MLX5_FLOW_DESTINATION_TYPE_TIR; | |
283 | new_dest.tir_num = priv->direct_tir[0].tirn; | |
284 | } else { | |
285 | return 0; | |
286 | } | |
287 | ||
288 | err = mlx5e_replace_rep_vport_rx_rule(priv, &new_dest); | |
289 | if (err) { | |
290 | netdev_warn(priv->netdev, "Failed to update vport rx rule, when going from (%d) channels to (%d) channels\n", | |
291 | curr_channels_amount, new_channels_amount); | |
292 | return err; | |
293 | } | |
294 | ||
295 | return 0; | |
296 | } | |
297 | ||
ff9b85de OG |
298 | static int mlx5e_rep_get_coalesce(struct net_device *netdev, |
299 | struct ethtool_coalesce *coal) | |
300 | { | |
301 | struct mlx5e_priv *priv = netdev_priv(netdev); | |
302 | ||
303 | return mlx5e_ethtool_get_coalesce(priv, coal); | |
304 | } | |
305 | ||
306 | static int mlx5e_rep_set_coalesce(struct net_device *netdev, | |
307 | struct ethtool_coalesce *coal) | |
308 | { | |
309 | struct mlx5e_priv *priv = netdev_priv(netdev); | |
310 | ||
311 | return mlx5e_ethtool_set_coalesce(priv, coal); | |
312 | } | |
313 | ||
84a09733 GT |
314 | static u32 mlx5e_rep_get_rxfh_key_size(struct net_device *netdev) |
315 | { | |
316 | struct mlx5e_priv *priv = netdev_priv(netdev); | |
317 | ||
318 | return mlx5e_ethtool_get_rxfh_key_size(priv); | |
319 | } | |
320 | ||
321 | static u32 mlx5e_rep_get_rxfh_indir_size(struct net_device *netdev) | |
322 | { | |
323 | struct mlx5e_priv *priv = netdev_priv(netdev); | |
324 | ||
325 | return mlx5e_ethtool_get_rxfh_indir_size(priv); | |
326 | } | |
327 | ||
ff9b85de OG |
328 | static void mlx5e_uplink_rep_get_pauseparam(struct net_device *netdev, |
329 | struct ethtool_pauseparam *pauseparam) | |
330 | { | |
331 | struct mlx5e_priv *priv = netdev_priv(netdev); | |
332 | ||
333 | mlx5e_ethtool_get_pauseparam(priv, pauseparam); | |
334 | } | |
335 | ||
336 | static int mlx5e_uplink_rep_set_pauseparam(struct net_device *netdev, | |
337 | struct ethtool_pauseparam *pauseparam) | |
338 | { | |
339 | struct mlx5e_priv *priv = netdev_priv(netdev); | |
340 | ||
341 | return mlx5e_ethtool_set_pauseparam(priv, pauseparam); | |
342 | } | |
343 | ||
344 | static int mlx5e_uplink_rep_get_link_ksettings(struct net_device *netdev, | |
345 | struct ethtool_link_ksettings *link_ksettings) | |
346 | { | |
347 | struct mlx5e_priv *priv = netdev_priv(netdev); | |
348 | ||
349 | return mlx5e_ethtool_get_link_ksettings(priv, link_ksettings); | |
350 | } | |
351 | ||
352 | static int mlx5e_uplink_rep_set_link_ksettings(struct net_device *netdev, | |
353 | const struct ethtool_link_ksettings *link_ksettings) | |
354 | { | |
355 | struct mlx5e_priv *priv = netdev_priv(netdev); | |
356 | ||
357 | return mlx5e_ethtool_set_link_ksettings(priv, link_ksettings); | |
358 | } | |
359 | ||
360 | static const struct ethtool_ops mlx5e_vf_rep_ethtool_ops = { | |
361 | .get_drvinfo = mlx5e_rep_get_drvinfo, | |
362 | .get_link = ethtool_op_get_link, | |
363 | .get_strings = mlx5e_rep_get_strings, | |
364 | .get_sset_count = mlx5e_rep_get_sset_count, | |
365 | .get_ethtool_stats = mlx5e_rep_get_ethtool_stats, | |
366 | .get_ringparam = mlx5e_rep_get_ringparam, | |
367 | .set_ringparam = mlx5e_rep_set_ringparam, | |
368 | .get_channels = mlx5e_rep_get_channels, | |
369 | .set_channels = mlx5e_rep_set_channels, | |
370 | .get_coalesce = mlx5e_rep_get_coalesce, | |
371 | .set_coalesce = mlx5e_rep_set_coalesce, | |
372 | .get_rxfh_key_size = mlx5e_rep_get_rxfh_key_size, | |
373 | .get_rxfh_indir_size = mlx5e_rep_get_rxfh_indir_size, | |
374 | }; | |
375 | ||
376 | static const struct ethtool_ops mlx5e_uplink_rep_ethtool_ops = { | |
cb67b832 HHZ |
377 | .get_drvinfo = mlx5e_rep_get_drvinfo, |
378 | .get_link = ethtool_op_get_link, | |
379 | .get_strings = mlx5e_rep_get_strings, | |
380 | .get_sset_count = mlx5e_rep_get_sset_count, | |
381 | .get_ethtool_stats = mlx5e_rep_get_ethtool_stats, | |
f128f138 GT |
382 | .get_ringparam = mlx5e_rep_get_ringparam, |
383 | .set_ringparam = mlx5e_rep_set_ringparam, | |
84a09733 GT |
384 | .get_channels = mlx5e_rep_get_channels, |
385 | .set_channels = mlx5e_rep_set_channels, | |
ff9b85de OG |
386 | .get_coalesce = mlx5e_rep_get_coalesce, |
387 | .set_coalesce = mlx5e_rep_set_coalesce, | |
388 | .get_link_ksettings = mlx5e_uplink_rep_get_link_ksettings, | |
389 | .set_link_ksettings = mlx5e_uplink_rep_set_link_ksettings, | |
84a09733 GT |
390 | .get_rxfh_key_size = mlx5e_rep_get_rxfh_key_size, |
391 | .get_rxfh_indir_size = mlx5e_rep_get_rxfh_indir_size, | |
ff9b85de OG |
392 | .get_pauseparam = mlx5e_uplink_rep_get_pauseparam, |
393 | .set_pauseparam = mlx5e_uplink_rep_set_pauseparam, | |
cb67b832 HHZ |
394 | }; |
395 | ||
d9ee0491 | 396 | static int mlx5e_attr_get(struct net_device *dev, struct switchdev_attr *attr) |
cb67b832 HHZ |
397 | { |
398 | struct mlx5e_priv *priv = netdev_priv(dev); | |
399 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
491c37e4 RL |
400 | struct net_device *uplink_upper = NULL; |
401 | struct mlx5e_priv *uplink_priv = NULL; | |
402 | struct net_device *uplink_dev; | |
cb67b832 HHZ |
403 | |
404 | if (esw->mode == SRIOV_NONE) | |
405 | return -EOPNOTSUPP; | |
406 | ||
491c37e4 RL |
407 | uplink_dev = mlx5_eswitch_uplink_get_proto_dev(esw, REP_ETH); |
408 | if (uplink_dev) { | |
409 | uplink_upper = netdev_master_upper_dev_get(uplink_dev); | |
410 | uplink_priv = netdev_priv(uplink_dev); | |
411 | } | |
412 | ||
cb67b832 HHZ |
413 | switch (attr->id) { |
414 | case SWITCHDEV_ATTR_ID_PORT_PARENT_ID: | |
cb67b832 | 415 | attr->u.ppid.id_len = ETH_ALEN; |
7c34ec19 | 416 | if (uplink_upper && mlx5_lag_is_sriov(uplink_priv->mdev)) { |
491c37e4 RL |
417 | ether_addr_copy(attr->u.ppid.id, uplink_upper->dev_addr); |
418 | } else { | |
419 | struct mlx5e_rep_priv *rpriv = priv->ppriv; | |
420 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
421 | ||
422 | ether_addr_copy(attr->u.ppid.id, rep->hw_id); | |
423 | } | |
cb67b832 HHZ |
424 | break; |
425 | default: | |
426 | return -EOPNOTSUPP; | |
427 | } | |
428 | ||
429 | return 0; | |
430 | } | |
431 | ||
f7a68945 MB |
432 | static void mlx5e_sqs2vport_stop(struct mlx5_eswitch *esw, |
433 | struct mlx5_eswitch_rep *rep) | |
434 | { | |
2c47bf80 | 435 | struct mlx5e_rep_sq *rep_sq, *tmp; |
5ed99fb4 | 436 | struct mlx5e_rep_priv *rpriv; |
f7a68945 MB |
437 | |
438 | if (esw->mode != SRIOV_OFFLOADS) | |
439 | return; | |
440 | ||
5ed99fb4 | 441 | rpriv = mlx5e_rep_to_rep_priv(rep); |
2c47bf80 MB |
442 | list_for_each_entry_safe(rep_sq, tmp, &rpriv->vport_sqs_list, list) { |
443 | mlx5_eswitch_del_send_to_vport_rule(rep_sq->send_to_vport_rule); | |
444 | list_del(&rep_sq->list); | |
445 | kfree(rep_sq); | |
f7a68945 MB |
446 | } |
447 | } | |
448 | ||
449 | static int mlx5e_sqs2vport_start(struct mlx5_eswitch *esw, | |
450 | struct mlx5_eswitch_rep *rep, | |
5ecadff0 | 451 | u32 *sqns_array, int sqns_num) |
f7a68945 MB |
452 | { |
453 | struct mlx5_flow_handle *flow_rule; | |
5ed99fb4 | 454 | struct mlx5e_rep_priv *rpriv; |
2c47bf80 | 455 | struct mlx5e_rep_sq *rep_sq; |
f7a68945 MB |
456 | int err; |
457 | int i; | |
458 | ||
459 | if (esw->mode != SRIOV_OFFLOADS) | |
460 | return 0; | |
461 | ||
5ed99fb4 | 462 | rpriv = mlx5e_rep_to_rep_priv(rep); |
f7a68945 | 463 | for (i = 0; i < sqns_num; i++) { |
2c47bf80 MB |
464 | rep_sq = kzalloc(sizeof(*rep_sq), GFP_KERNEL); |
465 | if (!rep_sq) { | |
f7a68945 MB |
466 | err = -ENOMEM; |
467 | goto out_err; | |
468 | } | |
469 | ||
470 | /* Add re-inject rule to the PF/representor sqs */ | |
471 | flow_rule = mlx5_eswitch_add_send_to_vport_rule(esw, | |
472 | rep->vport, | |
473 | sqns_array[i]); | |
474 | if (IS_ERR(flow_rule)) { | |
475 | err = PTR_ERR(flow_rule); | |
2c47bf80 | 476 | kfree(rep_sq); |
f7a68945 MB |
477 | goto out_err; |
478 | } | |
2c47bf80 MB |
479 | rep_sq->send_to_vport_rule = flow_rule; |
480 | list_add(&rep_sq->list, &rpriv->vport_sqs_list); | |
f7a68945 MB |
481 | } |
482 | return 0; | |
483 | ||
484 | out_err: | |
485 | mlx5e_sqs2vport_stop(esw, rep); | |
486 | return err; | |
487 | } | |
488 | ||
cb67b832 | 489 | int mlx5e_add_sqs_fwd_rules(struct mlx5e_priv *priv) |
cb67b832 HHZ |
490 | { |
491 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
1d447a39 SM |
492 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
493 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
cb67b832 | 494 | struct mlx5e_channel *c; |
9008ae07 SM |
495 | int n, tc, num_sqs = 0; |
496 | int err = -ENOMEM; | |
5ecadff0 | 497 | u32 *sqs; |
cb67b832 | 498 | |
5ecadff0 | 499 | sqs = kcalloc(priv->channels.num * priv->channels.params.num_tc, sizeof(*sqs), GFP_KERNEL); |
cb67b832 | 500 | if (!sqs) |
9008ae07 | 501 | goto out; |
cb67b832 | 502 | |
ff9c852f SM |
503 | for (n = 0; n < priv->channels.num; n++) { |
504 | c = priv->channels.c[n]; | |
cb67b832 HHZ |
505 | for (tc = 0; tc < c->num_tc; tc++) |
506 | sqs[num_sqs++] = c->sq[tc].sqn; | |
507 | } | |
508 | ||
f7a68945 | 509 | err = mlx5e_sqs2vport_start(esw, rep, sqs, num_sqs); |
cb67b832 | 510 | kfree(sqs); |
9008ae07 SM |
511 | |
512 | out: | |
513 | if (err) | |
514 | netdev_warn(priv->netdev, "Failed to add SQs FWD rules %d\n", err); | |
cb67b832 HHZ |
515 | return err; |
516 | } | |
517 | ||
cb67b832 HHZ |
518 | void mlx5e_remove_sqs_fwd_rules(struct mlx5e_priv *priv) |
519 | { | |
520 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
1d447a39 SM |
521 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
522 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
cb67b832 | 523 | |
f7a68945 | 524 | mlx5e_sqs2vport_stop(esw, rep); |
cb67b832 HHZ |
525 | } |
526 | ||
f6dfb4c3 HHZ |
527 | static void mlx5e_rep_neigh_update_init_interval(struct mlx5e_rep_priv *rpriv) |
528 | { | |
529 | #if IS_ENABLED(CONFIG_IPV6) | |
423c9db2 | 530 | unsigned long ipv6_interval = NEIGH_VAR(&nd_tbl.parms, |
f6dfb4c3 HHZ |
531 | DELAY_PROBE_TIME); |
532 | #else | |
533 | unsigned long ipv6_interval = ~0UL; | |
534 | #endif | |
535 | unsigned long ipv4_interval = NEIGH_VAR(&arp_tbl.parms, | |
536 | DELAY_PROBE_TIME); | |
5ed99fb4 | 537 | struct net_device *netdev = rpriv->netdev; |
f6dfb4c3 HHZ |
538 | struct mlx5e_priv *priv = netdev_priv(netdev); |
539 | ||
540 | rpriv->neigh_update.min_interval = min_t(unsigned long, ipv6_interval, ipv4_interval); | |
541 | mlx5_fc_update_sampling_interval(priv->mdev, rpriv->neigh_update.min_interval); | |
542 | } | |
543 | ||
544 | void mlx5e_rep_queue_neigh_stats_work(struct mlx5e_priv *priv) | |
545 | { | |
546 | struct mlx5e_rep_priv *rpriv = priv->ppriv; | |
547 | struct mlx5e_neigh_update_table *neigh_update = &rpriv->neigh_update; | |
548 | ||
549 | mlx5_fc_queue_stats_work(priv->mdev, | |
550 | &neigh_update->neigh_stats_work, | |
551 | neigh_update->min_interval); | |
552 | } | |
553 | ||
554 | static void mlx5e_rep_neigh_stats_work(struct work_struct *work) | |
555 | { | |
556 | struct mlx5e_rep_priv *rpriv = container_of(work, struct mlx5e_rep_priv, | |
557 | neigh_update.neigh_stats_work.work); | |
5ed99fb4 | 558 | struct net_device *netdev = rpriv->netdev; |
f6dfb4c3 HHZ |
559 | struct mlx5e_priv *priv = netdev_priv(netdev); |
560 | struct mlx5e_neigh_hash_entry *nhe; | |
561 | ||
562 | rtnl_lock(); | |
563 | if (!list_empty(&rpriv->neigh_update.neigh_list)) | |
564 | mlx5e_rep_queue_neigh_stats_work(priv); | |
565 | ||
566 | list_for_each_entry(nhe, &rpriv->neigh_update.neigh_list, neigh_list) | |
567 | mlx5e_tc_update_neigh_used_value(nhe); | |
568 | ||
569 | rtnl_unlock(); | |
570 | } | |
571 | ||
232c0013 HHZ |
572 | static void mlx5e_rep_neigh_entry_hold(struct mlx5e_neigh_hash_entry *nhe) |
573 | { | |
574 | refcount_inc(&nhe->refcnt); | |
575 | } | |
576 | ||
577 | static void mlx5e_rep_neigh_entry_release(struct mlx5e_neigh_hash_entry *nhe) | |
578 | { | |
579 | if (refcount_dec_and_test(&nhe->refcnt)) | |
580 | kfree(nhe); | |
581 | } | |
582 | ||
583 | static void mlx5e_rep_update_flows(struct mlx5e_priv *priv, | |
584 | struct mlx5e_encap_entry *e, | |
585 | bool neigh_connected, | |
586 | unsigned char ha[ETH_ALEN]) | |
587 | { | |
588 | struct ethhdr *eth = (struct ethhdr *)e->encap_header; | |
589 | ||
590 | ASSERT_RTNL(); | |
591 | ||
61c806da OG |
592 | if ((e->flags & MLX5_ENCAP_ENTRY_VALID) && |
593 | (!neigh_connected || !ether_addr_equal(e->h_dest, ha))) | |
232c0013 HHZ |
594 | mlx5e_tc_encap_flows_del(priv, e); |
595 | ||
596 | if (neigh_connected && !(e->flags & MLX5_ENCAP_ENTRY_VALID)) { | |
597 | ether_addr_copy(e->h_dest, ha); | |
598 | ether_addr_copy(eth->h_dest, ha); | |
599 | ||
600 | mlx5e_tc_encap_flows_add(priv, e); | |
601 | } | |
602 | } | |
603 | ||
604 | static void mlx5e_rep_neigh_update(struct work_struct *work) | |
605 | { | |
606 | struct mlx5e_neigh_hash_entry *nhe = | |
607 | container_of(work, struct mlx5e_neigh_hash_entry, neigh_update_work); | |
608 | struct neighbour *n = nhe->n; | |
609 | struct mlx5e_encap_entry *e; | |
610 | unsigned char ha[ETH_ALEN]; | |
611 | struct mlx5e_priv *priv; | |
612 | bool neigh_connected; | |
613 | bool encap_connected; | |
614 | u8 nud_state, dead; | |
615 | ||
616 | rtnl_lock(); | |
617 | ||
618 | /* If these parameters are changed after we release the lock, | |
619 | * we'll receive another event letting us know about it. | |
620 | * We use this lock to avoid inconsistency between the neigh validity | |
621 | * and it's hw address. | |
622 | */ | |
623 | read_lock_bh(&n->lock); | |
624 | memcpy(ha, n->ha, ETH_ALEN); | |
625 | nud_state = n->nud_state; | |
626 | dead = n->dead; | |
627 | read_unlock_bh(&n->lock); | |
628 | ||
629 | neigh_connected = (nud_state & NUD_VALID) && !dead; | |
630 | ||
631 | list_for_each_entry(e, &nhe->encap_list, encap_list) { | |
632 | encap_connected = !!(e->flags & MLX5_ENCAP_ENTRY_VALID); | |
633 | priv = netdev_priv(e->out_dev); | |
634 | ||
635 | if (encap_connected != neigh_connected || | |
636 | !ether_addr_equal(e->h_dest, ha)) | |
637 | mlx5e_rep_update_flows(priv, e, neigh_connected, ha); | |
638 | } | |
639 | mlx5e_rep_neigh_entry_release(nhe); | |
640 | rtnl_unlock(); | |
641 | neigh_release(n); | |
642 | } | |
643 | ||
f5bc2c5d OS |
644 | static struct mlx5e_rep_indr_block_priv * |
645 | mlx5e_rep_indr_block_priv_lookup(struct mlx5e_rep_priv *rpriv, | |
646 | struct net_device *netdev) | |
647 | { | |
648 | struct mlx5e_rep_indr_block_priv *cb_priv; | |
649 | ||
650 | /* All callback list access should be protected by RTNL. */ | |
651 | ASSERT_RTNL(); | |
652 | ||
653 | list_for_each_entry(cb_priv, | |
654 | &rpriv->uplink_priv.tc_indr_block_priv_list, | |
655 | list) | |
656 | if (cb_priv->netdev == netdev) | |
657 | return cb_priv; | |
658 | ||
659 | return NULL; | |
660 | } | |
661 | ||
662 | static void mlx5e_rep_indr_clean_block_privs(struct mlx5e_rep_priv *rpriv) | |
663 | { | |
664 | struct mlx5e_rep_indr_block_priv *cb_priv, *temp; | |
665 | struct list_head *head = &rpriv->uplink_priv.tc_indr_block_priv_list; | |
666 | ||
667 | list_for_each_entry_safe(cb_priv, temp, head, list) { | |
25f2d0e7 | 668 | mlx5e_rep_indr_unregister_block(rpriv, cb_priv->netdev); |
f5bc2c5d OS |
669 | kfree(cb_priv); |
670 | } | |
671 | } | |
672 | ||
673 | static int | |
674 | mlx5e_rep_indr_offload(struct net_device *netdev, | |
675 | struct tc_cls_flower_offload *flower, | |
676 | struct mlx5e_rep_indr_block_priv *indr_priv) | |
677 | { | |
ef381359 | 678 | struct mlx5e_priv *priv = netdev_priv(indr_priv->rpriv->netdev); |
d9ee0491 OG |
679 | int flags = MLX5E_TC_EGRESS | MLX5E_TC_ESW_OFFLOAD; |
680 | int err = 0; | |
ef381359 OS |
681 | |
682 | switch (flower->command) { | |
683 | case TC_CLSFLOWER_REPLACE: | |
d9ee0491 | 684 | err = mlx5e_configure_flower(netdev, priv, flower, flags); |
ef381359 OS |
685 | break; |
686 | case TC_CLSFLOWER_DESTROY: | |
d9ee0491 | 687 | err = mlx5e_delete_flower(netdev, priv, flower, flags); |
ef381359 OS |
688 | break; |
689 | case TC_CLSFLOWER_STATS: | |
d9ee0491 | 690 | err = mlx5e_stats_flower(netdev, priv, flower, flags); |
ef381359 OS |
691 | break; |
692 | default: | |
693 | err = -EOPNOTSUPP; | |
694 | } | |
695 | ||
696 | return err; | |
f5bc2c5d OS |
697 | } |
698 | ||
699 | static int mlx5e_rep_indr_setup_block_cb(enum tc_setup_type type, | |
700 | void *type_data, void *indr_priv) | |
701 | { | |
702 | struct mlx5e_rep_indr_block_priv *priv = indr_priv; | |
703 | ||
704 | switch (type) { | |
705 | case TC_SETUP_CLSFLOWER: | |
706 | return mlx5e_rep_indr_offload(priv->netdev, type_data, priv); | |
707 | default: | |
708 | return -EOPNOTSUPP; | |
709 | } | |
710 | } | |
711 | ||
712 | static int | |
713 | mlx5e_rep_indr_setup_tc_block(struct net_device *netdev, | |
714 | struct mlx5e_rep_priv *rpriv, | |
715 | struct tc_block_offload *f) | |
716 | { | |
717 | struct mlx5e_rep_indr_block_priv *indr_priv; | |
718 | int err = 0; | |
719 | ||
720 | if (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS) | |
721 | return -EOPNOTSUPP; | |
722 | ||
723 | switch (f->command) { | |
724 | case TC_BLOCK_BIND: | |
725 | indr_priv = mlx5e_rep_indr_block_priv_lookup(rpriv, netdev); | |
726 | if (indr_priv) | |
727 | return -EEXIST; | |
728 | ||
729 | indr_priv = kmalloc(sizeof(*indr_priv), GFP_KERNEL); | |
730 | if (!indr_priv) | |
731 | return -ENOMEM; | |
732 | ||
733 | indr_priv->netdev = netdev; | |
734 | indr_priv->rpriv = rpriv; | |
735 | list_add(&indr_priv->list, | |
736 | &rpriv->uplink_priv.tc_indr_block_priv_list); | |
737 | ||
738 | err = tcf_block_cb_register(f->block, | |
739 | mlx5e_rep_indr_setup_block_cb, | |
25f2d0e7 | 740 | indr_priv, indr_priv, f->extack); |
f5bc2c5d OS |
741 | if (err) { |
742 | list_del(&indr_priv->list); | |
743 | kfree(indr_priv); | |
744 | } | |
745 | ||
746 | return err; | |
747 | case TC_BLOCK_UNBIND: | |
25f2d0e7 EB |
748 | indr_priv = mlx5e_rep_indr_block_priv_lookup(rpriv, netdev); |
749 | if (!indr_priv) | |
750 | return -ENOENT; | |
751 | ||
f5bc2c5d OS |
752 | tcf_block_cb_unregister(f->block, |
753 | mlx5e_rep_indr_setup_block_cb, | |
25f2d0e7 EB |
754 | indr_priv); |
755 | list_del(&indr_priv->list); | |
756 | kfree(indr_priv); | |
f5bc2c5d OS |
757 | |
758 | return 0; | |
759 | default: | |
760 | return -EOPNOTSUPP; | |
761 | } | |
762 | return 0; | |
763 | } | |
764 | ||
765 | static | |
766 | int mlx5e_rep_indr_setup_tc_cb(struct net_device *netdev, void *cb_priv, | |
767 | enum tc_setup_type type, void *type_data) | |
768 | { | |
769 | switch (type) { | |
770 | case TC_SETUP_BLOCK: | |
771 | return mlx5e_rep_indr_setup_tc_block(netdev, cb_priv, | |
772 | type_data); | |
773 | default: | |
774 | return -EOPNOTSUPP; | |
775 | } | |
776 | } | |
777 | ||
778 | static int mlx5e_rep_indr_register_block(struct mlx5e_rep_priv *rpriv, | |
779 | struct net_device *netdev) | |
780 | { | |
781 | int err; | |
782 | ||
783 | err = __tc_indr_block_cb_register(netdev, rpriv, | |
784 | mlx5e_rep_indr_setup_tc_cb, | |
25f2d0e7 | 785 | rpriv); |
f5bc2c5d OS |
786 | if (err) { |
787 | struct mlx5e_priv *priv = netdev_priv(rpriv->netdev); | |
788 | ||
789 | mlx5_core_err(priv->mdev, "Failed to register remote block notifier for %s err=%d\n", | |
790 | netdev_name(netdev), err); | |
791 | } | |
792 | return err; | |
793 | } | |
794 | ||
25f2d0e7 EB |
795 | static void mlx5e_rep_indr_unregister_block(struct mlx5e_rep_priv *rpriv, |
796 | struct net_device *netdev) | |
f5bc2c5d OS |
797 | { |
798 | __tc_indr_block_cb_unregister(netdev, mlx5e_rep_indr_setup_tc_cb, | |
25f2d0e7 | 799 | rpriv); |
f5bc2c5d OS |
800 | } |
801 | ||
802 | static int mlx5e_nic_rep_netdevice_event(struct notifier_block *nb, | |
803 | unsigned long event, void *ptr) | |
804 | { | |
805 | struct mlx5e_rep_priv *rpriv = container_of(nb, struct mlx5e_rep_priv, | |
806 | uplink_priv.netdevice_nb); | |
807 | struct mlx5e_priv *priv = netdev_priv(rpriv->netdev); | |
808 | struct net_device *netdev = netdev_notifier_info_to_dev(ptr); | |
809 | ||
810 | if (!mlx5e_tc_tun_device_to_offload(priv, netdev)) | |
811 | return NOTIFY_OK; | |
812 | ||
813 | switch (event) { | |
814 | case NETDEV_REGISTER: | |
815 | mlx5e_rep_indr_register_block(rpriv, netdev); | |
816 | break; | |
817 | case NETDEV_UNREGISTER: | |
25f2d0e7 | 818 | mlx5e_rep_indr_unregister_block(rpriv, netdev); |
f5bc2c5d OS |
819 | break; |
820 | } | |
821 | return NOTIFY_OK; | |
822 | } | |
823 | ||
232c0013 HHZ |
824 | static struct mlx5e_neigh_hash_entry * |
825 | mlx5e_rep_neigh_entry_lookup(struct mlx5e_priv *priv, | |
826 | struct mlx5e_neigh *m_neigh); | |
827 | ||
828 | static int mlx5e_rep_netevent_event(struct notifier_block *nb, | |
829 | unsigned long event, void *ptr) | |
830 | { | |
831 | struct mlx5e_rep_priv *rpriv = container_of(nb, struct mlx5e_rep_priv, | |
832 | neigh_update.netevent_nb); | |
833 | struct mlx5e_neigh_update_table *neigh_update = &rpriv->neigh_update; | |
5ed99fb4 | 834 | struct net_device *netdev = rpriv->netdev; |
232c0013 HHZ |
835 | struct mlx5e_priv *priv = netdev_priv(netdev); |
836 | struct mlx5e_neigh_hash_entry *nhe = NULL; | |
837 | struct mlx5e_neigh m_neigh = {}; | |
a2fa1fe5 | 838 | struct neigh_parms *p; |
232c0013 | 839 | struct neighbour *n; |
a2fa1fe5 | 840 | bool found = false; |
232c0013 HHZ |
841 | |
842 | switch (event) { | |
843 | case NETEVENT_NEIGH_UPDATE: | |
844 | n = ptr; | |
845 | #if IS_ENABLED(CONFIG_IPV6) | |
423c9db2 | 846 | if (n->tbl != &nd_tbl && n->tbl != &arp_tbl) |
232c0013 HHZ |
847 | #else |
848 | if (n->tbl != &arp_tbl) | |
849 | #endif | |
850 | return NOTIFY_DONE; | |
851 | ||
852 | m_neigh.dev = n->dev; | |
f6dfb4c3 | 853 | m_neigh.family = n->ops->family; |
232c0013 HHZ |
854 | memcpy(&m_neigh.dst_ip, n->primary_key, n->tbl->key_len); |
855 | ||
856 | /* We are in atomic context and can't take RTNL mutex, so use | |
857 | * spin_lock_bh to lookup the neigh table. bh is used since | |
858 | * netevent can be called from a softirq context. | |
859 | */ | |
860 | spin_lock_bh(&neigh_update->encap_lock); | |
861 | nhe = mlx5e_rep_neigh_entry_lookup(priv, &m_neigh); | |
862 | if (!nhe) { | |
863 | spin_unlock_bh(&neigh_update->encap_lock); | |
864 | return NOTIFY_DONE; | |
865 | } | |
866 | ||
867 | /* This assignment is valid as long as the the neigh reference | |
868 | * is taken | |
869 | */ | |
870 | nhe->n = n; | |
871 | ||
872 | /* Take a reference to ensure the neighbour and mlx5 encap | |
873 | * entry won't be destructed until we drop the reference in | |
874 | * delayed work. | |
875 | */ | |
876 | neigh_hold(n); | |
877 | mlx5e_rep_neigh_entry_hold(nhe); | |
878 | ||
879 | if (!queue_work(priv->wq, &nhe->neigh_update_work)) { | |
880 | mlx5e_rep_neigh_entry_release(nhe); | |
881 | neigh_release(n); | |
882 | } | |
883 | spin_unlock_bh(&neigh_update->encap_lock); | |
884 | break; | |
a2fa1fe5 HHZ |
885 | |
886 | case NETEVENT_DELAY_PROBE_TIME_UPDATE: | |
887 | p = ptr; | |
888 | ||
889 | /* We check the device is present since we don't care about | |
890 | * changes in the default table, we only care about changes | |
891 | * done per device delay prob time parameter. | |
892 | */ | |
893 | #if IS_ENABLED(CONFIG_IPV6) | |
423c9db2 | 894 | if (!p->dev || (p->tbl != &nd_tbl && p->tbl != &arp_tbl)) |
a2fa1fe5 HHZ |
895 | #else |
896 | if (!p->dev || p->tbl != &arp_tbl) | |
897 | #endif | |
898 | return NOTIFY_DONE; | |
899 | ||
900 | /* We are in atomic context and can't take RTNL mutex, | |
901 | * so use spin_lock_bh to walk the neigh list and look for | |
902 | * the relevant device. bh is used since netevent can be | |
903 | * called from a softirq context. | |
904 | */ | |
905 | spin_lock_bh(&neigh_update->encap_lock); | |
906 | list_for_each_entry(nhe, &neigh_update->neigh_list, neigh_list) { | |
907 | if (p->dev == nhe->m_neigh.dev) { | |
908 | found = true; | |
909 | break; | |
910 | } | |
911 | } | |
912 | spin_unlock_bh(&neigh_update->encap_lock); | |
913 | if (!found) | |
914 | return NOTIFY_DONE; | |
915 | ||
916 | neigh_update->min_interval = min_t(unsigned long, | |
917 | NEIGH_VAR(p, DELAY_PROBE_TIME), | |
918 | neigh_update->min_interval); | |
919 | mlx5_fc_update_sampling_interval(priv->mdev, | |
920 | neigh_update->min_interval); | |
921 | break; | |
232c0013 HHZ |
922 | } |
923 | return NOTIFY_DONE; | |
924 | } | |
925 | ||
37b498ff HHZ |
926 | static const struct rhashtable_params mlx5e_neigh_ht_params = { |
927 | .head_offset = offsetof(struct mlx5e_neigh_hash_entry, rhash_node), | |
928 | .key_offset = offsetof(struct mlx5e_neigh_hash_entry, m_neigh), | |
929 | .key_len = sizeof(struct mlx5e_neigh), | |
930 | .automatic_shrinking = true, | |
931 | }; | |
932 | ||
933 | static int mlx5e_rep_neigh_init(struct mlx5e_rep_priv *rpriv) | |
934 | { | |
935 | struct mlx5e_neigh_update_table *neigh_update = &rpriv->neigh_update; | |
232c0013 HHZ |
936 | int err; |
937 | ||
938 | err = rhashtable_init(&neigh_update->neigh_ht, &mlx5e_neigh_ht_params); | |
939 | if (err) | |
940 | return err; | |
37b498ff HHZ |
941 | |
942 | INIT_LIST_HEAD(&neigh_update->neigh_list); | |
232c0013 | 943 | spin_lock_init(&neigh_update->encap_lock); |
f6dfb4c3 HHZ |
944 | INIT_DELAYED_WORK(&neigh_update->neigh_stats_work, |
945 | mlx5e_rep_neigh_stats_work); | |
946 | mlx5e_rep_neigh_update_init_interval(rpriv); | |
232c0013 HHZ |
947 | |
948 | rpriv->neigh_update.netevent_nb.notifier_call = mlx5e_rep_netevent_event; | |
949 | err = register_netevent_notifier(&rpriv->neigh_update.netevent_nb); | |
950 | if (err) | |
951 | goto out_err; | |
952 | return 0; | |
953 | ||
954 | out_err: | |
955 | rhashtable_destroy(&neigh_update->neigh_ht); | |
956 | return err; | |
37b498ff HHZ |
957 | } |
958 | ||
959 | static void mlx5e_rep_neigh_cleanup(struct mlx5e_rep_priv *rpriv) | |
960 | { | |
961 | struct mlx5e_neigh_update_table *neigh_update = &rpriv->neigh_update; | |
5ed99fb4 | 962 | struct mlx5e_priv *priv = netdev_priv(rpriv->netdev); |
232c0013 HHZ |
963 | |
964 | unregister_netevent_notifier(&neigh_update->netevent_nb); | |
965 | ||
966 | flush_workqueue(priv->wq); /* flush neigh update works */ | |
37b498ff | 967 | |
f6dfb4c3 HHZ |
968 | cancel_delayed_work_sync(&rpriv->neigh_update.neigh_stats_work); |
969 | ||
37b498ff HHZ |
970 | rhashtable_destroy(&neigh_update->neigh_ht); |
971 | } | |
972 | ||
973 | static int mlx5e_rep_neigh_entry_insert(struct mlx5e_priv *priv, | |
974 | struct mlx5e_neigh_hash_entry *nhe) | |
975 | { | |
976 | struct mlx5e_rep_priv *rpriv = priv->ppriv; | |
977 | int err; | |
978 | ||
979 | err = rhashtable_insert_fast(&rpriv->neigh_update.neigh_ht, | |
980 | &nhe->rhash_node, | |
981 | mlx5e_neigh_ht_params); | |
982 | if (err) | |
983 | return err; | |
984 | ||
985 | list_add(&nhe->neigh_list, &rpriv->neigh_update.neigh_list); | |
986 | ||
987 | return err; | |
988 | } | |
989 | ||
990 | static void mlx5e_rep_neigh_entry_remove(struct mlx5e_priv *priv, | |
991 | struct mlx5e_neigh_hash_entry *nhe) | |
992 | { | |
993 | struct mlx5e_rep_priv *rpriv = priv->ppriv; | |
994 | ||
232c0013 HHZ |
995 | spin_lock_bh(&rpriv->neigh_update.encap_lock); |
996 | ||
37b498ff HHZ |
997 | list_del(&nhe->neigh_list); |
998 | ||
999 | rhashtable_remove_fast(&rpriv->neigh_update.neigh_ht, | |
1000 | &nhe->rhash_node, | |
1001 | mlx5e_neigh_ht_params); | |
232c0013 | 1002 | spin_unlock_bh(&rpriv->neigh_update.encap_lock); |
37b498ff HHZ |
1003 | } |
1004 | ||
232c0013 HHZ |
1005 | /* This function must only be called under RTNL lock or under the |
1006 | * representor's encap_lock in case RTNL mutex can't be held. | |
1007 | */ | |
37b498ff HHZ |
1008 | static struct mlx5e_neigh_hash_entry * |
1009 | mlx5e_rep_neigh_entry_lookup(struct mlx5e_priv *priv, | |
1010 | struct mlx5e_neigh *m_neigh) | |
1011 | { | |
1012 | struct mlx5e_rep_priv *rpriv = priv->ppriv; | |
1013 | struct mlx5e_neigh_update_table *neigh_update = &rpriv->neigh_update; | |
1014 | ||
1015 | return rhashtable_lookup_fast(&neigh_update->neigh_ht, m_neigh, | |
1016 | mlx5e_neigh_ht_params); | |
1017 | } | |
1018 | ||
232c0013 HHZ |
1019 | static int mlx5e_rep_neigh_entry_create(struct mlx5e_priv *priv, |
1020 | struct mlx5e_encap_entry *e, | |
1021 | struct mlx5e_neigh_hash_entry **nhe) | |
1022 | { | |
1023 | int err; | |
1024 | ||
1025 | *nhe = kzalloc(sizeof(**nhe), GFP_KERNEL); | |
1026 | if (!*nhe) | |
1027 | return -ENOMEM; | |
1028 | ||
1029 | memcpy(&(*nhe)->m_neigh, &e->m_neigh, sizeof(e->m_neigh)); | |
1030 | INIT_WORK(&(*nhe)->neigh_update_work, mlx5e_rep_neigh_update); | |
1031 | INIT_LIST_HEAD(&(*nhe)->encap_list); | |
1032 | refcount_set(&(*nhe)->refcnt, 1); | |
1033 | ||
1034 | err = mlx5e_rep_neigh_entry_insert(priv, *nhe); | |
1035 | if (err) | |
1036 | goto out_free; | |
1037 | return 0; | |
1038 | ||
1039 | out_free: | |
1040 | kfree(*nhe); | |
1041 | return err; | |
1042 | } | |
1043 | ||
1044 | static void mlx5e_rep_neigh_entry_destroy(struct mlx5e_priv *priv, | |
1045 | struct mlx5e_neigh_hash_entry *nhe) | |
1046 | { | |
1047 | /* The neigh hash entry must be removed from the hash table regardless | |
1048 | * of the reference count value, so it won't be found by the next | |
1049 | * neigh notification call. The neigh hash entry reference count is | |
1050 | * incremented only during creation and neigh notification calls and | |
1051 | * protects from freeing the nhe struct. | |
1052 | */ | |
1053 | mlx5e_rep_neigh_entry_remove(priv, nhe); | |
1054 | mlx5e_rep_neigh_entry_release(nhe); | |
1055 | } | |
1056 | ||
1057 | int mlx5e_rep_encap_entry_attach(struct mlx5e_priv *priv, | |
1058 | struct mlx5e_encap_entry *e) | |
1059 | { | |
1060 | struct mlx5e_neigh_hash_entry *nhe; | |
1061 | int err; | |
1062 | ||
1063 | nhe = mlx5e_rep_neigh_entry_lookup(priv, &e->m_neigh); | |
1064 | if (!nhe) { | |
1065 | err = mlx5e_rep_neigh_entry_create(priv, e, &nhe); | |
1066 | if (err) | |
1067 | return err; | |
1068 | } | |
1069 | list_add(&e->encap_list, &nhe->encap_list); | |
1070 | return 0; | |
1071 | } | |
1072 | ||
1073 | void mlx5e_rep_encap_entry_detach(struct mlx5e_priv *priv, | |
1074 | struct mlx5e_encap_entry *e) | |
1075 | { | |
1076 | struct mlx5e_neigh_hash_entry *nhe; | |
1077 | ||
1078 | list_del(&e->encap_list); | |
1079 | nhe = mlx5e_rep_neigh_entry_lookup(priv, &e->m_neigh); | |
1080 | ||
1081 | if (list_empty(&nhe->encap_list)) | |
1082 | mlx5e_rep_neigh_entry_destroy(priv, nhe); | |
1083 | } | |
1084 | ||
d9ee0491 | 1085 | static int mlx5e_vf_rep_open(struct net_device *dev) |
20a1ea67 OG |
1086 | { |
1087 | struct mlx5e_priv *priv = netdev_priv(dev); | |
1d447a39 SM |
1088 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
1089 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
20a1ea67 OG |
1090 | int err; |
1091 | ||
63bfd399 EBE |
1092 | mutex_lock(&priv->state_lock); |
1093 | err = mlx5e_open_locked(dev); | |
20a1ea67 | 1094 | if (err) |
63bfd399 | 1095 | goto unlock; |
20a1ea67 | 1096 | |
84c9c8f2 | 1097 | if (!mlx5_modify_vport_admin_state(priv->mdev, |
cc9c82a8 EBE |
1098 | MLX5_VPORT_STATE_OP_MOD_ESW_VPORT, |
1099 | rep->vport, MLX5_VPORT_ADMIN_STATE_UP)) | |
20a1ea67 OG |
1100 | netif_carrier_on(dev); |
1101 | ||
63bfd399 EBE |
1102 | unlock: |
1103 | mutex_unlock(&priv->state_lock); | |
1104 | return err; | |
20a1ea67 OG |
1105 | } |
1106 | ||
d9ee0491 | 1107 | static int mlx5e_vf_rep_close(struct net_device *dev) |
20a1ea67 OG |
1108 | { |
1109 | struct mlx5e_priv *priv = netdev_priv(dev); | |
1d447a39 SM |
1110 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
1111 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
63bfd399 | 1112 | int ret; |
20a1ea67 | 1113 | |
63bfd399 | 1114 | mutex_lock(&priv->state_lock); |
84c9c8f2 | 1115 | mlx5_modify_vport_admin_state(priv->mdev, |
cc9c82a8 EBE |
1116 | MLX5_VPORT_STATE_OP_MOD_ESW_VPORT, |
1117 | rep->vport, MLX5_VPORT_ADMIN_STATE_DOWN); | |
63bfd399 EBE |
1118 | ret = mlx5e_close_locked(dev); |
1119 | mutex_unlock(&priv->state_lock); | |
1120 | return ret; | |
20a1ea67 OG |
1121 | } |
1122 | ||
cb67b832 HHZ |
1123 | static int mlx5e_rep_get_phys_port_name(struct net_device *dev, |
1124 | char *buf, size_t len) | |
1125 | { | |
1126 | struct mlx5e_priv *priv = netdev_priv(dev); | |
1d447a39 SM |
1127 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
1128 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
cb67b832 HHZ |
1129 | int ret; |
1130 | ||
1131 | ret = snprintf(buf, len, "%d", rep->vport - 1); | |
1132 | if (ret >= len) | |
1133 | return -EOPNOTSUPP; | |
1134 | ||
1135 | return 0; | |
1136 | } | |
1137 | ||
de4784ca | 1138 | static int |
855afa09 | 1139 | mlx5e_rep_setup_tc_cls_flower(struct mlx5e_priv *priv, |
60bd4af8 | 1140 | struct tc_cls_flower_offload *cls_flower, int flags) |
d957b4e3 | 1141 | { |
8c818c27 JP |
1142 | switch (cls_flower->command) { |
1143 | case TC_CLSFLOWER_REPLACE: | |
71d82d2a OS |
1144 | return mlx5e_configure_flower(priv->netdev, priv, cls_flower, |
1145 | flags); | |
8c818c27 | 1146 | case TC_CLSFLOWER_DESTROY: |
71d82d2a OS |
1147 | return mlx5e_delete_flower(priv->netdev, priv, cls_flower, |
1148 | flags); | |
8c818c27 | 1149 | case TC_CLSFLOWER_STATS: |
71d82d2a OS |
1150 | return mlx5e_stats_flower(priv->netdev, priv, cls_flower, |
1151 | flags); | |
60bd4af8 OG |
1152 | default: |
1153 | return -EOPNOTSUPP; | |
1154 | } | |
1155 | } | |
1156 | ||
855afa09 JP |
1157 | static int mlx5e_rep_setup_tc_cb(enum tc_setup_type type, void *type_data, |
1158 | void *cb_priv) | |
1159 | { | |
1160 | struct mlx5e_priv *priv = cb_priv; | |
1161 | ||
1162 | switch (type) { | |
1163 | case TC_SETUP_CLSFLOWER: | |
d9ee0491 OG |
1164 | return mlx5e_rep_setup_tc_cls_flower(priv, type_data, MLX5E_TC_INGRESS | |
1165 | MLX5E_TC_ESW_OFFLOAD); | |
855afa09 JP |
1166 | default: |
1167 | return -EOPNOTSUPP; | |
1168 | } | |
1169 | } | |
1170 | ||
1171 | static int mlx5e_rep_setup_tc_block(struct net_device *dev, | |
1172 | struct tc_block_offload *f) | |
1173 | { | |
1174 | struct mlx5e_priv *priv = netdev_priv(dev); | |
1175 | ||
1176 | if (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS) | |
1177 | return -EOPNOTSUPP; | |
1178 | ||
1179 | switch (f->command) { | |
1180 | case TC_BLOCK_BIND: | |
1181 | return tcf_block_cb_register(f->block, mlx5e_rep_setup_tc_cb, | |
60513bd8 | 1182 | priv, priv, f->extack); |
855afa09 JP |
1183 | case TC_BLOCK_UNBIND: |
1184 | tcf_block_cb_unregister(f->block, mlx5e_rep_setup_tc_cb, priv); | |
1185 | return 0; | |
1186 | default: | |
1187 | return -EOPNOTSUPP; | |
1188 | } | |
1189 | } | |
1190 | ||
8c818c27 | 1191 | static int mlx5e_rep_setup_tc(struct net_device *dev, enum tc_setup_type type, |
de4784ca | 1192 | void *type_data) |
8c818c27 | 1193 | { |
2572ac53 | 1194 | switch (type) { |
855afa09 JP |
1195 | case TC_SETUP_BLOCK: |
1196 | return mlx5e_rep_setup_tc_block(dev, type_data); | |
d957b4e3 OG |
1197 | default: |
1198 | return -EOPNOTSUPP; | |
1199 | } | |
1200 | } | |
1201 | ||
370bad0f OG |
1202 | bool mlx5e_is_uplink_rep(struct mlx5e_priv *priv) |
1203 | { | |
1d447a39 SM |
1204 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
1205 | struct mlx5_eswitch_rep *rep; | |
1206 | ||
733d3e54 | 1207 | if (!MLX5_ESWITCH_MANAGER(priv->mdev)) |
1d447a39 | 1208 | return false; |
370bad0f | 1209 | |
d9ee0491 OG |
1210 | if (!rpriv) /* non vport rep mlx5e instances don't use this field */ |
1211 | return false; | |
370bad0f | 1212 | |
d9ee0491 OG |
1213 | rep = rpriv->rep; |
1214 | return (rep->vport == FDB_UPLINK_VPORT); | |
370bad0f OG |
1215 | } |
1216 | ||
13e509a4 | 1217 | static bool mlx5e_rep_has_offload_stats(const struct net_device *dev, int attr_id) |
370bad0f | 1218 | { |
370bad0f OG |
1219 | switch (attr_id) { |
1220 | case IFLA_OFFLOAD_XSTATS_CPU_HIT: | |
370bad0f OG |
1221 | return true; |
1222 | } | |
1223 | ||
1224 | return false; | |
1225 | } | |
1226 | ||
1227 | static int | |
1228 | mlx5e_get_sw_stats64(const struct net_device *dev, | |
1229 | struct rtnl_link_stats64 *stats) | |
1230 | { | |
1231 | struct mlx5e_priv *priv = netdev_priv(dev); | |
1232 | struct mlx5e_sw_stats *sstats = &priv->stats.sw; | |
1233 | ||
868a01a2 SL |
1234 | mlx5e_rep_update_sw_counters(priv); |
1235 | ||
370bad0f OG |
1236 | stats->rx_packets = sstats->rx_packets; |
1237 | stats->rx_bytes = sstats->rx_bytes; | |
1238 | stats->tx_packets = sstats->tx_packets; | |
1239 | stats->tx_bytes = sstats->tx_bytes; | |
1240 | ||
1241 | stats->tx_dropped = sstats->tx_queue_dropped; | |
1242 | ||
1243 | return 0; | |
1244 | } | |
1245 | ||
13e509a4 OG |
1246 | static int mlx5e_rep_get_offload_stats(int attr_id, const struct net_device *dev, |
1247 | void *sp) | |
370bad0f OG |
1248 | { |
1249 | switch (attr_id) { | |
1250 | case IFLA_OFFLOAD_XSTATS_CPU_HIT: | |
1251 | return mlx5e_get_sw_stats64(dev, sp); | |
1252 | } | |
1253 | ||
1254 | return -EINVAL; | |
1255 | } | |
1256 | ||
bc1f4470 | 1257 | static void |
d9ee0491 | 1258 | mlx5e_vf_rep_get_stats(struct net_device *dev, struct rtnl_link_stats64 *stats) |
370bad0f OG |
1259 | { |
1260 | struct mlx5e_priv *priv = netdev_priv(dev); | |
1261 | ||
ed56c519 | 1262 | /* update HW stats in background for next time */ |
cdeef2b1 | 1263 | mlx5e_queue_update_stats(priv); |
370bad0f | 1264 | memcpy(stats, &priv->stats.vf_vport, sizeof(*stats)); |
370bad0f OG |
1265 | } |
1266 | ||
d9ee0491 OG |
1267 | static int mlx5e_vf_rep_change_mtu(struct net_device *netdev, int new_mtu) |
1268 | { | |
1269 | return mlx5e_change_mtu(netdev, new_mtu, NULL); | |
1270 | } | |
1271 | ||
b36cdb42 | 1272 | static int mlx5e_uplink_rep_change_mtu(struct net_device *netdev, int new_mtu) |
d9ee0491 | 1273 | { |
b36cdb42 | 1274 | return mlx5e_change_mtu(netdev, new_mtu, mlx5e_set_dev_port_mtu); |
d9ee0491 OG |
1275 | } |
1276 | ||
b36cdb42 | 1277 | static int mlx5e_uplink_rep_set_mac(struct net_device *netdev, void *addr) |
d9ee0491 | 1278 | { |
b36cdb42 OG |
1279 | struct sockaddr *saddr = addr; |
1280 | ||
1281 | if (!is_valid_ether_addr(saddr->sa_data)) | |
1282 | return -EADDRNOTAVAIL; | |
1283 | ||
1284 | ether_addr_copy(netdev->dev_addr, saddr->sa_data); | |
1285 | return 0; | |
d9ee0491 OG |
1286 | } |
1287 | ||
cb67b832 HHZ |
1288 | static const struct switchdev_ops mlx5e_rep_switchdev_ops = { |
1289 | .switchdev_port_attr_get = mlx5e_attr_get, | |
1290 | }; | |
1291 | ||
d9ee0491 OG |
1292 | static const struct net_device_ops mlx5e_netdev_ops_vf_rep = { |
1293 | .ndo_open = mlx5e_vf_rep_open, | |
1294 | .ndo_stop = mlx5e_vf_rep_close, | |
1295 | .ndo_start_xmit = mlx5e_xmit, | |
1296 | .ndo_get_phys_port_name = mlx5e_rep_get_phys_port_name, | |
1297 | .ndo_setup_tc = mlx5e_rep_setup_tc, | |
1298 | .ndo_get_stats64 = mlx5e_vf_rep_get_stats, | |
13e509a4 OG |
1299 | .ndo_has_offload_stats = mlx5e_rep_has_offload_stats, |
1300 | .ndo_get_offload_stats = mlx5e_rep_get_offload_stats, | |
d9ee0491 OG |
1301 | .ndo_change_mtu = mlx5e_vf_rep_change_mtu, |
1302 | }; | |
250a42b6 | 1303 | |
d9ee0491 | 1304 | static const struct net_device_ops mlx5e_netdev_ops_uplink_rep = { |
b36cdb42 | 1305 | .ndo_open = mlx5e_open, |
d9ee0491 | 1306 | .ndo_stop = mlx5e_close, |
cb67b832 | 1307 | .ndo_start_xmit = mlx5e_xmit, |
b36cdb42 | 1308 | .ndo_set_mac_address = mlx5e_uplink_rep_set_mac, |
cb67b832 | 1309 | .ndo_get_phys_port_name = mlx5e_rep_get_phys_port_name, |
8c818c27 | 1310 | .ndo_setup_tc = mlx5e_rep_setup_tc, |
d9ee0491 | 1311 | .ndo_get_stats64 = mlx5e_get_stats, |
13e509a4 OG |
1312 | .ndo_has_offload_stats = mlx5e_rep_has_offload_stats, |
1313 | .ndo_get_offload_stats = mlx5e_rep_get_offload_stats, | |
d9ee0491 | 1314 | .ndo_change_mtu = mlx5e_uplink_rep_change_mtu, |
073caf50 OG |
1315 | .ndo_udp_tunnel_add = mlx5e_add_vxlan_port, |
1316 | .ndo_udp_tunnel_del = mlx5e_del_vxlan_port, | |
1317 | .ndo_features_check = mlx5e_features_check, | |
1318 | .ndo_set_vf_mac = mlx5e_set_vf_mac, | |
1319 | .ndo_set_vf_rate = mlx5e_set_vf_rate, | |
1320 | .ndo_get_vf_config = mlx5e_get_vf_config, | |
1321 | .ndo_get_vf_stats = mlx5e_get_vf_stats, | |
cb67b832 HHZ |
1322 | }; |
1323 | ||
a0646c88 EB |
1324 | bool mlx5e_eswitch_rep(struct net_device *netdev) |
1325 | { | |
1326 | if (netdev->netdev_ops == &mlx5e_netdev_ops_vf_rep || | |
1327 | netdev->netdev_ops == &mlx5e_netdev_ops_uplink_rep) | |
1328 | return true; | |
1329 | ||
1330 | return false; | |
1331 | } | |
1332 | ||
025380b2 | 1333 | static void mlx5e_build_rep_params(struct net_device *netdev) |
cb67b832 | 1334 | { |
025380b2 | 1335 | struct mlx5e_priv *priv = netdev_priv(netdev); |
d9ee0491 OG |
1336 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
1337 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
025380b2 OG |
1338 | struct mlx5_core_dev *mdev = priv->mdev; |
1339 | struct mlx5e_params *params; | |
1340 | ||
cb67b832 HHZ |
1341 | u8 cq_period_mode = MLX5_CAP_GEN(mdev, cq_period_start_from_cqe) ? |
1342 | MLX5_CQ_PERIOD_MODE_START_FROM_CQE : | |
1343 | MLX5_CQ_PERIOD_MODE_START_FROM_EQE; | |
1344 | ||
025380b2 | 1345 | params = &priv->channels.params; |
472a1e44 | 1346 | params->hard_mtu = MLX5E_ETH_HARD_MTU; |
025380b2 | 1347 | params->sw_mtu = netdev->mtu; |
d9ee0491 OG |
1348 | |
1349 | /* SQ */ | |
1350 | if (rep->vport == FDB_UPLINK_VPORT) | |
1351 | params->log_sq_size = MLX5E_PARAMS_DEFAULT_LOG_SQ_SIZE; | |
1352 | else | |
5d1f7354 | 1353 | params->log_sq_size = MLX5E_REP_PARAMS_DEF_LOG_SQ_SIZE; |
cb67b832 | 1354 | |
749359f4 GT |
1355 | /* RQ */ |
1356 | mlx5e_build_rq_params(mdev, params); | |
1357 | ||
1358 | /* CQ moderation params */ | |
9a317425 | 1359 | params->rx_dim_enabled = MLX5_CAP_GEN(mdev, cq_moderation); |
6a9764ef | 1360 | mlx5e_set_rx_cq_mode_params(params, cq_period_mode); |
cb67b832 | 1361 | |
6a9764ef | 1362 | params->num_tc = 1; |
5f195c2c CM |
1363 | |
1364 | mlx5_query_min_inline(mdev, ¶ms->tx_min_inline_mode); | |
84a09733 GT |
1365 | |
1366 | /* RSS */ | |
025380b2 | 1367 | mlx5e_build_rss_params(&priv->rss_params, params->num_channels); |
cb67b832 HHZ |
1368 | } |
1369 | ||
1370 | static void mlx5e_build_rep_netdev(struct net_device *netdev) | |
1371 | { | |
250a42b6 | 1372 | struct mlx5e_priv *priv = netdev_priv(netdev); |
d9ee0491 OG |
1373 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
1374 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
250a42b6 | 1375 | struct mlx5_core_dev *mdev = priv->mdev; |
250a42b6 | 1376 | |
d9ee0491 OG |
1377 | if (rep->vport == FDB_UPLINK_VPORT) { |
1378 | SET_NETDEV_DEV(netdev, &priv->mdev->pdev->dev); | |
1379 | netdev->netdev_ops = &mlx5e_netdev_ops_uplink_rep; | |
1380 | /* we want a persistent mac for the uplink rep */ | |
1381 | mlx5_query_nic_vport_mac_address(mdev, 0, netdev->dev_addr); | |
ff9b85de | 1382 | netdev->ethtool_ops = &mlx5e_uplink_rep_ethtool_ops; |
b36cdb42 OG |
1383 | #ifdef CONFIG_MLX5_CORE_EN_DCB |
1384 | if (MLX5_CAP_GEN(mdev, qos)) | |
1385 | netdev->dcbnl_ops = &mlx5e_dcbnl_ops; | |
1386 | #endif | |
d9ee0491 OG |
1387 | } else { |
1388 | netdev->netdev_ops = &mlx5e_netdev_ops_vf_rep; | |
1389 | eth_hw_addr_random(netdev); | |
ff9b85de | 1390 | netdev->ethtool_ops = &mlx5e_vf_rep_ethtool_ops; |
d9ee0491 | 1391 | } |
cb67b832 HHZ |
1392 | |
1393 | netdev->watchdog_timeo = 15 * HZ; | |
1394 | ||
cb67b832 | 1395 | |
cb67b832 | 1396 | netdev->switchdev_ops = &mlx5e_rep_switchdev_ops; |
cb67b832 | 1397 | |
1ee4457c | 1398 | netdev->features |= NETIF_F_HW_TC | NETIF_F_NETNS_LOCAL; |
d957b4e3 | 1399 | netdev->hw_features |= NETIF_F_HW_TC; |
cb67b832 | 1400 | |
dabeb3b0 GT |
1401 | netdev->hw_features |= NETIF_F_SG; |
1402 | netdev->hw_features |= NETIF_F_IP_CSUM; | |
1403 | netdev->hw_features |= NETIF_F_IPV6_CSUM; | |
1404 | netdev->hw_features |= NETIF_F_GRO; | |
1405 | netdev->hw_features |= NETIF_F_TSO; | |
1406 | netdev->hw_features |= NETIF_F_TSO6; | |
1407 | netdev->hw_features |= NETIF_F_RXCSUM; | |
1408 | ||
1ee4457c OG |
1409 | if (rep->vport != FDB_UPLINK_VPORT) |
1410 | netdev->features |= NETIF_F_VLAN_CHALLENGED; | |
1411 | ||
dabeb3b0 | 1412 | netdev->features |= netdev->hw_features; |
cb67b832 HHZ |
1413 | } |
1414 | ||
182570b2 FD |
1415 | static int mlx5e_init_rep(struct mlx5_core_dev *mdev, |
1416 | struct net_device *netdev, | |
1417 | const struct mlx5e_profile *profile, | |
1418 | void *ppriv) | |
cb67b832 | 1419 | { |
6a9764ef | 1420 | struct mlx5e_priv *priv = netdev_priv(netdev); |
182570b2 | 1421 | int err; |
6a9764ef | 1422 | |
519a0bf5 | 1423 | err = mlx5e_netdev_init(netdev, priv, mdev, profile, ppriv); |
182570b2 FD |
1424 | if (err) |
1425 | return err; | |
6a9764ef | 1426 | |
8956f001 | 1427 | priv->channels.params.num_channels = MLX5E_REP_PARAMS_DEF_NUM_CHANNELS; |
c139dbfd | 1428 | |
025380b2 | 1429 | mlx5e_build_rep_params(netdev); |
cb67b832 | 1430 | mlx5e_build_rep_netdev(netdev); |
237f258c FD |
1431 | |
1432 | mlx5e_timestamp_init(priv); | |
182570b2 FD |
1433 | |
1434 | return 0; | |
1435 | } | |
1436 | ||
1437 | static void mlx5e_cleanup_rep(struct mlx5e_priv *priv) | |
1438 | { | |
1439 | mlx5e_netdev_cleanup(priv->netdev, priv); | |
cb67b832 HHZ |
1440 | } |
1441 | ||
84a09733 GT |
1442 | static int mlx5e_create_rep_ttc_table(struct mlx5e_priv *priv) |
1443 | { | |
1444 | struct ttc_params ttc_params = {}; | |
1445 | int tt, err; | |
1446 | ||
1447 | priv->fs.ns = mlx5_get_flow_namespace(priv->mdev, | |
1448 | MLX5_FLOW_NAMESPACE_KERNEL); | |
1449 | ||
1450 | /* The inner_ttc in the ttc params is intentionally not set */ | |
1451 | ttc_params.any_tt_tirn = priv->direct_tir[0].tirn; | |
1452 | mlx5e_set_ttc_ft_params(&ttc_params); | |
1453 | for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) | |
1454 | ttc_params.indir_tirn[tt] = priv->indir_tir[tt].tirn; | |
1455 | ||
1456 | err = mlx5e_create_ttc_table(priv, &ttc_params, &priv->fs.ttc); | |
1457 | if (err) { | |
1458 | netdev_err(priv->netdev, "Failed to create rep ttc table, err=%d\n", err); | |
1459 | return err; | |
1460 | } | |
1461 | return 0; | |
1462 | } | |
1463 | ||
092297e0 | 1464 | static int mlx5e_create_rep_vport_rx_rule(struct mlx5e_priv *priv) |
cb67b832 HHZ |
1465 | { |
1466 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
1d447a39 SM |
1467 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
1468 | struct mlx5_eswitch_rep *rep = rpriv->rep; | |
74491de9 | 1469 | struct mlx5_flow_handle *flow_rule; |
c966f7d5 | 1470 | struct mlx5_flow_destination dest; |
092297e0 | 1471 | |
c966f7d5 GT |
1472 | dest.type = MLX5_FLOW_DESTINATION_TYPE_TIR; |
1473 | dest.tir_num = priv->direct_tir[0].tirn; | |
092297e0 GT |
1474 | flow_rule = mlx5_eswitch_create_vport_rx_rule(esw, |
1475 | rep->vport, | |
c966f7d5 | 1476 | &dest); |
092297e0 GT |
1477 | if (IS_ERR(flow_rule)) |
1478 | return PTR_ERR(flow_rule); | |
1479 | rpriv->vport_rx_rule = flow_rule; | |
1480 | return 0; | |
1481 | } | |
1482 | ||
1483 | static int mlx5e_init_rep_rx(struct mlx5e_priv *priv) | |
1484 | { | |
1485 | struct mlx5_core_dev *mdev = priv->mdev; | |
cb67b832 | 1486 | int err; |
cb67b832 | 1487 | |
2c3b5bee SM |
1488 | mlx5e_init_l2_addr(priv); |
1489 | ||
1462e48d RD |
1490 | err = mlx5e_open_drop_rq(priv, &priv->drop_rq); |
1491 | if (err) { | |
1492 | mlx5_core_err(mdev, "open drop rq failed, %d\n", err); | |
1493 | return err; | |
1494 | } | |
1495 | ||
84a09733 | 1496 | err = mlx5e_create_indirect_rqt(priv); |
8f493ffd | 1497 | if (err) |
1462e48d | 1498 | goto err_close_drop_rq; |
cb67b832 | 1499 | |
84a09733 GT |
1500 | err = mlx5e_create_direct_rqts(priv); |
1501 | if (err) | |
1502 | goto err_destroy_indirect_rqts; | |
1503 | ||
1504 | err = mlx5e_create_indirect_tirs(priv, false); | |
8f493ffd | 1505 | if (err) |
cb67b832 | 1506 | goto err_destroy_direct_rqts; |
cb67b832 | 1507 | |
84a09733 GT |
1508 | err = mlx5e_create_direct_tirs(priv); |
1509 | if (err) | |
1510 | goto err_destroy_indirect_tirs; | |
1511 | ||
1512 | err = mlx5e_create_rep_ttc_table(priv); | |
092297e0 | 1513 | if (err) |
cb67b832 | 1514 | goto err_destroy_direct_tirs; |
cb67b832 | 1515 | |
84a09733 GT |
1516 | err = mlx5e_create_rep_vport_rx_rule(priv); |
1517 | if (err) | |
1518 | goto err_destroy_ttc_table; | |
1519 | ||
cb67b832 HHZ |
1520 | return 0; |
1521 | ||
84a09733 GT |
1522 | err_destroy_ttc_table: |
1523 | mlx5e_destroy_ttc_table(priv, &priv->fs.ttc); | |
cb67b832 HHZ |
1524 | err_destroy_direct_tirs: |
1525 | mlx5e_destroy_direct_tirs(priv); | |
84a09733 GT |
1526 | err_destroy_indirect_tirs: |
1527 | mlx5e_destroy_indirect_tirs(priv, false); | |
cb67b832 | 1528 | err_destroy_direct_rqts: |
8f493ffd | 1529 | mlx5e_destroy_direct_rqts(priv); |
84a09733 GT |
1530 | err_destroy_indirect_rqts: |
1531 | mlx5e_destroy_rqt(priv, &priv->indir_rqt); | |
1462e48d RD |
1532 | err_close_drop_rq: |
1533 | mlx5e_close_drop_rq(&priv->drop_rq); | |
cb67b832 HHZ |
1534 | return err; |
1535 | } | |
1536 | ||
1537 | static void mlx5e_cleanup_rep_rx(struct mlx5e_priv *priv) | |
1538 | { | |
1d447a39 | 1539 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
cb67b832 | 1540 | |
5ed99fb4 | 1541 | mlx5_del_flow_rules(rpriv->vport_rx_rule); |
84a09733 | 1542 | mlx5e_destroy_ttc_table(priv, &priv->fs.ttc); |
cb67b832 | 1543 | mlx5e_destroy_direct_tirs(priv); |
84a09733 | 1544 | mlx5e_destroy_indirect_tirs(priv, false); |
8f493ffd | 1545 | mlx5e_destroy_direct_rqts(priv); |
84a09733 | 1546 | mlx5e_destroy_rqt(priv, &priv->indir_rqt); |
1462e48d | 1547 | mlx5e_close_drop_rq(&priv->drop_rq); |
cb67b832 HHZ |
1548 | } |
1549 | ||
1550 | static int mlx5e_init_rep_tx(struct mlx5e_priv *priv) | |
1551 | { | |
d9ee0491 OG |
1552 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
1553 | struct mlx5_rep_uplink_priv *uplink_priv; | |
1554 | int tc, err; | |
cb67b832 HHZ |
1555 | |
1556 | err = mlx5e_create_tises(priv); | |
1557 | if (err) { | |
1558 | mlx5_core_warn(priv->mdev, "create tises failed, %d\n", err); | |
1559 | return err; | |
1560 | } | |
d9ee0491 OG |
1561 | |
1562 | if (rpriv->rep->vport == FDB_UPLINK_VPORT) { | |
1563 | uplink_priv = &rpriv->uplink_priv; | |
1564 | ||
1565 | /* init shared tc flow table */ | |
1566 | err = mlx5e_tc_esw_init(&uplink_priv->tc_ht); | |
1567 | if (err) | |
1568 | goto destroy_tises; | |
1569 | ||
1570 | /* init indirect block notifications */ | |
1571 | INIT_LIST_HEAD(&uplink_priv->tc_indr_block_priv_list); | |
1572 | uplink_priv->netdevice_nb.notifier_call = mlx5e_nic_rep_netdevice_event; | |
1573 | err = register_netdevice_notifier(&uplink_priv->netdevice_nb); | |
1574 | if (err) { | |
1575 | mlx5_core_err(priv->mdev, "Failed to register netdev notifier\n"); | |
1576 | goto tc_esw_cleanup; | |
1577 | } | |
1578 | } | |
1579 | ||
cb67b832 | 1580 | return 0; |
d9ee0491 OG |
1581 | |
1582 | tc_esw_cleanup: | |
1583 | mlx5e_tc_esw_cleanup(&uplink_priv->tc_ht); | |
1584 | destroy_tises: | |
1585 | for (tc = 0; tc < priv->profile->max_tc; tc++) | |
1586 | mlx5e_destroy_tis(priv->mdev, priv->tisn[tc]); | |
1587 | return err; | |
1588 | } | |
1589 | ||
1590 | static void mlx5e_cleanup_rep_tx(struct mlx5e_priv *priv) | |
1591 | { | |
1592 | struct mlx5e_rep_priv *rpriv = priv->ppriv; | |
1593 | int tc; | |
1594 | ||
1595 | for (tc = 0; tc < priv->profile->max_tc; tc++) | |
1596 | mlx5e_destroy_tis(priv->mdev, priv->tisn[tc]); | |
1597 | ||
1598 | if (rpriv->rep->vport == FDB_UPLINK_VPORT) { | |
1599 | /* clean indirect TC block notifications */ | |
1600 | unregister_netdevice_notifier(&rpriv->uplink_priv.netdevice_nb); | |
1601 | mlx5e_rep_indr_clean_block_privs(rpriv); | |
1602 | ||
1603 | /* delete shared tc flow table */ | |
1604 | mlx5e_tc_esw_cleanup(&rpriv->uplink_priv.tc_ht); | |
1605 | } | |
cb67b832 HHZ |
1606 | } |
1607 | ||
b36cdb42 OG |
1608 | static void mlx5e_vf_rep_enable(struct mlx5e_priv *priv) |
1609 | { | |
1610 | struct net_device *netdev = priv->netdev; | |
1611 | struct mlx5_core_dev *mdev = priv->mdev; | |
1612 | u16 max_mtu; | |
1613 | ||
1614 | netdev->min_mtu = ETH_MIN_MTU; | |
1615 | mlx5_query_port_max_mtu(mdev, &max_mtu, 1); | |
1616 | netdev->max_mtu = MLX5E_HW2SW_MTU(&priv->channels.params, max_mtu); | |
1617 | } | |
1618 | ||
1619 | static int uplink_rep_async_event(struct notifier_block *nb, unsigned long event, void *data) | |
1620 | { | |
1621 | struct mlx5e_priv *priv = container_of(nb, struct mlx5e_priv, events_nb); | |
1622 | struct mlx5_eqe *eqe = data; | |
1623 | ||
1624 | if (event != MLX5_EVENT_TYPE_PORT_CHANGE) | |
1625 | return NOTIFY_DONE; | |
1626 | ||
1627 | switch (eqe->sub_type) { | |
1628 | case MLX5_PORT_CHANGE_SUBTYPE_DOWN: | |
1629 | case MLX5_PORT_CHANGE_SUBTYPE_ACTIVE: | |
1630 | queue_work(priv->wq, &priv->update_carrier_work); | |
1631 | break; | |
1632 | default: | |
1633 | return NOTIFY_DONE; | |
1634 | } | |
1635 | ||
1636 | return NOTIFY_OK; | |
1637 | } | |
1638 | ||
1639 | static void mlx5e_uplink_rep_enable(struct mlx5e_priv *priv) | |
1640 | { | |
1641 | struct net_device *netdev = priv->netdev; | |
1642 | struct mlx5_core_dev *mdev = priv->mdev; | |
1643 | u16 max_mtu; | |
1644 | ||
1645 | netdev->min_mtu = ETH_MIN_MTU; | |
1646 | mlx5_query_port_max_mtu(priv->mdev, &max_mtu, 1); | |
1647 | netdev->max_mtu = MLX5E_HW2SW_MTU(&priv->channels.params, max_mtu); | |
1648 | mlx5e_set_dev_port_mtu(priv); | |
1649 | ||
1650 | mlx5_lag_add(mdev, netdev); | |
1651 | priv->events_nb.notifier_call = uplink_rep_async_event; | |
1652 | mlx5_notifier_register(mdev, &priv->events_nb); | |
1653 | #ifdef CONFIG_MLX5_CORE_EN_DCB | |
1654 | mlx5e_dcbnl_initialize(priv); | |
1655 | mlx5e_dcbnl_init_app(priv); | |
1656 | #endif | |
1657 | } | |
1658 | ||
1659 | static void mlx5e_uplink_rep_disable(struct mlx5e_priv *priv) | |
1660 | { | |
1661 | struct mlx5_core_dev *mdev = priv->mdev; | |
1662 | ||
1663 | #ifdef CONFIG_MLX5_CORE_EN_DCB | |
1664 | mlx5e_dcbnl_delete_app(priv); | |
1665 | #endif | |
1666 | mlx5_notifier_unregister(mdev, &priv->events_nb); | |
1667 | mlx5_lag_remove(mdev); | |
1668 | } | |
1669 | ||
1670 | static const struct mlx5e_profile mlx5e_vf_rep_profile = { | |
cb67b832 | 1671 | .init = mlx5e_init_rep, |
182570b2 | 1672 | .cleanup = mlx5e_cleanup_rep, |
cb67b832 HHZ |
1673 | .init_rx = mlx5e_init_rep_rx, |
1674 | .cleanup_rx = mlx5e_cleanup_rep_rx, | |
1675 | .init_tx = mlx5e_init_rep_tx, | |
d9ee0491 | 1676 | .cleanup_tx = mlx5e_cleanup_rep_tx, |
b36cdb42 OG |
1677 | .enable = mlx5e_vf_rep_enable, |
1678 | .update_stats = mlx5e_vf_rep_update_hw_counters, | |
20fd0c19 | 1679 | .rx_handlers.handle_rx_cqe = mlx5e_handle_rx_cqe_rep, |
749359f4 | 1680 | .rx_handlers.handle_rx_cqe_mpwqe = mlx5e_handle_rx_cqe_mpwrq, |
cb67b832 HHZ |
1681 | .max_tc = 1, |
1682 | }; | |
1683 | ||
b36cdb42 OG |
1684 | static const struct mlx5e_profile mlx5e_uplink_rep_profile = { |
1685 | .init = mlx5e_init_rep, | |
1686 | .cleanup = mlx5e_cleanup_rep, | |
1687 | .init_rx = mlx5e_init_rep_rx, | |
1688 | .cleanup_rx = mlx5e_cleanup_rep_rx, | |
1689 | .init_tx = mlx5e_init_rep_tx, | |
1690 | .cleanup_tx = mlx5e_cleanup_rep_tx, | |
1691 | .enable = mlx5e_uplink_rep_enable, | |
1692 | .disable = mlx5e_uplink_rep_disable, | |
1693 | .update_stats = mlx5e_uplink_rep_update_hw_counters, | |
1694 | .update_carrier = mlx5e_update_carrier, | |
1695 | .rx_handlers.handle_rx_cqe = mlx5e_handle_rx_cqe_rep, | |
1696 | .rx_handlers.handle_rx_cqe_mpwqe = mlx5e_handle_rx_cqe_mpwrq, | |
1697 | .max_tc = MLX5E_MAX_NUM_TC, | |
1698 | }; | |
1699 | ||
1d447a39 | 1700 | /* e-Switch vport representors */ |
1d447a39 | 1701 | static int |
4c66df01 | 1702 | mlx5e_vport_rep_load(struct mlx5_core_dev *dev, struct mlx5_eswitch_rep *rep) |
1d447a39 | 1703 | { |
b36cdb42 | 1704 | const struct mlx5e_profile *profile; |
1d447a39 | 1705 | struct mlx5e_rep_priv *rpriv; |
26e59d80 | 1706 | struct net_device *netdev; |
779d986d | 1707 | int nch, err; |
26e59d80 | 1708 | |
1d447a39 SM |
1709 | rpriv = kzalloc(sizeof(*rpriv), GFP_KERNEL); |
1710 | if (!rpriv) | |
1711 | return -ENOMEM; | |
1712 | ||
d9ee0491 OG |
1713 | /* rpriv->rep to be looked up when profile->init() is called */ |
1714 | rpriv->rep = rep; | |
1715 | ||
779d986d | 1716 | nch = mlx5e_get_max_num_channels(dev); |
b36cdb42 OG |
1717 | profile = (rep->vport == FDB_UPLINK_VPORT) ? &mlx5e_uplink_rep_profile : &mlx5e_vf_rep_profile; |
1718 | netdev = mlx5e_create_netdev(dev, profile, nch, rpriv); | |
26e59d80 MHY |
1719 | if (!netdev) { |
1720 | pr_warn("Failed to create representor netdev for vport %d\n", | |
1721 | rep->vport); | |
1d447a39 | 1722 | kfree(rpriv); |
cb67b832 HHZ |
1723 | return -EINVAL; |
1724 | } | |
26e59d80 | 1725 | |
5ed99fb4 | 1726 | rpriv->netdev = netdev; |
a4b97ab4 | 1727 | rep->rep_if[REP_ETH].priv = rpriv; |
5ed99fb4 | 1728 | INIT_LIST_HEAD(&rpriv->vport_sqs_list); |
26e59d80 | 1729 | |
aec002f6 OG |
1730 | if (rep->vport == FDB_UPLINK_VPORT) { |
1731 | err = mlx5e_create_mdev_resources(dev); | |
1732 | if (err) | |
1733 | goto err_destroy_netdev; | |
1734 | } | |
1735 | ||
2c3b5bee | 1736 | err = mlx5e_attach_netdev(netdev_priv(netdev)); |
26e59d80 MHY |
1737 | if (err) { |
1738 | pr_warn("Failed to attach representor netdev for vport %d\n", | |
1739 | rep->vport); | |
aec002f6 | 1740 | goto err_destroy_mdev_resources; |
26e59d80 MHY |
1741 | } |
1742 | ||
37b498ff HHZ |
1743 | err = mlx5e_rep_neigh_init(rpriv); |
1744 | if (err) { | |
1745 | pr_warn("Failed to initialized neighbours handling for vport %d\n", | |
1746 | rep->vport); | |
1747 | goto err_detach_netdev; | |
1748 | } | |
1749 | ||
26e59d80 MHY |
1750 | err = register_netdev(netdev); |
1751 | if (err) { | |
1752 | pr_warn("Failed to register representor netdev for vport %d\n", | |
1753 | rep->vport); | |
ef381359 | 1754 | goto err_neigh_cleanup; |
26e59d80 MHY |
1755 | } |
1756 | ||
cb67b832 | 1757 | return 0; |
26e59d80 | 1758 | |
37b498ff HHZ |
1759 | err_neigh_cleanup: |
1760 | mlx5e_rep_neigh_cleanup(rpriv); | |
1761 | ||
26e59d80 | 1762 | err_detach_netdev: |
2c3b5bee | 1763 | mlx5e_detach_netdev(netdev_priv(netdev)); |
26e59d80 | 1764 | |
aec002f6 OG |
1765 | err_destroy_mdev_resources: |
1766 | if (rep->vport == FDB_UPLINK_VPORT) | |
1767 | mlx5e_destroy_mdev_resources(dev); | |
1768 | ||
26e59d80 | 1769 | err_destroy_netdev: |
2c3b5bee | 1770 | mlx5e_destroy_netdev(netdev_priv(netdev)); |
1d447a39 | 1771 | kfree(rpriv); |
26e59d80 | 1772 | return err; |
cb67b832 HHZ |
1773 | } |
1774 | ||
1d447a39 | 1775 | static void |
4c66df01 | 1776 | mlx5e_vport_rep_unload(struct mlx5_eswitch_rep *rep) |
cb67b832 | 1777 | { |
5ed99fb4 MB |
1778 | struct mlx5e_rep_priv *rpriv = mlx5e_rep_to_rep_priv(rep); |
1779 | struct net_device *netdev = rpriv->netdev; | |
1d447a39 SM |
1780 | struct mlx5e_priv *priv = netdev_priv(netdev); |
1781 | void *ppriv = priv->ppriv; | |
cb67b832 | 1782 | |
5ed99fb4 | 1783 | unregister_netdev(netdev); |
37b498ff | 1784 | mlx5e_rep_neigh_cleanup(rpriv); |
1d447a39 | 1785 | mlx5e_detach_netdev(priv); |
aec002f6 OG |
1786 | if (rep->vport == FDB_UPLINK_VPORT) |
1787 | mlx5e_destroy_mdev_resources(priv->mdev); | |
1d447a39 SM |
1788 | mlx5e_destroy_netdev(priv); |
1789 | kfree(ppriv); /* mlx5e_rep_priv */ | |
1790 | } | |
1791 | ||
22215908 MB |
1792 | static void *mlx5e_vport_rep_get_proto_dev(struct mlx5_eswitch_rep *rep) |
1793 | { | |
1794 | struct mlx5e_rep_priv *rpriv; | |
1795 | ||
1796 | rpriv = mlx5e_rep_to_rep_priv(rep); | |
1797 | ||
1798 | return rpriv->netdev; | |
1799 | } | |
1800 | ||
aec002f6 | 1801 | void mlx5e_rep_register_vport_reps(struct mlx5_core_dev *mdev) |
1d447a39 | 1802 | { |
aec002f6 | 1803 | struct mlx5_eswitch *esw = mdev->priv.eswitch; |
1d447a39 SM |
1804 | int total_vfs = MLX5_TOTAL_VPORTS(mdev); |
1805 | int vport; | |
1d447a39 | 1806 | |
d9ee0491 | 1807 | for (vport = 0; vport < total_vfs; vport++) { |
a4b97ab4 | 1808 | struct mlx5_eswitch_rep_if rep_if = {}; |
1d447a39 | 1809 | |
a4b97ab4 MB |
1810 | rep_if.load = mlx5e_vport_rep_load; |
1811 | rep_if.unload = mlx5e_vport_rep_unload; | |
22215908 | 1812 | rep_if.get_proto_dev = mlx5e_vport_rep_get_proto_dev; |
a4b97ab4 | 1813 | mlx5_eswitch_register_vport_rep(esw, vport, &rep_if, REP_ETH); |
1d447a39 SM |
1814 | } |
1815 | } | |
1816 | ||
aec002f6 | 1817 | void mlx5e_rep_unregister_vport_reps(struct mlx5_core_dev *mdev) |
1d447a39 | 1818 | { |
1d447a39 SM |
1819 | struct mlx5_eswitch *esw = mdev->priv.eswitch; |
1820 | int total_vfs = MLX5_TOTAL_VPORTS(mdev); | |
1821 | int vport; | |
1822 | ||
d9ee0491 | 1823 | for (vport = total_vfs - 1; vport >= 0; vport--) |
a4b97ab4 | 1824 | mlx5_eswitch_unregister_vport_rep(esw, vport, REP_ETH); |
1d447a39 | 1825 | } |