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cb67b832 HHZ |
1 | /* |
2 | * Copyright (c) 2016, Mellanox Technologies. All rights reserved. | |
3 | * | |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | */ | |
32 | ||
33 | #include <generated/utsrelease.h> | |
34 | #include <linux/mlx5/fs.h> | |
35 | #include <net/switchdev.h> | |
d957b4e3 | 36 | #include <net/pkt_cls.h> |
cb67b832 HHZ |
37 | |
38 | #include "eswitch.h" | |
39 | #include "en.h" | |
adb4c123 | 40 | #include "en_tc.h" |
cb67b832 HHZ |
41 | |
42 | static const char mlx5e_rep_driver_name[] = "mlx5e_rep"; | |
43 | ||
44 | static void mlx5e_rep_get_drvinfo(struct net_device *dev, | |
45 | struct ethtool_drvinfo *drvinfo) | |
46 | { | |
47 | strlcpy(drvinfo->driver, mlx5e_rep_driver_name, | |
48 | sizeof(drvinfo->driver)); | |
49 | strlcpy(drvinfo->version, UTS_RELEASE, sizeof(drvinfo->version)); | |
50 | } | |
51 | ||
52 | static const struct counter_desc sw_rep_stats_desc[] = { | |
53 | { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_packets) }, | |
54 | { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_bytes) }, | |
55 | { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_packets) }, | |
56 | { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_bytes) }, | |
57 | }; | |
58 | ||
59 | #define NUM_VPORT_REP_COUNTERS ARRAY_SIZE(sw_rep_stats_desc) | |
60 | ||
61 | static void mlx5e_rep_get_strings(struct net_device *dev, | |
62 | u32 stringset, uint8_t *data) | |
63 | { | |
64 | int i; | |
65 | ||
66 | switch (stringset) { | |
67 | case ETH_SS_STATS: | |
68 | for (i = 0; i < NUM_VPORT_REP_COUNTERS; i++) | |
69 | strcpy(data + (i * ETH_GSTRING_LEN), | |
70 | sw_rep_stats_desc[i].format); | |
71 | break; | |
72 | } | |
73 | } | |
74 | ||
370bad0f OG |
75 | static void mlx5e_rep_update_hw_counters(struct mlx5e_priv *priv) |
76 | { | |
77 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
78 | struct mlx5_eswitch_rep *rep = priv->ppriv; | |
79 | struct rtnl_link_stats64 *vport_stats; | |
80 | struct ifla_vf_stats vf_stats; | |
81 | int err; | |
82 | ||
83 | err = mlx5_eswitch_get_vport_stats(esw, rep->vport, &vf_stats); | |
84 | if (err) { | |
85 | pr_warn("vport %d error %d reading stats\n", rep->vport, err); | |
86 | return; | |
87 | } | |
88 | ||
89 | vport_stats = &priv->stats.vf_vport; | |
90 | /* flip tx/rx as we are reporting the counters for the switch vport */ | |
91 | vport_stats->rx_packets = vf_stats.tx_packets; | |
92 | vport_stats->rx_bytes = vf_stats.tx_bytes; | |
93 | vport_stats->tx_packets = vf_stats.rx_packets; | |
94 | vport_stats->tx_bytes = vf_stats.rx_bytes; | |
95 | } | |
96 | ||
97 | static void mlx5e_rep_update_sw_counters(struct mlx5e_priv *priv) | |
cb67b832 HHZ |
98 | { |
99 | struct mlx5e_sw_stats *s = &priv->stats.sw; | |
100 | struct mlx5e_rq_stats *rq_stats; | |
101 | struct mlx5e_sq_stats *sq_stats; | |
102 | int i, j; | |
103 | ||
104 | memset(s, 0, sizeof(*s)); | |
ff9c852f SM |
105 | for (i = 0; i < priv->channels.num; i++) { |
106 | struct mlx5e_channel *c = priv->channels.c[i]; | |
107 | ||
108 | rq_stats = &c->rq.stats; | |
cb67b832 HHZ |
109 | |
110 | s->rx_packets += rq_stats->packets; | |
111 | s->rx_bytes += rq_stats->bytes; | |
112 | ||
6a9764ef | 113 | for (j = 0; j < priv->channels.params.num_tc; j++) { |
ff9c852f | 114 | sq_stats = &c->sq[j].stats; |
cb67b832 HHZ |
115 | |
116 | s->tx_packets += sq_stats->packets; | |
117 | s->tx_bytes += sq_stats->bytes; | |
118 | } | |
119 | } | |
120 | } | |
121 | ||
370bad0f OG |
122 | static void mlx5e_rep_update_stats(struct mlx5e_priv *priv) |
123 | { | |
124 | mlx5e_rep_update_sw_counters(priv); | |
125 | mlx5e_rep_update_hw_counters(priv); | |
126 | } | |
127 | ||
cb67b832 HHZ |
128 | static void mlx5e_rep_get_ethtool_stats(struct net_device *dev, |
129 | struct ethtool_stats *stats, u64 *data) | |
130 | { | |
131 | struct mlx5e_priv *priv = netdev_priv(dev); | |
132 | int i; | |
133 | ||
134 | if (!data) | |
135 | return; | |
136 | ||
137 | mutex_lock(&priv->state_lock); | |
138 | if (test_bit(MLX5E_STATE_OPENED, &priv->state)) | |
370bad0f | 139 | mlx5e_rep_update_sw_counters(priv); |
cb67b832 HHZ |
140 | mutex_unlock(&priv->state_lock); |
141 | ||
142 | for (i = 0; i < NUM_VPORT_REP_COUNTERS; i++) | |
143 | data[i] = MLX5E_READ_CTR64_CPU(&priv->stats.sw, | |
144 | sw_rep_stats_desc, i); | |
145 | } | |
146 | ||
147 | static int mlx5e_rep_get_sset_count(struct net_device *dev, int sset) | |
148 | { | |
149 | switch (sset) { | |
150 | case ETH_SS_STATS: | |
151 | return NUM_VPORT_REP_COUNTERS; | |
152 | default: | |
153 | return -EOPNOTSUPP; | |
154 | } | |
155 | } | |
156 | ||
157 | static const struct ethtool_ops mlx5e_rep_ethtool_ops = { | |
158 | .get_drvinfo = mlx5e_rep_get_drvinfo, | |
159 | .get_link = ethtool_op_get_link, | |
160 | .get_strings = mlx5e_rep_get_strings, | |
161 | .get_sset_count = mlx5e_rep_get_sset_count, | |
162 | .get_ethtool_stats = mlx5e_rep_get_ethtool_stats, | |
163 | }; | |
164 | ||
165 | int mlx5e_attr_get(struct net_device *dev, struct switchdev_attr *attr) | |
166 | { | |
167 | struct mlx5e_priv *priv = netdev_priv(dev); | |
dbe413e3 | 168 | struct mlx5_eswitch_rep *rep = priv->ppriv; |
cb67b832 | 169 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; |
cb67b832 HHZ |
170 | |
171 | if (esw->mode == SRIOV_NONE) | |
172 | return -EOPNOTSUPP; | |
173 | ||
174 | switch (attr->id) { | |
175 | case SWITCHDEV_ATTR_ID_PORT_PARENT_ID: | |
cb67b832 | 176 | attr->u.ppid.id_len = ETH_ALEN; |
dbe413e3 | 177 | ether_addr_copy(attr->u.ppid.id, rep->hw_id); |
cb67b832 HHZ |
178 | break; |
179 | default: | |
180 | return -EOPNOTSUPP; | |
181 | } | |
182 | ||
183 | return 0; | |
184 | } | |
185 | ||
186 | int mlx5e_add_sqs_fwd_rules(struct mlx5e_priv *priv) | |
187 | ||
188 | { | |
189 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
190 | struct mlx5_eswitch_rep *rep = priv->ppriv; | |
191 | struct mlx5e_channel *c; | |
192 | int n, tc, err, num_sqs = 0; | |
193 | u16 *sqs; | |
194 | ||
6a9764ef | 195 | sqs = kcalloc(priv->channels.num * priv->channels.params.num_tc, sizeof(u16), GFP_KERNEL); |
cb67b832 HHZ |
196 | if (!sqs) |
197 | return -ENOMEM; | |
198 | ||
ff9c852f SM |
199 | for (n = 0; n < priv->channels.num; n++) { |
200 | c = priv->channels.c[n]; | |
cb67b832 HHZ |
201 | for (tc = 0; tc < c->num_tc; tc++) |
202 | sqs[num_sqs++] = c->sq[tc].sqn; | |
203 | } | |
204 | ||
205 | err = mlx5_eswitch_sqs2vport_start(esw, rep, sqs, num_sqs); | |
206 | ||
207 | kfree(sqs); | |
208 | return err; | |
209 | } | |
210 | ||
211 | int mlx5e_nic_rep_load(struct mlx5_eswitch *esw, struct mlx5_eswitch_rep *rep) | |
212 | { | |
726293f1 HHZ |
213 | struct net_device *netdev = rep->netdev; |
214 | struct mlx5e_priv *priv = netdev_priv(netdev); | |
cb67b832 HHZ |
215 | |
216 | if (test_bit(MLX5E_STATE_OPENED, &priv->state)) | |
217 | return mlx5e_add_sqs_fwd_rules(priv); | |
218 | return 0; | |
219 | } | |
220 | ||
221 | void mlx5e_remove_sqs_fwd_rules(struct mlx5e_priv *priv) | |
222 | { | |
223 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
224 | struct mlx5_eswitch_rep *rep = priv->ppriv; | |
225 | ||
226 | mlx5_eswitch_sqs2vport_stop(esw, rep); | |
227 | } | |
228 | ||
229 | void mlx5e_nic_rep_unload(struct mlx5_eswitch *esw, | |
230 | struct mlx5_eswitch_rep *rep) | |
231 | { | |
726293f1 HHZ |
232 | struct net_device *netdev = rep->netdev; |
233 | struct mlx5e_priv *priv = netdev_priv(netdev); | |
cb67b832 HHZ |
234 | |
235 | if (test_bit(MLX5E_STATE_OPENED, &priv->state)) | |
236 | mlx5e_remove_sqs_fwd_rules(priv); | |
adb4c123 OG |
237 | |
238 | /* clean (and re-init) existing uplink offloaded TC rules */ | |
239 | mlx5e_tc_cleanup(priv); | |
240 | mlx5e_tc_init(priv); | |
cb67b832 HHZ |
241 | } |
242 | ||
20a1ea67 OG |
243 | static int mlx5e_rep_open(struct net_device *dev) |
244 | { | |
245 | struct mlx5e_priv *priv = netdev_priv(dev); | |
246 | struct mlx5_eswitch_rep *rep = priv->ppriv; | |
247 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
248 | int err; | |
249 | ||
250 | err = mlx5e_open(dev); | |
251 | if (err) | |
252 | return err; | |
253 | ||
254 | err = mlx5_eswitch_set_vport_state(esw, rep->vport, MLX5_ESW_VPORT_ADMIN_STATE_UP); | |
255 | if (!err) | |
256 | netif_carrier_on(dev); | |
257 | ||
258 | return 0; | |
259 | } | |
260 | ||
261 | static int mlx5e_rep_close(struct net_device *dev) | |
262 | { | |
263 | struct mlx5e_priv *priv = netdev_priv(dev); | |
264 | struct mlx5_eswitch_rep *rep = priv->ppriv; | |
265 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
266 | ||
267 | (void)mlx5_eswitch_set_vport_state(esw, rep->vport, MLX5_ESW_VPORT_ADMIN_STATE_DOWN); | |
268 | ||
269 | return mlx5e_close(dev); | |
270 | } | |
271 | ||
cb67b832 HHZ |
272 | static int mlx5e_rep_get_phys_port_name(struct net_device *dev, |
273 | char *buf, size_t len) | |
274 | { | |
275 | struct mlx5e_priv *priv = netdev_priv(dev); | |
276 | struct mlx5_eswitch_rep *rep = priv->ppriv; | |
277 | int ret; | |
278 | ||
279 | ret = snprintf(buf, len, "%d", rep->vport - 1); | |
280 | if (ret >= len) | |
281 | return -EOPNOTSUPP; | |
282 | ||
283 | return 0; | |
284 | } | |
285 | ||
d957b4e3 OG |
286 | static int mlx5e_rep_ndo_setup_tc(struct net_device *dev, u32 handle, |
287 | __be16 proto, struct tc_to_netdev *tc) | |
288 | { | |
289 | struct mlx5e_priv *priv = netdev_priv(dev); | |
290 | ||
291 | if (TC_H_MAJ(handle) != TC_H_MAJ(TC_H_INGRESS)) | |
292 | return -EOPNOTSUPP; | |
293 | ||
ebe06875 HHZ |
294 | if (tc->egress_dev) { |
295 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
296 | struct net_device *uplink_dev = mlx5_eswitch_get_uplink_netdev(esw); | |
297 | ||
298 | return uplink_dev->netdev_ops->ndo_setup_tc(uplink_dev, handle, | |
299 | proto, tc); | |
300 | } | |
301 | ||
d957b4e3 OG |
302 | switch (tc->type) { |
303 | case TC_SETUP_CLSFLOWER: | |
304 | switch (tc->cls_flower->command) { | |
305 | case TC_CLSFLOWER_REPLACE: | |
306 | return mlx5e_configure_flower(priv, proto, tc->cls_flower); | |
307 | case TC_CLSFLOWER_DESTROY: | |
308 | return mlx5e_delete_flower(priv, tc->cls_flower); | |
309 | case TC_CLSFLOWER_STATS: | |
310 | return mlx5e_stats_flower(priv, tc->cls_flower); | |
311 | } | |
312 | default: | |
313 | return -EOPNOTSUPP; | |
314 | } | |
315 | } | |
316 | ||
370bad0f OG |
317 | bool mlx5e_is_uplink_rep(struct mlx5e_priv *priv) |
318 | { | |
319 | struct mlx5_eswitch_rep *rep = (struct mlx5_eswitch_rep *)priv->ppriv; | |
320 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
321 | ||
322 | if (rep && rep->vport == FDB_UPLINK_VPORT && esw->mode == SRIOV_OFFLOADS) | |
323 | return true; | |
324 | ||
325 | return false; | |
326 | } | |
327 | ||
328 | bool mlx5e_is_vf_vport_rep(struct mlx5e_priv *priv) | |
329 | { | |
330 | struct mlx5_eswitch_rep *rep = (struct mlx5_eswitch_rep *)priv->ppriv; | |
331 | ||
332 | if (rep && rep->vport != FDB_UPLINK_VPORT) | |
333 | return true; | |
334 | ||
335 | return false; | |
336 | } | |
337 | ||
338 | bool mlx5e_has_offload_stats(const struct net_device *dev, int attr_id) | |
339 | { | |
340 | struct mlx5e_priv *priv = netdev_priv(dev); | |
341 | ||
342 | switch (attr_id) { | |
343 | case IFLA_OFFLOAD_XSTATS_CPU_HIT: | |
344 | if (mlx5e_is_vf_vport_rep(priv) || mlx5e_is_uplink_rep(priv)) | |
345 | return true; | |
346 | } | |
347 | ||
348 | return false; | |
349 | } | |
350 | ||
351 | static int | |
352 | mlx5e_get_sw_stats64(const struct net_device *dev, | |
353 | struct rtnl_link_stats64 *stats) | |
354 | { | |
355 | struct mlx5e_priv *priv = netdev_priv(dev); | |
356 | struct mlx5e_sw_stats *sstats = &priv->stats.sw; | |
357 | ||
358 | stats->rx_packets = sstats->rx_packets; | |
359 | stats->rx_bytes = sstats->rx_bytes; | |
360 | stats->tx_packets = sstats->tx_packets; | |
361 | stats->tx_bytes = sstats->tx_bytes; | |
362 | ||
363 | stats->tx_dropped = sstats->tx_queue_dropped; | |
364 | ||
365 | return 0; | |
366 | } | |
367 | ||
368 | int mlx5e_get_offload_stats(int attr_id, const struct net_device *dev, | |
369 | void *sp) | |
370 | { | |
371 | switch (attr_id) { | |
372 | case IFLA_OFFLOAD_XSTATS_CPU_HIT: | |
373 | return mlx5e_get_sw_stats64(dev, sp); | |
374 | } | |
375 | ||
376 | return -EINVAL; | |
377 | } | |
378 | ||
bc1f4470 | 379 | static void |
370bad0f OG |
380 | mlx5e_rep_get_stats(struct net_device *dev, struct rtnl_link_stats64 *stats) |
381 | { | |
382 | struct mlx5e_priv *priv = netdev_priv(dev); | |
383 | ||
384 | memcpy(stats, &priv->stats.vf_vport, sizeof(*stats)); | |
370bad0f OG |
385 | } |
386 | ||
cb67b832 HHZ |
387 | static const struct switchdev_ops mlx5e_rep_switchdev_ops = { |
388 | .switchdev_port_attr_get = mlx5e_attr_get, | |
389 | }; | |
390 | ||
391 | static const struct net_device_ops mlx5e_netdev_ops_rep = { | |
20a1ea67 OG |
392 | .ndo_open = mlx5e_rep_open, |
393 | .ndo_stop = mlx5e_rep_close, | |
cb67b832 HHZ |
394 | .ndo_start_xmit = mlx5e_xmit, |
395 | .ndo_get_phys_port_name = mlx5e_rep_get_phys_port_name, | |
d957b4e3 | 396 | .ndo_setup_tc = mlx5e_rep_ndo_setup_tc, |
370bad0f OG |
397 | .ndo_get_stats64 = mlx5e_rep_get_stats, |
398 | .ndo_has_offload_stats = mlx5e_has_offload_stats, | |
399 | .ndo_get_offload_stats = mlx5e_get_offload_stats, | |
cb67b832 HHZ |
400 | }; |
401 | ||
6a9764ef SM |
402 | static void mlx5e_build_rep_params(struct mlx5_core_dev *mdev, |
403 | struct mlx5e_params *params) | |
cb67b832 | 404 | { |
cb67b832 HHZ |
405 | u8 cq_period_mode = MLX5_CAP_GEN(mdev, cq_period_start_from_cqe) ? |
406 | MLX5_CQ_PERIOD_MODE_START_FROM_CQE : | |
407 | MLX5_CQ_PERIOD_MODE_START_FROM_EQE; | |
408 | ||
6a9764ef SM |
409 | params->log_sq_size = MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE; |
410 | params->rq_wq_type = MLX5_WQ_TYPE_LINKED_LIST; | |
411 | params->log_rq_size = MLX5E_PARAMS_MINIMUM_LOG_RQ_SIZE; | |
cb67b832 | 412 | |
6a9764ef SM |
413 | params->rx_am_enabled = MLX5_CAP_GEN(mdev, cq_moderation); |
414 | mlx5e_set_rx_cq_mode_params(params, cq_period_mode); | |
cb67b832 | 415 | |
6a9764ef SM |
416 | params->tx_max_inline = mlx5e_get_max_inline_cap(mdev); |
417 | params->num_tc = 1; | |
418 | params->lro_wqe_sz = MLX5E_PARAMS_DEFAULT_LRO_WQE_SZ; | |
cb67b832 HHZ |
419 | } |
420 | ||
421 | static void mlx5e_build_rep_netdev(struct net_device *netdev) | |
422 | { | |
423 | netdev->netdev_ops = &mlx5e_netdev_ops_rep; | |
424 | ||
425 | netdev->watchdog_timeo = 15 * HZ; | |
426 | ||
427 | netdev->ethtool_ops = &mlx5e_rep_ethtool_ops; | |
428 | ||
429 | #ifdef CONFIG_NET_SWITCHDEV | |
430 | netdev->switchdev_ops = &mlx5e_rep_switchdev_ops; | |
431 | #endif | |
432 | ||
abd32772 | 433 | netdev->features |= NETIF_F_VLAN_CHALLENGED | NETIF_F_HW_TC | NETIF_F_NETNS_LOCAL; |
d957b4e3 | 434 | netdev->hw_features |= NETIF_F_HW_TC; |
cb67b832 HHZ |
435 | |
436 | eth_hw_addr_random(netdev); | |
437 | } | |
438 | ||
439 | static void mlx5e_init_rep(struct mlx5_core_dev *mdev, | |
440 | struct net_device *netdev, | |
441 | const struct mlx5e_profile *profile, | |
442 | void *ppriv) | |
443 | { | |
6a9764ef SM |
444 | struct mlx5e_priv *priv = netdev_priv(netdev); |
445 | ||
446 | priv->mdev = mdev; | |
447 | priv->netdev = netdev; | |
448 | priv->profile = profile; | |
449 | priv->ppriv = ppriv; | |
450 | ||
451 | mutex_init(&priv->state_lock); | |
452 | ||
453 | INIT_DELAYED_WORK(&priv->update_stats_work, mlx5e_update_stats_work); | |
454 | ||
455 | priv->channels.params.num_channels = profile->max_nch(mdev); | |
456 | mlx5e_build_rep_params(mdev, &priv->channels.params); | |
cb67b832 HHZ |
457 | mlx5e_build_rep_netdev(netdev); |
458 | } | |
459 | ||
460 | static int mlx5e_init_rep_rx(struct mlx5e_priv *priv) | |
461 | { | |
462 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
463 | struct mlx5_eswitch_rep *rep = priv->ppriv; | |
464 | struct mlx5_core_dev *mdev = priv->mdev; | |
74491de9 | 465 | struct mlx5_flow_handle *flow_rule; |
cb67b832 HHZ |
466 | int err; |
467 | int i; | |
468 | ||
469 | err = mlx5e_create_direct_rqts(priv); | |
470 | if (err) { | |
471 | mlx5_core_warn(mdev, "create direct rqts failed, %d\n", err); | |
472 | return err; | |
473 | } | |
474 | ||
475 | err = mlx5e_create_direct_tirs(priv); | |
476 | if (err) { | |
477 | mlx5_core_warn(mdev, "create direct tirs failed, %d\n", err); | |
478 | goto err_destroy_direct_rqts; | |
479 | } | |
480 | ||
481 | flow_rule = mlx5_eswitch_create_vport_rx_rule(esw, | |
482 | rep->vport, | |
483 | priv->direct_tir[0].tirn); | |
484 | if (IS_ERR(flow_rule)) { | |
485 | err = PTR_ERR(flow_rule); | |
486 | goto err_destroy_direct_tirs; | |
487 | } | |
488 | rep->vport_rx_rule = flow_rule; | |
489 | ||
d957b4e3 OG |
490 | err = mlx5e_tc_init(priv); |
491 | if (err) | |
492 | goto err_del_flow_rule; | |
493 | ||
cb67b832 HHZ |
494 | return 0; |
495 | ||
d957b4e3 | 496 | err_del_flow_rule: |
74491de9 | 497 | mlx5_del_flow_rules(rep->vport_rx_rule); |
cb67b832 HHZ |
498 | err_destroy_direct_tirs: |
499 | mlx5e_destroy_direct_tirs(priv); | |
500 | err_destroy_direct_rqts: | |
6a9764ef | 501 | for (i = 0; i < priv->channels.params.num_channels; i++) |
cb67b832 HHZ |
502 | mlx5e_destroy_rqt(priv, &priv->direct_tir[i].rqt); |
503 | return err; | |
504 | } | |
505 | ||
506 | static void mlx5e_cleanup_rep_rx(struct mlx5e_priv *priv) | |
507 | { | |
508 | struct mlx5_eswitch_rep *rep = priv->ppriv; | |
509 | int i; | |
510 | ||
d957b4e3 | 511 | mlx5e_tc_cleanup(priv); |
74491de9 | 512 | mlx5_del_flow_rules(rep->vport_rx_rule); |
cb67b832 | 513 | mlx5e_destroy_direct_tirs(priv); |
6a9764ef | 514 | for (i = 0; i < priv->channels.params.num_channels; i++) |
cb67b832 HHZ |
515 | mlx5e_destroy_rqt(priv, &priv->direct_tir[i].rqt); |
516 | } | |
517 | ||
518 | static int mlx5e_init_rep_tx(struct mlx5e_priv *priv) | |
519 | { | |
520 | int err; | |
521 | ||
522 | err = mlx5e_create_tises(priv); | |
523 | if (err) { | |
524 | mlx5_core_warn(priv->mdev, "create tises failed, %d\n", err); | |
525 | return err; | |
526 | } | |
527 | return 0; | |
528 | } | |
529 | ||
530 | static int mlx5e_get_rep_max_num_channels(struct mlx5_core_dev *mdev) | |
531 | { | |
532 | #define MLX5E_PORT_REPRESENTOR_NCH 1 | |
533 | return MLX5E_PORT_REPRESENTOR_NCH; | |
534 | } | |
535 | ||
536 | static struct mlx5e_profile mlx5e_rep_profile = { | |
537 | .init = mlx5e_init_rep, | |
538 | .init_rx = mlx5e_init_rep_rx, | |
539 | .cleanup_rx = mlx5e_cleanup_rep_rx, | |
540 | .init_tx = mlx5e_init_rep_tx, | |
541 | .cleanup_tx = mlx5e_cleanup_nic_tx, | |
370bad0f | 542 | .update_stats = mlx5e_rep_update_stats, |
cb67b832 HHZ |
543 | .max_nch = mlx5e_get_rep_max_num_channels, |
544 | .max_tc = 1, | |
545 | }; | |
546 | ||
547 | int mlx5e_vport_rep_load(struct mlx5_eswitch *esw, | |
548 | struct mlx5_eswitch_rep *rep) | |
549 | { | |
26e59d80 MHY |
550 | struct net_device *netdev; |
551 | int err; | |
552 | ||
553 | netdev = mlx5e_create_netdev(esw->dev, &mlx5e_rep_profile, rep); | |
554 | if (!netdev) { | |
555 | pr_warn("Failed to create representor netdev for vport %d\n", | |
556 | rep->vport); | |
cb67b832 HHZ |
557 | return -EINVAL; |
558 | } | |
26e59d80 | 559 | |
726293f1 | 560 | rep->netdev = netdev; |
26e59d80 MHY |
561 | |
562 | err = mlx5e_attach_netdev(esw->dev, netdev); | |
563 | if (err) { | |
564 | pr_warn("Failed to attach representor netdev for vport %d\n", | |
565 | rep->vport); | |
566 | goto err_destroy_netdev; | |
567 | } | |
568 | ||
569 | err = register_netdev(netdev); | |
570 | if (err) { | |
571 | pr_warn("Failed to register representor netdev for vport %d\n", | |
572 | rep->vport); | |
573 | goto err_detach_netdev; | |
574 | } | |
575 | ||
cb67b832 | 576 | return 0; |
26e59d80 MHY |
577 | |
578 | err_detach_netdev: | |
579 | mlx5e_detach_netdev(esw->dev, netdev); | |
580 | ||
581 | err_destroy_netdev: | |
726293f1 | 582 | mlx5e_destroy_netdev(esw->dev, netdev_priv(netdev)); |
26e59d80 MHY |
583 | |
584 | return err; | |
585 | ||
cb67b832 HHZ |
586 | } |
587 | ||
588 | void mlx5e_vport_rep_unload(struct mlx5_eswitch *esw, | |
589 | struct mlx5_eswitch_rep *rep) | |
590 | { | |
726293f1 | 591 | struct net_device *netdev = rep->netdev; |
cb67b832 | 592 | |
5e1e93c7 | 593 | unregister_netdev(netdev); |
26e59d80 | 594 | mlx5e_detach_netdev(esw->dev, netdev); |
726293f1 | 595 | mlx5e_destroy_netdev(esw->dev, netdev_priv(netdev)); |
cb67b832 | 596 | } |