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net/mlx5: Provide an alternative VF upper bound for ECPF
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CommitLineData
cb67b832
HHZ
1/*
2 * Copyright (c) 2016, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33#include <generated/utsrelease.h>
34#include <linux/mlx5/fs.h>
35#include <net/switchdev.h>
d957b4e3 36#include <net/pkt_cls.h>
717503b9 37#include <net/act_api.h>
232c0013
HHZ
38#include <net/netevent.h>
39#include <net/arp.h>
cb67b832
HHZ
40
41#include "eswitch.h"
42#include "en.h"
1d447a39 43#include "en_rep.h"
adb4c123 44#include "en_tc.h"
101f4de9 45#include "en/tc_tun.h"
f6dfb4c3 46#include "fs_core.h"
cb67b832 47
4c8fb298 48#define MLX5E_REP_PARAMS_DEF_LOG_SQ_SIZE \
e7164313 49 max(0x7, MLX5E_PARAMS_MINIMUM_LOG_SQ_SIZE)
8956f001 50#define MLX5E_REP_PARAMS_DEF_NUM_CHANNELS 1
4246f698 51
cb67b832
HHZ
52static const char mlx5e_rep_driver_name[] = "mlx5e_rep";
53
f5bc2c5d
OS
54struct mlx5e_rep_indr_block_priv {
55 struct net_device *netdev;
56 struct mlx5e_rep_priv *rpriv;
57
58 struct list_head list;
59};
60
61static void mlx5e_rep_indr_unregister_block(struct net_device *netdev);
62
cb67b832
HHZ
63static void mlx5e_rep_get_drvinfo(struct net_device *dev,
64 struct ethtool_drvinfo *drvinfo)
65{
66 strlcpy(drvinfo->driver, mlx5e_rep_driver_name,
67 sizeof(drvinfo->driver));
68 strlcpy(drvinfo->version, UTS_RELEASE, sizeof(drvinfo->version));
69}
70
71static const struct counter_desc sw_rep_stats_desc[] = {
72 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_packets) },
73 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, rx_bytes) },
74 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_packets) },
75 { MLX5E_DECLARE_STAT(struct mlx5e_sw_stats, tx_bytes) },
76};
77
a228060a
OG
78struct vport_stats {
79 u64 vport_rx_packets;
80 u64 vport_tx_packets;
81 u64 vport_rx_bytes;
82 u64 vport_tx_bytes;
83};
84
85static const struct counter_desc vport_rep_stats_desc[] = {
86 { MLX5E_DECLARE_STAT(struct vport_stats, vport_rx_packets) },
87 { MLX5E_DECLARE_STAT(struct vport_stats, vport_rx_bytes) },
88 { MLX5E_DECLARE_STAT(struct vport_stats, vport_tx_packets) },
89 { MLX5E_DECLARE_STAT(struct vport_stats, vport_tx_bytes) },
90};
91
92#define NUM_VPORT_REP_SW_COUNTERS ARRAY_SIZE(sw_rep_stats_desc)
93#define NUM_VPORT_REP_HW_COUNTERS ARRAY_SIZE(vport_rep_stats_desc)
cb67b832
HHZ
94
95static void mlx5e_rep_get_strings(struct net_device *dev,
96 u32 stringset, uint8_t *data)
97{
a228060a 98 int i, j;
cb67b832
HHZ
99
100 switch (stringset) {
101 case ETH_SS_STATS:
a228060a 102 for (i = 0; i < NUM_VPORT_REP_SW_COUNTERS; i++)
cb67b832
HHZ
103 strcpy(data + (i * ETH_GSTRING_LEN),
104 sw_rep_stats_desc[i].format);
a228060a
OG
105 for (j = 0; j < NUM_VPORT_REP_HW_COUNTERS; j++, i++)
106 strcpy(data + (i * ETH_GSTRING_LEN),
107 vport_rep_stats_desc[j].format);
cb67b832
HHZ
108 break;
109 }
110}
111
d9ee0491 112static void mlx5e_vf_rep_update_hw_counters(struct mlx5e_priv *priv)
370bad0f
OG
113{
114 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1d447a39
SM
115 struct mlx5e_rep_priv *rpriv = priv->ppriv;
116 struct mlx5_eswitch_rep *rep = rpriv->rep;
370bad0f
OG
117 struct rtnl_link_stats64 *vport_stats;
118 struct ifla_vf_stats vf_stats;
119 int err;
120
121 err = mlx5_eswitch_get_vport_stats(esw, rep->vport, &vf_stats);
122 if (err) {
123 pr_warn("vport %d error %d reading stats\n", rep->vport, err);
124 return;
125 }
126
127 vport_stats = &priv->stats.vf_vport;
128 /* flip tx/rx as we are reporting the counters for the switch vport */
129 vport_stats->rx_packets = vf_stats.tx_packets;
130 vport_stats->rx_bytes = vf_stats.tx_bytes;
131 vport_stats->tx_packets = vf_stats.rx_packets;
132 vport_stats->tx_bytes = vf_stats.rx_bytes;
133}
134
d9ee0491
OG
135static void mlx5e_uplink_rep_update_hw_counters(struct mlx5e_priv *priv)
136{
137 struct mlx5e_pport_stats *pstats = &priv->stats.pport;
138 struct rtnl_link_stats64 *vport_stats;
139
140 mlx5e_grp_802_3_update_stats(priv);
141
142 vport_stats = &priv->stats.vf_vport;
143
144 vport_stats->rx_packets = PPORT_802_3_GET(pstats, a_frames_received_ok);
145 vport_stats->rx_bytes = PPORT_802_3_GET(pstats, a_octets_received_ok);
146 vport_stats->tx_packets = PPORT_802_3_GET(pstats, a_frames_transmitted_ok);
147 vport_stats->tx_bytes = PPORT_802_3_GET(pstats, a_octets_transmitted_ok);
148}
149
150static void mlx5e_rep_update_hw_counters(struct mlx5e_priv *priv)
151{
152 struct mlx5e_rep_priv *rpriv = priv->ppriv;
153 struct mlx5_eswitch_rep *rep = rpriv->rep;
154
155 if (rep->vport == FDB_UPLINK_VPORT)
156 mlx5e_uplink_rep_update_hw_counters(priv);
157 else
158 mlx5e_vf_rep_update_hw_counters(priv);
159}
160
370bad0f 161static void mlx5e_rep_update_sw_counters(struct mlx5e_priv *priv)
cb67b832
HHZ
162{
163 struct mlx5e_sw_stats *s = &priv->stats.sw;
164 struct mlx5e_rq_stats *rq_stats;
165 struct mlx5e_sq_stats *sq_stats;
166 int i, j;
167
168 memset(s, 0, sizeof(*s));
ff9c852f
SM
169 for (i = 0; i < priv->channels.num; i++) {
170 struct mlx5e_channel *c = priv->channels.c[i];
171
05909bab 172 rq_stats = c->rq.stats;
cb67b832
HHZ
173
174 s->rx_packets += rq_stats->packets;
175 s->rx_bytes += rq_stats->bytes;
176
6a9764ef 177 for (j = 0; j < priv->channels.params.num_tc; j++) {
05909bab 178 sq_stats = c->sq[j].stats;
cb67b832
HHZ
179
180 s->tx_packets += sq_stats->packets;
181 s->tx_bytes += sq_stats->bytes;
182 }
183 }
370bad0f
OG
184}
185
cb67b832
HHZ
186static void mlx5e_rep_get_ethtool_stats(struct net_device *dev,
187 struct ethtool_stats *stats, u64 *data)
188{
189 struct mlx5e_priv *priv = netdev_priv(dev);
a228060a 190 int i, j;
cb67b832
HHZ
191
192 if (!data)
193 return;
194
195 mutex_lock(&priv->state_lock);
196 if (test_bit(MLX5E_STATE_OPENED, &priv->state))
370bad0f 197 mlx5e_rep_update_sw_counters(priv);
a228060a 198 mlx5e_rep_update_hw_counters(priv);
cb67b832
HHZ
199 mutex_unlock(&priv->state_lock);
200
a228060a 201 for (i = 0; i < NUM_VPORT_REP_SW_COUNTERS; i++)
cb67b832
HHZ
202 data[i] = MLX5E_READ_CTR64_CPU(&priv->stats.sw,
203 sw_rep_stats_desc, i);
a228060a
OG
204
205 for (j = 0; j < NUM_VPORT_REP_HW_COUNTERS; j++, i++)
206 data[i] = MLX5E_READ_CTR64_CPU(&priv->stats.vf_vport,
207 vport_rep_stats_desc, j);
cb67b832
HHZ
208}
209
210static int mlx5e_rep_get_sset_count(struct net_device *dev, int sset)
211{
212 switch (sset) {
213 case ETH_SS_STATS:
a228060a 214 return NUM_VPORT_REP_SW_COUNTERS + NUM_VPORT_REP_HW_COUNTERS;
cb67b832
HHZ
215 default:
216 return -EOPNOTSUPP;
217 }
218}
219
f128f138
GT
220static void mlx5e_rep_get_ringparam(struct net_device *dev,
221 struct ethtool_ringparam *param)
222{
223 struct mlx5e_priv *priv = netdev_priv(dev);
224
225 mlx5e_ethtool_get_ringparam(priv, param);
226}
227
228static int mlx5e_rep_set_ringparam(struct net_device *dev,
229 struct ethtool_ringparam *param)
230{
231 struct mlx5e_priv *priv = netdev_priv(dev);
232
233 return mlx5e_ethtool_set_ringparam(priv, param);
234}
235
84a09733
GT
236static int mlx5e_replace_rep_vport_rx_rule(struct mlx5e_priv *priv,
237 struct mlx5_flow_destination *dest)
238{
239 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
240 struct mlx5e_rep_priv *rpriv = priv->ppriv;
241 struct mlx5_eswitch_rep *rep = rpriv->rep;
242 struct mlx5_flow_handle *flow_rule;
243
244 flow_rule = mlx5_eswitch_create_vport_rx_rule(esw,
245 rep->vport,
246 dest);
247 if (IS_ERR(flow_rule))
248 return PTR_ERR(flow_rule);
249
250 mlx5_del_flow_rules(rpriv->vport_rx_rule);
251 rpriv->vport_rx_rule = flow_rule;
252 return 0;
253}
254
255static void mlx5e_rep_get_channels(struct net_device *dev,
256 struct ethtool_channels *ch)
257{
258 struct mlx5e_priv *priv = netdev_priv(dev);
259
260 mlx5e_ethtool_get_channels(priv, ch);
261}
262
263static int mlx5e_rep_set_channels(struct net_device *dev,
264 struct ethtool_channels *ch)
265{
266 struct mlx5e_priv *priv = netdev_priv(dev);
267 u16 curr_channels_amount = priv->channels.params.num_channels;
268 u32 new_channels_amount = ch->combined_count;
269 struct mlx5_flow_destination new_dest;
270 int err = 0;
271
272 err = mlx5e_ethtool_set_channels(priv, ch);
273 if (err)
274 return err;
275
276 if (curr_channels_amount == 1 && new_channels_amount > 1) {
277 new_dest.type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
278 new_dest.ft = priv->fs.ttc.ft.t;
279 } else if (new_channels_amount == 1 && curr_channels_amount > 1) {
280 new_dest.type = MLX5_FLOW_DESTINATION_TYPE_TIR;
281 new_dest.tir_num = priv->direct_tir[0].tirn;
282 } else {
283 return 0;
284 }
285
286 err = mlx5e_replace_rep_vport_rx_rule(priv, &new_dest);
287 if (err) {
288 netdev_warn(priv->netdev, "Failed to update vport rx rule, when going from (%d) channels to (%d) channels\n",
289 curr_channels_amount, new_channels_amount);
290 return err;
291 }
292
293 return 0;
294}
295
ff9b85de
OG
296static int mlx5e_rep_get_coalesce(struct net_device *netdev,
297 struct ethtool_coalesce *coal)
298{
299 struct mlx5e_priv *priv = netdev_priv(netdev);
300
301 return mlx5e_ethtool_get_coalesce(priv, coal);
302}
303
304static int mlx5e_rep_set_coalesce(struct net_device *netdev,
305 struct ethtool_coalesce *coal)
306{
307 struct mlx5e_priv *priv = netdev_priv(netdev);
308
309 return mlx5e_ethtool_set_coalesce(priv, coal);
310}
311
84a09733
GT
312static u32 mlx5e_rep_get_rxfh_key_size(struct net_device *netdev)
313{
314 struct mlx5e_priv *priv = netdev_priv(netdev);
315
316 return mlx5e_ethtool_get_rxfh_key_size(priv);
317}
318
319static u32 mlx5e_rep_get_rxfh_indir_size(struct net_device *netdev)
320{
321 struct mlx5e_priv *priv = netdev_priv(netdev);
322
323 return mlx5e_ethtool_get_rxfh_indir_size(priv);
324}
325
ff9b85de
OG
326static void mlx5e_uplink_rep_get_pauseparam(struct net_device *netdev,
327 struct ethtool_pauseparam *pauseparam)
328{
329 struct mlx5e_priv *priv = netdev_priv(netdev);
330
331 mlx5e_ethtool_get_pauseparam(priv, pauseparam);
332}
333
334static int mlx5e_uplink_rep_set_pauseparam(struct net_device *netdev,
335 struct ethtool_pauseparam *pauseparam)
336{
337 struct mlx5e_priv *priv = netdev_priv(netdev);
338
339 return mlx5e_ethtool_set_pauseparam(priv, pauseparam);
340}
341
342static int mlx5e_uplink_rep_get_link_ksettings(struct net_device *netdev,
343 struct ethtool_link_ksettings *link_ksettings)
344{
345 struct mlx5e_priv *priv = netdev_priv(netdev);
346
347 return mlx5e_ethtool_get_link_ksettings(priv, link_ksettings);
348}
349
350static int mlx5e_uplink_rep_set_link_ksettings(struct net_device *netdev,
351 const struct ethtool_link_ksettings *link_ksettings)
352{
353 struct mlx5e_priv *priv = netdev_priv(netdev);
354
355 return mlx5e_ethtool_set_link_ksettings(priv, link_ksettings);
356}
357
358static const struct ethtool_ops mlx5e_vf_rep_ethtool_ops = {
359 .get_drvinfo = mlx5e_rep_get_drvinfo,
360 .get_link = ethtool_op_get_link,
361 .get_strings = mlx5e_rep_get_strings,
362 .get_sset_count = mlx5e_rep_get_sset_count,
363 .get_ethtool_stats = mlx5e_rep_get_ethtool_stats,
364 .get_ringparam = mlx5e_rep_get_ringparam,
365 .set_ringparam = mlx5e_rep_set_ringparam,
366 .get_channels = mlx5e_rep_get_channels,
367 .set_channels = mlx5e_rep_set_channels,
368 .get_coalesce = mlx5e_rep_get_coalesce,
369 .set_coalesce = mlx5e_rep_set_coalesce,
370 .get_rxfh_key_size = mlx5e_rep_get_rxfh_key_size,
371 .get_rxfh_indir_size = mlx5e_rep_get_rxfh_indir_size,
372};
373
374static const struct ethtool_ops mlx5e_uplink_rep_ethtool_ops = {
cb67b832
HHZ
375 .get_drvinfo = mlx5e_rep_get_drvinfo,
376 .get_link = ethtool_op_get_link,
377 .get_strings = mlx5e_rep_get_strings,
378 .get_sset_count = mlx5e_rep_get_sset_count,
379 .get_ethtool_stats = mlx5e_rep_get_ethtool_stats,
f128f138
GT
380 .get_ringparam = mlx5e_rep_get_ringparam,
381 .set_ringparam = mlx5e_rep_set_ringparam,
84a09733
GT
382 .get_channels = mlx5e_rep_get_channels,
383 .set_channels = mlx5e_rep_set_channels,
ff9b85de
OG
384 .get_coalesce = mlx5e_rep_get_coalesce,
385 .set_coalesce = mlx5e_rep_set_coalesce,
386 .get_link_ksettings = mlx5e_uplink_rep_get_link_ksettings,
387 .set_link_ksettings = mlx5e_uplink_rep_set_link_ksettings,
84a09733
GT
388 .get_rxfh_key_size = mlx5e_rep_get_rxfh_key_size,
389 .get_rxfh_indir_size = mlx5e_rep_get_rxfh_indir_size,
ff9b85de
OG
390 .get_pauseparam = mlx5e_uplink_rep_get_pauseparam,
391 .set_pauseparam = mlx5e_uplink_rep_set_pauseparam,
cb67b832
HHZ
392};
393
d9ee0491 394static int mlx5e_attr_get(struct net_device *dev, struct switchdev_attr *attr)
cb67b832
HHZ
395{
396 struct mlx5e_priv *priv = netdev_priv(dev);
397 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
491c37e4
RL
398 struct net_device *uplink_upper = NULL;
399 struct mlx5e_priv *uplink_priv = NULL;
400 struct net_device *uplink_dev;
cb67b832
HHZ
401
402 if (esw->mode == SRIOV_NONE)
403 return -EOPNOTSUPP;
404
491c37e4
RL
405 uplink_dev = mlx5_eswitch_uplink_get_proto_dev(esw, REP_ETH);
406 if (uplink_dev) {
407 uplink_upper = netdev_master_upper_dev_get(uplink_dev);
408 uplink_priv = netdev_priv(uplink_dev);
409 }
410
cb67b832
HHZ
411 switch (attr->id) {
412 case SWITCHDEV_ATTR_ID_PORT_PARENT_ID:
cb67b832 413 attr->u.ppid.id_len = ETH_ALEN;
7c34ec19 414 if (uplink_upper && mlx5_lag_is_sriov(uplink_priv->mdev)) {
491c37e4
RL
415 ether_addr_copy(attr->u.ppid.id, uplink_upper->dev_addr);
416 } else {
417 struct mlx5e_rep_priv *rpriv = priv->ppriv;
418 struct mlx5_eswitch_rep *rep = rpriv->rep;
419
420 ether_addr_copy(attr->u.ppid.id, rep->hw_id);
421 }
cb67b832
HHZ
422 break;
423 default:
424 return -EOPNOTSUPP;
425 }
426
427 return 0;
428}
429
f7a68945
MB
430static void mlx5e_sqs2vport_stop(struct mlx5_eswitch *esw,
431 struct mlx5_eswitch_rep *rep)
432{
2c47bf80 433 struct mlx5e_rep_sq *rep_sq, *tmp;
5ed99fb4 434 struct mlx5e_rep_priv *rpriv;
f7a68945
MB
435
436 if (esw->mode != SRIOV_OFFLOADS)
437 return;
438
5ed99fb4 439 rpriv = mlx5e_rep_to_rep_priv(rep);
2c47bf80
MB
440 list_for_each_entry_safe(rep_sq, tmp, &rpriv->vport_sqs_list, list) {
441 mlx5_eswitch_del_send_to_vport_rule(rep_sq->send_to_vport_rule);
442 list_del(&rep_sq->list);
443 kfree(rep_sq);
f7a68945
MB
444 }
445}
446
447static int mlx5e_sqs2vport_start(struct mlx5_eswitch *esw,
448 struct mlx5_eswitch_rep *rep,
5ecadff0 449 u32 *sqns_array, int sqns_num)
f7a68945
MB
450{
451 struct mlx5_flow_handle *flow_rule;
5ed99fb4 452 struct mlx5e_rep_priv *rpriv;
2c47bf80 453 struct mlx5e_rep_sq *rep_sq;
f7a68945
MB
454 int err;
455 int i;
456
457 if (esw->mode != SRIOV_OFFLOADS)
458 return 0;
459
5ed99fb4 460 rpriv = mlx5e_rep_to_rep_priv(rep);
f7a68945 461 for (i = 0; i < sqns_num; i++) {
2c47bf80
MB
462 rep_sq = kzalloc(sizeof(*rep_sq), GFP_KERNEL);
463 if (!rep_sq) {
f7a68945
MB
464 err = -ENOMEM;
465 goto out_err;
466 }
467
468 /* Add re-inject rule to the PF/representor sqs */
469 flow_rule = mlx5_eswitch_add_send_to_vport_rule(esw,
470 rep->vport,
471 sqns_array[i]);
472 if (IS_ERR(flow_rule)) {
473 err = PTR_ERR(flow_rule);
2c47bf80 474 kfree(rep_sq);
f7a68945
MB
475 goto out_err;
476 }
2c47bf80
MB
477 rep_sq->send_to_vport_rule = flow_rule;
478 list_add(&rep_sq->list, &rpriv->vport_sqs_list);
f7a68945
MB
479 }
480 return 0;
481
482out_err:
483 mlx5e_sqs2vport_stop(esw, rep);
484 return err;
485}
486
cb67b832 487int mlx5e_add_sqs_fwd_rules(struct mlx5e_priv *priv)
cb67b832
HHZ
488{
489 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1d447a39
SM
490 struct mlx5e_rep_priv *rpriv = priv->ppriv;
491 struct mlx5_eswitch_rep *rep = rpriv->rep;
cb67b832 492 struct mlx5e_channel *c;
9008ae07
SM
493 int n, tc, num_sqs = 0;
494 int err = -ENOMEM;
5ecadff0 495 u32 *sqs;
cb67b832 496
5ecadff0 497 sqs = kcalloc(priv->channels.num * priv->channels.params.num_tc, sizeof(*sqs), GFP_KERNEL);
cb67b832 498 if (!sqs)
9008ae07 499 goto out;
cb67b832 500
ff9c852f
SM
501 for (n = 0; n < priv->channels.num; n++) {
502 c = priv->channels.c[n];
cb67b832
HHZ
503 for (tc = 0; tc < c->num_tc; tc++)
504 sqs[num_sqs++] = c->sq[tc].sqn;
505 }
506
f7a68945 507 err = mlx5e_sqs2vport_start(esw, rep, sqs, num_sqs);
cb67b832 508 kfree(sqs);
9008ae07
SM
509
510out:
511 if (err)
512 netdev_warn(priv->netdev, "Failed to add SQs FWD rules %d\n", err);
cb67b832
HHZ
513 return err;
514}
515
cb67b832
HHZ
516void mlx5e_remove_sqs_fwd_rules(struct mlx5e_priv *priv)
517{
518 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1d447a39
SM
519 struct mlx5e_rep_priv *rpriv = priv->ppriv;
520 struct mlx5_eswitch_rep *rep = rpriv->rep;
cb67b832 521
f7a68945 522 mlx5e_sqs2vport_stop(esw, rep);
cb67b832
HHZ
523}
524
f6dfb4c3
HHZ
525static void mlx5e_rep_neigh_update_init_interval(struct mlx5e_rep_priv *rpriv)
526{
527#if IS_ENABLED(CONFIG_IPV6)
423c9db2 528 unsigned long ipv6_interval = NEIGH_VAR(&nd_tbl.parms,
f6dfb4c3
HHZ
529 DELAY_PROBE_TIME);
530#else
531 unsigned long ipv6_interval = ~0UL;
532#endif
533 unsigned long ipv4_interval = NEIGH_VAR(&arp_tbl.parms,
534 DELAY_PROBE_TIME);
5ed99fb4 535 struct net_device *netdev = rpriv->netdev;
f6dfb4c3
HHZ
536 struct mlx5e_priv *priv = netdev_priv(netdev);
537
538 rpriv->neigh_update.min_interval = min_t(unsigned long, ipv6_interval, ipv4_interval);
539 mlx5_fc_update_sampling_interval(priv->mdev, rpriv->neigh_update.min_interval);
540}
541
542void mlx5e_rep_queue_neigh_stats_work(struct mlx5e_priv *priv)
543{
544 struct mlx5e_rep_priv *rpriv = priv->ppriv;
545 struct mlx5e_neigh_update_table *neigh_update = &rpriv->neigh_update;
546
547 mlx5_fc_queue_stats_work(priv->mdev,
548 &neigh_update->neigh_stats_work,
549 neigh_update->min_interval);
550}
551
552static void mlx5e_rep_neigh_stats_work(struct work_struct *work)
553{
554 struct mlx5e_rep_priv *rpriv = container_of(work, struct mlx5e_rep_priv,
555 neigh_update.neigh_stats_work.work);
5ed99fb4 556 struct net_device *netdev = rpriv->netdev;
f6dfb4c3
HHZ
557 struct mlx5e_priv *priv = netdev_priv(netdev);
558 struct mlx5e_neigh_hash_entry *nhe;
559
560 rtnl_lock();
561 if (!list_empty(&rpriv->neigh_update.neigh_list))
562 mlx5e_rep_queue_neigh_stats_work(priv);
563
564 list_for_each_entry(nhe, &rpriv->neigh_update.neigh_list, neigh_list)
565 mlx5e_tc_update_neigh_used_value(nhe);
566
567 rtnl_unlock();
568}
569
232c0013
HHZ
570static void mlx5e_rep_neigh_entry_hold(struct mlx5e_neigh_hash_entry *nhe)
571{
572 refcount_inc(&nhe->refcnt);
573}
574
575static void mlx5e_rep_neigh_entry_release(struct mlx5e_neigh_hash_entry *nhe)
576{
577 if (refcount_dec_and_test(&nhe->refcnt))
578 kfree(nhe);
579}
580
581static void mlx5e_rep_update_flows(struct mlx5e_priv *priv,
582 struct mlx5e_encap_entry *e,
583 bool neigh_connected,
584 unsigned char ha[ETH_ALEN])
585{
586 struct ethhdr *eth = (struct ethhdr *)e->encap_header;
587
588 ASSERT_RTNL();
589
61c806da
OG
590 if ((e->flags & MLX5_ENCAP_ENTRY_VALID) &&
591 (!neigh_connected || !ether_addr_equal(e->h_dest, ha)))
232c0013
HHZ
592 mlx5e_tc_encap_flows_del(priv, e);
593
594 if (neigh_connected && !(e->flags & MLX5_ENCAP_ENTRY_VALID)) {
595 ether_addr_copy(e->h_dest, ha);
596 ether_addr_copy(eth->h_dest, ha);
597
598 mlx5e_tc_encap_flows_add(priv, e);
599 }
600}
601
602static void mlx5e_rep_neigh_update(struct work_struct *work)
603{
604 struct mlx5e_neigh_hash_entry *nhe =
605 container_of(work, struct mlx5e_neigh_hash_entry, neigh_update_work);
606 struct neighbour *n = nhe->n;
607 struct mlx5e_encap_entry *e;
608 unsigned char ha[ETH_ALEN];
609 struct mlx5e_priv *priv;
610 bool neigh_connected;
611 bool encap_connected;
612 u8 nud_state, dead;
613
614 rtnl_lock();
615
616 /* If these parameters are changed after we release the lock,
617 * we'll receive another event letting us know about it.
618 * We use this lock to avoid inconsistency between the neigh validity
619 * and it's hw address.
620 */
621 read_lock_bh(&n->lock);
622 memcpy(ha, n->ha, ETH_ALEN);
623 nud_state = n->nud_state;
624 dead = n->dead;
625 read_unlock_bh(&n->lock);
626
627 neigh_connected = (nud_state & NUD_VALID) && !dead;
628
629 list_for_each_entry(e, &nhe->encap_list, encap_list) {
630 encap_connected = !!(e->flags & MLX5_ENCAP_ENTRY_VALID);
631 priv = netdev_priv(e->out_dev);
632
633 if (encap_connected != neigh_connected ||
634 !ether_addr_equal(e->h_dest, ha))
635 mlx5e_rep_update_flows(priv, e, neigh_connected, ha);
636 }
637 mlx5e_rep_neigh_entry_release(nhe);
638 rtnl_unlock();
639 neigh_release(n);
640}
641
f5bc2c5d
OS
642static struct mlx5e_rep_indr_block_priv *
643mlx5e_rep_indr_block_priv_lookup(struct mlx5e_rep_priv *rpriv,
644 struct net_device *netdev)
645{
646 struct mlx5e_rep_indr_block_priv *cb_priv;
647
648 /* All callback list access should be protected by RTNL. */
649 ASSERT_RTNL();
650
651 list_for_each_entry(cb_priv,
652 &rpriv->uplink_priv.tc_indr_block_priv_list,
653 list)
654 if (cb_priv->netdev == netdev)
655 return cb_priv;
656
657 return NULL;
658}
659
660static void mlx5e_rep_indr_clean_block_privs(struct mlx5e_rep_priv *rpriv)
661{
662 struct mlx5e_rep_indr_block_priv *cb_priv, *temp;
663 struct list_head *head = &rpriv->uplink_priv.tc_indr_block_priv_list;
664
665 list_for_each_entry_safe(cb_priv, temp, head, list) {
666 mlx5e_rep_indr_unregister_block(cb_priv->netdev);
667 kfree(cb_priv);
668 }
669}
670
671static int
672mlx5e_rep_indr_offload(struct net_device *netdev,
673 struct tc_cls_flower_offload *flower,
674 struct mlx5e_rep_indr_block_priv *indr_priv)
675{
ef381359 676 struct mlx5e_priv *priv = netdev_priv(indr_priv->rpriv->netdev);
d9ee0491
OG
677 int flags = MLX5E_TC_EGRESS | MLX5E_TC_ESW_OFFLOAD;
678 int err = 0;
ef381359
OS
679
680 switch (flower->command) {
681 case TC_CLSFLOWER_REPLACE:
d9ee0491 682 err = mlx5e_configure_flower(netdev, priv, flower, flags);
ef381359
OS
683 break;
684 case TC_CLSFLOWER_DESTROY:
d9ee0491 685 err = mlx5e_delete_flower(netdev, priv, flower, flags);
ef381359
OS
686 break;
687 case TC_CLSFLOWER_STATS:
d9ee0491 688 err = mlx5e_stats_flower(netdev, priv, flower, flags);
ef381359
OS
689 break;
690 default:
691 err = -EOPNOTSUPP;
692 }
693
694 return err;
f5bc2c5d
OS
695}
696
697static int mlx5e_rep_indr_setup_block_cb(enum tc_setup_type type,
698 void *type_data, void *indr_priv)
699{
700 struct mlx5e_rep_indr_block_priv *priv = indr_priv;
701
702 switch (type) {
703 case TC_SETUP_CLSFLOWER:
704 return mlx5e_rep_indr_offload(priv->netdev, type_data, priv);
705 default:
706 return -EOPNOTSUPP;
707 }
708}
709
710static int
711mlx5e_rep_indr_setup_tc_block(struct net_device *netdev,
712 struct mlx5e_rep_priv *rpriv,
713 struct tc_block_offload *f)
714{
715 struct mlx5e_rep_indr_block_priv *indr_priv;
716 int err = 0;
717
718 if (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS)
719 return -EOPNOTSUPP;
720
721 switch (f->command) {
722 case TC_BLOCK_BIND:
723 indr_priv = mlx5e_rep_indr_block_priv_lookup(rpriv, netdev);
724 if (indr_priv)
725 return -EEXIST;
726
727 indr_priv = kmalloc(sizeof(*indr_priv), GFP_KERNEL);
728 if (!indr_priv)
729 return -ENOMEM;
730
731 indr_priv->netdev = netdev;
732 indr_priv->rpriv = rpriv;
733 list_add(&indr_priv->list,
734 &rpriv->uplink_priv.tc_indr_block_priv_list);
735
736 err = tcf_block_cb_register(f->block,
737 mlx5e_rep_indr_setup_block_cb,
738 netdev, indr_priv, f->extack);
739 if (err) {
740 list_del(&indr_priv->list);
741 kfree(indr_priv);
742 }
743
744 return err;
745 case TC_BLOCK_UNBIND:
746 tcf_block_cb_unregister(f->block,
747 mlx5e_rep_indr_setup_block_cb,
748 netdev);
749 indr_priv = mlx5e_rep_indr_block_priv_lookup(rpriv, netdev);
750 if (indr_priv) {
751 list_del(&indr_priv->list);
752 kfree(indr_priv);
753 }
754
755 return 0;
756 default:
757 return -EOPNOTSUPP;
758 }
759 return 0;
760}
761
762static
763int mlx5e_rep_indr_setup_tc_cb(struct net_device *netdev, void *cb_priv,
764 enum tc_setup_type type, void *type_data)
765{
766 switch (type) {
767 case TC_SETUP_BLOCK:
768 return mlx5e_rep_indr_setup_tc_block(netdev, cb_priv,
769 type_data);
770 default:
771 return -EOPNOTSUPP;
772 }
773}
774
775static int mlx5e_rep_indr_register_block(struct mlx5e_rep_priv *rpriv,
776 struct net_device *netdev)
777{
778 int err;
779
780 err = __tc_indr_block_cb_register(netdev, rpriv,
781 mlx5e_rep_indr_setup_tc_cb,
782 netdev);
783 if (err) {
784 struct mlx5e_priv *priv = netdev_priv(rpriv->netdev);
785
786 mlx5_core_err(priv->mdev, "Failed to register remote block notifier for %s err=%d\n",
787 netdev_name(netdev), err);
788 }
789 return err;
790}
791
792static void mlx5e_rep_indr_unregister_block(struct net_device *netdev)
793{
794 __tc_indr_block_cb_unregister(netdev, mlx5e_rep_indr_setup_tc_cb,
795 netdev);
796}
797
798static int mlx5e_nic_rep_netdevice_event(struct notifier_block *nb,
799 unsigned long event, void *ptr)
800{
801 struct mlx5e_rep_priv *rpriv = container_of(nb, struct mlx5e_rep_priv,
802 uplink_priv.netdevice_nb);
803 struct mlx5e_priv *priv = netdev_priv(rpriv->netdev);
804 struct net_device *netdev = netdev_notifier_info_to_dev(ptr);
805
806 if (!mlx5e_tc_tun_device_to_offload(priv, netdev))
807 return NOTIFY_OK;
808
809 switch (event) {
810 case NETDEV_REGISTER:
811 mlx5e_rep_indr_register_block(rpriv, netdev);
812 break;
813 case NETDEV_UNREGISTER:
814 mlx5e_rep_indr_unregister_block(netdev);
815 break;
816 }
817 return NOTIFY_OK;
818}
819
232c0013
HHZ
820static struct mlx5e_neigh_hash_entry *
821mlx5e_rep_neigh_entry_lookup(struct mlx5e_priv *priv,
822 struct mlx5e_neigh *m_neigh);
823
824static int mlx5e_rep_netevent_event(struct notifier_block *nb,
825 unsigned long event, void *ptr)
826{
827 struct mlx5e_rep_priv *rpriv = container_of(nb, struct mlx5e_rep_priv,
828 neigh_update.netevent_nb);
829 struct mlx5e_neigh_update_table *neigh_update = &rpriv->neigh_update;
5ed99fb4 830 struct net_device *netdev = rpriv->netdev;
232c0013
HHZ
831 struct mlx5e_priv *priv = netdev_priv(netdev);
832 struct mlx5e_neigh_hash_entry *nhe = NULL;
833 struct mlx5e_neigh m_neigh = {};
a2fa1fe5 834 struct neigh_parms *p;
232c0013 835 struct neighbour *n;
a2fa1fe5 836 bool found = false;
232c0013
HHZ
837
838 switch (event) {
839 case NETEVENT_NEIGH_UPDATE:
840 n = ptr;
841#if IS_ENABLED(CONFIG_IPV6)
423c9db2 842 if (n->tbl != &nd_tbl && n->tbl != &arp_tbl)
232c0013
HHZ
843#else
844 if (n->tbl != &arp_tbl)
845#endif
846 return NOTIFY_DONE;
847
848 m_neigh.dev = n->dev;
f6dfb4c3 849 m_neigh.family = n->ops->family;
232c0013
HHZ
850 memcpy(&m_neigh.dst_ip, n->primary_key, n->tbl->key_len);
851
852 /* We are in atomic context and can't take RTNL mutex, so use
853 * spin_lock_bh to lookup the neigh table. bh is used since
854 * netevent can be called from a softirq context.
855 */
856 spin_lock_bh(&neigh_update->encap_lock);
857 nhe = mlx5e_rep_neigh_entry_lookup(priv, &m_neigh);
858 if (!nhe) {
859 spin_unlock_bh(&neigh_update->encap_lock);
860 return NOTIFY_DONE;
861 }
862
863 /* This assignment is valid as long as the the neigh reference
864 * is taken
865 */
866 nhe->n = n;
867
868 /* Take a reference to ensure the neighbour and mlx5 encap
869 * entry won't be destructed until we drop the reference in
870 * delayed work.
871 */
872 neigh_hold(n);
873 mlx5e_rep_neigh_entry_hold(nhe);
874
875 if (!queue_work(priv->wq, &nhe->neigh_update_work)) {
876 mlx5e_rep_neigh_entry_release(nhe);
877 neigh_release(n);
878 }
879 spin_unlock_bh(&neigh_update->encap_lock);
880 break;
a2fa1fe5
HHZ
881
882 case NETEVENT_DELAY_PROBE_TIME_UPDATE:
883 p = ptr;
884
885 /* We check the device is present since we don't care about
886 * changes in the default table, we only care about changes
887 * done per device delay prob time parameter.
888 */
889#if IS_ENABLED(CONFIG_IPV6)
423c9db2 890 if (!p->dev || (p->tbl != &nd_tbl && p->tbl != &arp_tbl))
a2fa1fe5
HHZ
891#else
892 if (!p->dev || p->tbl != &arp_tbl)
893#endif
894 return NOTIFY_DONE;
895
896 /* We are in atomic context and can't take RTNL mutex,
897 * so use spin_lock_bh to walk the neigh list and look for
898 * the relevant device. bh is used since netevent can be
899 * called from a softirq context.
900 */
901 spin_lock_bh(&neigh_update->encap_lock);
902 list_for_each_entry(nhe, &neigh_update->neigh_list, neigh_list) {
903 if (p->dev == nhe->m_neigh.dev) {
904 found = true;
905 break;
906 }
907 }
908 spin_unlock_bh(&neigh_update->encap_lock);
909 if (!found)
910 return NOTIFY_DONE;
911
912 neigh_update->min_interval = min_t(unsigned long,
913 NEIGH_VAR(p, DELAY_PROBE_TIME),
914 neigh_update->min_interval);
915 mlx5_fc_update_sampling_interval(priv->mdev,
916 neigh_update->min_interval);
917 break;
232c0013
HHZ
918 }
919 return NOTIFY_DONE;
920}
921
37b498ff
HHZ
922static const struct rhashtable_params mlx5e_neigh_ht_params = {
923 .head_offset = offsetof(struct mlx5e_neigh_hash_entry, rhash_node),
924 .key_offset = offsetof(struct mlx5e_neigh_hash_entry, m_neigh),
925 .key_len = sizeof(struct mlx5e_neigh),
926 .automatic_shrinking = true,
927};
928
929static int mlx5e_rep_neigh_init(struct mlx5e_rep_priv *rpriv)
930{
931 struct mlx5e_neigh_update_table *neigh_update = &rpriv->neigh_update;
232c0013
HHZ
932 int err;
933
934 err = rhashtable_init(&neigh_update->neigh_ht, &mlx5e_neigh_ht_params);
935 if (err)
936 return err;
37b498ff
HHZ
937
938 INIT_LIST_HEAD(&neigh_update->neigh_list);
232c0013 939 spin_lock_init(&neigh_update->encap_lock);
f6dfb4c3
HHZ
940 INIT_DELAYED_WORK(&neigh_update->neigh_stats_work,
941 mlx5e_rep_neigh_stats_work);
942 mlx5e_rep_neigh_update_init_interval(rpriv);
232c0013
HHZ
943
944 rpriv->neigh_update.netevent_nb.notifier_call = mlx5e_rep_netevent_event;
945 err = register_netevent_notifier(&rpriv->neigh_update.netevent_nb);
946 if (err)
947 goto out_err;
948 return 0;
949
950out_err:
951 rhashtable_destroy(&neigh_update->neigh_ht);
952 return err;
37b498ff
HHZ
953}
954
955static void mlx5e_rep_neigh_cleanup(struct mlx5e_rep_priv *rpriv)
956{
957 struct mlx5e_neigh_update_table *neigh_update = &rpriv->neigh_update;
5ed99fb4 958 struct mlx5e_priv *priv = netdev_priv(rpriv->netdev);
232c0013
HHZ
959
960 unregister_netevent_notifier(&neigh_update->netevent_nb);
961
962 flush_workqueue(priv->wq); /* flush neigh update works */
37b498ff 963
f6dfb4c3
HHZ
964 cancel_delayed_work_sync(&rpriv->neigh_update.neigh_stats_work);
965
37b498ff
HHZ
966 rhashtable_destroy(&neigh_update->neigh_ht);
967}
968
969static int mlx5e_rep_neigh_entry_insert(struct mlx5e_priv *priv,
970 struct mlx5e_neigh_hash_entry *nhe)
971{
972 struct mlx5e_rep_priv *rpriv = priv->ppriv;
973 int err;
974
975 err = rhashtable_insert_fast(&rpriv->neigh_update.neigh_ht,
976 &nhe->rhash_node,
977 mlx5e_neigh_ht_params);
978 if (err)
979 return err;
980
981 list_add(&nhe->neigh_list, &rpriv->neigh_update.neigh_list);
982
983 return err;
984}
985
986static void mlx5e_rep_neigh_entry_remove(struct mlx5e_priv *priv,
987 struct mlx5e_neigh_hash_entry *nhe)
988{
989 struct mlx5e_rep_priv *rpriv = priv->ppriv;
990
232c0013
HHZ
991 spin_lock_bh(&rpriv->neigh_update.encap_lock);
992
37b498ff
HHZ
993 list_del(&nhe->neigh_list);
994
995 rhashtable_remove_fast(&rpriv->neigh_update.neigh_ht,
996 &nhe->rhash_node,
997 mlx5e_neigh_ht_params);
232c0013 998 spin_unlock_bh(&rpriv->neigh_update.encap_lock);
37b498ff
HHZ
999}
1000
232c0013
HHZ
1001/* This function must only be called under RTNL lock or under the
1002 * representor's encap_lock in case RTNL mutex can't be held.
1003 */
37b498ff
HHZ
1004static struct mlx5e_neigh_hash_entry *
1005mlx5e_rep_neigh_entry_lookup(struct mlx5e_priv *priv,
1006 struct mlx5e_neigh *m_neigh)
1007{
1008 struct mlx5e_rep_priv *rpriv = priv->ppriv;
1009 struct mlx5e_neigh_update_table *neigh_update = &rpriv->neigh_update;
1010
1011 return rhashtable_lookup_fast(&neigh_update->neigh_ht, m_neigh,
1012 mlx5e_neigh_ht_params);
1013}
1014
232c0013
HHZ
1015static int mlx5e_rep_neigh_entry_create(struct mlx5e_priv *priv,
1016 struct mlx5e_encap_entry *e,
1017 struct mlx5e_neigh_hash_entry **nhe)
1018{
1019 int err;
1020
1021 *nhe = kzalloc(sizeof(**nhe), GFP_KERNEL);
1022 if (!*nhe)
1023 return -ENOMEM;
1024
1025 memcpy(&(*nhe)->m_neigh, &e->m_neigh, sizeof(e->m_neigh));
1026 INIT_WORK(&(*nhe)->neigh_update_work, mlx5e_rep_neigh_update);
1027 INIT_LIST_HEAD(&(*nhe)->encap_list);
1028 refcount_set(&(*nhe)->refcnt, 1);
1029
1030 err = mlx5e_rep_neigh_entry_insert(priv, *nhe);
1031 if (err)
1032 goto out_free;
1033 return 0;
1034
1035out_free:
1036 kfree(*nhe);
1037 return err;
1038}
1039
1040static void mlx5e_rep_neigh_entry_destroy(struct mlx5e_priv *priv,
1041 struct mlx5e_neigh_hash_entry *nhe)
1042{
1043 /* The neigh hash entry must be removed from the hash table regardless
1044 * of the reference count value, so it won't be found by the next
1045 * neigh notification call. The neigh hash entry reference count is
1046 * incremented only during creation and neigh notification calls and
1047 * protects from freeing the nhe struct.
1048 */
1049 mlx5e_rep_neigh_entry_remove(priv, nhe);
1050 mlx5e_rep_neigh_entry_release(nhe);
1051}
1052
1053int mlx5e_rep_encap_entry_attach(struct mlx5e_priv *priv,
1054 struct mlx5e_encap_entry *e)
1055{
1056 struct mlx5e_neigh_hash_entry *nhe;
1057 int err;
1058
1059 nhe = mlx5e_rep_neigh_entry_lookup(priv, &e->m_neigh);
1060 if (!nhe) {
1061 err = mlx5e_rep_neigh_entry_create(priv, e, &nhe);
1062 if (err)
1063 return err;
1064 }
1065 list_add(&e->encap_list, &nhe->encap_list);
1066 return 0;
1067}
1068
1069void mlx5e_rep_encap_entry_detach(struct mlx5e_priv *priv,
1070 struct mlx5e_encap_entry *e)
1071{
1072 struct mlx5e_neigh_hash_entry *nhe;
1073
1074 list_del(&e->encap_list);
1075 nhe = mlx5e_rep_neigh_entry_lookup(priv, &e->m_neigh);
1076
1077 if (list_empty(&nhe->encap_list))
1078 mlx5e_rep_neigh_entry_destroy(priv, nhe);
1079}
1080
d9ee0491 1081static int mlx5e_vf_rep_open(struct net_device *dev)
20a1ea67
OG
1082{
1083 struct mlx5e_priv *priv = netdev_priv(dev);
1d447a39
SM
1084 struct mlx5e_rep_priv *rpriv = priv->ppriv;
1085 struct mlx5_eswitch_rep *rep = rpriv->rep;
20a1ea67
OG
1086 int err;
1087
63bfd399
EBE
1088 mutex_lock(&priv->state_lock);
1089 err = mlx5e_open_locked(dev);
20a1ea67 1090 if (err)
63bfd399 1091 goto unlock;
20a1ea67 1092
84c9c8f2 1093 if (!mlx5_modify_vport_admin_state(priv->mdev,
cc9c82a8
EBE
1094 MLX5_VPORT_STATE_OP_MOD_ESW_VPORT,
1095 rep->vport, MLX5_VPORT_ADMIN_STATE_UP))
20a1ea67
OG
1096 netif_carrier_on(dev);
1097
63bfd399
EBE
1098unlock:
1099 mutex_unlock(&priv->state_lock);
1100 return err;
20a1ea67
OG
1101}
1102
d9ee0491 1103static int mlx5e_vf_rep_close(struct net_device *dev)
20a1ea67
OG
1104{
1105 struct mlx5e_priv *priv = netdev_priv(dev);
1d447a39
SM
1106 struct mlx5e_rep_priv *rpriv = priv->ppriv;
1107 struct mlx5_eswitch_rep *rep = rpriv->rep;
63bfd399 1108 int ret;
20a1ea67 1109
63bfd399 1110 mutex_lock(&priv->state_lock);
84c9c8f2 1111 mlx5_modify_vport_admin_state(priv->mdev,
cc9c82a8
EBE
1112 MLX5_VPORT_STATE_OP_MOD_ESW_VPORT,
1113 rep->vport, MLX5_VPORT_ADMIN_STATE_DOWN);
63bfd399
EBE
1114 ret = mlx5e_close_locked(dev);
1115 mutex_unlock(&priv->state_lock);
1116 return ret;
20a1ea67
OG
1117}
1118
cb67b832
HHZ
1119static int mlx5e_rep_get_phys_port_name(struct net_device *dev,
1120 char *buf, size_t len)
1121{
1122 struct mlx5e_priv *priv = netdev_priv(dev);
1d447a39
SM
1123 struct mlx5e_rep_priv *rpriv = priv->ppriv;
1124 struct mlx5_eswitch_rep *rep = rpriv->rep;
cb67b832
HHZ
1125 int ret;
1126
1127 ret = snprintf(buf, len, "%d", rep->vport - 1);
1128 if (ret >= len)
1129 return -EOPNOTSUPP;
1130
1131 return 0;
1132}
1133
de4784ca 1134static int
855afa09 1135mlx5e_rep_setup_tc_cls_flower(struct mlx5e_priv *priv,
60bd4af8 1136 struct tc_cls_flower_offload *cls_flower, int flags)
d957b4e3 1137{
8c818c27
JP
1138 switch (cls_flower->command) {
1139 case TC_CLSFLOWER_REPLACE:
71d82d2a
OS
1140 return mlx5e_configure_flower(priv->netdev, priv, cls_flower,
1141 flags);
8c818c27 1142 case TC_CLSFLOWER_DESTROY:
71d82d2a
OS
1143 return mlx5e_delete_flower(priv->netdev, priv, cls_flower,
1144 flags);
8c818c27 1145 case TC_CLSFLOWER_STATS:
71d82d2a
OS
1146 return mlx5e_stats_flower(priv->netdev, priv, cls_flower,
1147 flags);
60bd4af8
OG
1148 default:
1149 return -EOPNOTSUPP;
1150 }
1151}
1152
855afa09
JP
1153static int mlx5e_rep_setup_tc_cb(enum tc_setup_type type, void *type_data,
1154 void *cb_priv)
1155{
1156 struct mlx5e_priv *priv = cb_priv;
1157
1158 switch (type) {
1159 case TC_SETUP_CLSFLOWER:
d9ee0491
OG
1160 return mlx5e_rep_setup_tc_cls_flower(priv, type_data, MLX5E_TC_INGRESS |
1161 MLX5E_TC_ESW_OFFLOAD);
855afa09
JP
1162 default:
1163 return -EOPNOTSUPP;
1164 }
1165}
1166
1167static int mlx5e_rep_setup_tc_block(struct net_device *dev,
1168 struct tc_block_offload *f)
1169{
1170 struct mlx5e_priv *priv = netdev_priv(dev);
1171
1172 if (f->binder_type != TCF_BLOCK_BINDER_TYPE_CLSACT_INGRESS)
1173 return -EOPNOTSUPP;
1174
1175 switch (f->command) {
1176 case TC_BLOCK_BIND:
1177 return tcf_block_cb_register(f->block, mlx5e_rep_setup_tc_cb,
60513bd8 1178 priv, priv, f->extack);
855afa09
JP
1179 case TC_BLOCK_UNBIND:
1180 tcf_block_cb_unregister(f->block, mlx5e_rep_setup_tc_cb, priv);
1181 return 0;
1182 default:
1183 return -EOPNOTSUPP;
1184 }
1185}
1186
8c818c27 1187static int mlx5e_rep_setup_tc(struct net_device *dev, enum tc_setup_type type,
de4784ca 1188 void *type_data)
8c818c27 1189{
2572ac53 1190 switch (type) {
855afa09
JP
1191 case TC_SETUP_BLOCK:
1192 return mlx5e_rep_setup_tc_block(dev, type_data);
d957b4e3
OG
1193 default:
1194 return -EOPNOTSUPP;
1195 }
1196}
1197
370bad0f
OG
1198bool mlx5e_is_uplink_rep(struct mlx5e_priv *priv)
1199{
1d447a39
SM
1200 struct mlx5e_rep_priv *rpriv = priv->ppriv;
1201 struct mlx5_eswitch_rep *rep;
1202
733d3e54 1203 if (!MLX5_ESWITCH_MANAGER(priv->mdev))
1d447a39 1204 return false;
370bad0f 1205
d9ee0491
OG
1206 if (!rpriv) /* non vport rep mlx5e instances don't use this field */
1207 return false;
370bad0f 1208
d9ee0491
OG
1209 rep = rpriv->rep;
1210 return (rep->vport == FDB_UPLINK_VPORT);
370bad0f
OG
1211}
1212
13e509a4 1213static bool mlx5e_rep_has_offload_stats(const struct net_device *dev, int attr_id)
370bad0f 1214{
370bad0f
OG
1215 switch (attr_id) {
1216 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
370bad0f
OG
1217 return true;
1218 }
1219
1220 return false;
1221}
1222
1223static int
1224mlx5e_get_sw_stats64(const struct net_device *dev,
1225 struct rtnl_link_stats64 *stats)
1226{
1227 struct mlx5e_priv *priv = netdev_priv(dev);
1228 struct mlx5e_sw_stats *sstats = &priv->stats.sw;
1229
868a01a2
SL
1230 mlx5e_rep_update_sw_counters(priv);
1231
370bad0f
OG
1232 stats->rx_packets = sstats->rx_packets;
1233 stats->rx_bytes = sstats->rx_bytes;
1234 stats->tx_packets = sstats->tx_packets;
1235 stats->tx_bytes = sstats->tx_bytes;
1236
1237 stats->tx_dropped = sstats->tx_queue_dropped;
1238
1239 return 0;
1240}
1241
13e509a4
OG
1242static int mlx5e_rep_get_offload_stats(int attr_id, const struct net_device *dev,
1243 void *sp)
370bad0f
OG
1244{
1245 switch (attr_id) {
1246 case IFLA_OFFLOAD_XSTATS_CPU_HIT:
1247 return mlx5e_get_sw_stats64(dev, sp);
1248 }
1249
1250 return -EINVAL;
1251}
1252
bc1f4470 1253static void
d9ee0491 1254mlx5e_vf_rep_get_stats(struct net_device *dev, struct rtnl_link_stats64 *stats)
370bad0f
OG
1255{
1256 struct mlx5e_priv *priv = netdev_priv(dev);
1257
ed56c519 1258 /* update HW stats in background for next time */
cdeef2b1 1259 mlx5e_queue_update_stats(priv);
370bad0f 1260 memcpy(stats, &priv->stats.vf_vport, sizeof(*stats));
370bad0f
OG
1261}
1262
d9ee0491
OG
1263static int mlx5e_vf_rep_change_mtu(struct net_device *netdev, int new_mtu)
1264{
1265 return mlx5e_change_mtu(netdev, new_mtu, NULL);
1266}
1267
b36cdb42 1268static int mlx5e_uplink_rep_change_mtu(struct net_device *netdev, int new_mtu)
d9ee0491 1269{
b36cdb42 1270 return mlx5e_change_mtu(netdev, new_mtu, mlx5e_set_dev_port_mtu);
d9ee0491
OG
1271}
1272
b36cdb42 1273static int mlx5e_uplink_rep_set_mac(struct net_device *netdev, void *addr)
d9ee0491 1274{
b36cdb42
OG
1275 struct sockaddr *saddr = addr;
1276
1277 if (!is_valid_ether_addr(saddr->sa_data))
1278 return -EADDRNOTAVAIL;
1279
1280 ether_addr_copy(netdev->dev_addr, saddr->sa_data);
1281 return 0;
d9ee0491
OG
1282}
1283
cb67b832
HHZ
1284static const struct switchdev_ops mlx5e_rep_switchdev_ops = {
1285 .switchdev_port_attr_get = mlx5e_attr_get,
1286};
1287
d9ee0491
OG
1288static const struct net_device_ops mlx5e_netdev_ops_vf_rep = {
1289 .ndo_open = mlx5e_vf_rep_open,
1290 .ndo_stop = mlx5e_vf_rep_close,
1291 .ndo_start_xmit = mlx5e_xmit,
1292 .ndo_get_phys_port_name = mlx5e_rep_get_phys_port_name,
1293 .ndo_setup_tc = mlx5e_rep_setup_tc,
1294 .ndo_get_stats64 = mlx5e_vf_rep_get_stats,
13e509a4
OG
1295 .ndo_has_offload_stats = mlx5e_rep_has_offload_stats,
1296 .ndo_get_offload_stats = mlx5e_rep_get_offload_stats,
d9ee0491
OG
1297 .ndo_change_mtu = mlx5e_vf_rep_change_mtu,
1298};
250a42b6 1299
d9ee0491 1300static const struct net_device_ops mlx5e_netdev_ops_uplink_rep = {
b36cdb42 1301 .ndo_open = mlx5e_open,
d9ee0491 1302 .ndo_stop = mlx5e_close,
cb67b832 1303 .ndo_start_xmit = mlx5e_xmit,
b36cdb42 1304 .ndo_set_mac_address = mlx5e_uplink_rep_set_mac,
cb67b832 1305 .ndo_get_phys_port_name = mlx5e_rep_get_phys_port_name,
8c818c27 1306 .ndo_setup_tc = mlx5e_rep_setup_tc,
d9ee0491 1307 .ndo_get_stats64 = mlx5e_get_stats,
13e509a4
OG
1308 .ndo_has_offload_stats = mlx5e_rep_has_offload_stats,
1309 .ndo_get_offload_stats = mlx5e_rep_get_offload_stats,
d9ee0491 1310 .ndo_change_mtu = mlx5e_uplink_rep_change_mtu,
073caf50
OG
1311 .ndo_udp_tunnel_add = mlx5e_add_vxlan_port,
1312 .ndo_udp_tunnel_del = mlx5e_del_vxlan_port,
1313 .ndo_features_check = mlx5e_features_check,
1314 .ndo_set_vf_mac = mlx5e_set_vf_mac,
1315 .ndo_set_vf_rate = mlx5e_set_vf_rate,
1316 .ndo_get_vf_config = mlx5e_get_vf_config,
1317 .ndo_get_vf_stats = mlx5e_get_vf_stats,
cb67b832
HHZ
1318};
1319
a0646c88
EB
1320bool mlx5e_eswitch_rep(struct net_device *netdev)
1321{
1322 if (netdev->netdev_ops == &mlx5e_netdev_ops_vf_rep ||
1323 netdev->netdev_ops == &mlx5e_netdev_ops_uplink_rep)
1324 return true;
1325
1326 return false;
1327}
1328
025380b2 1329static void mlx5e_build_rep_params(struct net_device *netdev)
cb67b832 1330{
025380b2 1331 struct mlx5e_priv *priv = netdev_priv(netdev);
d9ee0491
OG
1332 struct mlx5e_rep_priv *rpriv = priv->ppriv;
1333 struct mlx5_eswitch_rep *rep = rpriv->rep;
025380b2
OG
1334 struct mlx5_core_dev *mdev = priv->mdev;
1335 struct mlx5e_params *params;
1336
cb67b832
HHZ
1337 u8 cq_period_mode = MLX5_CAP_GEN(mdev, cq_period_start_from_cqe) ?
1338 MLX5_CQ_PERIOD_MODE_START_FROM_CQE :
1339 MLX5_CQ_PERIOD_MODE_START_FROM_EQE;
1340
025380b2 1341 params = &priv->channels.params;
472a1e44 1342 params->hard_mtu = MLX5E_ETH_HARD_MTU;
025380b2 1343 params->sw_mtu = netdev->mtu;
d9ee0491
OG
1344
1345 /* SQ */
1346 if (rep->vport == FDB_UPLINK_VPORT)
1347 params->log_sq_size = MLX5E_PARAMS_DEFAULT_LOG_SQ_SIZE;
1348 else
5d1f7354 1349 params->log_sq_size = MLX5E_REP_PARAMS_DEF_LOG_SQ_SIZE;
cb67b832 1350
749359f4
GT
1351 /* RQ */
1352 mlx5e_build_rq_params(mdev, params);
1353
1354 /* CQ moderation params */
9a317425 1355 params->rx_dim_enabled = MLX5_CAP_GEN(mdev, cq_moderation);
6a9764ef 1356 mlx5e_set_rx_cq_mode_params(params, cq_period_mode);
cb67b832 1357
6a9764ef 1358 params->num_tc = 1;
5f195c2c
CM
1359
1360 mlx5_query_min_inline(mdev, &params->tx_min_inline_mode);
84a09733
GT
1361
1362 /* RSS */
025380b2 1363 mlx5e_build_rss_params(&priv->rss_params, params->num_channels);
cb67b832
HHZ
1364}
1365
1366static void mlx5e_build_rep_netdev(struct net_device *netdev)
1367{
250a42b6 1368 struct mlx5e_priv *priv = netdev_priv(netdev);
d9ee0491
OG
1369 struct mlx5e_rep_priv *rpriv = priv->ppriv;
1370 struct mlx5_eswitch_rep *rep = rpriv->rep;
250a42b6 1371 struct mlx5_core_dev *mdev = priv->mdev;
250a42b6 1372
d9ee0491
OG
1373 if (rep->vport == FDB_UPLINK_VPORT) {
1374 SET_NETDEV_DEV(netdev, &priv->mdev->pdev->dev);
1375 netdev->netdev_ops = &mlx5e_netdev_ops_uplink_rep;
1376 /* we want a persistent mac for the uplink rep */
1377 mlx5_query_nic_vport_mac_address(mdev, 0, netdev->dev_addr);
ff9b85de 1378 netdev->ethtool_ops = &mlx5e_uplink_rep_ethtool_ops;
b36cdb42
OG
1379#ifdef CONFIG_MLX5_CORE_EN_DCB
1380 if (MLX5_CAP_GEN(mdev, qos))
1381 netdev->dcbnl_ops = &mlx5e_dcbnl_ops;
1382#endif
d9ee0491
OG
1383 } else {
1384 netdev->netdev_ops = &mlx5e_netdev_ops_vf_rep;
1385 eth_hw_addr_random(netdev);
ff9b85de 1386 netdev->ethtool_ops = &mlx5e_vf_rep_ethtool_ops;
d9ee0491 1387 }
cb67b832
HHZ
1388
1389 netdev->watchdog_timeo = 15 * HZ;
1390
cb67b832 1391
cb67b832 1392 netdev->switchdev_ops = &mlx5e_rep_switchdev_ops;
cb67b832 1393
1ee4457c 1394 netdev->features |= NETIF_F_HW_TC | NETIF_F_NETNS_LOCAL;
d957b4e3 1395 netdev->hw_features |= NETIF_F_HW_TC;
cb67b832 1396
dabeb3b0
GT
1397 netdev->hw_features |= NETIF_F_SG;
1398 netdev->hw_features |= NETIF_F_IP_CSUM;
1399 netdev->hw_features |= NETIF_F_IPV6_CSUM;
1400 netdev->hw_features |= NETIF_F_GRO;
1401 netdev->hw_features |= NETIF_F_TSO;
1402 netdev->hw_features |= NETIF_F_TSO6;
1403 netdev->hw_features |= NETIF_F_RXCSUM;
1404
1ee4457c
OG
1405 if (rep->vport != FDB_UPLINK_VPORT)
1406 netdev->features |= NETIF_F_VLAN_CHALLENGED;
1407
dabeb3b0 1408 netdev->features |= netdev->hw_features;
cb67b832
HHZ
1409}
1410
182570b2
FD
1411static int mlx5e_init_rep(struct mlx5_core_dev *mdev,
1412 struct net_device *netdev,
1413 const struct mlx5e_profile *profile,
1414 void *ppriv)
cb67b832 1415{
6a9764ef 1416 struct mlx5e_priv *priv = netdev_priv(netdev);
182570b2 1417 int err;
6a9764ef 1418
519a0bf5 1419 err = mlx5e_netdev_init(netdev, priv, mdev, profile, ppriv);
182570b2
FD
1420 if (err)
1421 return err;
6a9764ef 1422
8956f001 1423 priv->channels.params.num_channels = MLX5E_REP_PARAMS_DEF_NUM_CHANNELS;
c139dbfd 1424
025380b2 1425 mlx5e_build_rep_params(netdev);
cb67b832 1426 mlx5e_build_rep_netdev(netdev);
237f258c
FD
1427
1428 mlx5e_timestamp_init(priv);
182570b2
FD
1429
1430 return 0;
1431}
1432
1433static void mlx5e_cleanup_rep(struct mlx5e_priv *priv)
1434{
1435 mlx5e_netdev_cleanup(priv->netdev, priv);
cb67b832
HHZ
1436}
1437
84a09733
GT
1438static int mlx5e_create_rep_ttc_table(struct mlx5e_priv *priv)
1439{
1440 struct ttc_params ttc_params = {};
1441 int tt, err;
1442
1443 priv->fs.ns = mlx5_get_flow_namespace(priv->mdev,
1444 MLX5_FLOW_NAMESPACE_KERNEL);
1445
1446 /* The inner_ttc in the ttc params is intentionally not set */
1447 ttc_params.any_tt_tirn = priv->direct_tir[0].tirn;
1448 mlx5e_set_ttc_ft_params(&ttc_params);
1449 for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++)
1450 ttc_params.indir_tirn[tt] = priv->indir_tir[tt].tirn;
1451
1452 err = mlx5e_create_ttc_table(priv, &ttc_params, &priv->fs.ttc);
1453 if (err) {
1454 netdev_err(priv->netdev, "Failed to create rep ttc table, err=%d\n", err);
1455 return err;
1456 }
1457 return 0;
1458}
1459
092297e0 1460static int mlx5e_create_rep_vport_rx_rule(struct mlx5e_priv *priv)
cb67b832
HHZ
1461{
1462 struct mlx5_eswitch *esw = priv->mdev->priv.eswitch;
1d447a39
SM
1463 struct mlx5e_rep_priv *rpriv = priv->ppriv;
1464 struct mlx5_eswitch_rep *rep = rpriv->rep;
74491de9 1465 struct mlx5_flow_handle *flow_rule;
c966f7d5 1466 struct mlx5_flow_destination dest;
092297e0 1467
c966f7d5
GT
1468 dest.type = MLX5_FLOW_DESTINATION_TYPE_TIR;
1469 dest.tir_num = priv->direct_tir[0].tirn;
092297e0
GT
1470 flow_rule = mlx5_eswitch_create_vport_rx_rule(esw,
1471 rep->vport,
c966f7d5 1472 &dest);
092297e0
GT
1473 if (IS_ERR(flow_rule))
1474 return PTR_ERR(flow_rule);
1475 rpriv->vport_rx_rule = flow_rule;
1476 return 0;
1477}
1478
1479static int mlx5e_init_rep_rx(struct mlx5e_priv *priv)
1480{
1481 struct mlx5_core_dev *mdev = priv->mdev;
cb67b832 1482 int err;
cb67b832 1483
2c3b5bee
SM
1484 mlx5e_init_l2_addr(priv);
1485
1462e48d
RD
1486 err = mlx5e_open_drop_rq(priv, &priv->drop_rq);
1487 if (err) {
1488 mlx5_core_err(mdev, "open drop rq failed, %d\n", err);
1489 return err;
1490 }
1491
84a09733 1492 err = mlx5e_create_indirect_rqt(priv);
8f493ffd 1493 if (err)
1462e48d 1494 goto err_close_drop_rq;
cb67b832 1495
84a09733
GT
1496 err = mlx5e_create_direct_rqts(priv);
1497 if (err)
1498 goto err_destroy_indirect_rqts;
1499
1500 err = mlx5e_create_indirect_tirs(priv, false);
8f493ffd 1501 if (err)
cb67b832 1502 goto err_destroy_direct_rqts;
cb67b832 1503
84a09733
GT
1504 err = mlx5e_create_direct_tirs(priv);
1505 if (err)
1506 goto err_destroy_indirect_tirs;
1507
1508 err = mlx5e_create_rep_ttc_table(priv);
092297e0 1509 if (err)
cb67b832 1510 goto err_destroy_direct_tirs;
cb67b832 1511
84a09733
GT
1512 err = mlx5e_create_rep_vport_rx_rule(priv);
1513 if (err)
1514 goto err_destroy_ttc_table;
1515
cb67b832
HHZ
1516 return 0;
1517
84a09733
GT
1518err_destroy_ttc_table:
1519 mlx5e_destroy_ttc_table(priv, &priv->fs.ttc);
cb67b832
HHZ
1520err_destroy_direct_tirs:
1521 mlx5e_destroy_direct_tirs(priv);
84a09733
GT
1522err_destroy_indirect_tirs:
1523 mlx5e_destroy_indirect_tirs(priv, false);
cb67b832 1524err_destroy_direct_rqts:
8f493ffd 1525 mlx5e_destroy_direct_rqts(priv);
84a09733
GT
1526err_destroy_indirect_rqts:
1527 mlx5e_destroy_rqt(priv, &priv->indir_rqt);
1462e48d
RD
1528err_close_drop_rq:
1529 mlx5e_close_drop_rq(&priv->drop_rq);
cb67b832
HHZ
1530 return err;
1531}
1532
1533static void mlx5e_cleanup_rep_rx(struct mlx5e_priv *priv)
1534{
1d447a39 1535 struct mlx5e_rep_priv *rpriv = priv->ppriv;
cb67b832 1536
5ed99fb4 1537 mlx5_del_flow_rules(rpriv->vport_rx_rule);
84a09733 1538 mlx5e_destroy_ttc_table(priv, &priv->fs.ttc);
cb67b832 1539 mlx5e_destroy_direct_tirs(priv);
84a09733 1540 mlx5e_destroy_indirect_tirs(priv, false);
8f493ffd 1541 mlx5e_destroy_direct_rqts(priv);
84a09733 1542 mlx5e_destroy_rqt(priv, &priv->indir_rqt);
1462e48d 1543 mlx5e_close_drop_rq(&priv->drop_rq);
cb67b832
HHZ
1544}
1545
1546static int mlx5e_init_rep_tx(struct mlx5e_priv *priv)
1547{
d9ee0491
OG
1548 struct mlx5e_rep_priv *rpriv = priv->ppriv;
1549 struct mlx5_rep_uplink_priv *uplink_priv;
1550 int tc, err;
cb67b832
HHZ
1551
1552 err = mlx5e_create_tises(priv);
1553 if (err) {
1554 mlx5_core_warn(priv->mdev, "create tises failed, %d\n", err);
1555 return err;
1556 }
d9ee0491
OG
1557
1558 if (rpriv->rep->vport == FDB_UPLINK_VPORT) {
1559 uplink_priv = &rpriv->uplink_priv;
1560
1561 /* init shared tc flow table */
1562 err = mlx5e_tc_esw_init(&uplink_priv->tc_ht);
1563 if (err)
1564 goto destroy_tises;
1565
1566 /* init indirect block notifications */
1567 INIT_LIST_HEAD(&uplink_priv->tc_indr_block_priv_list);
1568 uplink_priv->netdevice_nb.notifier_call = mlx5e_nic_rep_netdevice_event;
1569 err = register_netdevice_notifier(&uplink_priv->netdevice_nb);
1570 if (err) {
1571 mlx5_core_err(priv->mdev, "Failed to register netdev notifier\n");
1572 goto tc_esw_cleanup;
1573 }
1574 }
1575
cb67b832 1576 return 0;
d9ee0491
OG
1577
1578tc_esw_cleanup:
1579 mlx5e_tc_esw_cleanup(&uplink_priv->tc_ht);
1580destroy_tises:
1581 for (tc = 0; tc < priv->profile->max_tc; tc++)
1582 mlx5e_destroy_tis(priv->mdev, priv->tisn[tc]);
1583 return err;
1584}
1585
1586static void mlx5e_cleanup_rep_tx(struct mlx5e_priv *priv)
1587{
1588 struct mlx5e_rep_priv *rpriv = priv->ppriv;
1589 int tc;
1590
1591 for (tc = 0; tc < priv->profile->max_tc; tc++)
1592 mlx5e_destroy_tis(priv->mdev, priv->tisn[tc]);
1593
1594 if (rpriv->rep->vport == FDB_UPLINK_VPORT) {
1595 /* clean indirect TC block notifications */
1596 unregister_netdevice_notifier(&rpriv->uplink_priv.netdevice_nb);
1597 mlx5e_rep_indr_clean_block_privs(rpriv);
1598
1599 /* delete shared tc flow table */
1600 mlx5e_tc_esw_cleanup(&rpriv->uplink_priv.tc_ht);
1601 }
cb67b832
HHZ
1602}
1603
b36cdb42
OG
1604static void mlx5e_vf_rep_enable(struct mlx5e_priv *priv)
1605{
1606 struct net_device *netdev = priv->netdev;
1607 struct mlx5_core_dev *mdev = priv->mdev;
1608 u16 max_mtu;
1609
1610 netdev->min_mtu = ETH_MIN_MTU;
1611 mlx5_query_port_max_mtu(mdev, &max_mtu, 1);
1612 netdev->max_mtu = MLX5E_HW2SW_MTU(&priv->channels.params, max_mtu);
1613}
1614
1615static int uplink_rep_async_event(struct notifier_block *nb, unsigned long event, void *data)
1616{
1617 struct mlx5e_priv *priv = container_of(nb, struct mlx5e_priv, events_nb);
1618 struct mlx5_eqe *eqe = data;
1619
1620 if (event != MLX5_EVENT_TYPE_PORT_CHANGE)
1621 return NOTIFY_DONE;
1622
1623 switch (eqe->sub_type) {
1624 case MLX5_PORT_CHANGE_SUBTYPE_DOWN:
1625 case MLX5_PORT_CHANGE_SUBTYPE_ACTIVE:
1626 queue_work(priv->wq, &priv->update_carrier_work);
1627 break;
1628 default:
1629 return NOTIFY_DONE;
1630 }
1631
1632 return NOTIFY_OK;
1633}
1634
1635static void mlx5e_uplink_rep_enable(struct mlx5e_priv *priv)
1636{
1637 struct net_device *netdev = priv->netdev;
1638 struct mlx5_core_dev *mdev = priv->mdev;
1639 u16 max_mtu;
1640
1641 netdev->min_mtu = ETH_MIN_MTU;
1642 mlx5_query_port_max_mtu(priv->mdev, &max_mtu, 1);
1643 netdev->max_mtu = MLX5E_HW2SW_MTU(&priv->channels.params, max_mtu);
1644 mlx5e_set_dev_port_mtu(priv);
1645
1646 mlx5_lag_add(mdev, netdev);
1647 priv->events_nb.notifier_call = uplink_rep_async_event;
1648 mlx5_notifier_register(mdev, &priv->events_nb);
1649#ifdef CONFIG_MLX5_CORE_EN_DCB
1650 mlx5e_dcbnl_initialize(priv);
1651 mlx5e_dcbnl_init_app(priv);
1652#endif
1653}
1654
1655static void mlx5e_uplink_rep_disable(struct mlx5e_priv *priv)
1656{
1657 struct mlx5_core_dev *mdev = priv->mdev;
1658
1659#ifdef CONFIG_MLX5_CORE_EN_DCB
1660 mlx5e_dcbnl_delete_app(priv);
1661#endif
1662 mlx5_notifier_unregister(mdev, &priv->events_nb);
1663 mlx5_lag_remove(mdev);
1664}
1665
1666static const struct mlx5e_profile mlx5e_vf_rep_profile = {
cb67b832 1667 .init = mlx5e_init_rep,
182570b2 1668 .cleanup = mlx5e_cleanup_rep,
cb67b832
HHZ
1669 .init_rx = mlx5e_init_rep_rx,
1670 .cleanup_rx = mlx5e_cleanup_rep_rx,
1671 .init_tx = mlx5e_init_rep_tx,
d9ee0491 1672 .cleanup_tx = mlx5e_cleanup_rep_tx,
b36cdb42
OG
1673 .enable = mlx5e_vf_rep_enable,
1674 .update_stats = mlx5e_vf_rep_update_hw_counters,
20fd0c19 1675 .rx_handlers.handle_rx_cqe = mlx5e_handle_rx_cqe_rep,
749359f4 1676 .rx_handlers.handle_rx_cqe_mpwqe = mlx5e_handle_rx_cqe_mpwrq,
cb67b832
HHZ
1677 .max_tc = 1,
1678};
1679
b36cdb42
OG
1680static const struct mlx5e_profile mlx5e_uplink_rep_profile = {
1681 .init = mlx5e_init_rep,
1682 .cleanup = mlx5e_cleanup_rep,
1683 .init_rx = mlx5e_init_rep_rx,
1684 .cleanup_rx = mlx5e_cleanup_rep_rx,
1685 .init_tx = mlx5e_init_rep_tx,
1686 .cleanup_tx = mlx5e_cleanup_rep_tx,
1687 .enable = mlx5e_uplink_rep_enable,
1688 .disable = mlx5e_uplink_rep_disable,
1689 .update_stats = mlx5e_uplink_rep_update_hw_counters,
1690 .update_carrier = mlx5e_update_carrier,
1691 .rx_handlers.handle_rx_cqe = mlx5e_handle_rx_cqe_rep,
1692 .rx_handlers.handle_rx_cqe_mpwqe = mlx5e_handle_rx_cqe_mpwrq,
1693 .max_tc = MLX5E_MAX_NUM_TC,
1694};
1695
1d447a39 1696/* e-Switch vport representors */
1d447a39 1697static int
4c66df01 1698mlx5e_vport_rep_load(struct mlx5_core_dev *dev, struct mlx5_eswitch_rep *rep)
1d447a39 1699{
b36cdb42 1700 const struct mlx5e_profile *profile;
1d447a39 1701 struct mlx5e_rep_priv *rpriv;
26e59d80 1702 struct net_device *netdev;
779d986d 1703 int nch, err;
26e59d80 1704
1d447a39
SM
1705 rpriv = kzalloc(sizeof(*rpriv), GFP_KERNEL);
1706 if (!rpriv)
1707 return -ENOMEM;
1708
d9ee0491
OG
1709 /* rpriv->rep to be looked up when profile->init() is called */
1710 rpriv->rep = rep;
1711
779d986d 1712 nch = mlx5e_get_max_num_channels(dev);
b36cdb42
OG
1713 profile = (rep->vport == FDB_UPLINK_VPORT) ? &mlx5e_uplink_rep_profile : &mlx5e_vf_rep_profile;
1714 netdev = mlx5e_create_netdev(dev, profile, nch, rpriv);
26e59d80
MHY
1715 if (!netdev) {
1716 pr_warn("Failed to create representor netdev for vport %d\n",
1717 rep->vport);
1d447a39 1718 kfree(rpriv);
cb67b832
HHZ
1719 return -EINVAL;
1720 }
26e59d80 1721
5ed99fb4 1722 rpriv->netdev = netdev;
a4b97ab4 1723 rep->rep_if[REP_ETH].priv = rpriv;
5ed99fb4 1724 INIT_LIST_HEAD(&rpriv->vport_sqs_list);
26e59d80 1725
aec002f6
OG
1726 if (rep->vport == FDB_UPLINK_VPORT) {
1727 err = mlx5e_create_mdev_resources(dev);
1728 if (err)
1729 goto err_destroy_netdev;
1730 }
1731
2c3b5bee 1732 err = mlx5e_attach_netdev(netdev_priv(netdev));
26e59d80
MHY
1733 if (err) {
1734 pr_warn("Failed to attach representor netdev for vport %d\n",
1735 rep->vport);
aec002f6 1736 goto err_destroy_mdev_resources;
26e59d80
MHY
1737 }
1738
37b498ff
HHZ
1739 err = mlx5e_rep_neigh_init(rpriv);
1740 if (err) {
1741 pr_warn("Failed to initialized neighbours handling for vport %d\n",
1742 rep->vport);
1743 goto err_detach_netdev;
1744 }
1745
26e59d80
MHY
1746 err = register_netdev(netdev);
1747 if (err) {
1748 pr_warn("Failed to register representor netdev for vport %d\n",
1749 rep->vport);
ef381359 1750 goto err_neigh_cleanup;
26e59d80
MHY
1751 }
1752
cb67b832 1753 return 0;
26e59d80 1754
37b498ff
HHZ
1755err_neigh_cleanup:
1756 mlx5e_rep_neigh_cleanup(rpriv);
1757
26e59d80 1758err_detach_netdev:
2c3b5bee 1759 mlx5e_detach_netdev(netdev_priv(netdev));
26e59d80 1760
aec002f6
OG
1761err_destroy_mdev_resources:
1762 if (rep->vport == FDB_UPLINK_VPORT)
1763 mlx5e_destroy_mdev_resources(dev);
1764
26e59d80 1765err_destroy_netdev:
2c3b5bee 1766 mlx5e_destroy_netdev(netdev_priv(netdev));
1d447a39 1767 kfree(rpriv);
26e59d80 1768 return err;
cb67b832
HHZ
1769}
1770
1d447a39 1771static void
4c66df01 1772mlx5e_vport_rep_unload(struct mlx5_eswitch_rep *rep)
cb67b832 1773{
5ed99fb4
MB
1774 struct mlx5e_rep_priv *rpriv = mlx5e_rep_to_rep_priv(rep);
1775 struct net_device *netdev = rpriv->netdev;
1d447a39
SM
1776 struct mlx5e_priv *priv = netdev_priv(netdev);
1777 void *ppriv = priv->ppriv;
cb67b832 1778
5ed99fb4 1779 unregister_netdev(netdev);
37b498ff 1780 mlx5e_rep_neigh_cleanup(rpriv);
1d447a39 1781 mlx5e_detach_netdev(priv);
aec002f6
OG
1782 if (rep->vport == FDB_UPLINK_VPORT)
1783 mlx5e_destroy_mdev_resources(priv->mdev);
1d447a39
SM
1784 mlx5e_destroy_netdev(priv);
1785 kfree(ppriv); /* mlx5e_rep_priv */
1786}
1787
22215908
MB
1788static void *mlx5e_vport_rep_get_proto_dev(struct mlx5_eswitch_rep *rep)
1789{
1790 struct mlx5e_rep_priv *rpriv;
1791
1792 rpriv = mlx5e_rep_to_rep_priv(rep);
1793
1794 return rpriv->netdev;
1795}
1796
aec002f6 1797void mlx5e_rep_register_vport_reps(struct mlx5_core_dev *mdev)
1d447a39 1798{
aec002f6 1799 struct mlx5_eswitch *esw = mdev->priv.eswitch;
1d447a39
SM
1800 int total_vfs = MLX5_TOTAL_VPORTS(mdev);
1801 int vport;
1d447a39 1802
d9ee0491 1803 for (vport = 0; vport < total_vfs; vport++) {
a4b97ab4 1804 struct mlx5_eswitch_rep_if rep_if = {};
1d447a39 1805
a4b97ab4
MB
1806 rep_if.load = mlx5e_vport_rep_load;
1807 rep_if.unload = mlx5e_vport_rep_unload;
22215908 1808 rep_if.get_proto_dev = mlx5e_vport_rep_get_proto_dev;
a4b97ab4 1809 mlx5_eswitch_register_vport_rep(esw, vport, &rep_if, REP_ETH);
1d447a39
SM
1810 }
1811}
1812
aec002f6 1813void mlx5e_rep_unregister_vport_reps(struct mlx5_core_dev *mdev)
1d447a39 1814{
1d447a39
SM
1815 struct mlx5_eswitch *esw = mdev->priv.eswitch;
1816 int total_vfs = MLX5_TOTAL_VPORTS(mdev);
1817 int vport;
1818
d9ee0491 1819 for (vport = total_vfs - 1; vport >= 0; vport--)
a4b97ab4 1820 mlx5_eswitch_unregister_vport_rep(esw, vport, REP_ETH);
1d447a39 1821}