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e8f887ac AV |
1 | /* |
2 | * Copyright (c) 2016, Mellanox Technologies. All rights reserved. | |
3 | * | |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | */ | |
32 | ||
e3a2b7ed | 33 | #include <net/flow_dissector.h> |
3f7d0eb4 | 34 | #include <net/sch_generic.h> |
e3a2b7ed AV |
35 | #include <net/pkt_cls.h> |
36 | #include <net/tc_act/tc_gact.h> | |
12185a9f | 37 | #include <net/tc_act/tc_skbedit.h> |
e8f887ac AV |
38 | #include <linux/mlx5/fs.h> |
39 | #include <linux/mlx5/device.h> | |
40 | #include <linux/rhashtable.h> | |
03a9d11e OG |
41 | #include <net/switchdev.h> |
42 | #include <net/tc_act/tc_mirred.h> | |
776b12b6 | 43 | #include <net/tc_act/tc_vlan.h> |
bbd00f7e | 44 | #include <net/tc_act/tc_tunnel_key.h> |
d79b6df6 | 45 | #include <net/tc_act/tc_pedit.h> |
26c02749 | 46 | #include <net/tc_act/tc_csum.h> |
a54e20b4 | 47 | #include <net/vxlan.h> |
f6dfb4c3 | 48 | #include <net/arp.h> |
e8f887ac | 49 | #include "en.h" |
1d447a39 | 50 | #include "en_rep.h" |
232c0013 | 51 | #include "en_tc.h" |
03a9d11e | 52 | #include "eswitch.h" |
358aa5ce | 53 | #include "lib/vxlan.h" |
3f6d08d1 | 54 | #include "fs_core.h" |
2c81bfd5 | 55 | #include "en/port.h" |
e8f887ac | 56 | |
3bc4b7bf OG |
57 | struct mlx5_nic_flow_attr { |
58 | u32 action; | |
59 | u32 flow_tag; | |
2f4fe4ca | 60 | u32 mod_hdr_id; |
5c65c564 | 61 | u32 hairpin_tirn; |
38aa51c1 | 62 | u8 match_level; |
3f6d08d1 | 63 | struct mlx5_flow_table *hairpin_ft; |
b8aee822 | 64 | struct mlx5_fc *counter; |
3bc4b7bf OG |
65 | }; |
66 | ||
60bd4af8 OG |
67 | #define MLX5E_TC_FLOW_BASE (MLX5E_TC_LAST_EXPORTED_BIT + 1) |
68 | ||
65ba8fb7 | 69 | enum { |
60bd4af8 OG |
70 | MLX5E_TC_FLOW_INGRESS = MLX5E_TC_INGRESS, |
71 | MLX5E_TC_FLOW_EGRESS = MLX5E_TC_EGRESS, | |
72 | MLX5E_TC_FLOW_ESWITCH = BIT(MLX5E_TC_FLOW_BASE), | |
73 | MLX5E_TC_FLOW_NIC = BIT(MLX5E_TC_FLOW_BASE + 1), | |
74 | MLX5E_TC_FLOW_OFFLOADED = BIT(MLX5E_TC_FLOW_BASE + 2), | |
75 | MLX5E_TC_FLOW_HAIRPIN = BIT(MLX5E_TC_FLOW_BASE + 3), | |
76 | MLX5E_TC_FLOW_HAIRPIN_RSS = BIT(MLX5E_TC_FLOW_BASE + 4), | |
5dbe906f | 77 | MLX5E_TC_FLOW_SLOW = BIT(MLX5E_TC_FLOW_BASE + 5), |
65ba8fb7 OG |
78 | }; |
79 | ||
e4ad91f2 CM |
80 | #define MLX5E_TC_MAX_SPLITS 1 |
81 | ||
e8f887ac AV |
82 | struct mlx5e_tc_flow { |
83 | struct rhash_head node; | |
655dc3d2 | 84 | struct mlx5e_priv *priv; |
e8f887ac | 85 | u64 cookie; |
5dbe906f | 86 | u16 flags; |
e4ad91f2 | 87 | struct mlx5_flow_handle *rule[MLX5E_TC_MAX_SPLITS + 1]; |
11c9c548 OG |
88 | struct list_head encap; /* flows sharing the same encap ID */ |
89 | struct list_head mod_hdr; /* flows sharing the same mod hdr ID */ | |
5c65c564 | 90 | struct list_head hairpin; /* flows sharing the same hairpin */ |
3bc4b7bf OG |
91 | union { |
92 | struct mlx5_esw_flow_attr esw_attr[0]; | |
93 | struct mlx5_nic_flow_attr nic_attr[0]; | |
94 | }; | |
e8f887ac AV |
95 | }; |
96 | ||
17091853 | 97 | struct mlx5e_tc_flow_parse_attr { |
3c37745e | 98 | struct ip_tunnel_info tun_info; |
d11afc26 | 99 | struct net_device *filter_dev; |
17091853 | 100 | struct mlx5_flow_spec spec; |
d79b6df6 OG |
101 | int num_mod_hdr_actions; |
102 | void *mod_hdr_actions; | |
3c37745e | 103 | int mirred_ifindex; |
17091853 OG |
104 | }; |
105 | ||
acff797c | 106 | #define MLX5E_TC_TABLE_NUM_GROUPS 4 |
b3a433de | 107 | #define MLX5E_TC_TABLE_MAX_GROUP_SIZE BIT(16) |
e8f887ac | 108 | |
77ab67b7 OG |
109 | struct mlx5e_hairpin { |
110 | struct mlx5_hairpin *pair; | |
111 | ||
112 | struct mlx5_core_dev *func_mdev; | |
3f6d08d1 | 113 | struct mlx5e_priv *func_priv; |
77ab67b7 OG |
114 | u32 tdn; |
115 | u32 tirn; | |
3f6d08d1 OG |
116 | |
117 | int num_channels; | |
118 | struct mlx5e_rqt indir_rqt; | |
119 | u32 indir_tirn[MLX5E_NUM_INDIR_TIRS]; | |
120 | struct mlx5e_ttc_table ttc; | |
77ab67b7 OG |
121 | }; |
122 | ||
5c65c564 OG |
123 | struct mlx5e_hairpin_entry { |
124 | /* a node of a hash table which keeps all the hairpin entries */ | |
125 | struct hlist_node hairpin_hlist; | |
126 | ||
127 | /* flows sharing the same hairpin */ | |
128 | struct list_head flows; | |
129 | ||
d8822868 | 130 | u16 peer_vhca_id; |
106be53b | 131 | u8 prio; |
5c65c564 OG |
132 | struct mlx5e_hairpin *hp; |
133 | }; | |
134 | ||
11c9c548 OG |
135 | struct mod_hdr_key { |
136 | int num_actions; | |
137 | void *actions; | |
138 | }; | |
139 | ||
140 | struct mlx5e_mod_hdr_entry { | |
141 | /* a node of a hash table which keeps all the mod_hdr entries */ | |
142 | struct hlist_node mod_hdr_hlist; | |
143 | ||
144 | /* flows sharing the same mod_hdr entry */ | |
145 | struct list_head flows; | |
146 | ||
147 | struct mod_hdr_key key; | |
148 | ||
149 | u32 mod_hdr_id; | |
150 | }; | |
151 | ||
152 | #define MLX5_MH_ACT_SZ MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto) | |
153 | ||
154 | static inline u32 hash_mod_hdr_info(struct mod_hdr_key *key) | |
155 | { | |
156 | return jhash(key->actions, | |
157 | key->num_actions * MLX5_MH_ACT_SZ, 0); | |
158 | } | |
159 | ||
160 | static inline int cmp_mod_hdr_info(struct mod_hdr_key *a, | |
161 | struct mod_hdr_key *b) | |
162 | { | |
163 | if (a->num_actions != b->num_actions) | |
164 | return 1; | |
165 | ||
166 | return memcmp(a->actions, b->actions, a->num_actions * MLX5_MH_ACT_SZ); | |
167 | } | |
168 | ||
169 | static int mlx5e_attach_mod_hdr(struct mlx5e_priv *priv, | |
170 | struct mlx5e_tc_flow *flow, | |
171 | struct mlx5e_tc_flow_parse_attr *parse_attr) | |
172 | { | |
173 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
174 | int num_actions, actions_size, namespace, err; | |
175 | struct mlx5e_mod_hdr_entry *mh; | |
176 | struct mod_hdr_key key; | |
177 | bool found = false; | |
178 | u32 hash_key; | |
179 | ||
180 | num_actions = parse_attr->num_mod_hdr_actions; | |
181 | actions_size = MLX5_MH_ACT_SZ * num_actions; | |
182 | ||
183 | key.actions = parse_attr->mod_hdr_actions; | |
184 | key.num_actions = num_actions; | |
185 | ||
186 | hash_key = hash_mod_hdr_info(&key); | |
187 | ||
188 | if (flow->flags & MLX5E_TC_FLOW_ESWITCH) { | |
189 | namespace = MLX5_FLOW_NAMESPACE_FDB; | |
190 | hash_for_each_possible(esw->offloads.mod_hdr_tbl, mh, | |
191 | mod_hdr_hlist, hash_key) { | |
192 | if (!cmp_mod_hdr_info(&mh->key, &key)) { | |
193 | found = true; | |
194 | break; | |
195 | } | |
196 | } | |
197 | } else { | |
198 | namespace = MLX5_FLOW_NAMESPACE_KERNEL; | |
199 | hash_for_each_possible(priv->fs.tc.mod_hdr_tbl, mh, | |
200 | mod_hdr_hlist, hash_key) { | |
201 | if (!cmp_mod_hdr_info(&mh->key, &key)) { | |
202 | found = true; | |
203 | break; | |
204 | } | |
205 | } | |
206 | } | |
207 | ||
208 | if (found) | |
209 | goto attach_flow; | |
210 | ||
211 | mh = kzalloc(sizeof(*mh) + actions_size, GFP_KERNEL); | |
212 | if (!mh) | |
213 | return -ENOMEM; | |
214 | ||
215 | mh->key.actions = (void *)mh + sizeof(*mh); | |
216 | memcpy(mh->key.actions, key.actions, actions_size); | |
217 | mh->key.num_actions = num_actions; | |
218 | INIT_LIST_HEAD(&mh->flows); | |
219 | ||
220 | err = mlx5_modify_header_alloc(priv->mdev, namespace, | |
221 | mh->key.num_actions, | |
222 | mh->key.actions, | |
223 | &mh->mod_hdr_id); | |
224 | if (err) | |
225 | goto out_err; | |
226 | ||
227 | if (flow->flags & MLX5E_TC_FLOW_ESWITCH) | |
228 | hash_add(esw->offloads.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key); | |
229 | else | |
230 | hash_add(priv->fs.tc.mod_hdr_tbl, &mh->mod_hdr_hlist, hash_key); | |
231 | ||
232 | attach_flow: | |
233 | list_add(&flow->mod_hdr, &mh->flows); | |
234 | if (flow->flags & MLX5E_TC_FLOW_ESWITCH) | |
235 | flow->esw_attr->mod_hdr_id = mh->mod_hdr_id; | |
236 | else | |
237 | flow->nic_attr->mod_hdr_id = mh->mod_hdr_id; | |
238 | ||
239 | return 0; | |
240 | ||
241 | out_err: | |
242 | kfree(mh); | |
243 | return err; | |
244 | } | |
245 | ||
246 | static void mlx5e_detach_mod_hdr(struct mlx5e_priv *priv, | |
247 | struct mlx5e_tc_flow *flow) | |
248 | { | |
249 | struct list_head *next = flow->mod_hdr.next; | |
250 | ||
251 | list_del(&flow->mod_hdr); | |
252 | ||
253 | if (list_empty(next)) { | |
254 | struct mlx5e_mod_hdr_entry *mh; | |
255 | ||
256 | mh = list_entry(next, struct mlx5e_mod_hdr_entry, flows); | |
257 | ||
258 | mlx5_modify_header_dealloc(priv->mdev, mh->mod_hdr_id); | |
259 | hash_del(&mh->mod_hdr_hlist); | |
260 | kfree(mh); | |
261 | } | |
262 | } | |
263 | ||
77ab67b7 OG |
264 | static |
265 | struct mlx5_core_dev *mlx5e_hairpin_get_mdev(struct net *net, int ifindex) | |
266 | { | |
267 | struct net_device *netdev; | |
268 | struct mlx5e_priv *priv; | |
269 | ||
270 | netdev = __dev_get_by_index(net, ifindex); | |
271 | priv = netdev_priv(netdev); | |
272 | return priv->mdev; | |
273 | } | |
274 | ||
275 | static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp) | |
276 | { | |
277 | u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {0}; | |
278 | void *tirc; | |
279 | int err; | |
280 | ||
281 | err = mlx5_core_alloc_transport_domain(hp->func_mdev, &hp->tdn); | |
282 | if (err) | |
283 | goto alloc_tdn_err; | |
284 | ||
285 | tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); | |
286 | ||
287 | MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_DIRECT); | |
ddae74ac | 288 | MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn[0]); |
77ab67b7 OG |
289 | MLX5_SET(tirc, tirc, transport_domain, hp->tdn); |
290 | ||
291 | err = mlx5_core_create_tir(hp->func_mdev, in, MLX5_ST_SZ_BYTES(create_tir_in), &hp->tirn); | |
292 | if (err) | |
293 | goto create_tir_err; | |
294 | ||
295 | return 0; | |
296 | ||
297 | create_tir_err: | |
298 | mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn); | |
299 | alloc_tdn_err: | |
300 | return err; | |
301 | } | |
302 | ||
303 | static void mlx5e_hairpin_destroy_transport(struct mlx5e_hairpin *hp) | |
304 | { | |
305 | mlx5_core_destroy_tir(hp->func_mdev, hp->tirn); | |
306 | mlx5_core_dealloc_transport_domain(hp->func_mdev, hp->tdn); | |
307 | } | |
308 | ||
3f6d08d1 OG |
309 | static void mlx5e_hairpin_fill_rqt_rqns(struct mlx5e_hairpin *hp, void *rqtc) |
310 | { | |
311 | u32 indirection_rqt[MLX5E_INDIR_RQT_SIZE], rqn; | |
312 | struct mlx5e_priv *priv = hp->func_priv; | |
313 | int i, ix, sz = MLX5E_INDIR_RQT_SIZE; | |
314 | ||
315 | mlx5e_build_default_indir_rqt(indirection_rqt, sz, | |
316 | hp->num_channels); | |
317 | ||
318 | for (i = 0; i < sz; i++) { | |
319 | ix = i; | |
bbeb53b8 | 320 | if (priv->rss_params.hfunc == ETH_RSS_HASH_XOR) |
3f6d08d1 OG |
321 | ix = mlx5e_bits_invert(i, ilog2(sz)); |
322 | ix = indirection_rqt[ix]; | |
323 | rqn = hp->pair->rqn[ix]; | |
324 | MLX5_SET(rqtc, rqtc, rq_num[i], rqn); | |
325 | } | |
326 | } | |
327 | ||
328 | static int mlx5e_hairpin_create_indirect_rqt(struct mlx5e_hairpin *hp) | |
329 | { | |
330 | int inlen, err, sz = MLX5E_INDIR_RQT_SIZE; | |
331 | struct mlx5e_priv *priv = hp->func_priv; | |
332 | struct mlx5_core_dev *mdev = priv->mdev; | |
333 | void *rqtc; | |
334 | u32 *in; | |
335 | ||
336 | inlen = MLX5_ST_SZ_BYTES(create_rqt_in) + sizeof(u32) * sz; | |
337 | in = kvzalloc(inlen, GFP_KERNEL); | |
338 | if (!in) | |
339 | return -ENOMEM; | |
340 | ||
341 | rqtc = MLX5_ADDR_OF(create_rqt_in, in, rqt_context); | |
342 | ||
343 | MLX5_SET(rqtc, rqtc, rqt_actual_size, sz); | |
344 | MLX5_SET(rqtc, rqtc, rqt_max_size, sz); | |
345 | ||
346 | mlx5e_hairpin_fill_rqt_rqns(hp, rqtc); | |
347 | ||
348 | err = mlx5_core_create_rqt(mdev, in, inlen, &hp->indir_rqt.rqtn); | |
349 | if (!err) | |
350 | hp->indir_rqt.enabled = true; | |
351 | ||
352 | kvfree(in); | |
353 | return err; | |
354 | } | |
355 | ||
356 | static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp) | |
357 | { | |
358 | struct mlx5e_priv *priv = hp->func_priv; | |
359 | u32 in[MLX5_ST_SZ_DW(create_tir_in)]; | |
360 | int tt, i, err; | |
361 | void *tirc; | |
362 | ||
363 | for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) { | |
d930ac79 AL |
364 | struct mlx5e_tirc_config ttconfig = mlx5e_tirc_get_default_config(tt); |
365 | ||
3f6d08d1 OG |
366 | memset(in, 0, MLX5_ST_SZ_BYTES(create_tir_in)); |
367 | tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); | |
368 | ||
369 | MLX5_SET(tirc, tirc, transport_domain, hp->tdn); | |
370 | MLX5_SET(tirc, tirc, disp_type, MLX5_TIRC_DISP_TYPE_INDIRECT); | |
371 | MLX5_SET(tirc, tirc, indirect_table, hp->indir_rqt.rqtn); | |
bbeb53b8 AL |
372 | mlx5e_build_indir_tir_ctx_hash(&priv->rss_params, &ttconfig, tirc, false); |
373 | ||
3f6d08d1 OG |
374 | err = mlx5_core_create_tir(hp->func_mdev, in, |
375 | MLX5_ST_SZ_BYTES(create_tir_in), &hp->indir_tirn[tt]); | |
376 | if (err) { | |
377 | mlx5_core_warn(hp->func_mdev, "create indirect tirs failed, %d\n", err); | |
378 | goto err_destroy_tirs; | |
379 | } | |
380 | } | |
381 | return 0; | |
382 | ||
383 | err_destroy_tirs: | |
384 | for (i = 0; i < tt; i++) | |
385 | mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[i]); | |
386 | return err; | |
387 | } | |
388 | ||
389 | static void mlx5e_hairpin_destroy_indirect_tirs(struct mlx5e_hairpin *hp) | |
390 | { | |
391 | int tt; | |
392 | ||
393 | for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) | |
394 | mlx5_core_destroy_tir(hp->func_mdev, hp->indir_tirn[tt]); | |
395 | } | |
396 | ||
397 | static void mlx5e_hairpin_set_ttc_params(struct mlx5e_hairpin *hp, | |
398 | struct ttc_params *ttc_params) | |
399 | { | |
400 | struct mlx5_flow_table_attr *ft_attr = &ttc_params->ft_attr; | |
401 | int tt; | |
402 | ||
403 | memset(ttc_params, 0, sizeof(*ttc_params)); | |
404 | ||
405 | ttc_params->any_tt_tirn = hp->tirn; | |
406 | ||
407 | for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) | |
408 | ttc_params->indir_tirn[tt] = hp->indir_tirn[tt]; | |
409 | ||
410 | ft_attr->max_fte = MLX5E_NUM_TT; | |
411 | ft_attr->level = MLX5E_TC_TTC_FT_LEVEL; | |
412 | ft_attr->prio = MLX5E_TC_PRIO; | |
413 | } | |
414 | ||
415 | static int mlx5e_hairpin_rss_init(struct mlx5e_hairpin *hp) | |
416 | { | |
417 | struct mlx5e_priv *priv = hp->func_priv; | |
418 | struct ttc_params ttc_params; | |
419 | int err; | |
420 | ||
421 | err = mlx5e_hairpin_create_indirect_rqt(hp); | |
422 | if (err) | |
423 | return err; | |
424 | ||
425 | err = mlx5e_hairpin_create_indirect_tirs(hp); | |
426 | if (err) | |
427 | goto err_create_indirect_tirs; | |
428 | ||
429 | mlx5e_hairpin_set_ttc_params(hp, &ttc_params); | |
430 | err = mlx5e_create_ttc_table(priv, &ttc_params, &hp->ttc); | |
431 | if (err) | |
432 | goto err_create_ttc_table; | |
433 | ||
434 | netdev_dbg(priv->netdev, "add hairpin: using %d channels rss ttc table id %x\n", | |
435 | hp->num_channels, hp->ttc.ft.t->id); | |
436 | ||
437 | return 0; | |
438 | ||
439 | err_create_ttc_table: | |
440 | mlx5e_hairpin_destroy_indirect_tirs(hp); | |
441 | err_create_indirect_tirs: | |
442 | mlx5e_destroy_rqt(priv, &hp->indir_rqt); | |
443 | ||
444 | return err; | |
445 | } | |
446 | ||
447 | static void mlx5e_hairpin_rss_cleanup(struct mlx5e_hairpin *hp) | |
448 | { | |
449 | struct mlx5e_priv *priv = hp->func_priv; | |
450 | ||
451 | mlx5e_destroy_ttc_table(priv, &hp->ttc); | |
452 | mlx5e_hairpin_destroy_indirect_tirs(hp); | |
453 | mlx5e_destroy_rqt(priv, &hp->indir_rqt); | |
454 | } | |
455 | ||
77ab67b7 OG |
456 | static struct mlx5e_hairpin * |
457 | mlx5e_hairpin_create(struct mlx5e_priv *priv, struct mlx5_hairpin_params *params, | |
458 | int peer_ifindex) | |
459 | { | |
460 | struct mlx5_core_dev *func_mdev, *peer_mdev; | |
461 | struct mlx5e_hairpin *hp; | |
462 | struct mlx5_hairpin *pair; | |
463 | int err; | |
464 | ||
465 | hp = kzalloc(sizeof(*hp), GFP_KERNEL); | |
466 | if (!hp) | |
467 | return ERR_PTR(-ENOMEM); | |
468 | ||
469 | func_mdev = priv->mdev; | |
470 | peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex); | |
471 | ||
472 | pair = mlx5_core_hairpin_create(func_mdev, peer_mdev, params); | |
473 | if (IS_ERR(pair)) { | |
474 | err = PTR_ERR(pair); | |
475 | goto create_pair_err; | |
476 | } | |
477 | hp->pair = pair; | |
478 | hp->func_mdev = func_mdev; | |
3f6d08d1 OG |
479 | hp->func_priv = priv; |
480 | hp->num_channels = params->num_channels; | |
77ab67b7 OG |
481 | |
482 | err = mlx5e_hairpin_create_transport(hp); | |
483 | if (err) | |
484 | goto create_transport_err; | |
485 | ||
3f6d08d1 OG |
486 | if (hp->num_channels > 1) { |
487 | err = mlx5e_hairpin_rss_init(hp); | |
488 | if (err) | |
489 | goto rss_init_err; | |
490 | } | |
491 | ||
77ab67b7 OG |
492 | return hp; |
493 | ||
3f6d08d1 OG |
494 | rss_init_err: |
495 | mlx5e_hairpin_destroy_transport(hp); | |
77ab67b7 OG |
496 | create_transport_err: |
497 | mlx5_core_hairpin_destroy(hp->pair); | |
498 | create_pair_err: | |
499 | kfree(hp); | |
500 | return ERR_PTR(err); | |
501 | } | |
502 | ||
503 | static void mlx5e_hairpin_destroy(struct mlx5e_hairpin *hp) | |
504 | { | |
3f6d08d1 OG |
505 | if (hp->num_channels > 1) |
506 | mlx5e_hairpin_rss_cleanup(hp); | |
77ab67b7 OG |
507 | mlx5e_hairpin_destroy_transport(hp); |
508 | mlx5_core_hairpin_destroy(hp->pair); | |
509 | kvfree(hp); | |
510 | } | |
511 | ||
106be53b OG |
512 | static inline u32 hash_hairpin_info(u16 peer_vhca_id, u8 prio) |
513 | { | |
514 | return (peer_vhca_id << 16 | prio); | |
515 | } | |
516 | ||
5c65c564 | 517 | static struct mlx5e_hairpin_entry *mlx5e_hairpin_get(struct mlx5e_priv *priv, |
106be53b | 518 | u16 peer_vhca_id, u8 prio) |
5c65c564 OG |
519 | { |
520 | struct mlx5e_hairpin_entry *hpe; | |
106be53b | 521 | u32 hash_key = hash_hairpin_info(peer_vhca_id, prio); |
5c65c564 OG |
522 | |
523 | hash_for_each_possible(priv->fs.tc.hairpin_tbl, hpe, | |
106be53b OG |
524 | hairpin_hlist, hash_key) { |
525 | if (hpe->peer_vhca_id == peer_vhca_id && hpe->prio == prio) | |
5c65c564 OG |
526 | return hpe; |
527 | } | |
528 | ||
529 | return NULL; | |
530 | } | |
531 | ||
106be53b OG |
532 | #define UNKNOWN_MATCH_PRIO 8 |
533 | ||
534 | static int mlx5e_hairpin_get_prio(struct mlx5e_priv *priv, | |
e98bedf5 EB |
535 | struct mlx5_flow_spec *spec, u8 *match_prio, |
536 | struct netlink_ext_ack *extack) | |
106be53b OG |
537 | { |
538 | void *headers_c, *headers_v; | |
539 | u8 prio_val, prio_mask = 0; | |
540 | bool vlan_present; | |
541 | ||
542 | #ifdef CONFIG_MLX5_CORE_EN_DCB | |
543 | if (priv->dcbx_dp.trust_state != MLX5_QPTS_TRUST_PCP) { | |
e98bedf5 EB |
544 | NL_SET_ERR_MSG_MOD(extack, |
545 | "only PCP trust state supported for hairpin"); | |
106be53b OG |
546 | return -EOPNOTSUPP; |
547 | } | |
548 | #endif | |
549 | headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, outer_headers); | |
550 | headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers); | |
551 | ||
552 | vlan_present = MLX5_GET(fte_match_set_lyr_2_4, headers_v, cvlan_tag); | |
553 | if (vlan_present) { | |
554 | prio_mask = MLX5_GET(fte_match_set_lyr_2_4, headers_c, first_prio); | |
555 | prio_val = MLX5_GET(fte_match_set_lyr_2_4, headers_v, first_prio); | |
556 | } | |
557 | ||
558 | if (!vlan_present || !prio_mask) { | |
559 | prio_val = UNKNOWN_MATCH_PRIO; | |
560 | } else if (prio_mask != 0x7) { | |
e98bedf5 EB |
561 | NL_SET_ERR_MSG_MOD(extack, |
562 | "masked priority match not supported for hairpin"); | |
106be53b OG |
563 | return -EOPNOTSUPP; |
564 | } | |
565 | ||
566 | *match_prio = prio_val; | |
567 | return 0; | |
568 | } | |
569 | ||
5c65c564 OG |
570 | static int mlx5e_hairpin_flow_add(struct mlx5e_priv *priv, |
571 | struct mlx5e_tc_flow *flow, | |
e98bedf5 EB |
572 | struct mlx5e_tc_flow_parse_attr *parse_attr, |
573 | struct netlink_ext_ack *extack) | |
5c65c564 OG |
574 | { |
575 | int peer_ifindex = parse_attr->mirred_ifindex; | |
576 | struct mlx5_hairpin_params params; | |
d8822868 | 577 | struct mlx5_core_dev *peer_mdev; |
5c65c564 OG |
578 | struct mlx5e_hairpin_entry *hpe; |
579 | struct mlx5e_hairpin *hp; | |
3f6d08d1 OG |
580 | u64 link_speed64; |
581 | u32 link_speed; | |
106be53b | 582 | u8 match_prio; |
d8822868 | 583 | u16 peer_id; |
5c65c564 OG |
584 | int err; |
585 | ||
d8822868 OG |
586 | peer_mdev = mlx5e_hairpin_get_mdev(dev_net(priv->netdev), peer_ifindex); |
587 | if (!MLX5_CAP_GEN(priv->mdev, hairpin) || !MLX5_CAP_GEN(peer_mdev, hairpin)) { | |
e98bedf5 | 588 | NL_SET_ERR_MSG_MOD(extack, "hairpin is not supported"); |
5c65c564 OG |
589 | return -EOPNOTSUPP; |
590 | } | |
591 | ||
d8822868 | 592 | peer_id = MLX5_CAP_GEN(peer_mdev, vhca_id); |
e98bedf5 EB |
593 | err = mlx5e_hairpin_get_prio(priv, &parse_attr->spec, &match_prio, |
594 | extack); | |
106be53b OG |
595 | if (err) |
596 | return err; | |
597 | hpe = mlx5e_hairpin_get(priv, peer_id, match_prio); | |
5c65c564 OG |
598 | if (hpe) |
599 | goto attach_flow; | |
600 | ||
601 | hpe = kzalloc(sizeof(*hpe), GFP_KERNEL); | |
602 | if (!hpe) | |
603 | return -ENOMEM; | |
604 | ||
605 | INIT_LIST_HEAD(&hpe->flows); | |
d8822868 | 606 | hpe->peer_vhca_id = peer_id; |
106be53b | 607 | hpe->prio = match_prio; |
5c65c564 OG |
608 | |
609 | params.log_data_size = 15; | |
610 | params.log_data_size = min_t(u8, params.log_data_size, | |
611 | MLX5_CAP_GEN(priv->mdev, log_max_hairpin_wq_data_sz)); | |
612 | params.log_data_size = max_t(u8, params.log_data_size, | |
613 | MLX5_CAP_GEN(priv->mdev, log_min_hairpin_wq_data_sz)); | |
5c65c564 | 614 | |
eb9180f7 OG |
615 | params.log_num_packets = params.log_data_size - |
616 | MLX5_MPWRQ_MIN_LOG_STRIDE_SZ(priv->mdev); | |
617 | params.log_num_packets = min_t(u8, params.log_num_packets, | |
618 | MLX5_CAP_GEN(priv->mdev, log_max_hairpin_num_packets)); | |
619 | ||
620 | params.q_counter = priv->q_counter; | |
3f6d08d1 | 621 | /* set hairpin pair per each 50Gbs share of the link */ |
2c81bfd5 | 622 | mlx5e_port_max_linkspeed(priv->mdev, &link_speed); |
3f6d08d1 OG |
623 | link_speed = max_t(u32, link_speed, 50000); |
624 | link_speed64 = link_speed; | |
625 | do_div(link_speed64, 50000); | |
626 | params.num_channels = link_speed64; | |
627 | ||
5c65c564 OG |
628 | hp = mlx5e_hairpin_create(priv, ¶ms, peer_ifindex); |
629 | if (IS_ERR(hp)) { | |
630 | err = PTR_ERR(hp); | |
631 | goto create_hairpin_err; | |
632 | } | |
633 | ||
eb9180f7 | 634 | netdev_dbg(priv->netdev, "add hairpin: tirn %x rqn %x peer %s sqn %x prio %d (log) data %d packets %d\n", |
ddae74ac | 635 | hp->tirn, hp->pair->rqn[0], hp->pair->peer_mdev->priv.name, |
eb9180f7 | 636 | hp->pair->sqn[0], match_prio, params.log_data_size, params.log_num_packets); |
5c65c564 OG |
637 | |
638 | hpe->hp = hp; | |
106be53b OG |
639 | hash_add(priv->fs.tc.hairpin_tbl, &hpe->hairpin_hlist, |
640 | hash_hairpin_info(peer_id, match_prio)); | |
5c65c564 OG |
641 | |
642 | attach_flow: | |
3f6d08d1 OG |
643 | if (hpe->hp->num_channels > 1) { |
644 | flow->flags |= MLX5E_TC_FLOW_HAIRPIN_RSS; | |
645 | flow->nic_attr->hairpin_ft = hpe->hp->ttc.ft.t; | |
646 | } else { | |
647 | flow->nic_attr->hairpin_tirn = hpe->hp->tirn; | |
648 | } | |
5c65c564 | 649 | list_add(&flow->hairpin, &hpe->flows); |
3f6d08d1 | 650 | |
5c65c564 OG |
651 | return 0; |
652 | ||
653 | create_hairpin_err: | |
654 | kfree(hpe); | |
655 | return err; | |
656 | } | |
657 | ||
658 | static void mlx5e_hairpin_flow_del(struct mlx5e_priv *priv, | |
659 | struct mlx5e_tc_flow *flow) | |
660 | { | |
661 | struct list_head *next = flow->hairpin.next; | |
662 | ||
663 | list_del(&flow->hairpin); | |
664 | ||
665 | /* no more hairpin flows for us, release the hairpin pair */ | |
666 | if (list_empty(next)) { | |
667 | struct mlx5e_hairpin_entry *hpe; | |
668 | ||
669 | hpe = list_entry(next, struct mlx5e_hairpin_entry, flows); | |
670 | ||
671 | netdev_dbg(priv->netdev, "del hairpin: peer %s\n", | |
672 | hpe->hp->pair->peer_mdev->priv.name); | |
673 | ||
674 | mlx5e_hairpin_destroy(hpe->hp); | |
675 | hash_del(&hpe->hairpin_hlist); | |
676 | kfree(hpe); | |
677 | } | |
678 | } | |
679 | ||
c83954ab | 680 | static int |
74491de9 | 681 | mlx5e_tc_add_nic_flow(struct mlx5e_priv *priv, |
17091853 | 682 | struct mlx5e_tc_flow_parse_attr *parse_attr, |
e98bedf5 EB |
683 | struct mlx5e_tc_flow *flow, |
684 | struct netlink_ext_ack *extack) | |
e8f887ac | 685 | { |
aa0cbbae | 686 | struct mlx5_nic_flow_attr *attr = flow->nic_attr; |
aad7e08d | 687 | struct mlx5_core_dev *dev = priv->mdev; |
5c65c564 | 688 | struct mlx5_flow_destination dest[2] = {}; |
66958ed9 | 689 | struct mlx5_flow_act flow_act = { |
3bc4b7bf OG |
690 | .action = attr->action, |
691 | .flow_tag = attr->flow_tag, | |
60786f09 | 692 | .reformat_id = 0, |
42f7ad67 | 693 | .flags = FLOW_ACT_HAS_TAG | FLOW_ACT_NO_APPEND, |
66958ed9 | 694 | }; |
aad7e08d | 695 | struct mlx5_fc *counter = NULL; |
e8f887ac | 696 | bool table_created = false; |
5c65c564 | 697 | int err, dest_ix = 0; |
e8f887ac | 698 | |
3f6d08d1 | 699 | if (flow->flags & MLX5E_TC_FLOW_HAIRPIN) { |
e98bedf5 | 700 | err = mlx5e_hairpin_flow_add(priv, flow, parse_attr, extack); |
3f6d08d1 | 701 | if (err) { |
3f6d08d1 OG |
702 | goto err_add_hairpin_flow; |
703 | } | |
704 | if (flow->flags & MLX5E_TC_FLOW_HAIRPIN_RSS) { | |
705 | dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE; | |
706 | dest[dest_ix].ft = attr->hairpin_ft; | |
707 | } else { | |
5c65c564 OG |
708 | dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_TIR; |
709 | dest[dest_ix].tir_num = attr->hairpin_tirn; | |
5c65c564 OG |
710 | } |
711 | dest_ix++; | |
3f6d08d1 OG |
712 | } else if (attr->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) { |
713 | dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE; | |
714 | dest[dest_ix].ft = priv->fs.vlan.ft.t; | |
715 | dest_ix++; | |
5c65c564 | 716 | } |
aad7e08d | 717 | |
5c65c564 OG |
718 | if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) { |
719 | counter = mlx5_fc_create(dev, true); | |
720 | if (IS_ERR(counter)) { | |
c83954ab | 721 | err = PTR_ERR(counter); |
5c65c564 OG |
722 | goto err_fc_create; |
723 | } | |
724 | dest[dest_ix].type = MLX5_FLOW_DESTINATION_TYPE_COUNTER; | |
171c7625 | 725 | dest[dest_ix].counter_id = mlx5_fc_id(counter); |
5c65c564 | 726 | dest_ix++; |
b8aee822 | 727 | attr->counter = counter; |
aad7e08d AV |
728 | } |
729 | ||
2f4fe4ca | 730 | if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) { |
3099eb5a | 731 | err = mlx5e_attach_mod_hdr(priv, flow, parse_attr); |
d7e75a32 | 732 | flow_act.modify_id = attr->mod_hdr_id; |
2f4fe4ca | 733 | kfree(parse_attr->mod_hdr_actions); |
c83954ab | 734 | if (err) |
2f4fe4ca | 735 | goto err_create_mod_hdr_id; |
2f4fe4ca OG |
736 | } |
737 | ||
acff797c | 738 | if (IS_ERR_OR_NULL(priv->fs.tc.t)) { |
21b9c144 OG |
739 | int tc_grp_size, tc_tbl_size; |
740 | u32 max_flow_counter; | |
741 | ||
742 | max_flow_counter = (MLX5_CAP_GEN(dev, max_flow_counter_31_16) << 16) | | |
743 | MLX5_CAP_GEN(dev, max_flow_counter_15_0); | |
744 | ||
745 | tc_grp_size = min_t(int, max_flow_counter, MLX5E_TC_TABLE_MAX_GROUP_SIZE); | |
746 | ||
747 | tc_tbl_size = min_t(int, tc_grp_size * MLX5E_TC_TABLE_NUM_GROUPS, | |
748 | BIT(MLX5_CAP_FLOWTABLE_NIC_RX(dev, log_max_ft_size))); | |
749 | ||
acff797c MG |
750 | priv->fs.tc.t = |
751 | mlx5_create_auto_grouped_flow_table(priv->fs.ns, | |
752 | MLX5E_TC_PRIO, | |
21b9c144 | 753 | tc_tbl_size, |
acff797c | 754 | MLX5E_TC_TABLE_NUM_GROUPS, |
3f6d08d1 | 755 | MLX5E_TC_FT_LEVEL, 0); |
acff797c | 756 | if (IS_ERR(priv->fs.tc.t)) { |
e98bedf5 EB |
757 | NL_SET_ERR_MSG_MOD(extack, |
758 | "Failed to create tc offload table\n"); | |
e8f887ac AV |
759 | netdev_err(priv->netdev, |
760 | "Failed to create tc offload table\n"); | |
c83954ab | 761 | err = PTR_ERR(priv->fs.tc.t); |
aad7e08d | 762 | goto err_create_ft; |
e8f887ac AV |
763 | } |
764 | ||
765 | table_created = true; | |
766 | } | |
767 | ||
38aa51c1 OG |
768 | if (attr->match_level != MLX5_MATCH_NONE) |
769 | parse_attr->spec.match_criteria_enable = MLX5_MATCH_OUTER_HEADERS; | |
770 | ||
c83954ab RL |
771 | flow->rule[0] = mlx5_add_flow_rules(priv->fs.tc.t, &parse_attr->spec, |
772 | &flow_act, dest, dest_ix); | |
aad7e08d | 773 | |
c83954ab RL |
774 | if (IS_ERR(flow->rule[0])) { |
775 | err = PTR_ERR(flow->rule[0]); | |
aad7e08d | 776 | goto err_add_rule; |
c83954ab | 777 | } |
aad7e08d | 778 | |
c83954ab | 779 | return 0; |
e8f887ac | 780 | |
aad7e08d AV |
781 | err_add_rule: |
782 | if (table_created) { | |
acff797c MG |
783 | mlx5_destroy_flow_table(priv->fs.tc.t); |
784 | priv->fs.tc.t = NULL; | |
e8f887ac | 785 | } |
aad7e08d | 786 | err_create_ft: |
2f4fe4ca | 787 | if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) |
3099eb5a | 788 | mlx5e_detach_mod_hdr(priv, flow); |
2f4fe4ca | 789 | err_create_mod_hdr_id: |
aad7e08d | 790 | mlx5_fc_destroy(dev, counter); |
5c65c564 OG |
791 | err_fc_create: |
792 | if (flow->flags & MLX5E_TC_FLOW_HAIRPIN) | |
793 | mlx5e_hairpin_flow_del(priv, flow); | |
794 | err_add_hairpin_flow: | |
c83954ab | 795 | return err; |
e8f887ac AV |
796 | } |
797 | ||
d85cdccb OG |
798 | static void mlx5e_tc_del_nic_flow(struct mlx5e_priv *priv, |
799 | struct mlx5e_tc_flow *flow) | |
800 | { | |
513f8f7f | 801 | struct mlx5_nic_flow_attr *attr = flow->nic_attr; |
d85cdccb OG |
802 | struct mlx5_fc *counter = NULL; |
803 | ||
b8aee822 | 804 | counter = attr->counter; |
e4ad91f2 | 805 | mlx5_del_flow_rules(flow->rule[0]); |
aa0cbbae | 806 | mlx5_fc_destroy(priv->mdev, counter); |
d85cdccb | 807 | |
b3a433de | 808 | if (!mlx5e_tc_num_filters(priv) && priv->fs.tc.t) { |
d85cdccb OG |
809 | mlx5_destroy_flow_table(priv->fs.tc.t); |
810 | priv->fs.tc.t = NULL; | |
811 | } | |
2f4fe4ca | 812 | |
513f8f7f | 813 | if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) |
3099eb5a | 814 | mlx5e_detach_mod_hdr(priv, flow); |
5c65c564 OG |
815 | |
816 | if (flow->flags & MLX5E_TC_FLOW_HAIRPIN) | |
817 | mlx5e_hairpin_flow_del(priv, flow); | |
d85cdccb OG |
818 | } |
819 | ||
aa0cbbae OG |
820 | static void mlx5e_detach_encap(struct mlx5e_priv *priv, |
821 | struct mlx5e_tc_flow *flow); | |
822 | ||
3c37745e OG |
823 | static int mlx5e_attach_encap(struct mlx5e_priv *priv, |
824 | struct ip_tunnel_info *tun_info, | |
825 | struct net_device *mirred_dev, | |
826 | struct net_device **encap_dev, | |
e98bedf5 EB |
827 | struct mlx5e_tc_flow *flow, |
828 | struct netlink_ext_ack *extack); | |
3c37745e | 829 | |
6d2a3ed0 OG |
830 | static struct mlx5_flow_handle * |
831 | mlx5e_tc_offload_fdb_rules(struct mlx5_eswitch *esw, | |
832 | struct mlx5e_tc_flow *flow, | |
833 | struct mlx5_flow_spec *spec, | |
834 | struct mlx5_esw_flow_attr *attr) | |
835 | { | |
836 | struct mlx5_flow_handle *rule; | |
837 | ||
838 | rule = mlx5_eswitch_add_offloaded_rule(esw, spec, attr); | |
839 | if (IS_ERR(rule)) | |
840 | return rule; | |
841 | ||
842 | if (attr->mirror_count) { | |
843 | flow->rule[1] = mlx5_eswitch_add_fwd_rule(esw, spec, attr); | |
844 | if (IS_ERR(flow->rule[1])) { | |
845 | mlx5_eswitch_del_offloaded_rule(esw, rule, attr); | |
846 | return flow->rule[1]; | |
847 | } | |
848 | } | |
849 | ||
850 | flow->flags |= MLX5E_TC_FLOW_OFFLOADED; | |
851 | return rule; | |
852 | } | |
853 | ||
854 | static void | |
855 | mlx5e_tc_unoffload_fdb_rules(struct mlx5_eswitch *esw, | |
856 | struct mlx5e_tc_flow *flow, | |
857 | struct mlx5_esw_flow_attr *attr) | |
858 | { | |
859 | flow->flags &= ~MLX5E_TC_FLOW_OFFLOADED; | |
860 | ||
861 | if (attr->mirror_count) | |
862 | mlx5_eswitch_del_fwd_rule(esw, flow->rule[1], attr); | |
863 | ||
864 | mlx5_eswitch_del_offloaded_rule(esw, flow->rule[0], attr); | |
865 | } | |
866 | ||
5dbe906f PB |
867 | static struct mlx5_flow_handle * |
868 | mlx5e_tc_offload_to_slow_path(struct mlx5_eswitch *esw, | |
869 | struct mlx5e_tc_flow *flow, | |
870 | struct mlx5_flow_spec *spec, | |
871 | struct mlx5_esw_flow_attr *slow_attr) | |
872 | { | |
873 | struct mlx5_flow_handle *rule; | |
874 | ||
875 | memcpy(slow_attr, flow->esw_attr, sizeof(*slow_attr)); | |
876 | slow_attr->action = MLX5_FLOW_CONTEXT_ACTION_FWD_DEST, | |
877 | slow_attr->mirror_count = 0, | |
878 | slow_attr->dest_chain = FDB_SLOW_PATH_CHAIN, | |
879 | ||
880 | rule = mlx5e_tc_offload_fdb_rules(esw, flow, spec, slow_attr); | |
881 | if (!IS_ERR(rule)) | |
882 | flow->flags |= MLX5E_TC_FLOW_SLOW; | |
883 | ||
884 | return rule; | |
885 | } | |
886 | ||
887 | static void | |
888 | mlx5e_tc_unoffload_from_slow_path(struct mlx5_eswitch *esw, | |
889 | struct mlx5e_tc_flow *flow, | |
890 | struct mlx5_esw_flow_attr *slow_attr) | |
891 | { | |
892 | memcpy(slow_attr, flow->esw_attr, sizeof(*slow_attr)); | |
893 | mlx5e_tc_unoffload_fdb_rules(esw, flow, slow_attr); | |
894 | flow->flags &= ~MLX5E_TC_FLOW_SLOW; | |
895 | } | |
896 | ||
c83954ab | 897 | static int |
74491de9 | 898 | mlx5e_tc_add_fdb_flow(struct mlx5e_priv *priv, |
17091853 | 899 | struct mlx5e_tc_flow_parse_attr *parse_attr, |
e98bedf5 EB |
900 | struct mlx5e_tc_flow *flow, |
901 | struct netlink_ext_ack *extack) | |
adb4c123 OG |
902 | { |
903 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
bf07aa73 | 904 | u32 max_chain = mlx5_eswitch_get_chain_range(esw); |
aa0cbbae | 905 | struct mlx5_esw_flow_attr *attr = flow->esw_attr; |
bf07aa73 | 906 | u16 max_prio = mlx5_eswitch_get_prio_range(esw); |
3c37745e | 907 | struct net_device *out_dev, *encap_dev = NULL; |
b8aee822 | 908 | struct mlx5_fc *counter = NULL; |
3c37745e OG |
909 | struct mlx5e_rep_priv *rpriv; |
910 | struct mlx5e_priv *out_priv; | |
c83954ab | 911 | int err = 0, encap_err = 0; |
8b32580d | 912 | |
bf07aa73 PB |
913 | /* if prios are not supported, keep the old behaviour of using same prio |
914 | * for all offloaded rules. | |
915 | */ | |
916 | if (!mlx5_eswitch_prios_supported(esw)) | |
917 | attr->prio = 1; | |
918 | ||
919 | if (attr->chain > max_chain) { | |
920 | NL_SET_ERR_MSG(extack, "Requested chain is out of supported range"); | |
921 | err = -EOPNOTSUPP; | |
922 | goto err_max_prio_chain; | |
923 | } | |
924 | ||
925 | if (attr->prio > max_prio) { | |
926 | NL_SET_ERR_MSG(extack, "Requested priority is out of supported range"); | |
927 | err = -EOPNOTSUPP; | |
928 | goto err_max_prio_chain; | |
929 | } | |
e52c2802 | 930 | |
60786f09 | 931 | if (attr->action & MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT) { |
3c37745e OG |
932 | out_dev = __dev_get_by_index(dev_net(priv->netdev), |
933 | attr->parse_attr->mirred_ifindex); | |
c83954ab RL |
934 | encap_err = mlx5e_attach_encap(priv, &parse_attr->tun_info, |
935 | out_dev, &encap_dev, flow, | |
936 | extack); | |
937 | if (encap_err && encap_err != -EAGAIN) { | |
938 | err = encap_err; | |
939 | goto err_attach_encap; | |
3c37745e OG |
940 | } |
941 | out_priv = netdev_priv(encap_dev); | |
942 | rpriv = out_priv->ppriv; | |
592d3651 CM |
943 | attr->out_rep[attr->out_count] = rpriv->rep; |
944 | attr->out_mdev[attr->out_count++] = out_priv->mdev; | |
3c37745e OG |
945 | } |
946 | ||
8b32580d | 947 | err = mlx5_eswitch_add_vlan_action(esw, attr); |
c83954ab | 948 | if (err) |
aa0cbbae | 949 | goto err_add_vlan; |
adb4c123 | 950 | |
d7e75a32 | 951 | if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) { |
1a9527bb | 952 | err = mlx5e_attach_mod_hdr(priv, flow, parse_attr); |
d7e75a32 | 953 | kfree(parse_attr->mod_hdr_actions); |
c83954ab | 954 | if (err) |
d7e75a32 | 955 | goto err_mod_hdr; |
d7e75a32 OG |
956 | } |
957 | ||
b8aee822 MB |
958 | if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) { |
959 | counter = mlx5_fc_create(esw->dev, true); | |
960 | if (IS_ERR(counter)) { | |
c83954ab | 961 | err = PTR_ERR(counter); |
b8aee822 MB |
962 | goto err_create_counter; |
963 | } | |
964 | ||
965 | attr->counter = counter; | |
966 | } | |
967 | ||
c83954ab | 968 | /* we get here if (1) there's no error or when |
3c37745e OG |
969 | * (2) there's an encap action and we're on -EAGAIN (no valid neigh) |
970 | */ | |
5dbe906f PB |
971 | if (encap_err == -EAGAIN) { |
972 | /* continue with goto slow path rule instead */ | |
973 | struct mlx5_esw_flow_attr slow_attr; | |
974 | ||
975 | flow->rule[0] = mlx5e_tc_offload_to_slow_path(esw, flow, &parse_attr->spec, &slow_attr); | |
976 | } else { | |
6d2a3ed0 | 977 | flow->rule[0] = mlx5e_tc_offload_fdb_rules(esw, flow, &parse_attr->spec, attr); |
3c37745e | 978 | } |
c83954ab | 979 | |
5dbe906f PB |
980 | if (IS_ERR(flow->rule[0])) { |
981 | err = PTR_ERR(flow->rule[0]); | |
982 | goto err_add_rule; | |
983 | } | |
984 | ||
985 | return 0; | |
aa0cbbae OG |
986 | |
987 | err_add_rule: | |
b8aee822 MB |
988 | mlx5_fc_destroy(esw->dev, counter); |
989 | err_create_counter: | |
513f8f7f | 990 | if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) |
1a9527bb | 991 | mlx5e_detach_mod_hdr(priv, flow); |
d7e75a32 | 992 | err_mod_hdr: |
aa0cbbae OG |
993 | mlx5_eswitch_del_vlan_action(esw, attr); |
994 | err_add_vlan: | |
60786f09 | 995 | if (attr->action & MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT) |
aa0cbbae | 996 | mlx5e_detach_encap(priv, flow); |
3c37745e | 997 | err_attach_encap: |
bf07aa73 | 998 | err_max_prio_chain: |
c83954ab | 999 | return err; |
aa0cbbae | 1000 | } |
d85cdccb OG |
1001 | |
1002 | static void mlx5e_tc_del_fdb_flow(struct mlx5e_priv *priv, | |
1003 | struct mlx5e_tc_flow *flow) | |
1004 | { | |
1005 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
d7e75a32 | 1006 | struct mlx5_esw_flow_attr *attr = flow->esw_attr; |
5dbe906f | 1007 | struct mlx5_esw_flow_attr slow_attr; |
d85cdccb | 1008 | |
5dbe906f PB |
1009 | if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) { |
1010 | if (flow->flags & MLX5E_TC_FLOW_SLOW) | |
1011 | mlx5e_tc_unoffload_from_slow_path(esw, flow, &slow_attr); | |
1012 | else | |
1013 | mlx5e_tc_unoffload_fdb_rules(esw, flow, attr); | |
1014 | } | |
d85cdccb | 1015 | |
513f8f7f | 1016 | mlx5_eswitch_del_vlan_action(esw, attr); |
d85cdccb | 1017 | |
60786f09 | 1018 | if (attr->action & MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT) { |
d85cdccb | 1019 | mlx5e_detach_encap(priv, flow); |
513f8f7f | 1020 | kvfree(attr->parse_attr); |
232c0013 | 1021 | } |
d7e75a32 | 1022 | |
513f8f7f | 1023 | if (attr->action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) |
1a9527bb | 1024 | mlx5e_detach_mod_hdr(priv, flow); |
b8aee822 MB |
1025 | |
1026 | if (attr->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) | |
1027 | mlx5_fc_destroy(esw->dev, attr->counter); | |
d85cdccb OG |
1028 | } |
1029 | ||
232c0013 HHZ |
1030 | void mlx5e_tc_encap_flows_add(struct mlx5e_priv *priv, |
1031 | struct mlx5e_encap_entry *e) | |
1032 | { | |
3c37745e | 1033 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; |
5dbe906f | 1034 | struct mlx5_esw_flow_attr slow_attr, *esw_attr; |
6d2a3ed0 OG |
1035 | struct mlx5_flow_handle *rule; |
1036 | struct mlx5_flow_spec *spec; | |
232c0013 HHZ |
1037 | struct mlx5e_tc_flow *flow; |
1038 | int err; | |
1039 | ||
60786f09 MB |
1040 | err = mlx5_packet_reformat_alloc(priv->mdev, e->tunnel_type, |
1041 | e->encap_size, e->encap_header, | |
31ca3648 | 1042 | MLX5_FLOW_NAMESPACE_FDB, |
60786f09 | 1043 | &e->encap_id); |
232c0013 HHZ |
1044 | if (err) { |
1045 | mlx5_core_warn(priv->mdev, "Failed to offload cached encapsulation header, %d\n", | |
1046 | err); | |
1047 | return; | |
1048 | } | |
1049 | e->flags |= MLX5_ENCAP_ENTRY_VALID; | |
f6dfb4c3 | 1050 | mlx5e_rep_queue_neigh_stats_work(priv); |
232c0013 HHZ |
1051 | |
1052 | list_for_each_entry(flow, &e->flows, encap) { | |
3c37745e OG |
1053 | esw_attr = flow->esw_attr; |
1054 | esw_attr->encap_id = e->encap_id; | |
6d2a3ed0 OG |
1055 | spec = &esw_attr->parse_attr->spec; |
1056 | ||
5dbe906f | 1057 | /* update from slow path rule to encap rule */ |
6d2a3ed0 OG |
1058 | rule = mlx5e_tc_offload_fdb_rules(esw, flow, spec, esw_attr); |
1059 | if (IS_ERR(rule)) { | |
1060 | err = PTR_ERR(rule); | |
232c0013 HHZ |
1061 | mlx5_core_warn(priv->mdev, "Failed to update cached encapsulation flow, %d\n", |
1062 | err); | |
1063 | continue; | |
1064 | } | |
5dbe906f PB |
1065 | |
1066 | mlx5e_tc_unoffload_from_slow_path(esw, flow, &slow_attr); | |
1067 | flow->flags |= MLX5E_TC_FLOW_OFFLOADED; /* was unset when slow path rule removed */ | |
6d2a3ed0 | 1068 | flow->rule[0] = rule; |
232c0013 HHZ |
1069 | } |
1070 | } | |
1071 | ||
1072 | void mlx5e_tc_encap_flows_del(struct mlx5e_priv *priv, | |
1073 | struct mlx5e_encap_entry *e) | |
1074 | { | |
3c37745e | 1075 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; |
5dbe906f PB |
1076 | struct mlx5_esw_flow_attr slow_attr; |
1077 | struct mlx5_flow_handle *rule; | |
1078 | struct mlx5_flow_spec *spec; | |
232c0013 | 1079 | struct mlx5e_tc_flow *flow; |
5dbe906f | 1080 | int err; |
232c0013 HHZ |
1081 | |
1082 | list_for_each_entry(flow, &e->flows, encap) { | |
5dbe906f PB |
1083 | spec = &flow->esw_attr->parse_attr->spec; |
1084 | ||
1085 | /* update from encap rule to slow path rule */ | |
1086 | rule = mlx5e_tc_offload_to_slow_path(esw, flow, spec, &slow_attr); | |
1087 | ||
1088 | if (IS_ERR(rule)) { | |
1089 | err = PTR_ERR(rule); | |
1090 | mlx5_core_warn(priv->mdev, "Failed to update slow path (encap) flow, %d\n", | |
1091 | err); | |
1092 | continue; | |
1093 | } | |
1094 | ||
1095 | mlx5e_tc_unoffload_fdb_rules(esw, flow, flow->esw_attr); | |
1096 | flow->flags |= MLX5E_TC_FLOW_OFFLOADED; /* was unset when fast path rule removed */ | |
1097 | flow->rule[0] = rule; | |
232c0013 HHZ |
1098 | } |
1099 | ||
1100 | if (e->flags & MLX5_ENCAP_ENTRY_VALID) { | |
1101 | e->flags &= ~MLX5_ENCAP_ENTRY_VALID; | |
60786f09 | 1102 | mlx5_packet_reformat_dealloc(priv->mdev, e->encap_id); |
232c0013 HHZ |
1103 | } |
1104 | } | |
1105 | ||
b8aee822 MB |
1106 | static struct mlx5_fc *mlx5e_tc_get_counter(struct mlx5e_tc_flow *flow) |
1107 | { | |
1108 | if (flow->flags & MLX5E_TC_FLOW_ESWITCH) | |
1109 | return flow->esw_attr->counter; | |
1110 | else | |
1111 | return flow->nic_attr->counter; | |
1112 | } | |
1113 | ||
f6dfb4c3 HHZ |
1114 | void mlx5e_tc_update_neigh_used_value(struct mlx5e_neigh_hash_entry *nhe) |
1115 | { | |
1116 | struct mlx5e_neigh *m_neigh = &nhe->m_neigh; | |
1117 | u64 bytes, packets, lastuse = 0; | |
1118 | struct mlx5e_tc_flow *flow; | |
1119 | struct mlx5e_encap_entry *e; | |
1120 | struct mlx5_fc *counter; | |
1121 | struct neigh_table *tbl; | |
1122 | bool neigh_used = false; | |
1123 | struct neighbour *n; | |
1124 | ||
1125 | if (m_neigh->family == AF_INET) | |
1126 | tbl = &arp_tbl; | |
1127 | #if IS_ENABLED(CONFIG_IPV6) | |
1128 | else if (m_neigh->family == AF_INET6) | |
423c9db2 | 1129 | tbl = &nd_tbl; |
f6dfb4c3 HHZ |
1130 | #endif |
1131 | else | |
1132 | return; | |
1133 | ||
1134 | list_for_each_entry(e, &nhe->encap_list, encap_list) { | |
1135 | if (!(e->flags & MLX5_ENCAP_ENTRY_VALID)) | |
1136 | continue; | |
1137 | list_for_each_entry(flow, &e->flows, encap) { | |
1138 | if (flow->flags & MLX5E_TC_FLOW_OFFLOADED) { | |
b8aee822 | 1139 | counter = mlx5e_tc_get_counter(flow); |
f6dfb4c3 HHZ |
1140 | mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse); |
1141 | if (time_after((unsigned long)lastuse, nhe->reported_lastuse)) { | |
1142 | neigh_used = true; | |
1143 | break; | |
1144 | } | |
1145 | } | |
1146 | } | |
e36d4810 RD |
1147 | if (neigh_used) |
1148 | break; | |
f6dfb4c3 HHZ |
1149 | } |
1150 | ||
1151 | if (neigh_used) { | |
1152 | nhe->reported_lastuse = jiffies; | |
1153 | ||
1154 | /* find the relevant neigh according to the cached device and | |
1155 | * dst ip pair | |
1156 | */ | |
1157 | n = neigh_lookup(tbl, &m_neigh->dst_ip, m_neigh->dev); | |
c7f7ba8d | 1158 | if (!n) |
f6dfb4c3 | 1159 | return; |
f6dfb4c3 HHZ |
1160 | |
1161 | neigh_event_send(n, NULL); | |
1162 | neigh_release(n); | |
1163 | } | |
1164 | } | |
1165 | ||
d85cdccb OG |
1166 | static void mlx5e_detach_encap(struct mlx5e_priv *priv, |
1167 | struct mlx5e_tc_flow *flow) | |
1168 | { | |
5067b602 RD |
1169 | struct list_head *next = flow->encap.next; |
1170 | ||
1171 | list_del(&flow->encap); | |
1172 | if (list_empty(next)) { | |
c1ae1152 | 1173 | struct mlx5e_encap_entry *e; |
5067b602 | 1174 | |
c1ae1152 | 1175 | e = list_entry(next, struct mlx5e_encap_entry, flows); |
232c0013 HHZ |
1176 | mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e); |
1177 | ||
1178 | if (e->flags & MLX5_ENCAP_ENTRY_VALID) | |
60786f09 | 1179 | mlx5_packet_reformat_dealloc(priv->mdev, e->encap_id); |
232c0013 | 1180 | |
cdc5a7f3 | 1181 | hash_del_rcu(&e->encap_hlist); |
232c0013 | 1182 | kfree(e->encap_header); |
5067b602 RD |
1183 | kfree(e); |
1184 | } | |
1185 | } | |
1186 | ||
e8f887ac | 1187 | static void mlx5e_tc_del_flow(struct mlx5e_priv *priv, |
961e8979 | 1188 | struct mlx5e_tc_flow *flow) |
e8f887ac | 1189 | { |
d85cdccb OG |
1190 | if (flow->flags & MLX5E_TC_FLOW_ESWITCH) |
1191 | mlx5e_tc_del_fdb_flow(priv, flow); | |
1192 | else | |
1193 | mlx5e_tc_del_nic_flow(priv, flow); | |
e8f887ac AV |
1194 | } |
1195 | ||
4d70564d OS |
1196 | static int parse_tunnel_vxlan_attr(struct mlx5e_priv *priv, |
1197 | struct mlx5_flow_spec *spec, | |
1198 | struct tc_cls_flower_offload *f, | |
1199 | void *headers_c, | |
1200 | void *headers_v) | |
bbd00f7e | 1201 | { |
4d70564d OS |
1202 | struct netlink_ext_ack *extack = f->common.extack; |
1203 | struct flow_dissector_key_ports *key = | |
1204 | skb_flow_dissector_target(f->dissector, | |
1205 | FLOW_DISSECTOR_KEY_ENC_PORTS, | |
1206 | f->key); | |
1207 | struct flow_dissector_key_ports *mask = | |
1208 | skb_flow_dissector_target(f->dissector, | |
1209 | FLOW_DISSECTOR_KEY_ENC_PORTS, | |
1210 | f->mask); | |
1211 | void *misc_c = MLX5_ADDR_OF(fte_match_param, | |
1212 | spec->match_criteria, | |
bbd00f7e | 1213 | misc_parameters); |
4d70564d OS |
1214 | void *misc_v = MLX5_ADDR_OF(fte_match_param, |
1215 | spec->match_value, | |
bbd00f7e HHZ |
1216 | misc_parameters); |
1217 | ||
4d70564d OS |
1218 | /* Full udp dst port must be given */ |
1219 | if (!dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS) || | |
1220 | memchr_inv(&mask->dst, 0xff, sizeof(mask->dst))) { | |
1221 | NL_SET_ERR_MSG_MOD(extack, | |
1222 | "VXLAN decap filter must include enc_dst_port condition"); | |
1223 | netdev_warn(priv->netdev, | |
1224 | "VXLAN decap filter must include enc_dst_port condition\n"); | |
1225 | return -EOPNOTSUPP; | |
1226 | } | |
1227 | ||
1228 | /* udp dst port must be knonwn as a VXLAN port */ | |
1229 | if (!mlx5_vxlan_lookup_port(priv->mdev->vxlan, be16_to_cpu(key->dst))) { | |
1230 | NL_SET_ERR_MSG_MOD(extack, | |
1231 | "Matched UDP port is not registered as a VXLAN port"); | |
1232 | netdev_warn(priv->netdev, | |
1233 | "UDP port %d is not registered as a VXLAN port\n", | |
1234 | be16_to_cpu(key->dst)); | |
1235 | return -EOPNOTSUPP; | |
1236 | } | |
1237 | ||
1238 | /* dst UDP port is valid here */ | |
bbd00f7e HHZ |
1239 | MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ip_protocol); |
1240 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP); | |
1241 | ||
4d70564d OS |
1242 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, udp_dport, ntohs(mask->dst)); |
1243 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, ntohs(key->dst)); | |
1244 | ||
1245 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, udp_sport, ntohs(mask->src)); | |
1246 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport, ntohs(key->src)); | |
1247 | ||
1248 | /* match on VNI */ | |
bbd00f7e HHZ |
1249 | if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID)) { |
1250 | struct flow_dissector_key_keyid *key = | |
1251 | skb_flow_dissector_target(f->dissector, | |
1252 | FLOW_DISSECTOR_KEY_ENC_KEYID, | |
1253 | f->key); | |
1254 | struct flow_dissector_key_keyid *mask = | |
1255 | skb_flow_dissector_target(f->dissector, | |
1256 | FLOW_DISSECTOR_KEY_ENC_KEYID, | |
1257 | f->mask); | |
1258 | MLX5_SET(fte_match_set_misc, misc_c, vxlan_vni, | |
1259 | be32_to_cpu(mask->keyid)); | |
1260 | MLX5_SET(fte_match_set_misc, misc_v, vxlan_vni, | |
1261 | be32_to_cpu(key->keyid)); | |
1262 | } | |
4d70564d | 1263 | return 0; |
bbd00f7e HHZ |
1264 | } |
1265 | ||
1266 | static int parse_tunnel_attr(struct mlx5e_priv *priv, | |
1267 | struct mlx5_flow_spec *spec, | |
1268 | struct tc_cls_flower_offload *f) | |
1269 | { | |
e98bedf5 | 1270 | struct netlink_ext_ack *extack = f->common.extack; |
bbd00f7e HHZ |
1271 | void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, |
1272 | outer_headers); | |
1273 | void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, | |
1274 | outer_headers); | |
1275 | ||
2e72eb43 OG |
1276 | struct flow_dissector_key_control *enc_control = |
1277 | skb_flow_dissector_target(f->dissector, | |
1278 | FLOW_DISSECTOR_KEY_ENC_CONTROL, | |
1279 | f->key); | |
1280 | ||
bbd00f7e | 1281 | if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) { |
4d70564d | 1282 | int err = 0; |
bbd00f7e | 1283 | |
4d70564d OS |
1284 | err = parse_tunnel_vxlan_attr(priv, spec, f, |
1285 | headers_c, headers_v); | |
1286 | if (err) | |
2fcd82e9 | 1287 | goto vxlan_match_offload_err; |
bbd00f7e | 1288 | } else { /* udp dst port must be given */ |
2fcd82e9 | 1289 | vxlan_match_offload_err: |
e98bedf5 EB |
1290 | NL_SET_ERR_MSG_MOD(extack, |
1291 | "IP tunnel decap offload supported only for vxlan, must set UDP dport"); | |
2fcd82e9 OG |
1292 | netdev_warn(priv->netdev, |
1293 | "IP tunnel decap offload supported only for vxlan, must set UDP dport\n"); | |
1294 | return -EOPNOTSUPP; | |
bbd00f7e HHZ |
1295 | } |
1296 | ||
2e72eb43 | 1297 | if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) { |
bbd00f7e HHZ |
1298 | struct flow_dissector_key_ipv4_addrs *key = |
1299 | skb_flow_dissector_target(f->dissector, | |
1300 | FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS, | |
1301 | f->key); | |
1302 | struct flow_dissector_key_ipv4_addrs *mask = | |
1303 | skb_flow_dissector_target(f->dissector, | |
1304 | FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS, | |
1305 | f->mask); | |
1306 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, | |
1307 | src_ipv4_src_ipv6.ipv4_layout.ipv4, | |
1308 | ntohl(mask->src)); | |
1309 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, | |
1310 | src_ipv4_src_ipv6.ipv4_layout.ipv4, | |
1311 | ntohl(key->src)); | |
1312 | ||
1313 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, | |
1314 | dst_ipv4_dst_ipv6.ipv4_layout.ipv4, | |
1315 | ntohl(mask->dst)); | |
1316 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, | |
1317 | dst_ipv4_dst_ipv6.ipv4_layout.ipv4, | |
1318 | ntohl(key->dst)); | |
bbd00f7e | 1319 | |
2e72eb43 OG |
1320 | MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype); |
1321 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IP); | |
19f44401 OG |
1322 | } else if (enc_control->addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) { |
1323 | struct flow_dissector_key_ipv6_addrs *key = | |
1324 | skb_flow_dissector_target(f->dissector, | |
1325 | FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS, | |
1326 | f->key); | |
1327 | struct flow_dissector_key_ipv6_addrs *mask = | |
1328 | skb_flow_dissector_target(f->dissector, | |
1329 | FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS, | |
1330 | f->mask); | |
1331 | ||
1332 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c, | |
1333 | src_ipv4_src_ipv6.ipv6_layout.ipv6), | |
1334 | &mask->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6)); | |
1335 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, | |
1336 | src_ipv4_src_ipv6.ipv6_layout.ipv6), | |
1337 | &key->src, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6)); | |
1338 | ||
1339 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c, | |
1340 | dst_ipv4_dst_ipv6.ipv6_layout.ipv6), | |
1341 | &mask->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6)); | |
1342 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, | |
1343 | dst_ipv4_dst_ipv6.ipv6_layout.ipv6), | |
1344 | &key->dst, MLX5_FLD_SZ_BYTES(ipv6_layout, ipv6)); | |
1345 | ||
1346 | MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, ethertype); | |
1347 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, ETH_P_IPV6); | |
2e72eb43 | 1348 | } |
bbd00f7e | 1349 | |
bcef735c OG |
1350 | if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_IP)) { |
1351 | struct flow_dissector_key_ip *key = | |
1352 | skb_flow_dissector_target(f->dissector, | |
1353 | FLOW_DISSECTOR_KEY_ENC_IP, | |
1354 | f->key); | |
1355 | struct flow_dissector_key_ip *mask = | |
1356 | skb_flow_dissector_target(f->dissector, | |
1357 | FLOW_DISSECTOR_KEY_ENC_IP, | |
1358 | f->mask); | |
1359 | ||
1360 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3); | |
1361 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3); | |
1362 | ||
1363 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2); | |
1364 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos >> 2); | |
1365 | ||
1366 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl); | |
1367 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl); | |
e98bedf5 EB |
1368 | |
1369 | if (mask->ttl && | |
1370 | !MLX5_CAP_ESW_FLOWTABLE_FDB | |
1371 | (priv->mdev, | |
1372 | ft_field_support.outer_ipv4_ttl)) { | |
1373 | NL_SET_ERR_MSG_MOD(extack, | |
1374 | "Matching on TTL is not supported"); | |
1375 | return -EOPNOTSUPP; | |
1376 | } | |
1377 | ||
bcef735c OG |
1378 | } |
1379 | ||
bbd00f7e HHZ |
1380 | /* Enforce DMAC when offloading incoming tunneled flows. |
1381 | * Flow counters require a match on the DMAC. | |
1382 | */ | |
1383 | MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_47_16); | |
1384 | MLX5_SET_TO_ONES(fte_match_set_lyr_2_4, headers_c, dmac_15_0); | |
1385 | ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, | |
1386 | dmac_47_16), priv->netdev->dev_addr); | |
1387 | ||
1388 | /* let software handle IP fragments */ | |
1389 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1); | |
1390 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 0); | |
1391 | ||
1392 | return 0; | |
1393 | } | |
1394 | ||
de0af0bf RD |
1395 | static int __parse_cls_flower(struct mlx5e_priv *priv, |
1396 | struct mlx5_flow_spec *spec, | |
1397 | struct tc_cls_flower_offload *f, | |
d708f902 | 1398 | u8 *match_level) |
e3a2b7ed | 1399 | { |
e98bedf5 | 1400 | struct netlink_ext_ack *extack = f->common.extack; |
c5bb1730 MG |
1401 | void *headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, |
1402 | outer_headers); | |
1403 | void *headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, | |
1404 | outer_headers); | |
699e96dd JL |
1405 | void *misc_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, |
1406 | misc_parameters); | |
1407 | void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, | |
1408 | misc_parameters); | |
e3a2b7ed AV |
1409 | u16 addr_type = 0; |
1410 | u8 ip_proto = 0; | |
1411 | ||
d708f902 | 1412 | *match_level = MLX5_MATCH_NONE; |
de0af0bf | 1413 | |
e3a2b7ed AV |
1414 | if (f->dissector->used_keys & |
1415 | ~(BIT(FLOW_DISSECTOR_KEY_CONTROL) | | |
1416 | BIT(FLOW_DISSECTOR_KEY_BASIC) | | |
1417 | BIT(FLOW_DISSECTOR_KEY_ETH_ADDRS) | | |
095b6cfd | 1418 | BIT(FLOW_DISSECTOR_KEY_VLAN) | |
699e96dd | 1419 | BIT(FLOW_DISSECTOR_KEY_CVLAN) | |
e3a2b7ed AV |
1420 | BIT(FLOW_DISSECTOR_KEY_IPV4_ADDRS) | |
1421 | BIT(FLOW_DISSECTOR_KEY_IPV6_ADDRS) | | |
bbd00f7e HHZ |
1422 | BIT(FLOW_DISSECTOR_KEY_PORTS) | |
1423 | BIT(FLOW_DISSECTOR_KEY_ENC_KEYID) | | |
1424 | BIT(FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) | | |
1425 | BIT(FLOW_DISSECTOR_KEY_ENC_IPV6_ADDRS) | | |
1426 | BIT(FLOW_DISSECTOR_KEY_ENC_PORTS) | | |
e77834ec | 1427 | BIT(FLOW_DISSECTOR_KEY_ENC_CONTROL) | |
fd7da28b | 1428 | BIT(FLOW_DISSECTOR_KEY_TCP) | |
bcef735c OG |
1429 | BIT(FLOW_DISSECTOR_KEY_IP) | |
1430 | BIT(FLOW_DISSECTOR_KEY_ENC_IP))) { | |
e98bedf5 | 1431 | NL_SET_ERR_MSG_MOD(extack, "Unsupported key"); |
e3a2b7ed AV |
1432 | netdev_warn(priv->netdev, "Unsupported key used: 0x%x\n", |
1433 | f->dissector->used_keys); | |
1434 | return -EOPNOTSUPP; | |
1435 | } | |
1436 | ||
bbd00f7e HHZ |
1437 | if ((dissector_uses_key(f->dissector, |
1438 | FLOW_DISSECTOR_KEY_ENC_IPV4_ADDRS) || | |
1439 | dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_KEYID) || | |
1440 | dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_PORTS)) && | |
1441 | dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ENC_CONTROL)) { | |
1442 | struct flow_dissector_key_control *key = | |
1443 | skb_flow_dissector_target(f->dissector, | |
1444 | FLOW_DISSECTOR_KEY_ENC_CONTROL, | |
1445 | f->key); | |
1446 | switch (key->addr_type) { | |
1447 | case FLOW_DISSECTOR_KEY_IPV4_ADDRS: | |
19f44401 | 1448 | case FLOW_DISSECTOR_KEY_IPV6_ADDRS: |
bbd00f7e HHZ |
1449 | if (parse_tunnel_attr(priv, spec, f)) |
1450 | return -EOPNOTSUPP; | |
1451 | break; | |
1452 | default: | |
1453 | return -EOPNOTSUPP; | |
1454 | } | |
1455 | ||
1456 | /* In decap flow, header pointers should point to the inner | |
1457 | * headers, outer header were already set by parse_tunnel_attr | |
1458 | */ | |
1459 | headers_c = MLX5_ADDR_OF(fte_match_param, spec->match_criteria, | |
1460 | inner_headers); | |
1461 | headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, | |
1462 | inner_headers); | |
1463 | } | |
1464 | ||
d3a80bb5 OG |
1465 | if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) { |
1466 | struct flow_dissector_key_basic *key = | |
e3a2b7ed | 1467 | skb_flow_dissector_target(f->dissector, |
d3a80bb5 | 1468 | FLOW_DISSECTOR_KEY_BASIC, |
e3a2b7ed | 1469 | f->key); |
d3a80bb5 | 1470 | struct flow_dissector_key_basic *mask = |
e3a2b7ed | 1471 | skb_flow_dissector_target(f->dissector, |
d3a80bb5 | 1472 | FLOW_DISSECTOR_KEY_BASIC, |
e3a2b7ed | 1473 | f->mask); |
d3a80bb5 OG |
1474 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, ethertype, |
1475 | ntohs(mask->n_proto)); | |
1476 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, | |
1477 | ntohs(key->n_proto)); | |
e3a2b7ed | 1478 | |
d3a80bb5 | 1479 | if (mask->n_proto) |
d708f902 | 1480 | *match_level = MLX5_MATCH_L2; |
e3a2b7ed AV |
1481 | } |
1482 | ||
095b6cfd OG |
1483 | if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_VLAN)) { |
1484 | struct flow_dissector_key_vlan *key = | |
1485 | skb_flow_dissector_target(f->dissector, | |
1486 | FLOW_DISSECTOR_KEY_VLAN, | |
1487 | f->key); | |
1488 | struct flow_dissector_key_vlan *mask = | |
1489 | skb_flow_dissector_target(f->dissector, | |
1490 | FLOW_DISSECTOR_KEY_VLAN, | |
1491 | f->mask); | |
699e96dd JL |
1492 | if (mask->vlan_id || mask->vlan_priority || mask->vlan_tpid) { |
1493 | if (key->vlan_tpid == htons(ETH_P_8021AD)) { | |
1494 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, | |
1495 | svlan_tag, 1); | |
1496 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, | |
1497 | svlan_tag, 1); | |
1498 | } else { | |
1499 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, | |
1500 | cvlan_tag, 1); | |
1501 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, | |
1502 | cvlan_tag, 1); | |
1503 | } | |
095b6cfd OG |
1504 | |
1505 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_vid, mask->vlan_id); | |
1506 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, key->vlan_id); | |
358d79a4 OG |
1507 | |
1508 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, first_prio, mask->vlan_priority); | |
1509 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, key->vlan_priority); | |
54782900 | 1510 | |
d708f902 | 1511 | *match_level = MLX5_MATCH_L2; |
54782900 | 1512 | } |
d3a80bb5 | 1513 | } else if (*match_level != MLX5_MATCH_NONE) { |
cee26487 JL |
1514 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, svlan_tag, 1); |
1515 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, cvlan_tag, 1); | |
d3a80bb5 | 1516 | *match_level = MLX5_MATCH_L2; |
54782900 OG |
1517 | } |
1518 | ||
699e96dd JL |
1519 | if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CVLAN)) { |
1520 | struct flow_dissector_key_vlan *key = | |
1521 | skb_flow_dissector_target(f->dissector, | |
1522 | FLOW_DISSECTOR_KEY_CVLAN, | |
1523 | f->key); | |
1524 | struct flow_dissector_key_vlan *mask = | |
1525 | skb_flow_dissector_target(f->dissector, | |
1526 | FLOW_DISSECTOR_KEY_CVLAN, | |
1527 | f->mask); | |
1528 | if (mask->vlan_id || mask->vlan_priority || mask->vlan_tpid) { | |
1529 | if (key->vlan_tpid == htons(ETH_P_8021AD)) { | |
1530 | MLX5_SET(fte_match_set_misc, misc_c, | |
1531 | outer_second_svlan_tag, 1); | |
1532 | MLX5_SET(fte_match_set_misc, misc_v, | |
1533 | outer_second_svlan_tag, 1); | |
1534 | } else { | |
1535 | MLX5_SET(fte_match_set_misc, misc_c, | |
1536 | outer_second_cvlan_tag, 1); | |
1537 | MLX5_SET(fte_match_set_misc, misc_v, | |
1538 | outer_second_cvlan_tag, 1); | |
1539 | } | |
1540 | ||
1541 | MLX5_SET(fte_match_set_misc, misc_c, outer_second_vid, | |
1542 | mask->vlan_id); | |
1543 | MLX5_SET(fte_match_set_misc, misc_v, outer_second_vid, | |
1544 | key->vlan_id); | |
1545 | MLX5_SET(fte_match_set_misc, misc_c, outer_second_prio, | |
1546 | mask->vlan_priority); | |
1547 | MLX5_SET(fte_match_set_misc, misc_v, outer_second_prio, | |
1548 | key->vlan_priority); | |
1549 | ||
1550 | *match_level = MLX5_MATCH_L2; | |
1551 | } | |
1552 | } | |
1553 | ||
d3a80bb5 OG |
1554 | if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_ETH_ADDRS)) { |
1555 | struct flow_dissector_key_eth_addrs *key = | |
54782900 | 1556 | skb_flow_dissector_target(f->dissector, |
d3a80bb5 | 1557 | FLOW_DISSECTOR_KEY_ETH_ADDRS, |
54782900 | 1558 | f->key); |
d3a80bb5 | 1559 | struct flow_dissector_key_eth_addrs *mask = |
54782900 | 1560 | skb_flow_dissector_target(f->dissector, |
d3a80bb5 | 1561 | FLOW_DISSECTOR_KEY_ETH_ADDRS, |
54782900 | 1562 | f->mask); |
54782900 | 1563 | |
d3a80bb5 OG |
1564 | ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c, |
1565 | dmac_47_16), | |
1566 | mask->dst); | |
1567 | ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, | |
1568 | dmac_47_16), | |
1569 | key->dst); | |
1570 | ||
1571 | ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c, | |
1572 | smac_47_16), | |
1573 | mask->src); | |
1574 | ether_addr_copy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, | |
1575 | smac_47_16), | |
1576 | key->src); | |
1577 | ||
1578 | if (!is_zero_ether_addr(mask->src) || !is_zero_ether_addr(mask->dst)) | |
d708f902 | 1579 | *match_level = MLX5_MATCH_L2; |
54782900 OG |
1580 | } |
1581 | ||
1582 | if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_CONTROL)) { | |
1583 | struct flow_dissector_key_control *key = | |
1584 | skb_flow_dissector_target(f->dissector, | |
1585 | FLOW_DISSECTOR_KEY_CONTROL, | |
1586 | f->key); | |
1587 | ||
1588 | struct flow_dissector_key_control *mask = | |
1589 | skb_flow_dissector_target(f->dissector, | |
1590 | FLOW_DISSECTOR_KEY_CONTROL, | |
1591 | f->mask); | |
1592 | addr_type = key->addr_type; | |
1593 | ||
1594 | /* the HW doesn't support frag first/later */ | |
1595 | if (mask->flags & FLOW_DIS_FIRST_FRAG) | |
1596 | return -EOPNOTSUPP; | |
1597 | ||
1598 | if (mask->flags & FLOW_DIS_IS_FRAGMENT) { | |
1599 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, frag, 1); | |
1600 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, | |
1601 | key->flags & FLOW_DIS_IS_FRAGMENT); | |
1602 | ||
1603 | /* the HW doesn't need L3 inline to match on frag=no */ | |
1604 | if (!(key->flags & FLOW_DIS_IS_FRAGMENT)) | |
83621b7d | 1605 | *match_level = MLX5_MATCH_L2; |
54782900 OG |
1606 | /* *** L2 attributes parsing up to here *** */ |
1607 | else | |
83621b7d | 1608 | *match_level = MLX5_MATCH_L3; |
095b6cfd OG |
1609 | } |
1610 | } | |
1611 | ||
54782900 OG |
1612 | if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_BASIC)) { |
1613 | struct flow_dissector_key_basic *key = | |
1614 | skb_flow_dissector_target(f->dissector, | |
1615 | FLOW_DISSECTOR_KEY_BASIC, | |
1616 | f->key); | |
1617 | struct flow_dissector_key_basic *mask = | |
1618 | skb_flow_dissector_target(f->dissector, | |
1619 | FLOW_DISSECTOR_KEY_BASIC, | |
1620 | f->mask); | |
1621 | ip_proto = key->ip_proto; | |
1622 | ||
1623 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_protocol, | |
1624 | mask->ip_proto); | |
1625 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, | |
1626 | key->ip_proto); | |
1627 | ||
1628 | if (mask->ip_proto) | |
d708f902 | 1629 | *match_level = MLX5_MATCH_L3; |
54782900 OG |
1630 | } |
1631 | ||
e3a2b7ed AV |
1632 | if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) { |
1633 | struct flow_dissector_key_ipv4_addrs *key = | |
1634 | skb_flow_dissector_target(f->dissector, | |
1635 | FLOW_DISSECTOR_KEY_IPV4_ADDRS, | |
1636 | f->key); | |
1637 | struct flow_dissector_key_ipv4_addrs *mask = | |
1638 | skb_flow_dissector_target(f->dissector, | |
1639 | FLOW_DISSECTOR_KEY_IPV4_ADDRS, | |
1640 | f->mask); | |
1641 | ||
1642 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c, | |
1643 | src_ipv4_src_ipv6.ipv4_layout.ipv4), | |
1644 | &mask->src, sizeof(mask->src)); | |
1645 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, | |
1646 | src_ipv4_src_ipv6.ipv4_layout.ipv4), | |
1647 | &key->src, sizeof(key->src)); | |
1648 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c, | |
1649 | dst_ipv4_dst_ipv6.ipv4_layout.ipv4), | |
1650 | &mask->dst, sizeof(mask->dst)); | |
1651 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, | |
1652 | dst_ipv4_dst_ipv6.ipv4_layout.ipv4), | |
1653 | &key->dst, sizeof(key->dst)); | |
de0af0bf RD |
1654 | |
1655 | if (mask->src || mask->dst) | |
d708f902 | 1656 | *match_level = MLX5_MATCH_L3; |
e3a2b7ed AV |
1657 | } |
1658 | ||
1659 | if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) { | |
1660 | struct flow_dissector_key_ipv6_addrs *key = | |
1661 | skb_flow_dissector_target(f->dissector, | |
1662 | FLOW_DISSECTOR_KEY_IPV6_ADDRS, | |
1663 | f->key); | |
1664 | struct flow_dissector_key_ipv6_addrs *mask = | |
1665 | skb_flow_dissector_target(f->dissector, | |
1666 | FLOW_DISSECTOR_KEY_IPV6_ADDRS, | |
1667 | f->mask); | |
1668 | ||
1669 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c, | |
1670 | src_ipv4_src_ipv6.ipv6_layout.ipv6), | |
1671 | &mask->src, sizeof(mask->src)); | |
1672 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, | |
1673 | src_ipv4_src_ipv6.ipv6_layout.ipv6), | |
1674 | &key->src, sizeof(key->src)); | |
1675 | ||
1676 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_c, | |
1677 | dst_ipv4_dst_ipv6.ipv6_layout.ipv6), | |
1678 | &mask->dst, sizeof(mask->dst)); | |
1679 | memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, | |
1680 | dst_ipv4_dst_ipv6.ipv6_layout.ipv6), | |
1681 | &key->dst, sizeof(key->dst)); | |
de0af0bf RD |
1682 | |
1683 | if (ipv6_addr_type(&mask->src) != IPV6_ADDR_ANY || | |
1684 | ipv6_addr_type(&mask->dst) != IPV6_ADDR_ANY) | |
d708f902 | 1685 | *match_level = MLX5_MATCH_L3; |
e3a2b7ed AV |
1686 | } |
1687 | ||
1f97a526 OG |
1688 | if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_IP)) { |
1689 | struct flow_dissector_key_ip *key = | |
1690 | skb_flow_dissector_target(f->dissector, | |
1691 | FLOW_DISSECTOR_KEY_IP, | |
1692 | f->key); | |
1693 | struct flow_dissector_key_ip *mask = | |
1694 | skb_flow_dissector_target(f->dissector, | |
1695 | FLOW_DISSECTOR_KEY_IP, | |
1696 | f->mask); | |
1697 | ||
1698 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_ecn, mask->tos & 0x3); | |
1699 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, key->tos & 0x3); | |
1700 | ||
1701 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, ip_dscp, mask->tos >> 2); | |
1702 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, key->tos >> 2); | |
1703 | ||
a8ade55f OG |
1704 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, ttl_hoplimit, mask->ttl); |
1705 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, ttl_hoplimit, key->ttl); | |
1f97a526 | 1706 | |
a8ade55f OG |
1707 | if (mask->ttl && |
1708 | !MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev, | |
e98bedf5 EB |
1709 | ft_field_support.outer_ipv4_ttl)) { |
1710 | NL_SET_ERR_MSG_MOD(extack, | |
1711 | "Matching on TTL is not supported"); | |
1f97a526 | 1712 | return -EOPNOTSUPP; |
e98bedf5 | 1713 | } |
a8ade55f OG |
1714 | |
1715 | if (mask->tos || mask->ttl) | |
d708f902 | 1716 | *match_level = MLX5_MATCH_L3; |
1f97a526 OG |
1717 | } |
1718 | ||
54782900 OG |
1719 | /* *** L3 attributes parsing up to here *** */ |
1720 | ||
e3a2b7ed AV |
1721 | if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_PORTS)) { |
1722 | struct flow_dissector_key_ports *key = | |
1723 | skb_flow_dissector_target(f->dissector, | |
1724 | FLOW_DISSECTOR_KEY_PORTS, | |
1725 | f->key); | |
1726 | struct flow_dissector_key_ports *mask = | |
1727 | skb_flow_dissector_target(f->dissector, | |
1728 | FLOW_DISSECTOR_KEY_PORTS, | |
1729 | f->mask); | |
1730 | switch (ip_proto) { | |
1731 | case IPPROTO_TCP: | |
1732 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, | |
1733 | tcp_sport, ntohs(mask->src)); | |
1734 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, | |
1735 | tcp_sport, ntohs(key->src)); | |
1736 | ||
1737 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, | |
1738 | tcp_dport, ntohs(mask->dst)); | |
1739 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, | |
1740 | tcp_dport, ntohs(key->dst)); | |
1741 | break; | |
1742 | ||
1743 | case IPPROTO_UDP: | |
1744 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, | |
1745 | udp_sport, ntohs(mask->src)); | |
1746 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, | |
1747 | udp_sport, ntohs(key->src)); | |
1748 | ||
1749 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, | |
1750 | udp_dport, ntohs(mask->dst)); | |
1751 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, | |
1752 | udp_dport, ntohs(key->dst)); | |
1753 | break; | |
1754 | default: | |
e98bedf5 EB |
1755 | NL_SET_ERR_MSG_MOD(extack, |
1756 | "Only UDP and TCP transports are supported for L4 matching"); | |
e3a2b7ed AV |
1757 | netdev_err(priv->netdev, |
1758 | "Only UDP and TCP transport are supported\n"); | |
1759 | return -EINVAL; | |
1760 | } | |
de0af0bf RD |
1761 | |
1762 | if (mask->src || mask->dst) | |
d708f902 | 1763 | *match_level = MLX5_MATCH_L4; |
e3a2b7ed AV |
1764 | } |
1765 | ||
e77834ec OG |
1766 | if (dissector_uses_key(f->dissector, FLOW_DISSECTOR_KEY_TCP)) { |
1767 | struct flow_dissector_key_tcp *key = | |
1768 | skb_flow_dissector_target(f->dissector, | |
1769 | FLOW_DISSECTOR_KEY_TCP, | |
1770 | f->key); | |
1771 | struct flow_dissector_key_tcp *mask = | |
1772 | skb_flow_dissector_target(f->dissector, | |
1773 | FLOW_DISSECTOR_KEY_TCP, | |
1774 | f->mask); | |
1775 | ||
1776 | MLX5_SET(fte_match_set_lyr_2_4, headers_c, tcp_flags, | |
1777 | ntohs(mask->flags)); | |
1778 | MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags, | |
1779 | ntohs(key->flags)); | |
1780 | ||
1781 | if (mask->flags) | |
d708f902 | 1782 | *match_level = MLX5_MATCH_L4; |
e77834ec OG |
1783 | } |
1784 | ||
e3a2b7ed AV |
1785 | return 0; |
1786 | } | |
1787 | ||
de0af0bf | 1788 | static int parse_cls_flower(struct mlx5e_priv *priv, |
65ba8fb7 | 1789 | struct mlx5e_tc_flow *flow, |
de0af0bf RD |
1790 | struct mlx5_flow_spec *spec, |
1791 | struct tc_cls_flower_offload *f) | |
1792 | { | |
e98bedf5 | 1793 | struct netlink_ext_ack *extack = f->common.extack; |
de0af0bf RD |
1794 | struct mlx5_core_dev *dev = priv->mdev; |
1795 | struct mlx5_eswitch *esw = dev->priv.eswitch; | |
1d447a39 SM |
1796 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
1797 | struct mlx5_eswitch_rep *rep; | |
d708f902 | 1798 | u8 match_level; |
de0af0bf RD |
1799 | int err; |
1800 | ||
d708f902 | 1801 | err = __parse_cls_flower(priv, spec, f, &match_level); |
de0af0bf | 1802 | |
1d447a39 SM |
1803 | if (!err && (flow->flags & MLX5E_TC_FLOW_ESWITCH)) { |
1804 | rep = rpriv->rep; | |
1805 | if (rep->vport != FDB_UPLINK_VPORT && | |
1806 | (esw->offloads.inline_mode != MLX5_INLINE_MODE_NONE && | |
d708f902 | 1807 | esw->offloads.inline_mode < match_level)) { |
e98bedf5 EB |
1808 | NL_SET_ERR_MSG_MOD(extack, |
1809 | "Flow is not offloaded due to min inline setting"); | |
de0af0bf RD |
1810 | netdev_warn(priv->netdev, |
1811 | "Flow is not offloaded due to min inline setting, required %d actual %d\n", | |
d708f902 | 1812 | match_level, esw->offloads.inline_mode); |
de0af0bf RD |
1813 | return -EOPNOTSUPP; |
1814 | } | |
1815 | } | |
1816 | ||
38aa51c1 OG |
1817 | if (flow->flags & MLX5E_TC_FLOW_ESWITCH) |
1818 | flow->esw_attr->match_level = match_level; | |
1819 | else | |
1820 | flow->nic_attr->match_level = match_level; | |
1821 | ||
de0af0bf RD |
1822 | return err; |
1823 | } | |
1824 | ||
d79b6df6 OG |
1825 | struct pedit_headers { |
1826 | struct ethhdr eth; | |
1827 | struct iphdr ip4; | |
1828 | struct ipv6hdr ip6; | |
1829 | struct tcphdr tcp; | |
1830 | struct udphdr udp; | |
1831 | }; | |
1832 | ||
1833 | static int pedit_header_offsets[] = { | |
1834 | [TCA_PEDIT_KEY_EX_HDR_TYPE_ETH] = offsetof(struct pedit_headers, eth), | |
1835 | [TCA_PEDIT_KEY_EX_HDR_TYPE_IP4] = offsetof(struct pedit_headers, ip4), | |
1836 | [TCA_PEDIT_KEY_EX_HDR_TYPE_IP6] = offsetof(struct pedit_headers, ip6), | |
1837 | [TCA_PEDIT_KEY_EX_HDR_TYPE_TCP] = offsetof(struct pedit_headers, tcp), | |
1838 | [TCA_PEDIT_KEY_EX_HDR_TYPE_UDP] = offsetof(struct pedit_headers, udp), | |
1839 | }; | |
1840 | ||
1841 | #define pedit_header(_ph, _htype) ((void *)(_ph) + pedit_header_offsets[_htype]) | |
1842 | ||
1843 | static int set_pedit_val(u8 hdr_type, u32 mask, u32 val, u32 offset, | |
1844 | struct pedit_headers *masks, | |
1845 | struct pedit_headers *vals) | |
1846 | { | |
1847 | u32 *curr_pmask, *curr_pval; | |
1848 | ||
1849 | if (hdr_type >= __PEDIT_HDR_TYPE_MAX) | |
1850 | goto out_err; | |
1851 | ||
1852 | curr_pmask = (u32 *)(pedit_header(masks, hdr_type) + offset); | |
1853 | curr_pval = (u32 *)(pedit_header(vals, hdr_type) + offset); | |
1854 | ||
1855 | if (*curr_pmask & mask) /* disallow acting twice on the same location */ | |
1856 | goto out_err; | |
1857 | ||
1858 | *curr_pmask |= mask; | |
1859 | *curr_pval |= (val & mask); | |
1860 | ||
1861 | return 0; | |
1862 | ||
1863 | out_err: | |
1864 | return -EOPNOTSUPP; | |
1865 | } | |
1866 | ||
1867 | struct mlx5_fields { | |
1868 | u8 field; | |
1869 | u8 size; | |
1870 | u32 offset; | |
1871 | }; | |
1872 | ||
a8e4f0c4 OG |
1873 | #define OFFLOAD(fw_field, size, field, off) \ |
1874 | {MLX5_ACTION_IN_FIELD_OUT_ ## fw_field, size, offsetof(struct pedit_headers, field) + (off)} | |
1875 | ||
d79b6df6 | 1876 | static struct mlx5_fields fields[] = { |
a8e4f0c4 OG |
1877 | OFFLOAD(DMAC_47_16, 4, eth.h_dest[0], 0), |
1878 | OFFLOAD(DMAC_15_0, 2, eth.h_dest[4], 0), | |
1879 | OFFLOAD(SMAC_47_16, 4, eth.h_source[0], 0), | |
1880 | OFFLOAD(SMAC_15_0, 2, eth.h_source[4], 0), | |
1881 | OFFLOAD(ETHERTYPE, 2, eth.h_proto, 0), | |
1882 | ||
1883 | OFFLOAD(IP_TTL, 1, ip4.ttl, 0), | |
1884 | OFFLOAD(SIPV4, 4, ip4.saddr, 0), | |
1885 | OFFLOAD(DIPV4, 4, ip4.daddr, 0), | |
1886 | ||
1887 | OFFLOAD(SIPV6_127_96, 4, ip6.saddr.s6_addr32[0], 0), | |
1888 | OFFLOAD(SIPV6_95_64, 4, ip6.saddr.s6_addr32[1], 0), | |
1889 | OFFLOAD(SIPV6_63_32, 4, ip6.saddr.s6_addr32[2], 0), | |
1890 | OFFLOAD(SIPV6_31_0, 4, ip6.saddr.s6_addr32[3], 0), | |
1891 | OFFLOAD(DIPV6_127_96, 4, ip6.daddr.s6_addr32[0], 0), | |
1892 | OFFLOAD(DIPV6_95_64, 4, ip6.daddr.s6_addr32[1], 0), | |
1893 | OFFLOAD(DIPV6_63_32, 4, ip6.daddr.s6_addr32[2], 0), | |
1894 | OFFLOAD(DIPV6_31_0, 4, ip6.daddr.s6_addr32[3], 0), | |
0c0316f5 | 1895 | OFFLOAD(IPV6_HOPLIMIT, 1, ip6.hop_limit, 0), |
a8e4f0c4 OG |
1896 | |
1897 | OFFLOAD(TCP_SPORT, 2, tcp.source, 0), | |
1898 | OFFLOAD(TCP_DPORT, 2, tcp.dest, 0), | |
1899 | OFFLOAD(TCP_FLAGS, 1, tcp.ack_seq, 5), | |
1900 | ||
1901 | OFFLOAD(UDP_SPORT, 2, udp.source, 0), | |
1902 | OFFLOAD(UDP_DPORT, 2, udp.dest, 0), | |
d79b6df6 OG |
1903 | }; |
1904 | ||
1905 | /* On input attr->num_mod_hdr_actions tells how many HW actions can be parsed at | |
1906 | * max from the SW pedit action. On success, it says how many HW actions were | |
1907 | * actually parsed. | |
1908 | */ | |
1909 | static int offload_pedit_fields(struct pedit_headers *masks, | |
1910 | struct pedit_headers *vals, | |
e98bedf5 EB |
1911 | struct mlx5e_tc_flow_parse_attr *parse_attr, |
1912 | struct netlink_ext_ack *extack) | |
d79b6df6 OG |
1913 | { |
1914 | struct pedit_headers *set_masks, *add_masks, *set_vals, *add_vals; | |
2b64beba | 1915 | int i, action_size, nactions, max_actions, first, last, next_z; |
d79b6df6 | 1916 | void *s_masks_p, *a_masks_p, *vals_p; |
d79b6df6 OG |
1917 | struct mlx5_fields *f; |
1918 | u8 cmd, field_bsize; | |
e3ca4e05 | 1919 | u32 s_mask, a_mask; |
d79b6df6 | 1920 | unsigned long mask; |
2b64beba OG |
1921 | __be32 mask_be32; |
1922 | __be16 mask_be16; | |
d79b6df6 OG |
1923 | void *action; |
1924 | ||
1925 | set_masks = &masks[TCA_PEDIT_KEY_EX_CMD_SET]; | |
1926 | add_masks = &masks[TCA_PEDIT_KEY_EX_CMD_ADD]; | |
1927 | set_vals = &vals[TCA_PEDIT_KEY_EX_CMD_SET]; | |
1928 | add_vals = &vals[TCA_PEDIT_KEY_EX_CMD_ADD]; | |
1929 | ||
1930 | action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto); | |
1931 | action = parse_attr->mod_hdr_actions; | |
1932 | max_actions = parse_attr->num_mod_hdr_actions; | |
1933 | nactions = 0; | |
1934 | ||
1935 | for (i = 0; i < ARRAY_SIZE(fields); i++) { | |
1936 | f = &fields[i]; | |
1937 | /* avoid seeing bits set from previous iterations */ | |
e3ca4e05 OG |
1938 | s_mask = 0; |
1939 | a_mask = 0; | |
d79b6df6 OG |
1940 | |
1941 | s_masks_p = (void *)set_masks + f->offset; | |
1942 | a_masks_p = (void *)add_masks + f->offset; | |
1943 | ||
1944 | memcpy(&s_mask, s_masks_p, f->size); | |
1945 | memcpy(&a_mask, a_masks_p, f->size); | |
1946 | ||
1947 | if (!s_mask && !a_mask) /* nothing to offload here */ | |
1948 | continue; | |
1949 | ||
1950 | if (s_mask && a_mask) { | |
e98bedf5 EB |
1951 | NL_SET_ERR_MSG_MOD(extack, |
1952 | "can't set and add to the same HW field"); | |
d79b6df6 OG |
1953 | printk(KERN_WARNING "mlx5: can't set and add to the same HW field (%x)\n", f->field); |
1954 | return -EOPNOTSUPP; | |
1955 | } | |
1956 | ||
1957 | if (nactions == max_actions) { | |
e98bedf5 EB |
1958 | NL_SET_ERR_MSG_MOD(extack, |
1959 | "too many pedit actions, can't offload"); | |
d79b6df6 OG |
1960 | printk(KERN_WARNING "mlx5: parsed %d pedit actions, can't do more\n", nactions); |
1961 | return -EOPNOTSUPP; | |
1962 | } | |
1963 | ||
1964 | if (s_mask) { | |
1965 | cmd = MLX5_ACTION_TYPE_SET; | |
1966 | mask = s_mask; | |
1967 | vals_p = (void *)set_vals + f->offset; | |
1968 | /* clear to denote we consumed this field */ | |
1969 | memset(s_masks_p, 0, f->size); | |
1970 | } else { | |
1971 | cmd = MLX5_ACTION_TYPE_ADD; | |
1972 | mask = a_mask; | |
1973 | vals_p = (void *)add_vals + f->offset; | |
1974 | /* clear to denote we consumed this field */ | |
1975 | memset(a_masks_p, 0, f->size); | |
1976 | } | |
1977 | ||
d79b6df6 | 1978 | field_bsize = f->size * BITS_PER_BYTE; |
e3ca4e05 | 1979 | |
2b64beba OG |
1980 | if (field_bsize == 32) { |
1981 | mask_be32 = *(__be32 *)&mask; | |
1982 | mask = (__force unsigned long)cpu_to_le32(be32_to_cpu(mask_be32)); | |
1983 | } else if (field_bsize == 16) { | |
1984 | mask_be16 = *(__be16 *)&mask; | |
1985 | mask = (__force unsigned long)cpu_to_le16(be16_to_cpu(mask_be16)); | |
1986 | } | |
1987 | ||
d79b6df6 | 1988 | first = find_first_bit(&mask, field_bsize); |
2b64beba | 1989 | next_z = find_next_zero_bit(&mask, field_bsize, first); |
d79b6df6 | 1990 | last = find_last_bit(&mask, field_bsize); |
2b64beba | 1991 | if (first < next_z && next_z < last) { |
e98bedf5 EB |
1992 | NL_SET_ERR_MSG_MOD(extack, |
1993 | "rewrite of few sub-fields isn't supported"); | |
2b64beba | 1994 | printk(KERN_WARNING "mlx5: rewrite of few sub-fields (mask %lx) isn't offloaded\n", |
d79b6df6 OG |
1995 | mask); |
1996 | return -EOPNOTSUPP; | |
1997 | } | |
1998 | ||
1999 | MLX5_SET(set_action_in, action, action_type, cmd); | |
2000 | MLX5_SET(set_action_in, action, field, f->field); | |
2001 | ||
2002 | if (cmd == MLX5_ACTION_TYPE_SET) { | |
2b64beba | 2003 | MLX5_SET(set_action_in, action, offset, first); |
d79b6df6 | 2004 | /* length is num of bits to be written, zero means length of 32 */ |
2b64beba | 2005 | MLX5_SET(set_action_in, action, length, (last - first + 1)); |
d79b6df6 OG |
2006 | } |
2007 | ||
2008 | if (field_bsize == 32) | |
2b64beba | 2009 | MLX5_SET(set_action_in, action, data, ntohl(*(__be32 *)vals_p) >> first); |
d79b6df6 | 2010 | else if (field_bsize == 16) |
2b64beba | 2011 | MLX5_SET(set_action_in, action, data, ntohs(*(__be16 *)vals_p) >> first); |
d79b6df6 | 2012 | else if (field_bsize == 8) |
2b64beba | 2013 | MLX5_SET(set_action_in, action, data, *(u8 *)vals_p >> first); |
d79b6df6 OG |
2014 | |
2015 | action += action_size; | |
2016 | nactions++; | |
2017 | } | |
2018 | ||
2019 | parse_attr->num_mod_hdr_actions = nactions; | |
2020 | return 0; | |
2021 | } | |
2022 | ||
2023 | static int alloc_mod_hdr_actions(struct mlx5e_priv *priv, | |
2024 | const struct tc_action *a, int namespace, | |
2025 | struct mlx5e_tc_flow_parse_attr *parse_attr) | |
2026 | { | |
2027 | int nkeys, action_size, max_actions; | |
2028 | ||
2029 | nkeys = tcf_pedit_nkeys(a); | |
2030 | action_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto); | |
2031 | ||
2032 | if (namespace == MLX5_FLOW_NAMESPACE_FDB) /* FDB offloading */ | |
2033 | max_actions = MLX5_CAP_ESW_FLOWTABLE_FDB(priv->mdev, max_modify_header_actions); | |
2034 | else /* namespace is MLX5_FLOW_NAMESPACE_KERNEL - NIC offloading */ | |
2035 | max_actions = MLX5_CAP_FLOWTABLE_NIC_RX(priv->mdev, max_modify_header_actions); | |
2036 | ||
2037 | /* can get up to crazingly 16 HW actions in 32 bits pedit SW key */ | |
2038 | max_actions = min(max_actions, nkeys * 16); | |
2039 | ||
2040 | parse_attr->mod_hdr_actions = kcalloc(max_actions, action_size, GFP_KERNEL); | |
2041 | if (!parse_attr->mod_hdr_actions) | |
2042 | return -ENOMEM; | |
2043 | ||
2044 | parse_attr->num_mod_hdr_actions = max_actions; | |
2045 | return 0; | |
2046 | } | |
2047 | ||
2048 | static const struct pedit_headers zero_masks = {}; | |
2049 | ||
2050 | static int parse_tc_pedit_action(struct mlx5e_priv *priv, | |
2051 | const struct tc_action *a, int namespace, | |
e98bedf5 EB |
2052 | struct mlx5e_tc_flow_parse_attr *parse_attr, |
2053 | struct netlink_ext_ack *extack) | |
d79b6df6 OG |
2054 | { |
2055 | struct pedit_headers masks[__PEDIT_CMD_MAX], vals[__PEDIT_CMD_MAX], *cmd_masks; | |
2056 | int nkeys, i, err = -EOPNOTSUPP; | |
2057 | u32 mask, val, offset; | |
2058 | u8 cmd, htype; | |
2059 | ||
2060 | nkeys = tcf_pedit_nkeys(a); | |
2061 | ||
2062 | memset(masks, 0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX); | |
2063 | memset(vals, 0, sizeof(struct pedit_headers) * __PEDIT_CMD_MAX); | |
2064 | ||
2065 | for (i = 0; i < nkeys; i++) { | |
2066 | htype = tcf_pedit_htype(a, i); | |
2067 | cmd = tcf_pedit_cmd(a, i); | |
2068 | err = -EOPNOTSUPP; /* can't be all optimistic */ | |
2069 | ||
2070 | if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_NETWORK) { | |
e98bedf5 EB |
2071 | NL_SET_ERR_MSG_MOD(extack, |
2072 | "legacy pedit isn't offloaded"); | |
d79b6df6 OG |
2073 | goto out_err; |
2074 | } | |
2075 | ||
2076 | if (cmd != TCA_PEDIT_KEY_EX_CMD_SET && cmd != TCA_PEDIT_KEY_EX_CMD_ADD) { | |
e98bedf5 | 2077 | NL_SET_ERR_MSG_MOD(extack, "pedit cmd isn't offloaded"); |
d79b6df6 OG |
2078 | goto out_err; |
2079 | } | |
2080 | ||
2081 | mask = tcf_pedit_mask(a, i); | |
2082 | val = tcf_pedit_val(a, i); | |
2083 | offset = tcf_pedit_offset(a, i); | |
2084 | ||
2085 | err = set_pedit_val(htype, ~mask, val, offset, &masks[cmd], &vals[cmd]); | |
2086 | if (err) | |
2087 | goto out_err; | |
2088 | } | |
2089 | ||
2090 | err = alloc_mod_hdr_actions(priv, a, namespace, parse_attr); | |
2091 | if (err) | |
2092 | goto out_err; | |
2093 | ||
e98bedf5 | 2094 | err = offload_pedit_fields(masks, vals, parse_attr, extack); |
d79b6df6 OG |
2095 | if (err < 0) |
2096 | goto out_dealloc_parsed_actions; | |
2097 | ||
2098 | for (cmd = 0; cmd < __PEDIT_CMD_MAX; cmd++) { | |
2099 | cmd_masks = &masks[cmd]; | |
2100 | if (memcmp(cmd_masks, &zero_masks, sizeof(zero_masks))) { | |
e98bedf5 EB |
2101 | NL_SET_ERR_MSG_MOD(extack, |
2102 | "attempt to offload an unsupported field"); | |
b3a433de | 2103 | netdev_warn(priv->netdev, "attempt to offload an unsupported field (cmd %d)\n", cmd); |
d79b6df6 OG |
2104 | print_hex_dump(KERN_WARNING, "mask: ", DUMP_PREFIX_ADDRESS, |
2105 | 16, 1, cmd_masks, sizeof(zero_masks), true); | |
2106 | err = -EOPNOTSUPP; | |
2107 | goto out_dealloc_parsed_actions; | |
2108 | } | |
2109 | } | |
2110 | ||
2111 | return 0; | |
2112 | ||
2113 | out_dealloc_parsed_actions: | |
2114 | kfree(parse_attr->mod_hdr_actions); | |
2115 | out_err: | |
2116 | return err; | |
2117 | } | |
2118 | ||
e98bedf5 EB |
2119 | static bool csum_offload_supported(struct mlx5e_priv *priv, |
2120 | u32 action, | |
2121 | u32 update_flags, | |
2122 | struct netlink_ext_ack *extack) | |
26c02749 OG |
2123 | { |
2124 | u32 prot_flags = TCA_CSUM_UPDATE_FLAG_IPV4HDR | TCA_CSUM_UPDATE_FLAG_TCP | | |
2125 | TCA_CSUM_UPDATE_FLAG_UDP; | |
2126 | ||
2127 | /* The HW recalcs checksums only if re-writing headers */ | |
2128 | if (!(action & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR)) { | |
e98bedf5 EB |
2129 | NL_SET_ERR_MSG_MOD(extack, |
2130 | "TC csum action is only offloaded with pedit"); | |
26c02749 OG |
2131 | netdev_warn(priv->netdev, |
2132 | "TC csum action is only offloaded with pedit\n"); | |
2133 | return false; | |
2134 | } | |
2135 | ||
2136 | if (update_flags & ~prot_flags) { | |
e98bedf5 EB |
2137 | NL_SET_ERR_MSG_MOD(extack, |
2138 | "can't offload TC csum action for some header/s"); | |
26c02749 OG |
2139 | netdev_warn(priv->netdev, |
2140 | "can't offload TC csum action for some header/s - flags %#x\n", | |
2141 | update_flags); | |
2142 | return false; | |
2143 | } | |
2144 | ||
2145 | return true; | |
2146 | } | |
2147 | ||
bdd66ac0 | 2148 | static bool modify_header_match_supported(struct mlx5_flow_spec *spec, |
e98bedf5 EB |
2149 | struct tcf_exts *exts, |
2150 | struct netlink_ext_ack *extack) | |
bdd66ac0 OG |
2151 | { |
2152 | const struct tc_action *a; | |
2153 | bool modify_ip_header; | |
2154 | LIST_HEAD(actions); | |
2155 | u8 htype, ip_proto; | |
2156 | void *headers_v; | |
2157 | u16 ethertype; | |
2158 | int nkeys, i; | |
2159 | ||
2160 | headers_v = MLX5_ADDR_OF(fte_match_param, spec->match_value, outer_headers); | |
2161 | ethertype = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ethertype); | |
2162 | ||
2163 | /* for non-IP we only re-write MACs, so we're okay */ | |
2164 | if (ethertype != ETH_P_IP && ethertype != ETH_P_IPV6) | |
2165 | goto out_ok; | |
2166 | ||
2167 | modify_ip_header = false; | |
244cd96a CW |
2168 | tcf_exts_for_each_action(i, a, exts) { |
2169 | int k; | |
2170 | ||
bdd66ac0 OG |
2171 | if (!is_tcf_pedit(a)) |
2172 | continue; | |
2173 | ||
2174 | nkeys = tcf_pedit_nkeys(a); | |
244cd96a CW |
2175 | for (k = 0; k < nkeys; k++) { |
2176 | htype = tcf_pedit_htype(a, k); | |
bdd66ac0 OG |
2177 | if (htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP4 || |
2178 | htype == TCA_PEDIT_KEY_EX_HDR_TYPE_IP6) { | |
2179 | modify_ip_header = true; | |
2180 | break; | |
2181 | } | |
2182 | } | |
2183 | } | |
2184 | ||
2185 | ip_proto = MLX5_GET(fte_match_set_lyr_2_4, headers_v, ip_protocol); | |
1ccef350 JL |
2186 | if (modify_ip_header && ip_proto != IPPROTO_TCP && |
2187 | ip_proto != IPPROTO_UDP && ip_proto != IPPROTO_ICMP) { | |
e98bedf5 EB |
2188 | NL_SET_ERR_MSG_MOD(extack, |
2189 | "can't offload re-write of non TCP/UDP"); | |
bdd66ac0 OG |
2190 | pr_info("can't offload re-write of ip proto %d\n", ip_proto); |
2191 | return false; | |
2192 | } | |
2193 | ||
2194 | out_ok: | |
2195 | return true; | |
2196 | } | |
2197 | ||
2198 | static bool actions_match_supported(struct mlx5e_priv *priv, | |
2199 | struct tcf_exts *exts, | |
2200 | struct mlx5e_tc_flow_parse_attr *parse_attr, | |
e98bedf5 EB |
2201 | struct mlx5e_tc_flow *flow, |
2202 | struct netlink_ext_ack *extack) | |
bdd66ac0 OG |
2203 | { |
2204 | u32 actions; | |
2205 | ||
2206 | if (flow->flags & MLX5E_TC_FLOW_ESWITCH) | |
2207 | actions = flow->esw_attr->action; | |
2208 | else | |
2209 | actions = flow->nic_attr->action; | |
2210 | ||
7e29392e RD |
2211 | if (flow->flags & MLX5E_TC_FLOW_EGRESS && |
2212 | !(actions & MLX5_FLOW_CONTEXT_ACTION_DECAP)) | |
2213 | return false; | |
2214 | ||
bdd66ac0 | 2215 | if (actions & MLX5_FLOW_CONTEXT_ACTION_MOD_HDR) |
e98bedf5 EB |
2216 | return modify_header_match_supported(&parse_attr->spec, exts, |
2217 | extack); | |
bdd66ac0 OG |
2218 | |
2219 | return true; | |
2220 | } | |
2221 | ||
5c65c564 OG |
2222 | static bool same_hw_devs(struct mlx5e_priv *priv, struct mlx5e_priv *peer_priv) |
2223 | { | |
2224 | struct mlx5_core_dev *fmdev, *pmdev; | |
816f6706 | 2225 | u64 fsystem_guid, psystem_guid; |
5c65c564 OG |
2226 | |
2227 | fmdev = priv->mdev; | |
2228 | pmdev = peer_priv->mdev; | |
2229 | ||
59c9d35e AH |
2230 | fsystem_guid = mlx5_query_nic_system_image_guid(fmdev); |
2231 | psystem_guid = mlx5_query_nic_system_image_guid(pmdev); | |
5c65c564 | 2232 | |
816f6706 | 2233 | return (fsystem_guid == psystem_guid); |
5c65c564 OG |
2234 | } |
2235 | ||
5c40348c | 2236 | static int parse_tc_nic_actions(struct mlx5e_priv *priv, struct tcf_exts *exts, |
aa0cbbae | 2237 | struct mlx5e_tc_flow_parse_attr *parse_attr, |
e98bedf5 EB |
2238 | struct mlx5e_tc_flow *flow, |
2239 | struct netlink_ext_ack *extack) | |
e3a2b7ed | 2240 | { |
aa0cbbae | 2241 | struct mlx5_nic_flow_attr *attr = flow->nic_attr; |
e3a2b7ed | 2242 | const struct tc_action *a; |
22dc13c8 | 2243 | LIST_HEAD(actions); |
1cab1cd7 | 2244 | u32 action = 0; |
244cd96a | 2245 | int err, i; |
e3a2b7ed | 2246 | |
3bcc0cec | 2247 | if (!tcf_exts_has_actions(exts)) |
e3a2b7ed AV |
2248 | return -EINVAL; |
2249 | ||
3bc4b7bf | 2250 | attr->flow_tag = MLX5_FS_DEFAULT_FLOW_TAG; |
e3a2b7ed | 2251 | |
244cd96a | 2252 | tcf_exts_for_each_action(i, a, exts) { |
e3a2b7ed | 2253 | if (is_tcf_gact_shot(a)) { |
1cab1cd7 | 2254 | action |= MLX5_FLOW_CONTEXT_ACTION_DROP; |
aad7e08d AV |
2255 | if (MLX5_CAP_FLOWTABLE(priv->mdev, |
2256 | flow_table_properties_nic_receive.flow_counter)) | |
1cab1cd7 | 2257 | action |= MLX5_FLOW_CONTEXT_ACTION_COUNT; |
e3a2b7ed AV |
2258 | continue; |
2259 | } | |
2260 | ||
2f4fe4ca OG |
2261 | if (is_tcf_pedit(a)) { |
2262 | err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_KERNEL, | |
e98bedf5 | 2263 | parse_attr, extack); |
2f4fe4ca OG |
2264 | if (err) |
2265 | return err; | |
2266 | ||
1cab1cd7 OG |
2267 | action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR | |
2268 | MLX5_FLOW_CONTEXT_ACTION_FWD_DEST; | |
2f4fe4ca OG |
2269 | continue; |
2270 | } | |
2271 | ||
26c02749 | 2272 | if (is_tcf_csum(a)) { |
1cab1cd7 | 2273 | if (csum_offload_supported(priv, action, |
e98bedf5 EB |
2274 | tcf_csum_update_flags(a), |
2275 | extack)) | |
26c02749 OG |
2276 | continue; |
2277 | ||
2278 | return -EOPNOTSUPP; | |
2279 | } | |
2280 | ||
5c65c564 OG |
2281 | if (is_tcf_mirred_egress_redirect(a)) { |
2282 | struct net_device *peer_dev = tcf_mirred_dev(a); | |
2283 | ||
2284 | if (priv->netdev->netdev_ops == peer_dev->netdev_ops && | |
2285 | same_hw_devs(priv, netdev_priv(peer_dev))) { | |
2286 | parse_attr->mirred_ifindex = peer_dev->ifindex; | |
2287 | flow->flags |= MLX5E_TC_FLOW_HAIRPIN; | |
1cab1cd7 OG |
2288 | action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST | |
2289 | MLX5_FLOW_CONTEXT_ACTION_COUNT; | |
5c65c564 | 2290 | } else { |
e98bedf5 EB |
2291 | NL_SET_ERR_MSG_MOD(extack, |
2292 | "device is not on same HW, can't offload"); | |
5c65c564 OG |
2293 | netdev_warn(priv->netdev, "device %s not on same HW, can't offload\n", |
2294 | peer_dev->name); | |
2295 | return -EINVAL; | |
2296 | } | |
2297 | continue; | |
2298 | } | |
2299 | ||
e3a2b7ed AV |
2300 | if (is_tcf_skbedit_mark(a)) { |
2301 | u32 mark = tcf_skbedit_mark(a); | |
2302 | ||
2303 | if (mark & ~MLX5E_TC_FLOW_ID_MASK) { | |
e98bedf5 EB |
2304 | NL_SET_ERR_MSG_MOD(extack, |
2305 | "Bad flow mark - only 16 bit is supported"); | |
e3a2b7ed AV |
2306 | return -EINVAL; |
2307 | } | |
2308 | ||
3bc4b7bf | 2309 | attr->flow_tag = mark; |
1cab1cd7 | 2310 | action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST; |
e3a2b7ed AV |
2311 | continue; |
2312 | } | |
2313 | ||
2314 | return -EINVAL; | |
2315 | } | |
2316 | ||
1cab1cd7 | 2317 | attr->action = action; |
e98bedf5 | 2318 | if (!actions_match_supported(priv, exts, parse_attr, flow, extack)) |
bdd66ac0 OG |
2319 | return -EOPNOTSUPP; |
2320 | ||
e3a2b7ed AV |
2321 | return 0; |
2322 | } | |
2323 | ||
76f7444d OG |
2324 | static inline int cmp_encap_info(struct ip_tunnel_key *a, |
2325 | struct ip_tunnel_key *b) | |
a54e20b4 HHZ |
2326 | { |
2327 | return memcmp(a, b, sizeof(*a)); | |
2328 | } | |
2329 | ||
76f7444d | 2330 | static inline int hash_encap_info(struct ip_tunnel_key *key) |
a54e20b4 | 2331 | { |
76f7444d | 2332 | return jhash(key, sizeof(*key), 0); |
a54e20b4 HHZ |
2333 | } |
2334 | ||
2335 | static int mlx5e_route_lookup_ipv4(struct mlx5e_priv *priv, | |
2336 | struct net_device *mirred_dev, | |
2337 | struct net_device **out_dev, | |
2338 | struct flowi4 *fl4, | |
2339 | struct neighbour **out_n, | |
6360cd62 | 2340 | u8 *out_ttl) |
a54e20b4 | 2341 | { |
3e621b19 | 2342 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; |
5ed99fb4 | 2343 | struct mlx5e_rep_priv *uplink_rpriv; |
a54e20b4 HHZ |
2344 | struct rtable *rt; |
2345 | struct neighbour *n = NULL; | |
a54e20b4 HHZ |
2346 | |
2347 | #if IS_ENABLED(CONFIG_INET) | |
abeffce9 AB |
2348 | int ret; |
2349 | ||
a54e20b4 | 2350 | rt = ip_route_output_key(dev_net(mirred_dev), fl4); |
abeffce9 AB |
2351 | ret = PTR_ERR_OR_ZERO(rt); |
2352 | if (ret) | |
2353 | return ret; | |
a54e20b4 HHZ |
2354 | #else |
2355 | return -EOPNOTSUPP; | |
2356 | #endif | |
a4b97ab4 | 2357 | uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH); |
3e621b19 HHZ |
2358 | /* if the egress device isn't on the same HW e-switch, we use the uplink */ |
2359 | if (!switchdev_port_same_parent_id(priv->netdev, rt->dst.dev)) | |
5ed99fb4 | 2360 | *out_dev = uplink_rpriv->netdev; |
3e621b19 HHZ |
2361 | else |
2362 | *out_dev = rt->dst.dev; | |
a54e20b4 | 2363 | |
6360cd62 OG |
2364 | if (!(*out_ttl)) |
2365 | *out_ttl = ip4_dst_hoplimit(&rt->dst); | |
a54e20b4 HHZ |
2366 | n = dst_neigh_lookup(&rt->dst, &fl4->daddr); |
2367 | ip_rt_put(rt); | |
2368 | if (!n) | |
2369 | return -ENOMEM; | |
2370 | ||
2371 | *out_n = n; | |
a54e20b4 HHZ |
2372 | return 0; |
2373 | } | |
2374 | ||
b1d90e6b RL |
2375 | static bool is_merged_eswitch_dev(struct mlx5e_priv *priv, |
2376 | struct net_device *peer_netdev) | |
2377 | { | |
2378 | struct mlx5e_priv *peer_priv; | |
2379 | ||
2380 | peer_priv = netdev_priv(peer_netdev); | |
2381 | ||
2382 | return (MLX5_CAP_ESW(priv->mdev, merged_eswitch) && | |
2383 | (priv->netdev->netdev_ops == peer_netdev->netdev_ops) && | |
2384 | same_hw_devs(priv, peer_priv) && | |
2385 | MLX5_VPORT_MANAGER(peer_priv->mdev) && | |
2386 | (peer_priv->mdev->priv.eswitch->mode == SRIOV_OFFLOADS)); | |
2387 | } | |
2388 | ||
ce99f6b9 OG |
2389 | static int mlx5e_route_lookup_ipv6(struct mlx5e_priv *priv, |
2390 | struct net_device *mirred_dev, | |
2391 | struct net_device **out_dev, | |
2392 | struct flowi6 *fl6, | |
2393 | struct neighbour **out_n, | |
6360cd62 | 2394 | u8 *out_ttl) |
ce99f6b9 OG |
2395 | { |
2396 | struct neighbour *n = NULL; | |
2397 | struct dst_entry *dst; | |
2398 | ||
2399 | #if IS_ENABLED(CONFIG_INET) && IS_ENABLED(CONFIG_IPV6) | |
74bd5d56 | 2400 | struct mlx5e_rep_priv *uplink_rpriv; |
ce99f6b9 OG |
2401 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; |
2402 | int ret; | |
2403 | ||
08820528 PB |
2404 | ret = ipv6_stub->ipv6_dst_lookup(dev_net(mirred_dev), NULL, &dst, |
2405 | fl6); | |
2406 | if (ret < 0) | |
ce99f6b9 | 2407 | return ret; |
ce99f6b9 | 2408 | |
6360cd62 OG |
2409 | if (!(*out_ttl)) |
2410 | *out_ttl = ip6_dst_hoplimit(dst); | |
ce99f6b9 | 2411 | |
a4b97ab4 | 2412 | uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH); |
ce99f6b9 OG |
2413 | /* if the egress device isn't on the same HW e-switch, we use the uplink */ |
2414 | if (!switchdev_port_same_parent_id(priv->netdev, dst->dev)) | |
5ed99fb4 | 2415 | *out_dev = uplink_rpriv->netdev; |
ce99f6b9 OG |
2416 | else |
2417 | *out_dev = dst->dev; | |
2418 | #else | |
2419 | return -EOPNOTSUPP; | |
2420 | #endif | |
2421 | ||
2422 | n = dst_neigh_lookup(dst, &fl6->daddr); | |
2423 | dst_release(dst); | |
2424 | if (!n) | |
2425 | return -ENOMEM; | |
2426 | ||
2427 | *out_n = n; | |
2428 | return 0; | |
2429 | } | |
2430 | ||
ea7162ac | 2431 | static int mlx5e_gen_vxlan_header(char buf[], struct ip_tunnel_key *tun_key) |
a54e20b4 | 2432 | { |
ea7162ac OS |
2433 | __be32 tun_id = tunnel_id_to_key32(tun_key->tun_id); |
2434 | struct udphdr *udp = (struct udphdr *)(buf); | |
2435 | struct vxlanhdr *vxh = (struct vxlanhdr *) | |
2436 | ((char *)udp + sizeof(struct udphdr)); | |
a54e20b4 | 2437 | |
ea7162ac | 2438 | udp->dest = tun_key->tp_dst; |
a54e20b4 | 2439 | vxh->vx_flags = VXLAN_HF_VNI; |
ea7162ac OS |
2440 | vxh->vx_vni = vxlan_vni_field(tun_id); |
2441 | ||
2442 | return 0; | |
a54e20b4 HHZ |
2443 | } |
2444 | ||
ea7162ac OS |
2445 | static int mlx5e_gen_ip_tunnel_header(char buf[], __u8 *ip_proto, |
2446 | struct ip_tunnel_key *tun_key) | |
ce99f6b9 | 2447 | { |
ea7162ac OS |
2448 | *ip_proto = IPPROTO_UDP; |
2449 | return mlx5e_gen_vxlan_header(buf, tun_key); | |
ce99f6b9 OG |
2450 | } |
2451 | ||
a54e20b4 HHZ |
2452 | static int mlx5e_create_encap_header_ipv4(struct mlx5e_priv *priv, |
2453 | struct net_device *mirred_dev, | |
1a8552bd | 2454 | struct mlx5e_encap_entry *e) |
a54e20b4 HHZ |
2455 | { |
2456 | int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size); | |
ea7162ac OS |
2457 | int ipv4_encap_size = ETH_HLEN + |
2458 | sizeof(struct iphdr) + | |
2459 | VXLAN_HLEN; | |
76f7444d | 2460 | struct ip_tunnel_key *tun_key = &e->tun_info.key; |
1a8552bd | 2461 | struct net_device *out_dev; |
a42485eb | 2462 | struct neighbour *n = NULL; |
a54e20b4 | 2463 | struct flowi4 fl4 = {}; |
a54e20b4 | 2464 | char *encap_header; |
ea7162ac OS |
2465 | struct ethhdr *eth; |
2466 | u8 nud_state, ttl; | |
2467 | struct iphdr *ip; | |
6360cd62 | 2468 | int err; |
32f3671f OG |
2469 | |
2470 | if (max_encap_size < ipv4_encap_size) { | |
2471 | mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n", | |
2472 | ipv4_encap_size, max_encap_size); | |
2473 | return -EOPNOTSUPP; | |
2474 | } | |
a54e20b4 | 2475 | |
32f3671f | 2476 | encap_header = kzalloc(ipv4_encap_size, GFP_KERNEL); |
a54e20b4 HHZ |
2477 | if (!encap_header) |
2478 | return -ENOMEM; | |
2479 | ||
ea7162ac | 2480 | /* add the IP fields */ |
9a941117 | 2481 | fl4.flowi4_tos = tun_key->tos; |
76f7444d | 2482 | fl4.daddr = tun_key->u.ipv4.dst; |
9a941117 | 2483 | fl4.saddr = tun_key->u.ipv4.src; |
ea7162ac | 2484 | ttl = tun_key->ttl; |
a54e20b4 | 2485 | |
1a8552bd | 2486 | err = mlx5e_route_lookup_ipv4(priv, mirred_dev, &out_dev, |
9a941117 | 2487 | &fl4, &n, &ttl); |
a54e20b4 | 2488 | if (err) |
ace74321 | 2489 | goto free_encap; |
a54e20b4 | 2490 | |
232c0013 HHZ |
2491 | /* used by mlx5e_detach_encap to lookup a neigh hash table |
2492 | * entry in the neigh hash table when a user deletes a rule | |
2493 | */ | |
2494 | e->m_neigh.dev = n->dev; | |
f6dfb4c3 | 2495 | e->m_neigh.family = n->ops->family; |
232c0013 HHZ |
2496 | memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len); |
2497 | e->out_dev = out_dev; | |
2498 | ||
ea7162ac | 2499 | /* It's important to add the neigh to the hash table before checking |
232c0013 HHZ |
2500 | * the neigh validity state. So if we'll get a notification, in case the |
2501 | * neigh changes it's validity state, we would find the relevant neigh | |
2502 | * in the hash. | |
2503 | */ | |
2504 | err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e); | |
2505 | if (err) | |
ace74321 | 2506 | goto free_encap; |
232c0013 | 2507 | |
033354d5 HHZ |
2508 | read_lock_bh(&n->lock); |
2509 | nud_state = n->nud_state; | |
2510 | ether_addr_copy(e->h_dest, n->ha); | |
2511 | read_unlock_bh(&n->lock); | |
2512 | ||
ea7162ac OS |
2513 | /* add ethernet header */ |
2514 | eth = (struct ethhdr *)encap_header; | |
2515 | ether_addr_copy(eth->h_dest, e->h_dest); | |
2516 | ether_addr_copy(eth->h_source, out_dev->dev_addr); | |
2517 | eth->h_proto = htons(ETH_P_IP); | |
2518 | ||
2519 | /* add ip header */ | |
2520 | ip = (struct iphdr *)((char *)eth + sizeof(struct ethhdr)); | |
2521 | ip->tos = tun_key->tos; | |
2522 | ip->version = 0x4; | |
2523 | ip->ihl = 0x5; | |
2524 | ip->ttl = ttl; | |
2525 | ip->daddr = fl4.daddr; | |
2526 | ip->saddr = fl4.saddr; | |
2527 | ||
2528 | /* add tunneling protocol header */ | |
2529 | err = mlx5e_gen_ip_tunnel_header((char *)ip + sizeof(struct iphdr), | |
2530 | &ip->protocol, tun_key); | |
2531 | if (err) | |
232c0013 | 2532 | goto destroy_neigh_entry; |
ea7162ac | 2533 | |
232c0013 HHZ |
2534 | e->encap_size = ipv4_encap_size; |
2535 | e->encap_header = encap_header; | |
2536 | ||
2537 | if (!(nud_state & NUD_VALID)) { | |
2538 | neigh_event_send(n, NULL); | |
27902f08 WY |
2539 | err = -EAGAIN; |
2540 | goto out; | |
a54e20b4 HHZ |
2541 | } |
2542 | ||
60786f09 MB |
2543 | err = mlx5_packet_reformat_alloc(priv->mdev, e->tunnel_type, |
2544 | ipv4_encap_size, encap_header, | |
31ca3648 | 2545 | MLX5_FLOW_NAMESPACE_FDB, |
60786f09 | 2546 | &e->encap_id); |
232c0013 HHZ |
2547 | if (err) |
2548 | goto destroy_neigh_entry; | |
2549 | ||
2550 | e->flags |= MLX5_ENCAP_ENTRY_VALID; | |
f6dfb4c3 | 2551 | mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev)); |
232c0013 HHZ |
2552 | neigh_release(n); |
2553 | return err; | |
2554 | ||
2555 | destroy_neigh_entry: | |
2556 | mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e); | |
ace74321 | 2557 | free_encap: |
a54e20b4 | 2558 | kfree(encap_header); |
ace74321 | 2559 | out: |
232c0013 HHZ |
2560 | if (n) |
2561 | neigh_release(n); | |
a54e20b4 HHZ |
2562 | return err; |
2563 | } | |
2564 | ||
ce99f6b9 OG |
2565 | static int mlx5e_create_encap_header_ipv6(struct mlx5e_priv *priv, |
2566 | struct net_device *mirred_dev, | |
1a8552bd | 2567 | struct mlx5e_encap_entry *e) |
ce99f6b9 OG |
2568 | { |
2569 | int max_encap_size = MLX5_CAP_ESW(priv->mdev, max_encap_header_size); | |
ea7162ac OS |
2570 | int ipv6_encap_size = ETH_HLEN + |
2571 | sizeof(struct ipv6hdr) + | |
2572 | VXLAN_HLEN; | |
ce99f6b9 | 2573 | struct ip_tunnel_key *tun_key = &e->tun_info.key; |
1a8552bd | 2574 | struct net_device *out_dev; |
ce99f6b9 OG |
2575 | struct neighbour *n = NULL; |
2576 | struct flowi6 fl6 = {}; | |
ea7162ac | 2577 | struct ipv6hdr *ip6h; |
ce99f6b9 | 2578 | char *encap_header; |
ea7162ac OS |
2579 | struct ethhdr *eth; |
2580 | u8 nud_state, ttl; | |
6360cd62 | 2581 | int err; |
ce99f6b9 | 2582 | |
225aabaf OG |
2583 | if (max_encap_size < ipv6_encap_size) { |
2584 | mlx5_core_warn(priv->mdev, "encap size %d too big, max supported is %d\n", | |
2585 | ipv6_encap_size, max_encap_size); | |
2586 | return -EOPNOTSUPP; | |
2587 | } | |
ce99f6b9 | 2588 | |
225aabaf | 2589 | encap_header = kzalloc(ipv6_encap_size, GFP_KERNEL); |
ce99f6b9 OG |
2590 | if (!encap_header) |
2591 | return -ENOMEM; | |
2592 | ||
f35f800d | 2593 | ttl = tun_key->ttl; |
6360cd62 | 2594 | |
ce99f6b9 OG |
2595 | fl6.flowlabel = ip6_make_flowinfo(RT_TOS(tun_key->tos), tun_key->label); |
2596 | fl6.daddr = tun_key->u.ipv6.dst; | |
2597 | fl6.saddr = tun_key->u.ipv6.src; | |
2598 | ||
1a8552bd | 2599 | err = mlx5e_route_lookup_ipv6(priv, mirred_dev, &out_dev, |
ce99f6b9 OG |
2600 | &fl6, &n, &ttl); |
2601 | if (err) | |
ace74321 | 2602 | goto free_encap; |
ce99f6b9 | 2603 | |
232c0013 HHZ |
2604 | /* used by mlx5e_detach_encap to lookup a neigh hash table |
2605 | * entry in the neigh hash table when a user deletes a rule | |
2606 | */ | |
2607 | e->m_neigh.dev = n->dev; | |
f6dfb4c3 | 2608 | e->m_neigh.family = n->ops->family; |
232c0013 HHZ |
2609 | memcpy(&e->m_neigh.dst_ip, n->primary_key, n->tbl->key_len); |
2610 | e->out_dev = out_dev; | |
2611 | ||
2612 | /* It's importent to add the neigh to the hash table before checking | |
2613 | * the neigh validity state. So if we'll get a notification, in case the | |
2614 | * neigh changes it's validity state, we would find the relevant neigh | |
2615 | * in the hash. | |
2616 | */ | |
2617 | err = mlx5e_rep_encap_entry_attach(netdev_priv(out_dev), e); | |
2618 | if (err) | |
ace74321 | 2619 | goto free_encap; |
232c0013 | 2620 | |
033354d5 HHZ |
2621 | read_lock_bh(&n->lock); |
2622 | nud_state = n->nud_state; | |
2623 | ether_addr_copy(e->h_dest, n->ha); | |
2624 | read_unlock_bh(&n->lock); | |
2625 | ||
ea7162ac OS |
2626 | /* add ethernet header */ |
2627 | eth = (struct ethhdr *)encap_header; | |
2628 | ether_addr_copy(eth->h_dest, e->h_dest); | |
2629 | ether_addr_copy(eth->h_source, out_dev->dev_addr); | |
2630 | eth->h_proto = htons(ETH_P_IPV6); | |
2631 | ||
2632 | /* add ip header */ | |
2633 | ip6h = (struct ipv6hdr *)((char *)eth + sizeof(struct ethhdr)); | |
2634 | ip6_flow_hdr(ip6h, tun_key->tos, 0); | |
2635 | /* the HW fills up ipv6 payload len */ | |
2636 | ip6h->hop_limit = ttl; | |
2637 | ip6h->daddr = fl6.daddr; | |
2638 | ip6h->saddr = fl6.saddr; | |
2639 | ||
2640 | /* add tunneling protocol header */ | |
2641 | err = mlx5e_gen_ip_tunnel_header((char *)ip6h + sizeof(struct ipv6hdr), | |
2642 | &ip6h->nexthdr, tun_key); | |
2643 | if (err) | |
232c0013 | 2644 | goto destroy_neigh_entry; |
232c0013 HHZ |
2645 | |
2646 | e->encap_size = ipv6_encap_size; | |
2647 | e->encap_header = encap_header; | |
2648 | ||
2649 | if (!(nud_state & NUD_VALID)) { | |
2650 | neigh_event_send(n, NULL); | |
27902f08 WY |
2651 | err = -EAGAIN; |
2652 | goto out; | |
ce99f6b9 OG |
2653 | } |
2654 | ||
60786f09 MB |
2655 | err = mlx5_packet_reformat_alloc(priv->mdev, e->tunnel_type, |
2656 | ipv6_encap_size, encap_header, | |
31ca3648 | 2657 | MLX5_FLOW_NAMESPACE_FDB, |
60786f09 | 2658 | &e->encap_id); |
232c0013 HHZ |
2659 | if (err) |
2660 | goto destroy_neigh_entry; | |
2661 | ||
2662 | e->flags |= MLX5_ENCAP_ENTRY_VALID; | |
f6dfb4c3 | 2663 | mlx5e_rep_queue_neigh_stats_work(netdev_priv(out_dev)); |
232c0013 HHZ |
2664 | neigh_release(n); |
2665 | return err; | |
2666 | ||
2667 | destroy_neigh_entry: | |
2668 | mlx5e_rep_encap_entry_detach(netdev_priv(e->out_dev), e); | |
ace74321 | 2669 | free_encap: |
ce99f6b9 | 2670 | kfree(encap_header); |
ace74321 | 2671 | out: |
232c0013 HHZ |
2672 | if (n) |
2673 | neigh_release(n); | |
ce99f6b9 OG |
2674 | return err; |
2675 | } | |
2676 | ||
f5bc2c5d OS |
2677 | bool mlx5e_tc_tun_device_to_offload(struct mlx5e_priv *priv, |
2678 | struct net_device *netdev) | |
2679 | { | |
2680 | if (netif_is_vxlan(netdev) && | |
2681 | MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) | |
2682 | return true; | |
2683 | ||
2684 | return false; | |
2685 | } | |
2686 | ||
a54e20b4 HHZ |
2687 | static int mlx5e_attach_encap(struct mlx5e_priv *priv, |
2688 | struct ip_tunnel_info *tun_info, | |
2689 | struct net_device *mirred_dev, | |
45247bf2 | 2690 | struct net_device **encap_dev, |
e98bedf5 EB |
2691 | struct mlx5e_tc_flow *flow, |
2692 | struct netlink_ext_ack *extack) | |
a54e20b4 HHZ |
2693 | { |
2694 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
2695 | unsigned short family = ip_tunnel_info_af(tun_info); | |
45247bf2 | 2696 | struct mlx5_esw_flow_attr *attr = flow->esw_attr; |
a54e20b4 | 2697 | struct ip_tunnel_key *key = &tun_info->key; |
c1ae1152 | 2698 | struct mlx5e_encap_entry *e; |
45247bf2 | 2699 | int tunnel_type, err = 0; |
a54e20b4 HHZ |
2700 | uintptr_t hash_key; |
2701 | bool found = false; | |
a54e20b4 | 2702 | |
ea7162ac | 2703 | if (!MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) { |
e98bedf5 | 2704 | NL_SET_ERR_MSG_MOD(extack, |
ea7162ac | 2705 | "vxlan HW offloading is not supported"); |
2fcd82e9 | 2706 | netdev_warn(priv->netdev, |
ea7162ac | 2707 | "vxlan HW offloading is not supported\n"); |
cd377663 | 2708 | return -EOPNOTSUPP; |
2fcd82e9 | 2709 | } |
cd377663 | 2710 | |
a3e67366 | 2711 | if (mlx5_vxlan_lookup_port(priv->mdev->vxlan, be16_to_cpu(key->tp_dst)) && |
a54e20b4 | 2712 | MLX5_CAP_ESW(priv->mdev, vxlan_encap_decap)) { |
60786f09 | 2713 | tunnel_type = MLX5_REFORMAT_TYPE_L2_TO_VXLAN; |
a54e20b4 | 2714 | } else { |
e98bedf5 EB |
2715 | NL_SET_ERR_MSG_MOD(extack, |
2716 | "port isn't an offloaded vxlan udp dport"); | |
2fcd82e9 OG |
2717 | netdev_warn(priv->netdev, |
2718 | "%d isn't an offloaded vxlan udp dport\n", be16_to_cpu(key->tp_dst)); | |
a54e20b4 HHZ |
2719 | return -EOPNOTSUPP; |
2720 | } | |
2721 | ||
76f7444d | 2722 | hash_key = hash_encap_info(key); |
a54e20b4 HHZ |
2723 | |
2724 | hash_for_each_possible_rcu(esw->offloads.encap_tbl, e, | |
2725 | encap_hlist, hash_key) { | |
76f7444d | 2726 | if (!cmp_encap_info(&e->tun_info.key, key)) { |
a54e20b4 HHZ |
2727 | found = true; |
2728 | break; | |
2729 | } | |
2730 | } | |
2731 | ||
b2812089 | 2732 | /* must verify if encap is valid or not */ |
45247bf2 OG |
2733 | if (found) |
2734 | goto attach_flow; | |
a54e20b4 HHZ |
2735 | |
2736 | e = kzalloc(sizeof(*e), GFP_KERNEL); | |
2737 | if (!e) | |
2738 | return -ENOMEM; | |
2739 | ||
76f7444d | 2740 | e->tun_info = *tun_info; |
a54e20b4 HHZ |
2741 | e->tunnel_type = tunnel_type; |
2742 | INIT_LIST_HEAD(&e->flows); | |
2743 | ||
ce99f6b9 | 2744 | if (family == AF_INET) |
1a8552bd | 2745 | err = mlx5e_create_encap_header_ipv4(priv, mirred_dev, e); |
ce99f6b9 | 2746 | else if (family == AF_INET6) |
1a8552bd | 2747 | err = mlx5e_create_encap_header_ipv6(priv, mirred_dev, e); |
ce99f6b9 | 2748 | |
232c0013 | 2749 | if (err && err != -EAGAIN) |
a54e20b4 HHZ |
2750 | goto out_err; |
2751 | ||
a54e20b4 HHZ |
2752 | hash_add_rcu(esw->offloads.encap_tbl, &e->encap_hlist, hash_key); |
2753 | ||
45247bf2 OG |
2754 | attach_flow: |
2755 | list_add(&flow->encap, &e->flows); | |
2756 | *encap_dev = e->out_dev; | |
232c0013 HHZ |
2757 | if (e->flags & MLX5_ENCAP_ENTRY_VALID) |
2758 | attr->encap_id = e->encap_id; | |
b2812089 VB |
2759 | else |
2760 | err = -EAGAIN; | |
45247bf2 | 2761 | |
232c0013 | 2762 | return err; |
a54e20b4 HHZ |
2763 | |
2764 | out_err: | |
2765 | kfree(e); | |
2766 | return err; | |
2767 | } | |
2768 | ||
1482bd3d JL |
2769 | static int parse_tc_vlan_action(struct mlx5e_priv *priv, |
2770 | const struct tc_action *a, | |
2771 | struct mlx5_esw_flow_attr *attr, | |
2772 | u32 *action) | |
2773 | { | |
cc495188 JL |
2774 | u8 vlan_idx = attr->total_vlan; |
2775 | ||
2776 | if (vlan_idx >= MLX5_FS_VLAN_DEPTH) | |
2777 | return -EOPNOTSUPP; | |
2778 | ||
1482bd3d | 2779 | if (tcf_vlan_action(a) == TCA_VLAN_ACT_POP) { |
cc495188 JL |
2780 | if (vlan_idx) { |
2781 | if (!mlx5_eswitch_vlan_actions_supported(priv->mdev, | |
2782 | MLX5_FS_VLAN_DEPTH)) | |
2783 | return -EOPNOTSUPP; | |
2784 | ||
2785 | *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP_2; | |
2786 | } else { | |
2787 | *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_POP; | |
2788 | } | |
1482bd3d | 2789 | } else if (tcf_vlan_action(a) == TCA_VLAN_ACT_PUSH) { |
cc495188 JL |
2790 | attr->vlan_vid[vlan_idx] = tcf_vlan_push_vid(a); |
2791 | attr->vlan_prio[vlan_idx] = tcf_vlan_push_prio(a); | |
2792 | attr->vlan_proto[vlan_idx] = tcf_vlan_push_proto(a); | |
2793 | if (!attr->vlan_proto[vlan_idx]) | |
2794 | attr->vlan_proto[vlan_idx] = htons(ETH_P_8021Q); | |
2795 | ||
2796 | if (vlan_idx) { | |
2797 | if (!mlx5_eswitch_vlan_actions_supported(priv->mdev, | |
2798 | MLX5_FS_VLAN_DEPTH)) | |
2799 | return -EOPNOTSUPP; | |
2800 | ||
2801 | *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH_2; | |
2802 | } else { | |
2803 | if (!mlx5_eswitch_vlan_actions_supported(priv->mdev, 1) && | |
2804 | (tcf_vlan_push_proto(a) != htons(ETH_P_8021Q) || | |
2805 | tcf_vlan_push_prio(a))) | |
2806 | return -EOPNOTSUPP; | |
2807 | ||
2808 | *action |= MLX5_FLOW_CONTEXT_ACTION_VLAN_PUSH; | |
1482bd3d JL |
2809 | } |
2810 | } else { /* action is TCA_VLAN_ACT_MODIFY */ | |
2811 | return -EOPNOTSUPP; | |
2812 | } | |
2813 | ||
cc495188 JL |
2814 | attr->total_vlan = vlan_idx + 1; |
2815 | ||
1482bd3d JL |
2816 | return 0; |
2817 | } | |
2818 | ||
03a9d11e | 2819 | static int parse_tc_fdb_actions(struct mlx5e_priv *priv, struct tcf_exts *exts, |
d7e75a32 | 2820 | struct mlx5e_tc_flow_parse_attr *parse_attr, |
e98bedf5 EB |
2821 | struct mlx5e_tc_flow *flow, |
2822 | struct netlink_ext_ack *extack) | |
03a9d11e | 2823 | { |
bf07aa73 | 2824 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; |
ecf5bb79 | 2825 | struct mlx5_esw_flow_attr *attr = flow->esw_attr; |
1d447a39 | 2826 | struct mlx5e_rep_priv *rpriv = priv->ppriv; |
a54e20b4 | 2827 | struct ip_tunnel_info *info = NULL; |
03a9d11e | 2828 | const struct tc_action *a; |
22dc13c8 | 2829 | LIST_HEAD(actions); |
a54e20b4 | 2830 | bool encap = false; |
1cab1cd7 | 2831 | u32 action = 0; |
244cd96a | 2832 | int err, i; |
03a9d11e | 2833 | |
3bcc0cec | 2834 | if (!tcf_exts_has_actions(exts)) |
03a9d11e OG |
2835 | return -EINVAL; |
2836 | ||
1d447a39 | 2837 | attr->in_rep = rpriv->rep; |
10ff5359 | 2838 | attr->in_mdev = priv->mdev; |
03a9d11e | 2839 | |
244cd96a | 2840 | tcf_exts_for_each_action(i, a, exts) { |
03a9d11e | 2841 | if (is_tcf_gact_shot(a)) { |
1cab1cd7 OG |
2842 | action |= MLX5_FLOW_CONTEXT_ACTION_DROP | |
2843 | MLX5_FLOW_CONTEXT_ACTION_COUNT; | |
03a9d11e OG |
2844 | continue; |
2845 | } | |
2846 | ||
d7e75a32 OG |
2847 | if (is_tcf_pedit(a)) { |
2848 | err = parse_tc_pedit_action(priv, a, MLX5_FLOW_NAMESPACE_FDB, | |
e98bedf5 | 2849 | parse_attr, extack); |
d7e75a32 OG |
2850 | if (err) |
2851 | return err; | |
2852 | ||
1cab1cd7 | 2853 | action |= MLX5_FLOW_CONTEXT_ACTION_MOD_HDR; |
592d3651 | 2854 | attr->mirror_count = attr->out_count; |
d7e75a32 OG |
2855 | continue; |
2856 | } | |
2857 | ||
26c02749 | 2858 | if (is_tcf_csum(a)) { |
1cab1cd7 | 2859 | if (csum_offload_supported(priv, action, |
e98bedf5 EB |
2860 | tcf_csum_update_flags(a), |
2861 | extack)) | |
26c02749 OG |
2862 | continue; |
2863 | ||
2864 | return -EOPNOTSUPP; | |
2865 | } | |
2866 | ||
592d3651 | 2867 | if (is_tcf_mirred_egress_redirect(a) || is_tcf_mirred_egress_mirror(a)) { |
03a9d11e | 2868 | struct mlx5e_priv *out_priv; |
592d3651 | 2869 | struct net_device *out_dev; |
03a9d11e | 2870 | |
9f8a739e | 2871 | out_dev = tcf_mirred_dev(a); |
ef381359 OS |
2872 | if (!out_dev) { |
2873 | /* out_dev is NULL when filters with | |
2874 | * non-existing mirred device are replayed to | |
2875 | * the driver. | |
2876 | */ | |
2877 | return -EINVAL; | |
2878 | } | |
03a9d11e | 2879 | |
592d3651 | 2880 | if (attr->out_count >= MLX5_MAX_FLOW_FWD_VPORTS) { |
e98bedf5 EB |
2881 | NL_SET_ERR_MSG_MOD(extack, |
2882 | "can't support more output ports, can't offload forwarding"); | |
592d3651 CM |
2883 | pr_err("can't support more than %d output ports, can't offload forwarding\n", |
2884 | attr->out_count); | |
2885 | return -EOPNOTSUPP; | |
2886 | } | |
2887 | ||
a54e20b4 | 2888 | if (switchdev_port_same_parent_id(priv->netdev, |
b1d90e6b RL |
2889 | out_dev) || |
2890 | is_merged_eswitch_dev(priv, out_dev)) { | |
1cab1cd7 OG |
2891 | action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST | |
2892 | MLX5_FLOW_CONTEXT_ACTION_COUNT; | |
a54e20b4 | 2893 | out_priv = netdev_priv(out_dev); |
1d447a39 | 2894 | rpriv = out_priv->ppriv; |
592d3651 CM |
2895 | attr->out_rep[attr->out_count] = rpriv->rep; |
2896 | attr->out_mdev[attr->out_count++] = out_priv->mdev; | |
a54e20b4 | 2897 | } else if (encap) { |
9f8a739e | 2898 | parse_attr->mirred_ifindex = out_dev->ifindex; |
3c37745e OG |
2899 | parse_attr->tun_info = *info; |
2900 | attr->parse_attr = parse_attr; | |
60786f09 | 2901 | action |= MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT | |
1cab1cd7 OG |
2902 | MLX5_FLOW_CONTEXT_ACTION_FWD_DEST | |
2903 | MLX5_FLOW_CONTEXT_ACTION_COUNT; | |
3c37745e | 2904 | /* attr->out_rep is resolved when we handle encap */ |
ef381359 OS |
2905 | } else if (parse_attr->filter_dev != priv->netdev) { |
2906 | /* All mlx5 devices are called to configure | |
2907 | * high level device filters. Therefore, the | |
2908 | * *attempt* to install a filter on invalid | |
2909 | * eswitch should not trigger an explicit error | |
2910 | */ | |
2911 | return -EINVAL; | |
a54e20b4 | 2912 | } else { |
e98bedf5 EB |
2913 | NL_SET_ERR_MSG_MOD(extack, |
2914 | "devices are not on same switch HW, can't offload forwarding"); | |
03a9d11e OG |
2915 | pr_err("devices %s %s not on same switch HW, can't offload forwarding\n", |
2916 | priv->netdev->name, out_dev->name); | |
2917 | return -EINVAL; | |
2918 | } | |
a54e20b4 HHZ |
2919 | continue; |
2920 | } | |
03a9d11e | 2921 | |
a54e20b4 HHZ |
2922 | if (is_tcf_tunnel_set(a)) { |
2923 | info = tcf_tunnel_info(a); | |
2924 | if (info) | |
2925 | encap = true; | |
2926 | else | |
2927 | return -EOPNOTSUPP; | |
592d3651 | 2928 | attr->mirror_count = attr->out_count; |
03a9d11e OG |
2929 | continue; |
2930 | } | |
2931 | ||
8b32580d | 2932 | if (is_tcf_vlan(a)) { |
1482bd3d JL |
2933 | err = parse_tc_vlan_action(priv, a, attr, &action); |
2934 | ||
2935 | if (err) | |
2936 | return err; | |
2937 | ||
592d3651 | 2938 | attr->mirror_count = attr->out_count; |
8b32580d OG |
2939 | continue; |
2940 | } | |
2941 | ||
bbd00f7e | 2942 | if (is_tcf_tunnel_release(a)) { |
1cab1cd7 | 2943 | action |= MLX5_FLOW_CONTEXT_ACTION_DECAP; |
bbd00f7e HHZ |
2944 | continue; |
2945 | } | |
2946 | ||
bf07aa73 PB |
2947 | if (is_tcf_gact_goto_chain(a)) { |
2948 | u32 dest_chain = tcf_gact_goto_chain_index(a); | |
2949 | u32 max_chain = mlx5_eswitch_get_chain_range(esw); | |
2950 | ||
2951 | if (dest_chain <= attr->chain) { | |
2952 | NL_SET_ERR_MSG(extack, "Goto earlier chain isn't supported"); | |
2953 | return -EOPNOTSUPP; | |
2954 | } | |
2955 | if (dest_chain > max_chain) { | |
2956 | NL_SET_ERR_MSG(extack, "Requested destination chain is out of supported range"); | |
2957 | return -EOPNOTSUPP; | |
2958 | } | |
2959 | action |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST | | |
2960 | MLX5_FLOW_CONTEXT_ACTION_COUNT; | |
2961 | attr->dest_chain = dest_chain; | |
2962 | ||
2963 | continue; | |
2964 | } | |
2965 | ||
03a9d11e OG |
2966 | return -EINVAL; |
2967 | } | |
bdd66ac0 | 2968 | |
1cab1cd7 | 2969 | attr->action = action; |
e98bedf5 | 2970 | if (!actions_match_supported(priv, exts, parse_attr, flow, extack)) |
bdd66ac0 OG |
2971 | return -EOPNOTSUPP; |
2972 | ||
1392f44b | 2973 | if (attr->mirror_count > 0 && !mlx5_esw_has_fwd_fdb(priv->mdev)) { |
e98bedf5 EB |
2974 | NL_SET_ERR_MSG_MOD(extack, |
2975 | "current firmware doesn't support split rule for port mirroring"); | |
592d3651 CM |
2976 | netdev_warn_once(priv->netdev, "current firmware doesn't support split rule for port mirroring\n"); |
2977 | return -EOPNOTSUPP; | |
2978 | } | |
2979 | ||
31c8eba5 | 2980 | return 0; |
03a9d11e OG |
2981 | } |
2982 | ||
5dbe906f | 2983 | static void get_flags(int flags, u16 *flow_flags) |
60bd4af8 | 2984 | { |
5dbe906f | 2985 | u16 __flow_flags = 0; |
60bd4af8 OG |
2986 | |
2987 | if (flags & MLX5E_TC_INGRESS) | |
2988 | __flow_flags |= MLX5E_TC_FLOW_INGRESS; | |
2989 | if (flags & MLX5E_TC_EGRESS) | |
2990 | __flow_flags |= MLX5E_TC_FLOW_EGRESS; | |
2991 | ||
2992 | *flow_flags = __flow_flags; | |
2993 | } | |
2994 | ||
05866c82 OG |
2995 | static const struct rhashtable_params tc_ht_params = { |
2996 | .head_offset = offsetof(struct mlx5e_tc_flow, node), | |
2997 | .key_offset = offsetof(struct mlx5e_tc_flow, cookie), | |
2998 | .key_len = sizeof(((struct mlx5e_tc_flow *)0)->cookie), | |
2999 | .automatic_shrinking = true, | |
3000 | }; | |
3001 | ||
3002 | static struct rhashtable *get_tc_ht(struct mlx5e_priv *priv) | |
3003 | { | |
655dc3d2 OG |
3004 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; |
3005 | struct mlx5e_rep_priv *uplink_rpriv; | |
3006 | ||
3007 | if (MLX5_VPORT_MANAGER(priv->mdev) && esw->mode == SRIOV_OFFLOADS) { | |
3008 | uplink_rpriv = mlx5_eswitch_get_uplink_priv(esw, REP_ETH); | |
ec1366c2 | 3009 | return &uplink_rpriv->uplink_priv.tc_ht; |
655dc3d2 OG |
3010 | } else |
3011 | return &priv->fs.tc.ht; | |
05866c82 OG |
3012 | } |
3013 | ||
a88780a9 RD |
3014 | static int |
3015 | mlx5e_alloc_flow(struct mlx5e_priv *priv, int attr_size, | |
5dbe906f | 3016 | struct tc_cls_flower_offload *f, u16 flow_flags, |
a88780a9 RD |
3017 | struct mlx5e_tc_flow_parse_attr **__parse_attr, |
3018 | struct mlx5e_tc_flow **__flow) | |
e3a2b7ed | 3019 | { |
17091853 | 3020 | struct mlx5e_tc_flow_parse_attr *parse_attr; |
3bc4b7bf | 3021 | struct mlx5e_tc_flow *flow; |
a88780a9 | 3022 | int err; |
e3a2b7ed | 3023 | |
65ba8fb7 | 3024 | flow = kzalloc(sizeof(*flow) + attr_size, GFP_KERNEL); |
1b9a07ee | 3025 | parse_attr = kvzalloc(sizeof(*parse_attr), GFP_KERNEL); |
17091853 | 3026 | if (!parse_attr || !flow) { |
e3a2b7ed AV |
3027 | err = -ENOMEM; |
3028 | goto err_free; | |
3029 | } | |
3030 | ||
3031 | flow->cookie = f->cookie; | |
65ba8fb7 | 3032 | flow->flags = flow_flags; |
655dc3d2 | 3033 | flow->priv = priv; |
e3a2b7ed | 3034 | |
a88780a9 RD |
3035 | *__flow = flow; |
3036 | *__parse_attr = parse_attr; | |
3037 | ||
3038 | return 0; | |
3039 | ||
3040 | err_free: | |
3041 | kfree(flow); | |
3042 | kvfree(parse_attr); | |
3043 | return err; | |
3044 | } | |
3045 | ||
3046 | static int | |
3047 | mlx5e_add_fdb_flow(struct mlx5e_priv *priv, | |
3048 | struct tc_cls_flower_offload *f, | |
5dbe906f | 3049 | u16 flow_flags, |
d11afc26 | 3050 | struct net_device *filter_dev, |
a88780a9 RD |
3051 | struct mlx5e_tc_flow **__flow) |
3052 | { | |
3053 | struct netlink_ext_ack *extack = f->common.extack; | |
3054 | struct mlx5e_tc_flow_parse_attr *parse_attr; | |
3055 | struct mlx5e_tc_flow *flow; | |
3056 | int attr_size, err; | |
e3a2b7ed | 3057 | |
a88780a9 RD |
3058 | flow_flags |= MLX5E_TC_FLOW_ESWITCH; |
3059 | attr_size = sizeof(struct mlx5_esw_flow_attr); | |
3060 | err = mlx5e_alloc_flow(priv, attr_size, f, flow_flags, | |
3061 | &parse_attr, &flow); | |
3062 | if (err) | |
3063 | goto out; | |
d11afc26 OS |
3064 | parse_attr->filter_dev = filter_dev; |
3065 | flow->esw_attr->parse_attr = parse_attr; | |
3066 | err = parse_cls_flower(flow->priv, flow, &parse_attr->spec, f); | |
3067 | if (err) | |
3068 | goto err_free; | |
a88780a9 | 3069 | |
bf07aa73 PB |
3070 | flow->esw_attr->chain = f->common.chain_index; |
3071 | flow->esw_attr->prio = TC_H_MAJ(f->common.prio) >> 16; | |
a88780a9 RD |
3072 | err = parse_tc_fdb_actions(priv, f->exts, parse_attr, flow, extack); |
3073 | if (err) | |
3074 | goto err_free; | |
3075 | ||
3076 | err = mlx5e_tc_add_fdb_flow(priv, parse_attr, flow, extack); | |
5dbe906f | 3077 | if (err) |
c83954ab | 3078 | goto err_free; |
e3a2b7ed | 3079 | |
a88780a9 | 3080 | if (!(flow->esw_attr->action & |
60786f09 | 3081 | MLX5_FLOW_CONTEXT_ACTION_PACKET_REFORMAT)) |
af1607c3 JL |
3082 | kvfree(parse_attr); |
3083 | ||
a88780a9 | 3084 | *__flow = flow; |
5c40348c | 3085 | |
a88780a9 RD |
3086 | return 0; |
3087 | ||
3088 | err_free: | |
3089 | kfree(flow); | |
3090 | kvfree(parse_attr); | |
3091 | out: | |
232c0013 | 3092 | return err; |
a88780a9 RD |
3093 | } |
3094 | ||
3095 | static int | |
3096 | mlx5e_add_nic_flow(struct mlx5e_priv *priv, | |
3097 | struct tc_cls_flower_offload *f, | |
5dbe906f | 3098 | u16 flow_flags, |
d11afc26 | 3099 | struct net_device *filter_dev, |
a88780a9 RD |
3100 | struct mlx5e_tc_flow **__flow) |
3101 | { | |
3102 | struct netlink_ext_ack *extack = f->common.extack; | |
3103 | struct mlx5e_tc_flow_parse_attr *parse_attr; | |
3104 | struct mlx5e_tc_flow *flow; | |
3105 | int attr_size, err; | |
3106 | ||
bf07aa73 PB |
3107 | /* multi-chain not supported for NIC rules */ |
3108 | if (!tc_cls_can_offload_and_chain0(priv->netdev, &f->common)) | |
3109 | return -EOPNOTSUPP; | |
3110 | ||
a88780a9 RD |
3111 | flow_flags |= MLX5E_TC_FLOW_NIC; |
3112 | attr_size = sizeof(struct mlx5_nic_flow_attr); | |
3113 | err = mlx5e_alloc_flow(priv, attr_size, f, flow_flags, | |
3114 | &parse_attr, &flow); | |
3115 | if (err) | |
3116 | goto out; | |
3117 | ||
d11afc26 OS |
3118 | parse_attr->filter_dev = filter_dev; |
3119 | err = parse_cls_flower(flow->priv, flow, &parse_attr->spec, f); | |
3120 | if (err) | |
3121 | goto err_free; | |
3122 | ||
a88780a9 RD |
3123 | err = parse_tc_nic_actions(priv, f->exts, parse_attr, flow, extack); |
3124 | if (err) | |
3125 | goto err_free; | |
3126 | ||
3127 | err = mlx5e_tc_add_nic_flow(priv, parse_attr, flow, extack); | |
3128 | if (err) | |
3129 | goto err_free; | |
3130 | ||
3131 | flow->flags |= MLX5E_TC_FLOW_OFFLOADED; | |
3132 | kvfree(parse_attr); | |
3133 | *__flow = flow; | |
3134 | ||
3135 | return 0; | |
e3a2b7ed | 3136 | |
e3a2b7ed | 3137 | err_free: |
a88780a9 | 3138 | kfree(flow); |
17091853 | 3139 | kvfree(parse_attr); |
a88780a9 RD |
3140 | out: |
3141 | return err; | |
3142 | } | |
3143 | ||
3144 | static int | |
3145 | mlx5e_tc_add_flow(struct mlx5e_priv *priv, | |
3146 | struct tc_cls_flower_offload *f, | |
3147 | int flags, | |
d11afc26 | 3148 | struct net_device *filter_dev, |
a88780a9 RD |
3149 | struct mlx5e_tc_flow **flow) |
3150 | { | |
3151 | struct mlx5_eswitch *esw = priv->mdev->priv.eswitch; | |
5dbe906f | 3152 | u16 flow_flags; |
a88780a9 RD |
3153 | int err; |
3154 | ||
3155 | get_flags(flags, &flow_flags); | |
3156 | ||
bf07aa73 PB |
3157 | if (!tc_can_offload_extack(priv->netdev, f->common.extack)) |
3158 | return -EOPNOTSUPP; | |
3159 | ||
a88780a9 | 3160 | if (esw && esw->mode == SRIOV_OFFLOADS) |
d11afc26 OS |
3161 | err = mlx5e_add_fdb_flow(priv, f, flow_flags, |
3162 | filter_dev, flow); | |
a88780a9 | 3163 | else |
d11afc26 OS |
3164 | err = mlx5e_add_nic_flow(priv, f, flow_flags, |
3165 | filter_dev, flow); | |
a88780a9 RD |
3166 | |
3167 | return err; | |
3168 | } | |
3169 | ||
71d82d2a | 3170 | int mlx5e_configure_flower(struct net_device *dev, struct mlx5e_priv *priv, |
a88780a9 RD |
3171 | struct tc_cls_flower_offload *f, int flags) |
3172 | { | |
3173 | struct netlink_ext_ack *extack = f->common.extack; | |
3174 | struct rhashtable *tc_ht = get_tc_ht(priv); | |
3175 | struct mlx5e_tc_flow *flow; | |
3176 | int err = 0; | |
3177 | ||
3178 | flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params); | |
3179 | if (flow) { | |
3180 | NL_SET_ERR_MSG_MOD(extack, | |
3181 | "flow cookie already exists, ignoring"); | |
3182 | netdev_warn_once(priv->netdev, | |
3183 | "flow cookie %lx already exists, ignoring\n", | |
3184 | f->cookie); | |
3185 | goto out; | |
3186 | } | |
3187 | ||
d11afc26 | 3188 | err = mlx5e_tc_add_flow(priv, f, flags, dev, &flow); |
a88780a9 RD |
3189 | if (err) |
3190 | goto out; | |
3191 | ||
3192 | err = rhashtable_insert_fast(tc_ht, &flow->node, tc_ht_params); | |
3193 | if (err) | |
3194 | goto err_free; | |
3195 | ||
3196 | return 0; | |
3197 | ||
3198 | err_free: | |
3199 | mlx5e_tc_del_flow(priv, flow); | |
232c0013 | 3200 | kfree(flow); |
a88780a9 | 3201 | out: |
e3a2b7ed AV |
3202 | return err; |
3203 | } | |
3204 | ||
8f8ae895 OG |
3205 | #define DIRECTION_MASK (MLX5E_TC_INGRESS | MLX5E_TC_EGRESS) |
3206 | #define FLOW_DIRECTION_MASK (MLX5E_TC_FLOW_INGRESS | MLX5E_TC_FLOW_EGRESS) | |
3207 | ||
3208 | static bool same_flow_direction(struct mlx5e_tc_flow *flow, int flags) | |
3209 | { | |
3210 | if ((flow->flags & FLOW_DIRECTION_MASK) == (flags & DIRECTION_MASK)) | |
3211 | return true; | |
3212 | ||
3213 | return false; | |
3214 | } | |
3215 | ||
71d82d2a | 3216 | int mlx5e_delete_flower(struct net_device *dev, struct mlx5e_priv *priv, |
60bd4af8 | 3217 | struct tc_cls_flower_offload *f, int flags) |
e3a2b7ed | 3218 | { |
05866c82 | 3219 | struct rhashtable *tc_ht = get_tc_ht(priv); |
e3a2b7ed | 3220 | struct mlx5e_tc_flow *flow; |
e3a2b7ed | 3221 | |
05866c82 | 3222 | flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params); |
8f8ae895 | 3223 | if (!flow || !same_flow_direction(flow, flags)) |
e3a2b7ed AV |
3224 | return -EINVAL; |
3225 | ||
05866c82 | 3226 | rhashtable_remove_fast(tc_ht, &flow->node, tc_ht_params); |
e3a2b7ed | 3227 | |
961e8979 | 3228 | mlx5e_tc_del_flow(priv, flow); |
e3a2b7ed AV |
3229 | |
3230 | kfree(flow); | |
3231 | ||
3232 | return 0; | |
3233 | } | |
3234 | ||
71d82d2a | 3235 | int mlx5e_stats_flower(struct net_device *dev, struct mlx5e_priv *priv, |
60bd4af8 | 3236 | struct tc_cls_flower_offload *f, int flags) |
aad7e08d | 3237 | { |
05866c82 | 3238 | struct rhashtable *tc_ht = get_tc_ht(priv); |
aad7e08d | 3239 | struct mlx5e_tc_flow *flow; |
aad7e08d AV |
3240 | struct mlx5_fc *counter; |
3241 | u64 bytes; | |
3242 | u64 packets; | |
3243 | u64 lastuse; | |
3244 | ||
05866c82 | 3245 | flow = rhashtable_lookup_fast(tc_ht, &f->cookie, tc_ht_params); |
8f8ae895 | 3246 | if (!flow || !same_flow_direction(flow, flags)) |
aad7e08d AV |
3247 | return -EINVAL; |
3248 | ||
0b67a38f HHZ |
3249 | if (!(flow->flags & MLX5E_TC_FLOW_OFFLOADED)) |
3250 | return 0; | |
3251 | ||
b8aee822 | 3252 | counter = mlx5e_tc_get_counter(flow); |
aad7e08d AV |
3253 | if (!counter) |
3254 | return 0; | |
3255 | ||
3256 | mlx5_fc_query_cached(counter, &bytes, &packets, &lastuse); | |
3257 | ||
d897a638 | 3258 | tcf_exts_stats_update(f->exts, bytes, packets, lastuse); |
fed06ee8 | 3259 | |
aad7e08d AV |
3260 | return 0; |
3261 | } | |
3262 | ||
4d8fcf21 AH |
3263 | static void mlx5e_tc_hairpin_update_dead_peer(struct mlx5e_priv *priv, |
3264 | struct mlx5e_priv *peer_priv) | |
3265 | { | |
3266 | struct mlx5_core_dev *peer_mdev = peer_priv->mdev; | |
3267 | struct mlx5e_hairpin_entry *hpe; | |
3268 | u16 peer_vhca_id; | |
3269 | int bkt; | |
3270 | ||
3271 | if (!same_hw_devs(priv, peer_priv)) | |
3272 | return; | |
3273 | ||
3274 | peer_vhca_id = MLX5_CAP_GEN(peer_mdev, vhca_id); | |
3275 | ||
3276 | hash_for_each(priv->fs.tc.hairpin_tbl, bkt, hpe, hairpin_hlist) { | |
3277 | if (hpe->peer_vhca_id == peer_vhca_id) | |
3278 | hpe->hp->pair->peer_gone = true; | |
3279 | } | |
3280 | } | |
3281 | ||
3282 | static int mlx5e_tc_netdev_event(struct notifier_block *this, | |
3283 | unsigned long event, void *ptr) | |
3284 | { | |
3285 | struct net_device *ndev = netdev_notifier_info_to_dev(ptr); | |
3286 | struct mlx5e_flow_steering *fs; | |
3287 | struct mlx5e_priv *peer_priv; | |
3288 | struct mlx5e_tc_table *tc; | |
3289 | struct mlx5e_priv *priv; | |
3290 | ||
3291 | if (ndev->netdev_ops != &mlx5e_netdev_ops || | |
3292 | event != NETDEV_UNREGISTER || | |
3293 | ndev->reg_state == NETREG_REGISTERED) | |
3294 | return NOTIFY_DONE; | |
3295 | ||
3296 | tc = container_of(this, struct mlx5e_tc_table, netdevice_nb); | |
3297 | fs = container_of(tc, struct mlx5e_flow_steering, tc); | |
3298 | priv = container_of(fs, struct mlx5e_priv, fs); | |
3299 | peer_priv = netdev_priv(ndev); | |
3300 | if (priv == peer_priv || | |
3301 | !(priv->netdev->features & NETIF_F_HW_TC)) | |
3302 | return NOTIFY_DONE; | |
3303 | ||
3304 | mlx5e_tc_hairpin_update_dead_peer(priv, peer_priv); | |
3305 | ||
3306 | return NOTIFY_DONE; | |
3307 | } | |
3308 | ||
655dc3d2 | 3309 | int mlx5e_tc_nic_init(struct mlx5e_priv *priv) |
e8f887ac | 3310 | { |
acff797c | 3311 | struct mlx5e_tc_table *tc = &priv->fs.tc; |
4d8fcf21 | 3312 | int err; |
e8f887ac | 3313 | |
11c9c548 | 3314 | hash_init(tc->mod_hdr_tbl); |
5c65c564 | 3315 | hash_init(tc->hairpin_tbl); |
11c9c548 | 3316 | |
4d8fcf21 AH |
3317 | err = rhashtable_init(&tc->ht, &tc_ht_params); |
3318 | if (err) | |
3319 | return err; | |
3320 | ||
3321 | tc->netdevice_nb.notifier_call = mlx5e_tc_netdev_event; | |
3322 | if (register_netdevice_notifier(&tc->netdevice_nb)) { | |
3323 | tc->netdevice_nb.notifier_call = NULL; | |
3324 | mlx5_core_warn(priv->mdev, "Failed to register netdev notifier\n"); | |
3325 | } | |
3326 | ||
3327 | return err; | |
e8f887ac AV |
3328 | } |
3329 | ||
3330 | static void _mlx5e_tc_del_flow(void *ptr, void *arg) | |
3331 | { | |
3332 | struct mlx5e_tc_flow *flow = ptr; | |
655dc3d2 | 3333 | struct mlx5e_priv *priv = flow->priv; |
e8f887ac | 3334 | |
961e8979 | 3335 | mlx5e_tc_del_flow(priv, flow); |
e8f887ac AV |
3336 | kfree(flow); |
3337 | } | |
3338 | ||
655dc3d2 | 3339 | void mlx5e_tc_nic_cleanup(struct mlx5e_priv *priv) |
e8f887ac | 3340 | { |
acff797c | 3341 | struct mlx5e_tc_table *tc = &priv->fs.tc; |
e8f887ac | 3342 | |
4d8fcf21 AH |
3343 | if (tc->netdevice_nb.notifier_call) |
3344 | unregister_netdevice_notifier(&tc->netdevice_nb); | |
3345 | ||
655dc3d2 | 3346 | rhashtable_free_and_destroy(&tc->ht, _mlx5e_tc_del_flow, NULL); |
e8f887ac | 3347 | |
acff797c MG |
3348 | if (!IS_ERR_OR_NULL(tc->t)) { |
3349 | mlx5_destroy_flow_table(tc->t); | |
3350 | tc->t = NULL; | |
e8f887ac AV |
3351 | } |
3352 | } | |
655dc3d2 OG |
3353 | |
3354 | int mlx5e_tc_esw_init(struct rhashtable *tc_ht) | |
3355 | { | |
3356 | return rhashtable_init(tc_ht, &tc_ht_params); | |
3357 | } | |
3358 | ||
3359 | void mlx5e_tc_esw_cleanup(struct rhashtable *tc_ht) | |
3360 | { | |
3361 | rhashtable_free_and_destroy(tc_ht, _mlx5e_tc_del_flow, NULL); | |
3362 | } | |
01252a27 OG |
3363 | |
3364 | int mlx5e_tc_num_filters(struct mlx5e_priv *priv) | |
3365 | { | |
3366 | struct rhashtable *tc_ht = get_tc_ht(priv); | |
3367 | ||
3368 | return atomic_read(&tc_ht->nelems); | |
3369 | } |