[mirror_ubuntu-jammy-kernel.git] / drivers / net / ethernet / mellanox / mlx5 / core / eswitch.h

/*
 * Copyright (c) 2015, Mellanox Technologies, Ltd.  All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#ifndef __MLX5_ESWITCH_H__
#define __MLX5_ESWITCH_H__

#include <linux/if_ether.h>
#include <linux/if_link.h>
#include <net/devlink.h>
#include <linux/mlx5/device.h>
#include <linux/mlx5/eswitch.h>
#include "lib/mpfs.h"

#ifdef CONFIG_MLX5_ESWITCH

#define MLX5_MAX_UC_PER_VPORT(dev) \
	(1 << MLX5_CAP_GEN(dev, log_max_current_uc_list))

#define MLX5_MAX_MC_PER_VPORT(dev) \
	(1 << MLX5_CAP_GEN(dev, log_max_current_mc_list))

#define FDB_UPLINK_VPORT 0xffff

#define MLX5_MIN_BW_SHARE 1

#define MLX5_RATE_TO_BW_SHARE(rate, divider, limit) \
	min_t(u32, max_t(u32, (rate) / (divider), MLX5_MIN_BW_SHARE), limit)

struct vport_ingress {
	struct mlx5_flow_table *acl;
	struct mlx5_flow_group *allow_untagged_spoofchk_grp;
	struct mlx5_flow_group *allow_spoofchk_only_grp;
	struct mlx5_flow_group *allow_untagged_only_grp;
	struct mlx5_flow_group *drop_grp;
	struct mlx5_flow_handle  *allow_rule;
	struct mlx5_flow_handle  *drop_rule;
	struct mlx5_fc           *drop_counter;
};

struct vport_egress {
	struct mlx5_flow_table *acl;
	struct mlx5_flow_group *allowed_vlans_grp;
	struct mlx5_flow_group *drop_grp;
	struct mlx5_flow_handle  *allowed_vlan;
	struct mlx5_flow_handle  *drop_rule;
	struct mlx5_fc           *drop_counter;
};

struct mlx5_vport_drop_stats {
	u64 rx_dropped;
	u64 tx_dropped;
};

struct mlx5_vport_info {
	u8                      mac[ETH_ALEN];
	u16                     vlan;
	u8                      qos;
	u64                     node_guid;
	int                     link_state;
	u32                     min_rate;
	u32                     max_rate;
	bool                    spoofchk;
	bool                    trusted;
};

struct mlx5_vport {
	struct mlx5_core_dev    *dev;
	int                     vport;
	struct hlist_head       uc_list[MLX5_L2_ADDR_HASH_SIZE];
	struct hlist_head       mc_list[MLX5_L2_ADDR_HASH_SIZE];
	struct mlx5_flow_handle *promisc_rule;
	struct mlx5_flow_handle *allmulti_rule;
	struct work_struct      vport_change_handler;

	struct vport_ingress    ingress;
	struct vport_egress     egress;

	struct mlx5_vport_info  info;

	struct {
		bool            enabled;
		u32             esw_tsar_ix;
		u32             bw_share;
	} qos;

	bool                    enabled;
	u16                     enabled_events;
};

struct mlx5_eswitch_fdb {
	void *fdb;
	union {
		struct legacy_fdb {
			struct mlx5_flow_group *addr_grp;
			struct mlx5_flow_group *allmulti_grp;
			struct mlx5_flow_group *promisc_grp;
		} legacy;

		struct offloads_fdb {
			struct mlx5_flow_table *fdb;
			struct mlx5_flow_group *send_to_vport_grp;
			struct mlx5_flow_group *miss_grp;
			struct mlx5_flow_handle *miss_rule_uni;
			struct mlx5_flow_handle *miss_rule_multi;
			int vlan_push_pop_refcount;
		} offloads;
	};
};

struct mlx5_esw_offload {
	struct mlx5_flow_table *ft_offloads;
	struct mlx5_flow_group *vport_rx_group;
	struct mlx5_eswitch_rep *vport_reps;
	DECLARE_HASHTABLE(encap_tbl, 8);
	DECLARE_HASHTABLE(mod_hdr_tbl, 8);
	u8 inline_mode;
	u64 num_flows;
	u8 encap;
};

/* E-Switch MC FDB table hash node */
struct esw_mc_addr { /* SRIOV only */
	struct l2addr_node     node;
	struct mlx5_flow_handle *uplink_rule; /* Forward to uplink rule */
	u32                    refcnt;
};

struct mlx5_eswitch {
	struct mlx5_core_dev    *dev;
	struct mlx5_eswitch_fdb fdb_table;
	struct hlist_head       mc_table[MLX5_L2_ADDR_HASH_SIZE];
	struct workqueue_struct *work_queue;
	struct mlx5_vport       *vports;
	int                     total_vports;
	int                     enabled_vports;
	/* Synchronize between vport change events
	 * and async SRIOV admin state changes
	 */
	struct mutex            state_lock;
	struct esw_mc_addr	mc_promisc;

	struct {
		bool            enabled;
		u32             root_tsar_id;
	} qos;

	struct mlx5_esw_offload offloads;
	int                     mode;
};

void esw_offloads_cleanup(struct mlx5_eswitch *esw, int nvports);
int esw_offloads_init(struct mlx5_eswitch *esw, int nvports);
void esw_offloads_cleanup_reps(struct mlx5_eswitch *esw);
int esw_offloads_init_reps(struct mlx5_eswitch *esw);

/* E-Switch API */
int mlx5_eswitch_init(struct mlx5_core_dev *dev);
void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw);
void mlx5_eswitch_vport_event(struct mlx5_eswitch *esw, struct mlx5_eqe *eqe);
int mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs, int mode);
void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw);
int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
			       int vport, u8 mac[ETH_ALEN]);
int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
				 int vport, int link_state);
int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
				int vport, u16 vlan, u8 qos);
int mlx5_eswitch_set_vport_spoofchk(struct mlx5_eswitch *esw,
				    int vport, bool spoofchk);
int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw,
				 int vport_num, bool setting);
int mlx5_eswitch_set_vport_rate(struct mlx5_eswitch *esw, int vport,
				u32 max_rate, u32 min_rate);
int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
				  int vport, struct ifla_vf_info *ivi);
int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
				 int vport,
				 struct ifla_vf_stats *vf_stats);
void mlx5_eswitch_del_send_to_vport_rule(struct mlx5_flow_handle *rule);

struct mlx5_flow_spec;
struct mlx5_esw_flow_attr;

struct mlx5_flow_handle *
mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw,
				struct mlx5_flow_spec *spec,
				struct mlx5_esw_flow_attr *attr);
void
mlx5_eswitch_del_offloaded_rule(struct mlx5_eswitch *esw,
				struct mlx5_flow_handle *rule,
				struct mlx5_esw_flow_attr *attr);

struct mlx5_flow_handle *
mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, int vport, u32 tirn);

enum {
	SET_VLAN_STRIP	= BIT(0),
	SET_VLAN_INSERT	= BIT(1)
};

struct mlx5_esw_flow_attr {
	struct mlx5_eswitch_rep *in_rep;
	struct mlx5_eswitch_rep *out_rep;

	int	action;
	u16	vlan;
	bool	vlan_handled;
	u32	encap_id;
	u32	mod_hdr_id;
	struct mlx5e_tc_flow_parse_attr *parse_attr;
};

int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode);
int mlx5_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode);
int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode);
int mlx5_devlink_eswitch_inline_mode_get(struct devlink *devlink, u8 *mode);
int mlx5_eswitch_inline_mode_get(struct mlx5_eswitch *esw, int nvfs, u8 *mode);
int mlx5_devlink_eswitch_encap_mode_set(struct devlink *devlink, u8 encap);
int mlx5_devlink_eswitch_encap_mode_get(struct devlink *devlink, u8 *encap);
void *mlx5_eswitch_get_uplink_priv(struct mlx5_eswitch *esw, u8 rep_type);

int mlx5_eswitch_add_vlan_action(struct mlx5_eswitch *esw,
				 struct mlx5_esw_flow_attr *attr);
int mlx5_eswitch_del_vlan_action(struct mlx5_eswitch *esw,
				 struct mlx5_esw_flow_attr *attr);
int __mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
				  int vport, u16 vlan, u8 qos, u8 set_flags);

#define MLX5_DEBUG_ESWITCH_MASK BIT(3)

#define esw_info(dev, format, ...)				\
	pr_info("(%s): E-Switch: " format, (dev)->priv.name, ##__VA_ARGS__)

#define esw_warn(dev, format, ...)				\
	pr_warn("(%s): E-Switch: " format, (dev)->priv.name, ##__VA_ARGS__)

#define esw_debug(dev, format, ...)				\
	mlx5_core_dbg_mask(dev, MLX5_DEBUG_ESWITCH_MASK, format, ##__VA_ARGS__)
#else  /* CONFIG_MLX5_ESWITCH */
/* eswitch API stubs */
static inline int  mlx5_eswitch_init(struct mlx5_core_dev *dev) { return 0; }
static inline void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw) {}
static inline void mlx5_eswitch_vport_event(struct mlx5_eswitch *esw, struct mlx5_eqe *eqe) {}
static inline int  mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs, int mode) { return 0; }
static inline void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw) {}
#endif /* CONFIG_MLX5_ESWITCH */

#endif /* __MLX5_ESWITCH_H__ */
Commit	Line	Data
073bb189 SM	1	/*
	2	* Copyright (c) 2015, Mellanox Technologies, Ltd. All rights reserved.
	3	*
	4	* This software is available to you under a choice of one of two
	5	* licenses. You may choose to be licensed under the terms of the GNU
	6	* General Public License (GPL) Version 2, available from the file
	7	* COPYING in the main directory of this source tree, or the
	8	* OpenIB.org BSD license below:
	9	*
	10	* Redistribution and use in source and binary forms, with or
	11	* without modification, are permitted provided that the following
	12	* conditions are met:
	13	*
	14	* - Redistributions of source code must retain the above
	15	* copyright notice, this list of conditions and the following
	16	* disclaimer.
	17	*
	18	* - Redistributions in binary form must reproduce the above
	19	* copyright notice, this list of conditions and the following
	20	* disclaimer in the documentation and/or other materials
	21	* provided with the distribution.
	22	*
	23	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	24	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	25	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	26	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	27	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	28	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	29	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	30	* SOFTWARE.
	31	*/
	32
	33	#ifndef __MLX5_ESWITCH_H__
	34	#define __MLX5_ESWITCH_H__
	35
77256579 SM	36	#include <linux/if_ether.h>
77256579 SM	37	#include <linux/if_link.h>
feae9087	38	#include <net/devlink.h>
073bb189	39	#include <linux/mlx5/device.h>
57cbd893	40	#include <linux/mlx5/eswitch.h>
eeb66cdb	41	#include "lib/mpfs.h"
073bb189	42
e80541ec SM	43	#ifdef CONFIG_MLX5_ESWITCH
e80541ec SM	44
073bb189 SM	45	#define MLX5_MAX_UC_PER_VPORT(dev) \
	46	(1 << MLX5_CAP_GEN(dev, log_max_current_uc_list))
	47
	48	#define MLX5_MAX_MC_PER_VPORT(dev) \
	49	(1 << MLX5_CAP_GEN(dev, log_max_current_mc_list))
	50
cb67b832 HHZ	51	#define FDB_UPLINK_VPORT 0xffff
cb67b832 HHZ	52
c9497c98 MHY	53	#define MLX5_MIN_BW_SHARE 1
	54
	55	#define MLX5_RATE_TO_BW_SHARE(rate, divider, limit) \
	56	min_t(u32, max_t(u32, (rate) / (divider), MLX5_MIN_BW_SHARE), limit)
	57
5742df0f MHY	58	struct vport_ingress {
	59	struct mlx5_flow_table *acl;
	60	struct mlx5_flow_group *allow_untagged_spoofchk_grp;
	61	struct mlx5_flow_group *allow_spoofchk_only_grp;
	62	struct mlx5_flow_group *allow_untagged_only_grp;
	63	struct mlx5_flow_group *drop_grp;
74491de9 MB	64	struct mlx5_flow_handle *allow_rule;
74491de9 MB	65	struct mlx5_flow_handle *drop_rule;
b8a0dbe3	66	struct mlx5_fc *drop_counter;
5742df0f MHY	67	};
	68
	69	struct vport_egress {
	70	struct mlx5_flow_table *acl;
	71	struct mlx5_flow_group *allowed_vlans_grp;
	72	struct mlx5_flow_group *drop_grp;
74491de9 MB	73	struct mlx5_flow_handle *allowed_vlan;
74491de9 MB	74	struct mlx5_flow_handle *drop_rule;
b8a0dbe3 EE	75	struct mlx5_fc *drop_counter;
	76	};
	77
	78	struct mlx5_vport_drop_stats {
	79	u64 rx_dropped;
	80	u64 tx_dropped;
5742df0f MHY	81	};
5742df0f MHY	82
1ab2068a MHY	83	struct mlx5_vport_info {
	84	u8 mac[ETH_ALEN];
	85	u16 vlan;
	86	u8 qos;
	87	u64 node_guid;
	88	int link_state;
c9497c98	89	u32 min_rate;
1bd27b11	90	u32 max_rate;
1ab2068a MHY	91	bool spoofchk;
	92	bool trusted;
	93	};
	94
073bb189 SM	95	struct mlx5_vport {
	96	struct mlx5_core_dev *dev;
	97	int vport;
	98	struct hlist_head uc_list[MLX5_L2_ADDR_HASH_SIZE];
81848731	99	struct hlist_head mc_list[MLX5_L2_ADDR_HASH_SIZE];
74491de9 MB	100	struct mlx5_flow_handle *promisc_rule;
74491de9 MB	101	struct mlx5_flow_handle *allmulti_rule;
073bb189 SM	102	struct work_struct vport_change_handler;
073bb189 SM	103
5742df0f MHY	104	struct vport_ingress ingress;
	105	struct vport_egress egress;
	106
1ab2068a MHY	107	struct mlx5_vport_info info;
1ab2068a MHY	108
1bd27b11 MHY	109	struct {
	110	bool enabled;
	111	u32 esw_tsar_ix;
c9497c98	112	u32 bw_share;
1bd27b11 MHY	113	} qos;
1bd27b11 MHY	114
073bb189	115	bool enabled;
81848731	116	u16 enabled_events;
073bb189 SM	117	};
073bb189 SM	118
81848731 SM	119	struct mlx5_eswitch_fdb {
81848731 SM	120	void *fdb;
6ab36e35 OG	121	union {
	122	struct legacy_fdb {
	123	struct mlx5_flow_group *addr_grp;
	124	struct mlx5_flow_group *allmulti_grp;
	125	struct mlx5_flow_group *promisc_grp;
	126	} legacy;
69697b6e OG	127
69697b6e OG	128	struct offloads_fdb {
1033665e	129	struct mlx5_flow_table *fdb;
69697b6e OG	130	struct mlx5_flow_group *send_to_vport_grp;
69697b6e OG	131	struct mlx5_flow_group *miss_grp;
f80be543 MB	132	struct mlx5_flow_handle *miss_rule_uni;
f80be543 MB	133	struct mlx5_flow_handle *miss_rule_multi;
f5f82476	134	int vlan_push_pop_refcount;
69697b6e	135	} offloads;
6ab36e35 OG	136	};
	137	};
	138
c116c6ee OG	139	struct mlx5_esw_offload {
c116c6ee OG	140	struct mlx5_flow_table *ft_offloads;
fed9ce22	141	struct mlx5_flow_group *vport_rx_group;
127ea380	142	struct mlx5_eswitch_rep *vport_reps;
a54e20b4	143	DECLARE_HASHTABLE(encap_tbl, 8);
11c9c548	144	DECLARE_HASHTABLE(mod_hdr_tbl, 8);
bffaa916	145	u8 inline_mode;
375f51e2	146	u64 num_flows;
7768d197	147	u8 encap;
c116c6ee OG	148	};
c116c6ee OG	149
0a0ab1d2 EC	150	/* E-Switch MC FDB table hash node */
	151	struct esw_mc_addr { /* SRIOV only */
	152	struct l2addr_node node;
	153	struct mlx5_flow_handle uplink_rule; / Forward to uplink rule */
	154	u32 refcnt;
	155	};
	156
073bb189 SM	157	struct mlx5_eswitch {
073bb189 SM	158	struct mlx5_core_dev *dev;
81848731 SM	159	struct mlx5_eswitch_fdb fdb_table;
81848731 SM	160	struct hlist_head mc_table[MLX5_L2_ADDR_HASH_SIZE];
073bb189 SM	161	struct workqueue_struct *work_queue;
	162	struct mlx5_vport *vports;
	163	int total_vports;
81848731	164	int enabled_vports;
dfcb1ed3 MHY	165	/* Synchronize between vport change events
	166	* and async SRIOV admin state changes
	167	*/
	168	struct mutex state_lock;
0a0ab1d2	169	struct esw_mc_addr mc_promisc;
1bd27b11 MHY	170
	171	struct {
	172	bool enabled;
	173	u32 root_tsar_id;
	174	} qos;
	175
c116c6ee	176	struct mlx5_esw_offload offloads;
6ab36e35	177	int mode;
073bb189 SM	178	};
073bb189 SM	179
766a0e97 BX	180	void esw_offloads_cleanup(struct mlx5_eswitch *esw, int nvports);
766a0e97 BX	181	int esw_offloads_init(struct mlx5_eswitch *esw, int nvports);
e8d31c4d MB	182	void esw_offloads_cleanup_reps(struct mlx5_eswitch *esw);
e8d31c4d MB	183	int esw_offloads_init_reps(struct mlx5_eswitch *esw);
766a0e97	184
073bb189 SM	185	/* E-Switch API */
	186	int mlx5_eswitch_init(struct mlx5_core_dev *dev);
	187	void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw);
	188	void mlx5_eswitch_vport_event(struct mlx5_eswitch esw, struct mlx5_eqe eqe);
6ab36e35	189	int mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs, int mode);
81848731	190	void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw);
77256579 SM	191	int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw,
	192	int vport, u8 mac[ETH_ALEN]);
	193	int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw,
	194	int vport, int link_state);
9e7ea352 SM	195	int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
9e7ea352 SM	196	int vport, u16 vlan, u8 qos);
f942380c MHY	197	int mlx5_eswitch_set_vport_spoofchk(struct mlx5_eswitch *esw,
f942380c MHY	198	int vport, bool spoofchk);
1edc57e2 MHY	199	int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw,
1edc57e2 MHY	200	int vport_num, bool setting);
c9497c98 MHY	201	int mlx5_eswitch_set_vport_rate(struct mlx5_eswitch *esw, int vport,
c9497c98 MHY	202	u32 max_rate, u32 min_rate);
77256579 SM	203	int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw,
77256579 SM	204	int vport, struct ifla_vf_info *ivi);
3b751a2a SM	205	int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw,
	206	int vport,
	207	struct ifla_vf_stats *vf_stats);
159fe639	208	void mlx5_eswitch_del_send_to_vport_rule(struct mlx5_flow_handle *rule);
073bb189	209
3d80d1a2	210	struct mlx5_flow_spec;
776b12b6	211	struct mlx5_esw_flow_attr;
3d80d1a2	212
74491de9	213	struct mlx5_flow_handle *
3d80d1a2 OG	214	mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw,
3d80d1a2 OG	215	struct mlx5_flow_spec *spec,
776b12b6	216	struct mlx5_esw_flow_attr *attr);
d85cdccb OG	217	void
	218	mlx5_eswitch_del_offloaded_rule(struct mlx5_eswitch *esw,
	219	struct mlx5_flow_handle *rule,
	220	struct mlx5_esw_flow_attr *attr);
	221
74491de9	222	struct mlx5_flow_handle *
fed9ce22 OG	223	mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, int vport, u32 tirn);
fed9ce22 OG	224
e33dfe31 OG	225	enum {
	226	SET_VLAN_STRIP = BIT(0),
	227	SET_VLAN_INSERT = BIT(1)
	228	};
	229
776b12b6 OG	230	struct mlx5_esw_flow_attr {
	231	struct mlx5_eswitch_rep *in_rep;
	232	struct mlx5_eswitch_rep *out_rep;
	233
	234	int action;
f5f82476 OG	235	u16 vlan;
f5f82476 OG	236	bool vlan_handled;
45247bf2	237	u32 encap_id;
d7e75a32	238	u32 mod_hdr_id;
232c0013	239	struct mlx5e_tc_flow_parse_attr *parse_attr;
776b12b6 OG	240	};
776b12b6 OG	241
feae9087 OG	242	int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode);
feae9087 OG	243	int mlx5_devlink_eswitch_mode_get(struct devlink devlink, u16 mode);
bffaa916 RD	244	int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode);
	245	int mlx5_devlink_eswitch_inline_mode_get(struct devlink devlink, u8 mode);
	246	int mlx5_eswitch_inline_mode_get(struct mlx5_eswitch esw, int nvfs, u8 mode);
7768d197 RD	247	int mlx5_devlink_eswitch_encap_mode_set(struct devlink *devlink, u8 encap);
7768d197 RD	248	int mlx5_devlink_eswitch_encap_mode_get(struct devlink devlink, u8 encap);
a4b97ab4	249	void mlx5_eswitch_get_uplink_priv(struct mlx5_eswitch esw, u8 rep_type);
feae9087	250
f5f82476 OG	251	int mlx5_eswitch_add_vlan_action(struct mlx5_eswitch *esw,
	252	struct mlx5_esw_flow_attr *attr);
	253	int mlx5_eswitch_del_vlan_action(struct mlx5_eswitch *esw,
	254	struct mlx5_esw_flow_attr *attr);
	255	int __mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw,
	256	int vport, u16 vlan, u8 qos, u8 set_flags);
	257
69697b6e OG	258	#define MLX5_DEBUG_ESWITCH_MASK BIT(3)
	259
	260	#define esw_info(dev, format, ...) \
	261	pr_info("(%s): E-Switch: " format, (dev)->priv.name, ##__VA_ARGS__)
	262
	263	#define esw_warn(dev, format, ...) \
	264	pr_warn("(%s): E-Switch: " format, (dev)->priv.name, ##__VA_ARGS__)
	265
	266	#define esw_debug(dev, format, ...) \
	267	mlx5_core_dbg_mask(dev, MLX5_DEBUG_ESWITCH_MASK, format, ##__VA_ARGS__)
e80541ec SM	268	#else /* CONFIG_MLX5_ESWITCH */
	269	/* eswitch API stubs */
	270	static inline int mlx5_eswitch_init(struct mlx5_core_dev *dev) { return 0; }
	271	static inline void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw) {}
	272	static inline void mlx5_eswitch_vport_event(struct mlx5_eswitch esw, struct mlx5_eqe eqe) {}
	273	static inline int mlx5_eswitch_enable_sriov(struct mlx5_eswitch *esw, int nvfs, int mode) { return 0; }
	274	static inline void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw) {}
	275	#endif /* CONFIG_MLX5_ESWITCH */
	276
073bb189	277	#endif /* __MLX5_ESWITCH_H__ */