]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/net/ethernet/mellanox/mlx5/core/fs_cmd.c
Merge remote-tracking branch 'regulator/fix/max77802' into regulator-linus
[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / mellanox / mlx5 / core / fs_cmd.c
CommitLineData
26a81453
MG
1/*
2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33#include <linux/mlx5/driver.h>
34#include <linux/mlx5/device.h>
35#include <linux/mlx5/mlx5_ifc.h>
36
37#include "fs_core.h"
38#include "fs_cmd.h"
39#include "mlx5_core.h"
c9f1b073 40#include "eswitch.h"
26a81453 41
2cc43b49 42int mlx5_cmd_update_root_ft(struct mlx5_core_dev *dev,
50854114 43 struct mlx5_flow_table *ft, u32 underlay_qpn)
2cc43b49 44{
c4f287c4
SM
45 u32 in[MLX5_ST_SZ_DW(set_flow_table_root_in)] = {0};
46 u32 out[MLX5_ST_SZ_DW(set_flow_table_root_out)] = {0};
2cc43b49 47
b3ba5149 48 if ((MLX5_CAP_GEN(dev, port_type) == MLX5_CAP_PORT_TYPE_IB) &&
50854114 49 underlay_qpn == 0)
b3ba5149
ES
50 return 0;
51
2cc43b49
MG
52 MLX5_SET(set_flow_table_root_in, in, opcode,
53 MLX5_CMD_OP_SET_FLOW_TABLE_ROOT);
54 MLX5_SET(set_flow_table_root_in, in, table_type, ft->type);
55 MLX5_SET(set_flow_table_root_in, in, table_id, ft->id);
50854114 56 MLX5_SET(set_flow_table_root_in, in, underlay_qpn, underlay_qpn);
efdc810b
MHY
57 if (ft->vport) {
58 MLX5_SET(set_flow_table_root_in, in, vport_number, ft->vport);
59 MLX5_SET(set_flow_table_root_in, in, other_vport, 1);
60 }
2cc43b49 61
c4f287c4 62 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
2cc43b49
MG
63}
64
26a81453 65int mlx5_cmd_create_flow_table(struct mlx5_core_dev *dev,
efdc810b 66 u16 vport,
aaff1bea 67 enum fs_flow_table_op_mod op_mod,
26a81453 68 enum fs_flow_table_type type, unsigned int level,
f90edfd2 69 unsigned int log_size, struct mlx5_flow_table
c9f1b073 70 *next_ft, unsigned int *table_id, u32 flags)
26a81453 71{
c9f1b073 72 int en_encap_decap = !!(flags & MLX5_FLOW_TABLE_TUNNEL_EN);
c4f287c4
SM
73 u32 out[MLX5_ST_SZ_DW(create_flow_table_out)] = {0};
74 u32 in[MLX5_ST_SZ_DW(create_flow_table_in)] = {0};
26a81453
MG
75 int err;
76
26a81453
MG
77 MLX5_SET(create_flow_table_in, in, opcode,
78 MLX5_CMD_OP_CREATE_FLOW_TABLE);
79
80 MLX5_SET(create_flow_table_in, in, table_type, type);
81 MLX5_SET(create_flow_table_in, in, level, level);
82 MLX5_SET(create_flow_table_in, in, log_size, log_size);
efdc810b
MHY
83 if (vport) {
84 MLX5_SET(create_flow_table_in, in, vport_number, vport);
85 MLX5_SET(create_flow_table_in, in, other_vport, 1);
86 }
26a81453 87
c9f1b073
HHZ
88 MLX5_SET(create_flow_table_in, in, decap_en, en_encap_decap);
89 MLX5_SET(create_flow_table_in, in, encap_en, en_encap_decap);
90
aaff1bea
AH
91 switch (op_mod) {
92 case FS_FT_OP_MOD_NORMAL:
93 if (next_ft) {
94 MLX5_SET(create_flow_table_in, in, table_miss_mode, 1);
95 MLX5_SET(create_flow_table_in, in, table_miss_id, next_ft->id);
96 }
97 break;
98
99 case FS_FT_OP_MOD_LAG_DEMUX:
100 MLX5_SET(create_flow_table_in, in, op_mod, 0x1);
101 if (next_ft)
102 MLX5_SET(create_flow_table_in, in, lag_master_next_table_id,
103 next_ft->id);
104 break;
105 }
106
c4f287c4 107 err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
26a81453
MG
108 if (!err)
109 *table_id = MLX5_GET(create_flow_table_out, out,
110 table_id);
111 return err;
112}
113
114int mlx5_cmd_destroy_flow_table(struct mlx5_core_dev *dev,
115 struct mlx5_flow_table *ft)
116{
c4f287c4
SM
117 u32 in[MLX5_ST_SZ_DW(destroy_flow_table_in)] = {0};
118 u32 out[MLX5_ST_SZ_DW(destroy_flow_table_out)] = {0};
26a81453
MG
119
120 MLX5_SET(destroy_flow_table_in, in, opcode,
121 MLX5_CMD_OP_DESTROY_FLOW_TABLE);
122 MLX5_SET(destroy_flow_table_in, in, table_type, ft->type);
123 MLX5_SET(destroy_flow_table_in, in, table_id, ft->id);
efdc810b
MHY
124 if (ft->vport) {
125 MLX5_SET(destroy_flow_table_in, in, vport_number, ft->vport);
126 MLX5_SET(destroy_flow_table_in, in, other_vport, 1);
127 }
26a81453 128
c4f287c4 129 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
26a81453
MG
130}
131
34a40e68
MG
132int mlx5_cmd_modify_flow_table(struct mlx5_core_dev *dev,
133 struct mlx5_flow_table *ft,
134 struct mlx5_flow_table *next_ft)
135{
c4f287c4
SM
136 u32 in[MLX5_ST_SZ_DW(modify_flow_table_in)] = {0};
137 u32 out[MLX5_ST_SZ_DW(modify_flow_table_out)] = {0};
34a40e68
MG
138
139 MLX5_SET(modify_flow_table_in, in, opcode,
140 MLX5_CMD_OP_MODIFY_FLOW_TABLE);
141 MLX5_SET(modify_flow_table_in, in, table_type, ft->type);
142 MLX5_SET(modify_flow_table_in, in, table_id, ft->id);
aaff1bea
AH
143
144 if (ft->op_mod == FS_FT_OP_MOD_LAG_DEMUX) {
145 MLX5_SET(modify_flow_table_in, in, modify_field_select,
146 MLX5_MODIFY_FLOW_TABLE_LAG_NEXT_TABLE_ID);
147 if (next_ft) {
148 MLX5_SET(modify_flow_table_in, in,
149 lag_master_next_table_id, next_ft->id);
150 } else {
151 MLX5_SET(modify_flow_table_in, in,
152 lag_master_next_table_id, 0);
153 }
34a40e68 154 } else {
aaff1bea
AH
155 if (ft->vport) {
156 MLX5_SET(modify_flow_table_in, in, vport_number,
157 ft->vport);
158 MLX5_SET(modify_flow_table_in, in, other_vport, 1);
159 }
160 MLX5_SET(modify_flow_table_in, in, modify_field_select,
161 MLX5_MODIFY_FLOW_TABLE_MISS_TABLE_ID);
162 if (next_ft) {
163 MLX5_SET(modify_flow_table_in, in, table_miss_mode, 1);
164 MLX5_SET(modify_flow_table_in, in, table_miss_id,
165 next_ft->id);
166 } else {
167 MLX5_SET(modify_flow_table_in, in, table_miss_mode, 0);
168 }
34a40e68
MG
169 }
170
c4f287c4 171 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
34a40e68
MG
172}
173
26a81453
MG
174int mlx5_cmd_create_flow_group(struct mlx5_core_dev *dev,
175 struct mlx5_flow_table *ft,
176 u32 *in,
177 unsigned int *group_id)
178{
c4f287c4 179 u32 out[MLX5_ST_SZ_DW(create_flow_group_out)] = {0};
26a81453 180 int inlen = MLX5_ST_SZ_BYTES(create_flow_group_in);
26a81453
MG
181 int err;
182
26a81453
MG
183 MLX5_SET(create_flow_group_in, in, opcode,
184 MLX5_CMD_OP_CREATE_FLOW_GROUP);
185 MLX5_SET(create_flow_group_in, in, table_type, ft->type);
186 MLX5_SET(create_flow_group_in, in, table_id, ft->id);
efdc810b
MHY
187 if (ft->vport) {
188 MLX5_SET(create_flow_group_in, in, vport_number, ft->vport);
189 MLX5_SET(create_flow_group_in, in, other_vport, 1);
190 }
26a81453 191
c4f287c4 192 err = mlx5_cmd_exec(dev, in, inlen, out, sizeof(out));
26a81453
MG
193 if (!err)
194 *group_id = MLX5_GET(create_flow_group_out, out,
195 group_id);
26a81453
MG
196 return err;
197}
198
199int mlx5_cmd_destroy_flow_group(struct mlx5_core_dev *dev,
200 struct mlx5_flow_table *ft,
201 unsigned int group_id)
202{
c4f287c4
SM
203 u32 out[MLX5_ST_SZ_DW(destroy_flow_group_out)] = {0};
204 u32 in[MLX5_ST_SZ_DW(destroy_flow_group_in)] = {0};
26a81453
MG
205
206 MLX5_SET(destroy_flow_group_in, in, opcode,
207 MLX5_CMD_OP_DESTROY_FLOW_GROUP);
208 MLX5_SET(destroy_flow_group_in, in, table_type, ft->type);
209 MLX5_SET(destroy_flow_group_in, in, table_id, ft->id);
210 MLX5_SET(destroy_flow_group_in, in, group_id, group_id);
efdc810b
MHY
211 if (ft->vport) {
212 MLX5_SET(destroy_flow_group_in, in, vport_number, ft->vport);
213 MLX5_SET(destroy_flow_group_in, in, other_vport, 1);
214 }
26a81453 215
c4f287c4 216 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
26a81453
MG
217}
218
219static int mlx5_cmd_set_fte(struct mlx5_core_dev *dev,
220 int opmod, int modify_mask,
221 struct mlx5_flow_table *ft,
222 unsigned group_id,
223 struct fs_fte *fte)
224{
225 unsigned int inlen = MLX5_ST_SZ_BYTES(set_fte_in) +
226 fte->dests_size * MLX5_ST_SZ_BYTES(dest_format_struct);
c4f287c4 227 u32 out[MLX5_ST_SZ_DW(set_fte_out)] = {0};
26a81453
MG
228 struct mlx5_flow_rule *dst;
229 void *in_flow_context;
230 void *in_match_value;
231 void *in_dests;
232 u32 *in;
233 int err;
234
235 in = mlx5_vzalloc(inlen);
236 if (!in) {
237 mlx5_core_warn(dev, "failed to allocate inbox\n");
238 return -ENOMEM;
239 }
240
241 MLX5_SET(set_fte_in, in, opcode, MLX5_CMD_OP_SET_FLOW_TABLE_ENTRY);
242 MLX5_SET(set_fte_in, in, op_mod, opmod);
243 MLX5_SET(set_fte_in, in, modify_enable_mask, modify_mask);
244 MLX5_SET(set_fte_in, in, table_type, ft->type);
245 MLX5_SET(set_fte_in, in, table_id, ft->id);
246 MLX5_SET(set_fte_in, in, flow_index, fte->index);
efdc810b
MHY
247 if (ft->vport) {
248 MLX5_SET(set_fte_in, in, vport_number, ft->vport);
249 MLX5_SET(set_fte_in, in, other_vport, 1);
250 }
26a81453
MG
251
252 in_flow_context = MLX5_ADDR_OF(set_fte_in, in, flow_context);
253 MLX5_SET(flow_context, in_flow_context, group_id, group_id);
254 MLX5_SET(flow_context, in_flow_context, flow_tag, fte->flow_tag);
255 MLX5_SET(flow_context, in_flow_context, action, fte->action);
66958ed9 256 MLX5_SET(flow_context, in_flow_context, encap_id, fte->encap_id);
2a69cb9f 257 MLX5_SET(flow_context, in_flow_context, modify_header_id, fte->modify_id);
26a81453
MG
258 in_match_value = MLX5_ADDR_OF(flow_context, in_flow_context,
259 match_value);
260 memcpy(in_match_value, &fte->val, MLX5_ST_SZ_BYTES(fte_match_param));
261
bd5251db 262 in_dests = MLX5_ADDR_OF(flow_context, in_flow_context, destination);
60ab4584 263 if (fte->action & MLX5_FLOW_CONTEXT_ACTION_FWD_DEST) {
bd5251db
AV
264 int list_size = 0;
265
60ab4584
AV
266 list_for_each_entry(dst, &fte->node.children, node.list) {
267 unsigned int id;
268
bd5251db
AV
269 if (dst->dest_attr.type == MLX5_FLOW_DESTINATION_TYPE_COUNTER)
270 continue;
271
60ab4584
AV
272 MLX5_SET(dest_format_struct, in_dests, destination_type,
273 dst->dest_attr.type);
274 if (dst->dest_attr.type ==
275 MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE) {
276 id = dst->dest_attr.ft->id;
277 } else {
278 id = dst->dest_attr.tir_num;
279 }
280 MLX5_SET(dest_format_struct, in_dests, destination_id, id);
281 in_dests += MLX5_ST_SZ_BYTES(dest_format_struct);
bd5251db
AV
282 list_size++;
283 }
284
285 MLX5_SET(flow_context, in_flow_context, destination_list_size,
286 list_size);
287 }
288
289 if (fte->action & MLX5_FLOW_CONTEXT_ACTION_COUNT) {
290 int list_size = 0;
291
292 list_for_each_entry(dst, &fte->node.children, node.list) {
293 if (dst->dest_attr.type !=
294 MLX5_FLOW_DESTINATION_TYPE_COUNTER)
295 continue;
296
297 MLX5_SET(flow_counter_list, in_dests, flow_counter_id,
298 dst->dest_attr.counter->id);
299 in_dests += MLX5_ST_SZ_BYTES(dest_format_struct);
300 list_size++;
60ab4584 301 }
bd5251db
AV
302
303 MLX5_SET(flow_context, in_flow_context, flow_counter_list_size,
304 list_size);
26a81453 305 }
bd5251db 306
c4f287c4 307 err = mlx5_cmd_exec(dev, in, inlen, out, sizeof(out));
26a81453 308 kvfree(in);
26a81453
MG
309 return err;
310}
311
312int mlx5_cmd_create_fte(struct mlx5_core_dev *dev,
313 struct mlx5_flow_table *ft,
314 unsigned group_id,
315 struct fs_fte *fte)
316{
c4f287c4 317 return mlx5_cmd_set_fte(dev, 0, 0, ft, group_id, fte);
26a81453
MG
318}
319
320int mlx5_cmd_update_fte(struct mlx5_core_dev *dev,
321 struct mlx5_flow_table *ft,
322 unsigned group_id,
bd5251db 323 int modify_mask,
26a81453
MG
324 struct fs_fte *fte)
325{
326 int opmod;
26a81453
MG
327 int atomic_mod_cap = MLX5_CAP_FLOWTABLE(dev,
328 flow_table_properties_nic_receive.
329 flow_modify_en);
330 if (!atomic_mod_cap)
9eb78923 331 return -EOPNOTSUPP;
26a81453 332 opmod = 1;
26a81453
MG
333
334 return mlx5_cmd_set_fte(dev, opmod, modify_mask, ft, group_id, fte);
335}
336
337int mlx5_cmd_delete_fte(struct mlx5_core_dev *dev,
338 struct mlx5_flow_table *ft,
339 unsigned int index)
340{
c4f287c4
SM
341 u32 out[MLX5_ST_SZ_DW(delete_fte_out)] = {0};
342 u32 in[MLX5_ST_SZ_DW(delete_fte_in)] = {0};
26a81453
MG
343
344 MLX5_SET(delete_fte_in, in, opcode, MLX5_CMD_OP_DELETE_FLOW_TABLE_ENTRY);
345 MLX5_SET(delete_fte_in, in, table_type, ft->type);
346 MLX5_SET(delete_fte_in, in, table_id, ft->id);
347 MLX5_SET(delete_fte_in, in, flow_index, index);
efdc810b
MHY
348 if (ft->vport) {
349 MLX5_SET(delete_fte_in, in, vport_number, ft->vport);
350 MLX5_SET(delete_fte_in, in, other_vport, 1);
351 }
26a81453 352
c4f287c4 353 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
26a81453 354}
9dc0b289
AV
355
356int mlx5_cmd_fc_alloc(struct mlx5_core_dev *dev, u16 *id)
357{
c4f287c4
SM
358 u32 in[MLX5_ST_SZ_DW(alloc_flow_counter_in)] = {0};
359 u32 out[MLX5_ST_SZ_DW(alloc_flow_counter_out)] = {0};
9dc0b289
AV
360 int err;
361
9dc0b289
AV
362 MLX5_SET(alloc_flow_counter_in, in, opcode,
363 MLX5_CMD_OP_ALLOC_FLOW_COUNTER);
364
c4f287c4
SM
365 err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
366 if (!err)
367 *id = MLX5_GET(alloc_flow_counter_out, out, flow_counter_id);
368 return err;
9dc0b289
AV
369}
370
371int mlx5_cmd_fc_free(struct mlx5_core_dev *dev, u16 id)
372{
c4f287c4
SM
373 u32 in[MLX5_ST_SZ_DW(dealloc_flow_counter_in)] = {0};
374 u32 out[MLX5_ST_SZ_DW(dealloc_flow_counter_out)] = {0};
9dc0b289
AV
375
376 MLX5_SET(dealloc_flow_counter_in, in, opcode,
377 MLX5_CMD_OP_DEALLOC_FLOW_COUNTER);
378 MLX5_SET(dealloc_flow_counter_in, in, flow_counter_id, id);
c4f287c4 379 return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
9dc0b289
AV
380}
381
382int mlx5_cmd_fc_query(struct mlx5_core_dev *dev, u16 id,
383 u64 *packets, u64 *bytes)
384{
385 u32 out[MLX5_ST_SZ_BYTES(query_flow_counter_out) +
c4f287c4
SM
386 MLX5_ST_SZ_BYTES(traffic_counter)] = {0};
387 u32 in[MLX5_ST_SZ_DW(query_flow_counter_in)] = {0};
9dc0b289
AV
388 void *stats;
389 int err = 0;
390
9dc0b289
AV
391 MLX5_SET(query_flow_counter_in, in, opcode,
392 MLX5_CMD_OP_QUERY_FLOW_COUNTER);
393 MLX5_SET(query_flow_counter_in, in, op_mod, 0);
394 MLX5_SET(query_flow_counter_in, in, flow_counter_id, id);
c4f287c4 395 err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
9dc0b289
AV
396 if (err)
397 return err;
398
399 stats = MLX5_ADDR_OF(query_flow_counter_out, out, flow_statistics);
400 *packets = MLX5_GET64(traffic_counter, stats, packets);
401 *bytes = MLX5_GET64(traffic_counter, stats, octets);
9dc0b289
AV
402 return 0;
403}
a351a1b0
AV
404
405struct mlx5_cmd_fc_bulk {
406 u16 id;
407 int num;
408 int outlen;
409 u32 out[0];
410};
411
412struct mlx5_cmd_fc_bulk *
413mlx5_cmd_fc_bulk_alloc(struct mlx5_core_dev *dev, u16 id, int num)
414{
415 struct mlx5_cmd_fc_bulk *b;
babd6134 416 int outlen =
a351a1b0
AV
417 MLX5_ST_SZ_BYTES(query_flow_counter_out) +
418 MLX5_ST_SZ_BYTES(traffic_counter) * num;
419
babd6134 420 b = kzalloc(sizeof(*b) + outlen, GFP_KERNEL);
a351a1b0
AV
421 if (!b)
422 return NULL;
423
424 b->id = id;
425 b->num = num;
426 b->outlen = outlen;
427
428 return b;
429}
430
431void mlx5_cmd_fc_bulk_free(struct mlx5_cmd_fc_bulk *b)
432{
433 kfree(b);
434}
435
436int
437mlx5_cmd_fc_bulk_query(struct mlx5_core_dev *dev, struct mlx5_cmd_fc_bulk *b)
438{
c4f287c4 439 u32 in[MLX5_ST_SZ_DW(query_flow_counter_in)] = {0};
a351a1b0
AV
440
441 MLX5_SET(query_flow_counter_in, in, opcode,
442 MLX5_CMD_OP_QUERY_FLOW_COUNTER);
443 MLX5_SET(query_flow_counter_in, in, op_mod, 0);
444 MLX5_SET(query_flow_counter_in, in, flow_counter_id, b->id);
445 MLX5_SET(query_flow_counter_in, in, num_of_counters, b->num);
c4f287c4 446 return mlx5_cmd_exec(dev, in, sizeof(in), b->out, b->outlen);
a351a1b0
AV
447}
448
449void mlx5_cmd_fc_bulk_get(struct mlx5_core_dev *dev,
450 struct mlx5_cmd_fc_bulk *b, u16 id,
451 u64 *packets, u64 *bytes)
452{
453 int index = id - b->id;
454 void *stats;
455
456 if (index < 0 || index >= b->num) {
457 mlx5_core_warn(dev, "Flow counter id (0x%x) out of range (0x%x..0x%x). Counter ignored.\n",
458 id, b->id, b->id + b->num - 1);
459 return;
460 }
461
462 stats = MLX5_ADDR_OF(query_flow_counter_out, b->out,
463 flow_statistics[index]);
464 *packets = MLX5_GET64(traffic_counter, stats, packets);
465 *bytes = MLX5_GET64(traffic_counter, stats, octets);
466}
575ddf58 467
ae9f83ac
HHZ
468int mlx5_encap_alloc(struct mlx5_core_dev *dev,
469 int header_type,
470 size_t size,
471 void *encap_header,
472 u32 *encap_id)
575ddf58 473{
43f93839 474 int max_encap_size = MLX5_CAP_ESW(dev, max_encap_header_size);
575ddf58 475 u32 out[MLX5_ST_SZ_DW(alloc_encap_header_out)];
43f93839
HHZ
476 void *encap_header_in;
477 void *header;
478 int inlen;
575ddf58 479 int err;
43f93839 480 u32 *in;
575ddf58 481
073ff3c8
OG
482 if (size > max_encap_size) {
483 mlx5_core_warn(dev, "encap size %zd too big, max supported is %d\n",
484 size, max_encap_size);
575ddf58 485 return -EINVAL;
073ff3c8 486 }
575ddf58 487
073ff3c8 488 in = kzalloc(MLX5_ST_SZ_BYTES(alloc_encap_header_in) + size,
43f93839
HHZ
489 GFP_KERNEL);
490 if (!in)
491 return -ENOMEM;
492
493 encap_header_in = MLX5_ADDR_OF(alloc_encap_header_in, in, encap_header);
494 header = MLX5_ADDR_OF(encap_header_in, encap_header_in, encap_header);
495 inlen = header - (void *)in + size;
496
575ddf58
IL
497 memset(in, 0, inlen);
498 MLX5_SET(alloc_encap_header_in, in, opcode,
499 MLX5_CMD_OP_ALLOC_ENCAP_HEADER);
500 MLX5_SET(encap_header_in, encap_header_in, encap_header_size, size);
501 MLX5_SET(encap_header_in, encap_header_in, header_type, header_type);
502 memcpy(header, encap_header, size);
503
504 memset(out, 0, sizeof(out));
505 err = mlx5_cmd_exec(dev, in, inlen, out, sizeof(out));
506
507 *encap_id = MLX5_GET(alloc_encap_header_out, out, encap_id);
43f93839 508 kfree(in);
575ddf58
IL
509 return err;
510}
511
ae9f83ac 512void mlx5_encap_dealloc(struct mlx5_core_dev *dev, u32 encap_id)
575ddf58
IL
513{
514 u32 in[MLX5_ST_SZ_DW(dealloc_encap_header_in)];
515 u32 out[MLX5_ST_SZ_DW(dealloc_encap_header_out)];
516
517 memset(in, 0, sizeof(in));
518 MLX5_SET(dealloc_encap_header_in, in, opcode,
519 MLX5_CMD_OP_DEALLOC_ENCAP_HEADER);
520 MLX5_SET(dealloc_encap_header_in, in, encap_id, encap_id);
521
522 mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
523}
2de24fed
OG
524
525int mlx5_modify_header_alloc(struct mlx5_core_dev *dev,
526 u8 namespace, u8 num_actions,
527 void *modify_actions, u32 *modify_header_id)
528{
529 u32 out[MLX5_ST_SZ_DW(alloc_modify_header_context_out)];
530 int max_actions, actions_size, inlen, err;
531 void *actions_in;
532 u8 table_type;
533 u32 *in;
534
535 switch (namespace) {
536 case MLX5_FLOW_NAMESPACE_FDB:
537 max_actions = MLX5_CAP_ESW_FLOWTABLE_FDB(dev, max_modify_header_actions);
538 table_type = FS_FT_FDB;
539 break;
540 case MLX5_FLOW_NAMESPACE_KERNEL:
541 max_actions = MLX5_CAP_FLOWTABLE_NIC_RX(dev, max_modify_header_actions);
542 table_type = FS_FT_NIC_RX;
543 break;
544 default:
545 return -EOPNOTSUPP;
546 }
547
548 if (num_actions > max_actions) {
549 mlx5_core_warn(dev, "too many modify header actions %d, max supported %d\n",
550 num_actions, max_actions);
551 return -EOPNOTSUPP;
552 }
553
554 actions_size = MLX5_UN_SZ_BYTES(set_action_in_add_action_in_auto) * num_actions;
555 inlen = MLX5_ST_SZ_BYTES(alloc_modify_header_context_in) + actions_size;
556
557 in = kzalloc(inlen, GFP_KERNEL);
558 if (!in)
559 return -ENOMEM;
560
561 MLX5_SET(alloc_modify_header_context_in, in, opcode,
562 MLX5_CMD_OP_ALLOC_MODIFY_HEADER_CONTEXT);
563 MLX5_SET(alloc_modify_header_context_in, in, table_type, table_type);
564 MLX5_SET(alloc_modify_header_context_in, in, num_of_actions, num_actions);
565
566 actions_in = MLX5_ADDR_OF(alloc_modify_header_context_in, in, actions);
567 memcpy(actions_in, modify_actions, actions_size);
568
569 memset(out, 0, sizeof(out));
570 err = mlx5_cmd_exec(dev, in, inlen, out, sizeof(out));
571
572 *modify_header_id = MLX5_GET(alloc_modify_header_context_out, out, modify_header_id);
573 kfree(in);
574 return err;
575}
576
577void mlx5_modify_header_dealloc(struct mlx5_core_dev *dev, u32 modify_header_id)
578{
579 u32 in[MLX5_ST_SZ_DW(dealloc_modify_header_context_in)];
580 u32 out[MLX5_ST_SZ_DW(dealloc_modify_header_context_out)];
581
582 memset(in, 0, sizeof(in));
583 MLX5_SET(dealloc_modify_header_context_in, in, opcode,
584 MLX5_CMD_OP_DEALLOC_MODIFY_HEADER_CONTEXT);
585 MLX5_SET(dealloc_modify_header_context_in, in, modify_header_id,
586 modify_header_id);
587
588 mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
589}