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e126ba97 | 1 | /* |
302bdf68 | 2 | * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved. |
e126ba97 EC |
3 | * |
4 | * This software is available to you under a choice of one of two | |
5 | * licenses. You may choose to be licensed under the terms of the GNU | |
6 | * General Public License (GPL) Version 2, available from the file | |
7 | * COPYING in the main directory of this source tree, or the | |
8 | * OpenIB.org BSD license below: | |
9 | * | |
10 | * Redistribution and use in source and binary forms, with or | |
11 | * without modification, are permitted provided that the following | |
12 | * conditions are met: | |
13 | * | |
14 | * - Redistributions of source code must retain the above | |
15 | * copyright notice, this list of conditions and the following | |
16 | * disclaimer. | |
17 | * | |
18 | * - Redistributions in binary form must reproduce the above | |
19 | * copyright notice, this list of conditions and the following | |
20 | * disclaimer in the documentation and/or other materials | |
21 | * provided with the distribution. | |
22 | * | |
23 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
24 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
25 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
26 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
27 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
28 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
29 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
30 | * SOFTWARE. | |
31 | */ | |
32 | ||
33 | #include <linux/kernel.h> | |
34 | #include <linux/module.h> | |
35 | #include <linux/random.h> | |
36 | #include <linux/vmalloc.h> | |
89d44f0a | 37 | #include <linux/hardirq.h> |
e126ba97 EC |
38 | #include <linux/mlx5/driver.h> |
39 | #include <linux/mlx5/cmd.h> | |
40 | #include "mlx5_core.h" | |
41 | ||
42 | enum { | |
43 | MLX5_HEALTH_POLL_INTERVAL = 2 * HZ, | |
44 | MAX_MISSES = 3, | |
45 | }; | |
46 | ||
47 | enum { | |
48 | MLX5_HEALTH_SYNDR_FW_ERR = 0x1, | |
49 | MLX5_HEALTH_SYNDR_IRISC_ERR = 0x7, | |
171bb2c5 | 50 | MLX5_HEALTH_SYNDR_HW_UNRECOVERABLE_ERR = 0x8, |
e126ba97 EC |
51 | MLX5_HEALTH_SYNDR_CRC_ERR = 0x9, |
52 | MLX5_HEALTH_SYNDR_FETCH_PCI_ERR = 0xa, | |
53 | MLX5_HEALTH_SYNDR_HW_FTL_ERR = 0xb, | |
54 | MLX5_HEALTH_SYNDR_ASYNC_EQ_OVERRUN_ERR = 0xc, | |
55 | MLX5_HEALTH_SYNDR_EQ_ERR = 0xd, | |
171bb2c5 | 56 | MLX5_HEALTH_SYNDR_EQ_INV = 0xe, |
e126ba97 | 57 | MLX5_HEALTH_SYNDR_FFSER_ERR = 0xf, |
171bb2c5 | 58 | MLX5_HEALTH_SYNDR_HIGH_TEMP = 0x10 |
e126ba97 EC |
59 | }; |
60 | ||
fd76ee4d EC |
61 | enum { |
62 | MLX5_NIC_IFC_FULL = 0, | |
63 | MLX5_NIC_IFC_DISABLED = 1, | |
04c0c1ab MHY |
64 | MLX5_NIC_IFC_NO_DRAM_NIC = 2, |
65 | MLX5_NIC_IFC_INVALID = 3 | |
fd76ee4d EC |
66 | }; |
67 | ||
05ac2c0b MHY |
68 | enum { |
69 | MLX5_DROP_NEW_HEALTH_WORK, | |
70 | }; | |
71 | ||
04c0c1ab | 72 | static u8 get_nic_state(struct mlx5_core_dev *dev) |
fd76ee4d EC |
73 | { |
74 | return (ioread32be(&dev->iseg->cmdq_addr_l_sz) >> 8) & 3; | |
75 | } | |
76 | ||
89d44f0a MD |
77 | static void trigger_cmd_completions(struct mlx5_core_dev *dev) |
78 | { | |
79 | unsigned long flags; | |
80 | u64 vector; | |
81 | ||
82 | /* wait for pending handlers to complete */ | |
83 | synchronize_irq(dev->priv.msix_arr[MLX5_EQ_VEC_CMD].vector); | |
84 | spin_lock_irqsave(&dev->cmd.alloc_lock, flags); | |
85 | vector = ~dev->cmd.bitmask & ((1ul << (1 << dev->cmd.log_sz)) - 1); | |
86 | if (!vector) | |
87 | goto no_trig; | |
88 | ||
89 | vector |= MLX5_TRIGGERED_CMD_COMP; | |
90 | spin_unlock_irqrestore(&dev->cmd.alloc_lock, flags); | |
91 | ||
92 | mlx5_core_dbg(dev, "vector 0x%llx\n", vector); | |
73dd3a48 | 93 | mlx5_cmd_comp_handler(dev, vector, true); |
89d44f0a MD |
94 | return; |
95 | ||
96 | no_trig: | |
97 | spin_unlock_irqrestore(&dev->cmd.alloc_lock, flags); | |
98 | } | |
99 | ||
fd76ee4d EC |
100 | static int in_fatal(struct mlx5_core_dev *dev) |
101 | { | |
102 | struct mlx5_core_health *health = &dev->priv.health; | |
103 | struct health_buffer __iomem *h = health->health; | |
104 | ||
04c0c1ab | 105 | if (get_nic_state(dev) == MLX5_NIC_IFC_DISABLED) |
fd76ee4d EC |
106 | return 1; |
107 | ||
108 | if (ioread32be(&h->fw_ver) == 0xffffffff) | |
109 | return 1; | |
110 | ||
111 | return 0; | |
112 | } | |
113 | ||
89d44f0a MD |
114 | void mlx5_enter_error_state(struct mlx5_core_dev *dev) |
115 | { | |
c1d4d2e9 | 116 | mutex_lock(&dev->intf_state_mutex); |
89d44f0a | 117 | if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) |
c1d4d2e9 | 118 | goto unlock; |
89d44f0a MD |
119 | |
120 | mlx5_core_err(dev, "start\n"); | |
c1d4d2e9 | 121 | if (pci_channel_offline(dev->pdev) || in_fatal(dev)) { |
89d44f0a | 122 | dev->state = MLX5_DEVICE_STATE_INTERNAL_ERROR; |
c1d4d2e9 MHY |
123 | trigger_cmd_completions(dev); |
124 | } | |
89d44f0a MD |
125 | |
126 | mlx5_core_event(dev, MLX5_DEV_EVENT_SYS_ERROR, 0); | |
127 | mlx5_core_err(dev, "end\n"); | |
c1d4d2e9 MHY |
128 | |
129 | unlock: | |
130 | mutex_unlock(&dev->intf_state_mutex); | |
89d44f0a MD |
131 | } |
132 | ||
133 | static void mlx5_handle_bad_state(struct mlx5_core_dev *dev) | |
134 | { | |
04c0c1ab | 135 | u8 nic_interface = get_nic_state(dev); |
89d44f0a MD |
136 | |
137 | switch (nic_interface) { | |
138 | case MLX5_NIC_IFC_FULL: | |
139 | mlx5_core_warn(dev, "Expected to see disabled NIC but it is full driver\n"); | |
140 | break; | |
141 | ||
142 | case MLX5_NIC_IFC_DISABLED: | |
143 | mlx5_core_warn(dev, "starting teardown\n"); | |
144 | break; | |
145 | ||
146 | case MLX5_NIC_IFC_NO_DRAM_NIC: | |
147 | mlx5_core_warn(dev, "Expected to see disabled NIC but it is no dram nic\n"); | |
148 | break; | |
149 | default: | |
150 | mlx5_core_warn(dev, "Expected to see disabled NIC but it is has invalid value %d\n", | |
151 | nic_interface); | |
152 | } | |
153 | ||
154 | mlx5_disable_device(dev); | |
155 | } | |
156 | ||
04c0c1ab MHY |
157 | static void health_recover(struct work_struct *work) |
158 | { | |
159 | struct mlx5_core_health *health; | |
160 | struct delayed_work *dwork; | |
161 | struct mlx5_core_dev *dev; | |
162 | struct mlx5_priv *priv; | |
163 | u8 nic_state; | |
164 | ||
165 | dwork = container_of(work, struct delayed_work, work); | |
166 | health = container_of(dwork, struct mlx5_core_health, recover_work); | |
167 | priv = container_of(health, struct mlx5_priv, health); | |
168 | dev = container_of(priv, struct mlx5_core_dev, priv); | |
169 | ||
170 | nic_state = get_nic_state(dev); | |
171 | if (nic_state == MLX5_NIC_IFC_INVALID) { | |
172 | dev_err(&dev->pdev->dev, "health recovery flow aborted since the nic state is invalid\n"); | |
173 | return; | |
174 | } | |
175 | ||
176 | dev_err(&dev->pdev->dev, "starting health recovery flow\n"); | |
177 | mlx5_recover_device(dev); | |
178 | } | |
179 | ||
180 | /* How much time to wait until health resetting the driver (in msecs) */ | |
181 | #define MLX5_RECOVERY_DELAY_MSECS 60000 | |
e126ba97 EC |
182 | static void health_care(struct work_struct *work) |
183 | { | |
04c0c1ab | 184 | unsigned long recover_delay = msecs_to_jiffies(MLX5_RECOVERY_DELAY_MSECS); |
ac6ea6e8 | 185 | struct mlx5_core_health *health; |
e126ba97 EC |
186 | struct mlx5_core_dev *dev; |
187 | struct mlx5_priv *priv; | |
e126ba97 | 188 | |
ac6ea6e8 EC |
189 | health = container_of(work, struct mlx5_core_health, work); |
190 | priv = container_of(health, struct mlx5_priv, health); | |
191 | dev = container_of(priv, struct mlx5_core_dev, priv); | |
192 | mlx5_core_warn(dev, "handling bad device here\n"); | |
89d44f0a | 193 | mlx5_handle_bad_state(dev); |
04c0c1ab MHY |
194 | |
195 | spin_lock(&health->wq_lock); | |
196 | if (!test_bit(MLX5_DROP_NEW_HEALTH_WORK, &health->flags)) | |
197 | schedule_delayed_work(&health->recover_work, recover_delay); | |
198 | else | |
199 | dev_err(&dev->pdev->dev, | |
200 | "new health works are not permitted at this stage\n"); | |
201 | spin_unlock(&health->wq_lock); | |
e126ba97 EC |
202 | } |
203 | ||
204 | static const char *hsynd_str(u8 synd) | |
205 | { | |
206 | switch (synd) { | |
207 | case MLX5_HEALTH_SYNDR_FW_ERR: | |
208 | return "firmware internal error"; | |
209 | case MLX5_HEALTH_SYNDR_IRISC_ERR: | |
210 | return "irisc not responding"; | |
171bb2c5 EC |
211 | case MLX5_HEALTH_SYNDR_HW_UNRECOVERABLE_ERR: |
212 | return "unrecoverable hardware error"; | |
e126ba97 EC |
213 | case MLX5_HEALTH_SYNDR_CRC_ERR: |
214 | return "firmware CRC error"; | |
215 | case MLX5_HEALTH_SYNDR_FETCH_PCI_ERR: | |
216 | return "ICM fetch PCI error"; | |
217 | case MLX5_HEALTH_SYNDR_HW_FTL_ERR: | |
218 | return "HW fatal error\n"; | |
219 | case MLX5_HEALTH_SYNDR_ASYNC_EQ_OVERRUN_ERR: | |
220 | return "async EQ buffer overrun"; | |
221 | case MLX5_HEALTH_SYNDR_EQ_ERR: | |
222 | return "EQ error"; | |
171bb2c5 | 223 | case MLX5_HEALTH_SYNDR_EQ_INV: |
c01e0159 | 224 | return "Invalid EQ referenced"; |
e126ba97 EC |
225 | case MLX5_HEALTH_SYNDR_FFSER_ERR: |
226 | return "FFSER error"; | |
171bb2c5 | 227 | case MLX5_HEALTH_SYNDR_HIGH_TEMP: |
c01e0159 | 228 | return "High temperature"; |
e126ba97 EC |
229 | default: |
230 | return "unrecognized error"; | |
231 | } | |
232 | } | |
233 | ||
234 | static void print_health_info(struct mlx5_core_dev *dev) | |
235 | { | |
236 | struct mlx5_core_health *health = &dev->priv.health; | |
237 | struct health_buffer __iomem *h = health->health; | |
0144a95e EC |
238 | char fw_str[18]; |
239 | u32 fw; | |
e126ba97 EC |
240 | int i; |
241 | ||
89d44f0a MD |
242 | /* If the syndrom is 0, the device is OK and no need to print buffer */ |
243 | if (!ioread8(&h->synd)) | |
244 | return; | |
245 | ||
e126ba97 | 246 | for (i = 0; i < ARRAY_SIZE(h->assert_var); i++) |
0144a95e EC |
247 | dev_err(&dev->pdev->dev, "assert_var[%d] 0x%08x\n", i, ioread32be(h->assert_var + i)); |
248 | ||
249 | dev_err(&dev->pdev->dev, "assert_exit_ptr 0x%08x\n", ioread32be(&h->assert_exit_ptr)); | |
250 | dev_err(&dev->pdev->dev, "assert_callra 0x%08x\n", ioread32be(&h->assert_callra)); | |
712bfef6 | 251 | sprintf(fw_str, "%d.%d.%d", fw_rev_maj(dev), fw_rev_min(dev), fw_rev_sub(dev)); |
0144a95e EC |
252 | dev_err(&dev->pdev->dev, "fw_ver %s\n", fw_str); |
253 | dev_err(&dev->pdev->dev, "hw_id 0x%08x\n", ioread32be(&h->hw_id)); | |
254 | dev_err(&dev->pdev->dev, "irisc_index %d\n", ioread8(&h->irisc_index)); | |
255 | dev_err(&dev->pdev->dev, "synd 0x%x: %s\n", ioread8(&h->synd), hsynd_str(ioread8(&h->synd))); | |
256 | dev_err(&dev->pdev->dev, "ext_synd 0x%04x\n", ioread16be(&h->ext_synd)); | |
712bfef6 EC |
257 | fw = ioread32be(&h->fw_ver); |
258 | dev_err(&dev->pdev->dev, "raw fw_ver 0x%08x\n", fw); | |
e126ba97 EC |
259 | } |
260 | ||
fd76ee4d EC |
261 | static unsigned long get_next_poll_jiffies(void) |
262 | { | |
263 | unsigned long next; | |
264 | ||
265 | get_random_bytes(&next, sizeof(next)); | |
266 | next %= HZ; | |
267 | next += jiffies + MLX5_HEALTH_POLL_INTERVAL; | |
268 | ||
269 | return next; | |
270 | } | |
271 | ||
e126ba97 EC |
272 | static void poll_health(unsigned long data) |
273 | { | |
274 | struct mlx5_core_dev *dev = (struct mlx5_core_dev *)data; | |
275 | struct mlx5_core_health *health = &dev->priv.health; | |
e126ba97 EC |
276 | u32 count; |
277 | ||
89d44f0a | 278 | if (dev->state == MLX5_DEVICE_STATE_INTERNAL_ERROR) { |
89d44f0a MD |
279 | mod_timer(&health->timer, get_next_poll_jiffies()); |
280 | return; | |
281 | } | |
282 | ||
e126ba97 EC |
283 | count = ioread32be(health->health_counter); |
284 | if (count == health->prev) | |
285 | ++health->miss_counter; | |
286 | else | |
287 | health->miss_counter = 0; | |
288 | ||
289 | health->prev = count; | |
290 | if (health->miss_counter == MAX_MISSES) { | |
fd76ee4d | 291 | dev_err(&dev->pdev->dev, "device's health compromised - reached miss count\n"); |
e126ba97 | 292 | print_health_info(dev); |
e126ba97 | 293 | } else { |
fd76ee4d EC |
294 | mod_timer(&health->timer, get_next_poll_jiffies()); |
295 | } | |
296 | ||
297 | if (in_fatal(dev) && !health->sick) { | |
298 | health->sick = true; | |
299 | print_health_info(dev); | |
05ac2c0b MHY |
300 | spin_lock(&health->wq_lock); |
301 | if (!test_bit(MLX5_DROP_NEW_HEALTH_WORK, &health->flags)) | |
302 | queue_work(health->wq, &health->work); | |
303 | else | |
304 | dev_err(&dev->pdev->dev, | |
305 | "new health works are not permitted at this stage\n"); | |
306 | spin_unlock(&health->wq_lock); | |
e126ba97 EC |
307 | } |
308 | } | |
309 | ||
310 | void mlx5_start_health_poll(struct mlx5_core_dev *dev) | |
311 | { | |
312 | struct mlx5_core_health *health = &dev->priv.health; | |
313 | ||
e126ba97 | 314 | init_timer(&health->timer); |
2241007b | 315 | health->sick = 0; |
05ac2c0b | 316 | clear_bit(MLX5_DROP_NEW_HEALTH_WORK, &health->flags); |
e126ba97 EC |
317 | health->health = &dev->iseg->health; |
318 | health->health_counter = &dev->iseg->health_counter; | |
319 | ||
320 | health->timer.data = (unsigned long)dev; | |
321 | health->timer.function = poll_health; | |
322 | health->timer.expires = round_jiffies(jiffies + MLX5_HEALTH_POLL_INTERVAL); | |
323 | add_timer(&health->timer); | |
324 | } | |
325 | ||
326 | void mlx5_stop_health_poll(struct mlx5_core_dev *dev) | |
327 | { | |
328 | struct mlx5_core_health *health = &dev->priv.health; | |
329 | ||
330 | del_timer_sync(&health->timer); | |
e126ba97 EC |
331 | } |
332 | ||
05ac2c0b MHY |
333 | void mlx5_drain_health_wq(struct mlx5_core_dev *dev) |
334 | { | |
335 | struct mlx5_core_health *health = &dev->priv.health; | |
336 | ||
337 | spin_lock(&health->wq_lock); | |
338 | set_bit(MLX5_DROP_NEW_HEALTH_WORK, &health->flags); | |
339 | spin_unlock(&health->wq_lock); | |
04c0c1ab | 340 | cancel_delayed_work_sync(&health->recover_work); |
05ac2c0b MHY |
341 | cancel_work_sync(&health->work); |
342 | } | |
343 | ||
ac6ea6e8 | 344 | void mlx5_health_cleanup(struct mlx5_core_dev *dev) |
e126ba97 | 345 | { |
ac6ea6e8 EC |
346 | struct mlx5_core_health *health = &dev->priv.health; |
347 | ||
05ac2c0b | 348 | destroy_workqueue(health->wq); |
e126ba97 EC |
349 | } |
350 | ||
ac6ea6e8 | 351 | int mlx5_health_init(struct mlx5_core_dev *dev) |
e126ba97 | 352 | { |
ac6ea6e8 EC |
353 | struct mlx5_core_health *health; |
354 | char *name; | |
355 | ||
356 | health = &dev->priv.health; | |
357 | name = kmalloc(64, GFP_KERNEL); | |
358 | if (!name) | |
359 | return -ENOMEM; | |
360 | ||
361 | strcpy(name, "mlx5_health"); | |
362 | strcat(name, dev_name(&dev->pdev->dev)); | |
05ac2c0b | 363 | health->wq = create_singlethread_workqueue(name); |
ac6ea6e8 | 364 | kfree(name); |
05ac2c0b MHY |
365 | if (!health->wq) |
366 | return -ENOMEM; | |
367 | spin_lock_init(&health->wq_lock); | |
ac6ea6e8 | 368 | INIT_WORK(&health->work, health_care); |
04c0c1ab | 369 | INIT_DELAYED_WORK(&health->recover_work, health_recover); |
ac6ea6e8 EC |
370 | |
371 | return 0; | |
e126ba97 | 372 | } |