[mirror_ubuntu-hirsute-kernel.git] / drivers / net / ethernet / mellanox / mlxsw / core.h

/*
 * drivers/net/ethernet/mellanox/mlxsw/core.h
 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the names of the copyright holders nor the names of its
 *    contributors may be used to endorse or promote products derived from
 *    this software without specific prior written permission.
 *
 * Alternatively, this software may be distributed under the terms of the
 * GNU General Public License ("GPL") version 2 as published by the Free
 * Software Foundation.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 * POSSIBILITY OF SUCH DAMAGE.
 */

#ifndef _MLXSW_CORE_H
#define _MLXSW_CORE_H

#include <linux/module.h>
#include <linux/device.h>
#include <linux/slab.h>
#include <linux/gfp.h>
#include <linux/types.h>
#include <linux/skbuff.h>
#include <linux/workqueue.h>
#include <net/devlink.h>

#include "trap.h"
#include "reg.h"

#include "cmd.h"

#define MLXSW_MODULE_ALIAS_PREFIX "mlxsw-driver-"
#define MODULE_MLXSW_DRIVER_ALIAS(kind)	\
	MODULE_ALIAS(MLXSW_MODULE_ALIAS_PREFIX kind)

#define MLXSW_DEVICE_KIND_SWITCHX2 "switchx2"
#define MLXSW_DEVICE_KIND_SPECTRUM "spectrum"

struct mlxsw_core;
struct mlxsw_driver;
struct mlxsw_bus;
struct mlxsw_bus_info;

void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core);

int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver);
void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver);

int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
				   const struct mlxsw_bus *mlxsw_bus,
				   void *bus_priv);
void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core);

struct mlxsw_tx_info {
	u8 local_port;
	bool is_emad;
};

bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
				  const struct mlxsw_tx_info *tx_info);
int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
			    const struct mlxsw_tx_info *tx_info);

struct mlxsw_rx_listener {
	void (*func)(struct sk_buff *skb, u8 local_port, void *priv);
	u8 local_port;
	u16 trap_id;
};

struct mlxsw_event_listener {
	void (*func)(const struct mlxsw_reg_info *reg,
		     char *payload, void *priv);
	enum mlxsw_event_trap_id trap_id;
};

int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
				    const struct mlxsw_rx_listener *rxl,
				    void *priv);
void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
				       const struct mlxsw_rx_listener *rxl,
				       void *priv);

int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
				       const struct mlxsw_event_listener *el,
				       void *priv);
void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
					  const struct mlxsw_event_listener *el,
					  void *priv);

typedef void mlxsw_reg_trans_cb_t(struct mlxsw_core *mlxsw_core, char *payload,
				  size_t payload_len, unsigned long cb_priv);

int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core,
			  const struct mlxsw_reg_info *reg, char *payload,
			  struct list_head *bulk_list,
			  mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core,
			  const struct mlxsw_reg_info *reg, char *payload,
			  struct list_head *bulk_list,
			  mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list);

int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
		    const struct mlxsw_reg_info *reg, char *payload);
int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
		    const struct mlxsw_reg_info *reg, char *payload);

struct mlxsw_rx_info {
	bool is_lag;
	union {
		u16 sys_port;
		u16 lag_id;
	} u;
	u8 lag_port_index;
	int trap_id;
};

void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
			    struct mlxsw_rx_info *rx_info);

void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
				u16 lag_id, u8 port_index, u8 local_port);
u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
			      u16 lag_id, u8 port_index);
void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
				  u16 lag_id, u8 local_port);

struct mlxsw_core_port {
	struct devlink_port devlink_port;
};

static inline void *
mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port)
{
	/* mlxsw_core_port is ensured to always be the first field in driver
	 * port structure.
	 */
	return mlxsw_core_port;
}

int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core,
			 struct mlxsw_core_port *mlxsw_core_port, u8 local_port,
			 struct net_device *dev, bool split, u32 split_group);
void mlxsw_core_port_fini(struct mlxsw_core_port *mlxsw_core_port);

int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay);

#define MLXSW_CONFIG_PROFILE_SWID_COUNT 8

struct mlxsw_swid_config {
	u8	used_type:1,
		used_properties:1;
	u8	type;
	u8	properties;
};

struct mlxsw_config_profile {
	u16	used_max_vepa_channels:1,
		used_max_lag:1,
		used_max_port_per_lag:1,
		used_max_mid:1,
		used_max_pgt:1,
		used_max_system_port:1,
		used_max_vlan_groups:1,
		used_max_regions:1,
		used_flood_tables:1,
		used_flood_mode:1,
		used_max_ib_mc:1,
		used_max_pkey:1,
		used_ar_sec:1,
		used_adaptive_routing_group_cap:1;
	u8	max_vepa_channels;
	u16	max_lag;
	u16	max_port_per_lag;
	u16	max_mid;
	u16	max_pgt;
	u16	max_system_port;
	u16	max_vlan_groups;
	u16	max_regions;
	u8	max_flood_tables;
	u8	max_vid_flood_tables;
	u8	flood_mode;
	u8	max_fid_offset_flood_tables;
	u16	fid_offset_flood_table_size;
	u8	max_fid_flood_tables;
	u16	fid_flood_table_size;
	u16	max_ib_mc;
	u16	max_pkey;
	u8	ar_sec;
	u16	adaptive_routing_group_cap;
	u8	arn;
	struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT];
};

struct mlxsw_driver {
	struct list_head list;
	const char *kind;
	struct module *owner;
	size_t priv_size;
	int (*init)(struct mlxsw_core *mlxsw_core,
		    const struct mlxsw_bus_info *mlxsw_bus_info);
	void (*fini)(struct mlxsw_core *mlxsw_core);
	int (*port_split)(struct mlxsw_core *mlxsw_core, u8 local_port,
			  unsigned int count);
	int (*port_unsplit)(struct mlxsw_core *mlxsw_core, u8 local_port);
	int (*sb_pool_get)(struct mlxsw_core *mlxsw_core,
			   unsigned int sb_index, u16 pool_index,
			   struct devlink_sb_pool_info *pool_info);
	int (*sb_pool_set)(struct mlxsw_core *mlxsw_core,
			   unsigned int sb_index, u16 pool_index, u32 size,
			   enum devlink_sb_threshold_type threshold_type);
	int (*sb_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port,
				unsigned int sb_index, u16 pool_index,
				u32 *p_threshold);
	int (*sb_port_pool_set)(struct mlxsw_core_port *mlxsw_core_port,
				unsigned int sb_index, u16 pool_index,
				u32 threshold);
	int (*sb_tc_pool_bind_get)(struct mlxsw_core_port *mlxsw_core_port,
				   unsigned int sb_index, u16 tc_index,
				   enum devlink_sb_pool_type pool_type,
				   u16 *p_pool_index, u32 *p_threshold);
	int (*sb_tc_pool_bind_set)(struct mlxsw_core_port *mlxsw_core_port,
				   unsigned int sb_index, u16 tc_index,
				   enum devlink_sb_pool_type pool_type,
				   u16 pool_index, u32 threshold);
	int (*sb_occ_snapshot)(struct mlxsw_core *mlxsw_core,
			       unsigned int sb_index);
	int (*sb_occ_max_clear)(struct mlxsw_core *mlxsw_core,
				unsigned int sb_index);
	int (*sb_occ_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port,
				    unsigned int sb_index, u16 pool_index,
				    u32 *p_cur, u32 *p_max);
	int (*sb_occ_tc_port_bind_get)(struct mlxsw_core_port *mlxsw_core_port,
				       unsigned int sb_index, u16 tc_index,
				       enum devlink_sb_pool_type pool_type,
				       u32 *p_cur, u32 *p_max);
	void (*txhdr_construct)(struct sk_buff *skb,
				const struct mlxsw_tx_info *tx_info);
	u8 txhdr_len;
	const struct mlxsw_config_profile *profile;
};

struct mlxsw_bus {
	const char *kind;
	int (*init)(void *bus_priv, struct mlxsw_core *mlxsw_core,
		    const struct mlxsw_config_profile *profile);
	void (*fini)(void *bus_priv);
	bool (*skb_transmit_busy)(void *bus_priv,
				  const struct mlxsw_tx_info *tx_info);
	int (*skb_transmit)(void *bus_priv, struct sk_buff *skb,
			    const struct mlxsw_tx_info *tx_info);
	int (*cmd_exec)(void *bus_priv, u16 opcode, u8 opcode_mod,
			u32 in_mod, bool out_mbox_direct,
			char *in_mbox, size_t in_mbox_size,
			char *out_mbox, size_t out_mbox_size,
			u8 *p_status);
};

struct mlxsw_bus_info {
	const char *device_kind;
	const char *device_name;
	struct device *dev;
	struct {
		u16 major;
		u16 minor;
		u16 subminor;
	} fw_rev;
	u8 vsd[MLXSW_CMD_BOARDINFO_VSD_LEN];
	u8 psid[MLXSW_CMD_BOARDINFO_PSID_LEN];
};

struct mlxsw_hwmon;

#ifdef CONFIG_MLXSW_CORE_HWMON

int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
		     const struct mlxsw_bus_info *mlxsw_bus_info,
		     struct mlxsw_hwmon **p_hwmon);
void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon);

#else

static inline int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
				   const struct mlxsw_bus_info *mlxsw_bus_info,
				   struct mlxsw_hwmon **p_hwmon)
{
	return 0;
}

#endif

#endif
Commit	Line	Data
93c1edb2 JP	1	/*
	2	* drivers/net/ethernet/mellanox/mlxsw/core.h
	3	* Copyright (c) 2015 Mellanox Technologies. All rights reserved.
	4	* Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
	5	* Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
	6	* Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
	7	*
	8	* Redistribution and use in source and binary forms, with or without
	9	* modification, are permitted provided that the following conditions are met:
	10	*
	11	* 1. Redistributions of source code must retain the above copyright
	12	* notice, this list of conditions and the following disclaimer.
	13	* 2. Redistributions in binary form must reproduce the above copyright
	14	* notice, this list of conditions and the following disclaimer in the
	15	* documentation and/or other materials provided with the distribution.
	16	* 3. Neither the names of the copyright holders nor the names of its
	17	* contributors may be used to endorse or promote products derived from
	18	* this software without specific prior written permission.
	19	*
	20	* Alternatively, this software may be distributed under the terms of the
	21	* GNU General Public License ("GPL") version 2 as published by the Free
	22	* Software Foundation.
	23	*
	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
	27	* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
	28	* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
	29	* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
	30	* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
	31	* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
	32	* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
	33	* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
	34	* POSSIBILITY OF SUCH DAMAGE.
	35	*/
	36
	37	#ifndef _MLXSW_CORE_H
	38	#define _MLXSW_CORE_H
	39
	40	#include <linux/module.h>
	41	#include <linux/device.h>
	42	#include <linux/slab.h>
	43	#include <linux/gfp.h>
	44	#include <linux/types.h>
	45	#include <linux/skbuff.h>
dd9bdb04	46	#include <linux/workqueue.h>
932762b6	47	#include <net/devlink.h>
93c1edb2	48
4ec14b76 IS	49	#include "trap.h"
	50	#include "reg.h"
	51
93c1edb2 JP	52	#include "cmd.h"
	53
	54	#define MLXSW_MODULE_ALIAS_PREFIX "mlxsw-driver-"
	55	#define MODULE_MLXSW_DRIVER_ALIAS(kind) \
	56	MODULE_ALIAS(MLXSW_MODULE_ALIAS_PREFIX kind)
	57
31557f0f	58	#define MLXSW_DEVICE_KIND_SWITCHX2 "switchx2"
56ade8fe	59	#define MLXSW_DEVICE_KIND_SPECTRUM "spectrum"
31557f0f	60
93c1edb2 JP	61	struct mlxsw_core;
	62	struct mlxsw_driver;
	63	struct mlxsw_bus;
	64	struct mlxsw_bus_info;
	65
b2f10571 JP	66	void mlxsw_core_driver_priv(struct mlxsw_core mlxsw_core);
b2f10571 JP	67
93c1edb2 JP	68	int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver);
	69	void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver);
	70
	71	int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
	72	const struct mlxsw_bus *mlxsw_bus,
	73	void *bus_priv);
	74	void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core);
	75
	76	struct mlxsw_tx_info {
	77	u8 local_port;
	78	bool is_emad;
	79	};
	80
307c2431	81	bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
d003462a	82	const struct mlxsw_tx_info *tx_info);
307c2431	83	int mlxsw_core_skb_transmit(struct mlxsw_core mlxsw_core, struct sk_buff skb,
93c1edb2 JP	84	const struct mlxsw_tx_info *tx_info);
	85
	86	struct mlxsw_rx_listener {
	87	void (func)(struct sk_buff skb, u8 local_port, void *priv);
	88	u8 local_port;
	89	u16 trap_id;
	90	};
	91
4ec14b76 IS	92	struct mlxsw_event_listener {
	93	void (func)(const struct mlxsw_reg_info reg,
	94	char payload, void priv);
	95	enum mlxsw_event_trap_id trap_id;
	96	};
	97
93c1edb2 JP	98	int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
	99	const struct mlxsw_rx_listener *rxl,
	100	void *priv);
	101	void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
	102	const struct mlxsw_rx_listener *rxl,
	103	void *priv);
	104
4ec14b76 IS	105	int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
	106	const struct mlxsw_event_listener *el,
	107	void *priv);
	108	void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
	109	const struct mlxsw_event_listener *el,
	110	void *priv);
	111
caf7297e JP	112	typedef void mlxsw_reg_trans_cb_t(struct mlxsw_core mlxsw_core, char payload,
	113	size_t payload_len, unsigned long cb_priv);
	114
	115	int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core,
	116	const struct mlxsw_reg_info reg, char payload,
	117	struct list_head *bulk_list,
	118	mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
	119	int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core,
	120	const struct mlxsw_reg_info reg, char payload,
	121	struct list_head *bulk_list,
	122	mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
	123	int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list);
	124
4ec14b76 IS	125	int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
	126	const struct mlxsw_reg_info reg, char payload);
	127	int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
	128	const struct mlxsw_reg_info reg, char payload);
	129
93c1edb2	130	struct mlxsw_rx_info {
8060646a JP	131	bool is_lag;
	132	union {
	133	u16 sys_port;
	134	u16 lag_id;
	135	} u;
	136	u8 lag_port_index;
93c1edb2 JP	137	int trap_id;
	138	};
	139
	140	void mlxsw_core_skb_receive(struct mlxsw_core mlxsw_core, struct sk_buff skb,
	141	struct mlxsw_rx_info *rx_info);
	142
8060646a JP	143	void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
	144	u16 lag_id, u8 port_index, u8 local_port);
	145	u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
	146	u16 lag_id, u8 port_index);
	147	void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
	148	u16 lag_id, u8 local_port);
	149
932762b6 JP	150	struct mlxsw_core_port {
	151	struct devlink_port devlink_port;
	152	};
	153
325f2f19 JP	154	static inline void *
	155	mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port)
	156	{
	157	/* mlxsw_core_port is ensured to always be the first field in driver
	158	* port structure.
	159	*/
	160	return mlxsw_core_port;
	161	}
	162
932762b6 JP	163	int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core,
	164	struct mlxsw_core_port *mlxsw_core_port, u8 local_port,
	165	struct net_device *dev, bool split, u32 split_group);
	166	void mlxsw_core_port_fini(struct mlxsw_core_port *mlxsw_core_port);
	167
dd9bdb04 JP	168	int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay);
dd9bdb04 JP	169
93c1edb2 JP	170	#define MLXSW_CONFIG_PROFILE_SWID_COUNT 8
	171
	172	struct mlxsw_swid_config {
	173	u8 used_type:1,
	174	used_properties:1;
	175	u8 type;
	176	u8 properties;
	177	};
	178
	179	struct mlxsw_config_profile {
	180	u16 used_max_vepa_channels:1,
	181	used_max_lag:1,
	182	used_max_port_per_lag:1,
	183	used_max_mid:1,
	184	used_max_pgt:1,
	185	used_max_system_port:1,
	186	used_max_vlan_groups:1,
	187	used_max_regions:1,
	188	used_flood_tables:1,
	189	used_flood_mode:1,
	190	used_max_ib_mc:1,
	191	used_max_pkey:1,
	192	used_ar_sec:1,
	193	used_adaptive_routing_group_cap:1;
	194	u8 max_vepa_channels;
	195	u16 max_lag;
	196	u16 max_port_per_lag;
	197	u16 max_mid;
	198	u16 max_pgt;
	199	u16 max_system_port;
	200	u16 max_vlan_groups;
	201	u16 max_regions;
	202	u8 max_flood_tables;
	203	u8 max_vid_flood_tables;
	204	u8 flood_mode;
12fd35ab IS	205	u8 max_fid_offset_flood_tables;
12fd35ab IS	206	u16 fid_offset_flood_table_size;
453b6a8d IS	207	u8 max_fid_flood_tables;
453b6a8d IS	208	u16 fid_flood_table_size;
93c1edb2 JP	209	u16 max_ib_mc;
	210	u16 max_pkey;
	211	u8 ar_sec;
	212	u16 adaptive_routing_group_cap;
	213	u8 arn;
	214	struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT];
	215	};
	216
	217	struct mlxsw_driver {
	218	struct list_head list;
	219	const char *kind;
	220	struct module *owner;
	221	size_t priv_size;
b2f10571	222	int (init)(struct mlxsw_core mlxsw_core,
93c1edb2	223	const struct mlxsw_bus_info *mlxsw_bus_info);
b2f10571 JP	224	void (fini)(struct mlxsw_core mlxsw_core);
	225	int (port_split)(struct mlxsw_core mlxsw_core, u8 local_port,
	226	unsigned int count);
	227	int (port_unsplit)(struct mlxsw_core mlxsw_core, u8 local_port);
a6179bf0 JP	228	int (sb_pool_get)(struct mlxsw_core mlxsw_core,
	229	unsigned int sb_index, u16 pool_index,
	230	struct devlink_sb_pool_info *pool_info);
	231	int (sb_pool_set)(struct mlxsw_core mlxsw_core,
	232	unsigned int sb_index, u16 pool_index, u32 size,
	233	enum devlink_sb_threshold_type threshold_type);
	234	int (sb_port_pool_get)(struct mlxsw_core_port mlxsw_core_port,
	235	unsigned int sb_index, u16 pool_index,
	236	u32 *p_threshold);
	237	int (sb_port_pool_set)(struct mlxsw_core_port mlxsw_core_port,
	238	unsigned int sb_index, u16 pool_index,
	239	u32 threshold);
	240	int (sb_tc_pool_bind_get)(struct mlxsw_core_port mlxsw_core_port,
	241	unsigned int sb_index, u16 tc_index,
	242	enum devlink_sb_pool_type pool_type,
	243	u16 p_pool_index, u32 p_threshold);
	244	int (sb_tc_pool_bind_set)(struct mlxsw_core_port mlxsw_core_port,
	245	unsigned int sb_index, u16 tc_index,
	246	enum devlink_sb_pool_type pool_type,
	247	u16 pool_index, u32 threshold);
1ceecc88 JP	248	int (sb_occ_snapshot)(struct mlxsw_core mlxsw_core,
	249	unsigned int sb_index);
	250	int (sb_occ_max_clear)(struct mlxsw_core mlxsw_core,
	251	unsigned int sb_index);
	252	int (sb_occ_port_pool_get)(struct mlxsw_core_port mlxsw_core_port,
	253	unsigned int sb_index, u16 pool_index,
	254	u32 p_cur, u32 p_max);
	255	int (sb_occ_tc_port_bind_get)(struct mlxsw_core_port mlxsw_core_port,
	256	unsigned int sb_index, u16 tc_index,
	257	enum devlink_sb_pool_type pool_type,
	258	u32 p_cur, u32 p_max);
93c1edb2 JP	259	void (txhdr_construct)(struct sk_buff skb,
	260	const struct mlxsw_tx_info *tx_info);
	261	u8 txhdr_len;
	262	const struct mlxsw_config_profile *profile;
	263	};
	264
	265	struct mlxsw_bus {
	266	const char *kind;
	267	int (init)(void bus_priv, struct mlxsw_core *mlxsw_core,
	268	const struct mlxsw_config_profile *profile);
	269	void (fini)(void bus_priv);
d003462a IS	270	bool (skb_transmit_busy)(void bus_priv,
d003462a IS	271	const struct mlxsw_tx_info *tx_info);
93c1edb2 JP	272	int (skb_transmit)(void bus_priv, struct sk_buff *skb,
	273	const struct mlxsw_tx_info *tx_info);
	274	int (cmd_exec)(void bus_priv, u16 opcode, u8 opcode_mod,
	275	u32 in_mod, bool out_mbox_direct,
	276	char *in_mbox, size_t in_mbox_size,
	277	char *out_mbox, size_t out_mbox_size,
	278	u8 *p_status);
	279	};
	280
	281	struct mlxsw_bus_info {
	282	const char *device_kind;
	283	const char *device_name;
	284	struct device *dev;
	285	struct {
	286	u16 major;
	287	u16 minor;
	288	u16 subminor;
	289	} fw_rev;
	290	u8 vsd[MLXSW_CMD_BOARDINFO_VSD_LEN];
	291	u8 psid[MLXSW_CMD_BOARDINFO_PSID_LEN];
	292	};
	293
89309da3 JP	294	struct mlxsw_hwmon;
	295
	296	#ifdef CONFIG_MLXSW_CORE_HWMON
	297
	298	int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
	299	const struct mlxsw_bus_info *mlxsw_bus_info,
	300	struct mlxsw_hwmon **p_hwmon);
	301	void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon);
	302
	303	#else
	304
	305	static inline int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
	306	const struct mlxsw_bus_info *mlxsw_bus_info,
	307	struct mlxsw_hwmon **p_hwmon)
	308	{
	309	return 0;
	310	}
	311
89309da3 JP	312	#endif
89309da3 JP	313
93c1edb2	314	#endif