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mlxsw: spectrum: Unsplit the vFID range
[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / mellanox / mlxsw / spectrum_switchdev.c
CommitLineData
56ade8fe
JP
1/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/types.h>
39#include <linux/netdevice.h>
40#include <linux/etherdevice.h>
41#include <linux/slab.h>
42#include <linux/device.h>
43#include <linux/skbuff.h>
44#include <linux/if_vlan.h>
45#include <linux/if_bridge.h>
46#include <linux/workqueue.h>
47#include <linux/jiffies.h>
4f2c6ae5 48#include <linux/rtnetlink.h>
56ade8fe
JP
49#include <net/switchdev.h>
50
51#include "spectrum.h"
52#include "core.h"
53#include "reg.h"
54
e4b6f693
ER
55static u16 mlxsw_sp_port_vid_to_fid_get(struct mlxsw_sp_port *mlxsw_sp_port,
56 u16 vid)
57{
56918b6b 58 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_port);
e4b6f693
ER
59 u16 fid = vid;
60
56918b6b 61 fid = f ? f->fid : fid;
e4b6f693
ER
62
63 if (!fid)
64 fid = mlxsw_sp_port->pvid;
65
66 return fid;
67}
68
54a73201
IS
69static struct mlxsw_sp_port *
70mlxsw_sp_port_orig_get(struct net_device *dev,
71 struct mlxsw_sp_port *mlxsw_sp_port)
72{
73 struct mlxsw_sp_port *mlxsw_sp_vport;
74 u16 vid;
75
76 if (!is_vlan_dev(dev))
77 return mlxsw_sp_port;
78
79 vid = vlan_dev_vlan_id(dev);
80 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid);
81 WARN_ON(!mlxsw_sp_vport);
82
83 return mlxsw_sp_vport;
84}
85
56ade8fe
JP
86static int mlxsw_sp_port_attr_get(struct net_device *dev,
87 struct switchdev_attr *attr)
88{
89 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
90 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
91
54a73201
IS
92 mlxsw_sp_port = mlxsw_sp_port_orig_get(attr->orig_dev, mlxsw_sp_port);
93 if (!mlxsw_sp_port)
94 return -EINVAL;
95
56ade8fe
JP
96 switch (attr->id) {
97 case SWITCHDEV_ATTR_ID_PORT_PARENT_ID:
98 attr->u.ppid.id_len = sizeof(mlxsw_sp->base_mac);
99 memcpy(&attr->u.ppid.id, &mlxsw_sp->base_mac,
100 attr->u.ppid.id_len);
101 break;
102 case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS:
103 attr->u.brport_flags =
104 (mlxsw_sp_port->learning ? BR_LEARNING : 0) |
0293038e
IS
105 (mlxsw_sp_port->learning_sync ? BR_LEARNING_SYNC : 0) |
106 (mlxsw_sp_port->uc_flood ? BR_FLOOD : 0);
56ade8fe
JP
107 break;
108 default:
109 return -EOPNOTSUPP;
110 }
111
112 return 0;
113}
114
115static int mlxsw_sp_port_stp_state_set(struct mlxsw_sp_port *mlxsw_sp_port,
116 u8 state)
117{
118 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
119 enum mlxsw_reg_spms_state spms_state;
120 char *spms_pl;
121 u16 vid;
122 int err;
123
124 switch (state) {
56ade8fe
JP
125 case BR_STATE_FORWARDING:
126 spms_state = MLXSW_REG_SPMS_STATE_FORWARDING;
127 break;
56ade8fe
JP
128 case BR_STATE_LEARNING:
129 spms_state = MLXSW_REG_SPMS_STATE_LEARNING;
130 break;
45491133 131 case BR_STATE_LISTENING: /* fall-through */
9cb026eb 132 case BR_STATE_DISABLED: /* fall-through */
56ade8fe
JP
133 case BR_STATE_BLOCKING:
134 spms_state = MLXSW_REG_SPMS_STATE_DISCARDING;
135 break;
136 default:
137 BUG();
138 }
139
140 spms_pl = kmalloc(MLXSW_REG_SPMS_LEN, GFP_KERNEL);
141 if (!spms_pl)
142 return -ENOMEM;
143 mlxsw_reg_spms_pack(spms_pl, mlxsw_sp_port->local_port);
54a73201
IS
144
145 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
146 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
56ade8fe 147 mlxsw_reg_spms_vid_pack(spms_pl, vid, spms_state);
54a73201
IS
148 } else {
149 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID)
150 mlxsw_reg_spms_vid_pack(spms_pl, vid, spms_state);
151 }
56ade8fe
JP
152
153 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl);
154 kfree(spms_pl);
155 return err;
156}
157
158static int mlxsw_sp_port_attr_stp_state_set(struct mlxsw_sp_port *mlxsw_sp_port,
159 struct switchdev_trans *trans,
160 u8 state)
161{
162 if (switchdev_trans_ph_prepare(trans))
163 return 0;
164
165 mlxsw_sp_port->stp_state = state;
166 return mlxsw_sp_port_stp_state_set(mlxsw_sp_port, state);
167}
168
0293038e 169static int __mlxsw_sp_port_flood_set(struct mlxsw_sp_port *mlxsw_sp_port,
c06a94ef 170 u16 idx_begin, u16 idx_end, bool set,
0293038e
IS
171 bool only_uc)
172{
173 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
7f71eb46
IS
174 u16 local_port = mlxsw_sp_port->local_port;
175 enum mlxsw_flood_table_type table_type;
c06a94ef 176 u16 range = idx_end - idx_begin + 1;
0293038e
IS
177 char *sftr_pl;
178 int err;
179
99724c18 180 if (mlxsw_sp_port_is_vport(mlxsw_sp_port))
7f71eb46 181 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
99724c18 182 else
7f71eb46 183 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
7f71eb46 184
0293038e
IS
185 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
186 if (!sftr_pl)
187 return -ENOMEM;
188
c06a94ef 189 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_UC, idx_begin,
7f71eb46 190 table_type, range, local_port, set);
0293038e
IS
191 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
192 if (err)
193 goto buffer_out;
194
195 /* Flooding control allows one to decide whether a given port will
196 * flood unicast traffic for which there is no FDB entry.
197 */
198 if (only_uc)
199 goto buffer_out;
200
c06a94ef 201 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, idx_begin,
7f71eb46 202 table_type, range, local_port, set);
0293038e 203 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
28892865
IS
204 if (err)
205 goto err_flood_bm_set;
206 else
207 goto buffer_out;
0293038e 208
28892865
IS
209err_flood_bm_set:
210 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_UC, idx_begin,
211 table_type, range, local_port, !set);
212 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
0293038e
IS
213buffer_out:
214 kfree(sftr_pl);
215 return err;
216}
217
218static int mlxsw_sp_port_uc_flood_set(struct mlxsw_sp_port *mlxsw_sp_port,
219 bool set)
220{
221 struct net_device *dev = mlxsw_sp_port->dev;
222 u16 vid, last_visited_vid;
223 int err;
224
54a73201 225 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
41b996cc
IS
226 u16 fid = mlxsw_sp_vport_fid_get(mlxsw_sp_port)->fid;
227 u16 vfid = mlxsw_sp_fid_to_vfid(fid);
54a73201
IS
228
229 return __mlxsw_sp_port_flood_set(mlxsw_sp_port, vfid, vfid,
230 set, true);
231 }
232
0293038e
IS
233 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
234 err = __mlxsw_sp_port_flood_set(mlxsw_sp_port, vid, vid, set,
235 true);
236 if (err) {
237 last_visited_vid = vid;
238 goto err_port_flood_set;
239 }
240 }
241
242 return 0;
243
244err_port_flood_set:
245 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
246 __mlxsw_sp_port_flood_set(mlxsw_sp_port, vid, vid, !set, true);
247 netdev_err(dev, "Failed to configure unicast flooding\n");
248 return err;
249}
250
e6060027 251int mlxsw_sp_vport_flood_set(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid,
47a0a9e6 252 bool set)
7f71eb46 253{
e6060027
IS
254 u16 vfid;
255
7f71eb46
IS
256 /* In case of vFIDs, index into the flooding table is relative to
257 * the start of the vFIDs range.
258 */
e6060027 259 vfid = mlxsw_sp_fid_to_vfid(fid);
19ae6124 260 return __mlxsw_sp_port_flood_set(mlxsw_sp_vport, vfid, vfid, set,
47a0a9e6 261 false);
7f71eb46
IS
262}
263
56ade8fe
JP
264static int mlxsw_sp_port_attr_br_flags_set(struct mlxsw_sp_port *mlxsw_sp_port,
265 struct switchdev_trans *trans,
266 unsigned long brport_flags)
267{
0293038e
IS
268 unsigned long uc_flood = mlxsw_sp_port->uc_flood ? BR_FLOOD : 0;
269 bool set;
270 int err;
271
6c72a3d0
IS
272 if (!mlxsw_sp_port->bridged)
273 return -EINVAL;
274
56ade8fe
JP
275 if (switchdev_trans_ph_prepare(trans))
276 return 0;
277
0293038e
IS
278 if ((uc_flood ^ brport_flags) & BR_FLOOD) {
279 set = mlxsw_sp_port->uc_flood ? false : true;
280 err = mlxsw_sp_port_uc_flood_set(mlxsw_sp_port, set);
281 if (err)
282 return err;
283 }
284
285 mlxsw_sp_port->uc_flood = brport_flags & BR_FLOOD ? 1 : 0;
56ade8fe
JP
286 mlxsw_sp_port->learning = brport_flags & BR_LEARNING ? 1 : 0;
287 mlxsw_sp_port->learning_sync = brport_flags & BR_LEARNING_SYNC ? 1 : 0;
0293038e 288
56ade8fe
JP
289 return 0;
290}
291
292static int mlxsw_sp_ageing_set(struct mlxsw_sp *mlxsw_sp, u32 ageing_time)
293{
294 char sfdat_pl[MLXSW_REG_SFDAT_LEN];
295 int err;
296
297 mlxsw_reg_sfdat_pack(sfdat_pl, ageing_time);
298 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdat), sfdat_pl);
299 if (err)
300 return err;
301 mlxsw_sp->ageing_time = ageing_time;
302 return 0;
303}
304
305static int mlxsw_sp_port_attr_br_ageing_set(struct mlxsw_sp_port *mlxsw_sp_port,
306 struct switchdev_trans *trans,
135f9ece 307 unsigned long ageing_clock_t)
56ade8fe
JP
308{
309 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
135f9ece 310 unsigned long ageing_jiffies = clock_t_to_jiffies(ageing_clock_t);
56ade8fe
JP
311 u32 ageing_time = jiffies_to_msecs(ageing_jiffies) / 1000;
312
869f63a4
IS
313 if (switchdev_trans_ph_prepare(trans)) {
314 if (ageing_time < MLXSW_SP_MIN_AGEING_TIME ||
315 ageing_time > MLXSW_SP_MAX_AGEING_TIME)
316 return -ERANGE;
317 else
318 return 0;
319 }
56ade8fe
JP
320
321 return mlxsw_sp_ageing_set(mlxsw_sp, ageing_time);
322}
323
26a4ea0f
ER
324static int mlxsw_sp_port_attr_br_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port,
325 struct switchdev_trans *trans,
326 struct net_device *orig_dev,
327 bool vlan_enabled)
328{
329 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
330
331 /* SWITCHDEV_TRANS_PREPARE phase */
332 if ((!vlan_enabled) && (mlxsw_sp->master_bridge.dev == orig_dev)) {
333 netdev_err(mlxsw_sp_port->dev, "Bridge must be vlan-aware\n");
334 return -EINVAL;
335 }
336
337 return 0;
338}
339
56ade8fe
JP
340static int mlxsw_sp_port_attr_set(struct net_device *dev,
341 const struct switchdev_attr *attr,
342 struct switchdev_trans *trans)
343{
344 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
345 int err = 0;
346
54a73201
IS
347 mlxsw_sp_port = mlxsw_sp_port_orig_get(attr->orig_dev, mlxsw_sp_port);
348 if (!mlxsw_sp_port)
349 return -EINVAL;
350
56ade8fe
JP
351 switch (attr->id) {
352 case SWITCHDEV_ATTR_ID_PORT_STP_STATE:
353 err = mlxsw_sp_port_attr_stp_state_set(mlxsw_sp_port, trans,
354 attr->u.stp_state);
355 break;
356 case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS:
357 err = mlxsw_sp_port_attr_br_flags_set(mlxsw_sp_port, trans,
358 attr->u.brport_flags);
359 break;
360 case SWITCHDEV_ATTR_ID_BRIDGE_AGEING_TIME:
361 err = mlxsw_sp_port_attr_br_ageing_set(mlxsw_sp_port, trans,
362 attr->u.ageing_time);
363 break;
26a4ea0f
ER
364 case SWITCHDEV_ATTR_ID_BRIDGE_VLAN_FILTERING:
365 err = mlxsw_sp_port_attr_br_vlan_set(mlxsw_sp_port, trans,
366 attr->orig_dev,
367 attr->u.vlan_filtering);
368 break;
56ade8fe
JP
369 default:
370 err = -EOPNOTSUPP;
371 break;
372 }
373
374 return err;
375}
376
14d39461
IS
377static struct mlxsw_sp_fid *mlxsw_sp_fid_find(struct mlxsw_sp *mlxsw_sp,
378 u16 fid)
379{
380 struct mlxsw_sp_fid *f;
381
382 list_for_each_entry(f, &mlxsw_sp->fids, list)
383 if (f->fid == fid)
384 return f;
385
386 return NULL;
387}
388
389static int mlxsw_sp_fid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create)
390{
391 char sfmr_pl[MLXSW_REG_SFMR_LEN];
392
393 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, fid);
394 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
395}
396
397static int mlxsw_sp_fid_map(struct mlxsw_sp *mlxsw_sp, u16 fid, bool valid)
398{
399 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_VID_TO_FID;
400 char svfa_pl[MLXSW_REG_SVFA_LEN];
401
402 mlxsw_reg_svfa_pack(svfa_pl, 0, mt, valid, fid, fid);
403 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl);
404}
405
406static struct mlxsw_sp_fid *mlxsw_sp_fid_alloc(u16 fid)
407{
408 struct mlxsw_sp_fid *f;
409
410 f = kzalloc(sizeof(*f), GFP_KERNEL);
411 if (!f)
412 return NULL;
413
414 f->fid = fid;
415
416 return f;
417}
418
419static struct mlxsw_sp_fid *mlxsw_sp_fid_create(struct mlxsw_sp *mlxsw_sp,
420 u16 fid)
421{
422 struct mlxsw_sp_fid *f;
423 int err;
424
425 err = mlxsw_sp_fid_op(mlxsw_sp, fid, true);
426 if (err)
427 return ERR_PTR(err);
428
429 /* Although all the ports member in the FID might be using a
430 * {Port, VID} to FID mapping, we create a global VID-to-FID
431 * mapping. This allows a port to transition to VLAN mode,
432 * knowing the global mapping exists.
433 */
434 err = mlxsw_sp_fid_map(mlxsw_sp, fid, true);
435 if (err)
436 goto err_fid_map;
437
438 f = mlxsw_sp_fid_alloc(fid);
439 if (!f) {
440 err = -ENOMEM;
441 goto err_allocate_fid;
442 }
443
444 list_add(&f->list, &mlxsw_sp->fids);
445
446 return f;
447
448err_allocate_fid:
449 mlxsw_sp_fid_map(mlxsw_sp, fid, false);
450err_fid_map:
451 mlxsw_sp_fid_op(mlxsw_sp, fid, false);
452 return ERR_PTR(err);
453}
454
455static void mlxsw_sp_fid_destroy(struct mlxsw_sp *mlxsw_sp,
456 struct mlxsw_sp_fid *f)
457{
458 u16 fid = f->fid;
459
460 list_del(&f->list);
461
462 kfree(f);
463
464 mlxsw_sp_fid_op(mlxsw_sp, fid, false);
465}
466
467static int __mlxsw_sp_port_fid_join(struct mlxsw_sp_port *mlxsw_sp_port,
468 u16 fid)
469{
470 struct mlxsw_sp_fid *f;
471
472 f = mlxsw_sp_fid_find(mlxsw_sp_port->mlxsw_sp, fid);
473 if (!f) {
474 f = mlxsw_sp_fid_create(mlxsw_sp_port->mlxsw_sp, fid);
475 if (IS_ERR(f))
476 return PTR_ERR(f);
477 }
478
479 f->ref_count++;
480
22305378
IS
481 netdev_dbg(mlxsw_sp_port->dev, "Joined FID=%d\n", fid);
482
14d39461
IS
483 return 0;
484}
485
486static void __mlxsw_sp_port_fid_leave(struct mlxsw_sp_port *mlxsw_sp_port,
487 u16 fid)
488{
489 struct mlxsw_sp_fid *f;
490
491 f = mlxsw_sp_fid_find(mlxsw_sp_port->mlxsw_sp, fid);
492 if (WARN_ON(!f))
493 return;
494
22305378
IS
495 netdev_dbg(mlxsw_sp_port->dev, "Left FID=%d\n", fid);
496
fe3f6d14
IS
497 mlxsw_sp_port_fdb_flush(mlxsw_sp_port, fid);
498
14d39461
IS
499 if (--f->ref_count == 0)
500 mlxsw_sp_fid_destroy(mlxsw_sp_port->mlxsw_sp, f);
501}
502
503static int mlxsw_sp_port_fid_map(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid,
504 bool valid)
505{
506 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
507
508 /* If port doesn't have vPorts, then it can use the global
509 * VID-to-FID mapping.
510 */
511 if (list_empty(&mlxsw_sp_port->vports_list))
512 return 0;
513
514 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, valid, fid, fid);
515}
516
517static int mlxsw_sp_port_fid_join(struct mlxsw_sp_port *mlxsw_sp_port,
518 u16 fid_begin, u16 fid_end)
519{
520 int fid, err;
521
522 for (fid = fid_begin; fid <= fid_end; fid++) {
523 err = __mlxsw_sp_port_fid_join(mlxsw_sp_port, fid);
524 if (err)
525 goto err_port_fid_join;
526 }
527
528 err = __mlxsw_sp_port_flood_set(mlxsw_sp_port, fid_begin, fid_end,
529 true, false);
530 if (err)
531 goto err_port_flood_set;
532
533 for (fid = fid_begin; fid <= fid_end; fid++) {
534 err = mlxsw_sp_port_fid_map(mlxsw_sp_port, fid, true);
535 if (err)
536 goto err_port_fid_map;
537 }
538
539 return 0;
540
541err_port_fid_map:
542 for (fid--; fid >= fid_begin; fid--)
543 mlxsw_sp_port_fid_map(mlxsw_sp_port, fid, false);
544 __mlxsw_sp_port_flood_set(mlxsw_sp_port, fid_begin, fid_end, false,
545 false);
546err_port_flood_set:
547 fid = fid_end;
548err_port_fid_join:
549 for (fid--; fid >= fid_begin; fid--)
550 __mlxsw_sp_port_fid_leave(mlxsw_sp_port, fid);
551 return err;
552}
553
554static void mlxsw_sp_port_fid_leave(struct mlxsw_sp_port *mlxsw_sp_port,
555 u16 fid_begin, u16 fid_end)
556{
557 int fid;
558
559 for (fid = fid_begin; fid <= fid_end; fid++)
560 mlxsw_sp_port_fid_map(mlxsw_sp_port, fid, false);
561
562 __mlxsw_sp_port_flood_set(mlxsw_sp_port, fid_begin, fid_end, false,
563 false);
564
565 for (fid = fid_begin; fid <= fid_end; fid++)
566 __mlxsw_sp_port_fid_leave(mlxsw_sp_port, fid);
567}
568
28a01d2d
IS
569static int __mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port,
570 u16 vid)
56ade8fe
JP
571{
572 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
573 char spvid_pl[MLXSW_REG_SPVID_LEN];
574
575 mlxsw_reg_spvid_pack(spvid_pl, mlxsw_sp_port->local_port, vid);
576 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvid), spvid_pl);
577}
578
28a01d2d
IS
579static int mlxsw_sp_port_allow_untagged_set(struct mlxsw_sp_port *mlxsw_sp_port,
580 bool allow)
581{
582 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
583 char spaft_pl[MLXSW_REG_SPAFT_LEN];
584
585 mlxsw_reg_spaft_pack(spaft_pl, mlxsw_sp_port->local_port, allow);
586 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spaft), spaft_pl);
587}
588
589int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
590{
591 struct net_device *dev = mlxsw_sp_port->dev;
592 int err;
593
594 if (!vid) {
595 err = mlxsw_sp_port_allow_untagged_set(mlxsw_sp_port, false);
596 if (err) {
597 netdev_err(dev, "Failed to disallow untagged traffic\n");
598 return err;
599 }
600 } else {
601 err = __mlxsw_sp_port_pvid_set(mlxsw_sp_port, vid);
602 if (err) {
603 netdev_err(dev, "Failed to set PVID\n");
604 return err;
605 }
606
607 /* Only allow if not already allowed. */
608 if (!mlxsw_sp_port->pvid) {
609 err = mlxsw_sp_port_allow_untagged_set(mlxsw_sp_port,
610 true);
611 if (err) {
612 netdev_err(dev, "Failed to allow untagged traffic\n");
613 goto err_port_allow_untagged_set;
614 }
615 }
616 }
617
618 mlxsw_sp_port->pvid = vid;
619 return 0;
620
621err_port_allow_untagged_set:
622 __mlxsw_sp_port_pvid_set(mlxsw_sp_port, mlxsw_sp_port->pvid);
623 return err;
624}
625
3b7ad5ec
IS
626static int __mlxsw_sp_port_vlans_set(struct mlxsw_sp_port *mlxsw_sp_port,
627 u16 vid_begin, u16 vid_end, bool is_member,
628 bool untagged)
629{
630 u16 vid, vid_e;
631 int err;
632
633 for (vid = vid_begin; vid <= vid_end;
634 vid += MLXSW_REG_SPVM_REC_MAX_COUNT) {
635 vid_e = min((u16) (vid + MLXSW_REG_SPVM_REC_MAX_COUNT - 1),
636 vid_end);
637
638 err = mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid_e,
639 is_member, untagged);
640 if (err)
641 return err;
642 }
643
644 return 0;
645}
646
56ade8fe
JP
647static int __mlxsw_sp_port_vlans_add(struct mlxsw_sp_port *mlxsw_sp_port,
648 u16 vid_begin, u16 vid_end,
649 bool flag_untagged, bool flag_pvid)
650{
56ade8fe 651 struct net_device *dev = mlxsw_sp_port->dev;
14d39461 652 u16 vid, old_pvid;
56ade8fe
JP
653 int err;
654
56ade8fe 655 if (!mlxsw_sp_port->bridged)
32d863fb 656 return -EINVAL;
56ade8fe 657
14d39461 658 err = mlxsw_sp_port_fid_join(mlxsw_sp_port, vid_begin, vid_end);
1b3433a9 659 if (err) {
14d39461
IS
660 netdev_err(dev, "Failed to join FIDs\n");
661 return err;
56ade8fe
JP
662 }
663
3b7ad5ec
IS
664 err = __mlxsw_sp_port_vlans_set(mlxsw_sp_port, vid_begin, vid_end,
665 true, flag_untagged);
666 if (err) {
667 netdev_err(dev, "Unable to add VIDs %d-%d\n", vid_begin,
668 vid_end);
b07a966c 669 goto err_port_vlans_set;
56ade8fe
JP
670 }
671
b07a966c
IS
672 old_pvid = mlxsw_sp_port->pvid;
673 if (flag_pvid && old_pvid != vid_begin) {
674 err = mlxsw_sp_port_pvid_set(mlxsw_sp_port, vid_begin);
56ade8fe 675 if (err) {
b07a966c
IS
676 netdev_err(dev, "Unable to add PVID %d\n", vid_begin);
677 goto err_port_pvid_set;
56ade8fe 678 }
28a01d2d
IS
679 } else if (!flag_pvid && old_pvid >= vid_begin && old_pvid <= vid_end) {
680 err = mlxsw_sp_port_pvid_set(mlxsw_sp_port, 0);
681 if (err) {
682 netdev_err(dev, "Unable to del PVID\n");
683 goto err_port_pvid_set;
684 }
56ade8fe
JP
685 }
686
687 /* Changing activity bits only if HW operation succeded */
fc1273af 688 for (vid = vid_begin; vid <= vid_end; vid++) {
56ade8fe 689 set_bit(vid, mlxsw_sp_port->active_vlans);
fc1273af
ER
690 if (flag_untagged)
691 set_bit(vid, mlxsw_sp_port->untagged_vlans);
692 else
693 clear_bit(vid, mlxsw_sp_port->untagged_vlans);
694 }
56ade8fe 695
b07a966c
IS
696 /* STP state change must be done after we set active VLANs */
697 err = mlxsw_sp_port_stp_state_set(mlxsw_sp_port,
698 mlxsw_sp_port->stp_state);
699 if (err) {
700 netdev_err(dev, "Failed to set STP state\n");
701 goto err_port_stp_state_set;
702 }
703
704 return 0;
705
b07a966c
IS
706err_port_stp_state_set:
707 for (vid = vid_begin; vid <= vid_end; vid++)
708 clear_bit(vid, mlxsw_sp_port->active_vlans);
709 if (old_pvid != mlxsw_sp_port->pvid)
710 mlxsw_sp_port_pvid_set(mlxsw_sp_port, old_pvid);
711err_port_pvid_set:
712 __mlxsw_sp_port_vlans_set(mlxsw_sp_port, vid_begin, vid_end, false,
713 false);
714err_port_vlans_set:
14d39461 715 mlxsw_sp_port_fid_leave(mlxsw_sp_port, vid_begin, vid_end);
b07a966c 716 return err;
56ade8fe
JP
717}
718
719static int mlxsw_sp_port_vlans_add(struct mlxsw_sp_port *mlxsw_sp_port,
720 const struct switchdev_obj_port_vlan *vlan,
721 struct switchdev_trans *trans)
722{
e4a13055
ER
723 bool flag_untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
724 bool flag_pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID;
56ade8fe
JP
725
726 if (switchdev_trans_ph_prepare(trans))
727 return 0;
728
729 return __mlxsw_sp_port_vlans_add(mlxsw_sp_port,
730 vlan->vid_begin, vlan->vid_end,
e4a13055 731 flag_untagged, flag_pvid);
56ade8fe
JP
732}
733
8a1ab5d7 734static enum mlxsw_reg_sfd_rec_policy mlxsw_sp_sfd_rec_policy(bool dynamic)
56ade8fe 735{
8a1ab5d7
JP
736 return dynamic ? MLXSW_REG_SFD_REC_POLICY_DYNAMIC_ENTRY_INGRESS :
737 MLXSW_REG_SFD_REC_POLICY_STATIC_ENTRY;
738}
739
740static enum mlxsw_reg_sfd_op mlxsw_sp_sfd_op(bool adding)
741{
742 return adding ? MLXSW_REG_SFD_OP_WRITE_EDIT :
743 MLXSW_REG_SFD_OP_WRITE_REMOVE;
744}
745
6e095fd4
IS
746static int __mlxsw_sp_port_fdb_uc_op(struct mlxsw_sp *mlxsw_sp, u8 local_port,
747 const char *mac, u16 fid, bool adding,
748 enum mlxsw_reg_sfd_rec_action action,
749 bool dynamic)
8a1ab5d7 750{
56ade8fe
JP
751 char *sfd_pl;
752 int err;
753
56ade8fe
JP
754 sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL);
755 if (!sfd_pl)
756 return -ENOMEM;
757
8a1ab5d7
JP
758 mlxsw_reg_sfd_pack(sfd_pl, mlxsw_sp_sfd_op(adding), 0);
759 mlxsw_reg_sfd_uc_pack(sfd_pl, 0, mlxsw_sp_sfd_rec_policy(dynamic),
6e095fd4 760 mac, fid, action, local_port);
8a1ab5d7
JP
761 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl);
762 kfree(sfd_pl);
763
764 return err;
765}
766
6e095fd4
IS
767static int mlxsw_sp_port_fdb_uc_op(struct mlxsw_sp *mlxsw_sp, u8 local_port,
768 const char *mac, u16 fid, bool adding,
769 bool dynamic)
770{
771 return __mlxsw_sp_port_fdb_uc_op(mlxsw_sp, local_port, mac, fid, adding,
772 MLXSW_REG_SFD_REC_ACTION_NOP, dynamic);
773}
774
775int mlxsw_sp_rif_fdb_op(struct mlxsw_sp *mlxsw_sp, const char *mac, u16 fid,
776 bool adding)
777{
778 return __mlxsw_sp_port_fdb_uc_op(mlxsw_sp, 0, mac, fid, adding,
779 MLXSW_REG_SFD_REC_ACTION_FORWARD_IP_ROUTER,
780 false);
781}
782
8a1ab5d7 783static int mlxsw_sp_port_fdb_uc_lag_op(struct mlxsw_sp *mlxsw_sp, u16 lag_id,
64771e31
IS
784 const char *mac, u16 fid, u16 lag_vid,
785 bool adding, bool dynamic)
8a1ab5d7
JP
786{
787 char *sfd_pl;
788 int err;
789
790 sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL);
791 if (!sfd_pl)
792 return -ENOMEM;
793
794 mlxsw_reg_sfd_pack(sfd_pl, mlxsw_sp_sfd_op(adding), 0);
795 mlxsw_reg_sfd_uc_lag_pack(sfd_pl, 0, mlxsw_sp_sfd_rec_policy(dynamic),
64771e31
IS
796 mac, fid, MLXSW_REG_SFD_REC_ACTION_NOP,
797 lag_vid, lag_id);
8a1ab5d7 798 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl);
56ade8fe
JP
799 kfree(sfd_pl);
800
801 return err;
802}
803
804static int
805mlxsw_sp_port_fdb_static_add(struct mlxsw_sp_port *mlxsw_sp_port,
806 const struct switchdev_obj_port_fdb *fdb,
807 struct switchdev_trans *trans)
808{
e4b6f693 809 u16 fid = mlxsw_sp_port_vid_to_fid_get(mlxsw_sp_port, fdb->vid);
64771e31 810 u16 lag_vid = 0;
8a1ab5d7 811
56ade8fe
JP
812 if (switchdev_trans_ph_prepare(trans))
813 return 0;
814
54a73201 815 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
64771e31 816 lag_vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
54a73201
IS
817 }
818
8a1ab5d7 819 if (!mlxsw_sp_port->lagged)
2fa9d45e
JP
820 return mlxsw_sp_port_fdb_uc_op(mlxsw_sp_port->mlxsw_sp,
821 mlxsw_sp_port->local_port,
9de6a80e 822 fdb->addr, fid, true, false);
8a1ab5d7
JP
823 else
824 return mlxsw_sp_port_fdb_uc_lag_op(mlxsw_sp_port->mlxsw_sp,
825 mlxsw_sp_port->lag_id,
64771e31
IS
826 fdb->addr, fid, lag_vid,
827 true, false);
56ade8fe
JP
828}
829
3a49b4fd
ER
830static int mlxsw_sp_port_mdb_op(struct mlxsw_sp *mlxsw_sp, const char *addr,
831 u16 fid, u16 mid, bool adding)
832{
833 char *sfd_pl;
834 int err;
835
836 sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL);
837 if (!sfd_pl)
838 return -ENOMEM;
839
840 mlxsw_reg_sfd_pack(sfd_pl, mlxsw_sp_sfd_op(adding), 0);
841 mlxsw_reg_sfd_mc_pack(sfd_pl, 0, addr, fid,
842 MLXSW_REG_SFD_REC_ACTION_NOP, mid);
843 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl);
844 kfree(sfd_pl);
845 return err;
846}
847
848static int mlxsw_sp_port_smid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mid,
849 bool add, bool clear_all_ports)
850{
851 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
852 char *smid_pl;
853 int err, i;
854
855 smid_pl = kmalloc(MLXSW_REG_SMID_LEN, GFP_KERNEL);
856 if (!smid_pl)
857 return -ENOMEM;
858
859 mlxsw_reg_smid_pack(smid_pl, mid, mlxsw_sp_port->local_port, add);
860 if (clear_all_ports) {
861 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++)
862 if (mlxsw_sp->ports[i])
863 mlxsw_reg_smid_port_mask_set(smid_pl, i, 1);
864 }
865 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(smid), smid_pl);
866 kfree(smid_pl);
867 return err;
868}
869
870static struct mlxsw_sp_mid *__mlxsw_sp_mc_get(struct mlxsw_sp *mlxsw_sp,
871 const unsigned char *addr,
872 u16 vid)
873{
874 struct mlxsw_sp_mid *mid;
875
876 list_for_each_entry(mid, &mlxsw_sp->br_mids.list, list) {
877 if (ether_addr_equal(mid->addr, addr) && mid->vid == vid)
878 return mid;
879 }
880 return NULL;
881}
882
883static struct mlxsw_sp_mid *__mlxsw_sp_mc_alloc(struct mlxsw_sp *mlxsw_sp,
884 const unsigned char *addr,
885 u16 vid)
886{
887 struct mlxsw_sp_mid *mid;
888 u16 mid_idx;
889
890 mid_idx = find_first_zero_bit(mlxsw_sp->br_mids.mapped,
891 MLXSW_SP_MID_MAX);
892 if (mid_idx == MLXSW_SP_MID_MAX)
893 return NULL;
894
895 mid = kzalloc(sizeof(*mid), GFP_KERNEL);
896 if (!mid)
897 return NULL;
898
899 set_bit(mid_idx, mlxsw_sp->br_mids.mapped);
900 ether_addr_copy(mid->addr, addr);
901 mid->vid = vid;
902 mid->mid = mid_idx;
903 mid->ref_count = 0;
904 list_add_tail(&mid->list, &mlxsw_sp->br_mids.list);
905
906 return mid;
907}
908
909static int __mlxsw_sp_mc_dec_ref(struct mlxsw_sp *mlxsw_sp,
910 struct mlxsw_sp_mid *mid)
911{
912 if (--mid->ref_count == 0) {
913 list_del(&mid->list);
914 clear_bit(mid->mid, mlxsw_sp->br_mids.mapped);
915 kfree(mid);
916 return 1;
917 }
918 return 0;
919}
920
921static int mlxsw_sp_port_mdb_add(struct mlxsw_sp_port *mlxsw_sp_port,
922 const struct switchdev_obj_port_mdb *mdb,
923 struct switchdev_trans *trans)
924{
925 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
926 struct net_device *dev = mlxsw_sp_port->dev;
927 struct mlxsw_sp_mid *mid;
928 u16 fid = mlxsw_sp_port_vid_to_fid_get(mlxsw_sp_port, mdb->vid);
929 int err = 0;
930
931 if (switchdev_trans_ph_prepare(trans))
932 return 0;
933
934 mid = __mlxsw_sp_mc_get(mlxsw_sp, mdb->addr, mdb->vid);
935 if (!mid) {
936 mid = __mlxsw_sp_mc_alloc(mlxsw_sp, mdb->addr, mdb->vid);
937 if (!mid) {
938 netdev_err(dev, "Unable to allocate MC group\n");
939 return -ENOMEM;
940 }
941 }
942 mid->ref_count++;
943
944 err = mlxsw_sp_port_smid_set(mlxsw_sp_port, mid->mid, true,
945 mid->ref_count == 1);
946 if (err) {
947 netdev_err(dev, "Unable to set SMID\n");
948 goto err_out;
949 }
950
951 if (mid->ref_count == 1) {
952 err = mlxsw_sp_port_mdb_op(mlxsw_sp, mdb->addr, fid, mid->mid,
953 true);
954 if (err) {
955 netdev_err(dev, "Unable to set MC SFD\n");
956 goto err_out;
957 }
958 }
959
960 return 0;
961
962err_out:
963 __mlxsw_sp_mc_dec_ref(mlxsw_sp, mid);
964 return err;
965}
966
56ade8fe
JP
967static int mlxsw_sp_port_obj_add(struct net_device *dev,
968 const struct switchdev_obj *obj,
969 struct switchdev_trans *trans)
970{
971 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
972 int err = 0;
973
54a73201
IS
974 mlxsw_sp_port = mlxsw_sp_port_orig_get(obj->orig_dev, mlxsw_sp_port);
975 if (!mlxsw_sp_port)
976 return -EINVAL;
977
56ade8fe
JP
978 switch (obj->id) {
979 case SWITCHDEV_OBJ_ID_PORT_VLAN:
54a73201
IS
980 if (mlxsw_sp_port_is_vport(mlxsw_sp_port))
981 return 0;
982
56ade8fe
JP
983 err = mlxsw_sp_port_vlans_add(mlxsw_sp_port,
984 SWITCHDEV_OBJ_PORT_VLAN(obj),
985 trans);
986 break;
61c503f9
JP
987 case SWITCHDEV_OBJ_ID_IPV4_FIB:
988 err = mlxsw_sp_router_fib4_add(mlxsw_sp_port,
989 SWITCHDEV_OBJ_IPV4_FIB(obj),
990 trans);
991 break;
56ade8fe
JP
992 case SWITCHDEV_OBJ_ID_PORT_FDB:
993 err = mlxsw_sp_port_fdb_static_add(mlxsw_sp_port,
994 SWITCHDEV_OBJ_PORT_FDB(obj),
995 trans);
996 break;
3a49b4fd
ER
997 case SWITCHDEV_OBJ_ID_PORT_MDB:
998 err = mlxsw_sp_port_mdb_add(mlxsw_sp_port,
999 SWITCHDEV_OBJ_PORT_MDB(obj),
1000 trans);
1001 break;
56ade8fe
JP
1002 default:
1003 err = -EOPNOTSUPP;
1004 break;
1005 }
1006
1007 return err;
1008}
1009
56ade8fe
JP
1010static int __mlxsw_sp_port_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port,
1011 u16 vid_begin, u16 vid_end, bool init)
1012{
1013 struct net_device *dev = mlxsw_sp_port->dev;
3b7ad5ec 1014 u16 vid, pvid;
56ade8fe
JP
1015 int err;
1016
56ade8fe 1017 if (!init && !mlxsw_sp_port->bridged)
32d863fb 1018 return -EINVAL;
56ade8fe 1019
3b7ad5ec
IS
1020 err = __mlxsw_sp_port_vlans_set(mlxsw_sp_port, vid_begin, vid_end,
1021 false, false);
1022 if (err) {
1023 netdev_err(dev, "Unable to del VIDs %d-%d\n", vid_begin,
1024 vid_end);
1025 return err;
56ade8fe
JP
1026 }
1027
28a01d2d
IS
1028 if (init)
1029 goto out;
1030
06c071f6 1031 pvid = mlxsw_sp_port->pvid;
28a01d2d
IS
1032 if (pvid >= vid_begin && pvid <= vid_end) {
1033 err = mlxsw_sp_port_pvid_set(mlxsw_sp_port, 0);
56ade8fe 1034 if (err) {
06c071f6 1035 netdev_err(dev, "Unable to del PVID %d\n", pvid);
56ade8fe
JP
1036 return err;
1037 }
1038 }
1039
14d39461 1040 mlxsw_sp_port_fid_leave(mlxsw_sp_port, vid_begin, vid_end);
56ade8fe
JP
1041
1042out:
1043 /* Changing activity bits only if HW operation succeded */
1044 for (vid = vid_begin; vid <= vid_end; vid++)
1045 clear_bit(vid, mlxsw_sp_port->active_vlans);
1046
1047 return 0;
1048}
1049
1050static int mlxsw_sp_port_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port,
1051 const struct switchdev_obj_port_vlan *vlan)
1052{
1053 return __mlxsw_sp_port_vlans_del(mlxsw_sp_port,
1054 vlan->vid_begin, vlan->vid_end, false);
1055}
1056
4dc236c3
IS
1057void mlxsw_sp_port_active_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port)
1058{
1059 u16 vid;
1060
1061 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID)
1062 __mlxsw_sp_port_vlans_del(mlxsw_sp_port, vid, vid, false);
1063}
1064
56ade8fe
JP
1065static int
1066mlxsw_sp_port_fdb_static_del(struct mlxsw_sp_port *mlxsw_sp_port,
1067 const struct switchdev_obj_port_fdb *fdb)
1068{
e4b6f693 1069 u16 fid = mlxsw_sp_port_vid_to_fid_get(mlxsw_sp_port, fdb->vid);
64771e31 1070 u16 lag_vid = 0;
9de6a80e 1071
54a73201 1072 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
64771e31 1073 lag_vid = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
54a73201
IS
1074 }
1075
8a1ab5d7 1076 if (!mlxsw_sp_port->lagged)
2fa9d45e
JP
1077 return mlxsw_sp_port_fdb_uc_op(mlxsw_sp_port->mlxsw_sp,
1078 mlxsw_sp_port->local_port,
9de6a80e 1079 fdb->addr, fid,
8a1ab5d7
JP
1080 false, false);
1081 else
1082 return mlxsw_sp_port_fdb_uc_lag_op(mlxsw_sp_port->mlxsw_sp,
1083 mlxsw_sp_port->lag_id,
64771e31 1084 fdb->addr, fid, lag_vid,
8a1ab5d7 1085 false, false);
56ade8fe
JP
1086}
1087
3a49b4fd
ER
1088static int mlxsw_sp_port_mdb_del(struct mlxsw_sp_port *mlxsw_sp_port,
1089 const struct switchdev_obj_port_mdb *mdb)
1090{
1091 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
1092 struct net_device *dev = mlxsw_sp_port->dev;
1093 struct mlxsw_sp_mid *mid;
1094 u16 fid = mlxsw_sp_port_vid_to_fid_get(mlxsw_sp_port, mdb->vid);
1095 u16 mid_idx;
1096 int err = 0;
1097
1098 mid = __mlxsw_sp_mc_get(mlxsw_sp, mdb->addr, mdb->vid);
1099 if (!mid) {
1100 netdev_err(dev, "Unable to remove port from MC DB\n");
1101 return -EINVAL;
1102 }
1103
1104 err = mlxsw_sp_port_smid_set(mlxsw_sp_port, mid->mid, false, false);
1105 if (err)
1106 netdev_err(dev, "Unable to remove port from SMID\n");
1107
1108 mid_idx = mid->mid;
1109 if (__mlxsw_sp_mc_dec_ref(mlxsw_sp, mid)) {
1110 err = mlxsw_sp_port_mdb_op(mlxsw_sp, mdb->addr, fid, mid_idx,
1111 false);
1112 if (err)
1113 netdev_err(dev, "Unable to remove MC SFD\n");
1114 }
1115
1116 return err;
1117}
1118
56ade8fe
JP
1119static int mlxsw_sp_port_obj_del(struct net_device *dev,
1120 const struct switchdev_obj *obj)
1121{
1122 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1123 int err = 0;
1124
54a73201
IS
1125 mlxsw_sp_port = mlxsw_sp_port_orig_get(obj->orig_dev, mlxsw_sp_port);
1126 if (!mlxsw_sp_port)
1127 return -EINVAL;
1128
56ade8fe
JP
1129 switch (obj->id) {
1130 case SWITCHDEV_OBJ_ID_PORT_VLAN:
54a73201
IS
1131 if (mlxsw_sp_port_is_vport(mlxsw_sp_port))
1132 return 0;
1133
56ade8fe
JP
1134 err = mlxsw_sp_port_vlans_del(mlxsw_sp_port,
1135 SWITCHDEV_OBJ_PORT_VLAN(obj));
1136 break;
61c503f9
JP
1137 case SWITCHDEV_OBJ_ID_IPV4_FIB:
1138 err = mlxsw_sp_router_fib4_del(mlxsw_sp_port,
1139 SWITCHDEV_OBJ_IPV4_FIB(obj));
1140 break;
56ade8fe
JP
1141 case SWITCHDEV_OBJ_ID_PORT_FDB:
1142 err = mlxsw_sp_port_fdb_static_del(mlxsw_sp_port,
1143 SWITCHDEV_OBJ_PORT_FDB(obj));
1144 break;
3a49b4fd
ER
1145 case SWITCHDEV_OBJ_ID_PORT_MDB:
1146 err = mlxsw_sp_port_mdb_del(mlxsw_sp_port,
1147 SWITCHDEV_OBJ_PORT_MDB(obj));
00ae40e7 1148 break;
56ade8fe
JP
1149 default:
1150 err = -EOPNOTSUPP;
1151 break;
1152 }
1153
1154 return err;
1155}
1156
8a1ab5d7
JP
1157static struct mlxsw_sp_port *mlxsw_sp_lag_rep_port(struct mlxsw_sp *mlxsw_sp,
1158 u16 lag_id)
1159{
1160 struct mlxsw_sp_port *mlxsw_sp_port;
1161 int i;
1162
1163 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
1164 mlxsw_sp_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
1165 if (mlxsw_sp_port)
1166 return mlxsw_sp_port;
1167 }
1168 return NULL;
1169}
1170
56ade8fe
JP
1171static int mlxsw_sp_port_fdb_dump(struct mlxsw_sp_port *mlxsw_sp_port,
1172 struct switchdev_obj_port_fdb *fdb,
304f5158
IS
1173 switchdev_obj_dump_cb_t *cb,
1174 struct net_device *orig_dev)
56ade8fe 1175{
8a1ab5d7 1176 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
3f47f867 1177 struct mlxsw_sp_port *tmp;
56918b6b
IS
1178 struct mlxsw_sp_fid *f;
1179 u16 vport_fid;
56ade8fe
JP
1180 char *sfd_pl;
1181 char mac[ETH_ALEN];
9de6a80e 1182 u16 fid;
56ade8fe 1183 u8 local_port;
8a1ab5d7 1184 u16 lag_id;
56ade8fe
JP
1185 u8 num_rec;
1186 int stored_err = 0;
1187 int i;
1188 int err;
1189
1190 sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL);
1191 if (!sfd_pl)
1192 return -ENOMEM;
1193
56918b6b
IS
1194 f = mlxsw_sp_vport_fid_get(mlxsw_sp_port);
1195 vport_fid = f ? f->fid : 0;
54a73201 1196
56ade8fe
JP
1197 mlxsw_reg_sfd_pack(sfd_pl, MLXSW_REG_SFD_OP_QUERY_DUMP, 0);
1198 do {
1199 mlxsw_reg_sfd_num_rec_set(sfd_pl, MLXSW_REG_SFD_REC_MAX_COUNT);
8a1ab5d7 1200 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl);
56ade8fe
JP
1201 if (err)
1202 goto out;
1203
1204 num_rec = mlxsw_reg_sfd_num_rec_get(sfd_pl);
1205
1206 /* Even in case of error, we have to run the dump to the end
1207 * so the session in firmware is finished.
1208 */
1209 if (stored_err)
1210 continue;
1211
1212 for (i = 0; i < num_rec; i++) {
1213 switch (mlxsw_reg_sfd_rec_type_get(sfd_pl, i)) {
1214 case MLXSW_REG_SFD_REC_TYPE_UNICAST:
9de6a80e 1215 mlxsw_reg_sfd_uc_unpack(sfd_pl, i, mac, &fid,
56ade8fe
JP
1216 &local_port);
1217 if (local_port == mlxsw_sp_port->local_port) {
004f85ea
IS
1218 if (vport_fid && vport_fid == fid)
1219 fdb->vid = 0;
1220 else if (!vport_fid &&
1221 !mlxsw_sp_fid_is_vfid(fid))
54a73201 1222 fdb->vid = fid;
004f85ea
IS
1223 else
1224 continue;
56ade8fe
JP
1225 ether_addr_copy(fdb->addr, mac);
1226 fdb->ndm_state = NUD_REACHABLE;
56ade8fe
JP
1227 err = cb(&fdb->obj);
1228 if (err)
1229 stored_err = err;
1230 }
8a1ab5d7
JP
1231 break;
1232 case MLXSW_REG_SFD_REC_TYPE_UNICAST_LAG:
1233 mlxsw_reg_sfd_uc_lag_unpack(sfd_pl, i,
9de6a80e 1234 mac, &fid, &lag_id);
3f47f867
IS
1235 tmp = mlxsw_sp_lag_rep_port(mlxsw_sp, lag_id);
1236 if (tmp && tmp->local_port ==
1237 mlxsw_sp_port->local_port) {
304f5158
IS
1238 /* LAG records can only point to LAG
1239 * devices or VLAN devices on top.
1240 */
1241 if (!netif_is_lag_master(orig_dev) &&
1242 !is_vlan_dev(orig_dev))
1243 continue;
004f85ea
IS
1244 if (vport_fid && vport_fid == fid)
1245 fdb->vid = 0;
1246 else if (!vport_fid &&
1247 !mlxsw_sp_fid_is_vfid(fid))
54a73201 1248 fdb->vid = fid;
004f85ea
IS
1249 else
1250 continue;
8a1ab5d7
JP
1251 ether_addr_copy(fdb->addr, mac);
1252 fdb->ndm_state = NUD_REACHABLE;
8a1ab5d7
JP
1253 err = cb(&fdb->obj);
1254 if (err)
1255 stored_err = err;
1256 }
1257 break;
56ade8fe
JP
1258 }
1259 }
1260 } while (num_rec == MLXSW_REG_SFD_REC_MAX_COUNT);
1261
1262out:
1263 kfree(sfd_pl);
1264 return stored_err ? stored_err : err;
1265}
1266
1267static int mlxsw_sp_port_vlan_dump(struct mlxsw_sp_port *mlxsw_sp_port,
1268 struct switchdev_obj_port_vlan *vlan,
1269 switchdev_obj_dump_cb_t *cb)
1270{
1271 u16 vid;
1272 int err = 0;
1273
54a73201
IS
1274 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
1275 vlan->flags = 0;
1276 vlan->vid_begin = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
1277 vlan->vid_end = mlxsw_sp_vport_vid_get(mlxsw_sp_port);
1278 return cb(&vlan->obj);
1279 }
1280
56ade8fe
JP
1281 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
1282 vlan->flags = 0;
1283 if (vid == mlxsw_sp_port->pvid)
1284 vlan->flags |= BRIDGE_VLAN_INFO_PVID;
fc1273af
ER
1285 if (test_bit(vid, mlxsw_sp_port->untagged_vlans))
1286 vlan->flags |= BRIDGE_VLAN_INFO_UNTAGGED;
56ade8fe
JP
1287 vlan->vid_begin = vid;
1288 vlan->vid_end = vid;
1289 err = cb(&vlan->obj);
1290 if (err)
1291 break;
1292 }
1293 return err;
1294}
1295
1296static int mlxsw_sp_port_obj_dump(struct net_device *dev,
1297 struct switchdev_obj *obj,
1298 switchdev_obj_dump_cb_t *cb)
1299{
1300 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
1301 int err = 0;
1302
54a73201
IS
1303 mlxsw_sp_port = mlxsw_sp_port_orig_get(obj->orig_dev, mlxsw_sp_port);
1304 if (!mlxsw_sp_port)
1305 return -EINVAL;
1306
56ade8fe
JP
1307 switch (obj->id) {
1308 case SWITCHDEV_OBJ_ID_PORT_VLAN:
1309 err = mlxsw_sp_port_vlan_dump(mlxsw_sp_port,
1310 SWITCHDEV_OBJ_PORT_VLAN(obj), cb);
1311 break;
1312 case SWITCHDEV_OBJ_ID_PORT_FDB:
1313 err = mlxsw_sp_port_fdb_dump(mlxsw_sp_port,
304f5158
IS
1314 SWITCHDEV_OBJ_PORT_FDB(obj), cb,
1315 obj->orig_dev);
56ade8fe
JP
1316 break;
1317 default:
1318 err = -EOPNOTSUPP;
1319 break;
1320 }
1321
1322 return err;
1323}
1324
c7070fc4 1325static const struct switchdev_ops mlxsw_sp_port_switchdev_ops = {
56ade8fe
JP
1326 .switchdev_port_attr_get = mlxsw_sp_port_attr_get,
1327 .switchdev_port_attr_set = mlxsw_sp_port_attr_set,
1328 .switchdev_port_obj_add = mlxsw_sp_port_obj_add,
1329 .switchdev_port_obj_del = mlxsw_sp_port_obj_del,
1330 .switchdev_port_obj_dump = mlxsw_sp_port_obj_dump,
1331};
1332
45827d78
IS
1333static void mlxsw_sp_fdb_call_notifiers(bool learning_sync, bool adding,
1334 char *mac, u16 vid,
8a1ab5d7
JP
1335 struct net_device *dev)
1336{
1337 struct switchdev_notifier_fdb_info info;
1338 unsigned long notifier_type;
1339
45827d78 1340 if (learning_sync) {
8a1ab5d7
JP
1341 info.addr = mac;
1342 info.vid = vid;
1343 notifier_type = adding ? SWITCHDEV_FDB_ADD : SWITCHDEV_FDB_DEL;
1344 call_switchdev_notifiers(notifier_type, dev, &info.info);
1345 }
1346}
1347
56ade8fe
JP
1348static void mlxsw_sp_fdb_notify_mac_process(struct mlxsw_sp *mlxsw_sp,
1349 char *sfn_pl, int rec_index,
1350 bool adding)
1351{
1352 struct mlxsw_sp_port *mlxsw_sp_port;
1353 char mac[ETH_ALEN];
1354 u8 local_port;
9de6a80e 1355 u16 vid, fid;
12f1501e 1356 bool do_notification = true;
56ade8fe
JP
1357 int err;
1358
9de6a80e 1359 mlxsw_reg_sfn_mac_unpack(sfn_pl, rec_index, mac, &fid, &local_port);
56ade8fe
JP
1360 mlxsw_sp_port = mlxsw_sp->ports[local_port];
1361 if (!mlxsw_sp_port) {
1362 dev_err_ratelimited(mlxsw_sp->bus_info->dev, "Incorrect local port in FDB notification\n");
12f1501e 1363 goto just_remove;
56ade8fe
JP
1364 }
1365
aac78a44 1366 if (mlxsw_sp_fid_is_vfid(fid)) {
aac78a44
IS
1367 struct mlxsw_sp_port *mlxsw_sp_vport;
1368
d0ec875a
IS
1369 mlxsw_sp_vport = mlxsw_sp_port_vport_find_by_fid(mlxsw_sp_port,
1370 fid);
aac78a44
IS
1371 if (!mlxsw_sp_vport) {
1372 netdev_err(mlxsw_sp_port->dev, "Failed to find a matching vPort following FDB notification\n");
12f1501e 1373 goto just_remove;
aac78a44 1374 }
004f85ea 1375 vid = 0;
aac78a44
IS
1376 /* Override the physical port with the vPort. */
1377 mlxsw_sp_port = mlxsw_sp_vport;
1378 } else {
1379 vid = fid;
1380 }
1381
12f1501e
JP
1382 adding = adding && mlxsw_sp_port->learning;
1383
1384do_fdb_op:
2fa9d45e 1385 err = mlxsw_sp_port_fdb_uc_op(mlxsw_sp, local_port, mac, fid,
12f1501e 1386 adding, true);
56ade8fe
JP
1387 if (err) {
1388 if (net_ratelimit())
1389 netdev_err(mlxsw_sp_port->dev, "Failed to set FDB entry\n");
1390 return;
1391 }
1392
12f1501e
JP
1393 if (!do_notification)
1394 return;
45827d78 1395 mlxsw_sp_fdb_call_notifiers(mlxsw_sp_port->learning_sync,
8a1ab5d7 1396 adding, mac, vid, mlxsw_sp_port->dev);
12f1501e
JP
1397 return;
1398
1399just_remove:
1400 adding = false;
1401 do_notification = false;
1402 goto do_fdb_op;
8a1ab5d7 1403}
56ade8fe 1404
8a1ab5d7
JP
1405static void mlxsw_sp_fdb_notify_mac_lag_process(struct mlxsw_sp *mlxsw_sp,
1406 char *sfn_pl, int rec_index,
1407 bool adding)
1408{
1409 struct mlxsw_sp_port *mlxsw_sp_port;
e43aca22 1410 struct net_device *dev;
8a1ab5d7 1411 char mac[ETH_ALEN];
64771e31 1412 u16 lag_vid = 0;
8a1ab5d7 1413 u16 lag_id;
9de6a80e 1414 u16 vid, fid;
12f1501e 1415 bool do_notification = true;
8a1ab5d7
JP
1416 int err;
1417
9de6a80e 1418 mlxsw_reg_sfn_mac_lag_unpack(sfn_pl, rec_index, mac, &fid, &lag_id);
8a1ab5d7
JP
1419 mlxsw_sp_port = mlxsw_sp_lag_rep_port(mlxsw_sp, lag_id);
1420 if (!mlxsw_sp_port) {
1421 dev_err_ratelimited(mlxsw_sp->bus_info->dev, "Cannot find port representor for LAG\n");
12f1501e 1422 goto just_remove;
56ade8fe 1423 }
8a1ab5d7 1424
aac78a44 1425 if (mlxsw_sp_fid_is_vfid(fid)) {
aac78a44
IS
1426 struct mlxsw_sp_port *mlxsw_sp_vport;
1427
d0ec875a
IS
1428 mlxsw_sp_vport = mlxsw_sp_port_vport_find_by_fid(mlxsw_sp_port,
1429 fid);
aac78a44
IS
1430 if (!mlxsw_sp_vport) {
1431 netdev_err(mlxsw_sp_port->dev, "Failed to find a matching vPort following FDB notification\n");
12f1501e 1432 goto just_remove;
aac78a44
IS
1433 }
1434
004f85ea 1435 lag_vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport);
e43aca22 1436 dev = mlxsw_sp_vport->dev;
004f85ea 1437 vid = 0;
aac78a44
IS
1438 /* Override the physical port with the vPort. */
1439 mlxsw_sp_port = mlxsw_sp_vport;
1440 } else {
e43aca22 1441 dev = mlxsw_sp_lag_get(mlxsw_sp, lag_id)->dev;
aac78a44
IS
1442 vid = fid;
1443 }
1444
12f1501e
JP
1445 adding = adding && mlxsw_sp_port->learning;
1446
1447do_fdb_op:
64771e31 1448 err = mlxsw_sp_port_fdb_uc_lag_op(mlxsw_sp, lag_id, mac, fid, lag_vid,
12f1501e 1449 adding, true);
8a1ab5d7
JP
1450 if (err) {
1451 if (net_ratelimit())
1452 netdev_err(mlxsw_sp_port->dev, "Failed to set FDB entry\n");
1453 return;
1454 }
1455
12f1501e
JP
1456 if (!do_notification)
1457 return;
45827d78 1458 mlxsw_sp_fdb_call_notifiers(mlxsw_sp_port->learning_sync, adding, mac,
e43aca22 1459 vid, dev);
12f1501e
JP
1460 return;
1461
1462just_remove:
1463 adding = false;
1464 do_notification = false;
1465 goto do_fdb_op;
56ade8fe
JP
1466}
1467
1468static void mlxsw_sp_fdb_notify_rec_process(struct mlxsw_sp *mlxsw_sp,
1469 char *sfn_pl, int rec_index)
1470{
1471 switch (mlxsw_reg_sfn_rec_type_get(sfn_pl, rec_index)) {
1472 case MLXSW_REG_SFN_REC_TYPE_LEARNED_MAC:
1473 mlxsw_sp_fdb_notify_mac_process(mlxsw_sp, sfn_pl,
1474 rec_index, true);
1475 break;
1476 case MLXSW_REG_SFN_REC_TYPE_AGED_OUT_MAC:
1477 mlxsw_sp_fdb_notify_mac_process(mlxsw_sp, sfn_pl,
1478 rec_index, false);
1479 break;
8a1ab5d7
JP
1480 case MLXSW_REG_SFN_REC_TYPE_LEARNED_MAC_LAG:
1481 mlxsw_sp_fdb_notify_mac_lag_process(mlxsw_sp, sfn_pl,
1482 rec_index, true);
1483 break;
1484 case MLXSW_REG_SFN_REC_TYPE_AGED_OUT_MAC_LAG:
1485 mlxsw_sp_fdb_notify_mac_lag_process(mlxsw_sp, sfn_pl,
1486 rec_index, false);
1487 break;
56ade8fe
JP
1488 }
1489}
1490
1491static void mlxsw_sp_fdb_notify_work_schedule(struct mlxsw_sp *mlxsw_sp)
1492{
dd9bdb04
JP
1493 mlxsw_core_schedule_dw(&mlxsw_sp->fdb_notify.dw,
1494 msecs_to_jiffies(mlxsw_sp->fdb_notify.interval));
56ade8fe
JP
1495}
1496
1497static void mlxsw_sp_fdb_notify_work(struct work_struct *work)
1498{
1499 struct mlxsw_sp *mlxsw_sp;
1500 char *sfn_pl;
1501 u8 num_rec;
1502 int i;
1503 int err;
1504
1505 sfn_pl = kmalloc(MLXSW_REG_SFN_LEN, GFP_KERNEL);
1506 if (!sfn_pl)
1507 return;
1508
1509 mlxsw_sp = container_of(work, struct mlxsw_sp, fdb_notify.dw.work);
1510
4f2c6ae5 1511 rtnl_lock();
56ade8fe
JP
1512 do {
1513 mlxsw_reg_sfn_pack(sfn_pl);
1514 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(sfn), sfn_pl);
1515 if (err) {
1516 dev_err_ratelimited(mlxsw_sp->bus_info->dev, "Failed to get FDB notifications\n");
1517 break;
1518 }
1519 num_rec = mlxsw_reg_sfn_num_rec_get(sfn_pl);
1520 for (i = 0; i < num_rec; i++)
1521 mlxsw_sp_fdb_notify_rec_process(mlxsw_sp, sfn_pl, i);
1522
1523 } while (num_rec);
4f2c6ae5 1524 rtnl_unlock();
56ade8fe
JP
1525
1526 kfree(sfn_pl);
1527 mlxsw_sp_fdb_notify_work_schedule(mlxsw_sp);
1528}
1529
1530static int mlxsw_sp_fdb_init(struct mlxsw_sp *mlxsw_sp)
1531{
1532 int err;
1533
1534 err = mlxsw_sp_ageing_set(mlxsw_sp, MLXSW_SP_DEFAULT_AGEING_TIME);
1535 if (err) {
1536 dev_err(mlxsw_sp->bus_info->dev, "Failed to set default ageing time\n");
1537 return err;
1538 }
1539 INIT_DELAYED_WORK(&mlxsw_sp->fdb_notify.dw, mlxsw_sp_fdb_notify_work);
1540 mlxsw_sp->fdb_notify.interval = MLXSW_SP_DEFAULT_LEARNING_INTERVAL;
1541 mlxsw_sp_fdb_notify_work_schedule(mlxsw_sp);
1542 return 0;
1543}
1544
1545static void mlxsw_sp_fdb_fini(struct mlxsw_sp *mlxsw_sp)
1546{
1547 cancel_delayed_work_sync(&mlxsw_sp->fdb_notify.dw);
1548}
1549
56ade8fe
JP
1550int mlxsw_sp_switchdev_init(struct mlxsw_sp *mlxsw_sp)
1551{
1552 return mlxsw_sp_fdb_init(mlxsw_sp);
1553}
1554
1555void mlxsw_sp_switchdev_fini(struct mlxsw_sp *mlxsw_sp)
1556{
1557 mlxsw_sp_fdb_fini(mlxsw_sp);
56ade8fe
JP
1558}
1559
1560int mlxsw_sp_port_vlan_init(struct mlxsw_sp_port *mlxsw_sp_port)
1561{
1562 struct net_device *dev = mlxsw_sp_port->dev;
1563 int err;
1564
1565 /* Allow only untagged packets to ingress and tag them internally
1566 * with VID 1.
1567 */
1568 mlxsw_sp_port->pvid = 1;
29edf44f
ER
1569 err = __mlxsw_sp_port_vlans_del(mlxsw_sp_port, 0, VLAN_N_VID - 1,
1570 true);
56ade8fe
JP
1571 if (err) {
1572 netdev_err(dev, "Unable to init VLANs\n");
1573 return err;
1574 }
1575
1576 /* Add implicit VLAN interface in the device, so that untagged
1577 * packets will be classified to the default vFID.
1578 */
1579 err = mlxsw_sp_port_add_vid(dev, 0, 1);
1580 if (err)
1581 netdev_err(dev, "Failed to configure default vFID\n");
1582
1583 return err;
1584}
1585
1586void mlxsw_sp_port_switchdev_init(struct mlxsw_sp_port *mlxsw_sp_port)
1587{
1588 mlxsw_sp_port->dev->switchdev_ops = &mlxsw_sp_port_switchdev_ops;
1589}
1590
1591void mlxsw_sp_port_switchdev_fini(struct mlxsw_sp_port *mlxsw_sp_port)
1592{
1593}