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mlxsw: spectrum: Split vFID range in two
[mirror_ubuntu-bionic-kernel.git] / drivers / net / ethernet / mellanox / mlxsw / spectrum_switchdev.c
CommitLineData
56ade8fe
JP		 1/*
2 * drivers/net/ethernet/mellanox/mlxsw/spectrum_switchdev.c
3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. Neither the names of the copyright holders nor the names of its
17 * contributors may be used to endorse or promote products derived from
18 * this software without specific prior written permission.
19 *
20 * Alternatively, this software may be distributed under the terms of the
21 * GNU General Public License ("GPL") version 2 as published by the Free
22 * Software Foundation.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37#include <linux/kernel.h>
38#include <linux/types.h>
39#include <linux/netdevice.h>
40#include <linux/etherdevice.h>
41#include <linux/slab.h>
42#include <linux/device.h>
43#include <linux/skbuff.h>
44#include <linux/if_vlan.h>
45#include <linux/if_bridge.h>
46#include <linux/workqueue.h>
47#include <linux/jiffies.h>
48#include <net/switchdev.h>
49
50#include "spectrum.h"
51#include "core.h"
52#include "reg.h"
53
54static int mlxsw_sp_port_attr_get(struct net_device *dev,
55 struct switchdev_attr *attr)
56{
57 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
58 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
59
60 switch (attr->id) {
61 case SWITCHDEV_ATTR_ID_PORT_PARENT_ID:
62 attr->u.ppid.id_len = sizeof(mlxsw_sp->base_mac);
63 memcpy(&attr->u.ppid.id, &mlxsw_sp->base_mac,
64 attr->u.ppid.id_len);
65 break;
66 case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS:
67 attr->u.brport_flags =
68 (mlxsw_sp_port->learning ? BR_LEARNING : 0) |
0293038e
IS		 69 (mlxsw_sp_port->learning_sync ? BR_LEARNING_SYNC : 0) |
70 (mlxsw_sp_port->uc_flood ? BR_FLOOD : 0);
56ade8fe
JP		 71 break;
72 default:
73 return -EOPNOTSUPP;
74 }
75
76 return 0;
77}
78
79static int mlxsw_sp_port_stp_state_set(struct mlxsw_sp_port *mlxsw_sp_port,
80 u8 state)
81{
82 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
83 enum mlxsw_reg_spms_state spms_state;
84 char *spms_pl;
85 u16 vid;
86 int err;
87
88 switch (state) {
89 case BR_STATE_DISABLED: /* fall-through */
90 case BR_STATE_FORWARDING:
91 spms_state = MLXSW_REG_SPMS_STATE_FORWARDING;
92 break;
93 case BR_STATE_LISTENING: /* fall-through */
94 case BR_STATE_LEARNING:
95 spms_state = MLXSW_REG_SPMS_STATE_LEARNING;
96 break;
97 case BR_STATE_BLOCKING:
98 spms_state = MLXSW_REG_SPMS_STATE_DISCARDING;
99 break;
100 default:
101 BUG();
102 }
103
104 spms_pl = kmalloc(MLXSW_REG_SPMS_LEN, GFP_KERNEL);
105 if (!spms_pl)
106 return -ENOMEM;
107 mlxsw_reg_spms_pack(spms_pl, mlxsw_sp_port->local_port);
108 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID)
109 mlxsw_reg_spms_vid_pack(spms_pl, vid, spms_state);
110
111 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spms), spms_pl);
112 kfree(spms_pl);
113 return err;
114}
115
116static int mlxsw_sp_port_attr_stp_state_set(struct mlxsw_sp_port *mlxsw_sp_port,
117 struct switchdev_trans *trans,
118 u8 state)
119{
120 if (switchdev_trans_ph_prepare(trans))
121 return 0;
122
123 mlxsw_sp_port->stp_state = state;
124 return mlxsw_sp_port_stp_state_set(mlxsw_sp_port, state);
125}
126
0293038e
IS		 127static int __mlxsw_sp_port_flood_set(struct mlxsw_sp_port *mlxsw_sp_port,
128 u16 fid_begin, u16 fid_end, bool set,
129 bool only_uc)
130{
131 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
7f71eb46
IS		 132 u16 local_port = mlxsw_sp_port->local_port;
133 enum mlxsw_flood_table_type table_type;
0293038e
IS		 134 u16 range = fid_end - fid_begin + 1;
135 char *sftr_pl;
136 int err;
137
7f71eb46
IS		 138 if (mlxsw_sp_port_is_vport(mlxsw_sp_port)) {
139 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID;
140 local_port = MLXSW_PORT_CPU_PORT;
141 } else {
142 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST;
143 }
144
0293038e
IS		 145 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL);
146 if (!sftr_pl)
147 return -ENOMEM;
148
149 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_UC, fid_begin,
7f71eb46 150 table_type, range, local_port, set);
0293038e
IS		 151 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
152 if (err)
153 goto buffer_out;
154
155 /* Flooding control allows one to decide whether a given port will
156 * flood unicast traffic for which there is no FDB entry.
157 */
158 if (only_uc)
159 goto buffer_out;
160
161 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, fid_begin,
7f71eb46 162 table_type, range, local_port, set);
0293038e
IS		 163 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl);
164
165buffer_out:
166 kfree(sftr_pl);
167 return err;
168}
169
170static int mlxsw_sp_port_uc_flood_set(struct mlxsw_sp_port *mlxsw_sp_port,
171 bool set)
172{
173 struct net_device *dev = mlxsw_sp_port->dev;
174 u16 vid, last_visited_vid;
175 int err;
176
177 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
178 err = __mlxsw_sp_port_flood_set(mlxsw_sp_port, vid, vid, set,
179 true);
180 if (err) {
181 last_visited_vid = vid;
182 goto err_port_flood_set;
183 }
184 }
185
186 return 0;
187
188err_port_flood_set:
189 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid)
190 __mlxsw_sp_port_flood_set(mlxsw_sp_port, vid, vid, !set, true);
191 netdev_err(dev, "Failed to configure unicast flooding\n");
192 return err;
193}
194
7f71eb46
IS		 195int mlxsw_sp_vport_flood_set(struct mlxsw_sp_port *mlxsw_sp_vport, u16 vfid,
196 bool set)
197{
198 /* In case of vFIDs, index into the flooding table is relative to
199 * the start of the vFIDs range.
200 */
201 return __mlxsw_sp_port_flood_set(mlxsw_sp_vport, vfid, vfid, set, true);
202}
203
56ade8fe
JP		 204static int mlxsw_sp_port_attr_br_flags_set(struct mlxsw_sp_port *mlxsw_sp_port,
205 struct switchdev_trans *trans,
206 unsigned long brport_flags)
207{
0293038e
IS		 208 unsigned long uc_flood = mlxsw_sp_port->uc_flood ? BR_FLOOD : 0;
209 bool set;
210 int err;
211
56ade8fe
JP		 212 if (switchdev_trans_ph_prepare(trans))
213 return 0;
214
0293038e
IS		 215 if ((uc_flood ^ brport_flags) & BR_FLOOD) {
216 set = mlxsw_sp_port->uc_flood ? false : true;
217 err = mlxsw_sp_port_uc_flood_set(mlxsw_sp_port, set);
218 if (err)
219 return err;
220 }
221
222 mlxsw_sp_port->uc_flood = brport_flags & BR_FLOOD ? 1 : 0;
56ade8fe
JP		 223 mlxsw_sp_port->learning = brport_flags & BR_LEARNING ? 1 : 0;
224 mlxsw_sp_port->learning_sync = brport_flags & BR_LEARNING_SYNC ? 1 : 0;
0293038e 225
56ade8fe
JP		 226 return 0;
227}
228
229static int mlxsw_sp_ageing_set(struct mlxsw_sp *mlxsw_sp, u32 ageing_time)
230{
231 char sfdat_pl[MLXSW_REG_SFDAT_LEN];
232 int err;
233
234 mlxsw_reg_sfdat_pack(sfdat_pl, ageing_time);
235 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdat), sfdat_pl);
236 if (err)
237 return err;
238 mlxsw_sp->ageing_time = ageing_time;
239 return 0;
240}
241
242static int mlxsw_sp_port_attr_br_ageing_set(struct mlxsw_sp_port *mlxsw_sp_port,
243 struct switchdev_trans *trans,
135f9ece 244 unsigned long ageing_clock_t)
56ade8fe
JP		 245{
246 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
135f9ece 247 unsigned long ageing_jiffies = clock_t_to_jiffies(ageing_clock_t);
56ade8fe
JP		 248 u32 ageing_time = jiffies_to_msecs(ageing_jiffies) / 1000;
249
250 if (switchdev_trans_ph_prepare(trans))
251 return 0;
252
253 return mlxsw_sp_ageing_set(mlxsw_sp, ageing_time);
254}
255
256static int mlxsw_sp_port_attr_set(struct net_device *dev,
257 const struct switchdev_attr *attr,
258 struct switchdev_trans *trans)
259{
260 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
261 int err = 0;
262
263 switch (attr->id) {
264 case SWITCHDEV_ATTR_ID_PORT_STP_STATE:
265 err = mlxsw_sp_port_attr_stp_state_set(mlxsw_sp_port, trans,
266 attr->u.stp_state);
267 break;
268 case SWITCHDEV_ATTR_ID_PORT_BRIDGE_FLAGS:
269 err = mlxsw_sp_port_attr_br_flags_set(mlxsw_sp_port, trans,
270 attr->u.brport_flags);
271 break;
272 case SWITCHDEV_ATTR_ID_BRIDGE_AGEING_TIME:
273 err = mlxsw_sp_port_attr_br_ageing_set(mlxsw_sp_port, trans,
274 attr->u.ageing_time);
275 break;
276 default:
277 err = -EOPNOTSUPP;
278 break;
279 }
280
281 return err;
282}
283
284static int mlxsw_sp_port_pvid_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid)
285{
286 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
287 char spvid_pl[MLXSW_REG_SPVID_LEN];
288
289 mlxsw_reg_spvid_pack(spvid_pl, mlxsw_sp_port->local_port, vid);
290 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvid), spvid_pl);
291}
292
293static int mlxsw_sp_fid_create(struct mlxsw_sp *mlxsw_sp, u16 fid)
294{
295 char sfmr_pl[MLXSW_REG_SFMR_LEN];
296 int err;
297
298 mlxsw_reg_sfmr_pack(sfmr_pl, MLXSW_REG_SFMR_OP_CREATE_FID, fid, fid);
299 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
300
301 if (err)
302 return err;
303
304 set_bit(fid, mlxsw_sp->active_fids);
305 return 0;
306}
307
308static void mlxsw_sp_fid_destroy(struct mlxsw_sp *mlxsw_sp, u16 fid)
309{
310 char sfmr_pl[MLXSW_REG_SFMR_LEN];
311
312 clear_bit(fid, mlxsw_sp->active_fids);
313
314 mlxsw_reg_sfmr_pack(sfmr_pl, MLXSW_REG_SFMR_OP_DESTROY_FID,
315 fid, fid);
316 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl);
317}
318
319static int mlxsw_sp_port_fid_map(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
320{
321 enum mlxsw_reg_svfa_mt mt;
322
7f71eb46 323 if (!list_empty(&mlxsw_sp_port->vports_list))
56ade8fe
JP		 324 mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
325 else
326 mt = MLXSW_REG_SVFA_MT_VID_TO_FID;
327
328 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, fid, fid);
329}
330
331static int mlxsw_sp_port_fid_unmap(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid)
332{
333 enum mlxsw_reg_svfa_mt mt;
334
7f71eb46 335 if (list_empty(&mlxsw_sp_port->vports_list))
56ade8fe
JP		 336 return 0;
337
338 mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID;
339 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, fid, fid);
340}
341
56ade8fe
JP		 342static int mlxsw_sp_port_add_vids(struct net_device *dev, u16 vid_begin,
343 u16 vid_end)
344{
345 u16 vid;
346 int err;
347
348 for (vid = vid_begin; vid <= vid_end; vid++) {
349 err = mlxsw_sp_port_add_vid(dev, 0, vid);
350 if (err)
351 goto err_port_add_vid;
352 }
353 return 0;
354
355err_port_add_vid:
356 for (vid--; vid >= vid_begin; vid--)
357 mlxsw_sp_port_kill_vid(dev, 0, vid);
358 return err;
359}
360
3b7ad5ec
IS		 361static int __mlxsw_sp_port_vlans_set(struct mlxsw_sp_port *mlxsw_sp_port,
362 u16 vid_begin, u16 vid_end, bool is_member,
363 bool untagged)
364{
365 u16 vid, vid_e;
366 int err;
367
368 for (vid = vid_begin; vid <= vid_end;
369 vid += MLXSW_REG_SPVM_REC_MAX_COUNT) {
370 vid_e = min((u16) (vid + MLXSW_REG_SPVM_REC_MAX_COUNT - 1),
371 vid_end);
372
373 err = mlxsw_sp_port_vlan_set(mlxsw_sp_port, vid, vid_e,
374 is_member, untagged);
375 if (err)
376 return err;
377 }
378
379 return 0;
380}
381
56ade8fe
JP		 382static int __mlxsw_sp_port_vlans_add(struct mlxsw_sp_port *mlxsw_sp_port,
383 u16 vid_begin, u16 vid_end,
384 bool flag_untagged, bool flag_pvid)
385{
386 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
387 struct net_device *dev = mlxsw_sp_port->dev;
b07a966c 388 u16 vid, last_visited_vid, old_pvid;
56ade8fe 389 enum mlxsw_reg_svfa_mt mt;
56ade8fe
JP		 390 int err;
391
392 /* In case this is invoked with BRIDGE_FLAGS_SELF and port is
393 * not bridged, then packets ingressing through the port with
394 * the specified VIDs will be directed to CPU.
395 */
396 if (!mlxsw_sp_port->bridged)
397 return mlxsw_sp_port_add_vids(dev, vid_begin, vid_end);
398
399 for (vid = vid_begin; vid <= vid_end; vid++) {
400 if (!test_bit(vid, mlxsw_sp->active_fids)) {
401 err = mlxsw_sp_fid_create(mlxsw_sp, vid);
402 if (err) {
403 netdev_err(dev, "Failed to create FID=%d\n",
404 vid);
405 return err;
406 }
407
408 /* When creating a FID, we set a VID to FID mapping
409 * regardless of the port's mode.
410 */
411 mt = MLXSW_REG_SVFA_MT_VID_TO_FID;
412 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt,
413 true, vid, vid);
414 if (err) {
415 netdev_err(dev, "Failed to create FID=VID=%d mapping\n",
416 vid);
b07a966c 417 goto err_port_vid_to_fid_set;
56ade8fe
JP		 418 }
419 }
b07a966c 420 }
56ade8fe 421
b07a966c
IS		 422 /* Set FID mapping according to port's mode */
423 for (vid = vid_begin; vid <= vid_end; vid++) {
56ade8fe
JP		 424 err = mlxsw_sp_port_fid_map(mlxsw_sp_port, vid);
425 if (err) {
426 netdev_err(dev, "Failed to map FID=%d", vid);
b07a966c
IS		 427 last_visited_vid = --vid;
428 goto err_port_fid_map;
56ade8fe 429 }
1b3433a9 430 }
56ade8fe 431
1b3433a9
IS		 432 err = __mlxsw_sp_port_flood_set(mlxsw_sp_port, vid_begin, vid_end,
433 true, false);
434 if (err) {
435 netdev_err(dev, "Failed to configure flooding\n");
b07a966c 436 goto err_port_flood_set;
56ade8fe
JP		 437 }
438
3b7ad5ec
IS		 439 err = __mlxsw_sp_port_vlans_set(mlxsw_sp_port, vid_begin, vid_end,
440 true, flag_untagged);
441 if (err) {
442 netdev_err(dev, "Unable to add VIDs %d-%d\n", vid_begin,
443 vid_end);
b07a966c 444 goto err_port_vlans_set;
56ade8fe
JP		 445 }
446
b07a966c
IS		 447 old_pvid = mlxsw_sp_port->pvid;
448 if (flag_pvid && old_pvid != vid_begin) {
449 err = mlxsw_sp_port_pvid_set(mlxsw_sp_port, vid_begin);
56ade8fe 450 if (err) {
b07a966c
IS		 451 netdev_err(dev, "Unable to add PVID %d\n", vid_begin);
452 goto err_port_pvid_set;
56ade8fe 453 }
b07a966c 454 mlxsw_sp_port->pvid = vid_begin;
56ade8fe
JP		 455 }
456
457 /* Changing activity bits only if HW operation succeded */
458 for (vid = vid_begin; vid <= vid_end; vid++)
459 set_bit(vid, mlxsw_sp_port->active_vlans);
460
b07a966c
IS		 461 /* STP state change must be done after we set active VLANs */
462 err = mlxsw_sp_port_stp_state_set(mlxsw_sp_port,
463 mlxsw_sp_port->stp_state);
464 if (err) {
465 netdev_err(dev, "Failed to set STP state\n");
466 goto err_port_stp_state_set;
467 }
468
469 return 0;
470
471err_port_vid_to_fid_set:
472 mlxsw_sp_fid_destroy(mlxsw_sp, vid);
473 return err;
474
475err_port_stp_state_set:
476 for (vid = vid_begin; vid <= vid_end; vid++)
477 clear_bit(vid, mlxsw_sp_port->active_vlans);
478 if (old_pvid != mlxsw_sp_port->pvid)
479 mlxsw_sp_port_pvid_set(mlxsw_sp_port, old_pvid);
480err_port_pvid_set:
481 __mlxsw_sp_port_vlans_set(mlxsw_sp_port, vid_begin, vid_end, false,
482 false);
483err_port_vlans_set:
484 __mlxsw_sp_port_flood_set(mlxsw_sp_port, vid_begin, vid_end, false,
485 false);
486err_port_flood_set:
487 last_visited_vid = vid_end;
488err_port_fid_map:
489 for (vid = last_visited_vid; vid >= vid_begin; vid--)
490 mlxsw_sp_port_fid_unmap(mlxsw_sp_port, vid);
491 return err;
56ade8fe
JP		 492}
493
494static int mlxsw_sp_port_vlans_add(struct mlxsw_sp_port *mlxsw_sp_port,
495 const struct switchdev_obj_port_vlan *vlan,
496 struct switchdev_trans *trans)
497{
498 bool untagged_flag = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED;
499 bool pvid_flag = vlan->flags & BRIDGE_VLAN_INFO_PVID;
500
501 if (switchdev_trans_ph_prepare(trans))
502 return 0;
503
504 return __mlxsw_sp_port_vlans_add(mlxsw_sp_port,
505 vlan->vid_begin, vlan->vid_end,
506 untagged_flag, pvid_flag);
507}
508
8a1ab5d7 509static enum mlxsw_reg_sfd_rec_policy mlxsw_sp_sfd_rec_policy(bool dynamic)
56ade8fe 510{
8a1ab5d7
JP		 511 return dynamic ? MLXSW_REG_SFD_REC_POLICY_DYNAMIC_ENTRY_INGRESS :
512 MLXSW_REG_SFD_REC_POLICY_STATIC_ENTRY;
513}
514
515static enum mlxsw_reg_sfd_op mlxsw_sp_sfd_op(bool adding)
516{
517 return adding ? MLXSW_REG_SFD_OP_WRITE_EDIT :
518 MLXSW_REG_SFD_OP_WRITE_REMOVE;
519}
520
521static int mlxsw_sp_port_fdb_uc_op(struct mlxsw_sp_port *mlxsw_sp_port,
522 const char *mac, u16 vid, bool adding,
523 bool dynamic)
524{
525 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
56ade8fe
JP		 526 char *sfd_pl;
527 int err;
528
56ade8fe
JP		 529 sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL);
530 if (!sfd_pl)
531 return -ENOMEM;
532
8a1ab5d7
JP		 533 mlxsw_reg_sfd_pack(sfd_pl, mlxsw_sp_sfd_op(adding), 0);
534 mlxsw_reg_sfd_uc_pack(sfd_pl, 0, mlxsw_sp_sfd_rec_policy(dynamic),
56ade8fe
JP		 535 mac, vid, MLXSW_REG_SFD_REC_ACTION_NOP,
536 mlxsw_sp_port->local_port);
8a1ab5d7
JP		 537 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl);
538 kfree(sfd_pl);
539
540 return err;
541}
542
543static int mlxsw_sp_port_fdb_uc_lag_op(struct mlxsw_sp *mlxsw_sp, u16 lag_id,
544 const char *mac, u16 vid, bool adding,
545 bool dynamic)
546{
547 char *sfd_pl;
548 int err;
549
550 sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL);
551 if (!sfd_pl)
552 return -ENOMEM;
553
554 mlxsw_reg_sfd_pack(sfd_pl, mlxsw_sp_sfd_op(adding), 0);
555 mlxsw_reg_sfd_uc_lag_pack(sfd_pl, 0, mlxsw_sp_sfd_rec_policy(dynamic),
556 mac, vid, MLXSW_REG_SFD_REC_ACTION_NOP,
557 lag_id);
558 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl);
56ade8fe
JP		 559 kfree(sfd_pl);
560
561 return err;
562}
563
564static int
565mlxsw_sp_port_fdb_static_add(struct mlxsw_sp_port *mlxsw_sp_port,
566 const struct switchdev_obj_port_fdb *fdb,
567 struct switchdev_trans *trans)
568{
8a1ab5d7
JP		 569 u16 vid = fdb->vid;
570
56ade8fe
JP		 571 if (switchdev_trans_ph_prepare(trans))
572 return 0;
573
8a1ab5d7
JP		 574 if (!vid)
575 vid = mlxsw_sp_port->pvid;
576
577 if (!mlxsw_sp_port->lagged)
578 return mlxsw_sp_port_fdb_uc_op(mlxsw_sp_port,
579 fdb->addr, vid, true, false);
580 else
581 return mlxsw_sp_port_fdb_uc_lag_op(mlxsw_sp_port->mlxsw_sp,
582 mlxsw_sp_port->lag_id,
583 fdb->addr, vid, true, false);
56ade8fe
JP		 584}
585
586static int mlxsw_sp_port_obj_add(struct net_device *dev,
587 const struct switchdev_obj *obj,
588 struct switchdev_trans *trans)
589{
590 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
591 int err = 0;
592
593 switch (obj->id) {
594 case SWITCHDEV_OBJ_ID_PORT_VLAN:
595 err = mlxsw_sp_port_vlans_add(mlxsw_sp_port,
596 SWITCHDEV_OBJ_PORT_VLAN(obj),
597 trans);
598 break;
599 case SWITCHDEV_OBJ_ID_PORT_FDB:
600 err = mlxsw_sp_port_fdb_static_add(mlxsw_sp_port,
601 SWITCHDEV_OBJ_PORT_FDB(obj),
602 trans);
603 break;
604 default:
605 err = -EOPNOTSUPP;
606 break;
607 }
608
609 return err;
610}
611
612static int mlxsw_sp_port_kill_vids(struct net_device *dev, u16 vid_begin,
613 u16 vid_end)
614{
615 u16 vid;
616 int err;
617
618 for (vid = vid_begin; vid <= vid_end; vid++) {
619 err = mlxsw_sp_port_kill_vid(dev, 0, vid);
620 if (err)
621 return err;
622 }
623
624 return 0;
625}
626
627static int __mlxsw_sp_port_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port,
628 u16 vid_begin, u16 vid_end, bool init)
629{
630 struct net_device *dev = mlxsw_sp_port->dev;
3b7ad5ec 631 u16 vid, pvid;
56ade8fe
JP		 632 int err;
633
634 /* In case this is invoked with BRIDGE_FLAGS_SELF and port is
635 * not bridged, then prevent packets ingressing through the
636 * port with the specified VIDs from being trapped to CPU.
637 */
638 if (!init && !mlxsw_sp_port->bridged)
639 return mlxsw_sp_port_kill_vids(dev, vid_begin, vid_end);
640
3b7ad5ec
IS		 641 err = __mlxsw_sp_port_vlans_set(mlxsw_sp_port, vid_begin, vid_end,
642 false, false);
643 if (err) {
644 netdev_err(dev, "Unable to del VIDs %d-%d\n", vid_begin,
645 vid_end);
646 return err;
56ade8fe
JP		 647 }
648
06c071f6
IS		 649 pvid = mlxsw_sp_port->pvid;
650 if (pvid >= vid_begin && pvid <= vid_end && pvid != 1) {
56ade8fe 651 /* Default VLAN is always 1 */
06c071f6 652 err = mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1);
56ade8fe 653 if (err) {
06c071f6 654 netdev_err(dev, "Unable to del PVID %d\n", pvid);
56ade8fe
JP		 655 return err;
656 }
06c071f6 657 mlxsw_sp_port->pvid = 1;
56ade8fe
JP		 658 }
659
660 if (init)
661 goto out;
662
1b3433a9
IS		 663 err = __mlxsw_sp_port_flood_set(mlxsw_sp_port, vid_begin, vid_end,
664 false, false);
665 if (err) {
666 netdev_err(dev, "Failed to clear flooding\n");
667 return err;
668 }
56ade8fe 669
1b3433a9 670 for (vid = vid_begin; vid <= vid_end; vid++) {
56ade8fe
JP		 671 /* Remove FID mapping in case of Virtual mode */
672 err = mlxsw_sp_port_fid_unmap(mlxsw_sp_port, vid);
673 if (err) {
674 netdev_err(dev, "Failed to unmap FID=%d", vid);
675 return err;
676 }
677 }
678
679out:
680 /* Changing activity bits only if HW operation succeded */
681 for (vid = vid_begin; vid <= vid_end; vid++)
682 clear_bit(vid, mlxsw_sp_port->active_vlans);
683
684 return 0;
685}
686
687static int mlxsw_sp_port_vlans_del(struct mlxsw_sp_port *mlxsw_sp_port,
688 const struct switchdev_obj_port_vlan *vlan)
689{
690 return __mlxsw_sp_port_vlans_del(mlxsw_sp_port,
691 vlan->vid_begin, vlan->vid_end, false);
692}
693
694static int
695mlxsw_sp_port_fdb_static_del(struct mlxsw_sp_port *mlxsw_sp_port,
696 const struct switchdev_obj_port_fdb *fdb)
697{
8a1ab5d7
JP		 698 if (!mlxsw_sp_port->lagged)
699 return mlxsw_sp_port_fdb_uc_op(mlxsw_sp_port,
700 fdb->addr, fdb->vid,
701 false, false);
702 else
703 return mlxsw_sp_port_fdb_uc_lag_op(mlxsw_sp_port->mlxsw_sp,
704 mlxsw_sp_port->lag_id,
705 fdb->addr, fdb->vid,
706 false, false);
56ade8fe
JP		 707}
708
709static int mlxsw_sp_port_obj_del(struct net_device *dev,
710 const struct switchdev_obj *obj)
711{
712 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
713 int err = 0;
714
715 switch (obj->id) {
716 case SWITCHDEV_OBJ_ID_PORT_VLAN:
717 err = mlxsw_sp_port_vlans_del(mlxsw_sp_port,
718 SWITCHDEV_OBJ_PORT_VLAN(obj));
719 break;
720 case SWITCHDEV_OBJ_ID_PORT_FDB:
721 err = mlxsw_sp_port_fdb_static_del(mlxsw_sp_port,
722 SWITCHDEV_OBJ_PORT_FDB(obj));
723 break;
724 default:
725 err = -EOPNOTSUPP;
726 break;
727 }
728
729 return err;
730}
731
8a1ab5d7
JP		 732static struct mlxsw_sp_port *mlxsw_sp_lag_rep_port(struct mlxsw_sp *mlxsw_sp,
733 u16 lag_id)
734{
735 struct mlxsw_sp_port *mlxsw_sp_port;
736 int i;
737
738 for (i = 0; i < MLXSW_SP_PORT_PER_LAG_MAX; i++) {
739 mlxsw_sp_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i);
740 if (mlxsw_sp_port)
741 return mlxsw_sp_port;
742 }
743 return NULL;
744}
745
56ade8fe
JP		 746static int mlxsw_sp_port_fdb_dump(struct mlxsw_sp_port *mlxsw_sp_port,
747 struct switchdev_obj_port_fdb *fdb,
748 switchdev_obj_dump_cb_t *cb)
749{
8a1ab5d7 750 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp;
56ade8fe
JP		 751 char *sfd_pl;
752 char mac[ETH_ALEN];
753 u16 vid;
754 u8 local_port;
8a1ab5d7 755 u16 lag_id;
56ade8fe
JP		 756 u8 num_rec;
757 int stored_err = 0;
758 int i;
759 int err;
760
761 sfd_pl = kmalloc(MLXSW_REG_SFD_LEN, GFP_KERNEL);
762 if (!sfd_pl)
763 return -ENOMEM;
764
765 mlxsw_reg_sfd_pack(sfd_pl, MLXSW_REG_SFD_OP_QUERY_DUMP, 0);
766 do {
767 mlxsw_reg_sfd_num_rec_set(sfd_pl, MLXSW_REG_SFD_REC_MAX_COUNT);
8a1ab5d7 768 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(sfd), sfd_pl);
56ade8fe
JP		 769 if (err)
770 goto out;
771
772 num_rec = mlxsw_reg_sfd_num_rec_get(sfd_pl);
773
774 /* Even in case of error, we have to run the dump to the end
775 * so the session in firmware is finished.
776 */
777 if (stored_err)
778 continue;
779
780 for (i = 0; i < num_rec; i++) {
781 switch (mlxsw_reg_sfd_rec_type_get(sfd_pl, i)) {
782 case MLXSW_REG_SFD_REC_TYPE_UNICAST:
783 mlxsw_reg_sfd_uc_unpack(sfd_pl, i, mac, &vid,
784 &local_port);
785 if (local_port == mlxsw_sp_port->local_port) {
786 ether_addr_copy(fdb->addr, mac);
787 fdb->ndm_state = NUD_REACHABLE;
788 fdb->vid = vid;
789 err = cb(&fdb->obj);
790 if (err)
791 stored_err = err;
792 }
8a1ab5d7
JP		 793 break;
794 case MLXSW_REG_SFD_REC_TYPE_UNICAST_LAG:
795 mlxsw_reg_sfd_uc_lag_unpack(sfd_pl, i,
796 mac, &vid, &lag_id);
797 if (mlxsw_sp_port ==
798 mlxsw_sp_lag_rep_port(mlxsw_sp, lag_id)) {
799 ether_addr_copy(fdb->addr, mac);
800 fdb->ndm_state = NUD_REACHABLE;
801 fdb->vid = vid;
802 err = cb(&fdb->obj);
803 if (err)
804 stored_err = err;
805 }
806 break;
56ade8fe
JP		 807 }
808 }
809 } while (num_rec == MLXSW_REG_SFD_REC_MAX_COUNT);
810
811out:
812 kfree(sfd_pl);
813 return stored_err ? stored_err : err;
814}
815
816static int mlxsw_sp_port_vlan_dump(struct mlxsw_sp_port *mlxsw_sp_port,
817 struct switchdev_obj_port_vlan *vlan,
818 switchdev_obj_dump_cb_t *cb)
819{
820 u16 vid;
821 int err = 0;
822
823 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) {
824 vlan->flags = 0;
825 if (vid == mlxsw_sp_port->pvid)
826 vlan->flags |= BRIDGE_VLAN_INFO_PVID;
827 vlan->vid_begin = vid;
828 vlan->vid_end = vid;
829 err = cb(&vlan->obj);
830 if (err)
831 break;
832 }
833 return err;
834}
835
836static int mlxsw_sp_port_obj_dump(struct net_device *dev,
837 struct switchdev_obj *obj,
838 switchdev_obj_dump_cb_t *cb)
839{
840 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev);
841 int err = 0;
842
843 switch (obj->id) {
844 case SWITCHDEV_OBJ_ID_PORT_VLAN:
845 err = mlxsw_sp_port_vlan_dump(mlxsw_sp_port,
846 SWITCHDEV_OBJ_PORT_VLAN(obj), cb);
847 break;
848 case SWITCHDEV_OBJ_ID_PORT_FDB:
849 err = mlxsw_sp_port_fdb_dump(mlxsw_sp_port,
850 SWITCHDEV_OBJ_PORT_FDB(obj), cb);
851 break;
852 default:
853 err = -EOPNOTSUPP;
854 break;
855 }
856
857 return err;
858}
859
c7070fc4 860static const struct switchdev_ops mlxsw_sp_port_switchdev_ops = {
56ade8fe
JP		 861 .switchdev_port_attr_get = mlxsw_sp_port_attr_get,
862 .switchdev_port_attr_set = mlxsw_sp_port_attr_set,
863 .switchdev_port_obj_add = mlxsw_sp_port_obj_add,
864 .switchdev_port_obj_del = mlxsw_sp_port_obj_del,
865 .switchdev_port_obj_dump = mlxsw_sp_port_obj_dump,
866};
867
8a1ab5d7
JP		 868static void mlxsw_sp_fdb_call_notifiers(bool learning, bool learning_sync,
869 bool adding, char *mac, u16 vid,
870 struct net_device *dev)
871{
872 struct switchdev_notifier_fdb_info info;
873 unsigned long notifier_type;
874
875 if (learning && learning_sync) {
876 info.addr = mac;
877 info.vid = vid;
878 notifier_type = adding ? SWITCHDEV_FDB_ADD : SWITCHDEV_FDB_DEL;
879 call_switchdev_notifiers(notifier_type, dev, &info.info);
880 }
881}
882
56ade8fe
JP		 883static void mlxsw_sp_fdb_notify_mac_process(struct mlxsw_sp *mlxsw_sp,
884 char *sfn_pl, int rec_index,
885 bool adding)
886{
887 struct mlxsw_sp_port *mlxsw_sp_port;
888 char mac[ETH_ALEN];
889 u8 local_port;
890 u16 vid;
891 int err;
892
893 mlxsw_reg_sfn_mac_unpack(sfn_pl, rec_index, mac, &vid, &local_port);
894 mlxsw_sp_port = mlxsw_sp->ports[local_port];
895 if (!mlxsw_sp_port) {
896 dev_err_ratelimited(mlxsw_sp->bus_info->dev, "Incorrect local port in FDB notification\n");
897 return;
898 }
899
8a1ab5d7
JP		 900 err = mlxsw_sp_port_fdb_uc_op(mlxsw_sp_port, mac, vid,
901 adding && mlxsw_sp_port->learning, true);
56ade8fe
JP		 902 if (err) {
903 if (net_ratelimit())
904 netdev_err(mlxsw_sp_port->dev, "Failed to set FDB entry\n");
905 return;
906 }
907
8a1ab5d7
JP		 908 mlxsw_sp_fdb_call_notifiers(mlxsw_sp_port->learning,
909 mlxsw_sp_port->learning_sync,
910 adding, mac, vid, mlxsw_sp_port->dev);
911}
56ade8fe 912
8a1ab5d7
JP		 913static void mlxsw_sp_fdb_notify_mac_lag_process(struct mlxsw_sp *mlxsw_sp,
914 char *sfn_pl, int rec_index,
915 bool adding)
916{
917 struct mlxsw_sp_port *mlxsw_sp_port;
918 char mac[ETH_ALEN];
919 u16 lag_id;
920 u16 vid;
921 int err;
922
923 mlxsw_reg_sfn_mac_lag_unpack(sfn_pl, rec_index, mac, &vid, &lag_id);
924 mlxsw_sp_port = mlxsw_sp_lag_rep_port(mlxsw_sp, lag_id);
925 if (!mlxsw_sp_port) {
926 dev_err_ratelimited(mlxsw_sp->bus_info->dev, "Cannot find port representor for LAG\n");
927 return;
56ade8fe 928 }
8a1ab5d7
JP		 929
930 err = mlxsw_sp_port_fdb_uc_lag_op(mlxsw_sp, lag_id, mac, vid,
931 adding && mlxsw_sp_port->learning,
932 true);
933 if (err) {
934 if (net_ratelimit())
935 netdev_err(mlxsw_sp_port->dev, "Failed to set FDB entry\n");
936 return;
937 }
938
939 mlxsw_sp_fdb_call_notifiers(mlxsw_sp_port->learning,
940 mlxsw_sp_port->learning_sync,
941 adding, mac, vid,
942 mlxsw_sp_lag_get(mlxsw_sp, lag_id)->dev);
56ade8fe
JP		 943}
944
945static void mlxsw_sp_fdb_notify_rec_process(struct mlxsw_sp *mlxsw_sp,
946 char *sfn_pl, int rec_index)
947{
948 switch (mlxsw_reg_sfn_rec_type_get(sfn_pl, rec_index)) {
949 case MLXSW_REG_SFN_REC_TYPE_LEARNED_MAC:
950 mlxsw_sp_fdb_notify_mac_process(mlxsw_sp, sfn_pl,
951 rec_index, true);
952 break;
953 case MLXSW_REG_SFN_REC_TYPE_AGED_OUT_MAC:
954 mlxsw_sp_fdb_notify_mac_process(mlxsw_sp, sfn_pl,
955 rec_index, false);
956 break;
8a1ab5d7
JP		 957 case MLXSW_REG_SFN_REC_TYPE_LEARNED_MAC_LAG:
958 mlxsw_sp_fdb_notify_mac_lag_process(mlxsw_sp, sfn_pl,
959 rec_index, true);
960 break;
961 case MLXSW_REG_SFN_REC_TYPE_AGED_OUT_MAC_LAG:
962 mlxsw_sp_fdb_notify_mac_lag_process(mlxsw_sp, sfn_pl,
963 rec_index, false);
964 break;
56ade8fe
JP		 965 }
966}
967
968static void mlxsw_sp_fdb_notify_work_schedule(struct mlxsw_sp *mlxsw_sp)
969{
970 schedule_delayed_work(&mlxsw_sp->fdb_notify.dw,
971 msecs_to_jiffies(mlxsw_sp->fdb_notify.interval));
972}
973
974static void mlxsw_sp_fdb_notify_work(struct work_struct *work)
975{
976 struct mlxsw_sp *mlxsw_sp;
977 char *sfn_pl;
978 u8 num_rec;
979 int i;
980 int err;
981
982 sfn_pl = kmalloc(MLXSW_REG_SFN_LEN, GFP_KERNEL);
983 if (!sfn_pl)
984 return;
985
986 mlxsw_sp = container_of(work, struct mlxsw_sp, fdb_notify.dw.work);
987
988 do {
989 mlxsw_reg_sfn_pack(sfn_pl);
990 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(sfn), sfn_pl);
991 if (err) {
992 dev_err_ratelimited(mlxsw_sp->bus_info->dev, "Failed to get FDB notifications\n");
993 break;
994 }
995 num_rec = mlxsw_reg_sfn_num_rec_get(sfn_pl);
996 for (i = 0; i < num_rec; i++)
997 mlxsw_sp_fdb_notify_rec_process(mlxsw_sp, sfn_pl, i);
998
999 } while (num_rec);
1000
1001 kfree(sfn_pl);
1002 mlxsw_sp_fdb_notify_work_schedule(mlxsw_sp);
1003}
1004
1005static int mlxsw_sp_fdb_init(struct mlxsw_sp *mlxsw_sp)
1006{
1007 int err;
1008
1009 err = mlxsw_sp_ageing_set(mlxsw_sp, MLXSW_SP_DEFAULT_AGEING_TIME);
1010 if (err) {
1011 dev_err(mlxsw_sp->bus_info->dev, "Failed to set default ageing time\n");
1012 return err;
1013 }
1014 INIT_DELAYED_WORK(&mlxsw_sp->fdb_notify.dw, mlxsw_sp_fdb_notify_work);
1015 mlxsw_sp->fdb_notify.interval = MLXSW_SP_DEFAULT_LEARNING_INTERVAL;
1016 mlxsw_sp_fdb_notify_work_schedule(mlxsw_sp);
1017 return 0;
1018}
1019
1020static void mlxsw_sp_fdb_fini(struct mlxsw_sp *mlxsw_sp)
1021{
1022 cancel_delayed_work_sync(&mlxsw_sp->fdb_notify.dw);
1023}
1024
1025static void mlxsw_sp_fids_fini(struct mlxsw_sp *mlxsw_sp)
1026{
1027 u16 fid;
1028
1029 for_each_set_bit(fid, mlxsw_sp->active_fids, VLAN_N_VID)
1030 mlxsw_sp_fid_destroy(mlxsw_sp, fid);
1031}
1032
1033int mlxsw_sp_switchdev_init(struct mlxsw_sp *mlxsw_sp)
1034{
1035 return mlxsw_sp_fdb_init(mlxsw_sp);
1036}
1037
1038void mlxsw_sp_switchdev_fini(struct mlxsw_sp *mlxsw_sp)
1039{
1040 mlxsw_sp_fdb_fini(mlxsw_sp);
1041 mlxsw_sp_fids_fini(mlxsw_sp);
1042}
1043
1044int mlxsw_sp_port_vlan_init(struct mlxsw_sp_port *mlxsw_sp_port)
1045{
1046 struct net_device *dev = mlxsw_sp_port->dev;
1047 int err;
1048
1049 /* Allow only untagged packets to ingress and tag them internally
1050 * with VID 1.
1051 */
1052 mlxsw_sp_port->pvid = 1;
1053 err = __mlxsw_sp_port_vlans_del(mlxsw_sp_port, 0, VLAN_N_VID, true);
1054 if (err) {
1055 netdev_err(dev, "Unable to init VLANs\n");
1056 return err;
1057 }
1058
1059 /* Add implicit VLAN interface in the device, so that untagged
1060 * packets will be classified to the default vFID.
1061 */
1062 err = mlxsw_sp_port_add_vid(dev, 0, 1);
1063 if (err)
1064 netdev_err(dev, "Failed to configure default vFID\n");
1065
1066 return err;
1067}
1068
1069void mlxsw_sp_port_switchdev_init(struct mlxsw_sp_port *mlxsw_sp_port)
1070{
1071 mlxsw_sp_port->dev->switchdev_ops = &mlxsw_sp_port_switchdev_ops;
1072}
1073
1074void mlxsw_sp_port_switchdev_fini(struct mlxsw_sp_port *mlxsw_sp_port)
1075{
1076}
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