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[mirror_ubuntu-zesty-kernel.git] / drivers / net / ethernet / neterion / vxge / vxge-main.c
CommitLineData
703da5a1
RV		 1/******************************************************************************
2* This software may be used and distributed according to the terms of
3* the GNU General Public License (GPL), incorporated herein by reference.
4* Drivers based on or derived from this code fall under the GPL and must
5* retain the authorship, copyright and license notice. This file is not
6* a complete program and may only be used when the entire operating
7* system is licensed under the GPL.
8* See the file COPYING in this distribution for more information.
9*
926bd900 10* vxge-main.c: Driver for Exar Corp's X3100 Series 10GbE PCIe I/O
703da5a1 11* Virtualized Server Adapter.
926bd900 12* Copyright(c) 2002-2010 Exar Corp.
703da5a1
RV		 13*
14* The module loadable parameters that are supported by the driver and a brief
15* explanation of all the variables:
16* vlan_tag_strip:
17* Strip VLAN Tag enable/disable. Instructs the device to remove
18* the VLAN tag from all received tagged frames that are not
19* replicated at the internal L2 switch.
20* 0 - Do not strip the VLAN tag.
21* 1 - Strip the VLAN tag.
22*
23* addr_learn_en:
24* Enable learning the mac address of the guest OS interface in
25* a virtualization environment.
26* 0 - DISABLE
27* 1 - ENABLE
28*
29* max_config_port:
30* Maximum number of port to be supported.
31* MIN -1 and MAX - 2
32*
33* max_config_vpath:
34* This configures the maximum no of VPATH configures for each
35* device function.
36* MIN - 1 and MAX - 17
37*
38* max_config_dev:
39* This configures maximum no of Device function to be enabled.
40* MIN - 1 and MAX - 17
41*
42******************************************************************************/
43
75f5e1c6
JP		 44#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
53515734 46#include <linux/bitops.h>
703da5a1 47#include <linux/if_vlan.h>
a6b7a407 48#include <linux/interrupt.h>
703da5a1 49#include <linux/pci.h>
5a0e3ad6 50#include <linux/slab.h>
2b05e002 51#include <linux/tcp.h>
703da5a1
RV		 52#include <net/ip.h>
53#include <linux/netdevice.h>
54#include <linux/etherdevice.h>
e8ac1756 55#include <linux/firmware.h>
b81b3733 56#include <linux/net_tstamp.h>
70c71606 57#include <linux/prefetch.h>
9d9779e7 58#include <linux/module.h>
703da5a1
RV		 59#include "vxge-main.h"
60#include "vxge-reg.h"
61
62MODULE_LICENSE("Dual BSD/GPL");
63MODULE_DESCRIPTION("Neterion's X3100 Series 10GbE PCIe I/O"
64 "Virtualized Server Adapter");
65
9baa3c34 66static const struct pci_device_id vxge_id_table[] = {
703da5a1
RV		 67 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_WIN, PCI_ANY_ID,
68 PCI_ANY_ID},
69 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_UNI, PCI_ANY_ID,
70 PCI_ANY_ID},
71 {0}
72};
73
74MODULE_DEVICE_TABLE(pci, vxge_id_table);
75
76VXGE_MODULE_PARAM_INT(vlan_tag_strip, VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE);
77VXGE_MODULE_PARAM_INT(addr_learn_en, VXGE_HW_MAC_ADDR_LEARN_DEFAULT);
78VXGE_MODULE_PARAM_INT(max_config_port, VXGE_MAX_CONFIG_PORT);
79VXGE_MODULE_PARAM_INT(max_config_vpath, VXGE_USE_DEFAULT);
80VXGE_MODULE_PARAM_INT(max_mac_vpath, VXGE_MAX_MAC_ADDR_COUNT);
81VXGE_MODULE_PARAM_INT(max_config_dev, VXGE_MAX_CONFIG_DEV);
82
83static u16 vpath_selector[VXGE_HW_MAX_VIRTUAL_PATHS] =
84 {0, 1, 3, 3, 7, 7, 7, 7, 15, 15, 15, 15, 15, 15, 15, 15, 31};
85static unsigned int bw_percentage[VXGE_HW_MAX_VIRTUAL_PATHS] =
86 {[0 ...(VXGE_HW_MAX_VIRTUAL_PATHS - 1)] = 0xFF};
87module_param_array(bw_percentage, uint, NULL, 0);
88
89static struct vxge_drv_config *driver_config;
e40c10fc 90static enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev);
703da5a1
RV		 91
92static inline int is_vxge_card_up(struct vxgedev *vdev)
93{
94 return test_bit(__VXGE_STATE_CARD_UP, &vdev->state);
95}
96
97static inline void VXGE_COMPLETE_VPATH_TX(struct vxge_fifo *fifo)
98{
ff67df55
BL		 99 struct sk_buff **skb_ptr = NULL;
100 struct sk_buff **temp;
101#define NR_SKB_COMPLETED 128
102 struct sk_buff *completed[NR_SKB_COMPLETED];
103 int more;
703da5a1 104
ff67df55
BL		 105 do {
106 more = 0;
107 skb_ptr = completed;
108
98f45da2 109 if (__netif_tx_trylock(fifo->txq)) {
ff67df55
BL		 110 vxge_hw_vpath_poll_tx(fifo->handle, &skb_ptr,
111 NR_SKB_COMPLETED, &more);
98f45da2 112 __netif_tx_unlock(fifo->txq);
ff67df55 113 }
98f45da2 114
ff67df55
BL		 115 /* free SKBs */
116 for (temp = completed; temp != skb_ptr; temp++)
117 dev_kfree_skb_irq(*temp);
98f45da2 118 } while (more);
703da5a1
RV		 119}
120
121static inline void VXGE_COMPLETE_ALL_TX(struct vxgedev *vdev)
122{
123 int i;
124
125 /* Complete all transmits */
126 for (i = 0; i < vdev->no_of_vpath; i++)
127 VXGE_COMPLETE_VPATH_TX(&vdev->vpaths[i].fifo);
128}
129
130static inline void VXGE_COMPLETE_ALL_RX(struct vxgedev *vdev)
131{
132 int i;
133 struct vxge_ring *ring;
134
135 /* Complete all receives*/
136 for (i = 0; i < vdev->no_of_vpath; i++) {
137 ring = &vdev->vpaths[i].ring;
138 vxge_hw_vpath_poll_rx(ring->handle);
139 }
140}
141
703da5a1
RV		 142/*
143 * vxge_callback_link_up
144 *
145 * This function is called during interrupt context to notify link up state
146 * change.
147 */
528f7272 148static void vxge_callback_link_up(struct __vxge_hw_device *hldev)
703da5a1
RV		 149{
150 struct net_device *dev = hldev->ndev;
5f54cebb 151 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV		 152
153 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
154 vdev->ndev->name, __func__, __LINE__);
75f5e1c6 155 netdev_notice(vdev->ndev, "Link Up\n");
703da5a1
RV		 156 vdev->stats.link_up++;
157
158 netif_carrier_on(vdev->ndev);
d03848e0 159 netif_tx_wake_all_queues(vdev->ndev);
703da5a1
RV		 160
161 vxge_debug_entryexit(VXGE_TRACE,
162 "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
163}
164
165/*
166 * vxge_callback_link_down
167 *
168 * This function is called during interrupt context to notify link down state
169 * change.
170 */
528f7272 171static void vxge_callback_link_down(struct __vxge_hw_device *hldev)
703da5a1
RV		 172{
173 struct net_device *dev = hldev->ndev;
5f54cebb 174 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV		 175
176 vxge_debug_entryexit(VXGE_TRACE,
177 "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
75f5e1c6 178 netdev_notice(vdev->ndev, "Link Down\n");
703da5a1
RV		 179
180 vdev->stats.link_down++;
181 netif_carrier_off(vdev->ndev);
d03848e0 182 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 183
184 vxge_debug_entryexit(VXGE_TRACE,
185 "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
186}
187
188/*
189 * vxge_rx_alloc
190 *
191 * Allocate SKB.
192 */
528f7272 193static struct sk_buff *
703da5a1
RV		 194vxge_rx_alloc(void *dtrh, struct vxge_ring *ring, const int skb_size)
195{
196 struct net_device *dev;
197 struct sk_buff *skb;
198 struct vxge_rx_priv *rx_priv;
199
200 dev = ring->ndev;
201 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
202 ring->ndev->name, __func__, __LINE__);
203
204 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
205
206 /* try to allocate skb first. this one may fail */
207 skb = netdev_alloc_skb(dev, skb_size +
208 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
209 if (skb == NULL) {
210 vxge_debug_mem(VXGE_ERR,
211 "%s: out of memory to allocate SKB", dev->name);
212 ring->stats.skb_alloc_fail++;
213 return NULL;
214 }
215
216 vxge_debug_mem(VXGE_TRACE,
217 "%s: %s:%d Skb : 0x%p", ring->ndev->name,
218 __func__, __LINE__, skb);
219
220 skb_reserve(skb, VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
221
222 rx_priv->skb = skb;
ea11bbe0 223 rx_priv->skb_data = NULL;
703da5a1
RV		 224 rx_priv->data_size = skb_size;
225 vxge_debug_entryexit(VXGE_TRACE,
226 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
227
228 return skb;
229}
230
231/*
232 * vxge_rx_map
233 */
234static int vxge_rx_map(void *dtrh, struct vxge_ring *ring)
235{
236 struct vxge_rx_priv *rx_priv;
237 dma_addr_t dma_addr;
238
239 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
240 ring->ndev->name, __func__, __LINE__);
241 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
242
ea11bbe0
BL		 243 rx_priv->skb_data = rx_priv->skb->data;
244 dma_addr = pci_map_single(ring->pdev, rx_priv->skb_data,
703da5a1
RV		 245 rx_priv->data_size, PCI_DMA_FROMDEVICE);
246
fa15e99b 247 if (unlikely(pci_dma_mapping_error(ring->pdev, dma_addr))) {
703da5a1
RV		 248 ring->stats.pci_map_fail++;
249 return -EIO;
250 }
251 vxge_debug_mem(VXGE_TRACE,
252 "%s: %s:%d 1 buffer mode dma_addr = 0x%llx",
253 ring->ndev->name, __func__, __LINE__,
254 (unsigned long long)dma_addr);
255 vxge_hw_ring_rxd_1b_set(dtrh, dma_addr, rx_priv->data_size);
256
257 rx_priv->data_dma = dma_addr;
258 vxge_debug_entryexit(VXGE_TRACE,
259 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
260
261 return 0;
262}
263
264/*
265 * vxge_rx_initial_replenish
266 * Allocation of RxD as an initial replenish procedure.
267 */
268static enum vxge_hw_status
269vxge_rx_initial_replenish(void *dtrh, void *userdata)
270{
271 struct vxge_ring *ring = (struct vxge_ring *)userdata;
272 struct vxge_rx_priv *rx_priv;
273
274 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
275 ring->ndev->name, __func__, __LINE__);
276 if (vxge_rx_alloc(dtrh, ring,
277 VXGE_LL_MAX_FRAME_SIZE(ring->ndev)) == NULL)
278 return VXGE_HW_FAIL;
279
280 if (vxge_rx_map(dtrh, ring)) {
281 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
282 dev_kfree_skb(rx_priv->skb);
283
284 return VXGE_HW_FAIL;
285 }
286 vxge_debug_entryexit(VXGE_TRACE,
287 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
288
289 return VXGE_HW_OK;
290}
291
292static inline void
293vxge_rx_complete(struct vxge_ring *ring, struct sk_buff *skb, u16 vlan,
294 int pkt_length, struct vxge_hw_ring_rxd_info *ext_info)
295{
296
297 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
298 ring->ndev->name, __func__, __LINE__);
299 skb_record_rx_queue(skb, ring->driver_id);
300 skb->protocol = eth_type_trans(skb, ring->ndev);
301
62ea0557 302 u64_stats_update_begin(&ring->stats.syncp);
703da5a1
RV		 303 ring->stats.rx_frms++;
304 ring->stats.rx_bytes += pkt_length;
305
306 if (skb->pkt_type == PACKET_MULTICAST)
307 ring->stats.rx_mcast++;
62ea0557 308 u64_stats_update_end(&ring->stats.syncp);
703da5a1
RV		 309
310 vxge_debug_rx(VXGE_TRACE,
311 "%s: %s:%d skb protocol = %d",
312 ring->ndev->name, __func__, __LINE__, skb->protocol);
313
53515734
JP		 314 if (ext_info->vlan &&
315 ring->vlan_tag_strip == VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE)
86a9bad3 316 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), ext_info->vlan);
53515734 317 napi_gro_receive(ring->napi_p, skb);
feb990d4 318
703da5a1
RV		 319 vxge_debug_entryexit(VXGE_TRACE,
320 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
321}
322
323static inline void vxge_re_pre_post(void *dtr, struct vxge_ring *ring,
324 struct vxge_rx_priv *rx_priv)
325{
326 pci_dma_sync_single_for_device(ring->pdev,
327 rx_priv->data_dma, rx_priv->data_size, PCI_DMA_FROMDEVICE);
328
329 vxge_hw_ring_rxd_1b_set(dtr, rx_priv->data_dma, rx_priv->data_size);
330 vxge_hw_ring_rxd_pre_post(ring->handle, dtr);
331}
332
333static inline void vxge_post(int *dtr_cnt, void **first_dtr,
334 void *post_dtr, struct __vxge_hw_ring *ringh)
335{
336 int dtr_count = *dtr_cnt;
337 if ((*dtr_cnt % VXGE_HW_RXSYNC_FREQ_CNT) == 0) {
338 if (*first_dtr)
339 vxge_hw_ring_rxd_post_post_wmb(ringh, *first_dtr);
340 *first_dtr = post_dtr;
341 } else
342 vxge_hw_ring_rxd_post_post(ringh, post_dtr);
343 dtr_count++;
344 *dtr_cnt = dtr_count;
345}
346
347/*
348 * vxge_rx_1b_compl
349 *
350 * If the interrupt is because of a received frame or if the receive ring
351 * contains fresh as yet un-processed frames, this function is called.
352 */
42821a5b 353static enum vxge_hw_status
703da5a1
RV		 354vxge_rx_1b_compl(struct __vxge_hw_ring *ringh, void *dtr,
355 u8 t_code, void *userdata)
356{
357 struct vxge_ring *ring = (struct vxge_ring *)userdata;
b81b3733 358 struct net_device *dev = ring->ndev;
703da5a1
RV		 359 unsigned int dma_sizes;
360 void *first_dtr = NULL;
361 int dtr_cnt = 0;
362 int data_size;
363 dma_addr_t data_dma;
364 int pkt_length;
365 struct sk_buff *skb;
366 struct vxge_rx_priv *rx_priv;
367 struct vxge_hw_ring_rxd_info ext_info;
368 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
369 ring->ndev->name, __func__, __LINE__);
703da5a1 370
c7b82cc8
EB		 371 if (ring->budget <= 0)
372 goto out;
373
703da5a1 374 do {
3f23e436 375 prefetch((char *)dtr + L1_CACHE_BYTES);
703da5a1
RV		 376 rx_priv = vxge_hw_ring_rxd_private_get(dtr);
377 skb = rx_priv->skb;
378 data_size = rx_priv->data_size;
379 data_dma = rx_priv->data_dma;
ea11bbe0 380 prefetch(rx_priv->skb_data);
703da5a1
RV		 381
382 vxge_debug_rx(VXGE_TRACE,
383 "%s: %s:%d skb = 0x%p",
384 ring->ndev->name, __func__, __LINE__, skb);
385
386 vxge_hw_ring_rxd_1b_get(ringh, dtr, &dma_sizes);
387 pkt_length = dma_sizes;
388
22fa125e
SH		 389 pkt_length -= ETH_FCS_LEN;
390
703da5a1
RV		 391 vxge_debug_rx(VXGE_TRACE,
392 "%s: %s:%d Packet Length = %d",
393 ring->ndev->name, __func__, __LINE__, pkt_length);
394
395 vxge_hw_ring_rxd_1b_info_get(ringh, dtr, &ext_info);
396
397 /* check skb validity */
398 vxge_assert(skb);
399
400 prefetch((char *)skb + L1_CACHE_BYTES);
401 if (unlikely(t_code)) {
703da5a1
RV		 402 if (vxge_hw_ring_handle_tcode(ringh, dtr, t_code) !=
403 VXGE_HW_OK) {
404
405 ring->stats.rx_errors++;
406 vxge_debug_rx(VXGE_TRACE,
407 "%s: %s :%d Rx T_code is %d",
408 ring->ndev->name, __func__,
409 __LINE__, t_code);
410
411 /* If the t_code is not supported and if the
412 * t_code is other than 0x5 (unparseable packet
413 * such as unknown UPV6 header), Drop it !!!
414 */
415 vxge_re_pre_post(dtr, ring, rx_priv);
416
417 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
418 ring->stats.rx_dropped++;
419 continue;
420 }
421 }
422
423 if (pkt_length > VXGE_LL_RX_COPY_THRESHOLD) {
703da5a1 424 if (vxge_rx_alloc(dtr, ring, data_size) != NULL) {
703da5a1
RV		 425 if (!vxge_rx_map(dtr, ring)) {
426 skb_put(skb, pkt_length);
427
428 pci_unmap_single(ring->pdev, data_dma,
429 data_size, PCI_DMA_FROMDEVICE);
430
431 vxge_hw_ring_rxd_pre_post(ringh, dtr);
432 vxge_post(&dtr_cnt, &first_dtr, dtr,
433 ringh);
434 } else {
435 dev_kfree_skb(rx_priv->skb);
436 rx_priv->skb = skb;
437 rx_priv->data_size = data_size;
438 vxge_re_pre_post(dtr, ring, rx_priv);
439
440 vxge_post(&dtr_cnt, &first_dtr, dtr,
441 ringh);
442 ring->stats.rx_dropped++;
443 break;
444 }
445 } else {
446 vxge_re_pre_post(dtr, ring, rx_priv);
447
448 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
449 ring->stats.rx_dropped++;
450 break;
451 }
452 } else {
453 struct sk_buff *skb_up;
454
455 skb_up = netdev_alloc_skb(dev, pkt_length +
456 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
457 if (skb_up != NULL) {
458 skb_reserve(skb_up,
459 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
460
461 pci_dma_sync_single_for_cpu(ring->pdev,
462 data_dma, data_size,
463 PCI_DMA_FROMDEVICE);
464
465 vxge_debug_mem(VXGE_TRACE,
466 "%s: %s:%d skb_up = %p",
467 ring->ndev->name, __func__,
468 __LINE__, skb);
469 memcpy(skb_up->data, skb->data, pkt_length);
470
471 vxge_re_pre_post(dtr, ring, rx_priv);
472
473 vxge_post(&dtr_cnt, &first_dtr, dtr,
474 ringh);
475 /* will netif_rx small SKB instead */
476 skb = skb_up;
477 skb_put(skb, pkt_length);
478 } else {
479 vxge_re_pre_post(dtr, ring, rx_priv);
480
481 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
482 vxge_debug_rx(VXGE_ERR,
483 "%s: vxge_rx_1b_compl: out of "
484 "memory", dev->name);
485 ring->stats.skb_alloc_fail++;
486 break;
487 }
488 }
489
490 if ((ext_info.proto & VXGE_HW_FRAME_PROTO_TCP_OR_UDP) &&
491 !(ext_info.proto & VXGE_HW_FRAME_PROTO_IP_FRAG) &&
feb990d4 492 (dev->features & NETIF_F_RXCSUM) && /* Offload Rx side CSUM */
703da5a1
RV		 493 ext_info.l3_cksum == VXGE_HW_L3_CKSUM_OK &&
494 ext_info.l4_cksum == VXGE_HW_L4_CKSUM_OK)
495 skb->ip_summed = CHECKSUM_UNNECESSARY;
496 else
bc8acf2c 497 skb_checksum_none_assert(skb);
703da5a1 498
b81b3733
JM		 499
500 if (ring->rx_hwts) {
501 struct skb_shared_hwtstamps *skb_hwts;
502 u32 ns = *(u32 *)(skb->head + pkt_length);
503
504 skb_hwts = skb_hwtstamps(skb);
505 skb_hwts->hwtstamp = ns_to_ktime(ns);
b81b3733
JM		 506 }
507
47f01db4
JM		 508 /* rth_hash_type and rth_it_hit are non-zero regardless of
509 * whether rss is enabled. Only the rth_value is zero/non-zero
510 * if rss is disabled/enabled, so key off of that.
511 */
512 if (ext_info.rth_value)
c4be416b
TH		 513 skb_set_hash(skb, ext_info.rth_value,
514 PKT_HASH_TYPE_L3);
47f01db4 515
703da5a1
RV		 516 vxge_rx_complete(ring, skb, ext_info.vlan,
517 pkt_length, &ext_info);
518
519 ring->budget--;
520 ring->pkts_processed++;
521 if (!ring->budget)
522 break;
523
524 } while (vxge_hw_ring_rxd_next_completed(ringh, &dtr,
525 &t_code) == VXGE_HW_OK);
526
527 if (first_dtr)
528 vxge_hw_ring_rxd_post_post_wmb(ringh, first_dtr);
529
c7b82cc8 530out:
703da5a1
RV		 531 vxge_debug_entryexit(VXGE_TRACE,
532 "%s:%d Exiting...",
533 __func__, __LINE__);
534 return VXGE_HW_OK;
535}
536
537/*
538 * vxge_xmit_compl
539 *
540 * If an interrupt was raised to indicate DMA complete of the Tx packet,
541 * this function is called. It identifies the last TxD whose buffer was
542 * freed and frees all skbs whose data have already DMA'ed into the NICs
543 * internal memory.
544 */
42821a5b 545static enum vxge_hw_status
703da5a1
RV		 546vxge_xmit_compl(struct __vxge_hw_fifo *fifo_hw, void *dtr,
547 enum vxge_hw_fifo_tcode t_code, void *userdata,
ff67df55 548 struct sk_buff ***skb_ptr, int nr_skb, int *more)
703da5a1
RV		 549{
550 struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
ff67df55 551 struct sk_buff *skb, **done_skb = *skb_ptr;
703da5a1
RV		 552 int pkt_cnt = 0;
553
554 vxge_debug_entryexit(VXGE_TRACE,
555 "%s:%d Entered....", __func__, __LINE__);
556
557 do {
558 int frg_cnt;
559 skb_frag_t *frag;
560 int i = 0, j;
561 struct vxge_tx_priv *txd_priv =
562 vxge_hw_fifo_txdl_private_get(dtr);
563
564 skb = txd_priv->skb;
565 frg_cnt = skb_shinfo(skb)->nr_frags;
566 frag = &skb_shinfo(skb)->frags[0];
567
568 vxge_debug_tx(VXGE_TRACE,
569 "%s: %s:%d fifo_hw = %p dtr = %p "
570 "tcode = 0x%x", fifo->ndev->name, __func__,
571 __LINE__, fifo_hw, dtr, t_code);
572 /* check skb validity */
573 vxge_assert(skb);
574 vxge_debug_tx(VXGE_TRACE,
575 "%s: %s:%d skb = %p itxd_priv = %p frg_cnt = %d",
576 fifo->ndev->name, __func__, __LINE__,
577 skb, txd_priv, frg_cnt);
578 if (unlikely(t_code)) {
579 fifo->stats.tx_errors++;
580 vxge_debug_tx(VXGE_ERR,
581 "%s: tx: dtr %p completed due to "
582 "error t_code %01x", fifo->ndev->name,
583 dtr, t_code);
584 vxge_hw_fifo_handle_tcode(fifo_hw, dtr, t_code);
585 }
586
587 /* for unfragmented skb */
588 pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
589 skb_headlen(skb), PCI_DMA_TODEVICE);
590
591 for (j = 0; j < frg_cnt; j++) {
592 pci_unmap_page(fifo->pdev,
593 txd_priv->dma_buffers[i++],
9e903e08 594 skb_frag_size(frag), PCI_DMA_TODEVICE);
703da5a1
RV		 595 frag += 1;
596 }
597
598 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
599
600 /* Updating the statistics block */
62ea0557 601 u64_stats_update_begin(&fifo->stats.syncp);
703da5a1
RV		 602 fifo->stats.tx_frms++;
603 fifo->stats.tx_bytes += skb->len;
62ea0557 604 u64_stats_update_end(&fifo->stats.syncp);
703da5a1 605
ff67df55
BL		 606 *done_skb++ = skb;
607
608 if (--nr_skb <= 0) {
609 *more = 1;
610 break;
611 }
703da5a1
RV		 612
613 pkt_cnt++;
614 if (pkt_cnt > fifo->indicate_max_pkts)
615 break;
616
617 } while (vxge_hw_fifo_txdl_next_completed(fifo_hw,
618 &dtr, &t_code) == VXGE_HW_OK);
619
ff67df55 620 *skb_ptr = done_skb;
98f45da2
JM		 621 if (netif_tx_queue_stopped(fifo->txq))
622 netif_tx_wake_queue(fifo->txq);
703da5a1 623
703da5a1
RV		 624 vxge_debug_entryexit(VXGE_TRACE,
625 "%s: %s:%d Exiting...",
626 fifo->ndev->name, __func__, __LINE__);
627 return VXGE_HW_OK;
628}
629
28679751 630/* select a vpath to transmit the packet */
98f45da2 631static u32 vxge_get_vpath_no(struct vxgedev *vdev, struct sk_buff *skb)
703da5a1
RV		 632{
633 u16 queue_len, counter = 0;
634 if (skb->protocol == htons(ETH_P_IP)) {
635 struct iphdr *ip;
636 struct tcphdr *th;
637
638 ip = ip_hdr(skb);
639
56f8a75c 640 if (!ip_is_fragment(ip)) {
703da5a1
RV		 641 th = (struct tcphdr *)(((unsigned char *)ip) +
642 ip->ihl*4);
643
644 queue_len = vdev->no_of_vpath;
645 counter = (ntohs(th->source) +
646 ntohs(th->dest)) &
647 vdev->vpath_selector[queue_len - 1];
648 if (counter >= queue_len)
649 counter = queue_len - 1;
703da5a1
RV		 650 }
651 }
652 return counter;
653}
654
655static enum vxge_hw_status vxge_search_mac_addr_in_list(
656 struct vxge_vpath *vpath, u64 del_mac)
657{
658 struct list_head *entry, *next;
659 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
660 if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac)
661 return TRUE;
662 }
663 return FALSE;
664}
665
528f7272
JM		 666static int vxge_mac_list_add(struct vxge_vpath *vpath, struct macInfo *mac)
667{
668 struct vxge_mac_addrs *new_mac_entry;
669 u8 *mac_address = NULL;
670
671 if (vpath->mac_addr_cnt >= VXGE_MAX_LEARN_MAC_ADDR_CNT)
672 return TRUE;
673
674 new_mac_entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_ATOMIC);
675 if (!new_mac_entry) {
676 vxge_debug_mem(VXGE_ERR,
677 "%s: memory allocation failed",
678 VXGE_DRIVER_NAME);
679 return FALSE;
680 }
681
682 list_add(&new_mac_entry->item, &vpath->mac_addr_list);
683
684 /* Copy the new mac address to the list */
685 mac_address = (u8 *)&new_mac_entry->macaddr;
686 memcpy(mac_address, mac->macaddr, ETH_ALEN);
687
688 new_mac_entry->state = mac->state;
689 vpath->mac_addr_cnt++;
690
f8d4aa29 691 if (is_multicast_ether_addr(mac->macaddr))
528f7272
JM		 692 vpath->mcast_addr_cnt++;
693
694 return TRUE;
695}
696
697/* Add a mac address to DA table */
698static enum vxge_hw_status
699vxge_add_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
700{
701 enum vxge_hw_status status = VXGE_HW_OK;
702 struct vxge_vpath *vpath;
703 enum vxge_hw_vpath_mac_addr_add_mode duplicate_mode;
704
f8d4aa29 705 if (is_multicast_ether_addr(mac->macaddr))
528f7272
JM		 706 duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE;
707 else
708 duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_REPLACE_DUPLICATE;
709
710 vpath = &vdev->vpaths[mac->vpath_no];
711 status = vxge_hw_vpath_mac_addr_add(vpath->handle, mac->macaddr,
712 mac->macmask, duplicate_mode);
713 if (status != VXGE_HW_OK) {
714 vxge_debug_init(VXGE_ERR,
715 "DA config add entry failed for vpath:%d",
716 vpath->device_id);
717 } else
718 if (FALSE == vxge_mac_list_add(vpath, mac))
719 status = -EPERM;
720
721 return status;
722}
723
703da5a1
RV		 724static int vxge_learn_mac(struct vxgedev *vdev, u8 *mac_header)
725{
726 struct macInfo mac_info;
727 u8 *mac_address = NULL;
728 u64 mac_addr = 0, vpath_vector = 0;
729 int vpath_idx = 0;
730 enum vxge_hw_status status = VXGE_HW_OK;
731 struct vxge_vpath *vpath = NULL;
703da5a1
RV		 732
733 mac_address = (u8 *)&mac_addr;
734 memcpy(mac_address, mac_header, ETH_ALEN);
735
736 /* Is this mac address already in the list? */
737 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
738 vpath = &vdev->vpaths[vpath_idx];
739 if (vxge_search_mac_addr_in_list(vpath, mac_addr))
740 return vpath_idx;
741 }
742
743 memset(&mac_info, 0, sizeof(struct macInfo));
744 memcpy(mac_info.macaddr, mac_header, ETH_ALEN);
745
746 /* Any vpath has room to add mac address to its da table? */
747 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
748 vpath = &vdev->vpaths[vpath_idx];
749 if (vpath->mac_addr_cnt < vpath->max_mac_addr_cnt) {
750 /* Add this mac address to this vpath */
751 mac_info.vpath_no = vpath_idx;
752 mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
753 status = vxge_add_mac_addr(vdev, &mac_info);
754 if (status != VXGE_HW_OK)
755 return -EPERM;
756 return vpath_idx;
757 }
758 }
759
760 mac_info.state = VXGE_LL_MAC_ADDR_IN_LIST;
761 vpath_idx = 0;
762 mac_info.vpath_no = vpath_idx;
763 /* Is the first vpath already selected as catch-basin ? */
764 vpath = &vdev->vpaths[vpath_idx];
765 if (vpath->mac_addr_cnt > vpath->max_mac_addr_cnt) {
766 /* Add this mac address to this vpath */
767 if (FALSE == vxge_mac_list_add(vpath, &mac_info))
768 return -EPERM;
769 return vpath_idx;
770 }
771
772 /* Select first vpath as catch-basin */
773 vpath_vector = vxge_mBIT(vpath->device_id);
774 status = vxge_hw_mgmt_reg_write(vpath->vdev->devh,
775 vxge_hw_mgmt_reg_type_mrpcim,
776 0,
777 (ulong)offsetof(
778 struct vxge_hw_mrpcim_reg,
779 rts_mgr_cbasin_cfg),
780 vpath_vector);
781 if (status != VXGE_HW_OK) {
782 vxge_debug_tx(VXGE_ERR,
783 "%s: Unable to set the vpath-%d in catch-basin mode",
784 VXGE_DRIVER_NAME, vpath->device_id);
785 return -EPERM;
786 }
787
788 if (FALSE == vxge_mac_list_add(vpath, &mac_info))
789 return -EPERM;
790
791 return vpath_idx;
792}
793
794/**
795 * vxge_xmit
796 * @skb : the socket buffer containing the Tx data.
797 * @dev : device pointer.
798 *
799 * This function is the Tx entry point of the driver. Neterion NIC supports
800 * certain protocol assist features on Tx side, namely CSO, S/G, LSO.
703da5a1 801*/
61357325 802static netdev_tx_t
703da5a1
RV		 803vxge_xmit(struct sk_buff *skb, struct net_device *dev)
804{
805 struct vxge_fifo *fifo = NULL;
806 void *dtr_priv;
807 void *dtr = NULL;
808 struct vxgedev *vdev = NULL;
809 enum vxge_hw_status status;
810 int frg_cnt, first_frg_len;
811 skb_frag_t *frag;
812 int i = 0, j = 0, avail;
813 u64 dma_pointer;
814 struct vxge_tx_priv *txdl_priv = NULL;
815 struct __vxge_hw_fifo *fifo_hw;
703da5a1 816 int offload_type;
703da5a1 817 int vpath_no = 0;
703da5a1
RV		 818
819 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
820 dev->name, __func__, __LINE__);
821
822 /* A buffer with no data will be dropped */
823 if (unlikely(skb->len <= 0)) {
824 vxge_debug_tx(VXGE_ERR,
825 "%s: Buffer has no data..", dev->name);
6956d73a 826 dev_kfree_skb_any(skb);
703da5a1
RV		 827 return NETDEV_TX_OK;
828 }
829
5f54cebb 830 vdev = netdev_priv(dev);
703da5a1
RV		 831
832 if (unlikely(!is_vxge_card_up(vdev))) {
833 vxge_debug_tx(VXGE_ERR,
834 "%s: vdev not initialized", dev->name);
6956d73a 835 dev_kfree_skb_any(skb);
703da5a1
RV		 836 return NETDEV_TX_OK;
837 }
838
839 if (vdev->config.addr_learn_en) {
840 vpath_no = vxge_learn_mac(vdev, skb->data + ETH_ALEN);
841 if (vpath_no == -EPERM) {
842 vxge_debug_tx(VXGE_ERR,
843 "%s: Failed to store the mac address",
844 dev->name);
6956d73a 845 dev_kfree_skb_any(skb);
703da5a1
RV		 846 return NETDEV_TX_OK;
847 }
848 }
849
850 if (vdev->config.tx_steering_type == TX_MULTIQ_STEERING)
851 vpath_no = skb_get_queue_mapping(skb);
852 else if (vdev->config.tx_steering_type == TX_PORT_STEERING)
98f45da2 853 vpath_no = vxge_get_vpath_no(vdev, skb);
703da5a1
RV		 854
855 vxge_debug_tx(VXGE_TRACE, "%s: vpath_no= %d", dev->name, vpath_no);
856
857 if (vpath_no >= vdev->no_of_vpath)
858 vpath_no = 0;
859
860 fifo = &vdev->vpaths[vpath_no].fifo;
861 fifo_hw = fifo->handle;
862
98f45da2 863 if (netif_tx_queue_stopped(fifo->txq))
d03848e0 864 return NETDEV_TX_BUSY;
d03848e0 865
703da5a1
RV		 866 avail = vxge_hw_fifo_free_txdl_count_get(fifo_hw);
867 if (avail == 0) {
868 vxge_debug_tx(VXGE_ERR,
869 "%s: No free TXDs available", dev->name);
870 fifo->stats.txd_not_free++;
98f45da2 871 goto _exit0;
703da5a1
RV		 872 }
873
4403b371
BL		 874 /* Last TXD? Stop tx queue to avoid dropping packets. TX
875 * completion will resume the queue.
876 */
877 if (avail == 1)
98f45da2 878 netif_tx_stop_queue(fifo->txq);
4403b371 879
703da5a1
RV		 880 status = vxge_hw_fifo_txdl_reserve(fifo_hw, &dtr, &dtr_priv);
881 if (unlikely(status != VXGE_HW_OK)) {
882 vxge_debug_tx(VXGE_ERR,
883 "%s: Out of descriptors .", dev->name);
884 fifo->stats.txd_out_of_desc++;
98f45da2 885 goto _exit0;
703da5a1
RV		 886 }
887
888 vxge_debug_tx(VXGE_TRACE,
889 "%s: %s:%d fifo_hw = %p dtr = %p dtr_priv = %p",
890 dev->name, __func__, __LINE__,
891 fifo_hw, dtr, dtr_priv);
892
df8a39de
JP		 893 if (skb_vlan_tag_present(skb)) {
894 u16 vlan_tag = skb_vlan_tag_get(skb);
703da5a1
RV		 895 vxge_hw_fifo_txdl_vlan_set(dtr, vlan_tag);
896 }
897
898 first_frg_len = skb_headlen(skb);
899
900 dma_pointer = pci_map_single(fifo->pdev, skb->data, first_frg_len,
901 PCI_DMA_TODEVICE);
902
903 if (unlikely(pci_dma_mapping_error(fifo->pdev, dma_pointer))) {
904 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
703da5a1 905 fifo->stats.pci_map_fail++;
98f45da2 906 goto _exit0;
703da5a1
RV		 907 }
908
909 txdl_priv = vxge_hw_fifo_txdl_private_get(dtr);
910 txdl_priv->skb = skb;
911 txdl_priv->dma_buffers[j] = dma_pointer;
912
913 frg_cnt = skb_shinfo(skb)->nr_frags;
914 vxge_debug_tx(VXGE_TRACE,
915 "%s: %s:%d skb = %p txdl_priv = %p "
916 "frag_cnt = %d dma_pointer = 0x%llx", dev->name,
917 __func__, __LINE__, skb, txdl_priv,
918 frg_cnt, (unsigned long long)dma_pointer);
919
920 vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
921 first_frg_len);
922
923 frag = &skb_shinfo(skb)->frags[0];
924 for (i = 0; i < frg_cnt; i++) {
925 /* ignore 0 length fragment */
9e903e08 926 if (!skb_frag_size(frag))
703da5a1
RV		 927 continue;
928
94d60a7b 929 dma_pointer = (u64)skb_frag_dma_map(&fifo->pdev->dev, frag,
9e903e08 930 0, skb_frag_size(frag),
94d60a7b 931 DMA_TO_DEVICE);
703da5a1 932
94d60a7b 933 if (unlikely(dma_mapping_error(&fifo->pdev->dev, dma_pointer)))
98f45da2 934 goto _exit2;
703da5a1
RV		 935 vxge_debug_tx(VXGE_TRACE,
936 "%s: %s:%d frag = %d dma_pointer = 0x%llx",
937 dev->name, __func__, __LINE__, i,
938 (unsigned long long)dma_pointer);
939
940 txdl_priv->dma_buffers[j] = dma_pointer;
941 vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
9e903e08 942 skb_frag_size(frag));
703da5a1
RV		 943 frag += 1;
944 }
945
946 offload_type = vxge_offload_type(skb);
947
948 if (offload_type & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {
703da5a1
RV		 949 int mss = vxge_tcp_mss(skb);
950 if (mss) {
98f45da2 951 vxge_debug_tx(VXGE_TRACE, "%s: %s:%d mss = %d",
703da5a1
RV		 952 dev->name, __func__, __LINE__, mss);
953 vxge_hw_fifo_txdl_mss_set(dtr, mss);
954 } else {
955 vxge_assert(skb->len <=
956 dev->mtu + VXGE_HW_MAC_HEADER_MAX_SIZE);
957 vxge_assert(0);
958 goto _exit1;
959 }
960 }
961
962 if (skb->ip_summed == CHECKSUM_PARTIAL)
963 vxge_hw_fifo_txdl_cksum_set_bits(dtr,
964 VXGE_HW_FIFO_TXD_TX_CKO_IPV4_EN |
965 VXGE_HW_FIFO_TXD_TX_CKO_TCP_EN |
966 VXGE_HW_FIFO_TXD_TX_CKO_UDP_EN);
967
968 vxge_hw_fifo_txdl_post(fifo_hw, dtr);
703da5a1 969
703da5a1
RV		 970 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
971 dev->name, __func__, __LINE__);
6ed10654 972 return NETDEV_TX_OK;
703da5a1 973
98f45da2 974_exit2:
703da5a1 975 vxge_debug_tx(VXGE_TRACE, "%s: pci_map_page failed", dev->name);
703da5a1
RV		 976_exit1:
977 j = 0;
978 frag = &skb_shinfo(skb)->frags[0];
979
980 pci_unmap_single(fifo->pdev, txdl_priv->dma_buffers[j++],
981 skb_headlen(skb), PCI_DMA_TODEVICE);
982
983 for (; j < i; j++) {
984 pci_unmap_page(fifo->pdev, txdl_priv->dma_buffers[j],
9e903e08 985 skb_frag_size(frag), PCI_DMA_TODEVICE);
703da5a1
RV		 986 frag += 1;
987 }
988
989 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
98f45da2
JM		 990_exit0:
991 netif_tx_stop_queue(fifo->txq);
6956d73a 992 dev_kfree_skb_any(skb);
703da5a1 993
6ed10654 994 return NETDEV_TX_OK;
703da5a1
RV		 995}
996
997/*
998 * vxge_rx_term
999 *
1000 * Function will be called by hw function to abort all outstanding receive
1001 * descriptors.
1002 */
1003static void
1004vxge_rx_term(void *dtrh, enum vxge_hw_rxd_state state, void *userdata)
1005{
1006 struct vxge_ring *ring = (struct vxge_ring *)userdata;
1007 struct vxge_rx_priv *rx_priv =
1008 vxge_hw_ring_rxd_private_get(dtrh);
1009
1010 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
1011 ring->ndev->name, __func__, __LINE__);
1012 if (state != VXGE_HW_RXD_STATE_POSTED)
1013 return;
1014
1015 pci_unmap_single(ring->pdev, rx_priv->data_dma,
1016 rx_priv->data_size, PCI_DMA_FROMDEVICE);
1017
1018 dev_kfree_skb(rx_priv->skb);
ea11bbe0 1019 rx_priv->skb_data = NULL;
703da5a1
RV		 1020
1021 vxge_debug_entryexit(VXGE_TRACE,
1022 "%s: %s:%d Exiting...",
1023 ring->ndev->name, __func__, __LINE__);
1024}
1025
1026/*
1027 * vxge_tx_term
1028 *
1029 * Function will be called to abort all outstanding tx descriptors
1030 */
1031static void
1032vxge_tx_term(void *dtrh, enum vxge_hw_txdl_state state, void *userdata)
1033{
1034 struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
1035 skb_frag_t *frag;
1036 int i = 0, j, frg_cnt;
1037 struct vxge_tx_priv *txd_priv = vxge_hw_fifo_txdl_private_get(dtrh);
1038 struct sk_buff *skb = txd_priv->skb;
1039
1040 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1041
1042 if (state != VXGE_HW_TXDL_STATE_POSTED)
1043 return;
1044
1045 /* check skb validity */
1046 vxge_assert(skb);
1047 frg_cnt = skb_shinfo(skb)->nr_frags;
1048 frag = &skb_shinfo(skb)->frags[0];
1049
1050 /* for unfragmented skb */
1051 pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
1052 skb_headlen(skb), PCI_DMA_TODEVICE);
1053
1054 for (j = 0; j < frg_cnt; j++) {
1055 pci_unmap_page(fifo->pdev, txd_priv->dma_buffers[i++],
9e903e08 1056 skb_frag_size(frag), PCI_DMA_TODEVICE);
703da5a1
RV		 1057 frag += 1;
1058 }
1059
1060 dev_kfree_skb(skb);
1061
1062 vxge_debug_entryexit(VXGE_TRACE,
1063 "%s:%d Exiting...", __func__, __LINE__);
1064}
1065
528f7272
JM		 1066static int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac)
1067{
1068 struct list_head *entry, *next;
1069 u64 del_mac = 0;
1070 u8 *mac_address = (u8 *) (&del_mac);
1071
1072 /* Copy the mac address to delete from the list */
1073 memcpy(mac_address, mac->macaddr, ETH_ALEN);
1074
1075 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
1076 if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac) {
1077 list_del(entry);
1078 kfree((struct vxge_mac_addrs *)entry);
1079 vpath->mac_addr_cnt--;
1080
f8d4aa29 1081 if (is_multicast_ether_addr(mac->macaddr))
528f7272
JM		 1082 vpath->mcast_addr_cnt--;
1083 return TRUE;
1084 }
1085 }
1086
1087 return FALSE;
1088}
1089
1090/* delete a mac address from DA table */
1091static enum vxge_hw_status
1092vxge_del_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
1093{
1094 enum vxge_hw_status status = VXGE_HW_OK;
1095 struct vxge_vpath *vpath;
1096
1097 vpath = &vdev->vpaths[mac->vpath_no];
1098 status = vxge_hw_vpath_mac_addr_delete(vpath->handle, mac->macaddr,
1099 mac->macmask);
1100 if (status != VXGE_HW_OK) {
1101 vxge_debug_init(VXGE_ERR,
1102 "DA config delete entry failed for vpath:%d",
1103 vpath->device_id);
1104 } else
1105 vxge_mac_list_del(vpath, mac);
1106 return status;
1107}
1108
703da5a1
RV		 1109/**
1110 * vxge_set_multicast
1111 * @dev: pointer to the device structure
1112 *
1113 * Entry point for multicast address enable/disable
1114 * This function is a driver entry point which gets called by the kernel
1115 * whenever multicast addresses must be enabled/disabled. This also gets
1116 * called to set/reset promiscuous mode. Depending on the deivce flag, we
1117 * determine, if multicast address must be enabled or if promiscuous mode
1118 * is to be disabled etc.
1119 */
1120static void vxge_set_multicast(struct net_device *dev)
1121{
22bedad3 1122 struct netdev_hw_addr *ha;
703da5a1
RV		 1123 struct vxgedev *vdev;
1124 int i, mcast_cnt = 0;
7adf7d1b
JM		 1125 struct __vxge_hw_device *hldev;
1126 struct vxge_vpath *vpath;
703da5a1
RV		 1127 enum vxge_hw_status status = VXGE_HW_OK;
1128 struct macInfo mac_info;
1129 int vpath_idx = 0;
1130 struct vxge_mac_addrs *mac_entry;
1131 struct list_head *list_head;
1132 struct list_head *entry, *next;
1133 u8 *mac_address = NULL;
1134
1135 vxge_debug_entryexit(VXGE_TRACE,
1136 "%s:%d", __func__, __LINE__);
1137
5f54cebb 1138 vdev = netdev_priv(dev);
64699336 1139 hldev = vdev->devh;
703da5a1
RV		 1140
1141 if (unlikely(!is_vxge_card_up(vdev)))
1142 return;
1143
1144 if ((dev->flags & IFF_ALLMULTI) && (!vdev->all_multi_flg)) {
1145 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 1146 vpath = &vdev->vpaths[i];
1147 vxge_assert(vpath->is_open);
1148 status = vxge_hw_vpath_mcast_enable(vpath->handle);
1149 if (status != VXGE_HW_OK)
1150 vxge_debug_init(VXGE_ERR, "failed to enable "
1151 "multicast, status %d", status);
703da5a1
RV		 1152 vdev->all_multi_flg = 1;
1153 }
7adf7d1b 1154 } else if (!(dev->flags & IFF_ALLMULTI) && (vdev->all_multi_flg)) {
703da5a1 1155 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 1156 vpath = &vdev->vpaths[i];
1157 vxge_assert(vpath->is_open);
1158 status = vxge_hw_vpath_mcast_disable(vpath->handle);
1159 if (status != VXGE_HW_OK)
1160 vxge_debug_init(VXGE_ERR, "failed to disable "
1161 "multicast, status %d", status);
1162 vdev->all_multi_flg = 0;
703da5a1
RV		 1163 }
1164 }
1165
703da5a1
RV		 1166
1167 if (!vdev->config.addr_learn_en) {
7adf7d1b
JM		 1168 for (i = 0; i < vdev->no_of_vpath; i++) {
1169 vpath = &vdev->vpaths[i];
1170 vxge_assert(vpath->is_open);
1171
1172 if (dev->flags & IFF_PROMISC)
703da5a1 1173 status = vxge_hw_vpath_promisc_enable(
7adf7d1b
JM		 1174 vpath->handle);
1175 else
703da5a1 1176 status = vxge_hw_vpath_promisc_disable(
7adf7d1b
JM		 1177 vpath->handle);
1178 if (status != VXGE_HW_OK)
1179 vxge_debug_init(VXGE_ERR, "failed to %s promisc"
1180 ", status %d", dev->flags&IFF_PROMISC ?
1181 "enable" : "disable", status);
703da5a1
RV		 1182 }
1183 }
1184
1185 memset(&mac_info, 0, sizeof(struct macInfo));
1186 /* Update individual M_CAST address list */
4cd24eaf 1187 if ((!vdev->all_multi_flg) && netdev_mc_count(dev)) {
703da5a1
RV		 1188 mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
1189 list_head = &vdev->vpaths[0].mac_addr_list;
4cd24eaf 1190 if ((netdev_mc_count(dev) +
703da5a1
RV		 1191 (vdev->vpaths[0].mac_addr_cnt - mcast_cnt)) >
1192 vdev->vpaths[0].max_mac_addr_cnt)
1193 goto _set_all_mcast;
1194
1195 /* Delete previous MC's */
1196 for (i = 0; i < mcast_cnt; i++) {
703da5a1 1197 list_for_each_safe(entry, next, list_head) {
2c91308f 1198 mac_entry = (struct vxge_mac_addrs *)entry;
703da5a1
RV		 1199 /* Copy the mac address to delete */
1200 mac_address = (u8 *)&mac_entry->macaddr;
1201 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1202
f8d4aa29 1203 if (is_multicast_ether_addr(mac_info.macaddr)) {
703da5a1
RV		 1204 for (vpath_idx = 0; vpath_idx <
1205 vdev->no_of_vpath;
1206 vpath_idx++) {
1207 mac_info.vpath_no = vpath_idx;
1208 status = vxge_del_mac_addr(
1209 vdev,
1210 &mac_info);
1211 }
1212 }
1213 }
1214 }
1215
1216 /* Add new ones */
22bedad3
JP		 1217 netdev_for_each_mc_addr(ha, dev) {
1218 memcpy(mac_info.macaddr, ha->addr, ETH_ALEN);
703da5a1
RV		 1219 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
1220 vpath_idx++) {
1221 mac_info.vpath_no = vpath_idx;
1222 mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1223 status = vxge_add_mac_addr(vdev, &mac_info);
1224 if (status != VXGE_HW_OK) {
1225 vxge_debug_init(VXGE_ERR,
1226 "%s:%d Setting individual"
1227 "multicast address failed",
1228 __func__, __LINE__);
1229 goto _set_all_mcast;
1230 }
1231 }
1232 }
1233
1234 return;
1235_set_all_mcast:
1236 mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
1237 /* Delete previous MC's */
1238 for (i = 0; i < mcast_cnt; i++) {
703da5a1 1239 list_for_each_safe(entry, next, list_head) {
2c91308f 1240 mac_entry = (struct vxge_mac_addrs *)entry;
703da5a1
RV		 1241 /* Copy the mac address to delete */
1242 mac_address = (u8 *)&mac_entry->macaddr;
1243 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1244
f8d4aa29 1245 if (is_multicast_ether_addr(mac_info.macaddr))
703da5a1
RV		 1246 break;
1247 }
1248
1249 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
1250 vpath_idx++) {
1251 mac_info.vpath_no = vpath_idx;
1252 status = vxge_del_mac_addr(vdev, &mac_info);
1253 }
1254 }
1255
1256 /* Enable all multicast */
1257 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 1258 vpath = &vdev->vpaths[i];
1259 vxge_assert(vpath->is_open);
1260
1261 status = vxge_hw_vpath_mcast_enable(vpath->handle);
703da5a1
RV		 1262 if (status != VXGE_HW_OK) {
1263 vxge_debug_init(VXGE_ERR,
1264 "%s:%d Enabling all multicasts failed",
1265 __func__, __LINE__);
1266 }
1267 vdev->all_multi_flg = 1;
1268 }
1269 dev->flags |= IFF_ALLMULTI;
1270 }
1271
1272 vxge_debug_entryexit(VXGE_TRACE,
1273 "%s:%d Exiting...", __func__, __LINE__);
1274}
1275
1276/**
1277 * vxge_set_mac_addr
1278 * @dev: pointer to the device structure
1279 *
1280 * Update entry "0" (default MAC addr)
1281 */
1282static int vxge_set_mac_addr(struct net_device *dev, void *p)
1283{
1284 struct sockaddr *addr = p;
1285 struct vxgedev *vdev;
2c91308f 1286 struct __vxge_hw_device *hldev;
703da5a1
RV		 1287 enum vxge_hw_status status = VXGE_HW_OK;
1288 struct macInfo mac_info_new, mac_info_old;
1289 int vpath_idx = 0;
1290
1291 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1292
5f54cebb 1293 vdev = netdev_priv(dev);
703da5a1
RV		 1294 hldev = vdev->devh;
1295
1296 if (!is_valid_ether_addr(addr->sa_data))
1297 return -EINVAL;
1298
1299 memset(&mac_info_new, 0, sizeof(struct macInfo));
1300 memset(&mac_info_old, 0, sizeof(struct macInfo));
1301
1302 vxge_debug_entryexit(VXGE_TRACE, "%s:%d Exiting...",
1303 __func__, __LINE__);
1304
1305 /* Get the old address */
1306 memcpy(mac_info_old.macaddr, dev->dev_addr, dev->addr_len);
1307
1308 /* Copy the new address */
1309 memcpy(mac_info_new.macaddr, addr->sa_data, dev->addr_len);
1310
1311 /* First delete the old mac address from all the vpaths
1312 as we can't specify the index while adding new mac address */
1313 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
1314 struct vxge_vpath *vpath = &vdev->vpaths[vpath_idx];
1315 if (!vpath->is_open) {
1316 /* This can happen when this interface is added/removed
1317 to the bonding interface. Delete this station address
1318 from the linked list */
1319 vxge_mac_list_del(vpath, &mac_info_old);
1320
1321 /* Add this new address to the linked list
1322 for later restoring */
1323 vxge_mac_list_add(vpath, &mac_info_new);
1324
1325 continue;
1326 }
1327 /* Delete the station address */
1328 mac_info_old.vpath_no = vpath_idx;
1329 status = vxge_del_mac_addr(vdev, &mac_info_old);
1330 }
1331
1332 if (unlikely(!is_vxge_card_up(vdev))) {
1333 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1334 return VXGE_HW_OK;
1335 }
1336
1337 /* Set this mac address to all the vpaths */
1338 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
1339 mac_info_new.vpath_no = vpath_idx;
1340 mac_info_new.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1341 status = vxge_add_mac_addr(vdev, &mac_info_new);
1342 if (status != VXGE_HW_OK)
1343 return -EINVAL;
1344 }
1345
1346 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1347
1348 return status;
1349}
1350
1351/*
1352 * vxge_vpath_intr_enable
1353 * @vdev: pointer to vdev
1354 * @vp_id: vpath for which to enable the interrupts
1355 *
1356 * Enables the interrupts for the vpath
1357*/
42821a5b 1358static void vxge_vpath_intr_enable(struct vxgedev *vdev, int vp_id)
703da5a1
RV		 1359{
1360 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
b59c9457
SH		 1361 int msix_id = 0;
1362 int tim_msix_id[4] = {0, 1, 0, 0};
1363 int alarm_msix_id = VXGE_ALARM_MSIX_ID;
703da5a1
RV		 1364
1365 vxge_hw_vpath_intr_enable(vpath->handle);
1366
1367 if (vdev->config.intr_type == INTA)
1368 vxge_hw_vpath_inta_unmask_tx_rx(vpath->handle);
1369 else {
703da5a1
RV		 1370 vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
1371 alarm_msix_id);
1372
b59c9457 1373 msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
703da5a1
RV		 1374 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
1375 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id + 1);
1376
1377 /* enable the alarm vector */
b59c9457
SH		 1378 msix_id = (vpath->handle->vpath->hldev->first_vp_id *
1379 VXGE_HW_VPATH_MSIX_ACTIVE) + alarm_msix_id;
1380 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
703da5a1
RV		 1381 }
1382}
1383
1384/*
1385 * vxge_vpath_intr_disable
1386 * @vdev: pointer to vdev
1387 * @vp_id: vpath for which to disable the interrupts
1388 *
1389 * Disables the interrupts for the vpath
1390*/
42821a5b 1391static void vxge_vpath_intr_disable(struct vxgedev *vdev, int vp_id)
703da5a1
RV		 1392{
1393 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
4d2a5b40 1394 struct __vxge_hw_device *hldev;
703da5a1
RV		 1395 int msix_id;
1396
d8ee7071 1397 hldev = pci_get_drvdata(vdev->pdev);
4d2a5b40
JM		 1398
1399 vxge_hw_vpath_wait_receive_idle(hldev, vpath->device_id);
1400
703da5a1
RV		 1401 vxge_hw_vpath_intr_disable(vpath->handle);
1402
1403 if (vdev->config.intr_type == INTA)
1404 vxge_hw_vpath_inta_mask_tx_rx(vpath->handle);
1405 else {
b59c9457 1406 msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
703da5a1
RV		 1407 vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
1408 vxge_hw_vpath_msix_mask(vpath->handle, msix_id + 1);
1409
1410 /* disable the alarm vector */
b59c9457
SH		 1411 msix_id = (vpath->handle->vpath->hldev->first_vp_id *
1412 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
703da5a1
RV		 1413 vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
1414 }
1415}
1416
528f7272
JM		 1417/* list all mac addresses from DA table */
1418static enum vxge_hw_status
1419vxge_search_mac_addr_in_da_table(struct vxge_vpath *vpath, struct macInfo *mac)
1420{
1421 enum vxge_hw_status status = VXGE_HW_OK;
1422 unsigned char macmask[ETH_ALEN];
1423 unsigned char macaddr[ETH_ALEN];
1424
1425 status = vxge_hw_vpath_mac_addr_get(vpath->handle,
1426 macaddr, macmask);
1427 if (status != VXGE_HW_OK) {
1428 vxge_debug_init(VXGE_ERR,
1429 "DA config list entry failed for vpath:%d",
1430 vpath->device_id);
1431 return status;
1432 }
1433
f75d191b 1434 while (!ether_addr_equal(mac->macaddr, macaddr)) {
528f7272
JM		 1435 status = vxge_hw_vpath_mac_addr_get_next(vpath->handle,
1436 macaddr, macmask);
1437 if (status != VXGE_HW_OK)
1438 break;
1439 }
1440
1441 return status;
1442}
1443
1444/* Store all mac addresses from the list to the DA table */
1445static enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath)
1446{
1447 enum vxge_hw_status status = VXGE_HW_OK;
1448 struct macInfo mac_info;
1449 u8 *mac_address = NULL;
1450 struct list_head *entry, *next;
1451
1452 memset(&mac_info, 0, sizeof(struct macInfo));
1453
1454 if (vpath->is_open) {
1455 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
1456 mac_address =
1457 (u8 *)&
1458 ((struct vxge_mac_addrs *)entry)->macaddr;
1459 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1460 ((struct vxge_mac_addrs *)entry)->state =
1461 VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1462 /* does this mac address already exist in da table? */
1463 status = vxge_search_mac_addr_in_da_table(vpath,
1464 &mac_info);
1465 if (status != VXGE_HW_OK) {
1466 /* Add this mac address to the DA table */
1467 status = vxge_hw_vpath_mac_addr_add(
1468 vpath->handle, mac_info.macaddr,
1469 mac_info.macmask,
1470 VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE);
1471 if (status != VXGE_HW_OK) {
1472 vxge_debug_init(VXGE_ERR,
1473 "DA add entry failed for vpath:%d",
1474 vpath->device_id);
1475 ((struct vxge_mac_addrs *)entry)->state
1476 = VXGE_LL_MAC_ADDR_IN_LIST;
1477 }
1478 }
1479 }
1480 }
1481
1482 return status;
1483}
1484
1485/* Store all vlan ids from the list to the vid table */
1486static enum vxge_hw_status
1487vxge_restore_vpath_vid_table(struct vxge_vpath *vpath)
1488{
1489 enum vxge_hw_status status = VXGE_HW_OK;
1490 struct vxgedev *vdev = vpath->vdev;
1491 u16 vid;
1492
53515734
JP		 1493 if (!vpath->is_open)
1494 return status;
528f7272 1495
53515734
JP		 1496 for_each_set_bit(vid, vdev->active_vlans, VLAN_N_VID)
1497 status = vxge_hw_vpath_vid_add(vpath->handle, vid);
528f7272
JM		 1498
1499 return status;
1500}
1501
703da5a1
RV		 1502/*
1503 * vxge_reset_vpath
1504 * @vdev: pointer to vdev
1505 * @vp_id: vpath to reset
1506 *
1507 * Resets the vpath
1508*/
1509static int vxge_reset_vpath(struct vxgedev *vdev, int vp_id)
1510{
1511 enum vxge_hw_status status = VXGE_HW_OK;
7adf7d1b 1512 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
703da5a1
RV		 1513 int ret = 0;
1514
1515 /* check if device is down already */
1516 if (unlikely(!is_vxge_card_up(vdev)))
1517 return 0;
1518
1519 /* is device reset already scheduled */
1520 if (test_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
1521 return 0;
1522
7adf7d1b
JM		 1523 if (vpath->handle) {
1524 if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
703da5a1 1525 if (is_vxge_card_up(vdev) &&
7adf7d1b 1526 vxge_hw_vpath_recover_from_reset(vpath->handle)
703da5a1
RV		 1527 != VXGE_HW_OK) {
1528 vxge_debug_init(VXGE_ERR,
1529 "vxge_hw_vpath_recover_from_reset"
1530 "failed for vpath:%d", vp_id);
1531 return status;
1532 }
1533 } else {
1534 vxge_debug_init(VXGE_ERR,
1535 "vxge_hw_vpath_reset failed for"
1536 "vpath:%d", vp_id);
1537 return status;
1538 }
1539 } else
1540 return VXGE_HW_FAIL;
1541
7adf7d1b
JM		 1542 vxge_restore_vpath_mac_addr(vpath);
1543 vxge_restore_vpath_vid_table(vpath);
703da5a1
RV		 1544
1545 /* Enable all broadcast */
7adf7d1b
JM		 1546 vxge_hw_vpath_bcast_enable(vpath->handle);
1547
1548 /* Enable all multicast */
1549 if (vdev->all_multi_flg) {
1550 status = vxge_hw_vpath_mcast_enable(vpath->handle);
1551 if (status != VXGE_HW_OK)
1552 vxge_debug_init(VXGE_ERR,
1553 "%s:%d Enabling multicast failed",
1554 __func__, __LINE__);
1555 }
703da5a1
RV		 1556
1557 /* Enable the interrupts */
1558 vxge_vpath_intr_enable(vdev, vp_id);
1559
1560 smp_wmb();
1561
1562 /* Enable the flow of traffic through the vpath */
7adf7d1b 1563 vxge_hw_vpath_enable(vpath->handle);
703da5a1
RV		 1564
1565 smp_wmb();
7adf7d1b
JM		 1566 vxge_hw_vpath_rx_doorbell_init(vpath->handle);
1567 vpath->ring.last_status = VXGE_HW_OK;
703da5a1
RV		 1568
1569 /* Vpath reset done */
1570 clear_bit(vp_id, &vdev->vp_reset);
1571
1572 /* Start the vpath queue */
98f45da2
JM		 1573 if (netif_tx_queue_stopped(vpath->fifo.txq))
1574 netif_tx_wake_queue(vpath->fifo.txq);
703da5a1
RV		 1575
1576 return ret;
1577}
1578
16fded7d
JM		 1579/* Configure CI */
1580static void vxge_config_ci_for_tti_rti(struct vxgedev *vdev)
1581{
1582 int i = 0;
1583
1584 /* Enable CI for RTI */
1585 if (vdev->config.intr_type == MSI_X) {
1586 for (i = 0; i < vdev->no_of_vpath; i++) {
1587 struct __vxge_hw_ring *hw_ring;
1588
1589 hw_ring = vdev->vpaths[i].ring.handle;
1590 vxge_hw_vpath_dynamic_rti_ci_set(hw_ring);
1591 }
1592 }
1593
1594 /* Enable CI for TTI */
1595 for (i = 0; i < vdev->no_of_vpath; i++) {
1596 struct __vxge_hw_fifo *hw_fifo = vdev->vpaths[i].fifo.handle;
1597 vxge_hw_vpath_tti_ci_set(hw_fifo);
1598 /*
1599 * For Inta (with or without napi), Set CI ON for only one
1600 * vpath. (Have only one free running timer).
1601 */
1602 if ((vdev->config.intr_type == INTA) && (i == 0))
1603 break;
1604 }
1605
1606 return;
1607}
1608
703da5a1
RV		 1609static int do_vxge_reset(struct vxgedev *vdev, int event)
1610{
1611 enum vxge_hw_status status;
1612 int ret = 0, vp_id, i;
1613
1614 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1615
1616 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET)) {
1617 /* check if device is down already */
1618 if (unlikely(!is_vxge_card_up(vdev)))
1619 return 0;
1620
1621 /* is reset already scheduled */
1622 if (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
1623 return 0;
1624 }
1625
1626 if (event == VXGE_LL_FULL_RESET) {
2e41f644
JM		 1627 netif_carrier_off(vdev->ndev);
1628
703da5a1
RV		 1629 /* wait for all the vpath reset to complete */
1630 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
1631 while (test_bit(vp_id, &vdev->vp_reset))
1632 msleep(50);
1633 }
1634
2e41f644
JM		 1635 netif_carrier_on(vdev->ndev);
1636
703da5a1
RV		 1637 /* if execution mode is set to debug, don't reset the adapter */
1638 if (unlikely(vdev->exec_mode)) {
1639 vxge_debug_init(VXGE_ERR,
1640 "%s: execution mode is debug, returning..",
1641 vdev->ndev->name);
7adf7d1b
JM		 1642 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
1643 netif_tx_stop_all_queues(vdev->ndev);
1644 return 0;
703da5a1
RV		 1645 }
1646 }
1647
1648 if (event == VXGE_LL_FULL_RESET) {
4d2a5b40 1649 vxge_hw_device_wait_receive_idle(vdev->devh);
703da5a1
RV		 1650 vxge_hw_device_intr_disable(vdev->devh);
1651
1652 switch (vdev->cric_err_event) {
1653 case VXGE_HW_EVENT_UNKNOWN:
d03848e0 1654 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1655 vxge_debug_init(VXGE_ERR,
1656 "fatal: %s: Disabling device due to"
1657 "unknown error",
1658 vdev->ndev->name);
1659 ret = -EPERM;
1660 goto out;
1661 case VXGE_HW_EVENT_RESET_START:
1662 break;
1663 case VXGE_HW_EVENT_RESET_COMPLETE:
1664 case VXGE_HW_EVENT_LINK_DOWN:
1665 case VXGE_HW_EVENT_LINK_UP:
1666 case VXGE_HW_EVENT_ALARM_CLEARED:
1667 case VXGE_HW_EVENT_ECCERR:
1668 case VXGE_HW_EVENT_MRPCIM_ECCERR:
1669 ret = -EPERM;
1670 goto out;
1671 case VXGE_HW_EVENT_FIFO_ERR:
1672 case VXGE_HW_EVENT_VPATH_ERR:
1673 break;
1674 case VXGE_HW_EVENT_CRITICAL_ERR:
d03848e0 1675 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1676 vxge_debug_init(VXGE_ERR,
1677 "fatal: %s: Disabling device due to"
1678 "serious error",
1679 vdev->ndev->name);
1680 /* SOP or device reset required */
1681 /* This event is not currently used */
1682 ret = -EPERM;
1683 goto out;
1684 case VXGE_HW_EVENT_SERR:
d03848e0 1685 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1686 vxge_debug_init(VXGE_ERR,
1687 "fatal: %s: Disabling device due to"
1688 "serious error",
1689 vdev->ndev->name);
1690 ret = -EPERM;
1691 goto out;
1692 case VXGE_HW_EVENT_SRPCIM_SERR:
1693 case VXGE_HW_EVENT_MRPCIM_SERR:
1694 ret = -EPERM;
1695 goto out;
1696 case VXGE_HW_EVENT_SLOT_FREEZE:
d03848e0 1697 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1698 vxge_debug_init(VXGE_ERR,
1699 "fatal: %s: Disabling device due to"
1700 "slot freeze",
1701 vdev->ndev->name);
1702 ret = -EPERM;
1703 goto out;
1704 default:
1705 break;
1706
1707 }
1708 }
1709
1710 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET))
d03848e0 1711 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1712
1713 if (event == VXGE_LL_FULL_RESET) {
1714 status = vxge_reset_all_vpaths(vdev);
1715 if (status != VXGE_HW_OK) {
1716 vxge_debug_init(VXGE_ERR,
1717 "fatal: %s: can not reset vpaths",
1718 vdev->ndev->name);
1719 ret = -EPERM;
1720 goto out;
1721 }
1722 }
1723
1724 if (event == VXGE_LL_COMPL_RESET) {
1725 for (i = 0; i < vdev->no_of_vpath; i++)
1726 if (vdev->vpaths[i].handle) {
1727 if (vxge_hw_vpath_recover_from_reset(
1728 vdev->vpaths[i].handle)
1729 != VXGE_HW_OK) {
1730 vxge_debug_init(VXGE_ERR,
1731 "vxge_hw_vpath_recover_"
1732 "from_reset failed for vpath: "
1733 "%d", i);
1734 ret = -EPERM;
1735 goto out;
1736 }
1737 } else {
1738 vxge_debug_init(VXGE_ERR,
1739 "vxge_hw_vpath_reset failed for "
1740 "vpath:%d", i);
1741 ret = -EPERM;
1742 goto out;
1743 }
1744 }
1745
1746 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET)) {
1747 /* Reprogram the DA table with populated mac addresses */
1748 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
1749 vxge_restore_vpath_mac_addr(&vdev->vpaths[vp_id]);
1750 vxge_restore_vpath_vid_table(&vdev->vpaths[vp_id]);
1751 }
1752
1753 /* enable vpath interrupts */
1754 for (i = 0; i < vdev->no_of_vpath; i++)
1755 vxge_vpath_intr_enable(vdev, i);
1756
1757 vxge_hw_device_intr_enable(vdev->devh);
1758
1759 smp_wmb();
1760
1761 /* Indicate card up */
1762 set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
1763
1764 /* Get the traffic to flow through the vpaths */
1765 for (i = 0; i < vdev->no_of_vpath; i++) {
1766 vxge_hw_vpath_enable(vdev->vpaths[i].handle);
1767 smp_wmb();
1768 vxge_hw_vpath_rx_doorbell_init(vdev->vpaths[i].handle);
1769 }
1770
d03848e0 1771 netif_tx_wake_all_queues(vdev->ndev);
703da5a1
RV		 1772 }
1773
16fded7d
JM		 1774 /* configure CI */
1775 vxge_config_ci_for_tti_rti(vdev);
1776
703da5a1
RV		 1777out:
1778 vxge_debug_entryexit(VXGE_TRACE,
1779 "%s:%d Exiting...", __func__, __LINE__);
1780
1781 /* Indicate reset done */
1782 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET))
1783 clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
1784 return ret;
1785}
1786
1787/*
1788 * vxge_reset
1789 * @vdev: pointer to ll device
1790 *
1791 * driver may reset the chip on events of serr, eccerr, etc
1792 */
2e41f644 1793static void vxge_reset(struct work_struct *work)
703da5a1 1794{
2e41f644
JM		 1795 struct vxgedev *vdev = container_of(work, struct vxgedev, reset_task);
1796
1797 if (!netif_running(vdev->ndev))
1798 return;
1799
1800 do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
703da5a1
RV		 1801}
1802
1803/**
1804 * vxge_poll - Receive handler when Receive Polling is used.
1805 * @dev: pointer to the device structure.
1806 * @budget: Number of packets budgeted to be processed in this iteration.
1807 *
1808 * This function comes into picture only if Receive side is being handled
1809 * through polling (called NAPI in linux). It mostly does what the normal
1810 * Rx interrupt handler does in terms of descriptor and packet processing
1811 * but not in an interrupt context. Also it will process a specified number
1812 * of packets at most in one iteration. This value is passed down by the
1813 * kernel as the function argument 'budget'.
1814 */
1815static int vxge_poll_msix(struct napi_struct *napi, int budget)
1816{
16fded7d
JM		 1817 struct vxge_ring *ring = container_of(napi, struct vxge_ring, napi);
1818 int pkts_processed;
703da5a1 1819 int budget_org = budget;
703da5a1 1820
16fded7d
JM		 1821 ring->budget = budget;
1822 ring->pkts_processed = 0;
703da5a1 1823 vxge_hw_vpath_poll_rx(ring->handle);
16fded7d 1824 pkts_processed = ring->pkts_processed;
703da5a1
RV		 1825
1826 if (ring->pkts_processed < budget_org) {
1827 napi_complete(napi);
16fded7d 1828
703da5a1
RV		 1829 /* Re enable the Rx interrupts for the vpath */
1830 vxge_hw_channel_msix_unmask(
1831 (struct __vxge_hw_channel *)ring->handle,
1832 ring->rx_vector_no);
16fded7d 1833 mmiowb();
703da5a1
RV		 1834 }
1835
16fded7d
JM		 1836 /* We are copying and returning the local variable, in case if after
1837 * clearing the msix interrupt above, if the interrupt fires right
1838 * away which can preempt this NAPI thread */
1839 return pkts_processed;
703da5a1
RV		 1840}
1841
1842static int vxge_poll_inta(struct napi_struct *napi, int budget)
1843{
1844 struct vxgedev *vdev = container_of(napi, struct vxgedev, napi);
1845 int pkts_processed = 0;
1846 int i;
1847 int budget_org = budget;
1848 struct vxge_ring *ring;
1849
d8ee7071 1850 struct __vxge_hw_device *hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 1851
1852 for (i = 0; i < vdev->no_of_vpath; i++) {
1853 ring = &vdev->vpaths[i].ring;
1854 ring->budget = budget;
16fded7d 1855 ring->pkts_processed = 0;
703da5a1
RV		 1856 vxge_hw_vpath_poll_rx(ring->handle);
1857 pkts_processed += ring->pkts_processed;
1858 budget -= ring->pkts_processed;
1859 if (budget <= 0)
1860 break;
1861 }
1862
1863 VXGE_COMPLETE_ALL_TX(vdev);
1864
1865 if (pkts_processed < budget_org) {
1866 napi_complete(napi);
1867 /* Re enable the Rx interrupts for the ring */
1868 vxge_hw_device_unmask_all(hldev);
1869 vxge_hw_device_flush_io(hldev);
1870 }
1871
1872 return pkts_processed;
1873}
1874
1875#ifdef CONFIG_NET_POLL_CONTROLLER
1876/**
1877 * vxge_netpoll - netpoll event handler entry point
1878 * @dev : pointer to the device structure.
1879 * Description:
1880 * This function will be called by upper layer to check for events on the
1881 * interface in situations where interrupts are disabled. It is used for
1882 * specific in-kernel networking tasks, such as remote consoles and kernel
1883 * debugging over the network (example netdump in RedHat).
1884 */
1885static void vxge_netpoll(struct net_device *dev)
1886{
32e819e4
FR		 1887 struct vxgedev *vdev = netdev_priv(dev);
1888 struct pci_dev *pdev = vdev->pdev;
1889 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
1890 const int irq = pdev->irq;
703da5a1
RV		 1891
1892 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1893
32e819e4 1894 if (pci_channel_offline(pdev))
703da5a1
RV		 1895 return;
1896
32e819e4 1897 disable_irq(irq);
703da5a1
RV		 1898 vxge_hw_device_clear_tx_rx(hldev);
1899
1900 vxge_hw_device_clear_tx_rx(hldev);
1901 VXGE_COMPLETE_ALL_RX(vdev);
1902 VXGE_COMPLETE_ALL_TX(vdev);
1903
32e819e4 1904 enable_irq(irq);
703da5a1
RV		 1905
1906 vxge_debug_entryexit(VXGE_TRACE,
1907 "%s:%d Exiting...", __func__, __LINE__);
703da5a1
RV		 1908}
1909#endif
1910
1911/* RTH configuration */
1912static enum vxge_hw_status vxge_rth_configure(struct vxgedev *vdev)
1913{
1914 enum vxge_hw_status status = VXGE_HW_OK;
1915 struct vxge_hw_rth_hash_types hash_types;
1916 u8 itable[256] = {0}; /* indirection table */
1917 u8 mtable[256] = {0}; /* CPU to vpath mapping */
1918 int index;
1919
1920 /*
1921 * Filling
1922 * - itable with bucket numbers
1923 * - mtable with bucket-to-vpath mapping
1924 */
1925 for (index = 0; index < (1 << vdev->config.rth_bkt_sz); index++) {
1926 itable[index] = index;
1927 mtable[index] = index % vdev->no_of_vpath;
1928 }
1929
703da5a1
RV		 1930 /* set indirection table, bucket-to-vpath mapping */
1931 status = vxge_hw_vpath_rts_rth_itable_set(vdev->vp_handles,
1932 vdev->no_of_vpath,
1933 mtable, itable,
1934 vdev->config.rth_bkt_sz);
1935 if (status != VXGE_HW_OK) {
1936 vxge_debug_init(VXGE_ERR,
1937 "RTH indirection table configuration failed "
1938 "for vpath:%d", vdev->vpaths[0].device_id);
1939 return status;
1940 }
1941
47f01db4
JM		 1942 /* Fill RTH hash types */
1943 hash_types.hash_type_tcpipv4_en = vdev->config.rth_hash_type_tcpipv4;
1944 hash_types.hash_type_ipv4_en = vdev->config.rth_hash_type_ipv4;
1945 hash_types.hash_type_tcpipv6_en = vdev->config.rth_hash_type_tcpipv6;
1946 hash_types.hash_type_ipv6_en = vdev->config.rth_hash_type_ipv6;
1947 hash_types.hash_type_tcpipv6ex_en =
1948 vdev->config.rth_hash_type_tcpipv6ex;
1949 hash_types.hash_type_ipv6ex_en = vdev->config.rth_hash_type_ipv6ex;
1950
703da5a1 1951 /*
47f01db4
JM		 1952 * Because the itable_set() method uses the active_table field
1953 * for the target virtual path the RTH config should be updated
1954 * for all VPATHs. The h/w only uses the lowest numbered VPATH
1955 * when steering frames.
1956 */
703da5a1
RV		 1957 for (index = 0; index < vdev->no_of_vpath; index++) {
1958 status = vxge_hw_vpath_rts_rth_set(
1959 vdev->vpaths[index].handle,
1960 vdev->config.rth_algorithm,
1961 &hash_types,
1962 vdev->config.rth_bkt_sz);
703da5a1
RV		 1963 if (status != VXGE_HW_OK) {
1964 vxge_debug_init(VXGE_ERR,
1965 "RTH configuration failed for vpath:%d",
1966 vdev->vpaths[index].device_id);
1967 return status;
1968 }
1969 }
1970
1971 return status;
1972}
1973
703da5a1 1974/* reset vpaths */
e40c10fc 1975static enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev)
703da5a1 1976{
703da5a1 1977 enum vxge_hw_status status = VXGE_HW_OK;
7adf7d1b
JM		 1978 struct vxge_vpath *vpath;
1979 int i;
703da5a1 1980
7adf7d1b
JM		 1981 for (i = 0; i < vdev->no_of_vpath; i++) {
1982 vpath = &vdev->vpaths[i];
1983 if (vpath->handle) {
1984 if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
703da5a1
RV		 1985 if (is_vxge_card_up(vdev) &&
1986 vxge_hw_vpath_recover_from_reset(
7adf7d1b 1987 vpath->handle) != VXGE_HW_OK) {
703da5a1
RV		 1988 vxge_debug_init(VXGE_ERR,
1989 "vxge_hw_vpath_recover_"
1990 "from_reset failed for vpath: "
1991 "%d", i);
1992 return status;
1993 }
1994 } else {
1995 vxge_debug_init(VXGE_ERR,
1996 "vxge_hw_vpath_reset failed for "
1997 "vpath:%d", i);
1998 return status;
1999 }
2000 }
7adf7d1b
JM		 2001 }
2002
703da5a1
RV		 2003 return status;
2004}
2005
2006/* close vpaths */
42821a5b 2007static void vxge_close_vpaths(struct vxgedev *vdev, int index)
703da5a1 2008{
7adf7d1b 2009 struct vxge_vpath *vpath;
703da5a1 2010 int i;
7adf7d1b 2011
703da5a1 2012 for (i = index; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2013 vpath = &vdev->vpaths[i];
2014
2015 if (vpath->handle && vpath->is_open) {
2016 vxge_hw_vpath_close(vpath->handle);
703da5a1
RV		 2017 vdev->stats.vpaths_open--;
2018 }
7adf7d1b
JM		 2019 vpath->is_open = 0;
2020 vpath->handle = NULL;
703da5a1
RV		 2021 }
2022}
2023
2024/* open vpaths */
42821a5b 2025static int vxge_open_vpaths(struct vxgedev *vdev)
703da5a1 2026{
7adf7d1b 2027 struct vxge_hw_vpath_attr attr;
703da5a1 2028 enum vxge_hw_status status;
7adf7d1b 2029 struct vxge_vpath *vpath;
703da5a1 2030 u32 vp_id = 0;
7adf7d1b 2031 int i;
703da5a1
RV		 2032
2033 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b 2034 vpath = &vdev->vpaths[i];
7adf7d1b 2035 vxge_assert(vpath->is_configured);
e7935c96
JM		 2036
2037 if (!vdev->titan1) {
2038 struct vxge_hw_vp_config *vcfg;
2039 vcfg = &vdev->devh->config.vp_config[vpath->device_id];
2040
2041 vcfg->rti.urange_a = RTI_T1A_RX_URANGE_A;
2042 vcfg->rti.urange_b = RTI_T1A_RX_URANGE_B;
2043 vcfg->rti.urange_c = RTI_T1A_RX_URANGE_C;
2044 vcfg->tti.uec_a = TTI_T1A_TX_UFC_A;
2045 vcfg->tti.uec_b = TTI_T1A_TX_UFC_B;
2046 vcfg->tti.uec_c = TTI_T1A_TX_UFC_C(vdev->mtu);
2047 vcfg->tti.uec_d = TTI_T1A_TX_UFC_D(vdev->mtu);
2048 vcfg->tti.ltimer_val = VXGE_T1A_TTI_LTIMER_VAL;
2049 vcfg->tti.rtimer_val = VXGE_T1A_TTI_RTIMER_VAL;
2050 }
2051
7adf7d1b 2052 attr.vp_id = vpath->device_id;
703da5a1
RV		 2053 attr.fifo_attr.callback = vxge_xmit_compl;
2054 attr.fifo_attr.txdl_term = vxge_tx_term;
2055 attr.fifo_attr.per_txdl_space = sizeof(struct vxge_tx_priv);
7adf7d1b 2056 attr.fifo_attr.userdata = &vpath->fifo;
703da5a1
RV		 2057
2058 attr.ring_attr.callback = vxge_rx_1b_compl;
2059 attr.ring_attr.rxd_init = vxge_rx_initial_replenish;
2060 attr.ring_attr.rxd_term = vxge_rx_term;
2061 attr.ring_attr.per_rxd_space = sizeof(struct vxge_rx_priv);
7adf7d1b 2062 attr.ring_attr.userdata = &vpath->ring;
703da5a1 2063
7adf7d1b
JM		 2064 vpath->ring.ndev = vdev->ndev;
2065 vpath->ring.pdev = vdev->pdev;
528f7272 2066
7adf7d1b 2067 status = vxge_hw_vpath_open(vdev->devh, &attr, &vpath->handle);
703da5a1 2068 if (status == VXGE_HW_OK) {
7adf7d1b 2069 vpath->fifo.handle =
703da5a1 2070 (struct __vxge_hw_fifo *)attr.fifo_attr.userdata;
7adf7d1b 2071 vpath->ring.handle =
703da5a1 2072 (struct __vxge_hw_ring *)attr.ring_attr.userdata;
7adf7d1b 2073 vpath->fifo.tx_steering_type =
703da5a1 2074 vdev->config.tx_steering_type;
7adf7d1b
JM		 2075 vpath->fifo.ndev = vdev->ndev;
2076 vpath->fifo.pdev = vdev->pdev;
827da44c
JS		 2077
2078 u64_stats_init(&vpath->fifo.stats.syncp);
2079 u64_stats_init(&vpath->ring.stats.syncp);
2080
98f45da2
JM		 2081 if (vdev->config.tx_steering_type)
2082 vpath->fifo.txq =
2083 netdev_get_tx_queue(vdev->ndev, i);
2084 else
2085 vpath->fifo.txq =
2086 netdev_get_tx_queue(vdev->ndev, 0);
7adf7d1b 2087 vpath->fifo.indicate_max_pkts =
703da5a1 2088 vdev->config.fifo_indicate_max_pkts;
16fded7d 2089 vpath->fifo.tx_vector_no = 0;
7adf7d1b 2090 vpath->ring.rx_vector_no = 0;
b81b3733 2091 vpath->ring.rx_hwts = vdev->rx_hwts;
7adf7d1b
JM		 2092 vpath->is_open = 1;
2093 vdev->vp_handles[i] = vpath->handle;
7adf7d1b 2094 vpath->ring.vlan_tag_strip = vdev->vlan_tag_strip;
703da5a1
RV		 2095 vdev->stats.vpaths_open++;
2096 } else {
2097 vdev->stats.vpath_open_fail++;
528f7272
JM		 2098 vxge_debug_init(VXGE_ERR, "%s: vpath: %d failed to "
2099 "open with status: %d",
2100 vdev->ndev->name, vpath->device_id,
2101 status);
703da5a1
RV		 2102 vxge_close_vpaths(vdev, 0);
2103 return -EPERM;
2104 }
2105
7adf7d1b 2106 vp_id = vpath->handle->vpath->vp_id;
703da5a1
RV		 2107 vdev->vpaths_deployed |= vxge_mBIT(vp_id);
2108 }
528f7272 2109
703da5a1
RV		 2110 return VXGE_HW_OK;
2111}
2112
16fded7d
JM		 2113/**
2114 * adaptive_coalesce_tx_interrupts - Changes the interrupt coalescing
2115 * if the interrupts are not within a range
2116 * @fifo: pointer to transmit fifo structure
2117 * Description: The function changes boundary timer and restriction timer
2118 * value depends on the traffic
2119 * Return Value: None
2120 */
2121static void adaptive_coalesce_tx_interrupts(struct vxge_fifo *fifo)
2122{
2123 fifo->interrupt_count++;
f6e92d10 2124 if (time_before(fifo->jiffies + HZ / 100, jiffies)) {
16fded7d
JM		 2125 struct __vxge_hw_fifo *hw_fifo = fifo->handle;
2126
2127 fifo->jiffies = jiffies;
2128 if (fifo->interrupt_count > VXGE_T1A_MAX_TX_INTERRUPT_COUNT &&
2129 hw_fifo->rtimer != VXGE_TTI_RTIMER_ADAPT_VAL) {
2130 hw_fifo->rtimer = VXGE_TTI_RTIMER_ADAPT_VAL;
2131 vxge_hw_vpath_dynamic_tti_rtimer_set(hw_fifo);
2132 } else if (hw_fifo->rtimer != 0) {
2133 hw_fifo->rtimer = 0;
2134 vxge_hw_vpath_dynamic_tti_rtimer_set(hw_fifo);
2135 }
2136 fifo->interrupt_count = 0;
2137 }
2138}
2139
2140/**
2141 * adaptive_coalesce_rx_interrupts - Changes the interrupt coalescing
2142 * if the interrupts are not within a range
2143 * @ring: pointer to receive ring structure
2144 * Description: The function increases of decreases the packet counts within
2145 * the ranges of traffic utilization, if the interrupts due to this ring are
2146 * not within a fixed range.
2147 * Return Value: Nothing
2148 */
2149static void adaptive_coalesce_rx_interrupts(struct vxge_ring *ring)
2150{
2151 ring->interrupt_count++;
f6e92d10 2152 if (time_before(ring->jiffies + HZ / 100, jiffies)) {
16fded7d
JM		 2153 struct __vxge_hw_ring *hw_ring = ring->handle;
2154
2155 ring->jiffies = jiffies;
2156 if (ring->interrupt_count > VXGE_T1A_MAX_INTERRUPT_COUNT &&
2157 hw_ring->rtimer != VXGE_RTI_RTIMER_ADAPT_VAL) {
2158 hw_ring->rtimer = VXGE_RTI_RTIMER_ADAPT_VAL;
2159 vxge_hw_vpath_dynamic_rti_rtimer_set(hw_ring);
2160 } else if (hw_ring->rtimer != 0) {
2161 hw_ring->rtimer = 0;
2162 vxge_hw_vpath_dynamic_rti_rtimer_set(hw_ring);
2163 }
2164 ring->interrupt_count = 0;
2165 }
2166}
2167
703da5a1
RV		 2168/*
2169 * vxge_isr_napi
2170 * @irq: the irq of the device.
2171 * @dev_id: a void pointer to the hldev structure of the Titan device
2172 * @ptregs: pointer to the registers pushed on the stack.
2173 *
2174 * This function is the ISR handler of the device when napi is enabled. It
2175 * identifies the reason for the interrupt and calls the relevant service
2176 * routines.
2177 */
2178static irqreturn_t vxge_isr_napi(int irq, void *dev_id)
2179{
703da5a1 2180 struct net_device *dev;
a5d165b5 2181 struct __vxge_hw_device *hldev;
703da5a1
RV		 2182 u64 reason;
2183 enum vxge_hw_status status;
2c91308f 2184 struct vxgedev *vdev = (struct vxgedev *)dev_id;
703da5a1
RV		 2185
2186 vxge_debug_intr(VXGE_TRACE, "%s:%d", __func__, __LINE__);
2187
a5d165b5 2188 dev = vdev->ndev;
d8ee7071 2189 hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 2190
2191 if (pci_channel_offline(vdev->pdev))
2192 return IRQ_NONE;
2193
2194 if (unlikely(!is_vxge_card_up(vdev)))
4d2a5b40 2195 return IRQ_HANDLED;
703da5a1 2196
528f7272 2197 status = vxge_hw_device_begin_irq(hldev, vdev->exec_mode, &reason);
703da5a1
RV		 2198 if (status == VXGE_HW_OK) {
2199 vxge_hw_device_mask_all(hldev);
2200
2201 if (reason &
2202 VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_TRAFFIC_INT(
2203 vdev->vpaths_deployed >>
2204 (64 - VXGE_HW_MAX_VIRTUAL_PATHS))) {
2205
2206 vxge_hw_device_clear_tx_rx(hldev);
2207 napi_schedule(&vdev->napi);
2208 vxge_debug_intr(VXGE_TRACE,
2209 "%s:%d Exiting...", __func__, __LINE__);
2210 return IRQ_HANDLED;
2211 } else
2212 vxge_hw_device_unmask_all(hldev);
2213 } else if (unlikely((status == VXGE_HW_ERR_VPATH) ||
2214 (status == VXGE_HW_ERR_CRITICAL) ||
2215 (status == VXGE_HW_ERR_FIFO))) {
2216 vxge_hw_device_mask_all(hldev);
2217 vxge_hw_device_flush_io(hldev);
2218 return IRQ_HANDLED;
2219 } else if (unlikely(status == VXGE_HW_ERR_SLOT_FREEZE))
2220 return IRQ_HANDLED;
2221
2222 vxge_debug_intr(VXGE_TRACE, "%s:%d Exiting...", __func__, __LINE__);
2223 return IRQ_NONE;
2224}
2225
16fded7d 2226static irqreturn_t vxge_tx_msix_handle(int irq, void *dev_id)
703da5a1
RV		 2227{
2228 struct vxge_fifo *fifo = (struct vxge_fifo *)dev_id;
2229
16fded7d
JM		 2230 adaptive_coalesce_tx_interrupts(fifo);
2231
2232 vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)fifo->handle,
2233 fifo->tx_vector_no);
2234
2235 vxge_hw_channel_msix_clear((struct __vxge_hw_channel *)fifo->handle,
2236 fifo->tx_vector_no);
2237
703da5a1
RV		 2238 VXGE_COMPLETE_VPATH_TX(fifo);
2239
16fded7d
JM		 2240 vxge_hw_channel_msix_unmask((struct __vxge_hw_channel *)fifo->handle,
2241 fifo->tx_vector_no);
2242
2243 mmiowb();
2244
703da5a1
RV		 2245 return IRQ_HANDLED;
2246}
2247
16fded7d 2248static irqreturn_t vxge_rx_msix_napi_handle(int irq, void *dev_id)
703da5a1
RV		 2249{
2250 struct vxge_ring *ring = (struct vxge_ring *)dev_id;
2251
16fded7d
JM		 2252 adaptive_coalesce_rx_interrupts(ring);
2253
703da5a1 2254 vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)ring->handle,
16fded7d
JM		 2255 ring->rx_vector_no);
2256
2257 vxge_hw_channel_msix_clear((struct __vxge_hw_channel *)ring->handle,
2258 ring->rx_vector_no);
703da5a1
RV		 2259
2260 napi_schedule(&ring->napi);
2261 return IRQ_HANDLED;
2262}
2263
2264static irqreturn_t
2265vxge_alarm_msix_handle(int irq, void *dev_id)
2266{
2267 int i;
2268 enum vxge_hw_status status;
2269 struct vxge_vpath *vpath = (struct vxge_vpath *)dev_id;
2270 struct vxgedev *vdev = vpath->vdev;
b59c9457
SH		 2271 int msix_id = (vpath->handle->vpath->vp_id *
2272 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
703da5a1
RV		 2273
2274 for (i = 0; i < vdev->no_of_vpath; i++) {
25985edc 2275 /* Reduce the chance of losing alarm interrupts by masking
16fded7d
JM		 2276 * the vector. A pending bit will be set if an alarm is
2277 * generated and on unmask the interrupt will be fired.
2278 */
b59c9457 2279 vxge_hw_vpath_msix_mask(vdev->vpaths[i].handle, msix_id);
16fded7d
JM		 2280 vxge_hw_vpath_msix_clear(vdev->vpaths[i].handle, msix_id);
2281 mmiowb();
703da5a1
RV		 2282
2283 status = vxge_hw_vpath_alarm_process(vdev->vpaths[i].handle,
2284 vdev->exec_mode);
2285 if (status == VXGE_HW_OK) {
703da5a1 2286 vxge_hw_vpath_msix_unmask(vdev->vpaths[i].handle,
16fded7d
JM		 2287 msix_id);
2288 mmiowb();
703da5a1
RV		 2289 continue;
2290 }
2291 vxge_debug_intr(VXGE_ERR,
2292 "%s: vxge_hw_vpath_alarm_process failed %x ",
2293 VXGE_DRIVER_NAME, status);
2294 }
2295 return IRQ_HANDLED;
2296}
2297
2298static int vxge_alloc_msix(struct vxgedev *vdev)
2299{
2300 int j, i, ret = 0;
b59c9457 2301 int msix_intr_vect = 0, temp;
703da5a1
RV		 2302 vdev->intr_cnt = 0;
2303
b59c9457 2304start:
703da5a1
RV		 2305 /* Tx/Rx MSIX Vectors count */
2306 vdev->intr_cnt = vdev->no_of_vpath * 2;
2307
2308 /* Alarm MSIX Vectors count */
2309 vdev->intr_cnt++;
2310
baeb2ffa
JP		 2311 vdev->entries = kcalloc(vdev->intr_cnt, sizeof(struct msix_entry),
2312 GFP_KERNEL);
703da5a1
RV		 2313 if (!vdev->entries) {
2314 vxge_debug_init(VXGE_ERR,
2315 "%s: memory allocation failed",
2316 VXGE_DRIVER_NAME);
cc413d90
MS		 2317 ret = -ENOMEM;
2318 goto alloc_entries_failed;
703da5a1
RV		 2319 }
2320
baeb2ffa
JP		 2321 vdev->vxge_entries = kcalloc(vdev->intr_cnt,
2322 sizeof(struct vxge_msix_entry),
2323 GFP_KERNEL);
703da5a1
RV		 2324 if (!vdev->vxge_entries) {
2325 vxge_debug_init(VXGE_ERR, "%s: memory allocation failed",
2326 VXGE_DRIVER_NAME);
cc413d90
MS		 2327 ret = -ENOMEM;
2328 goto alloc_vxge_entries_failed;
703da5a1
RV		 2329 }
2330
b59c9457 2331 for (i = 0, j = 0; i < vdev->no_of_vpath; i++) {
703da5a1
RV		 2332
2333 msix_intr_vect = i * VXGE_HW_VPATH_MSIX_ACTIVE;
2334
2335 /* Initialize the fifo vector */
2336 vdev->entries[j].entry = msix_intr_vect;
2337 vdev->vxge_entries[j].entry = msix_intr_vect;
2338 vdev->vxge_entries[j].in_use = 0;
2339 j++;
2340
2341 /* Initialize the ring vector */
2342 vdev->entries[j].entry = msix_intr_vect + 1;
2343 vdev->vxge_entries[j].entry = msix_intr_vect + 1;
2344 vdev->vxge_entries[j].in_use = 0;
2345 j++;
2346 }
2347
2348 /* Initialize the alarm vector */
b59c9457
SH		 2349 vdev->entries[j].entry = VXGE_ALARM_MSIX_ID;
2350 vdev->vxge_entries[j].entry = VXGE_ALARM_MSIX_ID;
703da5a1
RV		 2351 vdev->vxge_entries[j].in_use = 0;
2352
9644cdcd
AG		 2353 ret = pci_enable_msix_range(vdev->pdev,
2354 vdev->entries, 3, vdev->intr_cnt);
2355 if (ret < 0) {
2356 ret = -ENODEV;
2357 goto enable_msix_failed;
2358 } else if (ret < vdev->intr_cnt) {
2359 pci_disable_msix(vdev->pdev);
2360
703da5a1
RV		 2361 vxge_debug_init(VXGE_ERR,
2362 "%s: MSI-X enable failed for %d vectors, ret: %d",
b59c9457 2363 VXGE_DRIVER_NAME, vdev->intr_cnt, ret);
9644cdcd 2364 if (max_config_vpath != VXGE_USE_DEFAULT) {
cc413d90
MS		 2365 ret = -ENODEV;
2366 goto enable_msix_failed;
2367 }
2368
703da5a1
RV		 2369 kfree(vdev->entries);
2370 kfree(vdev->vxge_entries);
2371 vdev->entries = NULL;
2372 vdev->vxge_entries = NULL;
b59c9457
SH		 2373 /* Try with less no of vector by reducing no of vpaths count */
2374 temp = (ret - 1)/2;
2375 vxge_close_vpaths(vdev, temp);
2376 vdev->no_of_vpath = temp;
2377 goto start;
cc413d90 2378 }
703da5a1 2379 return 0;
cc413d90
MS		 2380
2381enable_msix_failed:
2382 kfree(vdev->vxge_entries);
2383alloc_vxge_entries_failed:
2384 kfree(vdev->entries);
2385alloc_entries_failed:
2386 return ret;
703da5a1
RV		 2387}
2388
2389static int vxge_enable_msix(struct vxgedev *vdev)
2390{
2391
2392 int i, ret = 0;
703da5a1 2393 /* 0 - Tx, 1 - Rx */
b59c9457
SH		 2394 int tim_msix_id[4] = {0, 1, 0, 0};
2395
703da5a1
RV		 2396 vdev->intr_cnt = 0;
2397
2398 /* allocate msix vectors */
2399 ret = vxge_alloc_msix(vdev);
2400 if (!ret) {
703da5a1 2401 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b 2402 struct vxge_vpath *vpath = &vdev->vpaths[i];
703da5a1 2403
7adf7d1b
JM		 2404 /* If fifo or ring are not enabled, the MSIX vector for
2405 * it should be set to 0.
2406 */
2407 vpath->ring.rx_vector_no = (vpath->device_id *
2408 VXGE_HW_VPATH_MSIX_ACTIVE) + 1;
703da5a1 2409
16fded7d
JM		 2410 vpath->fifo.tx_vector_no = (vpath->device_id *
2411 VXGE_HW_VPATH_MSIX_ACTIVE);
2412
7adf7d1b
JM		 2413 vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
2414 VXGE_ALARM_MSIX_ID);
703da5a1
RV		 2415 }
2416 }
2417
2418 return ret;
2419}
2420
2421static void vxge_rem_msix_isr(struct vxgedev *vdev)
2422{
2423 int intr_cnt;
2424
b59c9457 2425 for (intr_cnt = 0; intr_cnt < (vdev->no_of_vpath * 2 + 1);
703da5a1
RV		 2426 intr_cnt++) {
2427 if (vdev->vxge_entries[intr_cnt].in_use) {
2428 synchronize_irq(vdev->entries[intr_cnt].vector);
2429 free_irq(vdev->entries[intr_cnt].vector,
2430 vdev->vxge_entries[intr_cnt].arg);
2431 vdev->vxge_entries[intr_cnt].in_use = 0;
2432 }
2433 }
2434
2435 kfree(vdev->entries);
2436 kfree(vdev->vxge_entries);
2437 vdev->entries = NULL;
2438 vdev->vxge_entries = NULL;
2439
2440 if (vdev->config.intr_type == MSI_X)
2441 pci_disable_msix(vdev->pdev);
2442}
703da5a1
RV		 2443
2444static void vxge_rem_isr(struct vxgedev *vdev)
2445{
57e7c8ce
AB		 2446 if (IS_ENABLED(CONFIG_PCI_MSI) &&
2447 vdev->config.intr_type == MSI_X) {
703da5a1 2448 vxge_rem_msix_isr(vdev);
57e7c8ce 2449 } else if (vdev->config.intr_type == INTA) {
703da5a1 2450 synchronize_irq(vdev->pdev->irq);
a5d165b5 2451 free_irq(vdev->pdev->irq, vdev);
703da5a1
RV		 2452 }
2453}
2454
2455static int vxge_add_isr(struct vxgedev *vdev)
2456{
2457 int ret = 0;
703da5a1 2458 int vp_idx = 0, intr_idx = 0, intr_cnt = 0, msix_idx = 0, irq_req = 0;
703da5a1
RV		 2459 int pci_fun = PCI_FUNC(vdev->pdev->devfn);
2460
57e7c8ce 2461 if (IS_ENABLED(CONFIG_PCI_MSI) && vdev->config.intr_type == MSI_X)
703da5a1
RV		 2462 ret = vxge_enable_msix(vdev);
2463
2464 if (ret) {
2465 vxge_debug_init(VXGE_ERR,
2466 "%s: Enabling MSI-X Failed", VXGE_DRIVER_NAME);
eb5f10c2
SH		 2467 vxge_debug_init(VXGE_ERR,
2468 "%s: Defaulting to INTA", VXGE_DRIVER_NAME);
2469 vdev->config.intr_type = INTA;
703da5a1
RV		 2470 }
2471
57e7c8ce 2472 if (IS_ENABLED(CONFIG_PCI_MSI) && vdev->config.intr_type == MSI_X) {
703da5a1
RV		 2473 for (intr_idx = 0;
2474 intr_idx < (vdev->no_of_vpath *
2475 VXGE_HW_VPATH_MSIX_ACTIVE); intr_idx++) {
2476
2477 msix_idx = intr_idx % VXGE_HW_VPATH_MSIX_ACTIVE;
2478 irq_req = 0;
2479
2480 switch (msix_idx) {
2481 case 0:
2482 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
b59c9457
SH		 2483 "%s:vxge:MSI-X %d - Tx - fn:%d vpath:%d",
2484 vdev->ndev->name,
2485 vdev->entries[intr_cnt].entry,
2486 pci_fun, vp_idx);
703da5a1
RV		 2487 ret = request_irq(
2488 vdev->entries[intr_cnt].vector,
2489 vxge_tx_msix_handle, 0,
2490 vdev->desc[intr_cnt],
2491 &vdev->vpaths[vp_idx].fifo);
2492 vdev->vxge_entries[intr_cnt].arg =
2493 &vdev->vpaths[vp_idx].fifo;
2494 irq_req = 1;
2495 break;
2496 case 1:
2497 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
b59c9457
SH		 2498 "%s:vxge:MSI-X %d - Rx - fn:%d vpath:%d",
2499 vdev->ndev->name,
2500 vdev->entries[intr_cnt].entry,
2501 pci_fun, vp_idx);
703da5a1
RV		 2502 ret = request_irq(
2503 vdev->entries[intr_cnt].vector,
2504 vxge_rx_msix_napi_handle,
2505 0,
2506 vdev->desc[intr_cnt],
2507 &vdev->vpaths[vp_idx].ring);
2508 vdev->vxge_entries[intr_cnt].arg =
2509 &vdev->vpaths[vp_idx].ring;
2510 irq_req = 1;
2511 break;
2512 }
2513
2514 if (ret) {
2515 vxge_debug_init(VXGE_ERR,
2516 "%s: MSIX - %d Registration failed",
2517 vdev->ndev->name, intr_cnt);
2518 vxge_rem_msix_isr(vdev);
eb5f10c2
SH		 2519 vdev->config.intr_type = INTA;
2520 vxge_debug_init(VXGE_ERR,
2521 "%s: Defaulting to INTA"
2522 , vdev->ndev->name);
703da5a1 2523 goto INTA_MODE;
703da5a1
RV		 2524 }
2525
2526 if (irq_req) {
2527 /* We requested for this msix interrupt */
2528 vdev->vxge_entries[intr_cnt].in_use = 1;
b59c9457
SH		 2529 msix_idx += vdev->vpaths[vp_idx].device_id *
2530 VXGE_HW_VPATH_MSIX_ACTIVE;
703da5a1
RV		 2531 vxge_hw_vpath_msix_unmask(
2532 vdev->vpaths[vp_idx].handle,
b59c9457 2533 msix_idx);
703da5a1
RV		 2534 intr_cnt++;
2535 }
2536
2537 /* Point to next vpath handler */
8e95a202
JP		 2538 if (((intr_idx + 1) % VXGE_HW_VPATH_MSIX_ACTIVE == 0) &&
2539 (vp_idx < (vdev->no_of_vpath - 1)))
2540 vp_idx++;
703da5a1
RV		 2541 }
2542
b59c9457 2543 intr_cnt = vdev->no_of_vpath * 2;
703da5a1 2544 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
b59c9457
SH		 2545 "%s:vxge:MSI-X %d - Alarm - fn:%d",
2546 vdev->ndev->name,
2547 vdev->entries[intr_cnt].entry,
2548 pci_fun);
703da5a1
RV		 2549 /* For Alarm interrupts */
2550 ret = request_irq(vdev->entries[intr_cnt].vector,
2551 vxge_alarm_msix_handle, 0,
2552 vdev->desc[intr_cnt],
b59c9457 2553 &vdev->vpaths[0]);
703da5a1
RV		 2554 if (ret) {
2555 vxge_debug_init(VXGE_ERR,
2556 "%s: MSIX - %d Registration failed",
2557 vdev->ndev->name, intr_cnt);
2558 vxge_rem_msix_isr(vdev);
eb5f10c2
SH		 2559 vdev->config.intr_type = INTA;
2560 vxge_debug_init(VXGE_ERR,
2561 "%s: Defaulting to INTA",
2562 vdev->ndev->name);
703da5a1 2563 goto INTA_MODE;
703da5a1
RV		 2564 }
2565
b59c9457
SH		 2566 msix_idx = (vdev->vpaths[0].handle->vpath->vp_id *
2567 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
703da5a1 2568 vxge_hw_vpath_msix_unmask(vdev->vpaths[vp_idx].handle,
b59c9457 2569 msix_idx);
703da5a1 2570 vdev->vxge_entries[intr_cnt].in_use = 1;
b59c9457 2571 vdev->vxge_entries[intr_cnt].arg = &vdev->vpaths[0];
703da5a1 2572 }
703da5a1 2573
57e7c8ce 2574INTA_MODE:
703da5a1 2575 if (vdev->config.intr_type == INTA) {
b59c9457
SH		 2576 snprintf(vdev->desc[0], VXGE_INTR_STRLEN,
2577 "%s:vxge:INTA", vdev->ndev->name);
eb5f10c2
SH		 2578 vxge_hw_device_set_intr_type(vdev->devh,
2579 VXGE_HW_INTR_MODE_IRQLINE);
16fded7d
JM		 2580
2581 vxge_hw_vpath_tti_ci_set(vdev->vpaths[0].fifo.handle);
2582
703da5a1
RV		 2583 ret = request_irq((int) vdev->pdev->irq,
2584 vxge_isr_napi,
a5d165b5 2585 IRQF_SHARED, vdev->desc[0], vdev);
703da5a1
RV		 2586 if (ret) {
2587 vxge_debug_init(VXGE_ERR,
2588 "%s %s-%d: ISR registration failed",
2589 VXGE_DRIVER_NAME, "IRQ", vdev->pdev->irq);
2590 return -ENODEV;
2591 }
2592 vxge_debug_init(VXGE_TRACE,
2593 "new %s-%d line allocated",
2594 "IRQ", vdev->pdev->irq);
2595 }
2596
2597 return VXGE_HW_OK;
2598}
2599
2600static void vxge_poll_vp_reset(unsigned long data)
2601{
2602 struct vxgedev *vdev = (struct vxgedev *)data;
2603 int i, j = 0;
2604
2605 for (i = 0; i < vdev->no_of_vpath; i++) {
2606 if (test_bit(i, &vdev->vp_reset)) {
2607 vxge_reset_vpath(vdev, i);
2608 j++;
2609 }
2610 }
2611 if (j && (vdev->config.intr_type != MSI_X)) {
2612 vxge_hw_device_unmask_all(vdev->devh);
2613 vxge_hw_device_flush_io(vdev->devh);
2614 }
2615
2616 mod_timer(&vdev->vp_reset_timer, jiffies + HZ / 2);
2617}
2618
2619static void vxge_poll_vp_lockup(unsigned long data)
2620{
2621 struct vxgedev *vdev = (struct vxgedev *)data;
703da5a1 2622 enum vxge_hw_status status = VXGE_HW_OK;
7adf7d1b
JM		 2623 struct vxge_vpath *vpath;
2624 struct vxge_ring *ring;
2625 int i;
62ea0557 2626 unsigned long rx_frms;
703da5a1
RV		 2627
2628 for (i = 0; i < vdev->no_of_vpath; i++) {
2629 ring = &vdev->vpaths[i].ring;
62ea0557 2630
2631 /* Truncated to machine word size number of frames */
2632 rx_frms = ACCESS_ONCE(ring->stats.rx_frms);
2633
703da5a1 2634 /* Did this vpath received any packets */
62ea0557 2635 if (ring->stats.prev_rx_frms == rx_frms) {
703da5a1
RV		 2636 status = vxge_hw_vpath_check_leak(ring->handle);
2637
2638 /* Did it received any packets last time */
2639 if ((VXGE_HW_FAIL == status) &&
2640 (VXGE_HW_FAIL == ring->last_status)) {
2641
2642 /* schedule vpath reset */
2643 if (!test_and_set_bit(i, &vdev->vp_reset)) {
7adf7d1b 2644 vpath = &vdev->vpaths[i];
703da5a1
RV		 2645
2646 /* disable interrupts for this vpath */
2647 vxge_vpath_intr_disable(vdev, i);
2648
2649 /* stop the queue for this vpath */
98f45da2 2650 netif_tx_stop_queue(vpath->fifo.txq);
703da5a1
RV		 2651 continue;
2652 }
2653 }
2654 }
62ea0557 2655 ring->stats.prev_rx_frms = rx_frms;
703da5a1
RV		 2656 ring->last_status = status;
2657 }
2658
2659 /* Check every 1 milli second */
2660 mod_timer(&vdev->vp_lockup_timer, jiffies + HZ / 1000);
2661}
2662
c8f44aff
MM		 2663static netdev_features_t vxge_fix_features(struct net_device *dev,
2664 netdev_features_t features)
feb990d4 2665{
c8f44aff 2666 netdev_features_t changed = dev->features ^ features;
feb990d4
MM		 2667
2668 /* Enabling RTH requires some of the logic in vxge_device_register and a
2669 * vpath reset. Due to these restrictions, only allow modification
2670 * while the interface is down.
2671 */
2672 if ((changed & NETIF_F_RXHASH) && netif_running(dev))
2673 features ^= NETIF_F_RXHASH;
2674
2675 return features;
2676}
2677
c8f44aff 2678static int vxge_set_features(struct net_device *dev, netdev_features_t features)
feb990d4
MM		 2679{
2680 struct vxgedev *vdev = netdev_priv(dev);
c8f44aff 2681 netdev_features_t changed = dev->features ^ features;
feb990d4
MM		 2682
2683 if (!(changed & NETIF_F_RXHASH))
2684 return 0;
2685
2686 /* !netif_running() ensured by vxge_fix_features() */
2687
2688 vdev->devh->config.rth_en = !!(features & NETIF_F_RXHASH);
2689 if (vxge_reset_all_vpaths(vdev) != VXGE_HW_OK) {
2690 dev->features = features ^ NETIF_F_RXHASH;
2691 vdev->devh->config.rth_en = !!(dev->features & NETIF_F_RXHASH);
2692 return -EIO;
2693 }
2694
2695 return 0;
2696}
2697
703da5a1
RV		 2698/**
2699 * vxge_open
2700 * @dev: pointer to the device structure.
2701 *
2702 * This function is the open entry point of the driver. It mainly calls a
2703 * function to allocate Rx buffers and inserts them into the buffer
2704 * descriptors and then enables the Rx part of the NIC.
2705 * Return value: '0' on success and an appropriate (-)ve integer as
2706 * defined in errno.h file on failure.
2707 */
528f7272 2708static int vxge_open(struct net_device *dev)
703da5a1
RV		 2709{
2710 enum vxge_hw_status status;
2711 struct vxgedev *vdev;
2712 struct __vxge_hw_device *hldev;
7adf7d1b 2713 struct vxge_vpath *vpath;
703da5a1
RV		 2714 int ret = 0;
2715 int i;
2716 u64 val64, function_mode;
528f7272 2717
703da5a1
RV		 2718 vxge_debug_entryexit(VXGE_TRACE,
2719 "%s: %s:%d", dev->name, __func__, __LINE__);
2720
5f54cebb 2721 vdev = netdev_priv(dev);
d8ee7071 2722 hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 2723 function_mode = vdev->config.device_hw_info.function_mode;
2724
2725 /* make sure you have link off by default every time Nic is
2726 * initialized */
2727 netif_carrier_off(dev);
2728
703da5a1
RV		 2729 /* Open VPATHs */
2730 status = vxge_open_vpaths(vdev);
2731 if (status != VXGE_HW_OK) {
2732 vxge_debug_init(VXGE_ERR,
2733 "%s: fatal: Vpath open failed", vdev->ndev->name);
2734 ret = -EPERM;
2735 goto out0;
2736 }
2737
2738 vdev->mtu = dev->mtu;
2739
2740 status = vxge_add_isr(vdev);
2741 if (status != VXGE_HW_OK) {
2742 vxge_debug_init(VXGE_ERR,
2743 "%s: fatal: ISR add failed", dev->name);
2744 ret = -EPERM;
2745 goto out1;
2746 }
2747
703da5a1
RV		 2748 if (vdev->config.intr_type != MSI_X) {
2749 netif_napi_add(dev, &vdev->napi, vxge_poll_inta,
2750 vdev->config.napi_weight);
2751 napi_enable(&vdev->napi);
7adf7d1b
JM		 2752 for (i = 0; i < vdev->no_of_vpath; i++) {
2753 vpath = &vdev->vpaths[i];
2754 vpath->ring.napi_p = &vdev->napi;
2755 }
703da5a1
RV		 2756 } else {
2757 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2758 vpath = &vdev->vpaths[i];
2759 netif_napi_add(dev, &vpath->ring.napi,
703da5a1 2760 vxge_poll_msix, vdev->config.napi_weight);
7adf7d1b
JM		 2761 napi_enable(&vpath->ring.napi);
2762 vpath->ring.napi_p = &vpath->ring.napi;
703da5a1
RV		 2763 }
2764 }
2765
2766 /* configure RTH */
2767 if (vdev->config.rth_steering) {
2768 status = vxge_rth_configure(vdev);
2769 if (status != VXGE_HW_OK) {
2770 vxge_debug_init(VXGE_ERR,
2771 "%s: fatal: RTH configuration failed",
2772 dev->name);
2773 ret = -EPERM;
2774 goto out2;
2775 }
2776 }
47f01db4
JM		 2777 printk(KERN_INFO "%s: Receive Hashing Offload %s\n", dev->name,
2778 hldev->config.rth_en ? "enabled" : "disabled");
703da5a1
RV		 2779
2780 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2781 vpath = &vdev->vpaths[i];
2782
703da5a1 2783 /* set initial mtu before enabling the device */
7adf7d1b 2784 status = vxge_hw_vpath_mtu_set(vpath->handle, vdev->mtu);
703da5a1
RV		 2785 if (status != VXGE_HW_OK) {
2786 vxge_debug_init(VXGE_ERR,
2787 "%s: fatal: can not set new MTU", dev->name);
2788 ret = -EPERM;
2789 goto out2;
2790 }
2791 }
2792
2793 VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_TRACE, VXGE_COMPONENT_LL, vdev);
2794 vxge_debug_init(vdev->level_trace,
2795 "%s: MTU is %d", vdev->ndev->name, vdev->mtu);
2796 VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_ERR, VXGE_COMPONENT_LL, vdev);
2797
7adf7d1b
JM		 2798 /* Restore the DA, VID table and also multicast and promiscuous mode
2799 * states
2800 */
2801 if (vdev->all_multi_flg) {
2802 for (i = 0; i < vdev->no_of_vpath; i++) {
2803 vpath = &vdev->vpaths[i];
2804 vxge_restore_vpath_mac_addr(vpath);
2805 vxge_restore_vpath_vid_table(vpath);
2806
2807 status = vxge_hw_vpath_mcast_enable(vpath->handle);
2808 if (status != VXGE_HW_OK)
2809 vxge_debug_init(VXGE_ERR,
2810 "%s:%d Enabling multicast failed",
2811 __func__, __LINE__);
2812 }
703da5a1
RV		 2813 }
2814
2815 /* Enable vpath to sniff all unicast/multicast traffic that not
25985edc 2816 * addressed to them. We allow promiscuous mode for PF only
703da5a1
RV		 2817 */
2818
2819 val64 = 0;
2820 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
2821 val64 |= VXGE_HW_RXMAC_AUTHORIZE_ALL_ADDR_VP(i);
2822
2823 vxge_hw_mgmt_reg_write(vdev->devh,
2824 vxge_hw_mgmt_reg_type_mrpcim,
2825 0,
2826 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2827 rxmac_authorize_all_addr),
2828 val64);
2829
2830 vxge_hw_mgmt_reg_write(vdev->devh,
2831 vxge_hw_mgmt_reg_type_mrpcim,
2832 0,
2833 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2834 rxmac_authorize_all_vid),
2835 val64);
2836
2837 vxge_set_multicast(dev);
2838
2839 /* Enabling Bcast and mcast for all vpath */
2840 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2841 vpath = &vdev->vpaths[i];
2842 status = vxge_hw_vpath_bcast_enable(vpath->handle);
703da5a1
RV		 2843 if (status != VXGE_HW_OK)
2844 vxge_debug_init(VXGE_ERR,
2845 "%s : Can not enable bcast for vpath "
2846 "id %d", dev->name, i);
2847 if (vdev->config.addr_learn_en) {
7adf7d1b 2848 status = vxge_hw_vpath_mcast_enable(vpath->handle);
703da5a1
RV		 2849 if (status != VXGE_HW_OK)
2850 vxge_debug_init(VXGE_ERR,
2851 "%s : Can not enable mcast for vpath "
2852 "id %d", dev->name, i);
2853 }
2854 }
2855
2856 vxge_hw_device_setpause_data(vdev->devh, 0,
2857 vdev->config.tx_pause_enable,
2858 vdev->config.rx_pause_enable);
2859
2860 if (vdev->vp_reset_timer.function == NULL)
044a3813
JP		 2861 vxge_os_timer(&vdev->vp_reset_timer, vxge_poll_vp_reset, vdev,
2862 HZ / 2);
703da5a1 2863
e7935c96
JM		 2864 /* There is no need to check for RxD leak and RxD lookup on Titan1A */
2865 if (vdev->titan1 && vdev->vp_lockup_timer.function == NULL)
044a3813 2866 vxge_os_timer(&vdev->vp_lockup_timer, vxge_poll_vp_lockup, vdev,
e7935c96 2867 HZ / 2);
703da5a1
RV		 2868
2869 set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
2870
2871 smp_wmb();
2872
2873 if (vxge_hw_device_link_state_get(vdev->devh) == VXGE_HW_LINK_UP) {
2874 netif_carrier_on(vdev->ndev);
75f5e1c6 2875 netdev_notice(vdev->ndev, "Link Up\n");
703da5a1
RV		 2876 vdev->stats.link_up++;
2877 }
2878
2879 vxge_hw_device_intr_enable(vdev->devh);
2880
2881 smp_wmb();
2882
2883 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2884 vpath = &vdev->vpaths[i];
2885
2886 vxge_hw_vpath_enable(vpath->handle);
703da5a1 2887 smp_wmb();
7adf7d1b 2888 vxge_hw_vpath_rx_doorbell_init(vpath->handle);
703da5a1
RV		 2889 }
2890
d03848e0 2891 netif_tx_start_all_queues(vdev->ndev);
16fded7d
JM		 2892
2893 /* configure CI */
2894 vxge_config_ci_for_tti_rti(vdev);
2895
703da5a1
RV		 2896 goto out0;
2897
2898out2:
2899 vxge_rem_isr(vdev);
2900
2901 /* Disable napi */
2902 if (vdev->config.intr_type != MSI_X)
2903 napi_disable(&vdev->napi);
2904 else {
2905 for (i = 0; i < vdev->no_of_vpath; i++)
2906 napi_disable(&vdev->vpaths[i].ring.napi);
2907 }
2908
2909out1:
2910 vxge_close_vpaths(vdev, 0);
2911out0:
2912 vxge_debug_entryexit(VXGE_TRACE,
2913 "%s: %s:%d Exiting...",
2914 dev->name, __func__, __LINE__);
2915 return ret;
2916}
2917
25985edc 2918/* Loop through the mac address list and delete all the entries */
42821a5b 2919static void vxge_free_mac_add_list(struct vxge_vpath *vpath)
703da5a1
RV		 2920{
2921
2922 struct list_head *entry, *next;
2923 if (list_empty(&vpath->mac_addr_list))
2924 return;
2925
2926 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
2927 list_del(entry);
2928 kfree((struct vxge_mac_addrs *)entry);
2929 }
2930}
2931
2932static void vxge_napi_del_all(struct vxgedev *vdev)
2933{
2934 int i;
2935 if (vdev->config.intr_type != MSI_X)
2936 netif_napi_del(&vdev->napi);
2937 else {
2938 for (i = 0; i < vdev->no_of_vpath; i++)
2939 netif_napi_del(&vdev->vpaths[i].ring.napi);
2940 }
703da5a1
RV		 2941}
2942
42821a5b 2943static int do_vxge_close(struct net_device *dev, int do_io)
703da5a1
RV		 2944{
2945 enum vxge_hw_status status;
2946 struct vxgedev *vdev;
2947 struct __vxge_hw_device *hldev;
2948 int i;
2949 u64 val64, vpath_vector;
2950 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
2951 dev->name, __func__, __LINE__);
2952
5f54cebb 2953 vdev = netdev_priv(dev);
d8ee7071 2954 hldev = pci_get_drvdata(vdev->pdev);
703da5a1 2955
bd9ee680
SH		 2956 if (unlikely(!is_vxge_card_up(vdev)))
2957 return 0;
2958
703da5a1
RV		 2959 /* If vxge_handle_crit_err task is executing,
2960 * wait till it completes. */
2961 while (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
2962 msleep(50);
2963
703da5a1
RV		 2964 if (do_io) {
2965 /* Put the vpath back in normal mode */
2966 vpath_vector = vxge_mBIT(vdev->vpaths[0].device_id);
2967 status = vxge_hw_mgmt_reg_read(vdev->devh,
2968 vxge_hw_mgmt_reg_type_mrpcim,
2969 0,
2970 (ulong)offsetof(
2971 struct vxge_hw_mrpcim_reg,
2972 rts_mgr_cbasin_cfg),
2973 &val64);
703da5a1
RV		 2974 if (status == VXGE_HW_OK) {
2975 val64 &= ~vpath_vector;
2976 status = vxge_hw_mgmt_reg_write(vdev->devh,
2977 vxge_hw_mgmt_reg_type_mrpcim,
2978 0,
2979 (ulong)offsetof(
2980 struct vxge_hw_mrpcim_reg,
2981 rts_mgr_cbasin_cfg),
2982 val64);
2983 }
2984
25985edc 2985 /* Remove the function 0 from promiscuous mode */
703da5a1
RV		 2986 vxge_hw_mgmt_reg_write(vdev->devh,
2987 vxge_hw_mgmt_reg_type_mrpcim,
2988 0,
2989 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2990 rxmac_authorize_all_addr),
2991 0);
2992
2993 vxge_hw_mgmt_reg_write(vdev->devh,
2994 vxge_hw_mgmt_reg_type_mrpcim,
2995 0,
2996 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2997 rxmac_authorize_all_vid),
2998 0);
2999
3000 smp_wmb();
3001 }
e7935c96
JM		 3002
3003 if (vdev->titan1)
3004 del_timer_sync(&vdev->vp_lockup_timer);
703da5a1
RV		 3005
3006 del_timer_sync(&vdev->vp_reset_timer);
3007
4d2a5b40
JM		 3008 if (do_io)
3009 vxge_hw_device_wait_receive_idle(hldev);
3010
3011 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3012
703da5a1
RV		 3013 /* Disable napi */
3014 if (vdev->config.intr_type != MSI_X)
3015 napi_disable(&vdev->napi);
3016 else {
3017 for (i = 0; i < vdev->no_of_vpath; i++)
3018 napi_disable(&vdev->vpaths[i].ring.napi);
3019 }
3020
3021 netif_carrier_off(vdev->ndev);
75f5e1c6 3022 netdev_notice(vdev->ndev, "Link Down\n");
d03848e0 3023 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 3024
3025 /* Note that at this point xmit() is stopped by upper layer */
3026 if (do_io)
3027 vxge_hw_device_intr_disable(vdev->devh);
3028
703da5a1
RV		 3029 vxge_rem_isr(vdev);
3030
3031 vxge_napi_del_all(vdev);
3032
3033 if (do_io)
3034 vxge_reset_all_vpaths(vdev);
3035
3036 vxge_close_vpaths(vdev, 0);
3037
3038 vxge_debug_entryexit(VXGE_TRACE,
3039 "%s: %s:%d Exiting...", dev->name, __func__, __LINE__);
3040
703da5a1
RV		 3041 clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
3042
3043 return 0;
3044}
3045
3046/**
3047 * vxge_close
3048 * @dev: device pointer.
3049 *
3050 * This is the stop entry point of the driver. It needs to undo exactly
3051 * whatever was done by the open entry point, thus it's usually referred to
3052 * as the close function.Among other things this function mainly stops the
3053 * Rx side of the NIC and frees all the Rx buffers in the Rx rings.
3054 * Return value: '0' on success and an appropriate (-)ve integer as
3055 * defined in errno.h file on failure.
3056 */
528f7272 3057static int vxge_close(struct net_device *dev)
703da5a1
RV		 3058{
3059 do_vxge_close(dev, 1);
3060 return 0;
3061}
3062
3063/**
3064 * vxge_change_mtu
3065 * @dev: net device pointer.
3066 * @new_mtu :the new MTU size for the device.
3067 *
3068 * A driver entry point to change MTU size for the device. Before changing
3069 * the MTU the device must be stopped.
3070 */
3071static int vxge_change_mtu(struct net_device *dev, int new_mtu)
3072{
3073 struct vxgedev *vdev = netdev_priv(dev);
3074
3075 vxge_debug_entryexit(vdev->level_trace,
3076 "%s:%d", __func__, __LINE__);
3077 if ((new_mtu < VXGE_HW_MIN_MTU) || (new_mtu > VXGE_HW_MAX_MTU)) {
3078 vxge_debug_init(vdev->level_err,
3079 "%s: mtu size is invalid", dev->name);
3080 return -EPERM;
3081 }
3082
3083 /* check if device is down already */
3084 if (unlikely(!is_vxge_card_up(vdev))) {
3085 /* just store new value, will use later on open() */
3086 dev->mtu = new_mtu;
3087 vxge_debug_init(vdev->level_err,
3088 "%s", "device is down on MTU change");
3089 return 0;
3090 }
3091
3092 vxge_debug_init(vdev->level_trace,
3093 "trying to apply new MTU %d", new_mtu);
3094
3095 if (vxge_close(dev))
3096 return -EIO;
3097
3098 dev->mtu = new_mtu;
3099 vdev->mtu = new_mtu;
3100
3101 if (vxge_open(dev))
3102 return -EIO;
3103
3104 vxge_debug_init(vdev->level_trace,
3105 "%s: MTU changed to %d", vdev->ndev->name, new_mtu);
3106
3107 vxge_debug_entryexit(vdev->level_trace,
3108 "%s:%d Exiting...", __func__, __LINE__);
3109
3110 return 0;
3111}
3112
3113/**
dd57f970 3114 * vxge_get_stats64
703da5a1 3115 * @dev: pointer to the device structure
dd57f970 3116 * @stats: pointer to struct rtnl_link_stats64
703da5a1 3117 *
703da5a1 3118 */
dd57f970
ED		 3119static struct rtnl_link_stats64 *
3120vxge_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *net_stats)
703da5a1 3121{
dd57f970 3122 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV		 3123 int k;
3124
dd57f970 3125 /* net_stats already zeroed by caller */
703da5a1 3126 for (k = 0; k < vdev->no_of_vpath; k++) {
62ea0557 3127 struct vxge_ring_stats *rxstats = &vdev->vpaths[k].ring.stats;
3128 struct vxge_fifo_stats *txstats = &vdev->vpaths[k].fifo.stats;
3129 unsigned int start;
3130 u64 packets, bytes, multicast;
3131
3132 do {
57a7744e 3133 start = u64_stats_fetch_begin_irq(&rxstats->syncp);
62ea0557 3134
3135 packets = rxstats->rx_frms;
3136 multicast = rxstats->rx_mcast;
3137 bytes = rxstats->rx_bytes;
57a7744e 3138 } while (u64_stats_fetch_retry_irq(&rxstats->syncp, start));
62ea0557 3139
3140 net_stats->rx_packets += packets;
3141 net_stats->rx_bytes += bytes;
3142 net_stats->multicast += multicast;
3143
3144 net_stats->rx_errors += rxstats->rx_errors;
3145 net_stats->rx_dropped += rxstats->rx_dropped;
3146
3147 do {
57a7744e 3148 start = u64_stats_fetch_begin_irq(&txstats->syncp);
62ea0557 3149
3150 packets = txstats->tx_frms;
3151 bytes = txstats->tx_bytes;
57a7744e 3152 } while (u64_stats_fetch_retry_irq(&txstats->syncp, start));
62ea0557 3153
3154 net_stats->tx_packets += packets;
3155 net_stats->tx_bytes += bytes;
3156 net_stats->tx_errors += txstats->tx_errors;
703da5a1
RV		 3157 }
3158
3159 return net_stats;
3160}
3161
cd883a79 3162static enum vxge_hw_status vxge_timestamp_config(struct __vxge_hw_device *devh)
b81b3733
JM		 3163{
3164 enum vxge_hw_status status;
3165 u64 val64;
3166
3167 /* Timestamp is passed to the driver via the FCS, therefore we
3168 * must disable the FCS stripping by the adapter. Since this is
3169 * required for the driver to load (due to a hardware bug),
3170 * there is no need to do anything special here.
3171 */
cd883a79
JM		 3172 val64 = VXGE_HW_XMAC_TIMESTAMP_EN |
3173 VXGE_HW_XMAC_TIMESTAMP_USE_LINK_ID(0) |
3174 VXGE_HW_XMAC_TIMESTAMP_INTERVAL(0);
b81b3733 3175
cd883a79 3176 status = vxge_hw_mgmt_reg_write(devh,
b81b3733
JM		 3177 vxge_hw_mgmt_reg_type_mrpcim,
3178 0,
3179 offsetof(struct vxge_hw_mrpcim_reg,
3180 xmac_timestamp),
3181 val64);
cd883a79
JM		 3182 vxge_hw_device_flush_io(devh);
3183 devh->config.hwts_en = VXGE_HW_HWTS_ENABLE;
b81b3733
JM		 3184 return status;
3185}
3186
450e55e9 3187static int vxge_hwtstamp_set(struct vxgedev *vdev, void __user *data)
b81b3733
JM		 3188{
3189 struct hwtstamp_config config;
b81b3733
JM		 3190 int i;
3191
3192 if (copy_from_user(&config, data, sizeof(config)))
3193 return -EFAULT;
3194
3195 /* reserved for future extensions */
3196 if (config.flags)
3197 return -EINVAL;
3198
3199 /* Transmit HW Timestamp not supported */
3200 switch (config.tx_type) {
3201 case HWTSTAMP_TX_OFF:
3202 break;
3203 case HWTSTAMP_TX_ON:
3204 default:
3205 return -ERANGE;
3206 }
3207
3208 switch (config.rx_filter) {
3209 case HWTSTAMP_FILTER_NONE:
b81b3733
JM		 3210 vdev->rx_hwts = 0;
3211 config.rx_filter = HWTSTAMP_FILTER_NONE;
3212 break;
3213
3214 case HWTSTAMP_FILTER_ALL:
3215 case HWTSTAMP_FILTER_SOME:
3216 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3217 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3218 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3219 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3220 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3221 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3222 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3223 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3224 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3225 case HWTSTAMP_FILTER_PTP_V2_EVENT:
3226 case HWTSTAMP_FILTER_PTP_V2_SYNC:
3227 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
cd883a79 3228 if (vdev->devh->config.hwts_en != VXGE_HW_HWTS_ENABLE)
b81b3733
JM		 3229 return -EFAULT;
3230
3231 vdev->rx_hwts = 1;
3232 config.rx_filter = HWTSTAMP_FILTER_ALL;
3233 break;
3234
3235 default:
3236 return -ERANGE;
3237 }
3238
3239 for (i = 0; i < vdev->no_of_vpath; i++)
3240 vdev->vpaths[i].ring.rx_hwts = vdev->rx_hwts;
3241
3242 if (copy_to_user(data, &config, sizeof(config)))
3243 return -EFAULT;
3244
3245 return 0;
3246}
3247
450e55e9
BH		 3248static int vxge_hwtstamp_get(struct vxgedev *vdev, void __user *data)
3249{
3250 struct hwtstamp_config config;
3251
3252 config.flags = 0;
3253 config.tx_type = HWTSTAMP_TX_OFF;
3254 config.rx_filter = (vdev->rx_hwts ?
3255 HWTSTAMP_FILTER_ALL : HWTSTAMP_FILTER_NONE);
3256
3257 if (copy_to_user(data, &config, sizeof(config)))
3258 return -EFAULT;
3259
3260 return 0;
3261}
3262
703da5a1
RV		 3263/**
3264 * vxge_ioctl
3265 * @dev: Device pointer.
3266 * @ifr: An IOCTL specific structure, that can contain a pointer to
3267 * a proprietary structure used to pass information to the driver.
3268 * @cmd: This is used to distinguish between the different commands that
3269 * can be passed to the IOCTL functions.
3270 *
3271 * Entry point for the Ioctl.
3272 */
3273static int vxge_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3274{
b81b3733 3275 struct vxgedev *vdev = netdev_priv(dev);
b81b3733
JM		 3276
3277 switch (cmd) {
3278 case SIOCSHWTSTAMP:
450e55e9
BH		 3279 return vxge_hwtstamp_set(vdev, rq->ifr_data);
3280 case SIOCGHWTSTAMP:
3281 return vxge_hwtstamp_get(vdev, rq->ifr_data);
b81b3733
JM		 3282 default:
3283 return -EOPNOTSUPP;
3284 }
703da5a1
RV		 3285}
3286
3287/**
3288 * vxge_tx_watchdog
3289 * @dev: pointer to net device structure
3290 *
3291 * Watchdog for transmit side.
3292 * This function is triggered if the Tx Queue is stopped
3293 * for a pre-defined amount of time when the Interface is still up.
3294 */
2e41f644 3295static void vxge_tx_watchdog(struct net_device *dev)
703da5a1
RV		 3296{
3297 struct vxgedev *vdev;
3298
3299 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
3300
5f54cebb 3301 vdev = netdev_priv(dev);
703da5a1
RV		 3302
3303 vdev->cric_err_event = VXGE_HW_EVENT_RESET_START;
3304
2e41f644 3305 schedule_work(&vdev->reset_task);
703da5a1
RV		 3306 vxge_debug_entryexit(VXGE_TRACE,
3307 "%s:%d Exiting...", __func__, __LINE__);
3308}
3309
703da5a1
RV		 3310/**
3311 * vxge_vlan_rx_add_vid
3312 * @dev: net device pointer.
80d5c368 3313 * @proto: vlan protocol
703da5a1
RV		 3314 * @vid: vid
3315 *
3316 * Add the vlan id to the devices vlan id table
3317 */
8e586137 3318static int
80d5c368 3319vxge_vlan_rx_add_vid(struct net_device *dev, __be16 proto, u16 vid)
703da5a1 3320{
53515734 3321 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV		 3322 struct vxge_vpath *vpath;
3323 int vp_id;
3324
703da5a1
RV		 3325 /* Add these vlan to the vid table */
3326 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
3327 vpath = &vdev->vpaths[vp_id];
3328 if (!vpath->is_open)
3329 continue;
3330 vxge_hw_vpath_vid_add(vpath->handle, vid);
3331 }
53515734 3332 set_bit(vid, vdev->active_vlans);
8e586137 3333 return 0;
703da5a1
RV		 3334}
3335
3336/**
80d5c368 3337 * vxge_vlan_rx_kill_vid
703da5a1 3338 * @dev: net device pointer.
80d5c368 3339 * @proto: vlan protocol
703da5a1
RV		 3340 * @vid: vid
3341 *
3342 * Remove the vlan id from the device's vlan id table
3343 */
8e586137 3344static int
80d5c368 3345vxge_vlan_rx_kill_vid(struct net_device *dev, __be16 proto, u16 vid)
703da5a1 3346{
53515734 3347 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV		 3348 struct vxge_vpath *vpath;
3349 int vp_id;
3350
3351 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
3352
703da5a1
RV		 3353 /* Delete this vlan from the vid table */
3354 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
3355 vpath = &vdev->vpaths[vp_id];
3356 if (!vpath->is_open)
3357 continue;
3358 vxge_hw_vpath_vid_delete(vpath->handle, vid);
3359 }
3360 vxge_debug_entryexit(VXGE_TRACE,
3361 "%s:%d Exiting...", __func__, __LINE__);
53515734 3362 clear_bit(vid, vdev->active_vlans);
8e586137 3363 return 0;
703da5a1
RV		 3364}
3365
3366static const struct net_device_ops vxge_netdev_ops = {
3367 .ndo_open = vxge_open,
3368 .ndo_stop = vxge_close,
dd57f970 3369 .ndo_get_stats64 = vxge_get_stats64,
703da5a1
RV		 3370 .ndo_start_xmit = vxge_xmit,
3371 .ndo_validate_addr = eth_validate_addr,
afc4b13d 3372 .ndo_set_rx_mode = vxge_set_multicast,
703da5a1 3373 .ndo_do_ioctl = vxge_ioctl,
703da5a1
RV		 3374 .ndo_set_mac_address = vxge_set_mac_addr,
3375 .ndo_change_mtu = vxge_change_mtu,
feb990d4
MM		 3376 .ndo_fix_features = vxge_fix_features,
3377 .ndo_set_features = vxge_set_features,
703da5a1
RV		 3378 .ndo_vlan_rx_kill_vid = vxge_vlan_rx_kill_vid,
3379 .ndo_vlan_rx_add_vid = vxge_vlan_rx_add_vid,
703da5a1
RV		 3380 .ndo_tx_timeout = vxge_tx_watchdog,
3381#ifdef CONFIG_NET_POLL_CONTROLLER
3382 .ndo_poll_controller = vxge_netpoll,
3383#endif
3384};
3385
3a036ce5 3386static int vxge_device_register(struct __vxge_hw_device *hldev,
1dd06ae8
GKH		 3387 struct vxge_config *config, int high_dma,
3388 int no_of_vpath, struct vxgedev **vdev_out)
703da5a1
RV		 3389{
3390 struct net_device *ndev;
3391 enum vxge_hw_status status = VXGE_HW_OK;
3392 struct vxgedev *vdev;
98f45da2 3393 int ret = 0, no_of_queue = 1;
703da5a1
RV		 3394 u64 stat;
3395
3396 *vdev_out = NULL;
d03848e0 3397 if (config->tx_steering_type)
703da5a1
RV		 3398 no_of_queue = no_of_vpath;
3399
3400 ndev = alloc_etherdev_mq(sizeof(struct vxgedev),
3401 no_of_queue);
3402 if (ndev == NULL) {
3403 vxge_debug_init(
3404 vxge_hw_device_trace_level_get(hldev),
3405 "%s : device allocation failed", __func__);
3406 ret = -ENODEV;
3407 goto _out0;
3408 }
3409
3410 vxge_debug_entryexit(
3411 vxge_hw_device_trace_level_get(hldev),
3412 "%s: %s:%d Entering...",
3413 ndev->name, __func__, __LINE__);
3414
3415 vdev = netdev_priv(ndev);
3416 memset(vdev, 0, sizeof(struct vxgedev));
3417
3418 vdev->ndev = ndev;
3419 vdev->devh = hldev;
3420 vdev->pdev = hldev->pdev;
3421 memcpy(&vdev->config, config, sizeof(struct vxge_config));
b81b3733 3422 vdev->rx_hwts = 0;
ff938e43 3423 vdev->titan1 = (vdev->pdev->revision == VXGE_HW_TITAN1_PCI_REVISION);
e7935c96 3424
703da5a1
RV		 3425 SET_NETDEV_DEV(ndev, &vdev->pdev->dev);
3426
feb990d4
MM		 3427 ndev->hw_features = NETIF_F_RXCSUM | NETIF_F_SG |
3428 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
3429 NETIF_F_TSO | NETIF_F_TSO6 |
f646968f 3430 NETIF_F_HW_VLAN_CTAG_TX;
feb990d4
MM		 3431 if (vdev->config.rth_steering != NO_STEERING)
3432 ndev->hw_features |= NETIF_F_RXHASH;
3433
3434 ndev->features |= ndev->hw_features |
f646968f 3435 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_FILTER;
feb990d4 3436
703da5a1
RV		 3437
3438 ndev->netdev_ops = &vxge_netdev_ops;
3439
3440 ndev->watchdog_timeo = VXGE_LL_WATCH_DOG_TIMEOUT;
2e41f644 3441 INIT_WORK(&vdev->reset_task, vxge_reset);
703da5a1 3442
42821a5b 3443 vxge_initialize_ethtool_ops(ndev);
703da5a1
RV		 3444
3445 /* Allocate memory for vpath */
3446 vdev->vpaths = kzalloc((sizeof(struct vxge_vpath)) *
3447 no_of_vpath, GFP_KERNEL);
3448 if (!vdev->vpaths) {
3449 vxge_debug_init(VXGE_ERR,
3450 "%s: vpath memory allocation failed",
3451 vdev->ndev->name);
6cca2003 3452 ret = -ENOMEM;
703da5a1
RV		 3453 goto _out1;
3454 }
3455
703da5a1 3456 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
278cee05 3457 "%s : checksumming enabled", __func__);
703da5a1
RV		 3458
3459 if (high_dma) {
3460 ndev->features |= NETIF_F_HIGHDMA;
3461 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3462 "%s : using High DMA", __func__);
3463 }
3464
6cca2003
JM		 3465 ret = register_netdev(ndev);
3466 if (ret) {
703da5a1
RV		 3467 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3468 "%s: %s : device registration failed!",
3469 ndev->name, __func__);
703da5a1
RV		 3470 goto _out2;
3471 }
3472
3473 /* Set the factory defined MAC address initially */
3474 ndev->addr_len = ETH_ALEN;
3475
3476 /* Make Link state as off at this point, when the Link change
3477 * interrupt comes the state will be automatically changed to
3478 * the right state.
3479 */
3480 netif_carrier_off(ndev);
3481
3482 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3483 "%s: Ethernet device registered",
3484 ndev->name);
3485
e8ac1756 3486 hldev->ndev = ndev;
703da5a1
RV		 3487 *vdev_out = vdev;
3488
3489 /* Resetting the Device stats */
3490 status = vxge_hw_mrpcim_stats_access(
3491 hldev,
3492 VXGE_HW_STATS_OP_CLEAR_ALL_STATS,
3493 0,
3494 0,
3495 &stat);
3496
3497 if (status == VXGE_HW_ERR_PRIVILAGED_OPEARATION)
3498 vxge_debug_init(
3499 vxge_hw_device_trace_level_get(hldev),
3500 "%s: device stats clear returns"
3501 "VXGE_HW_ERR_PRIVILAGED_OPEARATION", ndev->name);
3502
3503 vxge_debug_entryexit(vxge_hw_device_trace_level_get(hldev),
3504 "%s: %s:%d Exiting...",
3505 ndev->name, __func__, __LINE__);
3506
3507 return ret;
3508_out2:
3509 kfree(vdev->vpaths);
3510_out1:
3511 free_netdev(ndev);
3512_out0:
3513 return ret;
3514}
3515
3516/*
3517 * vxge_device_unregister
3518 *
3519 * This function will unregister and free network device
3520 */
2c91308f 3521static void vxge_device_unregister(struct __vxge_hw_device *hldev)
703da5a1
RV		 3522{
3523 struct vxgedev *vdev;
3524 struct net_device *dev;
3525 char buf[IFNAMSIZ];
703da5a1
RV		 3526
3527 dev = hldev->ndev;
3528 vdev = netdev_priv(dev);
703da5a1 3529
2c91308f
JM		 3530 vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d", vdev->ndev->name,
3531 __func__, __LINE__);
3532
13bb5180 3533 strlcpy(buf, dev->name, IFNAMSIZ);
703da5a1 3534
43829731 3535 flush_work(&vdev->reset_task);
ba27d85c 3536
703da5a1
RV		 3537 /* in 2.6 will call stop() if device is up */
3538 unregister_netdev(dev);
3539
6cca2003
JM		 3540 kfree(vdev->vpaths);
3541
3542 /* we are safe to free it now */
3543 free_netdev(dev);
3544
2c91308f
JM		 3545 vxge_debug_init(vdev->level_trace, "%s: ethernet device unregistered",
3546 buf);
3547 vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d Exiting...", buf,
3548 __func__, __LINE__);
703da5a1
RV		 3549}
3550
3551/*
3552 * vxge_callback_crit_err
3553 *
3554 * This function is called by the alarm handler in interrupt context.
3555 * Driver must analyze it based on the event type.
3556 */
3557static void
3558vxge_callback_crit_err(struct __vxge_hw_device *hldev,
3559 enum vxge_hw_event type, u64 vp_id)
3560{
3561 struct net_device *dev = hldev->ndev;
5f54cebb 3562 struct vxgedev *vdev = netdev_priv(dev);
98f45da2 3563 struct vxge_vpath *vpath = NULL;
703da5a1
RV		 3564 int vpath_idx;
3565
3566 vxge_debug_entryexit(vdev->level_trace,
3567 "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
3568
3569 /* Note: This event type should be used for device wide
3570 * indications only - Serious errors, Slot freeze and critical errors
3571 */
3572 vdev->cric_err_event = type;
3573
98f45da2
JM		 3574 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
3575 vpath = &vdev->vpaths[vpath_idx];
3576 if (vpath->device_id == vp_id)
703da5a1 3577 break;
98f45da2 3578 }
703da5a1
RV		 3579
3580 if (!test_bit(__VXGE_STATE_RESET_CARD, &vdev->state)) {
3581 if (type == VXGE_HW_EVENT_SLOT_FREEZE) {
3582 vxge_debug_init(VXGE_ERR,
3583 "%s: Slot is frozen", vdev->ndev->name);
3584 } else if (type == VXGE_HW_EVENT_SERR) {
3585 vxge_debug_init(VXGE_ERR,
3586 "%s: Encountered Serious Error",
3587 vdev->ndev->name);
3588 } else if (type == VXGE_HW_EVENT_CRITICAL_ERR)
3589 vxge_debug_init(VXGE_ERR,
3590 "%s: Encountered Critical Error",
3591 vdev->ndev->name);
3592 }
3593
3594 if ((type == VXGE_HW_EVENT_SERR) ||
3595 (type == VXGE_HW_EVENT_SLOT_FREEZE)) {
3596 if (unlikely(vdev->exec_mode))
3597 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3598 } else if (type == VXGE_HW_EVENT_CRITICAL_ERR) {
3599 vxge_hw_device_mask_all(hldev);
3600 if (unlikely(vdev->exec_mode))
3601 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3602 } else if ((type == VXGE_HW_EVENT_FIFO_ERR) ||
3603 (type == VXGE_HW_EVENT_VPATH_ERR)) {
3604
3605 if (unlikely(vdev->exec_mode))
3606 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3607 else {
3608 /* check if this vpath is already set for reset */
3609 if (!test_and_set_bit(vpath_idx, &vdev->vp_reset)) {
3610
3611 /* disable interrupts for this vpath */
3612 vxge_vpath_intr_disable(vdev, vpath_idx);
3613
3614 /* stop the queue for this vpath */
98f45da2 3615 netif_tx_stop_queue(vpath->fifo.txq);
703da5a1
RV		 3616 }
3617 }
3618 }
3619
3620 vxge_debug_entryexit(vdev->level_trace,
3621 "%s: %s:%d Exiting...",
3622 vdev->ndev->name, __func__, __LINE__);
3623}
3624
3625static void verify_bandwidth(void)
3626{
3627 int i, band_width, total = 0, equal_priority = 0;
3628
3629 /* 1. If user enters 0 for some fifo, give equal priority to all */
3630 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3631 if (bw_percentage[i] == 0) {
3632 equal_priority = 1;
3633 break;
3634 }
3635 }
3636
3637 if (!equal_priority) {
3638 /* 2. If sum exceeds 100, give equal priority to all */
3639 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3640 if (bw_percentage[i] == 0xFF)
3641 break;
3642
3643 total += bw_percentage[i];
3644 if (total > VXGE_HW_VPATH_BANDWIDTH_MAX) {
3645 equal_priority = 1;
3646 break;
3647 }
3648 }
3649 }
3650
3651 if (!equal_priority) {
3652 /* Is all the bandwidth consumed? */
3653 if (total < VXGE_HW_VPATH_BANDWIDTH_MAX) {
3654 if (i < VXGE_HW_MAX_VIRTUAL_PATHS) {
3655 /* Split rest of bw equally among next VPs*/
3656 band_width =
3657 (VXGE_HW_VPATH_BANDWIDTH_MAX - total) /
3658 (VXGE_HW_MAX_VIRTUAL_PATHS - i);
3659 if (band_width < 2) /* min of 2% */
3660 equal_priority = 1;
3661 else {
3662 for (; i < VXGE_HW_MAX_VIRTUAL_PATHS;
3663 i++)
3664 bw_percentage[i] =
3665 band_width;
3666 }
3667 }
3668 } else if (i < VXGE_HW_MAX_VIRTUAL_PATHS)
3669 equal_priority = 1;
3670 }
3671
3672 if (equal_priority) {
3673 vxge_debug_init(VXGE_ERR,
3674 "%s: Assigning equal bandwidth to all the vpaths",
3675 VXGE_DRIVER_NAME);
3676 bw_percentage[0] = VXGE_HW_VPATH_BANDWIDTH_MAX /
3677 VXGE_HW_MAX_VIRTUAL_PATHS;
3678 for (i = 1; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3679 bw_percentage[i] = bw_percentage[0];
3680 }
703da5a1
RV		 3681}
3682
3683/*
3684 * Vpath configuration
3685 */
1dd06ae8
GKH		 3686static int vxge_config_vpaths(struct vxge_hw_device_config *device_config,
3687 u64 vpath_mask, struct vxge_config *config_param)
703da5a1
RV		 3688{
3689 int i, no_of_vpaths = 0, default_no_vpath = 0, temp;
3690 u32 txdl_size, txdl_per_memblock;
3691
3692 temp = driver_config->vpath_per_dev;
3693 if ((driver_config->vpath_per_dev == VXGE_USE_DEFAULT) &&
3694 (max_config_dev == VXGE_MAX_CONFIG_DEV)) {
3695 /* No more CPU. Return vpath number as zero.*/
3696 if (driver_config->g_no_cpus == -1)
3697 return 0;
3698
3699 if (!driver_config->g_no_cpus)
9cbb5760
YM		 3700 driver_config->g_no_cpus =
3701 netif_get_num_default_rss_queues();
703da5a1
RV		 3702
3703 driver_config->vpath_per_dev = driver_config->g_no_cpus >> 1;
3704 if (!driver_config->vpath_per_dev)
3705 driver_config->vpath_per_dev = 1;
3706
3707 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3708 if (!vxge_bVALn(vpath_mask, i, 1))
3709 continue;
3710 else
3711 default_no_vpath++;
3712 if (default_no_vpath < driver_config->vpath_per_dev)
3713 driver_config->vpath_per_dev = default_no_vpath;
3714
3715 driver_config->g_no_cpus = driver_config->g_no_cpus -
3716 (driver_config->vpath_per_dev * 2);
3717 if (driver_config->g_no_cpus <= 0)
3718 driver_config->g_no_cpus = -1;
3719 }
3720
3721 if (driver_config->vpath_per_dev == 1) {
3722 vxge_debug_ll_config(VXGE_TRACE,
3723 "%s: Disable tx and rx steering, "
3724 "as single vpath is configured", VXGE_DRIVER_NAME);
3725 config_param->rth_steering = NO_STEERING;
3726 config_param->tx_steering_type = NO_STEERING;
3727 device_config->rth_en = 0;
3728 }
3729
3730 /* configure bandwidth */
3731 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3732 device_config->vp_config[i].min_bandwidth = bw_percentage[i];
3733
3734 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3735 device_config->vp_config[i].vp_id = i;
3736 device_config->vp_config[i].mtu = VXGE_HW_DEFAULT_MTU;
3737 if (no_of_vpaths < driver_config->vpath_per_dev) {
3738 if (!vxge_bVALn(vpath_mask, i, 1)) {
3739 vxge_debug_ll_config(VXGE_TRACE,
3740 "%s: vpath: %d is not available",
3741 VXGE_DRIVER_NAME, i);
3742 continue;
3743 } else {
3744 vxge_debug_ll_config(VXGE_TRACE,
3745 "%s: vpath: %d available",
3746 VXGE_DRIVER_NAME, i);
3747 no_of_vpaths++;
3748 }
3749 } else {
3750 vxge_debug_ll_config(VXGE_TRACE,
3751 "%s: vpath: %d is not configured, "
3752 "max_config_vpath exceeded",
3753 VXGE_DRIVER_NAME, i);
3754 break;
3755 }
3756
3757 /* Configure Tx fifo's */
3758 device_config->vp_config[i].fifo.enable =
3759 VXGE_HW_FIFO_ENABLE;
3760 device_config->vp_config[i].fifo.max_frags =
5beefb4f 3761 MAX_SKB_FRAGS + 1;
703da5a1
RV		 3762 device_config->vp_config[i].fifo.memblock_size =
3763 VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE;
3764
5beefb4f
SH		 3765 txdl_size = device_config->vp_config[i].fifo.max_frags *
3766 sizeof(struct vxge_hw_fifo_txd);
703da5a1
RV		 3767 txdl_per_memblock = VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE / txdl_size;
3768
3769 device_config->vp_config[i].fifo.fifo_blocks =
3770 ((VXGE_DEF_FIFO_LENGTH - 1) / txdl_per_memblock) + 1;
3771
3772 device_config->vp_config[i].fifo.intr =
3773 VXGE_HW_FIFO_QUEUE_INTR_DISABLE;
3774
3775 /* Configure tti properties */
3776 device_config->vp_config[i].tti.intr_enable =
3777 VXGE_HW_TIM_INTR_ENABLE;
3778
3779 device_config->vp_config[i].tti.btimer_val =
3780 (VXGE_TTI_BTIMER_VAL * 1000) / 272;
3781
3782 device_config->vp_config[i].tti.timer_ac_en =
3783 VXGE_HW_TIM_TIMER_AC_ENABLE;
3784
528f7272
JM		 3785 /* For msi-x with napi (each vector has a handler of its own) -
3786 * Set CI to OFF for all vpaths
3787 */
703da5a1
RV		 3788 device_config->vp_config[i].tti.timer_ci_en =
3789 VXGE_HW_TIM_TIMER_CI_DISABLE;
3790
3791 device_config->vp_config[i].tti.timer_ri_en =
3792 VXGE_HW_TIM_TIMER_RI_DISABLE;
3793
3794 device_config->vp_config[i].tti.util_sel =
3795 VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL;
3796
3797 device_config->vp_config[i].tti.ltimer_val =
3798 (VXGE_TTI_LTIMER_VAL * 1000) / 272;
3799
3800 device_config->vp_config[i].tti.rtimer_val =
3801 (VXGE_TTI_RTIMER_VAL * 1000) / 272;
3802
3803 device_config->vp_config[i].tti.urange_a = TTI_TX_URANGE_A;
3804 device_config->vp_config[i].tti.urange_b = TTI_TX_URANGE_B;
3805 device_config->vp_config[i].tti.urange_c = TTI_TX_URANGE_C;
3806 device_config->vp_config[i].tti.uec_a = TTI_TX_UFC_A;
3807 device_config->vp_config[i].tti.uec_b = TTI_TX_UFC_B;
3808 device_config->vp_config[i].tti.uec_c = TTI_TX_UFC_C;
3809 device_config->vp_config[i].tti.uec_d = TTI_TX_UFC_D;
3810
3811 /* Configure Rx rings */
3812 device_config->vp_config[i].ring.enable =
3813 VXGE_HW_RING_ENABLE;
3814
3815 device_config->vp_config[i].ring.ring_blocks =
3816 VXGE_HW_DEF_RING_BLOCKS;
528f7272 3817
703da5a1
RV		 3818 device_config->vp_config[i].ring.buffer_mode =
3819 VXGE_HW_RING_RXD_BUFFER_MODE_1;
528f7272 3820
703da5a1
RV		 3821 device_config->vp_config[i].ring.rxds_limit =
3822 VXGE_HW_DEF_RING_RXDS_LIMIT;
528f7272 3823
703da5a1
RV		 3824 device_config->vp_config[i].ring.scatter_mode =
3825 VXGE_HW_RING_SCATTER_MODE_A;
3826
3827 /* Configure rti properties */
3828 device_config->vp_config[i].rti.intr_enable =
3829 VXGE_HW_TIM_INTR_ENABLE;
3830
3831 device_config->vp_config[i].rti.btimer_val =
3832 (VXGE_RTI_BTIMER_VAL * 1000)/272;
3833
3834 device_config->vp_config[i].rti.timer_ac_en =
3835 VXGE_HW_TIM_TIMER_AC_ENABLE;
3836
3837 device_config->vp_config[i].rti.timer_ci_en =
3838 VXGE_HW_TIM_TIMER_CI_DISABLE;
3839
3840 device_config->vp_config[i].rti.timer_ri_en =
3841 VXGE_HW_TIM_TIMER_RI_DISABLE;
3842
3843 device_config->vp_config[i].rti.util_sel =
3844 VXGE_HW_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL;
3845
3846 device_config->vp_config[i].rti.urange_a =
3847 RTI_RX_URANGE_A;
3848 device_config->vp_config[i].rti.urange_b =
3849 RTI_RX_URANGE_B;
3850 device_config->vp_config[i].rti.urange_c =
3851 RTI_RX_URANGE_C;
3852 device_config->vp_config[i].rti.uec_a = RTI_RX_UFC_A;
3853 device_config->vp_config[i].rti.uec_b = RTI_RX_UFC_B;
3854 device_config->vp_config[i].rti.uec_c = RTI_RX_UFC_C;
3855 device_config->vp_config[i].rti.uec_d = RTI_RX_UFC_D;
3856
3857 device_config->vp_config[i].rti.rtimer_val =
3858 (VXGE_RTI_RTIMER_VAL * 1000) / 272;
3859
3860 device_config->vp_config[i].rti.ltimer_val =
3861 (VXGE_RTI_LTIMER_VAL * 1000) / 272;
3862
3863 device_config->vp_config[i].rpa_strip_vlan_tag =
3864 vlan_tag_strip;
3865 }
3866
3867 driver_config->vpath_per_dev = temp;
3868 return no_of_vpaths;
3869}
3870
3871/* initialize device configuratrions */
1dd06ae8
GKH		 3872static void vxge_device_config_init(struct vxge_hw_device_config *device_config,
3873 int *intr_type)
703da5a1
RV		 3874{
3875 /* Used for CQRQ/SRQ. */
3876 device_config->dma_blockpool_initial =
3877 VXGE_HW_INITIAL_DMA_BLOCK_POOL_SIZE;
3878
3879 device_config->dma_blockpool_max =
3880 VXGE_HW_MAX_DMA_BLOCK_POOL_SIZE;
3881
3882 if (max_mac_vpath > VXGE_MAX_MAC_ADDR_COUNT)
3883 max_mac_vpath = VXGE_MAX_MAC_ADDR_COUNT;
3884
57e7c8ce
AB		 3885 if (!IS_ENABLED(CONFIG_PCI_MSI)) {
3886 vxge_debug_init(VXGE_ERR,
3887 "%s: This Kernel does not support "
3888 "MSI-X. Defaulting to INTA", VXGE_DRIVER_NAME);
3889 *intr_type = INTA;
3890 }
703da5a1
RV		 3891
3892 /* Configure whether MSI-X or IRQL. */
3893 switch (*intr_type) {
3894 case INTA:
3895 device_config->intr_mode = VXGE_HW_INTR_MODE_IRQLINE;
3896 break;
3897
3898 case MSI_X:
16fded7d 3899 device_config->intr_mode = VXGE_HW_INTR_MODE_MSIX_ONE_SHOT;
703da5a1
RV		 3900 break;
3901 }
528f7272 3902
703da5a1
RV		 3903 /* Timer period between device poll */
3904 device_config->device_poll_millis = VXGE_TIMER_DELAY;
3905
3906 /* Configure mac based steering. */
3907 device_config->rts_mac_en = addr_learn_en;
3908
3909 /* Configure Vpaths */
3910 device_config->rth_it_type = VXGE_HW_RTH_IT_TYPE_MULTI_IT;
3911
3912 vxge_debug_ll_config(VXGE_TRACE, "%s : Device Config Params ",
3913 __func__);
703da5a1
RV		 3914 vxge_debug_ll_config(VXGE_TRACE, "intr_mode : %d",
3915 device_config->intr_mode);
3916 vxge_debug_ll_config(VXGE_TRACE, "device_poll_millis : %d",
3917 device_config->device_poll_millis);
703da5a1
RV		 3918 vxge_debug_ll_config(VXGE_TRACE, "rth_en : %d",
3919 device_config->rth_en);
3920 vxge_debug_ll_config(VXGE_TRACE, "rth_it_type : %d",
3921 device_config->rth_it_type);
3922}
3923
3a036ce5 3924static void vxge_print_parm(struct vxgedev *vdev, u64 vpath_mask)
703da5a1
RV		 3925{
3926 int i;
3927
3928 vxge_debug_init(VXGE_TRACE,
3929 "%s: %d Vpath(s) opened",
3930 vdev->ndev->name, vdev->no_of_vpath);
3931
3932 switch (vdev->config.intr_type) {
3933 case INTA:
3934 vxge_debug_init(VXGE_TRACE,
3935 "%s: Interrupt type INTA", vdev->ndev->name);
3936 break;
3937
3938 case MSI_X:
3939 vxge_debug_init(VXGE_TRACE,
3940 "%s: Interrupt type MSI-X", vdev->ndev->name);
3941 break;
3942 }
3943
3944 if (vdev->config.rth_steering) {
3945 vxge_debug_init(VXGE_TRACE,
3946 "%s: RTH steering enabled for TCP_IPV4",
3947 vdev->ndev->name);
3948 } else {
3949 vxge_debug_init(VXGE_TRACE,
3950 "%s: RTH steering disabled", vdev->ndev->name);
3951 }
3952
3953 switch (vdev->config.tx_steering_type) {
3954 case NO_STEERING:
3955 vxge_debug_init(VXGE_TRACE,
3956 "%s: Tx steering disabled", vdev->ndev->name);
3957 break;
3958 case TX_PRIORITY_STEERING:
3959 vxge_debug_init(VXGE_TRACE,
3960 "%s: Unsupported tx steering option",
3961 vdev->ndev->name);
3962 vxge_debug_init(VXGE_TRACE,
3963 "%s: Tx steering disabled", vdev->ndev->name);
3964 vdev->config.tx_steering_type = 0;
3965 break;
3966 case TX_VLAN_STEERING:
3967 vxge_debug_init(VXGE_TRACE,
3968 "%s: Unsupported tx steering option",
3969 vdev->ndev->name);
3970 vxge_debug_init(VXGE_TRACE,
3971 "%s: Tx steering disabled", vdev->ndev->name);
3972 vdev->config.tx_steering_type = 0;
3973 break;
3974 case TX_MULTIQ_STEERING:
3975 vxge_debug_init(VXGE_TRACE,
3976 "%s: Tx multiqueue steering enabled",
3977 vdev->ndev->name);
3978 break;
3979 case TX_PORT_STEERING:
3980 vxge_debug_init(VXGE_TRACE,
3981 "%s: Tx port steering enabled",
3982 vdev->ndev->name);
3983 break;
3984 default:
3985 vxge_debug_init(VXGE_ERR,
3986 "%s: Unsupported tx steering type",
3987 vdev->ndev->name);
3988 vxge_debug_init(VXGE_TRACE,
3989 "%s: Tx steering disabled", vdev->ndev->name);
3990 vdev->config.tx_steering_type = 0;
3991 }
3992
703da5a1
RV		 3993 if (vdev->config.addr_learn_en)
3994 vxge_debug_init(VXGE_TRACE,
3995 "%s: MAC Address learning enabled", vdev->ndev->name);
3996
703da5a1
RV		 3997 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3998 if (!vxge_bVALn(vpath_mask, i, 1))
3999 continue;
4000 vxge_debug_ll_config(VXGE_TRACE,
4001 "%s: MTU size - %d", vdev->ndev->name,
64699336 4002 ((vdev->devh))->
703da5a1
RV		 4003 config.vp_config[i].mtu);
4004 vxge_debug_init(VXGE_TRACE,
4005 "%s: VLAN tag stripping %s", vdev->ndev->name,
64699336 4006 ((vdev->devh))->
703da5a1
RV		 4007 config.vp_config[i].rpa_strip_vlan_tag
4008 ? "Enabled" : "Disabled");
703da5a1
RV		 4009 vxge_debug_ll_config(VXGE_TRACE,
4010 "%s: Max frags : %d", vdev->ndev->name,
64699336 4011 ((vdev->devh))->
703da5a1
RV		 4012 config.vp_config[i].fifo.max_frags);
4013 break;
4014 }
4015}
4016
4017#ifdef CONFIG_PM
4018/**
4019 * vxge_pm_suspend - vxge power management suspend entry point
4020 *
4021 */
4022static int vxge_pm_suspend(struct pci_dev *pdev, pm_message_t state)
4023{
4024 return -ENOSYS;
4025}
4026/**
4027 * vxge_pm_resume - vxge power management resume entry point
4028 *
4029 */
4030static int vxge_pm_resume(struct pci_dev *pdev)
4031{
4032 return -ENOSYS;
4033}
4034
4035#endif
4036
4037/**
4038 * vxge_io_error_detected - called when PCI error is detected
4039 * @pdev: Pointer to PCI device
4040 * @state: The current pci connection state
4041 *
4042 * This function is called after a PCI bus error affecting
4043 * this device has been detected.
4044 */
4045static pci_ers_result_t vxge_io_error_detected(struct pci_dev *pdev,
4046 pci_channel_state_t state)
4047{
d8ee7071 4048 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
703da5a1
RV		 4049 struct net_device *netdev = hldev->ndev;
4050
4051 netif_device_detach(netdev);
4052
e33b992d
DN		 4053 if (state == pci_channel_io_perm_failure)
4054 return PCI_ERS_RESULT_DISCONNECT;
4055
703da5a1
RV		 4056 if (netif_running(netdev)) {
4057 /* Bring down the card, while avoiding PCI I/O */
4058 do_vxge_close(netdev, 0);
4059 }
4060
4061 pci_disable_device(pdev);
4062
4063 return PCI_ERS_RESULT_NEED_RESET;
4064}
4065
4066/**
4067 * vxge_io_slot_reset - called after the pci bus has been reset.
4068 * @pdev: Pointer to PCI device
4069 *
4070 * Restart the card from scratch, as if from a cold-boot.
4071 * At this point, the card has exprienced a hard reset,
4072 * followed by fixups by BIOS, and has its config space
4073 * set up identically to what it was at cold boot.
4074 */
4075static pci_ers_result_t vxge_io_slot_reset(struct pci_dev *pdev)
4076{
d8ee7071 4077 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
703da5a1
RV		 4078 struct net_device *netdev = hldev->ndev;
4079
4080 struct vxgedev *vdev = netdev_priv(netdev);
4081
4082 if (pci_enable_device(pdev)) {
75f5e1c6 4083 netdev_err(netdev, "Cannot re-enable device after reset\n");
703da5a1
RV		 4084 return PCI_ERS_RESULT_DISCONNECT;
4085 }
4086
4087 pci_set_master(pdev);
528f7272 4088 do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
703da5a1
RV		 4089
4090 return PCI_ERS_RESULT_RECOVERED;
4091}
4092
4093/**
4094 * vxge_io_resume - called when traffic can start flowing again.
4095 * @pdev: Pointer to PCI device
4096 *
4097 * This callback is called when the error recovery driver tells
4098 * us that its OK to resume normal operation.
4099 */
4100static void vxge_io_resume(struct pci_dev *pdev)
4101{
d8ee7071 4102 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
703da5a1
RV		 4103 struct net_device *netdev = hldev->ndev;
4104
4105 if (netif_running(netdev)) {
4106 if (vxge_open(netdev)) {
75f5e1c6
JP		 4107 netdev_err(netdev,
4108 "Can't bring device back up after reset\n");
703da5a1
RV		 4109 return;
4110 }
4111 }
4112
4113 netif_device_attach(netdev);
4114}
4115
cb27ec60
SH		 4116static inline u32 vxge_get_num_vfs(u64 function_mode)
4117{
4118 u32 num_functions = 0;
4119
4120 switch (function_mode) {
4121 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
4122 case VXGE_HW_FUNCTION_MODE_SRIOV_8:
4123 num_functions = 8;
4124 break;
4125 case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
4126 num_functions = 1;
4127 break;
4128 case VXGE_HW_FUNCTION_MODE_SRIOV:
4129 case VXGE_HW_FUNCTION_MODE_MRIOV:
4130 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_17:
4131 num_functions = 17;
4132 break;
4133 case VXGE_HW_FUNCTION_MODE_SRIOV_4:
4134 num_functions = 4;
4135 break;
4136 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_2:
4137 num_functions = 2;
4138 break;
4139 case VXGE_HW_FUNCTION_MODE_MRIOV_8:
4140 num_functions = 8; /* TODO */
4141 break;
4142 }
4143 return num_functions;
4144}
4145
e8ac1756
JM		 4146int vxge_fw_upgrade(struct vxgedev *vdev, char *fw_name, int override)
4147{
4148 struct __vxge_hw_device *hldev = vdev->devh;
4149 u32 maj, min, bld, cmaj, cmin, cbld;
4150 enum vxge_hw_status status;
4151 const struct firmware *fw;
4152 int ret;
4153
4154 ret = request_firmware(&fw, fw_name, &vdev->pdev->dev);
4155 if (ret) {
4156 vxge_debug_init(VXGE_ERR, "%s: Firmware file '%s' not found",
4157 VXGE_DRIVER_NAME, fw_name);
4158 goto out;
4159 }
4160
4161 /* Load the new firmware onto the adapter */
4162 status = vxge_update_fw_image(hldev, fw->data, fw->size);
4163 if (status != VXGE_HW_OK) {
4164 vxge_debug_init(VXGE_ERR,
4165 "%s: FW image download to adapter failed '%s'.",
4166 VXGE_DRIVER_NAME, fw_name);
4167 ret = -EIO;
4168 goto out;
4169 }
4170
4171 /* Read the version of the new firmware */
4172 status = vxge_hw_upgrade_read_version(hldev, &maj, &min, &bld);
4173 if (status != VXGE_HW_OK) {
4174 vxge_debug_init(VXGE_ERR,
4175 "%s: Upgrade read version failed '%s'.",
4176 VXGE_DRIVER_NAME, fw_name);
4177 ret = -EIO;
4178 goto out;
4179 }
4180
4181 cmaj = vdev->config.device_hw_info.fw_version.major;
4182 cmin = vdev->config.device_hw_info.fw_version.minor;
4183 cbld = vdev->config.device_hw_info.fw_version.build;
4184 /* It's possible the version in /lib/firmware is not the latest version.
4185 * If so, we could get into a loop of trying to upgrade to the latest
4186 * and flashing the older version.
4187 */
4188 if (VXGE_FW_VER(maj, min, bld) == VXGE_FW_VER(cmaj, cmin, cbld) &&
4189 !override) {
4190 ret = -EINVAL;
4191 goto out;
4192 }
4193
4194 printk(KERN_NOTICE "Upgrade to firmware version %d.%d.%d commencing\n",
4195 maj, min, bld);
4196
4197 /* Flash the adapter with the new firmware */
4198 status = vxge_hw_flash_fw(hldev);
4199 if (status != VXGE_HW_OK) {
4200 vxge_debug_init(VXGE_ERR, "%s: Upgrade commit failed '%s'.",
4201 VXGE_DRIVER_NAME, fw_name);
4202 ret = -EIO;
4203 goto out;
4204 }
4205
4206 printk(KERN_NOTICE "Upgrade of firmware successful! Adapter must be "
4207 "hard reset before using, thus requiring a system reboot or a "
4208 "hotplug event.\n");
4209
4210out:
e84f885e 4211 release_firmware(fw);
e8ac1756
JM		 4212 return ret;
4213}
4214
4215static int vxge_probe_fw_update(struct vxgedev *vdev)
4216{
4217 u32 maj, min, bld;
4218 int ret, gpxe = 0;
4219 char *fw_name;
4220
4221 maj = vdev->config.device_hw_info.fw_version.major;
4222 min = vdev->config.device_hw_info.fw_version.minor;
4223 bld = vdev->config.device_hw_info.fw_version.build;
4224
4225 if (VXGE_FW_VER(maj, min, bld) == VXGE_CERT_FW_VER)
4226 return 0;
4227
4228 /* Ignore the build number when determining if the current firmware is
4229 * "too new" to load the driver
4230 */
4231 if (VXGE_FW_VER(maj, min, 0) > VXGE_CERT_FW_VER) {
4232 vxge_debug_init(VXGE_ERR, "%s: Firmware newer than last known "
4233 "version, unable to load driver\n",
4234 VXGE_DRIVER_NAME);
4235 return -EINVAL;
4236 }
4237
4238 /* Firmware 1.4.4 and older cannot be upgraded, and is too ancient to
4239 * work with this driver.
4240 */
4241 if (VXGE_FW_VER(maj, min, bld) <= VXGE_FW_DEAD_VER) {
4242 vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d cannot be "
4243 "upgraded\n", VXGE_DRIVER_NAME, maj, min, bld);
4244 return -EINVAL;
4245 }
4246
4247 /* If file not specified, determine gPXE or not */
4248 if (VXGE_FW_VER(maj, min, bld) >= VXGE_EPROM_FW_VER) {
4249 int i;
4250 for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++)
4251 if (vdev->devh->eprom_versions[i]) {
4252 gpxe = 1;
4253 break;
4254 }
4255 }
4256 if (gpxe)
4257 fw_name = "vxge/X3fw-pxe.ncf";
4258 else
4259 fw_name = "vxge/X3fw.ncf";
4260
4261 ret = vxge_fw_upgrade(vdev, fw_name, 0);
4262 /* -EINVAL and -ENOENT are not fatal errors for flashing firmware on
4263 * probe, so ignore them
4264 */
4265 if (ret != -EINVAL && ret != -ENOENT)
4266 return -EIO;
4267 else
4268 ret = 0;
4269
4270 if (VXGE_FW_VER(VXGE_CERT_FW_VER_MAJOR, VXGE_CERT_FW_VER_MINOR, 0) >
4271 VXGE_FW_VER(maj, min, 0)) {
4272 vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d is too old to"
c0589fa7 4273 " be used with this driver.",
e8ac1756
JM		 4274 VXGE_DRIVER_NAME, maj, min, bld);
4275 return -EINVAL;
4276 }
4277
4278 return ret;
4279}
4280
3a036ce5 4281static int is_sriov_initialized(struct pci_dev *pdev)
c92bf70d
JM		 4282{
4283 int pos;
4284 u16 ctrl;
4285
4286 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
4287 if (pos) {
4288 pci_read_config_word(pdev, pos + PCI_SRIOV_CTRL, &ctrl);
4289 if (ctrl & PCI_SRIOV_CTRL_VFE)
4290 return 1;
4291 }
4292 return 0;
4293}
4294
956a2066 4295static const struct vxge_hw_uld_cbs vxge_callbacks = {
4296 .link_up = vxge_callback_link_up,
4297 .link_down = vxge_callback_link_down,
4298 .crit_err = vxge_callback_crit_err,
4299};
4300
703da5a1
RV		 4301/**
4302 * vxge_probe
4303 * @pdev : structure containing the PCI related information of the device.
4304 * @pre: List of PCI devices supported by the driver listed in vxge_id_table.
4305 * Description:
4306 * This function is called when a new PCI device gets detected and initializes
4307 * it.
4308 * Return value:
4309 * returns 0 on success and negative on failure.
4310 *
4311 */
3a036ce5 4312static int
703da5a1
RV		 4313vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre)
4314{
2c91308f 4315 struct __vxge_hw_device *hldev;
703da5a1
RV		 4316 enum vxge_hw_status status;
4317 int ret;
4318 int high_dma = 0;
4319 u64 vpath_mask = 0;
4320 struct vxgedev *vdev;
7dad171c 4321 struct vxge_config *ll_config = NULL;
703da5a1
RV		 4322 struct vxge_hw_device_config *device_config = NULL;
4323 struct vxge_hw_device_attr attr;
4324 int i, j, no_of_vpath = 0, max_vpath_supported = 0;
4325 u8 *macaddr;
4326 struct vxge_mac_addrs *entry;
4327 static int bus = -1, device = -1;
cb27ec60 4328 u32 host_type;
703da5a1 4329 u8 new_device = 0;
cb27ec60
SH		 4330 enum vxge_hw_status is_privileged;
4331 u32 function_mode;
4332 u32 num_vfs = 0;
703da5a1
RV		 4333
4334 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
4335 attr.pdev = pdev;
4336
cb27ec60 4337 /* In SRIOV-17 mode, functions of the same adapter
528f7272
JM		 4338 * can be deployed on different buses
4339 */
4340 if (((bus != pdev->bus->number) || (device != PCI_SLOT(pdev->devfn))) &&
4341 !pdev->is_virtfn)
703da5a1
RV		 4342 new_device = 1;
4343
4344 bus = pdev->bus->number;
4345 device = PCI_SLOT(pdev->devfn);
4346
4347 if (new_device) {
4348 if (driver_config->config_dev_cnt &&
4349 (driver_config->config_dev_cnt !=
4350 driver_config->total_dev_cnt))
4351 vxge_debug_init(VXGE_ERR,
4352 "%s: Configured %d of %d devices",
4353 VXGE_DRIVER_NAME,
4354 driver_config->config_dev_cnt,
4355 driver_config->total_dev_cnt);
4356 driver_config->config_dev_cnt = 0;
4357 driver_config->total_dev_cnt = 0;
703da5a1 4358 }
528f7272 4359
9002397e
SH		 4360 /* Now making the CPU based no of vpath calculation
4361 * applicable for individual functions as well.
4362 */
4363 driver_config->g_no_cpus = 0;
657205bd
SH		 4364 driver_config->vpath_per_dev = max_config_vpath;
4365
703da5a1
RV		 4366 driver_config->total_dev_cnt++;
4367 if (++driver_config->config_dev_cnt > max_config_dev) {
4368 ret = 0;
4369 goto _exit0;
4370 }
4371
4372 device_config = kzalloc(sizeof(struct vxge_hw_device_config),
4373 GFP_KERNEL);
4374 if (!device_config) {
4375 ret = -ENOMEM;
4376 vxge_debug_init(VXGE_ERR,
4377 "device_config : malloc failed %s %d",
4378 __FILE__, __LINE__);
4379 goto _exit0;
4380 }
4381
528f7272 4382 ll_config = kzalloc(sizeof(struct vxge_config), GFP_KERNEL);
7dad171c
PB		 4383 if (!ll_config) {
4384 ret = -ENOMEM;
4385 vxge_debug_init(VXGE_ERR,
528f7272 4386 "device_config : malloc failed %s %d",
7dad171c
PB		 4387 __FILE__, __LINE__);
4388 goto _exit0;
4389 }
4390 ll_config->tx_steering_type = TX_MULTIQ_STEERING;
4391 ll_config->intr_type = MSI_X;
4392 ll_config->napi_weight = NEW_NAPI_WEIGHT;
4393 ll_config->rth_steering = RTH_STEERING;
703da5a1
RV		 4394
4395 /* get the default configuration parameters */
4396 vxge_hw_device_config_default_get(device_config);
4397
4398 /* initialize configuration parameters */
7dad171c 4399 vxge_device_config_init(device_config, &ll_config->intr_type);
703da5a1
RV		 4400
4401 ret = pci_enable_device(pdev);
4402 if (ret) {
4403 vxge_debug_init(VXGE_ERR,
4404 "%s : can not enable PCI device", __func__);
4405 goto _exit0;
4406 }
4407
b3837cec 4408 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
703da5a1
RV		 4409 vxge_debug_ll_config(VXGE_TRACE,
4410 "%s : using 64bit DMA", __func__);
4411
4412 high_dma = 1;
4413
4414 if (pci_set_consistent_dma_mask(pdev,
b3837cec 4415 DMA_BIT_MASK(64))) {
703da5a1
RV		 4416 vxge_debug_init(VXGE_ERR,
4417 "%s : unable to obtain 64bit DMA for "
4418 "consistent allocations", __func__);
4419 ret = -ENOMEM;
4420 goto _exit1;
4421 }
b3837cec 4422 } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
703da5a1
RV		 4423 vxge_debug_ll_config(VXGE_TRACE,
4424 "%s : using 32bit DMA", __func__);
4425 } else {
4426 ret = -ENOMEM;
4427 goto _exit1;
4428 }
4429
6cca2003
JM		 4430 ret = pci_request_region(pdev, 0, VXGE_DRIVER_NAME);
4431 if (ret) {
703da5a1
RV		 4432 vxge_debug_init(VXGE_ERR,
4433 "%s : request regions failed", __func__);
703da5a1
RV		 4434 goto _exit1;
4435 }
4436
4437 pci_set_master(pdev);
4438
4439 attr.bar0 = pci_ioremap_bar(pdev, 0);
4440 if (!attr.bar0) {
4441 vxge_debug_init(VXGE_ERR,
4442 "%s : cannot remap io memory bar0", __func__);
4443 ret = -ENODEV;
4444 goto _exit2;
4445 }
4446 vxge_debug_ll_config(VXGE_TRACE,
4447 "pci ioremap bar0: %p:0x%llx",
4448 attr.bar0,
4449 (unsigned long long)pci_resource_start(pdev, 0));
4450
703da5a1 4451 status = vxge_hw_device_hw_info_get(attr.bar0,
7dad171c 4452 &ll_config->device_hw_info);
703da5a1
RV		 4453 if (status != VXGE_HW_OK) {
4454 vxge_debug_init(VXGE_ERR,
4455 "%s: Reading of hardware info failed."
4456 "Please try upgrading the firmware.", VXGE_DRIVER_NAME);
4457 ret = -EINVAL;
7975d1ee 4458 goto _exit3;
703da5a1
RV		 4459 }
4460
7dad171c 4461 vpath_mask = ll_config->device_hw_info.vpath_mask;
703da5a1
RV		 4462 if (vpath_mask == 0) {
4463 vxge_debug_ll_config(VXGE_TRACE,
4464 "%s: No vpaths available in device", VXGE_DRIVER_NAME);
4465 ret = -EINVAL;
7975d1ee 4466 goto _exit3;
703da5a1
RV		 4467 }
4468
4469 vxge_debug_ll_config(VXGE_TRACE,
4470 "%s:%d Vpath mask = %llx", __func__, __LINE__,
4471 (unsigned long long)vpath_mask);
4472
7dad171c
PB		 4473 function_mode = ll_config->device_hw_info.function_mode;
4474 host_type = ll_config->device_hw_info.host_type;
cb27ec60 4475 is_privileged = __vxge_hw_device_is_privilaged(host_type,
7dad171c 4476 ll_config->device_hw_info.func_id);
cb27ec60 4477
703da5a1
RV		 4478 /* Check how many vpaths are available */
4479 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
4480 if (!((vpath_mask) & vxge_mBIT(i)))
4481 continue;
4482 max_vpath_supported++;
4483 }
4484
cb27ec60
SH		 4485 if (new_device)
4486 num_vfs = vxge_get_num_vfs(function_mode) - 1;
4487
5dbc9011 4488 /* Enable SRIOV mode, if firmware has SRIOV support and if it is a PF */
c92bf70d
JM		 4489 if (is_sriov(function_mode) && !is_sriov_initialized(pdev) &&
4490 (ll_config->intr_type != INTA)) {
4491 ret = pci_enable_sriov(pdev, num_vfs);
cb27ec60
SH		 4492 if (ret)
4493 vxge_debug_ll_config(VXGE_ERR,
4494 "Failed in enabling SRIOV mode: %d\n", ret);
c92bf70d 4495 /* No need to fail out, as an error here is non-fatal */
5dbc9011
SS		 4496 }
4497
703da5a1
RV		 4498 /*
4499 * Configure vpaths and get driver configured number of vpaths
4500 * which is less than or equal to the maximum vpaths per function.
4501 */
7dad171c 4502 no_of_vpath = vxge_config_vpaths(device_config, vpath_mask, ll_config);
703da5a1
RV		 4503 if (!no_of_vpath) {
4504 vxge_debug_ll_config(VXGE_ERR,
4505 "%s: No more vpaths to configure", VXGE_DRIVER_NAME);
4506 ret = 0;
7975d1ee 4507 goto _exit3;
703da5a1
RV		 4508 }
4509
4510 /* Setting driver callbacks */
956a2066 4511 attr.uld_callbacks = &vxge_callbacks;
703da5a1
RV		 4512
4513 status = vxge_hw_device_initialize(&hldev, &attr, device_config);
4514 if (status != VXGE_HW_OK) {
4515 vxge_debug_init(VXGE_ERR,
4516 "Failed to initialize device (%d)", status);
4517 ret = -EINVAL;
7975d1ee 4518 goto _exit3;
703da5a1
RV		 4519 }
4520
e8ac1756
JM		 4521 if (VXGE_FW_VER(ll_config->device_hw_info.fw_version.major,
4522 ll_config->device_hw_info.fw_version.minor,
4523 ll_config->device_hw_info.fw_version.build) >=
4524 VXGE_EPROM_FW_VER) {
4525 struct eprom_image img[VXGE_HW_MAX_ROM_IMAGES];
4526
4527 status = vxge_hw_vpath_eprom_img_ver_get(hldev, img);
4528 if (status != VXGE_HW_OK) {
4529 vxge_debug_init(VXGE_ERR, "%s: Reading of EPROM failed",
4530 VXGE_DRIVER_NAME);
4531 /* This is a non-fatal error, continue */
4532 }
4533
4534 for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++) {
4535 hldev->eprom_versions[i] = img[i].version;
4536 if (!img[i].is_valid)
4537 break;
4538 vxge_debug_init(VXGE_TRACE, "%s: EPROM %d, version "
1d15f81c 4539 "%d.%d.%d.%d", VXGE_DRIVER_NAME, i,
e8ac1756
JM		 4540 VXGE_EPROM_IMG_MAJOR(img[i].version),
4541 VXGE_EPROM_IMG_MINOR(img[i].version),
4542 VXGE_EPROM_IMG_FIX(img[i].version),
4543 VXGE_EPROM_IMG_BUILD(img[i].version));
4544 }
4545 }
4546
fa41fd10 4547 /* if FCS stripping is not disabled in MAC fail driver load */
b81b3733
JM		 4548 status = vxge_hw_vpath_strip_fcs_check(hldev, vpath_mask);
4549 if (status != VXGE_HW_OK) {
4550 vxge_debug_init(VXGE_ERR, "%s: FCS stripping is enabled in MAC"
4551 " failing driver load", VXGE_DRIVER_NAME);
fa41fd10
SH		 4552 ret = -EINVAL;
4553 goto _exit4;
4554 }
4555
cd883a79
JM		 4556 /* Always enable HWTS. This will always cause the FCS to be invalid,
4557 * due to the fact that HWTS is using the FCS as the location of the
4558 * timestamp. The HW FCS checking will still correctly determine if
4559 * there is a valid checksum, and the FCS is being removed by the driver
4560 * anyway. So no fucntionality is being lost. Since it is always
4561 * enabled, we now simply use the ioctl call to set whether or not the
4562 * driver should be paying attention to the HWTS.
4563 */
4564 if (is_privileged == VXGE_HW_OK) {
4565 status = vxge_timestamp_config(hldev);
4566 if (status != VXGE_HW_OK) {
4567 vxge_debug_init(VXGE_ERR, "%s: HWTS enable failed",
4568 VXGE_DRIVER_NAME);
4569 ret = -EFAULT;
4570 goto _exit4;
4571 }
4572 }
4573
703da5a1
RV		 4574 vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
4575
4576 /* set private device info */
4577 pci_set_drvdata(pdev, hldev);
4578
7dad171c
PB		 4579 ll_config->fifo_indicate_max_pkts = VXGE_FIFO_INDICATE_MAX_PKTS;
4580 ll_config->addr_learn_en = addr_learn_en;
4581 ll_config->rth_algorithm = RTH_ALG_JENKINS;
47f01db4
JM		 4582 ll_config->rth_hash_type_tcpipv4 = 1;
4583 ll_config->rth_hash_type_ipv4 = 0;
4584 ll_config->rth_hash_type_tcpipv6 = 0;
4585 ll_config->rth_hash_type_ipv6 = 0;
4586 ll_config->rth_hash_type_tcpipv6ex = 0;
4587 ll_config->rth_hash_type_ipv6ex = 0;
7dad171c
PB		 4588 ll_config->rth_bkt_sz = RTH_BUCKET_SIZE;
4589 ll_config->tx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
4590 ll_config->rx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
4591
e8ac1756
JM		 4592 ret = vxge_device_register(hldev, ll_config, high_dma, no_of_vpath,
4593 &vdev);
4594 if (ret) {
703da5a1 4595 ret = -EINVAL;
7975d1ee 4596 goto _exit4;
703da5a1
RV		 4597 }
4598
e8ac1756
JM		 4599 ret = vxge_probe_fw_update(vdev);
4600 if (ret)
4601 goto _exit5;
4602
703da5a1
RV		 4603 vxge_hw_device_debug_set(hldev, VXGE_TRACE, VXGE_COMPONENT_LL);
4604 VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
4605 vxge_hw_device_trace_level_get(hldev));
4606
4607 /* set private HW device info */
703da5a1
RV		 4608 vdev->mtu = VXGE_HW_DEFAULT_MTU;
4609 vdev->bar0 = attr.bar0;
703da5a1
RV		 4610 vdev->max_vpath_supported = max_vpath_supported;
4611 vdev->no_of_vpath = no_of_vpath;
4612
4613 /* Virtual Path count */
4614 for (i = 0, j = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
4615 if (!vxge_bVALn(vpath_mask, i, 1))
4616 continue;
4617 if (j >= vdev->no_of_vpath)
4618 break;
4619
4620 vdev->vpaths[j].is_configured = 1;
4621 vdev->vpaths[j].device_id = i;
703da5a1
RV		 4622 vdev->vpaths[j].ring.driver_id = j;
4623 vdev->vpaths[j].vdev = vdev;
4624 vdev->vpaths[j].max_mac_addr_cnt = max_mac_vpath;
4625 memcpy((u8 *)vdev->vpaths[j].macaddr,
7dad171c 4626 ll_config->device_hw_info.mac_addrs[i],
703da5a1
RV		 4627 ETH_ALEN);
4628
4629 /* Initialize the mac address list header */
4630 INIT_LIST_HEAD(&vdev->vpaths[j].mac_addr_list);
4631
4632 vdev->vpaths[j].mac_addr_cnt = 0;
4633 vdev->vpaths[j].mcast_addr_cnt = 0;
4634 j++;
4635 }
4636 vdev->exec_mode = VXGE_EXEC_MODE_DISABLE;
4637 vdev->max_config_port = max_config_port;
4638
4639 vdev->vlan_tag_strip = vlan_tag_strip;
4640
4641 /* map the hashing selector table to the configured vpaths */
4642 for (i = 0; i < vdev->no_of_vpath; i++)
4643 vdev->vpath_selector[i] = vpath_selector[i];
4644
4645 macaddr = (u8 *)vdev->vpaths[0].macaddr;
4646
7dad171c
PB		 4647 ll_config->device_hw_info.serial_number[VXGE_HW_INFO_LEN - 1] = '\0';
4648 ll_config->device_hw_info.product_desc[VXGE_HW_INFO_LEN - 1] = '\0';
4649 ll_config->device_hw_info.part_number[VXGE_HW_INFO_LEN - 1] = '\0';
703da5a1
RV		 4650
4651 vxge_debug_init(VXGE_TRACE, "%s: SERIAL NUMBER: %s",
7dad171c 4652 vdev->ndev->name, ll_config->device_hw_info.serial_number);
703da5a1
RV		 4653
4654 vxge_debug_init(VXGE_TRACE, "%s: PART NUMBER: %s",
7dad171c 4655 vdev->ndev->name, ll_config->device_hw_info.part_number);
703da5a1
RV		 4656
4657 vxge_debug_init(VXGE_TRACE, "%s: Neterion %s Server Adapter",
7dad171c 4658 vdev->ndev->name, ll_config->device_hw_info.product_desc);
703da5a1 4659
bf54e736 4660 vxge_debug_init(VXGE_TRACE, "%s: MAC ADDR: %pM",
4661 vdev->ndev->name, macaddr);
703da5a1
RV		 4662
4663 vxge_debug_init(VXGE_TRACE, "%s: Link Width x%d",
4664 vdev->ndev->name, vxge_hw_device_link_width_get(hldev));
4665
4666 vxge_debug_init(VXGE_TRACE,
4667 "%s: Firmware version : %s Date : %s", vdev->ndev->name,
7dad171c
PB		 4668 ll_config->device_hw_info.fw_version.version,
4669 ll_config->device_hw_info.fw_date.date);
703da5a1 4670
0a25bdc6 4671 if (new_device) {
7dad171c 4672 switch (ll_config->device_hw_info.function_mode) {
0a25bdc6
SH		 4673 case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
4674 vxge_debug_init(VXGE_TRACE,
4675 "%s: Single Function Mode Enabled", vdev->ndev->name);
4676 break;
4677 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
4678 vxge_debug_init(VXGE_TRACE,
4679 "%s: Multi Function Mode Enabled", vdev->ndev->name);
4680 break;
4681 case VXGE_HW_FUNCTION_MODE_SRIOV:
4682 vxge_debug_init(VXGE_TRACE,
4683 "%s: Single Root IOV Mode Enabled", vdev->ndev->name);
4684 break;
4685 case VXGE_HW_FUNCTION_MODE_MRIOV:
4686 vxge_debug_init(VXGE_TRACE,
4687 "%s: Multi Root IOV Mode Enabled", vdev->ndev->name);
4688 break;
4689 }
4690 }
4691
703da5a1
RV		 4692 vxge_print_parm(vdev, vpath_mask);
4693
4694 /* Store the fw version for ethttool option */
7dad171c 4695 strcpy(vdev->fw_version, ll_config->device_hw_info.fw_version.version);
703da5a1 4696 memcpy(vdev->ndev->dev_addr, (u8 *)vdev->vpaths[0].macaddr, ETH_ALEN);
703da5a1
RV		 4697
4698 /* Copy the station mac address to the list */
4699 for (i = 0; i < vdev->no_of_vpath; i++) {
e80be0b0 4700 entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_KERNEL);
703da5a1
RV		 4701 if (NULL == entry) {
4702 vxge_debug_init(VXGE_ERR,
4703 "%s: mac_addr_list : memory allocation failed",
4704 vdev->ndev->name);
4705 ret = -EPERM;
e8ac1756 4706 goto _exit6;
703da5a1
RV		 4707 }
4708 macaddr = (u8 *)&entry->macaddr;
4709 memcpy(macaddr, vdev->ndev->dev_addr, ETH_ALEN);
4710 list_add(&entry->item, &vdev->vpaths[i].mac_addr_list);
4711 vdev->vpaths[i].mac_addr_cnt = 1;
4712 }
4713
914d0d71 4714 kfree(device_config);
eb5f10c2
SH		 4715
4716 /*
4717 * INTA is shared in multi-function mode. This is unlike the INTA
4718 * implementation in MR mode, where each VH has its own INTA message.
4719 * - INTA is masked (disabled) as long as at least one function sets
4720 * its TITAN_MASK_ALL_INT.ALARM bit.
4721 * - INTA is unmasked (enabled) when all enabled functions have cleared
4722 * their own TITAN_MASK_ALL_INT.ALARM bit.
4723 * The TITAN_MASK_ALL_INT ALARM & TRAFFIC bits are cleared on power up.
4724 * Though this driver leaves the top level interrupts unmasked while
4725 * leaving the required module interrupt bits masked on exit, there
4726 * could be a rougue driver around that does not follow this procedure
4727 * resulting in a failure to generate interrupts. The following code is
4728 * present to prevent such a failure.
4729 */
4730
7dad171c 4731 if (ll_config->device_hw_info.function_mode ==
eb5f10c2
SH		 4732 VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION)
4733 if (vdev->config.intr_type == INTA)
4734 vxge_hw_device_unmask_all(hldev);
4735
703da5a1
RV		 4736 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
4737 vdev->ndev->name, __func__, __LINE__);
4738
4739 vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
4740 VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
4741 vxge_hw_device_trace_level_get(hldev));
4742
7dad171c 4743 kfree(ll_config);
703da5a1
RV		 4744 return 0;
4745
e8ac1756 4746_exit6:
703da5a1
RV		 4747 for (i = 0; i < vdev->no_of_vpath; i++)
4748 vxge_free_mac_add_list(&vdev->vpaths[i]);
e8ac1756 4749_exit5:
703da5a1 4750 vxge_device_unregister(hldev);
7975d1ee 4751_exit4:
703da5a1 4752 vxge_hw_device_terminate(hldev);
6cca2003 4753 pci_disable_sriov(pdev);
703da5a1
RV		 4754_exit3:
4755 iounmap(attr.bar0);
4756_exit2:
dc66daa9 4757 pci_release_region(pdev, 0);
703da5a1
RV		 4758_exit1:
4759 pci_disable_device(pdev);
4760_exit0:
7dad171c 4761 kfree(ll_config);
703da5a1
RV		 4762 kfree(device_config);
4763 driver_config->config_dev_cnt--;
6cca2003 4764 driver_config->total_dev_cnt--;
703da5a1
RV		 4765 return ret;
4766}
4767
4768/**
4769 * vxge_rem_nic - Free the PCI device
4770 * @pdev: structure containing the PCI related information of the device.
4771 * Description: This function is called by the Pci subsystem to release a
4772 * PCI device and free up all resource held up by the device.
4773 */
3a036ce5 4774static void vxge_remove(struct pci_dev *pdev)
703da5a1 4775{
2c91308f 4776 struct __vxge_hw_device *hldev;
6cca2003
JM		 4777 struct vxgedev *vdev;
4778 int i;
703da5a1 4779
d8ee7071 4780 hldev = pci_get_drvdata(pdev);
703da5a1
RV		 4781 if (hldev == NULL)
4782 return;
2c91308f 4783
6cca2003 4784 vdev = netdev_priv(hldev->ndev);
703da5a1 4785
2c91308f 4786 vxge_debug_entryexit(vdev->level_trace, "%s:%d", __func__, __LINE__);
2c91308f
JM		 4787 vxge_debug_init(vdev->level_trace, "%s : removing PCI device...",
4788 __func__);
703da5a1 4789
6cca2003 4790 for (i = 0; i < vdev->no_of_vpath; i++)
703da5a1 4791 vxge_free_mac_add_list(&vdev->vpaths[i]);
703da5a1 4792
6cca2003 4793 vxge_device_unregister(hldev);
6cca2003
JM		 4794 /* Do not call pci_disable_sriov here, as it will break child devices */
4795 vxge_hw_device_terminate(hldev);
703da5a1 4796 iounmap(vdev->bar0);
6cca2003
JM		 4797 pci_release_region(pdev, 0);
4798 pci_disable_device(pdev);
4799 driver_config->config_dev_cnt--;
4800 driver_config->total_dev_cnt--;
703da5a1 4801
2c91308f
JM		 4802 vxge_debug_init(vdev->level_trace, "%s:%d Device unregistered",
4803 __func__, __LINE__);
2c91308f
JM		 4804 vxge_debug_entryexit(vdev->level_trace, "%s:%d Exiting...", __func__,
4805 __LINE__);
703da5a1
RV		 4806}
4807
3646f0e5 4808static const struct pci_error_handlers vxge_err_handler = {
703da5a1
RV		 4809 .error_detected = vxge_io_error_detected,
4810 .slot_reset = vxge_io_slot_reset,
4811 .resume = vxge_io_resume,
4812};
4813
4814static struct pci_driver vxge_driver = {
4815 .name = VXGE_DRIVER_NAME,
4816 .id_table = vxge_id_table,
4817 .probe = vxge_probe,
3a036ce5 4818 .remove = vxge_remove,
703da5a1
RV		 4819#ifdef CONFIG_PM
4820 .suspend = vxge_pm_suspend,
4821 .resume = vxge_pm_resume,
4822#endif
4823 .err_handler = &vxge_err_handler,
4824};
4825
4826static int __init
4827vxge_starter(void)
4828{
4829 int ret = 0;
703da5a1 4830
75f5e1c6
JP		 4831 pr_info("Copyright(c) 2002-2010 Exar Corp.\n");
4832 pr_info("Driver version: %s\n", DRV_VERSION);
703da5a1
RV		 4833
4834 verify_bandwidth();
4835
4836 driver_config = kzalloc(sizeof(struct vxge_drv_config), GFP_KERNEL);
4837 if (!driver_config)
4838 return -ENOMEM;
4839
4840 ret = pci_register_driver(&vxge_driver);
528f7272
JM		 4841 if (ret) {
4842 kfree(driver_config);
4843 goto err;
4844 }
703da5a1
RV		 4845
4846 if (driver_config->config_dev_cnt &&
4847 (driver_config->config_dev_cnt != driver_config->total_dev_cnt))
4848 vxge_debug_init(VXGE_ERR,
4849 "%s: Configured %d of %d devices",
4850 VXGE_DRIVER_NAME, driver_config->config_dev_cnt,
4851 driver_config->total_dev_cnt);
528f7272 4852err:
703da5a1
RV		 4853 return ret;
4854}
4855
4856static void __exit
4857vxge_closer(void)
4858{
4859 pci_unregister_driver(&vxge_driver);
4860 kfree(driver_config);
4861}
4862module_init(vxge_starter);
4863module_exit(vxge_closer);
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