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[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / netronome / nfp / nfp_net.h
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4c352362
JK		 1/*
2 * Copyright (C) 2015 Netronome Systems, Inc.
3 *
4 * This software is dual licensed under the GNU General License Version 2,
5 * June 1991 as shown in the file COPYING in the top-level directory of this
6 * source tree or the BSD 2-Clause License provided below. You have the
7 * option to license this software under the complete terms of either license.
8 *
9 * The BSD 2-Clause License:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * 1. Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * 2. Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34/*
35 * nfp_net.h
36 * Declarations for Netronome network device driver.
37 * Authors: Jakub Kicinski <jakub.kicinski@netronome.com>
38 * Jason McMullan <jason.mcmullan@netronome.com>
39 * Rolf Neugebauer <rolf.neugebauer@netronome.com>
40 */
41
42#ifndef _NFP_NET_H_
43#define _NFP_NET_H_
44
45#include <linux/interrupt.h>
46#include <linux/netdevice.h>
47#include <linux/pci.h>
a1cbaad7 48#include <linux/io-64-nonatomic-hi-lo.h>
4c352362
JK		 49
50#include "nfp_net_ctrl.h"
51
52#define nn_err(nn, fmt, args...) netdev_err((nn)->netdev, fmt, ## args)
53#define nn_warn(nn, fmt, args...) netdev_warn((nn)->netdev, fmt, ## args)
54#define nn_info(nn, fmt, args...) netdev_info((nn)->netdev, fmt, ## args)
55#define nn_dbg(nn, fmt, args...) netdev_dbg((nn)->netdev, fmt, ## args)
56#define nn_warn_ratelimit(nn, fmt, args...) \
57 do { \
58 if (unlikely(net_ratelimit())) \
59 netdev_warn((nn)->netdev, fmt, ## args); \
60 } while (0)
61
3d780b92
JK		 62/* Max time to wait for NFP to respond on updates (in seconds) */
63#define NFP_NET_POLL_TIMEOUT 5
4c352362 64
66860beb
JK		 65/* Interval for reading offloaded filter stats */
66#define NFP_NET_STAT_POLL_IVL msecs_to_jiffies(100)
67
4c352362 68/* Bar allocation */
796312cd 69#define NFP_NET_CTRL_BAR 0
4c352362
JK		 70#define NFP_NET_Q0_BAR 2
71#define NFP_NET_Q1_BAR 4 /* OBSOLETE */
72
73/* Max bits in DMA address */
74#define NFP_NET_MAX_DMA_BITS 40
75
76/* Default size for MTU and freelist buffer sizes */
77#define NFP_NET_DEFAULT_MTU 1500
78#define NFP_NET_DEFAULT_RX_BUFSZ 2048
79
80/* Maximum number of bytes prepended to a packet */
81#define NFP_NET_MAX_PREPEND 64
82
83/* Interrupt definitions */
84#define NFP_NET_NON_Q_VECTORS 2
85#define NFP_NET_IRQ_LSC_IDX 0
86#define NFP_NET_IRQ_EXN_IDX 1
87
88/* Queue/Ring definitions */
89#define NFP_NET_MAX_TX_RINGS 64 /* Max. # of Tx rings per device */
90#define NFP_NET_MAX_RX_RINGS 64 /* Max. # of Rx rings per device */
91
92#define NFP_NET_MIN_TX_DESCS 256 /* Min. # of Tx descs per ring */
93#define NFP_NET_MIN_RX_DESCS 256 /* Min. # of Rx descs per ring */
94#define NFP_NET_MAX_TX_DESCS (256 * 1024) /* Max. # of Tx descs per ring */
95#define NFP_NET_MAX_RX_DESCS (256 * 1024) /* Max. # of Rx descs per ring */
96
97#define NFP_NET_TX_DESCS_DEFAULT 4096 /* Default # of Tx descs per ring */
98#define NFP_NET_RX_DESCS_DEFAULT 4096 /* Default # of Rx descs per ring */
99
100#define NFP_NET_FL_BATCH 16 /* Add freelist in this Batch size */
101
102/* Offload definitions */
103#define NFP_NET_N_VXLAN_PORTS (NFP_NET_CFG_VXLAN_SZ / sizeof(__be16))
104
105/* Forward declarations */
106struct nfp_net;
107struct nfp_net_r_vector;
108
109/* Convenience macro for writing dma address into RX/TX descriptors */
110#define nfp_desc_set_dma_addr(desc, dma_addr) \
111 do { \
112 __typeof(desc) __d = (desc); \
113 dma_addr_t __addr = (dma_addr); \
114 \
115 __d->dma_addr_lo = cpu_to_le32(lower_32_bits(__addr)); \
116 __d->dma_addr_hi = upper_32_bits(__addr) & 0xff; \
117 } while (0)
118
119/* TX descriptor format */
120
121#define PCIE_DESC_TX_EOP BIT(7)
122#define PCIE_DESC_TX_OFFSET_MASK GENMASK(6, 0)
123#define PCIE_DESC_TX_MSS_MASK GENMASK(13, 0)
124
125/* Flags in the host TX descriptor */
126#define PCIE_DESC_TX_CSUM BIT(7)
127#define PCIE_DESC_TX_IP4_CSUM BIT(6)
128#define PCIE_DESC_TX_TCP_CSUM BIT(5)
129#define PCIE_DESC_TX_UDP_CSUM BIT(4)
130#define PCIE_DESC_TX_VLAN BIT(3)
131#define PCIE_DESC_TX_LSO BIT(2)
132#define PCIE_DESC_TX_ENCAP BIT(1)
133#define PCIE_DESC_TX_O_IP4_CSUM BIT(0)
134
135struct nfp_net_tx_desc {
136 union {
137 struct {
138 u8 dma_addr_hi; /* High bits of host buf address */
139 __le16 dma_len; /* Length to DMA for this desc */
140 u8 offset_eop; /* Offset in buf where pkt starts +
141 * highest bit is eop flag.
142 */
143 __le32 dma_addr_lo; /* Low 32bit of host buf addr */
144
145 __le16 mss; /* MSS to be used for LSO */
146 u8 l4_offset; /* LSO, where the L4 data starts */
147 u8 flags; /* TX Flags, see @PCIE_DESC_TX_* */
148
149 __le16 vlan; /* VLAN tag to add if indicated */
150 __le16 data_len; /* Length of frame + meta data */
151 } __packed;
152 __le32 vals[4];
153 };
154};
155
156/**
157 * struct nfp_net_tx_buf - software TX buffer descriptor
158 * @skb: sk_buff associated with this buffer
159 * @dma_addr: DMA mapping address of the buffer
160 * @fidx: Fragment index (-1 for the head and [0..nr_frags-1] for frags)
161 * @pkt_cnt: Number of packets to be produced out of the skb associated
162 * with this buffer (valid only on the head's buffer).
163 * Will be 1 for all non-TSO packets.
164 * @real_len: Number of bytes which to be produced out of the skb (valid only
165 * on the head's buffer). Equal to skb->len for non-TSO packets.
166 */
167struct nfp_net_tx_buf {
168 struct sk_buff *skb;
169 dma_addr_t dma_addr;
170 short int fidx;
171 u16 pkt_cnt;
172 u32 real_len;
173};
174
175/**
176 * struct nfp_net_tx_ring - TX ring structure
177 * @r_vec: Back pointer to ring vector structure
178 * @idx: Ring index from Linux's perspective
179 * @qcidx: Queue Controller Peripheral (QCP) queue index for the TX queue
180 * @qcp_q: Pointer to base of the QCP TX queue
181 * @cnt: Size of the queue in number of descriptors
182 * @wr_p: TX ring write pointer (free running)
183 * @rd_p: TX ring read pointer (free running)
184 * @qcp_rd_p: Local copy of QCP TX queue read pointer
185 * @wr_ptr_add: Accumulated number of buffers to add to QCP write pointer
186 * (used for .xmit_more delayed kick)
187 * @txbufs: Array of transmitted TX buffers, to free on transmit
188 * @txds: Virtual address of TX ring in host memory
189 * @dma: DMA address of the TX ring
190 * @size: Size, in bytes, of the TX ring (needed to free)
191 */
192struct nfp_net_tx_ring {
193 struct nfp_net_r_vector *r_vec;
194
195 u32 idx;
196 int qcidx;
197 u8 __iomem *qcp_q;
198
199 u32 cnt;
200 u32 wr_p;
201 u32 rd_p;
202 u32 qcp_rd_p;
203
204 u32 wr_ptr_add;
205
206 struct nfp_net_tx_buf *txbufs;
207 struct nfp_net_tx_desc *txds;
208
209 dma_addr_t dma;
210 unsigned int size;
211} ____cacheline_aligned;
212
213/* RX and freelist descriptor format */
214
215#define PCIE_DESC_RX_DD BIT(7)
216#define PCIE_DESC_RX_META_LEN_MASK GENMASK(6, 0)
217
218/* Flags in the RX descriptor */
219#define PCIE_DESC_RX_RSS cpu_to_le16(BIT(15))
220#define PCIE_DESC_RX_I_IP4_CSUM cpu_to_le16(BIT(14))
221#define PCIE_DESC_RX_I_IP4_CSUM_OK cpu_to_le16(BIT(13))
222#define PCIE_DESC_RX_I_TCP_CSUM cpu_to_le16(BIT(12))
223#define PCIE_DESC_RX_I_TCP_CSUM_OK cpu_to_le16(BIT(11))
224#define PCIE_DESC_RX_I_UDP_CSUM cpu_to_le16(BIT(10))
225#define PCIE_DESC_RX_I_UDP_CSUM_OK cpu_to_le16(BIT(9))
7533fdc0 226#define PCIE_DESC_RX_BPF cpu_to_le16(BIT(8))
4c352362
JK		 227#define PCIE_DESC_RX_EOP cpu_to_le16(BIT(7))
228#define PCIE_DESC_RX_IP4_CSUM cpu_to_le16(BIT(6))
229#define PCIE_DESC_RX_IP4_CSUM_OK cpu_to_le16(BIT(5))
230#define PCIE_DESC_RX_TCP_CSUM cpu_to_le16(BIT(4))
231#define PCIE_DESC_RX_TCP_CSUM_OK cpu_to_le16(BIT(3))
232#define PCIE_DESC_RX_UDP_CSUM cpu_to_le16(BIT(2))
233#define PCIE_DESC_RX_UDP_CSUM_OK cpu_to_le16(BIT(1))
234#define PCIE_DESC_RX_VLAN cpu_to_le16(BIT(0))
235
236#define PCIE_DESC_RX_CSUM_ALL (PCIE_DESC_RX_IP4_CSUM | \
237 PCIE_DESC_RX_TCP_CSUM | \
238 PCIE_DESC_RX_UDP_CSUM | \
239 PCIE_DESC_RX_I_IP4_CSUM | \
240 PCIE_DESC_RX_I_TCP_CSUM | \
241 PCIE_DESC_RX_I_UDP_CSUM)
242#define PCIE_DESC_RX_CSUM_OK_SHIFT 1
243#define __PCIE_DESC_RX_CSUM_ALL le16_to_cpu(PCIE_DESC_RX_CSUM_ALL)
244#define __PCIE_DESC_RX_CSUM_ALL_OK (__PCIE_DESC_RX_CSUM_ALL >> \
245 PCIE_DESC_RX_CSUM_OK_SHIFT)
246
247struct nfp_net_rx_desc {
248 union {
249 struct {
250 u8 dma_addr_hi; /* High bits of the buf address */
251 __le16 reserved; /* Must be zero */
252 u8 meta_len_dd; /* Must be zero */
253
254 __le32 dma_addr_lo; /* Low bits of the buffer address */
255 } __packed fld;
256
257 struct {
258 __le16 data_len; /* Length of the frame + meta data */
259 u8 reserved;
260 u8 meta_len_dd; /* Length of meta data prepended +
261 * descriptor done flag.
262 */
263
264 __le16 flags; /* RX flags. See @PCIE_DESC_RX_* */
265 __le16 vlan; /* VLAN if stripped */
266 } __packed rxd;
267
268 __le32 vals[2];
269 };
270};
271
272struct nfp_net_rx_hash {
273 __be32 hash_type;
274 __be32 hash;
275};
276
277/**
278 * struct nfp_net_rx_buf - software RX buffer descriptor
279 * @skb: sk_buff associated with this buffer
280 * @dma_addr: DMA mapping address of the buffer
281 */
282struct nfp_net_rx_buf {
283 struct sk_buff *skb;
284 dma_addr_t dma_addr;
285};
286
287/**
288 * struct nfp_net_rx_ring - RX ring structure
289 * @r_vec: Back pointer to ring vector structure
290 * @cnt: Size of the queue in number of descriptors
291 * @wr_p: FL/RX ring write pointer (free running)
292 * @rd_p: FL/RX ring read pointer (free running)
293 * @idx: Ring index from Linux's perspective
294 * @fl_qcidx: Queue Controller Peripheral (QCP) queue index for the freelist
295 * @rx_qcidx: Queue Controller Peripheral (QCP) queue index for the RX queue
296 * @qcp_fl: Pointer to base of the QCP freelist queue
297 * @qcp_rx: Pointer to base of the QCP RX queue
298 * @wr_ptr_add: Accumulated number of buffers to add to QCP write pointer
299 * (used for free list batching)
300 * @rxbufs: Array of transmitted FL/RX buffers
301 * @rxds: Virtual address of FL/RX ring in host memory
302 * @dma: DMA address of the FL/RX ring
303 * @size: Size, in bytes, of the FL/RX ring (needed to free)
30d21171
JK		 304 * @bufsz: Buffer allocation size for convenience of management routines
305 * (NOTE: this is in second cache line, do not use on fast path!)
4c352362
JK		 306 */
307struct nfp_net_rx_ring {
308 struct nfp_net_r_vector *r_vec;
309
310 u32 cnt;
311 u32 wr_p;
312 u32 rd_p;
313
314 u16 idx;
315 u16 wr_ptr_add;
316
317 int fl_qcidx;
318 int rx_qcidx;
319 u8 __iomem *qcp_fl;
320 u8 __iomem *qcp_rx;
321
322 struct nfp_net_rx_buf *rxbufs;
323 struct nfp_net_rx_desc *rxds;
324
325 dma_addr_t dma;
326 unsigned int size;
30d21171 327 unsigned int bufsz;
4c352362
JK		 328} ____cacheline_aligned;
329
330/**
331 * struct nfp_net_r_vector - Per ring interrupt vector configuration
332 * @nfp_net: Backpointer to nfp_net structure
333 * @napi: NAPI structure for this ring vec
334 * @tx_ring: Pointer to TX ring
335 * @rx_ring: Pointer to RX ring
336 * @irq_idx: Index into MSI-X table
337 * @rx_sync: Seqlock for atomic updates of RX stats
338 * @rx_pkts: Number of received packets
339 * @rx_bytes: Number of received bytes
340 * @rx_drops: Number of packets dropped on RX due to lack of resources
341 * @hw_csum_rx_ok: Counter of packets where the HW checksum was OK
342 * @hw_csum_rx_inner_ok: Counter of packets where the inner HW checksum was OK
343 * @hw_csum_rx_error: Counter of packets with bad checksums
344 * @tx_sync: Seqlock for atomic updates of TX stats
345 * @tx_pkts: Number of Transmitted packets
346 * @tx_bytes: Number of Transmitted bytes
347 * @hw_csum_tx: Counter of packets with TX checksum offload requested
348 * @hw_csum_tx_inner: Counter of inner TX checksum offload requests
349 * @tx_gather: Counter of packets with Gather DMA
350 * @tx_lso: Counter of LSO packets sent
351 * @tx_errors: How many TX errors were encountered
352 * @tx_busy: How often was TX busy (no space)?
353 * @handler: Interrupt handler for this ring vector
354 * @name: Name of the interrupt vector
355 * @affinity_mask: SMP affinity mask for this vector
356 *
357 * This structure ties RX and TX rings to interrupt vectors and a NAPI
358 * context. This currently only supports one RX and TX ring per
359 * interrupt vector but might be extended in the future to allow
360 * association of multiple rings per vector.
361 */
362struct nfp_net_r_vector {
363 struct nfp_net *nfp_net;
364 struct napi_struct napi;
365
366 struct nfp_net_tx_ring *tx_ring;
367 struct nfp_net_rx_ring *rx_ring;
368
369 int irq_idx;
370
371 struct u64_stats_sync rx_sync;
372 u64 rx_pkts;
373 u64 rx_bytes;
374 u64 rx_drops;
375 u64 hw_csum_rx_ok;
376 u64 hw_csum_rx_inner_ok;
377 u64 hw_csum_rx_error;
378
379 struct u64_stats_sync tx_sync;
380 u64 tx_pkts;
381 u64 tx_bytes;
382 u64 hw_csum_tx;
383 u64 hw_csum_tx_inner;
384 u64 tx_gather;
385 u64 tx_lso;
386 u64 tx_errors;
387 u64 tx_busy;
388
389 irq_handler_t handler;
390 char name[IFNAMSIZ + 8];
391 cpumask_t affinity_mask;
392} ____cacheline_aligned;
393
394/* Firmware version as it is written in the 32bit value in the BAR */
395struct nfp_net_fw_version {
396 u8 minor;
397 u8 major;
398 u8 class;
399 u8 resv;
400} __packed;
401
402static inline bool nfp_net_fw_ver_eq(struct nfp_net_fw_version *fw_ver,
403 u8 resv, u8 class, u8 major, u8 minor)
404{
405 return fw_ver->resv == resv &&
406 fw_ver->class == class &&
407 fw_ver->major == major &&
408 fw_ver->minor == minor;
409}
410
66860beb
JK		 411struct nfp_stat_pair {
412 u64 pkts;
413 u64 bytes;
414};
415
4c352362
JK		 416/**
417 * struct nfp_net - NFP network device structure
418 * @pdev: Backpointer to PCI device
419 * @netdev: Backpointer to net_device structure
420 * @nfp_fallback: Is the driver used in fallback mode?
421 * @is_vf: Is the driver attached to a VF?
422 * @is_nfp3200: Is the driver for a NFP-3200 card?
423 * @fw_loaded: Is the firmware loaded?
7533fdc0 424 * @bpf_offload_skip_sw: Offloaded BPF program will not be rerun by cls_bpf
4c352362
JK		 425 * @ctrl: Local copy of the control register/word.
426 * @fl_bufsz: Currently configured size of the freelist buffers
427 * @rx_offset: Offset in the RX buffers where packet data starts
428 * @cpp: Pointer to the CPP handle
429 * @nfp_dev_cpp: Pointer to the NFP Device handle
430 * @ctrl_area: Pointer to the CPP area for the control BAR
431 * @tx_area: Pointer to the CPP area for the TX queues
432 * @rx_area: Pointer to the CPP area for the FL/RX queues
433 * @fw_ver: Firmware version
434 * @cap: Capabilities advertised by the Firmware
435 * @max_mtu: Maximum support MTU advertised by the Firmware
436 * @rss_cfg: RSS configuration
437 * @rss_key: RSS secret key
438 * @rss_itbl: RSS indirection table
66860beb
JK		 439 * @rx_filter: Filter offload statistics - dropped packets/bytes
440 * @rx_filter_prev: Filter offload statistics - values from previous update
441 * @rx_filter_change: Jiffies when statistics last changed
442 * @rx_filter_stats_timer: Timer for polling filter offload statistics
443 * @rx_filter_lock: Lock protecting timer state changes (teardown)
4c352362
JK		 444 * @max_tx_rings: Maximum number of TX rings supported by the Firmware
445 * @max_rx_rings: Maximum number of RX rings supported by the Firmware
446 * @num_tx_rings: Currently configured number of TX rings
447 * @num_rx_rings: Currently configured number of RX rings
448 * @txd_cnt: Size of the TX ring in number of descriptors
449 * @rxd_cnt: Size of the RX ring in number of descriptors
450 * @tx_rings: Array of pre-allocated TX ring structures
451 * @rx_rings: Array of pre-allocated RX ring structures
452 * @num_irqs: Number of allocated interrupt vectors
453 * @num_r_vecs: Number of used ring vectors
454 * @r_vecs: Pre-allocated array of ring vectors
455 * @irq_entries: Pre-allocated array of MSI-X entries
456 * @lsc_handler: Handler for Link State Change interrupt
457 * @lsc_name: Name for Link State Change interrupt
458 * @exn_handler: Handler for Exception interrupt
459 * @exn_name: Name for Exception interrupt
460 * @shared_handler: Handler for shared interrupts
461 * @shared_name: Name for shared interrupt
462 * @me_freq_mhz: ME clock_freq (MHz)
463 * @reconfig_lock: Protects HW reconfiguration request regs/machinery
3d780b92
JK		 464 * @reconfig_posted: Pending reconfig bits coming from async sources
465 * @reconfig_timer_active: Timer for reading reconfiguration results is pending
466 * @reconfig_sync_present: Some thread is performing synchronous reconfig
467 * @reconfig_timer: Timer for async reading of reconfig results
4c352362
JK		 468 * @link_up: Is the link up?
469 * @link_status_lock: Protects @link_up and ensures atomicity with BAR reading
470 * @rx_coalesce_usecs: RX interrupt moderation usecs delay parameter
471 * @rx_coalesce_max_frames: RX interrupt moderation frame count parameter
472 * @tx_coalesce_usecs: TX interrupt moderation usecs delay parameter
473 * @tx_coalesce_max_frames: TX interrupt moderation frame count parameter
474 * @vxlan_ports: VXLAN ports for RX inner csum offload communicated to HW
475 * @vxlan_usecnt: IPv4/IPv6 VXLAN port use counts
476 * @qcp_cfg: Pointer to QCP queue used for configuration notification
477 * @ctrl_bar: Pointer to mapped control BAR
478 * @tx_bar: Pointer to mapped TX queues
479 * @rx_bar: Pointer to mapped FL/RX queues
480 * @debugfs_dir: Device directory in debugfs
481 */
482struct nfp_net {
483 struct pci_dev *pdev;
484 struct net_device *netdev;
485
486 unsigned nfp_fallback:1;
487 unsigned is_vf:1;
488 unsigned is_nfp3200:1;
489 unsigned fw_loaded:1;
7533fdc0 490 unsigned bpf_offload_skip_sw:1;
4c352362
JK		 491
492 u32 ctrl;
493 u32 fl_bufsz;
494
495 u32 rx_offset;
496
73725d9d
JK		 497 struct nfp_net_tx_ring *tx_rings;
498 struct nfp_net_rx_ring *rx_rings;
499
4c352362
JK		 500#ifdef CONFIG_PCI_IOV
501 unsigned int num_vfs;
502 struct vf_data_storage *vfinfo;
503 int vf_rate_link_speed;
504#endif
505
506 struct nfp_cpp *cpp;
507 struct platform_device *nfp_dev_cpp;
508 struct nfp_cpp_area *ctrl_area;
509 struct nfp_cpp_area *tx_area;
510 struct nfp_cpp_area *rx_area;
511
512 struct nfp_net_fw_version fw_ver;
513 u32 cap;
514 u32 max_mtu;
515
516 u32 rss_cfg;
517 u8 rss_key[NFP_NET_CFG_RSS_KEY_SZ];
518 u8 rss_itbl[NFP_NET_CFG_RSS_ITBL_SZ];
519
66860beb
JK		 520 struct nfp_stat_pair rx_filter, rx_filter_prev;
521 unsigned long rx_filter_change;
522 struct timer_list rx_filter_stats_timer;
523 spinlock_t rx_filter_lock;
524
4c352362
JK		 525 int max_tx_rings;
526 int max_rx_rings;
527
528 int num_tx_rings;
529 int num_rx_rings;
530
531 int stride_tx;
532 int stride_rx;
533
534 int txd_cnt;
535 int rxd_cnt;
536
4c352362
JK		 537 u8 num_irqs;
538 u8 num_r_vecs;
539 struct nfp_net_r_vector r_vecs[NFP_NET_MAX_TX_RINGS];
540 struct msix_entry irq_entries[NFP_NET_NON_Q_VECTORS +
541 NFP_NET_MAX_TX_RINGS];
542
543 irq_handler_t lsc_handler;
544 char lsc_name[IFNAMSIZ + 8];
545
546 irq_handler_t exn_handler;
547 char exn_name[IFNAMSIZ + 8];
548
549 irq_handler_t shared_handler;
550 char shared_name[IFNAMSIZ + 8];
551
552 u32 me_freq_mhz;
553
554 bool link_up;
555 spinlock_t link_status_lock;
556
557 spinlock_t reconfig_lock;
3d780b92
JK		 558 u32 reconfig_posted;
559 bool reconfig_timer_active;
560 bool reconfig_sync_present;
561 struct timer_list reconfig_timer;
4c352362
JK		 562
563 u32 rx_coalesce_usecs;
564 u32 rx_coalesce_max_frames;
565 u32 tx_coalesce_usecs;
566 u32 tx_coalesce_max_frames;
567
568 __be16 vxlan_ports[NFP_NET_N_VXLAN_PORTS];
569 u8 vxlan_usecnt[NFP_NET_N_VXLAN_PORTS];
570
571 u8 __iomem *qcp_cfg;
572
573 u8 __iomem *ctrl_bar;
574 u8 __iomem *q_bar;
575 u8 __iomem *tx_bar;
576 u8 __iomem *rx_bar;
577
578 struct dentry *debugfs_dir;
579};
580
581/* Functions to read/write from/to a BAR
582 * Performs any endian conversion necessary.
583 */
7533fdc0
JK		 584static inline u16 nn_readb(struct nfp_net *nn, int off)
585{
586 return readb(nn->ctrl_bar + off);
587}
588
4c352362
JK		 589static inline void nn_writeb(struct nfp_net *nn, int off, u8 val)
590{
591 writeb(val, nn->ctrl_bar + off);
592}
593
7533fdc0
JK		 594/* NFP-3200 can't handle 16-bit accesses too well */
595static inline u16 nn_readw(struct nfp_net *nn, int off)
596{
597 WARN_ON_ONCE(nn->is_nfp3200);
598 return readw(nn->ctrl_bar + off);
599}
600
601static inline void nn_writew(struct nfp_net *nn, int off, u16 val)
602{
603 WARN_ON_ONCE(nn->is_nfp3200);
604 writew(val, nn->ctrl_bar + off);
605}
4c352362
JK		 606
607static inline u32 nn_readl(struct nfp_net *nn, int off)
608{
609 return readl(nn->ctrl_bar + off);
610}
611
612static inline void nn_writel(struct nfp_net *nn, int off, u32 val)
613{
614 writel(val, nn->ctrl_bar + off);
615}
616
617static inline u64 nn_readq(struct nfp_net *nn, int off)
618{
619 return readq(nn->ctrl_bar + off);
620}
621
622static inline void nn_writeq(struct nfp_net *nn, int off, u64 val)
623{
624 writeq(val, nn->ctrl_bar + off);
625}
626
627/* Flush posted PCI writes by reading something without side effects */
628static inline void nn_pci_flush(struct nfp_net *nn)
629{
630 nn_readl(nn, NFP_NET_CFG_VERSION);
631}
632
633/* Queue Controller Peripheral access functions and definitions.
634 *
635 * Some of the BARs of the NFP are mapped to portions of the Queue
636 * Controller Peripheral (QCP) address space on the NFP. A QCP queue
637 * has a read and a write pointer (as well as a size and flags,
638 * indicating overflow etc). The QCP offers a number of different
639 * operation on queue pointers, but here we only offer function to
640 * either add to a pointer or to read the pointer value.
641 */
642#define NFP_QCP_QUEUE_ADDR_SZ 0x800
643#define NFP_QCP_QUEUE_OFF(_x) ((_x) * NFP_QCP_QUEUE_ADDR_SZ)
644#define NFP_QCP_QUEUE_ADD_RPTR 0x0000
645#define NFP_QCP_QUEUE_ADD_WPTR 0x0004
646#define NFP_QCP_QUEUE_STS_LO 0x0008
647#define NFP_QCP_QUEUE_STS_LO_READPTR_mask 0x3ffff
648#define NFP_QCP_QUEUE_STS_HI 0x000c
649#define NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask 0x3ffff
650
651/* The offset of a QCP queues in the PCIe Target (same on NFP3200 and NFP6000 */
652#define NFP_PCIE_QUEUE(_q) (0x80000 + (NFP_QCP_QUEUE_ADDR_SZ * ((_q) & 0xff)))
653
654/* nfp_qcp_ptr - Read or Write Pointer of a queue */
655enum nfp_qcp_ptr {
656 NFP_QCP_READ_PTR = 0,
657 NFP_QCP_WRITE_PTR
658};
659
660/* There appear to be an *undocumented* upper limit on the value which
661 * one can add to a queue and that value is either 0x3f or 0x7f. We
662 * go with 0x3f as a conservative measure.
663 */
664#define NFP_QCP_MAX_ADD 0x3f
665
666static inline void _nfp_qcp_ptr_add(u8 __iomem *q,
667 enum nfp_qcp_ptr ptr, u32 val)
668{
669 u32 off;
670
671 if (ptr == NFP_QCP_READ_PTR)
672 off = NFP_QCP_QUEUE_ADD_RPTR;
673 else
674 off = NFP_QCP_QUEUE_ADD_WPTR;
675
676 while (val > NFP_QCP_MAX_ADD) {
677 writel(NFP_QCP_MAX_ADD, q + off);
678 val -= NFP_QCP_MAX_ADD;
679 }
680
681 writel(val, q + off);
682}
683
684/**
685 * nfp_qcp_rd_ptr_add() - Add the value to the read pointer of a queue
686 *
687 * @q: Base address for queue structure
688 * @val: Value to add to the queue pointer
689 *
690 * If @val is greater than @NFP_QCP_MAX_ADD multiple writes are performed.
691 */
692static inline void nfp_qcp_rd_ptr_add(u8 __iomem *q, u32 val)
693{
694 _nfp_qcp_ptr_add(q, NFP_QCP_READ_PTR, val);
695}
696
697/**
698 * nfp_qcp_wr_ptr_add() - Add the value to the write pointer of a queue
699 *
700 * @q: Base address for queue structure
701 * @val: Value to add to the queue pointer
702 *
703 * If @val is greater than @NFP_QCP_MAX_ADD multiple writes are performed.
704 */
705static inline void nfp_qcp_wr_ptr_add(u8 __iomem *q, u32 val)
706{
707 _nfp_qcp_ptr_add(q, NFP_QCP_WRITE_PTR, val);
708}
709
710static inline u32 _nfp_qcp_read(u8 __iomem *q, enum nfp_qcp_ptr ptr)
711{
712 u32 off;
713 u32 val;
714
715 if (ptr == NFP_QCP_READ_PTR)
716 off = NFP_QCP_QUEUE_STS_LO;
717 else
718 off = NFP_QCP_QUEUE_STS_HI;
719
720 val = readl(q + off);
721
722 if (ptr == NFP_QCP_READ_PTR)
723 return val & NFP_QCP_QUEUE_STS_LO_READPTR_mask;
724 else
725 return val & NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask;
726}
727
728/**
729 * nfp_qcp_rd_ptr_read() - Read the current read pointer value for a queue
730 * @q: Base address for queue structure
731 *
732 * Return: Value read.
733 */
734static inline u32 nfp_qcp_rd_ptr_read(u8 __iomem *q)
735{
736 return _nfp_qcp_read(q, NFP_QCP_READ_PTR);
737}
738
739/**
740 * nfp_qcp_wr_ptr_read() - Read the current write pointer value for a queue
741 * @q: Base address for queue structure
742 *
743 * Return: Value read.
744 */
745static inline u32 nfp_qcp_wr_ptr_read(u8 __iomem *q)
746{
747 return _nfp_qcp_read(q, NFP_QCP_WRITE_PTR);
748}
749
750/* Globals */
751extern const char nfp_net_driver_name[];
752extern const char nfp_net_driver_version[];
753
754/* Prototypes */
755void nfp_net_get_fw_version(struct nfp_net_fw_version *fw_ver,
756 void __iomem *ctrl_bar);
757
758struct nfp_net *nfp_net_netdev_alloc(struct pci_dev *pdev,
759 int max_tx_rings, int max_rx_rings);
760void nfp_net_netdev_free(struct nfp_net *nn);
761int nfp_net_netdev_init(struct net_device *netdev);
762void nfp_net_netdev_clean(struct net_device *netdev);
763void nfp_net_set_ethtool_ops(struct net_device *netdev);
764void nfp_net_info(struct nfp_net *nn);
765int nfp_net_reconfig(struct nfp_net *nn, u32 update);
766void nfp_net_rss_write_itbl(struct nfp_net *nn);
767void nfp_net_rss_write_key(struct nfp_net *nn);
768void nfp_net_coalesce_write_cfg(struct nfp_net *nn);
769int nfp_net_irqs_alloc(struct nfp_net *nn);
770void nfp_net_irqs_disable(struct nfp_net *nn);
cc7c0333 771int nfp_net_set_ring_size(struct nfp_net *nn, u32 rxd_cnt, u32 txd_cnt);
4c352362
JK		 772
773#ifdef CONFIG_NFP_NET_DEBUG
774void nfp_net_debugfs_create(void);
775void nfp_net_debugfs_destroy(void);
776void nfp_net_debugfs_adapter_add(struct nfp_net *nn);
777void nfp_net_debugfs_adapter_del(struct nfp_net *nn);
778#else
779static inline void nfp_net_debugfs_create(void)
780{
781}
782
783static inline void nfp_net_debugfs_destroy(void)
784{
785}
786
787static inline void nfp_net_debugfs_adapter_add(struct nfp_net *nn)
788{
789}
790
791static inline void nfp_net_debugfs_adapter_del(struct nfp_net *nn)
792{
793}
794#endif /* CONFIG_NFP_NET_DEBUG */
795
66860beb 796void nfp_net_filter_stats_timer(unsigned long data);
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JK		 797int
798nfp_net_bpf_offload(struct nfp_net *nn, u32 handle, __be16 proto,
799 struct tc_cls_bpf_offload *cls_bpf);
800
4c352362 801#endif /* _NFP_NET_H_ */
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