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nfp: don't keep count for free buffers delayed kick
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4c352362 1/*
2633beb9 2 * Copyright (C) 2015-2017 Netronome Systems, Inc.
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3 *
4 * This software is dual licensed under the GNU General License Version 2,
5 * June 1991 as shown in the file COPYING in the top-level directory of this
6 * source tree or the BSD 2-Clause License provided below. You have the
7 * option to license this software under the complete terms of either license.
8 *
9 * The BSD 2-Clause License:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * 1. Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * 2. Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34/*
35 * nfp_net.h
36 * Declarations for Netronome network device driver.
37 * Authors: Jakub Kicinski <jakub.kicinski@netronome.com>
38 * Jason McMullan <jason.mcmullan@netronome.com>
39 * Rolf Neugebauer <rolf.neugebauer@netronome.com>
40 */
41
42#ifndef _NFP_NET_H_
43#define _NFP_NET_H_
44
45#include <linux/interrupt.h>
63461a02 46#include <linux/list.h>
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47#include <linux/netdevice.h>
48#include <linux/pci.h>
a1cbaad7 49#include <linux/io-64-nonatomic-hi-lo.h>
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50
51#include "nfp_net_ctrl.h"
52
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53#define nn_err(nn, fmt, args...) netdev_err((nn)->dp.netdev, fmt, ## args)
54#define nn_warn(nn, fmt, args...) netdev_warn((nn)->dp.netdev, fmt, ## args)
55#define nn_info(nn, fmt, args...) netdev_info((nn)->dp.netdev, fmt, ## args)
56#define nn_dbg(nn, fmt, args...) netdev_dbg((nn)->dp.netdev, fmt, ## args)
57#define nn_dp_warn(dp, fmt, args...) \
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58 do { \
59 if (unlikely(net_ratelimit())) \
79c12a75 60 netdev_warn((dp)->netdev, fmt, ## args); \
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61 } while (0)
62
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63/* Max time to wait for NFP to respond on updates (in seconds) */
64#define NFP_NET_POLL_TIMEOUT 5
4c352362 65
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66/* Interval for reading offloaded filter stats */
67#define NFP_NET_STAT_POLL_IVL msecs_to_jiffies(100)
68
4c352362 69/* Bar allocation */
796312cd 70#define NFP_NET_CTRL_BAR 0
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71#define NFP_NET_Q0_BAR 2
72#define NFP_NET_Q1_BAR 4 /* OBSOLETE */
73
74/* Max bits in DMA address */
75#define NFP_NET_MAX_DMA_BITS 40
76
77/* Default size for MTU and freelist buffer sizes */
78#define NFP_NET_DEFAULT_MTU 1500
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79
80/* Maximum number of bytes prepended to a packet */
81#define NFP_NET_MAX_PREPEND 64
82
83/* Interrupt definitions */
84#define NFP_NET_NON_Q_VECTORS 2
85#define NFP_NET_IRQ_LSC_IDX 0
86#define NFP_NET_IRQ_EXN_IDX 1
d4e7f092 87#define NFP_NET_MIN_VNIC_IRQS (NFP_NET_NON_Q_VECTORS + 1)
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88
89/* Queue/Ring definitions */
90#define NFP_NET_MAX_TX_RINGS 64 /* Max. # of Tx rings per device */
91#define NFP_NET_MAX_RX_RINGS 64 /* Max. # of Rx rings per device */
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92#define NFP_NET_MAX_R_VECS (NFP_NET_MAX_TX_RINGS > NFP_NET_MAX_RX_RINGS ? \
93 NFP_NET_MAX_TX_RINGS : NFP_NET_MAX_RX_RINGS)
94#define NFP_NET_MAX_IRQS (NFP_NET_NON_Q_VECTORS + NFP_NET_MAX_R_VECS)
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95
96#define NFP_NET_MIN_TX_DESCS 256 /* Min. # of Tx descs per ring */
97#define NFP_NET_MIN_RX_DESCS 256 /* Min. # of Rx descs per ring */
98#define NFP_NET_MAX_TX_DESCS (256 * 1024) /* Max. # of Tx descs per ring */
99#define NFP_NET_MAX_RX_DESCS (256 * 1024) /* Max. # of Rx descs per ring */
100
101#define NFP_NET_TX_DESCS_DEFAULT 4096 /* Default # of Tx descs per ring */
102#define NFP_NET_RX_DESCS_DEFAULT 4096 /* Default # of Rx descs per ring */
103
104#define NFP_NET_FL_BATCH 16 /* Add freelist in this Batch size */
abeeec4a 105#define NFP_NET_XDP_MAX_COMPLETE 2048 /* XDP bufs to reclaim in NAPI poll */
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106
107/* Offload definitions */
108#define NFP_NET_N_VXLAN_PORTS (NFP_NET_CFG_VXLAN_SZ / sizeof(__be16))
109
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110#define NFP_NET_RX_BUF_HEADROOM (NET_SKB_PAD + NET_IP_ALIGN)
111#define NFP_NET_RX_BUF_NON_DATA (NFP_NET_RX_BUF_HEADROOM + \
112 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
113
4c352362 114/* Forward declarations */
bd5ca062 115struct nfp_cpp;
47465aed 116struct nfp_eth_table_port;
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117struct nfp_net;
118struct nfp_net_r_vector;
eb488c26 119struct nfp_port;
4c352362 120
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121/* Convenience macro for wrapping descriptor index on ring size */
122#define D_IDX(ring, idx) ((idx) & ((ring)->cnt - 1))
123
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124/* Convenience macro for writing dma address into RX/TX descriptors */
125#define nfp_desc_set_dma_addr(desc, dma_addr) \
126 do { \
127 __typeof(desc) __d = (desc); \
128 dma_addr_t __addr = (dma_addr); \
129 \
130 __d->dma_addr_lo = cpu_to_le32(lower_32_bits(__addr)); \
131 __d->dma_addr_hi = upper_32_bits(__addr) & 0xff; \
132 } while (0)
133
134/* TX descriptor format */
135
136#define PCIE_DESC_TX_EOP BIT(7)
137#define PCIE_DESC_TX_OFFSET_MASK GENMASK(6, 0)
138#define PCIE_DESC_TX_MSS_MASK GENMASK(13, 0)
139
140/* Flags in the host TX descriptor */
141#define PCIE_DESC_TX_CSUM BIT(7)
142#define PCIE_DESC_TX_IP4_CSUM BIT(6)
143#define PCIE_DESC_TX_TCP_CSUM BIT(5)
144#define PCIE_DESC_TX_UDP_CSUM BIT(4)
145#define PCIE_DESC_TX_VLAN BIT(3)
146#define PCIE_DESC_TX_LSO BIT(2)
147#define PCIE_DESC_TX_ENCAP BIT(1)
148#define PCIE_DESC_TX_O_IP4_CSUM BIT(0)
149
150struct nfp_net_tx_desc {
151 union {
152 struct {
153 u8 dma_addr_hi; /* High bits of host buf address */
154 __le16 dma_len; /* Length to DMA for this desc */
155 u8 offset_eop; /* Offset in buf where pkt starts +
156 * highest bit is eop flag.
157 */
158 __le32 dma_addr_lo; /* Low 32bit of host buf addr */
159
160 __le16 mss; /* MSS to be used for LSO */
e53fc9fa 161 u8 lso_hdrlen; /* LSO, TCP payload offset */
4c352362 162 u8 flags; /* TX Flags, see @PCIE_DESC_TX_* */
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163 union {
164 struct {
165 u8 l3_offset; /* L3 header offset */
166 u8 l4_offset; /* L4 header offset */
167 };
168 __le16 vlan; /* VLAN tag to add if indicated */
169 };
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170 __le16 data_len; /* Length of frame + meta data */
171 } __packed;
172 __le32 vals[4];
173 };
174};
175
176/**
177 * struct nfp_net_tx_buf - software TX buffer descriptor
178 * @skb: sk_buff associated with this buffer
179 * @dma_addr: DMA mapping address of the buffer
180 * @fidx: Fragment index (-1 for the head and [0..nr_frags-1] for frags)
181 * @pkt_cnt: Number of packets to be produced out of the skb associated
182 * with this buffer (valid only on the head's buffer).
183 * Will be 1 for all non-TSO packets.
184 * @real_len: Number of bytes which to be produced out of the skb (valid only
185 * on the head's buffer). Equal to skb->len for non-TSO packets.
186 */
187struct nfp_net_tx_buf {
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188 union {
189 struct sk_buff *skb;
190 void *frag;
191 };
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192 dma_addr_t dma_addr;
193 short int fidx;
194 u16 pkt_cnt;
195 u32 real_len;
196};
197
198/**
199 * struct nfp_net_tx_ring - TX ring structure
200 * @r_vec: Back pointer to ring vector structure
201 * @idx: Ring index from Linux's perspective
202 * @qcidx: Queue Controller Peripheral (QCP) queue index for the TX queue
203 * @qcp_q: Pointer to base of the QCP TX queue
204 * @cnt: Size of the queue in number of descriptors
205 * @wr_p: TX ring write pointer (free running)
206 * @rd_p: TX ring read pointer (free running)
207 * @qcp_rd_p: Local copy of QCP TX queue read pointer
208 * @wr_ptr_add: Accumulated number of buffers to add to QCP write pointer
209 * (used for .xmit_more delayed kick)
210 * @txbufs: Array of transmitted TX buffers, to free on transmit
211 * @txds: Virtual address of TX ring in host memory
212 * @dma: DMA address of the TX ring
213 * @size: Size, in bytes, of the TX ring (needed to free)
92e68195 214 * @is_xdp: Is this a XDP TX ring?
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215 */
216struct nfp_net_tx_ring {
217 struct nfp_net_r_vector *r_vec;
218
219 u32 idx;
220 int qcidx;
221 u8 __iomem *qcp_q;
222
223 u32 cnt;
224 u32 wr_p;
225 u32 rd_p;
226 u32 qcp_rd_p;
227
228 u32 wr_ptr_add;
229
230 struct nfp_net_tx_buf *txbufs;
231 struct nfp_net_tx_desc *txds;
232
233 dma_addr_t dma;
234 unsigned int size;
92e68195 235 bool is_xdp;
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236} ____cacheline_aligned;
237
238/* RX and freelist descriptor format */
239
240#define PCIE_DESC_RX_DD BIT(7)
241#define PCIE_DESC_RX_META_LEN_MASK GENMASK(6, 0)
242
243/* Flags in the RX descriptor */
244#define PCIE_DESC_RX_RSS cpu_to_le16(BIT(15))
245#define PCIE_DESC_RX_I_IP4_CSUM cpu_to_le16(BIT(14))
246#define PCIE_DESC_RX_I_IP4_CSUM_OK cpu_to_le16(BIT(13))
247#define PCIE_DESC_RX_I_TCP_CSUM cpu_to_le16(BIT(12))
248#define PCIE_DESC_RX_I_TCP_CSUM_OK cpu_to_le16(BIT(11))
249#define PCIE_DESC_RX_I_UDP_CSUM cpu_to_le16(BIT(10))
250#define PCIE_DESC_RX_I_UDP_CSUM_OK cpu_to_le16(BIT(9))
7533fdc0 251#define PCIE_DESC_RX_BPF cpu_to_le16(BIT(8))
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252#define PCIE_DESC_RX_EOP cpu_to_le16(BIT(7))
253#define PCIE_DESC_RX_IP4_CSUM cpu_to_le16(BIT(6))
254#define PCIE_DESC_RX_IP4_CSUM_OK cpu_to_le16(BIT(5))
255#define PCIE_DESC_RX_TCP_CSUM cpu_to_le16(BIT(4))
256#define PCIE_DESC_RX_TCP_CSUM_OK cpu_to_le16(BIT(3))
257#define PCIE_DESC_RX_UDP_CSUM cpu_to_le16(BIT(2))
258#define PCIE_DESC_RX_UDP_CSUM_OK cpu_to_le16(BIT(1))
259#define PCIE_DESC_RX_VLAN cpu_to_le16(BIT(0))
260
261#define PCIE_DESC_RX_CSUM_ALL (PCIE_DESC_RX_IP4_CSUM | \
262 PCIE_DESC_RX_TCP_CSUM | \
263 PCIE_DESC_RX_UDP_CSUM | \
264 PCIE_DESC_RX_I_IP4_CSUM | \
265 PCIE_DESC_RX_I_TCP_CSUM | \
266 PCIE_DESC_RX_I_UDP_CSUM)
267#define PCIE_DESC_RX_CSUM_OK_SHIFT 1
268#define __PCIE_DESC_RX_CSUM_ALL le16_to_cpu(PCIE_DESC_RX_CSUM_ALL)
269#define __PCIE_DESC_RX_CSUM_ALL_OK (__PCIE_DESC_RX_CSUM_ALL >> \
270 PCIE_DESC_RX_CSUM_OK_SHIFT)
271
272struct nfp_net_rx_desc {
273 union {
274 struct {
275 u8 dma_addr_hi; /* High bits of the buf address */
276 __le16 reserved; /* Must be zero */
277 u8 meta_len_dd; /* Must be zero */
278
279 __le32 dma_addr_lo; /* Low bits of the buffer address */
280 } __packed fld;
281
282 struct {
283 __le16 data_len; /* Length of the frame + meta data */
284 u8 reserved;
285 u8 meta_len_dd; /* Length of meta data prepended +
286 * descriptor done flag.
287 */
288
289 __le16 flags; /* RX flags. See @PCIE_DESC_RX_* */
290 __le16 vlan; /* VLAN if stripped */
291 } __packed rxd;
292
293 __le32 vals[2];
294 };
295};
296
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297#define NFP_NET_META_FIELD_MASK GENMASK(NFP_NET_META_FIELD_SIZE - 1, 0)
298
e524a6a9 299struct nfp_meta_parsed {
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300 u8 hash_type;
301 u8 csum_type;
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302 u32 hash;
303 u32 mark;
ddb98d94 304 __wsum csum;
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305};
306
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307struct nfp_net_rx_hash {
308 __be32 hash_type;
309 __be32 hash;
310};
311
312/**
313 * struct nfp_net_rx_buf - software RX buffer descriptor
c0f031bc 314 * @frag: page fragment buffer
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315 * @dma_addr: DMA mapping address of the buffer
316 */
317struct nfp_net_rx_buf {
c0f031bc 318 void *frag;
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319 dma_addr_t dma_addr;
320};
321
322/**
323 * struct nfp_net_rx_ring - RX ring structure
324 * @r_vec: Back pointer to ring vector structure
325 * @cnt: Size of the queue in number of descriptors
326 * @wr_p: FL/RX ring write pointer (free running)
327 * @rd_p: FL/RX ring read pointer (free running)
328 * @idx: Ring index from Linux's perspective
329 * @fl_qcidx: Queue Controller Peripheral (QCP) queue index for the freelist
4c352362 330 * @qcp_fl: Pointer to base of the QCP freelist queue
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331 * @rxbufs: Array of transmitted FL/RX buffers
332 * @rxds: Virtual address of FL/RX ring in host memory
333 * @dma: DMA address of the FL/RX ring
334 * @size: Size, in bytes, of the FL/RX ring (needed to free)
335 */
336struct nfp_net_rx_ring {
337 struct nfp_net_r_vector *r_vec;
338
339 u32 cnt;
340 u32 wr_p;
341 u32 rd_p;
342
83d08a1d 343 u32 idx;
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344
345 int fl_qcidx;
4c352362 346 u8 __iomem *qcp_fl;
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347
348 struct nfp_net_rx_buf *rxbufs;
349 struct nfp_net_rx_desc *rxds;
350
351 dma_addr_t dma;
352 unsigned int size;
353} ____cacheline_aligned;
354
355/**
356 * struct nfp_net_r_vector - Per ring interrupt vector configuration
357 * @nfp_net: Backpointer to nfp_net structure
358 * @napi: NAPI structure for this ring vec
359 * @tx_ring: Pointer to TX ring
360 * @rx_ring: Pointer to RX ring
ecd63a02 361 * @xdp_ring: Pointer to an extra TX ring for XDP
fdace6c2 362 * @irq_entry: MSI-X table entry (use for talking to the device)
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363 * @rx_sync: Seqlock for atomic updates of RX stats
364 * @rx_pkts: Number of received packets
365 * @rx_bytes: Number of received bytes
366 * @rx_drops: Number of packets dropped on RX due to lack of resources
367 * @hw_csum_rx_ok: Counter of packets where the HW checksum was OK
368 * @hw_csum_rx_inner_ok: Counter of packets where the inner HW checksum was OK
369 * @hw_csum_rx_error: Counter of packets with bad checksums
370 * @tx_sync: Seqlock for atomic updates of TX stats
371 * @tx_pkts: Number of Transmitted packets
372 * @tx_bytes: Number of Transmitted bytes
373 * @hw_csum_tx: Counter of packets with TX checksum offload requested
374 * @hw_csum_tx_inner: Counter of inner TX checksum offload requests
375 * @tx_gather: Counter of packets with Gather DMA
376 * @tx_lso: Counter of LSO packets sent
377 * @tx_errors: How many TX errors were encountered
378 * @tx_busy: How often was TX busy (no space)?
fdace6c2 379 * @irq_vector: Interrupt vector number (use for talking to the OS)
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380 * @handler: Interrupt handler for this ring vector
381 * @name: Name of the interrupt vector
382 * @affinity_mask: SMP affinity mask for this vector
383 *
384 * This structure ties RX and TX rings to interrupt vectors and a NAPI
385 * context. This currently only supports one RX and TX ring per
386 * interrupt vector but might be extended in the future to allow
387 * association of multiple rings per vector.
388 */
389struct nfp_net_r_vector {
390 struct nfp_net *nfp_net;
391 struct napi_struct napi;
392
393 struct nfp_net_tx_ring *tx_ring;
394 struct nfp_net_rx_ring *rx_ring;
395
fdace6c2 396 u16 irq_entry;
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397
398 struct u64_stats_sync rx_sync;
399 u64 rx_pkts;
400 u64 rx_bytes;
401 u64 rx_drops;
402 u64 hw_csum_rx_ok;
403 u64 hw_csum_rx_inner_ok;
404 u64 hw_csum_rx_error;
405
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406 struct nfp_net_tx_ring *xdp_ring;
407
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408 struct u64_stats_sync tx_sync;
409 u64 tx_pkts;
410 u64 tx_bytes;
411 u64 hw_csum_tx;
412 u64 hw_csum_tx_inner;
413 u64 tx_gather;
414 u64 tx_lso;
415 u64 tx_errors;
416 u64 tx_busy;
417
fdace6c2 418 u32 irq_vector;
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419 irq_handler_t handler;
420 char name[IFNAMSIZ + 8];
421 cpumask_t affinity_mask;
422} ____cacheline_aligned;
423
424/* Firmware version as it is written in the 32bit value in the BAR */
425struct nfp_net_fw_version {
426 u8 minor;
427 u8 major;
428 u8 class;
429 u8 resv;
430} __packed;
431
432static inline bool nfp_net_fw_ver_eq(struct nfp_net_fw_version *fw_ver,
433 u8 resv, u8 class, u8 major, u8 minor)
434{
435 return fw_ver->resv == resv &&
436 fw_ver->class == class &&
437 fw_ver->major == major &&
438 fw_ver->minor == minor;
439}
440
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441struct nfp_stat_pair {
442 u64 pkts;
443 u64 bytes;
444};
445
4c352362 446/**
79c12a75 447 * struct nfp_net_dp - NFP network device datapath data structure
fa43d2a8 448 * @dev: Backpointer to struct device
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449 * @netdev: Backpointer to net_device structure
450 * @is_vf: Is the driver attached to a VF?
7533fdc0 451 * @bpf_offload_skip_sw: Offloaded BPF program will not be rerun by cls_bpf
6d677075 452 * @bpf_offload_xdp: Offloaded BPF program is XDP
b9dcf88a 453 * @chained_metadata_format: Firemware will use new metadata format
c487e6b1 454 * @rx_dma_dir: Mapping direction for RX buffers
6fe0c3b4 455 * @rx_dma_off: Offset at which DMA packets (for XDP headroom)
97717aca 456 * @rx_offset: Offset in the RX buffers where packet data starts
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457 * @ctrl: Local copy of the control register/word.
458 * @fl_bufsz: Currently configured size of the freelist buffers
ecd63a02 459 * @xdp_prog: Installed XDP program
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460 * @tx_rings: Array of pre-allocated TX ring structures
461 * @rx_rings: Array of pre-allocated RX ring structures
d2b84397 462 * @ctrl_bar: Pointer to mapped control BAR
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463 *
464 * @txd_cnt: Size of the TX ring in number of descriptors
465 * @rxd_cnt: Size of the RX ring in number of descriptors
466 * @num_r_vecs: Number of used ring vectors
467 * @num_tx_rings: Currently configured number of TX rings
468 * @num_stack_tx_rings: Number of TX rings used by the stack (not XDP)
469 * @num_rx_rings: Currently configured number of RX rings
76e1e1a8 470 * @mtu: Device MTU
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471 */
472struct nfp_net_dp {
473 struct device *dev;
474 struct net_device *netdev;
475
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476 u8 is_vf:1;
477 u8 bpf_offload_skip_sw:1;
478 u8 bpf_offload_xdp:1;
479 u8 chained_metadata_format:1;
480
481 u8 rx_dma_dir;
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482 u8 rx_offset;
483
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484 u32 rx_dma_off;
485
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486 u32 ctrl;
487 u32 fl_bufsz;
488
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489 struct bpf_prog *xdp_prog;
490
491 struct nfp_net_tx_ring *tx_rings;
492 struct nfp_net_rx_ring *rx_rings;
493
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494 u8 __iomem *ctrl_bar;
495
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496 /* Cold data follows */
497
498 unsigned int txd_cnt;
499 unsigned int rxd_cnt;
500
501 unsigned int num_r_vecs;
502
503 unsigned int num_tx_rings;
504 unsigned int num_stack_tx_rings;
505 unsigned int num_rx_rings;
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506
507 unsigned int mtu;
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508};
509
510/**
511 * struct nfp_net - NFP network device structure
512 * @dp: Datapath structure
513 * @fw_ver: Firmware version
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514 * @cap: Capabilities advertised by the Firmware
515 * @max_mtu: Maximum support MTU advertised by the Firmware
9ff304bf 516 * @rss_hfunc: RSS selected hash function
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517 * @rss_cfg: RSS configuration
518 * @rss_key: RSS secret key
519 * @rss_itbl: RSS indirection table
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520 * @rx_filter: Filter offload statistics - dropped packets/bytes
521 * @rx_filter_prev: Filter offload statistics - values from previous update
522 * @rx_filter_change: Jiffies when statistics last changed
523 * @rx_filter_stats_timer: Timer for polling filter offload statistics
524 * @rx_filter_lock: Lock protecting timer state changes (teardown)
79c12a75 525 * @max_r_vecs: Number of allocated interrupt vectors for RX/TX
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526 * @max_tx_rings: Maximum number of TX rings supported by the Firmware
527 * @max_rx_rings: Maximum number of RX rings supported by the Firmware
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528 * @r_vecs: Pre-allocated array of ring vectors
529 * @irq_entries: Pre-allocated array of MSI-X entries
530 * @lsc_handler: Handler for Link State Change interrupt
531 * @lsc_name: Name for Link State Change interrupt
532 * @exn_handler: Handler for Exception interrupt
533 * @exn_name: Name for Exception interrupt
534 * @shared_handler: Handler for shared interrupts
535 * @shared_name: Name for shared interrupt
536 * @me_freq_mhz: ME clock_freq (MHz)
537 * @reconfig_lock: Protects HW reconfiguration request regs/machinery
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538 * @reconfig_posted: Pending reconfig bits coming from async sources
539 * @reconfig_timer_active: Timer for reading reconfiguration results is pending
540 * @reconfig_sync_present: Some thread is performing synchronous reconfig
541 * @reconfig_timer: Timer for async reading of reconfig results
4c352362 542 * @link_up: Is the link up?
cee42951 543 * @link_status_lock: Protects @link_* and ensures atomicity with BAR reading
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544 * @rx_coalesce_usecs: RX interrupt moderation usecs delay parameter
545 * @rx_coalesce_max_frames: RX interrupt moderation frame count parameter
546 * @tx_coalesce_usecs: TX interrupt moderation usecs delay parameter
547 * @tx_coalesce_max_frames: TX interrupt moderation frame count parameter
548 * @vxlan_ports: VXLAN ports for RX inner csum offload communicated to HW
549 * @vxlan_usecnt: IPv4/IPv6 VXLAN port use counts
550 * @qcp_cfg: Pointer to QCP queue used for configuration notification
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551 * @tx_bar: Pointer to mapped TX queues
552 * @rx_bar: Pointer to mapped FL/RX queues
553 * @debugfs_dir: Device directory in debugfs
af623682 554 * @ethtool_dump_flag: Ethtool dump flag
d4e7f092 555 * @vnic_list: Entry on device vNIC list
fa43d2a8 556 * @pdev: Backpointer to PCI device
7ac9ebd5 557 * @app: APP handle if available
eb488c26 558 * @port: Pointer to nfp_port structure if vNIC is a port
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559 */
560struct nfp_net {
79c12a75 561 struct nfp_net_dp dp;
73725d9d 562
4c352362 563 struct nfp_net_fw_version fw_ver;
79c12a75 564
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565 u32 cap;
566 u32 max_mtu;
567
9ff304bf 568 u8 rss_hfunc;
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569 u32 rss_cfg;
570 u8 rss_key[NFP_NET_CFG_RSS_KEY_SZ];
571 u8 rss_itbl[NFP_NET_CFG_RSS_ITBL_SZ];
572
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573 struct nfp_stat_pair rx_filter, rx_filter_prev;
574 unsigned long rx_filter_change;
575 struct timer_list rx_filter_stats_timer;
576 spinlock_t rx_filter_lock;
577
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578 unsigned int max_tx_rings;
579 unsigned int max_rx_rings;
4c352362 580
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581 int stride_tx;
582 int stride_rx;
583
b33ae997 584 unsigned int max_r_vecs;
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585 struct nfp_net_r_vector r_vecs[NFP_NET_MAX_R_VECS];
586 struct msix_entry irq_entries[NFP_NET_MAX_IRQS];
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587
588 irq_handler_t lsc_handler;
589 char lsc_name[IFNAMSIZ + 8];
590
591 irq_handler_t exn_handler;
592 char exn_name[IFNAMSIZ + 8];
593
594 irq_handler_t shared_handler;
595 char shared_name[IFNAMSIZ + 8];
596
597 u32 me_freq_mhz;
598
599 bool link_up;
600 spinlock_t link_status_lock;
601
602 spinlock_t reconfig_lock;
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603 u32 reconfig_posted;
604 bool reconfig_timer_active;
605 bool reconfig_sync_present;
606 struct timer_list reconfig_timer;
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607
608 u32 rx_coalesce_usecs;
609 u32 rx_coalesce_max_frames;
610 u32 tx_coalesce_usecs;
611 u32 tx_coalesce_max_frames;
612
613 __be16 vxlan_ports[NFP_NET_N_VXLAN_PORTS];
614 u8 vxlan_usecnt[NFP_NET_N_VXLAN_PORTS];
615
616 u8 __iomem *qcp_cfg;
617
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618 u8 __iomem *tx_bar;
619 u8 __iomem *rx_bar;
620
621 struct dentry *debugfs_dir;
af623682 622 u32 ethtool_dump_flag;
63461a02 623
d4e7f092 624 struct list_head vnic_list;
bd5ca062 625
fa43d2a8 626 struct pci_dev *pdev;
7ac9ebd5 627 struct nfp_app *app;
47465aed 628
eb488c26 629 struct nfp_port *port;
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630};
631
632/* Functions to read/write from/to a BAR
633 * Performs any endian conversion necessary.
634 */
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635static inline u16 nn_readb(struct nfp_net *nn, int off)
636{
d2b84397 637 return readb(nn->dp.ctrl_bar + off);
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638}
639
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640static inline void nn_writeb(struct nfp_net *nn, int off, u8 val)
641{
d2b84397 642 writeb(val, nn->dp.ctrl_bar + off);
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643}
644
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645static inline u16 nn_readw(struct nfp_net *nn, int off)
646{
d2b84397 647 return readw(nn->dp.ctrl_bar + off);
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648}
649
650static inline void nn_writew(struct nfp_net *nn, int off, u16 val)
651{
d2b84397 652 writew(val, nn->dp.ctrl_bar + off);
7533fdc0 653}
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654
655static inline u32 nn_readl(struct nfp_net *nn, int off)
656{
d2b84397 657 return readl(nn->dp.ctrl_bar + off);
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658}
659
660static inline void nn_writel(struct nfp_net *nn, int off, u32 val)
661{
d2b84397 662 writel(val, nn->dp.ctrl_bar + off);
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663}
664
665static inline u64 nn_readq(struct nfp_net *nn, int off)
666{
d2b84397 667 return readq(nn->dp.ctrl_bar + off);
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668}
669
670static inline void nn_writeq(struct nfp_net *nn, int off, u64 val)
671{
d2b84397 672 writeq(val, nn->dp.ctrl_bar + off);
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673}
674
675/* Flush posted PCI writes by reading something without side effects */
676static inline void nn_pci_flush(struct nfp_net *nn)
677{
678 nn_readl(nn, NFP_NET_CFG_VERSION);
679}
680
681/* Queue Controller Peripheral access functions and definitions.
682 *
683 * Some of the BARs of the NFP are mapped to portions of the Queue
684 * Controller Peripheral (QCP) address space on the NFP. A QCP queue
685 * has a read and a write pointer (as well as a size and flags,
686 * indicating overflow etc). The QCP offers a number of different
687 * operation on queue pointers, but here we only offer function to
688 * either add to a pointer or to read the pointer value.
689 */
690#define NFP_QCP_QUEUE_ADDR_SZ 0x800
691#define NFP_QCP_QUEUE_OFF(_x) ((_x) * NFP_QCP_QUEUE_ADDR_SZ)
692#define NFP_QCP_QUEUE_ADD_RPTR 0x0000
693#define NFP_QCP_QUEUE_ADD_WPTR 0x0004
694#define NFP_QCP_QUEUE_STS_LO 0x0008
695#define NFP_QCP_QUEUE_STS_LO_READPTR_mask 0x3ffff
696#define NFP_QCP_QUEUE_STS_HI 0x000c
697#define NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask 0x3ffff
698
416db5c1 699/* The offset of a QCP queues in the PCIe Target */
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700#define NFP_PCIE_QUEUE(_q) (0x80000 + (NFP_QCP_QUEUE_ADDR_SZ * ((_q) & 0xff)))
701
702/* nfp_qcp_ptr - Read or Write Pointer of a queue */
703enum nfp_qcp_ptr {
704 NFP_QCP_READ_PTR = 0,
705 NFP_QCP_WRITE_PTR
706};
707
708/* There appear to be an *undocumented* upper limit on the value which
709 * one can add to a queue and that value is either 0x3f or 0x7f. We
710 * go with 0x3f as a conservative measure.
711 */
712#define NFP_QCP_MAX_ADD 0x3f
713
714static inline void _nfp_qcp_ptr_add(u8 __iomem *q,
715 enum nfp_qcp_ptr ptr, u32 val)
716{
717 u32 off;
718
719 if (ptr == NFP_QCP_READ_PTR)
720 off = NFP_QCP_QUEUE_ADD_RPTR;
721 else
722 off = NFP_QCP_QUEUE_ADD_WPTR;
723
724 while (val > NFP_QCP_MAX_ADD) {
725 writel(NFP_QCP_MAX_ADD, q + off);
726 val -= NFP_QCP_MAX_ADD;
727 }
728
729 writel(val, q + off);
730}
731
732/**
733 * nfp_qcp_rd_ptr_add() - Add the value to the read pointer of a queue
734 *
735 * @q: Base address for queue structure
736 * @val: Value to add to the queue pointer
737 *
738 * If @val is greater than @NFP_QCP_MAX_ADD multiple writes are performed.
739 */
740static inline void nfp_qcp_rd_ptr_add(u8 __iomem *q, u32 val)
741{
742 _nfp_qcp_ptr_add(q, NFP_QCP_READ_PTR, val);
743}
744
745/**
746 * nfp_qcp_wr_ptr_add() - Add the value to the write pointer of a queue
747 *
748 * @q: Base address for queue structure
749 * @val: Value to add to the queue pointer
750 *
751 * If @val is greater than @NFP_QCP_MAX_ADD multiple writes are performed.
752 */
753static inline void nfp_qcp_wr_ptr_add(u8 __iomem *q, u32 val)
754{
755 _nfp_qcp_ptr_add(q, NFP_QCP_WRITE_PTR, val);
756}
757
758static inline u32 _nfp_qcp_read(u8 __iomem *q, enum nfp_qcp_ptr ptr)
759{
760 u32 off;
761 u32 val;
762
763 if (ptr == NFP_QCP_READ_PTR)
764 off = NFP_QCP_QUEUE_STS_LO;
765 else
766 off = NFP_QCP_QUEUE_STS_HI;
767
768 val = readl(q + off);
769
770 if (ptr == NFP_QCP_READ_PTR)
771 return val & NFP_QCP_QUEUE_STS_LO_READPTR_mask;
772 else
773 return val & NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask;
774}
775
776/**
777 * nfp_qcp_rd_ptr_read() - Read the current read pointer value for a queue
778 * @q: Base address for queue structure
779 *
780 * Return: Value read.
781 */
782static inline u32 nfp_qcp_rd_ptr_read(u8 __iomem *q)
783{
784 return _nfp_qcp_read(q, NFP_QCP_READ_PTR);
785}
786
787/**
788 * nfp_qcp_wr_ptr_read() - Read the current write pointer value for a queue
789 * @q: Base address for queue structure
790 *
791 * Return: Value read.
792 */
793static inline u32 nfp_qcp_wr_ptr_read(u8 __iomem *q)
794{
795 return _nfp_qcp_read(q, NFP_QCP_WRITE_PTR);
796}
797
798/* Globals */
2633beb9 799extern const char nfp_driver_version[];
4c352362 800
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801extern const struct net_device_ops nfp_net_netdev_ops;
802
803static inline bool nfp_netdev_is_nfp_net(struct net_device *netdev)
804{
805 return netdev->netdev_ops == &nfp_net_netdev_ops;
806}
807
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808/* Prototypes */
809void nfp_net_get_fw_version(struct nfp_net_fw_version *fw_ver,
810 void __iomem *ctrl_bar);
811
a4b562bb 812struct nfp_net *
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813nfp_net_alloc(struct pci_dev *pdev,
814 unsigned int max_tx_rings, unsigned int max_rx_rings);
815void nfp_net_free(struct nfp_net *nn);
816
817int nfp_net_init(struct nfp_net *nn);
818void nfp_net_clean(struct nfp_net *nn);
819
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820void nfp_net_set_ethtool_ops(struct net_device *netdev);
821void nfp_net_info(struct nfp_net *nn);
822int nfp_net_reconfig(struct nfp_net *nn, u32 update);
9ff304bf 823unsigned int nfp_net_rss_key_sz(struct nfp_net *nn);
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824void nfp_net_rss_write_itbl(struct nfp_net *nn);
825void nfp_net_rss_write_key(struct nfp_net *nn);
826void nfp_net_coalesce_write_cfg(struct nfp_net *nn);
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827
828unsigned int
829nfp_net_irqs_alloc(struct pci_dev *pdev, struct msix_entry *irq_entries,
830 unsigned int min_irqs, unsigned int want_irqs);
831void nfp_net_irqs_disable(struct pci_dev *pdev);
832void
833nfp_net_irqs_assign(struct nfp_net *nn, struct msix_entry *irq_entries,
834 unsigned int n);
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835
836struct nfp_net_dp *nfp_net_clone_dp(struct nfp_net *nn);
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837int nfp_net_ring_reconfig(struct nfp_net *nn, struct nfp_net_dp *new,
838 struct netlink_ext_ack *extack);
4c352362 839
2633beb9 840#ifdef CONFIG_NFP_DEBUG
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841void nfp_net_debugfs_create(void);
842void nfp_net_debugfs_destroy(void);
6f1cd5ca 843struct dentry *nfp_net_debugfs_device_add(struct pci_dev *pdev);
d4e7f092 844void nfp_net_debugfs_vnic_add(struct nfp_net *nn, struct dentry *ddir, int id);
6f1cd5ca 845void nfp_net_debugfs_dir_clean(struct dentry **dir);
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846#else
847static inline void nfp_net_debugfs_create(void)
848{
849}
850
851static inline void nfp_net_debugfs_destroy(void)
852{
853}
854
6f1cd5ca 855static inline struct dentry *nfp_net_debugfs_device_add(struct pci_dev *pdev)
4c352362 856{
6f1cd5ca 857 return NULL;
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858}
859
6f1cd5ca 860static inline void
d4e7f092 861nfp_net_debugfs_vnic_add(struct nfp_net *nn, struct dentry *ddir, int id)
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862{
863}
864
865static inline void nfp_net_debugfs_dir_clean(struct dentry **dir)
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866{
867}
2633beb9 868#endif /* CONFIG_NFP_DEBUG */
4c352362 869
66860beb 870void nfp_net_filter_stats_timer(unsigned long data);
2e9d594d 871int nfp_net_bpf_offload(struct nfp_net *nn, struct tc_cls_bpf_offload *cls_bpf);
7533fdc0 872
4c352362 873#endif /* _NFP_NET_H_ */