]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/net/ethernet/netronome/nfp/nfp_net.h
nfp: make use of extended ack message reporting
[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / netronome / nfp / nfp_net.h
CommitLineData
4c352362 1/*
2633beb9 2 * Copyright (C) 2015-2017 Netronome Systems, Inc.
4c352362
JK
3 *
4 * This software is dual licensed under the GNU General License Version 2,
5 * June 1991 as shown in the file COPYING in the top-level directory of this
6 * source tree or the BSD 2-Clause License provided below. You have the
7 * option to license this software under the complete terms of either license.
8 *
9 * The BSD 2-Clause License:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * 1. Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * 2. Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
34/*
35 * nfp_net.h
36 * Declarations for Netronome network device driver.
37 * Authors: Jakub Kicinski <jakub.kicinski@netronome.com>
38 * Jason McMullan <jason.mcmullan@netronome.com>
39 * Rolf Neugebauer <rolf.neugebauer@netronome.com>
40 */
41
42#ifndef _NFP_NET_H_
43#define _NFP_NET_H_
44
45#include <linux/interrupt.h>
63461a02 46#include <linux/list.h>
4c352362
JK
47#include <linux/netdevice.h>
48#include <linux/pci.h>
a1cbaad7 49#include <linux/io-64-nonatomic-hi-lo.h>
4c352362
JK
50
51#include "nfp_net_ctrl.h"
52
79c12a75
JK
53#define nn_err(nn, fmt, args...) netdev_err((nn)->dp.netdev, fmt, ## args)
54#define nn_warn(nn, fmt, args...) netdev_warn((nn)->dp.netdev, fmt, ## args)
55#define nn_info(nn, fmt, args...) netdev_info((nn)->dp.netdev, fmt, ## args)
56#define nn_dbg(nn, fmt, args...) netdev_dbg((nn)->dp.netdev, fmt, ## args)
57#define nn_dp_warn(dp, fmt, args...) \
4c352362
JK
58 do { \
59 if (unlikely(net_ratelimit())) \
79c12a75 60 netdev_warn((dp)->netdev, fmt, ## args); \
4c352362
JK
61 } while (0)
62
3d780b92
JK
63/* Max time to wait for NFP to respond on updates (in seconds) */
64#define NFP_NET_POLL_TIMEOUT 5
4c352362 65
66860beb
JK
66/* Interval for reading offloaded filter stats */
67#define NFP_NET_STAT_POLL_IVL msecs_to_jiffies(100)
68
4c352362 69/* Bar allocation */
796312cd 70#define NFP_NET_CTRL_BAR 0
4c352362
JK
71#define NFP_NET_Q0_BAR 2
72#define NFP_NET_Q1_BAR 4 /* OBSOLETE */
73
74/* Max bits in DMA address */
75#define NFP_NET_MAX_DMA_BITS 40
76
77/* Default size for MTU and freelist buffer sizes */
78#define NFP_NET_DEFAULT_MTU 1500
4c352362
JK
79
80/* Maximum number of bytes prepended to a packet */
81#define NFP_NET_MAX_PREPEND 64
82
83/* Interrupt definitions */
84#define NFP_NET_NON_Q_VECTORS 2
85#define NFP_NET_IRQ_LSC_IDX 0
86#define NFP_NET_IRQ_EXN_IDX 1
fdace6c2 87#define NFP_NET_MIN_PORT_IRQS (NFP_NET_NON_Q_VECTORS + 1)
4c352362
JK
88
89/* Queue/Ring definitions */
90#define NFP_NET_MAX_TX_RINGS 64 /* Max. # of Tx rings per device */
91#define NFP_NET_MAX_RX_RINGS 64 /* Max. # of Rx rings per device */
23a4e389
JK
92#define NFP_NET_MAX_R_VECS (NFP_NET_MAX_TX_RINGS > NFP_NET_MAX_RX_RINGS ? \
93 NFP_NET_MAX_TX_RINGS : NFP_NET_MAX_RX_RINGS)
94#define NFP_NET_MAX_IRQS (NFP_NET_NON_Q_VECTORS + NFP_NET_MAX_R_VECS)
4c352362
JK
95
96#define NFP_NET_MIN_TX_DESCS 256 /* Min. # of Tx descs per ring */
97#define NFP_NET_MIN_RX_DESCS 256 /* Min. # of Rx descs per ring */
98#define NFP_NET_MAX_TX_DESCS (256 * 1024) /* Max. # of Tx descs per ring */
99#define NFP_NET_MAX_RX_DESCS (256 * 1024) /* Max. # of Rx descs per ring */
100
101#define NFP_NET_TX_DESCS_DEFAULT 4096 /* Default # of Tx descs per ring */
102#define NFP_NET_RX_DESCS_DEFAULT 4096 /* Default # of Rx descs per ring */
103
104#define NFP_NET_FL_BATCH 16 /* Add freelist in this Batch size */
105
106/* Offload definitions */
107#define NFP_NET_N_VXLAN_PORTS (NFP_NET_CFG_VXLAN_SZ / sizeof(__be16))
108
c0f031bc
JK
109#define NFP_NET_RX_BUF_HEADROOM (NET_SKB_PAD + NET_IP_ALIGN)
110#define NFP_NET_RX_BUF_NON_DATA (NFP_NET_RX_BUF_HEADROOM + \
111 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
112
4c352362 113/* Forward declarations */
bd5ca062 114struct nfp_cpp;
47465aed 115struct nfp_eth_table_port;
4c352362
JK
116struct nfp_net;
117struct nfp_net_r_vector;
118
119/* Convenience macro for writing dma address into RX/TX descriptors */
120#define nfp_desc_set_dma_addr(desc, dma_addr) \
121 do { \
122 __typeof(desc) __d = (desc); \
123 dma_addr_t __addr = (dma_addr); \
124 \
125 __d->dma_addr_lo = cpu_to_le32(lower_32_bits(__addr)); \
126 __d->dma_addr_hi = upper_32_bits(__addr) & 0xff; \
127 } while (0)
128
129/* TX descriptor format */
130
131#define PCIE_DESC_TX_EOP BIT(7)
132#define PCIE_DESC_TX_OFFSET_MASK GENMASK(6, 0)
133#define PCIE_DESC_TX_MSS_MASK GENMASK(13, 0)
134
135/* Flags in the host TX descriptor */
136#define PCIE_DESC_TX_CSUM BIT(7)
137#define PCIE_DESC_TX_IP4_CSUM BIT(6)
138#define PCIE_DESC_TX_TCP_CSUM BIT(5)
139#define PCIE_DESC_TX_UDP_CSUM BIT(4)
140#define PCIE_DESC_TX_VLAN BIT(3)
141#define PCIE_DESC_TX_LSO BIT(2)
142#define PCIE_DESC_TX_ENCAP BIT(1)
143#define PCIE_DESC_TX_O_IP4_CSUM BIT(0)
144
145struct nfp_net_tx_desc {
146 union {
147 struct {
148 u8 dma_addr_hi; /* High bits of host buf address */
149 __le16 dma_len; /* Length to DMA for this desc */
150 u8 offset_eop; /* Offset in buf where pkt starts +
151 * highest bit is eop flag.
152 */
153 __le32 dma_addr_lo; /* Low 32bit of host buf addr */
154
155 __le16 mss; /* MSS to be used for LSO */
156 u8 l4_offset; /* LSO, where the L4 data starts */
157 u8 flags; /* TX Flags, see @PCIE_DESC_TX_* */
158
159 __le16 vlan; /* VLAN tag to add if indicated */
160 __le16 data_len; /* Length of frame + meta data */
161 } __packed;
162 __le32 vals[4];
163 };
164};
165
166/**
167 * struct nfp_net_tx_buf - software TX buffer descriptor
168 * @skb: sk_buff associated with this buffer
169 * @dma_addr: DMA mapping address of the buffer
170 * @fidx: Fragment index (-1 for the head and [0..nr_frags-1] for frags)
171 * @pkt_cnt: Number of packets to be produced out of the skb associated
172 * with this buffer (valid only on the head's buffer).
173 * Will be 1 for all non-TSO packets.
174 * @real_len: Number of bytes which to be produced out of the skb (valid only
175 * on the head's buffer). Equal to skb->len for non-TSO packets.
176 */
177struct nfp_net_tx_buf {
ecd63a02
JK
178 union {
179 struct sk_buff *skb;
180 void *frag;
181 };
4c352362
JK
182 dma_addr_t dma_addr;
183 short int fidx;
184 u16 pkt_cnt;
185 u32 real_len;
186};
187
188/**
189 * struct nfp_net_tx_ring - TX ring structure
190 * @r_vec: Back pointer to ring vector structure
191 * @idx: Ring index from Linux's perspective
192 * @qcidx: Queue Controller Peripheral (QCP) queue index for the TX queue
193 * @qcp_q: Pointer to base of the QCP TX queue
194 * @cnt: Size of the queue in number of descriptors
195 * @wr_p: TX ring write pointer (free running)
196 * @rd_p: TX ring read pointer (free running)
197 * @qcp_rd_p: Local copy of QCP TX queue read pointer
198 * @wr_ptr_add: Accumulated number of buffers to add to QCP write pointer
199 * (used for .xmit_more delayed kick)
200 * @txbufs: Array of transmitted TX buffers, to free on transmit
201 * @txds: Virtual address of TX ring in host memory
202 * @dma: DMA address of the TX ring
203 * @size: Size, in bytes, of the TX ring (needed to free)
92e68195 204 * @is_xdp: Is this a XDP TX ring?
4c352362
JK
205 */
206struct nfp_net_tx_ring {
207 struct nfp_net_r_vector *r_vec;
208
209 u32 idx;
210 int qcidx;
211 u8 __iomem *qcp_q;
212
213 u32 cnt;
214 u32 wr_p;
215 u32 rd_p;
216 u32 qcp_rd_p;
217
218 u32 wr_ptr_add;
219
220 struct nfp_net_tx_buf *txbufs;
221 struct nfp_net_tx_desc *txds;
222
223 dma_addr_t dma;
224 unsigned int size;
92e68195 225 bool is_xdp;
4c352362
JK
226} ____cacheline_aligned;
227
228/* RX and freelist descriptor format */
229
230#define PCIE_DESC_RX_DD BIT(7)
231#define PCIE_DESC_RX_META_LEN_MASK GENMASK(6, 0)
232
233/* Flags in the RX descriptor */
234#define PCIE_DESC_RX_RSS cpu_to_le16(BIT(15))
235#define PCIE_DESC_RX_I_IP4_CSUM cpu_to_le16(BIT(14))
236#define PCIE_DESC_RX_I_IP4_CSUM_OK cpu_to_le16(BIT(13))
237#define PCIE_DESC_RX_I_TCP_CSUM cpu_to_le16(BIT(12))
238#define PCIE_DESC_RX_I_TCP_CSUM_OK cpu_to_le16(BIT(11))
239#define PCIE_DESC_RX_I_UDP_CSUM cpu_to_le16(BIT(10))
240#define PCIE_DESC_RX_I_UDP_CSUM_OK cpu_to_le16(BIT(9))
7533fdc0 241#define PCIE_DESC_RX_BPF cpu_to_le16(BIT(8))
4c352362
JK
242#define PCIE_DESC_RX_EOP cpu_to_le16(BIT(7))
243#define PCIE_DESC_RX_IP4_CSUM cpu_to_le16(BIT(6))
244#define PCIE_DESC_RX_IP4_CSUM_OK cpu_to_le16(BIT(5))
245#define PCIE_DESC_RX_TCP_CSUM cpu_to_le16(BIT(4))
246#define PCIE_DESC_RX_TCP_CSUM_OK cpu_to_le16(BIT(3))
247#define PCIE_DESC_RX_UDP_CSUM cpu_to_le16(BIT(2))
248#define PCIE_DESC_RX_UDP_CSUM_OK cpu_to_le16(BIT(1))
249#define PCIE_DESC_RX_VLAN cpu_to_le16(BIT(0))
250
251#define PCIE_DESC_RX_CSUM_ALL (PCIE_DESC_RX_IP4_CSUM | \
252 PCIE_DESC_RX_TCP_CSUM | \
253 PCIE_DESC_RX_UDP_CSUM | \
254 PCIE_DESC_RX_I_IP4_CSUM | \
255 PCIE_DESC_RX_I_TCP_CSUM | \
256 PCIE_DESC_RX_I_UDP_CSUM)
257#define PCIE_DESC_RX_CSUM_OK_SHIFT 1
258#define __PCIE_DESC_RX_CSUM_ALL le16_to_cpu(PCIE_DESC_RX_CSUM_ALL)
259#define __PCIE_DESC_RX_CSUM_ALL_OK (__PCIE_DESC_RX_CSUM_ALL >> \
260 PCIE_DESC_RX_CSUM_OK_SHIFT)
261
262struct nfp_net_rx_desc {
263 union {
264 struct {
265 u8 dma_addr_hi; /* High bits of the buf address */
266 __le16 reserved; /* Must be zero */
267 u8 meta_len_dd; /* Must be zero */
268
269 __le32 dma_addr_lo; /* Low bits of the buffer address */
270 } __packed fld;
271
272 struct {
273 __le16 data_len; /* Length of the frame + meta data */
274 u8 reserved;
275 u8 meta_len_dd; /* Length of meta data prepended +
276 * descriptor done flag.
277 */
278
279 __le16 flags; /* RX flags. See @PCIE_DESC_RX_* */
280 __le16 vlan; /* VLAN if stripped */
281 } __packed rxd;
282
283 __le32 vals[2];
284 };
285};
286
19d0f54e
JK
287#define NFP_NET_META_FIELD_MASK GENMASK(NFP_NET_META_FIELD_SIZE - 1, 0)
288
e524a6a9
JK
289struct nfp_meta_parsed {
290 u32 hash_type;
291 u32 hash;
292 u32 mark;
293};
294
4c352362
JK
295struct nfp_net_rx_hash {
296 __be32 hash_type;
297 __be32 hash;
298};
299
300/**
301 * struct nfp_net_rx_buf - software RX buffer descriptor
c0f031bc 302 * @frag: page fragment buffer
4c352362
JK
303 * @dma_addr: DMA mapping address of the buffer
304 */
305struct nfp_net_rx_buf {
c0f031bc 306 void *frag;
4c352362
JK
307 dma_addr_t dma_addr;
308};
309
310/**
311 * struct nfp_net_rx_ring - RX ring structure
312 * @r_vec: Back pointer to ring vector structure
313 * @cnt: Size of the queue in number of descriptors
314 * @wr_p: FL/RX ring write pointer (free running)
315 * @rd_p: FL/RX ring read pointer (free running)
316 * @idx: Ring index from Linux's perspective
317 * @fl_qcidx: Queue Controller Peripheral (QCP) queue index for the freelist
4c352362 318 * @qcp_fl: Pointer to base of the QCP freelist queue
4c352362
JK
319 * @wr_ptr_add: Accumulated number of buffers to add to QCP write pointer
320 * (used for free list batching)
321 * @rxbufs: Array of transmitted FL/RX buffers
322 * @rxds: Virtual address of FL/RX ring in host memory
323 * @dma: DMA address of the FL/RX ring
324 * @size: Size, in bytes, of the FL/RX ring (needed to free)
325 */
326struct nfp_net_rx_ring {
327 struct nfp_net_r_vector *r_vec;
328
329 u32 cnt;
330 u32 wr_p;
331 u32 rd_p;
332
83d08a1d
JK
333 u32 idx;
334 u32 wr_ptr_add;
4c352362
JK
335
336 int fl_qcidx;
4c352362 337 u8 __iomem *qcp_fl;
4c352362
JK
338
339 struct nfp_net_rx_buf *rxbufs;
340 struct nfp_net_rx_desc *rxds;
341
342 dma_addr_t dma;
343 unsigned int size;
344} ____cacheline_aligned;
345
346/**
347 * struct nfp_net_r_vector - Per ring interrupt vector configuration
348 * @nfp_net: Backpointer to nfp_net structure
349 * @napi: NAPI structure for this ring vec
350 * @tx_ring: Pointer to TX ring
351 * @rx_ring: Pointer to RX ring
ecd63a02 352 * @xdp_ring: Pointer to an extra TX ring for XDP
fdace6c2 353 * @irq_entry: MSI-X table entry (use for talking to the device)
4c352362
JK
354 * @rx_sync: Seqlock for atomic updates of RX stats
355 * @rx_pkts: Number of received packets
356 * @rx_bytes: Number of received bytes
357 * @rx_drops: Number of packets dropped on RX due to lack of resources
358 * @hw_csum_rx_ok: Counter of packets where the HW checksum was OK
359 * @hw_csum_rx_inner_ok: Counter of packets where the inner HW checksum was OK
360 * @hw_csum_rx_error: Counter of packets with bad checksums
361 * @tx_sync: Seqlock for atomic updates of TX stats
362 * @tx_pkts: Number of Transmitted packets
363 * @tx_bytes: Number of Transmitted bytes
364 * @hw_csum_tx: Counter of packets with TX checksum offload requested
365 * @hw_csum_tx_inner: Counter of inner TX checksum offload requests
366 * @tx_gather: Counter of packets with Gather DMA
367 * @tx_lso: Counter of LSO packets sent
368 * @tx_errors: How many TX errors were encountered
369 * @tx_busy: How often was TX busy (no space)?
fdace6c2 370 * @irq_vector: Interrupt vector number (use for talking to the OS)
4c352362
JK
371 * @handler: Interrupt handler for this ring vector
372 * @name: Name of the interrupt vector
373 * @affinity_mask: SMP affinity mask for this vector
374 *
375 * This structure ties RX and TX rings to interrupt vectors and a NAPI
376 * context. This currently only supports one RX and TX ring per
377 * interrupt vector but might be extended in the future to allow
378 * association of multiple rings per vector.
379 */
380struct nfp_net_r_vector {
381 struct nfp_net *nfp_net;
382 struct napi_struct napi;
383
384 struct nfp_net_tx_ring *tx_ring;
385 struct nfp_net_rx_ring *rx_ring;
386
fdace6c2 387 u16 irq_entry;
4c352362
JK
388
389 struct u64_stats_sync rx_sync;
390 u64 rx_pkts;
391 u64 rx_bytes;
392 u64 rx_drops;
393 u64 hw_csum_rx_ok;
394 u64 hw_csum_rx_inner_ok;
395 u64 hw_csum_rx_error;
396
ecd63a02
JK
397 struct nfp_net_tx_ring *xdp_ring;
398
4c352362
JK
399 struct u64_stats_sync tx_sync;
400 u64 tx_pkts;
401 u64 tx_bytes;
402 u64 hw_csum_tx;
403 u64 hw_csum_tx_inner;
404 u64 tx_gather;
405 u64 tx_lso;
406 u64 tx_errors;
407 u64 tx_busy;
408
fdace6c2 409 u32 irq_vector;
4c352362
JK
410 irq_handler_t handler;
411 char name[IFNAMSIZ + 8];
412 cpumask_t affinity_mask;
413} ____cacheline_aligned;
414
415/* Firmware version as it is written in the 32bit value in the BAR */
416struct nfp_net_fw_version {
417 u8 minor;
418 u8 major;
419 u8 class;
420 u8 resv;
421} __packed;
422
423static inline bool nfp_net_fw_ver_eq(struct nfp_net_fw_version *fw_ver,
424 u8 resv, u8 class, u8 major, u8 minor)
425{
426 return fw_ver->resv == resv &&
427 fw_ver->class == class &&
428 fw_ver->major == major &&
429 fw_ver->minor == minor;
430}
431
66860beb
JK
432struct nfp_stat_pair {
433 u64 pkts;
434 u64 bytes;
435};
436
4c352362 437/**
79c12a75 438 * struct nfp_net_dp - NFP network device datapath data structure
fa43d2a8 439 * @dev: Backpointer to struct device
79c12a75
JK
440 * @netdev: Backpointer to net_device structure
441 * @is_vf: Is the driver attached to a VF?
7533fdc0 442 * @bpf_offload_skip_sw: Offloaded BPF program will not be rerun by cls_bpf
6d677075 443 * @bpf_offload_xdp: Offloaded BPF program is XDP
b9dcf88a 444 * @chained_metadata_format: Firemware will use new metadata format
c487e6b1 445 * @rx_dma_dir: Mapping direction for RX buffers
6fe0c3b4 446 * @rx_dma_off: Offset at which DMA packets (for XDP headroom)
97717aca 447 * @rx_offset: Offset in the RX buffers where packet data starts
79c12a75
JK
448 * @ctrl: Local copy of the control register/word.
449 * @fl_bufsz: Currently configured size of the freelist buffers
ecd63a02 450 * @xdp_prog: Installed XDP program
79c12a75
JK
451 * @tx_rings: Array of pre-allocated TX ring structures
452 * @rx_rings: Array of pre-allocated RX ring structures
d2b84397 453 * @ctrl_bar: Pointer to mapped control BAR
79c12a75
JK
454 *
455 * @txd_cnt: Size of the TX ring in number of descriptors
456 * @rxd_cnt: Size of the RX ring in number of descriptors
457 * @num_r_vecs: Number of used ring vectors
458 * @num_tx_rings: Currently configured number of TX rings
459 * @num_stack_tx_rings: Number of TX rings used by the stack (not XDP)
460 * @num_rx_rings: Currently configured number of RX rings
76e1e1a8 461 * @mtu: Device MTU
79c12a75
JK
462 */
463struct nfp_net_dp {
464 struct device *dev;
465 struct net_device *netdev;
466
c487e6b1
JK
467 u8 is_vf:1;
468 u8 bpf_offload_skip_sw:1;
469 u8 bpf_offload_xdp:1;
470 u8 chained_metadata_format:1;
471
472 u8 rx_dma_dir;
97717aca
JK
473 u8 rx_offset;
474
dbf637ff
JK
475 u32 rx_dma_off;
476
79c12a75
JK
477 u32 ctrl;
478 u32 fl_bufsz;
479
79c12a75
JK
480 struct bpf_prog *xdp_prog;
481
482 struct nfp_net_tx_ring *tx_rings;
483 struct nfp_net_rx_ring *rx_rings;
484
d2b84397
JK
485 u8 __iomem *ctrl_bar;
486
79c12a75
JK
487 /* Cold data follows */
488
489 unsigned int txd_cnt;
490 unsigned int rxd_cnt;
491
492 unsigned int num_r_vecs;
493
494 unsigned int num_tx_rings;
495 unsigned int num_stack_tx_rings;
496 unsigned int num_rx_rings;
76e1e1a8
JK
497
498 unsigned int mtu;
79c12a75
JK
499};
500
501/**
502 * struct nfp_net - NFP network device structure
503 * @dp: Datapath structure
504 * @fw_ver: Firmware version
4c352362
JK
505 * @cap: Capabilities advertised by the Firmware
506 * @max_mtu: Maximum support MTU advertised by the Firmware
9ff304bf 507 * @rss_hfunc: RSS selected hash function
4c352362
JK
508 * @rss_cfg: RSS configuration
509 * @rss_key: RSS secret key
510 * @rss_itbl: RSS indirection table
66860beb
JK
511 * @rx_filter: Filter offload statistics - dropped packets/bytes
512 * @rx_filter_prev: Filter offload statistics - values from previous update
513 * @rx_filter_change: Jiffies when statistics last changed
514 * @rx_filter_stats_timer: Timer for polling filter offload statistics
515 * @rx_filter_lock: Lock protecting timer state changes (teardown)
79c12a75 516 * @max_r_vecs: Number of allocated interrupt vectors for RX/TX
4c352362
JK
517 * @max_tx_rings: Maximum number of TX rings supported by the Firmware
518 * @max_rx_rings: Maximum number of RX rings supported by the Firmware
4c352362
JK
519 * @r_vecs: Pre-allocated array of ring vectors
520 * @irq_entries: Pre-allocated array of MSI-X entries
521 * @lsc_handler: Handler for Link State Change interrupt
522 * @lsc_name: Name for Link State Change interrupt
523 * @exn_handler: Handler for Exception interrupt
524 * @exn_name: Name for Exception interrupt
525 * @shared_handler: Handler for shared interrupts
526 * @shared_name: Name for shared interrupt
527 * @me_freq_mhz: ME clock_freq (MHz)
528 * @reconfig_lock: Protects HW reconfiguration request regs/machinery
3d780b92
JK
529 * @reconfig_posted: Pending reconfig bits coming from async sources
530 * @reconfig_timer_active: Timer for reading reconfiguration results is pending
531 * @reconfig_sync_present: Some thread is performing synchronous reconfig
532 * @reconfig_timer: Timer for async reading of reconfig results
4c352362 533 * @link_up: Is the link up?
cee42951
JK
534 * @link_changed: Has link state changes since last port refresh?
535 * @link_status_lock: Protects @link_* and ensures atomicity with BAR reading
4c352362
JK
536 * @rx_coalesce_usecs: RX interrupt moderation usecs delay parameter
537 * @rx_coalesce_max_frames: RX interrupt moderation frame count parameter
538 * @tx_coalesce_usecs: TX interrupt moderation usecs delay parameter
539 * @tx_coalesce_max_frames: TX interrupt moderation frame count parameter
540 * @vxlan_ports: VXLAN ports for RX inner csum offload communicated to HW
541 * @vxlan_usecnt: IPv4/IPv6 VXLAN port use counts
542 * @qcp_cfg: Pointer to QCP queue used for configuration notification
4c352362
JK
543 * @tx_bar: Pointer to mapped TX queues
544 * @rx_bar: Pointer to mapped FL/RX queues
545 * @debugfs_dir: Device directory in debugfs
af623682 546 * @ethtool_dump_flag: Ethtool dump flag
63461a02 547 * @port_list: Entry on device port list
fa43d2a8 548 * @pdev: Backpointer to PCI device
bd5ca062 549 * @cpp: CPP device handle if available
47465aed 550 * @eth_port: Translated ETH Table port entry
4c352362
JK
551 */
552struct nfp_net {
79c12a75 553 struct nfp_net_dp dp;
73725d9d 554
4c352362 555 struct nfp_net_fw_version fw_ver;
79c12a75 556
4c352362
JK
557 u32 cap;
558 u32 max_mtu;
559
9ff304bf 560 u8 rss_hfunc;
4c352362
JK
561 u32 rss_cfg;
562 u8 rss_key[NFP_NET_CFG_RSS_KEY_SZ];
563 u8 rss_itbl[NFP_NET_CFG_RSS_ITBL_SZ];
564
66860beb
JK
565 struct nfp_stat_pair rx_filter, rx_filter_prev;
566 unsigned long rx_filter_change;
567 struct timer_list rx_filter_stats_timer;
568 spinlock_t rx_filter_lock;
569
a4b562bb
JK
570 unsigned int max_tx_rings;
571 unsigned int max_rx_rings;
4c352362 572
4c352362
JK
573 int stride_tx;
574 int stride_rx;
575
b33ae997 576 unsigned int max_r_vecs;
23a4e389
JK
577 struct nfp_net_r_vector r_vecs[NFP_NET_MAX_R_VECS];
578 struct msix_entry irq_entries[NFP_NET_MAX_IRQS];
4c352362
JK
579
580 irq_handler_t lsc_handler;
581 char lsc_name[IFNAMSIZ + 8];
582
583 irq_handler_t exn_handler;
584 char exn_name[IFNAMSIZ + 8];
585
586 irq_handler_t shared_handler;
587 char shared_name[IFNAMSIZ + 8];
588
589 u32 me_freq_mhz;
590
591 bool link_up;
cee42951 592 bool link_changed;
4c352362
JK
593 spinlock_t link_status_lock;
594
595 spinlock_t reconfig_lock;
3d780b92
JK
596 u32 reconfig_posted;
597 bool reconfig_timer_active;
598 bool reconfig_sync_present;
599 struct timer_list reconfig_timer;
4c352362
JK
600
601 u32 rx_coalesce_usecs;
602 u32 rx_coalesce_max_frames;
603 u32 tx_coalesce_usecs;
604 u32 tx_coalesce_max_frames;
605
606 __be16 vxlan_ports[NFP_NET_N_VXLAN_PORTS];
607 u8 vxlan_usecnt[NFP_NET_N_VXLAN_PORTS];
608
609 u8 __iomem *qcp_cfg;
610
4c352362
JK
611 u8 __iomem *tx_bar;
612 u8 __iomem *rx_bar;
613
614 struct dentry *debugfs_dir;
af623682 615 u32 ethtool_dump_flag;
63461a02
JK
616
617 struct list_head port_list;
bd5ca062 618
fa43d2a8 619 struct pci_dev *pdev;
bd5ca062 620 struct nfp_cpp *cpp;
47465aed
JK
621
622 struct nfp_eth_table_port *eth_port;
4c352362
JK
623};
624
625/* Functions to read/write from/to a BAR
626 * Performs any endian conversion necessary.
627 */
7533fdc0
JK
628static inline u16 nn_readb(struct nfp_net *nn, int off)
629{
d2b84397 630 return readb(nn->dp.ctrl_bar + off);
7533fdc0
JK
631}
632
4c352362
JK
633static inline void nn_writeb(struct nfp_net *nn, int off, u8 val)
634{
d2b84397 635 writeb(val, nn->dp.ctrl_bar + off);
4c352362
JK
636}
637
7533fdc0
JK
638static inline u16 nn_readw(struct nfp_net *nn, int off)
639{
d2b84397 640 return readw(nn->dp.ctrl_bar + off);
7533fdc0
JK
641}
642
643static inline void nn_writew(struct nfp_net *nn, int off, u16 val)
644{
d2b84397 645 writew(val, nn->dp.ctrl_bar + off);
7533fdc0 646}
4c352362
JK
647
648static inline u32 nn_readl(struct nfp_net *nn, int off)
649{
d2b84397 650 return readl(nn->dp.ctrl_bar + off);
4c352362
JK
651}
652
653static inline void nn_writel(struct nfp_net *nn, int off, u32 val)
654{
d2b84397 655 writel(val, nn->dp.ctrl_bar + off);
4c352362
JK
656}
657
658static inline u64 nn_readq(struct nfp_net *nn, int off)
659{
d2b84397 660 return readq(nn->dp.ctrl_bar + off);
4c352362
JK
661}
662
663static inline void nn_writeq(struct nfp_net *nn, int off, u64 val)
664{
d2b84397 665 writeq(val, nn->dp.ctrl_bar + off);
4c352362
JK
666}
667
668/* Flush posted PCI writes by reading something without side effects */
669static inline void nn_pci_flush(struct nfp_net *nn)
670{
671 nn_readl(nn, NFP_NET_CFG_VERSION);
672}
673
674/* Queue Controller Peripheral access functions and definitions.
675 *
676 * Some of the BARs of the NFP are mapped to portions of the Queue
677 * Controller Peripheral (QCP) address space on the NFP. A QCP queue
678 * has a read and a write pointer (as well as a size and flags,
679 * indicating overflow etc). The QCP offers a number of different
680 * operation on queue pointers, but here we only offer function to
681 * either add to a pointer or to read the pointer value.
682 */
683#define NFP_QCP_QUEUE_ADDR_SZ 0x800
684#define NFP_QCP_QUEUE_OFF(_x) ((_x) * NFP_QCP_QUEUE_ADDR_SZ)
685#define NFP_QCP_QUEUE_ADD_RPTR 0x0000
686#define NFP_QCP_QUEUE_ADD_WPTR 0x0004
687#define NFP_QCP_QUEUE_STS_LO 0x0008
688#define NFP_QCP_QUEUE_STS_LO_READPTR_mask 0x3ffff
689#define NFP_QCP_QUEUE_STS_HI 0x000c
690#define NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask 0x3ffff
691
416db5c1 692/* The offset of a QCP queues in the PCIe Target */
4c352362
JK
693#define NFP_PCIE_QUEUE(_q) (0x80000 + (NFP_QCP_QUEUE_ADDR_SZ * ((_q) & 0xff)))
694
695/* nfp_qcp_ptr - Read or Write Pointer of a queue */
696enum nfp_qcp_ptr {
697 NFP_QCP_READ_PTR = 0,
698 NFP_QCP_WRITE_PTR
699};
700
701/* There appear to be an *undocumented* upper limit on the value which
702 * one can add to a queue and that value is either 0x3f or 0x7f. We
703 * go with 0x3f as a conservative measure.
704 */
705#define NFP_QCP_MAX_ADD 0x3f
706
707static inline void _nfp_qcp_ptr_add(u8 __iomem *q,
708 enum nfp_qcp_ptr ptr, u32 val)
709{
710 u32 off;
711
712 if (ptr == NFP_QCP_READ_PTR)
713 off = NFP_QCP_QUEUE_ADD_RPTR;
714 else
715 off = NFP_QCP_QUEUE_ADD_WPTR;
716
717 while (val > NFP_QCP_MAX_ADD) {
718 writel(NFP_QCP_MAX_ADD, q + off);
719 val -= NFP_QCP_MAX_ADD;
720 }
721
722 writel(val, q + off);
723}
724
725/**
726 * nfp_qcp_rd_ptr_add() - Add the value to the read pointer of a queue
727 *
728 * @q: Base address for queue structure
729 * @val: Value to add to the queue pointer
730 *
731 * If @val is greater than @NFP_QCP_MAX_ADD multiple writes are performed.
732 */
733static inline void nfp_qcp_rd_ptr_add(u8 __iomem *q, u32 val)
734{
735 _nfp_qcp_ptr_add(q, NFP_QCP_READ_PTR, val);
736}
737
738/**
739 * nfp_qcp_wr_ptr_add() - Add the value to the write pointer of a queue
740 *
741 * @q: Base address for queue structure
742 * @val: Value to add to the queue pointer
743 *
744 * If @val is greater than @NFP_QCP_MAX_ADD multiple writes are performed.
745 */
746static inline void nfp_qcp_wr_ptr_add(u8 __iomem *q, u32 val)
747{
748 _nfp_qcp_ptr_add(q, NFP_QCP_WRITE_PTR, val);
749}
750
751static inline u32 _nfp_qcp_read(u8 __iomem *q, enum nfp_qcp_ptr ptr)
752{
753 u32 off;
754 u32 val;
755
756 if (ptr == NFP_QCP_READ_PTR)
757 off = NFP_QCP_QUEUE_STS_LO;
758 else
759 off = NFP_QCP_QUEUE_STS_HI;
760
761 val = readl(q + off);
762
763 if (ptr == NFP_QCP_READ_PTR)
764 return val & NFP_QCP_QUEUE_STS_LO_READPTR_mask;
765 else
766 return val & NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask;
767}
768
769/**
770 * nfp_qcp_rd_ptr_read() - Read the current read pointer value for a queue
771 * @q: Base address for queue structure
772 *
773 * Return: Value read.
774 */
775static inline u32 nfp_qcp_rd_ptr_read(u8 __iomem *q)
776{
777 return _nfp_qcp_read(q, NFP_QCP_READ_PTR);
778}
779
780/**
781 * nfp_qcp_wr_ptr_read() - Read the current write pointer value for a queue
782 * @q: Base address for queue structure
783 *
784 * Return: Value read.
785 */
786static inline u32 nfp_qcp_wr_ptr_read(u8 __iomem *q)
787{
788 return _nfp_qcp_read(q, NFP_QCP_WRITE_PTR);
789}
790
791/* Globals */
2633beb9 792extern const char nfp_driver_version[];
4c352362
JK
793
794/* Prototypes */
795void nfp_net_get_fw_version(struct nfp_net_fw_version *fw_ver,
796 void __iomem *ctrl_bar);
797
a4b562bb
JK
798struct nfp_net *
799nfp_net_netdev_alloc(struct pci_dev *pdev,
800 unsigned int max_tx_rings, unsigned int max_rx_rings);
4c352362
JK
801void nfp_net_netdev_free(struct nfp_net *nn);
802int nfp_net_netdev_init(struct net_device *netdev);
803void nfp_net_netdev_clean(struct net_device *netdev);
804void nfp_net_set_ethtool_ops(struct net_device *netdev);
805void nfp_net_info(struct nfp_net *nn);
806int nfp_net_reconfig(struct nfp_net *nn, u32 update);
9ff304bf 807unsigned int nfp_net_rss_key_sz(struct nfp_net *nn);
4c352362
JK
808void nfp_net_rss_write_itbl(struct nfp_net *nn);
809void nfp_net_rss_write_key(struct nfp_net *nn);
810void nfp_net_coalesce_write_cfg(struct nfp_net *nn);
fdace6c2
JK
811
812unsigned int
813nfp_net_irqs_alloc(struct pci_dev *pdev, struct msix_entry *irq_entries,
814 unsigned int min_irqs, unsigned int want_irqs);
815void nfp_net_irqs_disable(struct pci_dev *pdev);
816void
817nfp_net_irqs_assign(struct nfp_net *nn, struct msix_entry *irq_entries,
818 unsigned int n);
783496b0
JK
819
820struct nfp_net_dp *nfp_net_clone_dp(struct nfp_net *nn);
d957c0f7
JK
821int nfp_net_ring_reconfig(struct nfp_net *nn, struct nfp_net_dp *new,
822 struct netlink_ext_ack *extack);
4c352362 823
cee42951 824bool nfp_net_link_changed_read_clear(struct nfp_net *nn);
90fdc561
JK
825int nfp_net_refresh_eth_port(struct nfp_net *nn);
826void nfp_net_refresh_port_table(struct nfp_net *nn);
cee42951 827
2633beb9 828#ifdef CONFIG_NFP_DEBUG
4c352362
JK
829void nfp_net_debugfs_create(void);
830void nfp_net_debugfs_destroy(void);
6f1cd5ca
JK
831struct dentry *nfp_net_debugfs_device_add(struct pci_dev *pdev);
832void nfp_net_debugfs_port_add(struct nfp_net *nn, struct dentry *ddir, int id);
833void nfp_net_debugfs_dir_clean(struct dentry **dir);
4c352362
JK
834#else
835static inline void nfp_net_debugfs_create(void)
836{
837}
838
839static inline void nfp_net_debugfs_destroy(void)
840{
841}
842
6f1cd5ca 843static inline struct dentry *nfp_net_debugfs_device_add(struct pci_dev *pdev)
4c352362 844{
6f1cd5ca 845 return NULL;
4c352362
JK
846}
847
6f1cd5ca
JK
848static inline void
849nfp_net_debugfs_port_add(struct nfp_net *nn, struct dentry *ddir, int id)
850{
851}
852
853static inline void nfp_net_debugfs_dir_clean(struct dentry **dir)
4c352362
JK
854{
855}
2633beb9 856#endif /* CONFIG_NFP_DEBUG */
4c352362 857
66860beb 858void nfp_net_filter_stats_timer(unsigned long data);
2e9d594d 859int nfp_net_bpf_offload(struct nfp_net *nn, struct tc_cls_bpf_offload *cls_bpf);
7533fdc0 860
4c352362 861#endif /* _NFP_NET_H_ */