]> git.proxmox.com Git - mirror_ubuntu-eoan-kernel.git/blame - drivers/net/ethernet/qlogic/qed/qed_ll2.c
qed: Fix initialization of ll2 offload feature
[mirror_ubuntu-eoan-kernel.git] / drivers / net / ethernet / qlogic / qed / qed_ll2.c
CommitLineData
0a7fb11c 1/* QLogic qed NIC Driver
e8f1cb50 2 * Copyright (c) 2015-2017 QLogic Corporation
0a7fb11c 3 *
e8f1cb50
MY
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
0a7fb11c 9 *
e8f1cb50
MY
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
0a7fb11c
YM
31 */
32
33#include <linux/types.h>
34#include <asm/byteorder.h>
35#include <linux/dma-mapping.h>
36#include <linux/if_vlan.h>
37#include <linux/kernel.h>
38#include <linux/pci.h>
39#include <linux/slab.h>
40#include <linux/stddef.h>
0a7fb11c
YM
41#include <linux/workqueue.h>
42#include <net/ipv6.h>
43#include <linux/bitops.h>
44#include <linux/delay.h>
45#include <linux/errno.h>
46#include <linux/etherdevice.h>
47#include <linux/io.h>
48#include <linux/list.h>
49#include <linux/mutex.h>
50#include <linux/spinlock.h>
51#include <linux/string.h>
52#include <linux/qed/qed_ll2_if.h>
53#include "qed.h"
54#include "qed_cxt.h"
55#include "qed_dev_api.h"
56#include "qed_hsi.h"
57#include "qed_hw.h"
58#include "qed_int.h"
59#include "qed_ll2.h"
60#include "qed_mcp.h"
1d6cff4f 61#include "qed_ooo.h"
0a7fb11c
YM
62#include "qed_reg_addr.h"
63#include "qed_sp.h"
b71b9afd 64#include "qed_rdma.h"
0a7fb11c
YM
65
66#define QED_LL2_RX_REGISTERED(ll2) ((ll2)->rx_queue.b_cb_registred)
67#define QED_LL2_TX_REGISTERED(ll2) ((ll2)->tx_queue.b_cb_registred)
68
69#define QED_LL2_TX_SIZE (256)
70#define QED_LL2_RX_SIZE (4096)
71
72struct qed_cb_ll2_info {
73 int rx_cnt;
74 u32 rx_size;
75 u8 handle;
0a7fb11c
YM
76
77 /* Lock protecting LL2 buffer lists in sleepless context */
78 spinlock_t lock;
79 struct list_head list;
80
81 const struct qed_ll2_cb_ops *cbs;
82 void *cb_cookie;
83};
84
85struct qed_ll2_buffer {
86 struct list_head list;
87 void *data;
88 dma_addr_t phys_addr;
89};
90
0518c12f 91static void qed_ll2b_complete_tx_packet(void *cxt,
0a7fb11c
YM
92 u8 connection_handle,
93 void *cookie,
94 dma_addr_t first_frag_addr,
95 bool b_last_fragment,
96 bool b_last_packet)
97{
0518c12f 98 struct qed_hwfn *p_hwfn = cxt;
0a7fb11c
YM
99 struct qed_dev *cdev = p_hwfn->cdev;
100 struct sk_buff *skb = cookie;
101
102 /* All we need to do is release the mapping */
103 dma_unmap_single(&p_hwfn->cdev->pdev->dev, first_frag_addr,
104 skb_headlen(skb), DMA_TO_DEVICE);
105
106 if (cdev->ll2->cbs && cdev->ll2->cbs->tx_cb)
107 cdev->ll2->cbs->tx_cb(cdev->ll2->cb_cookie, skb,
108 b_last_fragment);
109
0a7fb11c
YM
110 dev_kfree_skb_any(skb);
111}
112
113static int qed_ll2_alloc_buffer(struct qed_dev *cdev,
114 u8 **data, dma_addr_t *phys_addr)
115{
116 *data = kmalloc(cdev->ll2->rx_size, GFP_ATOMIC);
117 if (!(*data)) {
118 DP_INFO(cdev, "Failed to allocate LL2 buffer data\n");
119 return -ENOMEM;
120 }
121
122 *phys_addr = dma_map_single(&cdev->pdev->dev,
123 ((*data) + NET_SKB_PAD),
124 cdev->ll2->rx_size, DMA_FROM_DEVICE);
125 if (dma_mapping_error(&cdev->pdev->dev, *phys_addr)) {
126 DP_INFO(cdev, "Failed to map LL2 buffer data\n");
127 kfree((*data));
128 return -ENOMEM;
129 }
130
131 return 0;
132}
133
134static int qed_ll2_dealloc_buffer(struct qed_dev *cdev,
135 struct qed_ll2_buffer *buffer)
136{
137 spin_lock_bh(&cdev->ll2->lock);
138
139 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
140 cdev->ll2->rx_size, DMA_FROM_DEVICE);
141 kfree(buffer->data);
142 list_del(&buffer->list);
143
144 cdev->ll2->rx_cnt--;
145 if (!cdev->ll2->rx_cnt)
146 DP_INFO(cdev, "All LL2 entries were removed\n");
147
148 spin_unlock_bh(&cdev->ll2->lock);
149
150 return 0;
151}
152
153static void qed_ll2_kill_buffers(struct qed_dev *cdev)
154{
155 struct qed_ll2_buffer *buffer, *tmp_buffer;
156
157 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list)
158 qed_ll2_dealloc_buffer(cdev, buffer);
159}
160
0518c12f 161void qed_ll2b_complete_rx_packet(void *cxt, struct qed_ll2_comp_rx_data *data)
0a7fb11c 162{
0518c12f 163 struct qed_hwfn *p_hwfn = cxt;
68be910c 164 struct qed_ll2_buffer *buffer = data->cookie;
0a7fb11c 165 struct qed_dev *cdev = p_hwfn->cdev;
0a7fb11c
YM
166 dma_addr_t new_phys_addr;
167 struct sk_buff *skb;
168 bool reuse = false;
169 int rc = -EINVAL;
170 u8 *new_data;
171
0a7fb11c
YM
172 DP_VERBOSE(p_hwfn,
173 (NETIF_MSG_RX_STATUS | QED_MSG_STORAGE | NETIF_MSG_PKTDATA),
174 "Got an LL2 Rx completion: [Buffer at phys 0x%llx, offset 0x%02x] Length 0x%04x Parse_flags 0x%04x vlan 0x%04x Opaque data [0x%08x:0x%08x]\n",
68be910c
MY
175 (u64)data->rx_buf_addr,
176 data->u.placement_offset,
177 data->length.packet_length,
178 data->parse_flags,
179 data->vlan, data->opaque_data_0, data->opaque_data_1);
0a7fb11c
YM
180
181 if ((cdev->dp_module & NETIF_MSG_PKTDATA) && buffer->data) {
182 print_hex_dump(KERN_INFO, "",
183 DUMP_PREFIX_OFFSET, 16, 1,
68be910c 184 buffer->data, data->length.packet_length, false);
0a7fb11c
YM
185 }
186
187 /* Determine if data is valid */
68be910c 188 if (data->length.packet_length < ETH_HLEN)
0a7fb11c
YM
189 reuse = true;
190
191 /* Allocate a replacement for buffer; Reuse upon failure */
192 if (!reuse)
193 rc = qed_ll2_alloc_buffer(p_hwfn->cdev, &new_data,
194 &new_phys_addr);
195
196 /* If need to reuse or there's no replacement buffer, repost this */
197 if (rc)
198 goto out_post;
752ecb2d
MY
199 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
200 cdev->ll2->rx_size, DMA_FROM_DEVICE);
0a7fb11c
YM
201
202 skb = build_skb(buffer->data, 0);
203 if (!skb) {
204 rc = -ENOMEM;
205 goto out_post;
206 }
207
68be910c
MY
208 data->u.placement_offset += NET_SKB_PAD;
209 skb_reserve(skb, data->u.placement_offset);
210 skb_put(skb, data->length.packet_length);
0a7fb11c
YM
211 skb_checksum_none_assert(skb);
212
213 /* Get parital ethernet information instead of eth_type_trans(),
214 * Since we don't have an associated net_device.
215 */
216 skb_reset_mac_header(skb);
217 skb->protocol = eth_hdr(skb)->h_proto;
218
219 /* Pass SKB onward */
220 if (cdev->ll2->cbs && cdev->ll2->cbs->rx_cb) {
68be910c
MY
221 if (data->vlan)
222 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
223 data->vlan);
0a7fb11c 224 cdev->ll2->cbs->rx_cb(cdev->ll2->cb_cookie, skb,
68be910c
MY
225 data->opaque_data_0,
226 data->opaque_data_1);
0a7fb11c
YM
227 }
228
229 /* Update Buffer information and update FW producer */
230 buffer->data = new_data;
231 buffer->phys_addr = new_phys_addr;
232
233out_post:
234 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev), cdev->ll2->handle,
235 buffer->phys_addr, 0, buffer, 1);
236
237 if (rc)
238 qed_ll2_dealloc_buffer(cdev, buffer);
239}
240
241static struct qed_ll2_info *__qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
242 u8 connection_handle,
243 bool b_lock,
244 bool b_only_active)
245{
246 struct qed_ll2_info *p_ll2_conn, *p_ret = NULL;
247
248 if (connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS)
249 return NULL;
250
251 if (!p_hwfn->p_ll2_info)
252 return NULL;
253
254 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
255
256 if (b_only_active) {
257 if (b_lock)
258 mutex_lock(&p_ll2_conn->mutex);
259 if (p_ll2_conn->b_active)
260 p_ret = p_ll2_conn;
261 if (b_lock)
262 mutex_unlock(&p_ll2_conn->mutex);
263 } else {
264 p_ret = p_ll2_conn;
265 }
266
267 return p_ret;
268}
269
270static struct qed_ll2_info *qed_ll2_handle_sanity(struct qed_hwfn *p_hwfn,
271 u8 connection_handle)
272{
273 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, true);
274}
275
276static struct qed_ll2_info *qed_ll2_handle_sanity_lock(struct qed_hwfn *p_hwfn,
277 u8 connection_handle)
278{
279 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, true, true);
280}
281
282static struct qed_ll2_info *qed_ll2_handle_sanity_inactive(struct qed_hwfn
283 *p_hwfn,
284 u8 connection_handle)
285{
286 return __qed_ll2_handle_sanity(p_hwfn, connection_handle, false, false);
287}
288
289static void qed_ll2_txq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
290{
291 bool b_last_packet = false, b_last_frag = false;
292 struct qed_ll2_tx_packet *p_pkt = NULL;
293 struct qed_ll2_info *p_ll2_conn;
294 struct qed_ll2_tx_queue *p_tx;
abd49676 295 dma_addr_t tx_frag;
0a7fb11c
YM
296
297 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
298 if (!p_ll2_conn)
299 return;
300
301 p_tx = &p_ll2_conn->tx_queue;
302
303 while (!list_empty(&p_tx->active_descq)) {
304 p_pkt = list_first_entry(&p_tx->active_descq,
305 struct qed_ll2_tx_packet, list_entry);
306 if (!p_pkt)
307 break;
308
309 list_del(&p_pkt->list_entry);
310 b_last_packet = list_empty(&p_tx->active_descq);
311 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
526d1d05 312 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) {
1d6cff4f 313 struct qed_ooo_buffer *p_buffer;
0a7fb11c 314
1d6cff4f
YM
315 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
316 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
317 p_buffer);
318 } else {
319 p_tx->cur_completing_packet = *p_pkt;
320 p_tx->cur_completing_bd_idx = 1;
321 b_last_frag =
322 p_tx->cur_completing_bd_idx == p_pkt->bd_used;
323 tx_frag = p_pkt->bds_set[0].tx_frag;
0518c12f
MK
324 p_ll2_conn->cbs.tx_release_cb(p_ll2_conn->cbs.cookie,
325 p_ll2_conn->my_id,
326 p_pkt->cookie,
327 tx_frag,
328 b_last_frag,
329 b_last_packet);
1d6cff4f 330 }
0a7fb11c
YM
331 }
332}
333
334static int qed_ll2_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
335{
336 struct qed_ll2_info *p_ll2_conn = p_cookie;
337 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
338 u16 new_idx = 0, num_bds = 0, num_bds_in_packet = 0;
339 struct qed_ll2_tx_packet *p_pkt;
340 bool b_last_frag = false;
341 unsigned long flags;
342 int rc = -EINVAL;
343
344 spin_lock_irqsave(&p_tx->lock, flags);
345 if (p_tx->b_completing_packet) {
346 rc = -EBUSY;
347 goto out;
348 }
349
350 new_idx = le16_to_cpu(*p_tx->p_fw_cons);
351 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
352 while (num_bds) {
353 if (list_empty(&p_tx->active_descq))
354 goto out;
355
356 p_pkt = list_first_entry(&p_tx->active_descq,
357 struct qed_ll2_tx_packet, list_entry);
358 if (!p_pkt)
359 goto out;
360
361 p_tx->b_completing_packet = true;
362 p_tx->cur_completing_packet = *p_pkt;
363 num_bds_in_packet = p_pkt->bd_used;
364 list_del(&p_pkt->list_entry);
365
366 if (num_bds < num_bds_in_packet) {
367 DP_NOTICE(p_hwfn,
368 "Rest of BDs does not cover whole packet\n");
369 goto out;
370 }
371
372 num_bds -= num_bds_in_packet;
373 p_tx->bds_idx += num_bds_in_packet;
374 while (num_bds_in_packet--)
375 qed_chain_consume(&p_tx->txq_chain);
376
377 p_tx->cur_completing_bd_idx = 1;
378 b_last_frag = p_tx->cur_completing_bd_idx == p_pkt->bd_used;
379 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
380
381 spin_unlock_irqrestore(&p_tx->lock, flags);
0518c12f
MK
382
383 p_ll2_conn->cbs.tx_comp_cb(p_ll2_conn->cbs.cookie,
384 p_ll2_conn->my_id,
385 p_pkt->cookie,
386 p_pkt->bds_set[0].tx_frag,
387 b_last_frag, !num_bds);
388
0a7fb11c
YM
389 spin_lock_irqsave(&p_tx->lock, flags);
390 }
391
392 p_tx->b_completing_packet = false;
393 rc = 0;
394out:
395 spin_unlock_irqrestore(&p_tx->lock, flags);
396 return rc;
397}
398
0518c12f
MK
399static void qed_ll2_rxq_parse_gsi(struct qed_hwfn *p_hwfn,
400 union core_rx_cqe_union *p_cqe,
401 struct qed_ll2_comp_rx_data *data)
abd49676 402{
0518c12f
MK
403 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_gsi.parse_flags.flags);
404 data->length.data_length = le16_to_cpu(p_cqe->rx_cqe_gsi.data_length);
405 data->vlan = le16_to_cpu(p_cqe->rx_cqe_gsi.vlan);
406 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrhi);
407 data->opaque_data_1 = le16_to_cpu(p_cqe->rx_cqe_gsi.src_mac_addrlo);
408 data->u.data_length_error = p_cqe->rx_cqe_gsi.data_length_error;
abd49676
RA
409}
410
68be910c
MY
411static void qed_ll2_rxq_parse_reg(struct qed_hwfn *p_hwfn,
412 union core_rx_cqe_union *p_cqe,
413 struct qed_ll2_comp_rx_data *data)
414{
415 data->parse_flags = le16_to_cpu(p_cqe->rx_cqe_fp.parse_flags.flags);
1e99c497 416 data->err_flags = le16_to_cpu(p_cqe->rx_cqe_fp.err_flags.flags);
68be910c
MY
417 data->length.packet_length =
418 le16_to_cpu(p_cqe->rx_cqe_fp.packet_length);
419 data->vlan = le16_to_cpu(p_cqe->rx_cqe_fp.vlan);
420 data->opaque_data_0 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[0]);
421 data->opaque_data_1 = le32_to_cpu(p_cqe->rx_cqe_fp.opaque_data.data[1]);
422 data->u.placement_offset = p_cqe->rx_cqe_fp.placement_offset;
423}
424
425static int
426qed_ll2_rxq_handle_completion(struct qed_hwfn *p_hwfn,
427 struct qed_ll2_info *p_ll2_conn,
428 union core_rx_cqe_union *p_cqe,
429 unsigned long *p_lock_flags, bool b_last_cqe)
0a7fb11c
YM
430{
431 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
432 struct qed_ll2_rx_packet *p_pkt = NULL;
68be910c 433 struct qed_ll2_comp_rx_data data;
0a7fb11c
YM
434
435 if (!list_empty(&p_rx->active_descq))
436 p_pkt = list_first_entry(&p_rx->active_descq,
437 struct qed_ll2_rx_packet, list_entry);
438 if (!p_pkt) {
439 DP_NOTICE(p_hwfn,
68be910c 440 "[%d] LL2 Rx completion but active_descq is empty\n",
13c54771 441 p_ll2_conn->input.conn_type);
68be910c 442
0a7fb11c
YM
443 return -EIO;
444 }
445 list_del(&p_pkt->list_entry);
446
0518c12f
MK
447 if (p_cqe->rx_cqe_sp.type == CORE_RX_CQE_TYPE_REGULAR)
448 qed_ll2_rxq_parse_reg(p_hwfn, p_cqe, &data);
449 else
450 qed_ll2_rxq_parse_gsi(p_hwfn, p_cqe, &data);
0a7fb11c
YM
451 if (qed_chain_consume(&p_rx->rxq_chain) != p_pkt->rxq_bd)
452 DP_NOTICE(p_hwfn,
453 "Mismatch between active_descq and the LL2 Rx chain\n");
68be910c 454
0a7fb11c
YM
455 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
456
68be910c
MY
457 data.connection_handle = p_ll2_conn->my_id;
458 data.cookie = p_pkt->cookie;
459 data.rx_buf_addr = p_pkt->rx_buf_addr;
460 data.b_last_packet = b_last_cqe;
461
1df2aded 462 spin_unlock_irqrestore(&p_rx->lock, *p_lock_flags);
0518c12f
MK
463 p_ll2_conn->cbs.rx_comp_cb(p_ll2_conn->cbs.cookie, &data);
464
1df2aded 465 spin_lock_irqsave(&p_rx->lock, *p_lock_flags);
0a7fb11c
YM
466
467 return 0;
468}
469
470static int qed_ll2_rxq_completion(struct qed_hwfn *p_hwfn, void *cookie)
471{
13c54771 472 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)cookie;
0a7fb11c
YM
473 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
474 union core_rx_cqe_union *cqe = NULL;
475 u16 cq_new_idx = 0, cq_old_idx = 0;
476 unsigned long flags = 0;
477 int rc = 0;
478
479 spin_lock_irqsave(&p_rx->lock, flags);
480 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
481 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
482
483 while (cq_new_idx != cq_old_idx) {
484 bool b_last_cqe = (cq_new_idx == cq_old_idx);
485
13c54771
MY
486 cqe =
487 (union core_rx_cqe_union *)
488 qed_chain_consume(&p_rx->rcq_chain);
0a7fb11c
YM
489 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
490
491 DP_VERBOSE(p_hwfn,
492 QED_MSG_LL2,
493 "LL2 [sw. cons %04x, fw. at %04x] - Got Packet of type %02x\n",
494 cq_old_idx, cq_new_idx, cqe->rx_cqe_sp.type);
495
496 switch (cqe->rx_cqe_sp.type) {
497 case CORE_RX_CQE_TYPE_SLOW_PATH:
498 DP_NOTICE(p_hwfn, "LL2 - unexpected Rx CQE slowpath\n");
499 rc = -EINVAL;
500 break;
abd49676 501 case CORE_RX_CQE_TYPE_GSI_OFFLOAD:
0a7fb11c 502 case CORE_RX_CQE_TYPE_REGULAR:
68be910c
MY
503 rc = qed_ll2_rxq_handle_completion(p_hwfn, p_ll2_conn,
504 cqe, &flags,
505 b_last_cqe);
0a7fb11c
YM
506 break;
507 default:
508 rc = -EIO;
509 }
510 }
511
512 spin_unlock_irqrestore(&p_rx->lock, flags);
513 return rc;
514}
515
8c93beaf 516static void qed_ll2_rxq_flush(struct qed_hwfn *p_hwfn, u8 connection_handle)
0a7fb11c
YM
517{
518 struct qed_ll2_info *p_ll2_conn = NULL;
519 struct qed_ll2_rx_packet *p_pkt = NULL;
520 struct qed_ll2_rx_queue *p_rx;
521
522 p_ll2_conn = qed_ll2_handle_sanity_inactive(p_hwfn, connection_handle);
523 if (!p_ll2_conn)
524 return;
525
526 p_rx = &p_ll2_conn->rx_queue;
527
528 while (!list_empty(&p_rx->active_descq)) {
0a7fb11c
YM
529 p_pkt = list_first_entry(&p_rx->active_descq,
530 struct qed_ll2_rx_packet, list_entry);
531 if (!p_pkt)
532 break;
533
b4f0fd4b 534 list_move_tail(&p_pkt->list_entry, &p_rx->free_descq);
0a7fb11c 535
526d1d05 536 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO) {
1d6cff4f
YM
537 struct qed_ooo_buffer *p_buffer;
538
539 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
540 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
541 p_buffer);
542 } else {
54f19f07
MY
543 dma_addr_t rx_buf_addr = p_pkt->rx_buf_addr;
544 void *cookie = p_pkt->cookie;
545 bool b_last;
1d6cff4f
YM
546
547 b_last = list_empty(&p_rx->active_descq);
54f19f07
MY
548 p_ll2_conn->cbs.rx_release_cb(p_ll2_conn->cbs.cookie,
549 p_ll2_conn->my_id,
550 cookie,
551 rx_buf_addr, b_last);
1d6cff4f
YM
552 }
553 }
554}
555
1d6cff4f
YM
556static u8 qed_ll2_convert_rx_parse_to_tx_flags(u16 parse_flags)
557{
558 u8 bd_flags = 0;
559
560 if (GET_FIELD(parse_flags, PARSING_AND_ERR_FLAGS_TAG8021QEXIST))
be086e7c 561 SET_FIELD(bd_flags, CORE_TX_BD_DATA_VLAN_INSERTION, 1);
1d6cff4f
YM
562
563 return bd_flags;
564}
565
566static int qed_ll2_lb_rxq_handler(struct qed_hwfn *p_hwfn,
567 struct qed_ll2_info *p_ll2_conn)
568{
569 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
570 u16 packet_length = 0, parse_flags = 0, vlan = 0;
571 struct qed_ll2_rx_packet *p_pkt = NULL;
572 u32 num_ooo_add_to_peninsula = 0, cid;
573 union core_rx_cqe_union *cqe = NULL;
574 u16 cq_new_idx = 0, cq_old_idx = 0;
575 struct qed_ooo_buffer *p_buffer;
576 struct ooo_opaque *iscsi_ooo;
577 u8 placement_offset = 0;
578 u8 cqe_type;
579
580 cq_new_idx = le16_to_cpu(*p_rx->p_fw_cons);
581 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
582 if (cq_new_idx == cq_old_idx)
583 return 0;
584
585 while (cq_new_idx != cq_old_idx) {
586 struct core_rx_fast_path_cqe *p_cqe_fp;
587
588 cqe = qed_chain_consume(&p_rx->rcq_chain);
589 cq_old_idx = qed_chain_get_cons_idx(&p_rx->rcq_chain);
590 cqe_type = cqe->rx_cqe_sp.type;
591
592 if (cqe_type != CORE_RX_CQE_TYPE_REGULAR) {
593 DP_NOTICE(p_hwfn,
594 "Got a non-regular LB LL2 completion [type 0x%02x]\n",
595 cqe_type);
596 return -EINVAL;
597 }
598 p_cqe_fp = &cqe->rx_cqe_fp;
599
600 placement_offset = p_cqe_fp->placement_offset;
601 parse_flags = le16_to_cpu(p_cqe_fp->parse_flags.flags);
602 packet_length = le16_to_cpu(p_cqe_fp->packet_length);
603 vlan = le16_to_cpu(p_cqe_fp->vlan);
604 iscsi_ooo = (struct ooo_opaque *)&p_cqe_fp->opaque_data;
605 qed_ooo_save_history_entry(p_hwfn, p_hwfn->p_ooo_info,
606 iscsi_ooo);
607 cid = le32_to_cpu(iscsi_ooo->cid);
608
609 /* Process delete isle first */
610 if (iscsi_ooo->drop_size)
611 qed_ooo_delete_isles(p_hwfn, p_hwfn->p_ooo_info, cid,
612 iscsi_ooo->drop_isle,
613 iscsi_ooo->drop_size);
614
615 if (iscsi_ooo->ooo_opcode == TCP_EVENT_NOP)
616 continue;
617
618 /* Now process create/add/join isles */
619 if (list_empty(&p_rx->active_descq)) {
620 DP_NOTICE(p_hwfn,
621 "LL2 OOO RX chain has no submitted buffers\n"
622 );
623 return -EIO;
624 }
625
626 p_pkt = list_first_entry(&p_rx->active_descq,
627 struct qed_ll2_rx_packet, list_entry);
628
629 if ((iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_NEW_ISLE) ||
630 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_RIGHT) ||
631 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_ISLE_LEFT) ||
632 (iscsi_ooo->ooo_opcode == TCP_EVENT_ADD_PEN) ||
633 (iscsi_ooo->ooo_opcode == TCP_EVENT_JOIN)) {
634 if (!p_pkt) {
635 DP_NOTICE(p_hwfn,
636 "LL2 OOO RX packet is not valid\n");
637 return -EIO;
638 }
639 list_del(&p_pkt->list_entry);
640 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
641 p_buffer->packet_length = packet_length;
642 p_buffer->parse_flags = parse_flags;
643 p_buffer->vlan = vlan;
644 p_buffer->placement_offset = placement_offset;
645 qed_chain_consume(&p_rx->rxq_chain);
646 list_add_tail(&p_pkt->list_entry, &p_rx->free_descq);
647
648 switch (iscsi_ooo->ooo_opcode) {
649 case TCP_EVENT_ADD_NEW_ISLE:
650 qed_ooo_add_new_isle(p_hwfn,
651 p_hwfn->p_ooo_info,
652 cid,
653 iscsi_ooo->ooo_isle,
654 p_buffer);
655 break;
656 case TCP_EVENT_ADD_ISLE_RIGHT:
657 qed_ooo_add_new_buffer(p_hwfn,
658 p_hwfn->p_ooo_info,
659 cid,
660 iscsi_ooo->ooo_isle,
661 p_buffer,
662 QED_OOO_RIGHT_BUF);
663 break;
664 case TCP_EVENT_ADD_ISLE_LEFT:
665 qed_ooo_add_new_buffer(p_hwfn,
666 p_hwfn->p_ooo_info,
667 cid,
668 iscsi_ooo->ooo_isle,
669 p_buffer,
670 QED_OOO_LEFT_BUF);
671 break;
672 case TCP_EVENT_JOIN:
673 qed_ooo_add_new_buffer(p_hwfn,
674 p_hwfn->p_ooo_info,
675 cid,
676 iscsi_ooo->ooo_isle +
677 1,
678 p_buffer,
679 QED_OOO_LEFT_BUF);
680 qed_ooo_join_isles(p_hwfn,
681 p_hwfn->p_ooo_info,
682 cid, iscsi_ooo->ooo_isle);
683 break;
684 case TCP_EVENT_ADD_PEN:
685 num_ooo_add_to_peninsula++;
686 qed_ooo_put_ready_buffer(p_hwfn,
687 p_hwfn->p_ooo_info,
688 p_buffer, true);
689 break;
690 }
691 } else {
692 DP_NOTICE(p_hwfn,
693 "Unexpected event (%d) TX OOO completion\n",
694 iscsi_ooo->ooo_opcode);
695 }
696 }
697
698 return 0;
699}
700
701static void
702qed_ooo_submit_tx_buffers(struct qed_hwfn *p_hwfn,
703 struct qed_ll2_info *p_ll2_conn)
704{
7c7973b2 705 struct qed_ll2_tx_pkt_info tx_pkt;
1d6cff4f 706 struct qed_ooo_buffer *p_buffer;
1d6cff4f
YM
707 u16 l4_hdr_offset_w;
708 dma_addr_t first_frag;
709 u16 parse_flags;
710 u8 bd_flags;
7c7973b2 711 int rc;
1d6cff4f
YM
712
713 /* Submit Tx buffers here */
714 while ((p_buffer = qed_ooo_get_ready_buffer(p_hwfn,
715 p_hwfn->p_ooo_info))) {
716 l4_hdr_offset_w = 0;
717 bd_flags = 0;
718
719 first_frag = p_buffer->rx_buffer_phys_addr +
720 p_buffer->placement_offset;
721 parse_flags = p_buffer->parse_flags;
722 bd_flags = qed_ll2_convert_rx_parse_to_tx_flags(parse_flags);
be086e7c
MY
723 SET_FIELD(bd_flags, CORE_TX_BD_DATA_FORCE_VLAN_MODE, 1);
724 SET_FIELD(bd_flags, CORE_TX_BD_DATA_L4_PROTOCOL, 1);
1d6cff4f 725
7c7973b2
MY
726 memset(&tx_pkt, 0, sizeof(tx_pkt));
727 tx_pkt.num_of_bds = 1;
728 tx_pkt.vlan = p_buffer->vlan;
729 tx_pkt.bd_flags = bd_flags;
730 tx_pkt.l4_hdr_offset_w = l4_hdr_offset_w;
13c54771 731 tx_pkt.tx_dest = p_ll2_conn->tx_dest;
7c7973b2
MY
732 tx_pkt.first_frag = first_frag;
733 tx_pkt.first_frag_len = p_buffer->packet_length;
734 tx_pkt.cookie = p_buffer;
735
736 rc = qed_ll2_prepare_tx_packet(p_hwfn, p_ll2_conn->my_id,
737 &tx_pkt, true);
1d6cff4f
YM
738 if (rc) {
739 qed_ooo_put_ready_buffer(p_hwfn, p_hwfn->p_ooo_info,
740 p_buffer, false);
741 break;
742 }
743 }
744}
745
746static void
747qed_ooo_submit_rx_buffers(struct qed_hwfn *p_hwfn,
748 struct qed_ll2_info *p_ll2_conn)
749{
750 struct qed_ooo_buffer *p_buffer;
751 int rc;
752
753 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
754 p_hwfn->p_ooo_info))) {
755 rc = qed_ll2_post_rx_buffer(p_hwfn,
756 p_ll2_conn->my_id,
757 p_buffer->rx_buffer_phys_addr,
758 0, p_buffer, true);
759 if (rc) {
760 qed_ooo_put_free_buffer(p_hwfn,
761 p_hwfn->p_ooo_info, p_buffer);
762 break;
763 }
764 }
765}
766
767static int qed_ll2_lb_rxq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
768{
769 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
770 int rc;
771
772 rc = qed_ll2_lb_rxq_handler(p_hwfn, p_ll2_conn);
773 if (rc)
774 return rc;
775
776 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
777 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
778
779 return 0;
780}
781
782static int qed_ll2_lb_txq_completion(struct qed_hwfn *p_hwfn, void *p_cookie)
783{
784 struct qed_ll2_info *p_ll2_conn = (struct qed_ll2_info *)p_cookie;
785 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
786 struct qed_ll2_tx_packet *p_pkt = NULL;
787 struct qed_ooo_buffer *p_buffer;
788 bool b_dont_submit_rx = false;
789 u16 new_idx = 0, num_bds = 0;
790 int rc;
791
792 new_idx = le16_to_cpu(*p_tx->p_fw_cons);
793 num_bds = ((s16)new_idx - (s16)p_tx->bds_idx);
794
795 if (!num_bds)
796 return 0;
797
798 while (num_bds) {
799 if (list_empty(&p_tx->active_descq))
800 return -EINVAL;
801
802 p_pkt = list_first_entry(&p_tx->active_descq,
803 struct qed_ll2_tx_packet, list_entry);
804 if (!p_pkt)
805 return -EINVAL;
806
807 if (p_pkt->bd_used != 1) {
808 DP_NOTICE(p_hwfn,
809 "Unexpectedly many BDs(%d) in TX OOO completion\n",
810 p_pkt->bd_used);
811 return -EINVAL;
812 }
813
814 list_del(&p_pkt->list_entry);
815
816 num_bds--;
817 p_tx->bds_idx++;
818 qed_chain_consume(&p_tx->txq_chain);
819
820 p_buffer = (struct qed_ooo_buffer *)p_pkt->cookie;
821 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
822
823 if (b_dont_submit_rx) {
824 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info,
825 p_buffer);
826 continue;
827 }
828
829 rc = qed_ll2_post_rx_buffer(p_hwfn, p_ll2_conn->my_id,
830 p_buffer->rx_buffer_phys_addr, 0,
831 p_buffer, true);
832 if (rc != 0) {
833 qed_ooo_put_free_buffer(p_hwfn,
834 p_hwfn->p_ooo_info, p_buffer);
835 b_dont_submit_rx = true;
836 }
837 }
838
839 qed_ooo_submit_tx_buffers(p_hwfn, p_ll2_conn);
840
841 return 0;
842}
843
1d6cff4f
YM
844static void qed_ll2_stop_ooo(struct qed_dev *cdev)
845{
846 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
847 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
848
849 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Stopping LL2 OOO queue [%02x]\n",
850 *handle);
851
852 qed_ll2_terminate_connection(hwfn, *handle);
853 qed_ll2_release_connection(hwfn, *handle);
854 *handle = QED_LL2_UNUSED_HANDLE;
855}
856
0a7fb11c
YM
857static int qed_sp_ll2_rx_queue_start(struct qed_hwfn *p_hwfn,
858 struct qed_ll2_info *p_ll2_conn,
859 u8 action_on_error)
860{
13c54771 861 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
0a7fb11c
YM
862 struct qed_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
863 struct core_rx_start_ramrod_data *p_ramrod = NULL;
864 struct qed_spq_entry *p_ent = NULL;
865 struct qed_sp_init_data init_data;
866 u16 cqe_pbl_size;
867 int rc = 0;
868
869 /* Get SPQ entry */
870 memset(&init_data, 0, sizeof(init_data));
871 init_data.cid = p_ll2_conn->cid;
872 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
873 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
874
875 rc = qed_sp_init_request(p_hwfn, &p_ent,
876 CORE_RAMROD_RX_QUEUE_START,
877 PROTOCOLID_CORE, &init_data);
878 if (rc)
879 return rc;
880
881 p_ramrod = &p_ent->ramrod.core_rx_queue_start;
882
883 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
884 p_ramrod->sb_index = p_rx->rx_sb_index;
885 p_ramrod->complete_event_flg = 1;
886
13c54771
MY
887 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
888 DMA_REGPAIR_LE(p_ramrod->bd_base, p_rx->rxq_chain.p_phys_addr);
0a7fb11c
YM
889 cqe_pbl_size = (u16)qed_chain_get_page_cnt(&p_rx->rcq_chain);
890 p_ramrod->num_of_pbl_pages = cpu_to_le16(cqe_pbl_size);
891 DMA_REGPAIR_LE(p_ramrod->cqe_pbl_addr,
892 qed_chain_get_pbl_phys(&p_rx->rcq_chain));
893
13c54771
MY
894 p_ramrod->drop_ttl0_flg = p_ll2_conn->input.rx_drop_ttl0_flg;
895 p_ramrod->inner_vlan_removal_en = p_ll2_conn->input.rx_vlan_removal_en;
0a7fb11c 896 p_ramrod->queue_id = p_ll2_conn->queue_id;
ed468ebe 897 p_ramrod->main_func_queue = p_ll2_conn->main_func_queue ? 1 : 0;
0a7fb11c
YM
898
899 if ((IS_MF_DEFAULT(p_hwfn) || IS_MF_SI(p_hwfn)) &&
cc4ad324
KM
900 p_ramrod->main_func_queue && (conn_type != QED_LL2_TYPE_ROCE) &&
901 (conn_type != QED_LL2_TYPE_IWARP)) {
0a7fb11c
YM
902 p_ramrod->mf_si_bcast_accept_all = 1;
903 p_ramrod->mf_si_mcast_accept_all = 1;
904 } else {
905 p_ramrod->mf_si_bcast_accept_all = 0;
906 p_ramrod->mf_si_mcast_accept_all = 0;
907 }
908
909 p_ramrod->action_on_error.error_type = action_on_error;
13c54771 910 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
0a7fb11c
YM
911 return qed_spq_post(p_hwfn, p_ent, NULL);
912}
913
914static int qed_sp_ll2_tx_queue_start(struct qed_hwfn *p_hwfn,
915 struct qed_ll2_info *p_ll2_conn)
916{
13c54771 917 enum qed_ll2_conn_type conn_type = p_ll2_conn->input.conn_type;
0a7fb11c
YM
918 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
919 struct core_tx_start_ramrod_data *p_ramrod = NULL;
920 struct qed_spq_entry *p_ent = NULL;
921 struct qed_sp_init_data init_data;
0a7fb11c
YM
922 u16 pq_id = 0, pbl_size;
923 int rc = -EINVAL;
924
925 if (!QED_LL2_TX_REGISTERED(p_ll2_conn))
926 return 0;
927
526d1d05 928 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO)
1d6cff4f
YM
929 p_ll2_conn->tx_stats_en = 0;
930 else
931 p_ll2_conn->tx_stats_en = 1;
932
0a7fb11c
YM
933 /* Get SPQ entry */
934 memset(&init_data, 0, sizeof(init_data));
935 init_data.cid = p_ll2_conn->cid;
936 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
937 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
938
939 rc = qed_sp_init_request(p_hwfn, &p_ent,
940 CORE_RAMROD_TX_QUEUE_START,
941 PROTOCOLID_CORE, &init_data);
942 if (rc)
943 return rc;
944
945 p_ramrod = &p_ent->ramrod.core_tx_queue_start;
946
947 p_ramrod->sb_id = cpu_to_le16(qed_int_get_sp_sb_id(p_hwfn));
948 p_ramrod->sb_index = p_tx->tx_sb_index;
13c54771 949 p_ramrod->mtu = cpu_to_le16(p_ll2_conn->input.mtu);
0a7fb11c
YM
950 p_ramrod->stats_en = p_ll2_conn->tx_stats_en;
951 p_ramrod->stats_id = p_ll2_conn->tx_stats_id;
952
953 DMA_REGPAIR_LE(p_ramrod->pbl_base_addr,
954 qed_chain_get_pbl_phys(&p_tx->txq_chain));
955 pbl_size = qed_chain_get_page_cnt(&p_tx->txq_chain);
956 p_ramrod->pbl_size = cpu_to_le16(pbl_size);
957
13c54771 958 switch (p_ll2_conn->input.tx_tc) {
526d1d05 959 case PURE_LB_TC:
b5a9ee7c
AE
960 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_LB);
961 break;
526d1d05 962 case PKT_LB_TC:
b5a9ee7c 963 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OOO);
827d240a 964 break;
b5a9ee7c
AE
965 default:
966 pq_id = qed_get_cm_pq_idx(p_hwfn, PQ_FLAGS_OFLD);
967 break;
968 }
969
0a7fb11c
YM
970 p_ramrod->qm_pq_id = cpu_to_le16(pq_id);
971
972 switch (conn_type) {
1e128c81
AE
973 case QED_LL2_TYPE_FCOE:
974 p_ramrod->conn_type = PROTOCOLID_FCOE;
975 break;
0a7fb11c 976 case QED_LL2_TYPE_ISCSI:
0a7fb11c
YM
977 p_ramrod->conn_type = PROTOCOLID_ISCSI;
978 break;
979 case QED_LL2_TYPE_ROCE:
980 p_ramrod->conn_type = PROTOCOLID_ROCE;
981 break;
cc4ad324
KM
982 case QED_LL2_TYPE_IWARP:
983 p_ramrod->conn_type = PROTOCOLID_IWARP;
984 break;
985 case QED_LL2_TYPE_OOO:
986 if (p_hwfn->hw_info.personality == QED_PCI_ISCSI)
987 p_ramrod->conn_type = PROTOCOLID_ISCSI;
988 else
989 p_ramrod->conn_type = PROTOCOLID_IWARP;
990 break;
0a7fb11c
YM
991 default:
992 p_ramrod->conn_type = PROTOCOLID_ETH;
993 DP_NOTICE(p_hwfn, "Unknown connection type: %d\n", conn_type);
994 }
995
13c54771
MY
996 p_ramrod->gsi_offload_flag = p_ll2_conn->input.gsi_enable;
997
0a7fb11c
YM
998 return qed_spq_post(p_hwfn, p_ent, NULL);
999}
1000
1001static int qed_sp_ll2_rx_queue_stop(struct qed_hwfn *p_hwfn,
1002 struct qed_ll2_info *p_ll2_conn)
1003{
1004 struct core_rx_stop_ramrod_data *p_ramrod = NULL;
1005 struct qed_spq_entry *p_ent = NULL;
1006 struct qed_sp_init_data init_data;
1007 int rc = -EINVAL;
1008
1009 /* Get SPQ entry */
1010 memset(&init_data, 0, sizeof(init_data));
1011 init_data.cid = p_ll2_conn->cid;
1012 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1013 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1014
1015 rc = qed_sp_init_request(p_hwfn, &p_ent,
1016 CORE_RAMROD_RX_QUEUE_STOP,
1017 PROTOCOLID_CORE, &init_data);
1018 if (rc)
1019 return rc;
1020
1021 p_ramrod = &p_ent->ramrod.core_rx_queue_stop;
1022
1023 p_ramrod->complete_event_flg = 1;
1024 p_ramrod->queue_id = p_ll2_conn->queue_id;
1025
1026 return qed_spq_post(p_hwfn, p_ent, NULL);
1027}
1028
1029static int qed_sp_ll2_tx_queue_stop(struct qed_hwfn *p_hwfn,
1030 struct qed_ll2_info *p_ll2_conn)
1031{
1032 struct qed_spq_entry *p_ent = NULL;
1033 struct qed_sp_init_data init_data;
1034 int rc = -EINVAL;
1035
1036 /* Get SPQ entry */
1037 memset(&init_data, 0, sizeof(init_data));
1038 init_data.cid = p_ll2_conn->cid;
1039 init_data.opaque_fid = p_hwfn->hw_info.opaque_fid;
1040 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
1041
1042 rc = qed_sp_init_request(p_hwfn, &p_ent,
1043 CORE_RAMROD_TX_QUEUE_STOP,
1044 PROTOCOLID_CORE, &init_data);
1045 if (rc)
1046 return rc;
1047
1048 return qed_spq_post(p_hwfn, p_ent, NULL);
1049}
1050
1051static int
1052qed_ll2_acquire_connection_rx(struct qed_hwfn *p_hwfn,
13c54771 1053 struct qed_ll2_info *p_ll2_info)
0a7fb11c
YM
1054{
1055 struct qed_ll2_rx_packet *p_descq;
1056 u32 capacity;
1057 int rc = 0;
1058
13c54771 1059 if (!p_ll2_info->input.rx_num_desc)
0a7fb11c
YM
1060 goto out;
1061
1062 rc = qed_chain_alloc(p_hwfn->cdev,
1063 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1064 QED_CHAIN_MODE_NEXT_PTR,
1065 QED_CHAIN_CNT_TYPE_U16,
13c54771 1066 p_ll2_info->input.rx_num_desc,
0a7fb11c 1067 sizeof(struct core_rx_bd),
1a4a6975 1068 &p_ll2_info->rx_queue.rxq_chain, NULL);
0a7fb11c
YM
1069 if (rc) {
1070 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rxq chain\n");
1071 goto out;
1072 }
1073
1074 capacity = qed_chain_get_capacity(&p_ll2_info->rx_queue.rxq_chain);
1075 p_descq = kcalloc(capacity, sizeof(struct qed_ll2_rx_packet),
1076 GFP_KERNEL);
1077 if (!p_descq) {
1078 rc = -ENOMEM;
1079 DP_NOTICE(p_hwfn, "Failed to allocate ll2 Rx desc\n");
1080 goto out;
1081 }
1082 p_ll2_info->rx_queue.descq_array = p_descq;
1083
1084 rc = qed_chain_alloc(p_hwfn->cdev,
1085 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1086 QED_CHAIN_MODE_PBL,
1087 QED_CHAIN_CNT_TYPE_U16,
13c54771 1088 p_ll2_info->input.rx_num_desc,
0a7fb11c 1089 sizeof(struct core_rx_fast_path_cqe),
1a4a6975 1090 &p_ll2_info->rx_queue.rcq_chain, NULL);
0a7fb11c
YM
1091 if (rc) {
1092 DP_NOTICE(p_hwfn, "Failed to allocate ll2 rcq chain\n");
1093 goto out;
1094 }
1095
1096 DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1097 "Allocated LL2 Rxq [Type %08x] with 0x%08x buffers\n",
13c54771 1098 p_ll2_info->input.conn_type, p_ll2_info->input.rx_num_desc);
0a7fb11c
YM
1099
1100out:
1101 return rc;
1102}
1103
1104static int qed_ll2_acquire_connection_tx(struct qed_hwfn *p_hwfn,
13c54771 1105 struct qed_ll2_info *p_ll2_info)
0a7fb11c
YM
1106{
1107 struct qed_ll2_tx_packet *p_descq;
f5823fe6 1108 u32 desc_size;
0a7fb11c
YM
1109 u32 capacity;
1110 int rc = 0;
1111
13c54771 1112 if (!p_ll2_info->input.tx_num_desc)
0a7fb11c
YM
1113 goto out;
1114
1115 rc = qed_chain_alloc(p_hwfn->cdev,
1116 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1117 QED_CHAIN_MODE_PBL,
1118 QED_CHAIN_CNT_TYPE_U16,
13c54771 1119 p_ll2_info->input.tx_num_desc,
0a7fb11c 1120 sizeof(struct core_tx_bd),
1a4a6975 1121 &p_ll2_info->tx_queue.txq_chain, NULL);
0a7fb11c
YM
1122 if (rc)
1123 goto out;
1124
1125 capacity = qed_chain_get_capacity(&p_ll2_info->tx_queue.txq_chain);
f5823fe6
MK
1126 /* First element is part of the packet, rest are flexibly added */
1127 desc_size = (sizeof(*p_descq) +
1128 (p_ll2_info->input.tx_max_bds_per_packet - 1) *
1129 sizeof(p_descq->bds_set));
1130
1131 p_descq = kcalloc(capacity, desc_size, GFP_KERNEL);
0a7fb11c
YM
1132 if (!p_descq) {
1133 rc = -ENOMEM;
1134 goto out;
1135 }
f5823fe6 1136 p_ll2_info->tx_queue.descq_mem = p_descq;
0a7fb11c
YM
1137
1138 DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1139 "Allocated LL2 Txq [Type %08x] with 0x%08x buffers\n",
13c54771 1140 p_ll2_info->input.conn_type, p_ll2_info->input.tx_num_desc);
0a7fb11c
YM
1141
1142out:
1143 if (rc)
1144 DP_NOTICE(p_hwfn,
1145 "Can't allocate memory for Tx LL2 with 0x%08x buffers\n",
13c54771
MY
1146 p_ll2_info->input.tx_num_desc);
1147 return rc;
1148}
1149
1150static int
1151qed_ll2_acquire_connection_ooo(struct qed_hwfn *p_hwfn,
1152 struct qed_ll2_info *p_ll2_info, u16 mtu)
1153{
1154 struct qed_ooo_buffer *p_buf = NULL;
1155 void *p_virt;
1156 u16 buf_idx;
1157 int rc = 0;
1158
526d1d05 1159 if (p_ll2_info->input.conn_type != QED_LL2_TYPE_OOO)
13c54771
MY
1160 return rc;
1161
1162 /* Correct number of requested OOO buffers if needed */
1163 if (!p_ll2_info->input.rx_num_ooo_buffers) {
1164 u16 num_desc = p_ll2_info->input.rx_num_desc;
1165
1166 if (!num_desc)
1167 return -EINVAL;
1168 p_ll2_info->input.rx_num_ooo_buffers = num_desc * 2;
1169 }
1170
1171 for (buf_idx = 0; buf_idx < p_ll2_info->input.rx_num_ooo_buffers;
1172 buf_idx++) {
1173 p_buf = kzalloc(sizeof(*p_buf), GFP_KERNEL);
1174 if (!p_buf) {
1175 rc = -ENOMEM;
1176 goto out;
1177 }
1178
1179 p_buf->rx_buffer_size = mtu + 26 + ETH_CACHE_LINE_SIZE;
1180 p_buf->rx_buffer_size = (p_buf->rx_buffer_size +
1181 ETH_CACHE_LINE_SIZE - 1) &
1182 ~(ETH_CACHE_LINE_SIZE - 1);
1183 p_virt = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
1184 p_buf->rx_buffer_size,
1185 &p_buf->rx_buffer_phys_addr,
1186 GFP_KERNEL);
1187 if (!p_virt) {
1188 kfree(p_buf);
1189 rc = -ENOMEM;
1190 goto out;
1191 }
1192
1193 p_buf->rx_buffer_virt_addr = p_virt;
1194 qed_ooo_put_free_buffer(p_hwfn, p_hwfn->p_ooo_info, p_buf);
1195 }
1196
1197 DP_VERBOSE(p_hwfn, QED_MSG_LL2,
1198 "Allocated [%04x] LL2 OOO buffers [each of size 0x%08x]\n",
1199 p_ll2_info->input.rx_num_ooo_buffers, p_buf->rx_buffer_size);
1200
1201out:
0a7fb11c
YM
1202 return rc;
1203}
1204
0518c12f
MK
1205static int
1206qed_ll2_set_cbs(struct qed_ll2_info *p_ll2_info, const struct qed_ll2_cbs *cbs)
1207{
1208 if (!cbs || (!cbs->rx_comp_cb ||
1209 !cbs->rx_release_cb ||
1210 !cbs->tx_comp_cb || !cbs->tx_release_cb || !cbs->cookie))
1211 return -EINVAL;
1212
1213 p_ll2_info->cbs.rx_comp_cb = cbs->rx_comp_cb;
1214 p_ll2_info->cbs.rx_release_cb = cbs->rx_release_cb;
1215 p_ll2_info->cbs.tx_comp_cb = cbs->tx_comp_cb;
1216 p_ll2_info->cbs.tx_release_cb = cbs->tx_release_cb;
1217 p_ll2_info->cbs.cookie = cbs->cookie;
1218
1219 return 0;
1220}
1221
13c54771
MY
1222static enum core_error_handle
1223qed_ll2_get_error_choice(enum qed_ll2_error_handle err)
1224{
1225 switch (err) {
1226 case QED_LL2_DROP_PACKET:
1227 return LL2_DROP_PACKET;
1228 case QED_LL2_DO_NOTHING:
1229 return LL2_DO_NOTHING;
1230 case QED_LL2_ASSERT:
1231 return LL2_ASSERT;
1232 default:
1233 return LL2_DO_NOTHING;
1234 }
1235}
1236
0518c12f 1237int qed_ll2_acquire_connection(void *cxt, struct qed_ll2_acquire_data *data)
0a7fb11c 1238{
0518c12f 1239 struct qed_hwfn *p_hwfn = cxt;
0a7fb11c
YM
1240 qed_int_comp_cb_t comp_rx_cb, comp_tx_cb;
1241 struct qed_ll2_info *p_ll2_info = NULL;
13c54771 1242 u8 i, *p_tx_max;
0a7fb11c 1243 int rc;
0a7fb11c 1244
13c54771 1245 if (!data->p_connection_handle || !p_hwfn->p_ll2_info)
0a7fb11c
YM
1246 return -EINVAL;
1247
1248 /* Find a free connection to be used */
1249 for (i = 0; (i < QED_MAX_NUM_OF_LL2_CONNECTIONS); i++) {
1250 mutex_lock(&p_hwfn->p_ll2_info[i].mutex);
1251 if (p_hwfn->p_ll2_info[i].b_active) {
1252 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1253 continue;
1254 }
1255
1256 p_hwfn->p_ll2_info[i].b_active = true;
1257 p_ll2_info = &p_hwfn->p_ll2_info[i];
1258 mutex_unlock(&p_hwfn->p_ll2_info[i].mutex);
1259 break;
1260 }
1261 if (!p_ll2_info)
1262 return -EBUSY;
1263
13c54771 1264 memcpy(&p_ll2_info->input, &data->input, sizeof(p_ll2_info->input));
0a7fb11c 1265
13c54771
MY
1266 p_ll2_info->tx_dest = (data->input.tx_dest == QED_LL2_TX_DEST_NW) ?
1267 CORE_TX_DEST_NW : CORE_TX_DEST_LB;
ed468ebe
MK
1268 if (data->input.conn_type == QED_LL2_TYPE_OOO ||
1269 data->input.secondary_queue)
1270 p_ll2_info->main_func_queue = false;
1271 else
1272 p_ll2_info->main_func_queue = true;
13c54771
MY
1273
1274 /* Correct maximum number of Tx BDs */
1275 p_tx_max = &p_ll2_info->input.tx_max_bds_per_packet;
1276 if (*p_tx_max == 0)
1277 *p_tx_max = CORE_LL2_TX_MAX_BDS_PER_PACKET;
1278 else
1279 *p_tx_max = min_t(u8, *p_tx_max,
1280 CORE_LL2_TX_MAX_BDS_PER_PACKET);
0518c12f
MK
1281
1282 rc = qed_ll2_set_cbs(p_ll2_info, data->cbs);
1283 if (rc) {
1284 DP_NOTICE(p_hwfn, "Invalid callback functions\n");
1285 goto q_allocate_fail;
1286 }
1287
13c54771 1288 rc = qed_ll2_acquire_connection_rx(p_hwfn, p_ll2_info);
0a7fb11c
YM
1289 if (rc)
1290 goto q_allocate_fail;
1291
13c54771 1292 rc = qed_ll2_acquire_connection_tx(p_hwfn, p_ll2_info);
0a7fb11c
YM
1293 if (rc)
1294 goto q_allocate_fail;
1295
1d6cff4f 1296 rc = qed_ll2_acquire_connection_ooo(p_hwfn, p_ll2_info,
13c54771 1297 data->input.mtu);
1d6cff4f
YM
1298 if (rc)
1299 goto q_allocate_fail;
1300
0a7fb11c 1301 /* Register callbacks for the Rx/Tx queues */
526d1d05 1302 if (data->input.conn_type == QED_LL2_TYPE_OOO) {
1d6cff4f
YM
1303 comp_rx_cb = qed_ll2_lb_rxq_completion;
1304 comp_tx_cb = qed_ll2_lb_txq_completion;
1305 } else {
1306 comp_rx_cb = qed_ll2_rxq_completion;
1307 comp_tx_cb = qed_ll2_txq_completion;
1308 }
0a7fb11c 1309
13c54771 1310 if (data->input.rx_num_desc) {
0a7fb11c
YM
1311 qed_int_register_cb(p_hwfn, comp_rx_cb,
1312 &p_hwfn->p_ll2_info[i],
1313 &p_ll2_info->rx_queue.rx_sb_index,
1314 &p_ll2_info->rx_queue.p_fw_cons);
1315 p_ll2_info->rx_queue.b_cb_registred = true;
1316 }
1317
13c54771 1318 if (data->input.tx_num_desc) {
0a7fb11c
YM
1319 qed_int_register_cb(p_hwfn,
1320 comp_tx_cb,
1321 &p_hwfn->p_ll2_info[i],
1322 &p_ll2_info->tx_queue.tx_sb_index,
1323 &p_ll2_info->tx_queue.p_fw_cons);
1324 p_ll2_info->tx_queue.b_cb_registred = true;
1325 }
1326
13c54771 1327 *data->p_connection_handle = i;
0a7fb11c
YM
1328 return rc;
1329
1330q_allocate_fail:
1331 qed_ll2_release_connection(p_hwfn, i);
1332 return -ENOMEM;
1333}
1334
1335static int qed_ll2_establish_connection_rx(struct qed_hwfn *p_hwfn,
1336 struct qed_ll2_info *p_ll2_conn)
1337{
13c54771
MY
1338 enum qed_ll2_error_handle error_input;
1339 enum core_error_handle error_mode;
0a7fb11c
YM
1340 u8 action_on_error = 0;
1341
1342 if (!QED_LL2_RX_REGISTERED(p_ll2_conn))
1343 return 0;
1344
1345 DIRECT_REG_WR(p_ll2_conn->rx_queue.set_prod_addr, 0x0);
13c54771
MY
1346 error_input = p_ll2_conn->input.ai_err_packet_too_big;
1347 error_mode = qed_ll2_get_error_choice(error_input);
0a7fb11c 1348 SET_FIELD(action_on_error,
13c54771
MY
1349 CORE_RX_ACTION_ON_ERROR_PACKET_TOO_BIG, error_mode);
1350 error_input = p_ll2_conn->input.ai_err_no_buf;
1351 error_mode = qed_ll2_get_error_choice(error_input);
1352 SET_FIELD(action_on_error, CORE_RX_ACTION_ON_ERROR_NO_BUFF, error_mode);
0a7fb11c
YM
1353
1354 return qed_sp_ll2_rx_queue_start(p_hwfn, p_ll2_conn, action_on_error);
1355}
1356
58de2898
MY
1357static void
1358qed_ll2_establish_connection_ooo(struct qed_hwfn *p_hwfn,
1359 struct qed_ll2_info *p_ll2_conn)
1360{
526d1d05 1361 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO)
58de2898
MY
1362 return;
1363
1364 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
1365 qed_ooo_submit_rx_buffers(p_hwfn, p_ll2_conn);
1366}
0518c12f
MK
1367
1368int qed_ll2_establish_connection(void *cxt, u8 connection_handle)
0a7fb11c 1369{
0518c12f 1370 struct qed_hwfn *p_hwfn = cxt;
0a7fb11c 1371 struct qed_ll2_info *p_ll2_conn;
f5823fe6 1372 struct qed_ll2_tx_packet *p_pkt;
0a7fb11c
YM
1373 struct qed_ll2_rx_queue *p_rx;
1374 struct qed_ll2_tx_queue *p_tx;
15582962 1375 struct qed_ptt *p_ptt;
0a7fb11c
YM
1376 int rc = -EINVAL;
1377 u32 i, capacity;
f5823fe6 1378 u32 desc_size;
0a7fb11c
YM
1379 u8 qid;
1380
15582962
RV
1381 p_ptt = qed_ptt_acquire(p_hwfn);
1382 if (!p_ptt)
1383 return -EAGAIN;
1384
0a7fb11c 1385 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
15582962
RV
1386 if (!p_ll2_conn) {
1387 rc = -EINVAL;
1388 goto out;
1389 }
1390
0a7fb11c
YM
1391 p_rx = &p_ll2_conn->rx_queue;
1392 p_tx = &p_ll2_conn->tx_queue;
1393
1394 qed_chain_reset(&p_rx->rxq_chain);
1395 qed_chain_reset(&p_rx->rcq_chain);
1396 INIT_LIST_HEAD(&p_rx->active_descq);
1397 INIT_LIST_HEAD(&p_rx->free_descq);
1398 INIT_LIST_HEAD(&p_rx->posting_descq);
1399 spin_lock_init(&p_rx->lock);
1400 capacity = qed_chain_get_capacity(&p_rx->rxq_chain);
1401 for (i = 0; i < capacity; i++)
1402 list_add_tail(&p_rx->descq_array[i].list_entry,
1403 &p_rx->free_descq);
1404 *p_rx->p_fw_cons = 0;
1405
1406 qed_chain_reset(&p_tx->txq_chain);
1407 INIT_LIST_HEAD(&p_tx->active_descq);
1408 INIT_LIST_HEAD(&p_tx->free_descq);
1409 INIT_LIST_HEAD(&p_tx->sending_descq);
1410 spin_lock_init(&p_tx->lock);
1411 capacity = qed_chain_get_capacity(&p_tx->txq_chain);
f5823fe6
MK
1412 /* First element is part of the packet, rest are flexibly added */
1413 desc_size = (sizeof(*p_pkt) +
1414 (p_ll2_conn->input.tx_max_bds_per_packet - 1) *
1415 sizeof(p_pkt->bds_set));
1416
1417 for (i = 0; i < capacity; i++) {
1418 p_pkt = p_tx->descq_mem + desc_size * i;
1419 list_add_tail(&p_pkt->list_entry, &p_tx->free_descq);
1420 }
0a7fb11c
YM
1421 p_tx->cur_completing_bd_idx = 0;
1422 p_tx->bds_idx = 0;
1423 p_tx->b_completing_packet = false;
1424 p_tx->cur_send_packet = NULL;
1425 p_tx->cur_send_frag_num = 0;
1426 p_tx->cur_completing_frag_num = 0;
1427 *p_tx->p_fw_cons = 0;
1428
15582962
RV
1429 rc = qed_cxt_acquire_cid(p_hwfn, PROTOCOLID_CORE, &p_ll2_conn->cid);
1430 if (rc)
1431 goto out;
0a7fb11c
YM
1432
1433 qid = p_hwfn->hw_info.resc_start[QED_LL2_QUEUE] + connection_handle;
1434 p_ll2_conn->queue_id = qid;
1435 p_ll2_conn->tx_stats_id = qid;
1436 p_rx->set_prod_addr = (u8 __iomem *)p_hwfn->regview +
1437 GTT_BAR0_MAP_REG_TSDM_RAM +
1438 TSTORM_LL2_RX_PRODS_OFFSET(qid);
1439 p_tx->doorbell_addr = (u8 __iomem *)p_hwfn->doorbells +
1440 qed_db_addr(p_ll2_conn->cid,
1441 DQ_DEMS_LEGACY);
1442
1443 rc = qed_ll2_establish_connection_rx(p_hwfn, p_ll2_conn);
1444 if (rc)
15582962 1445 goto out;
0a7fb11c
YM
1446
1447 rc = qed_sp_ll2_tx_queue_start(p_hwfn, p_ll2_conn);
1448 if (rc)
15582962 1449 goto out;
0a7fb11c 1450
c851a9dc 1451 if (!QED_IS_RDMA_PERSONALITY(p_hwfn))
15582962 1452 qed_wr(p_hwfn, p_ptt, PRS_REG_USE_LIGHT_L2, 1);
0a7fb11c 1453
1d6cff4f
YM
1454 qed_ll2_establish_connection_ooo(p_hwfn, p_ll2_conn);
1455
13c54771 1456 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
15582962 1457 qed_llh_add_protocol_filter(p_hwfn, p_ptt,
1e128c81
AE
1458 0x8906, 0,
1459 QED_LLH_FILTER_ETHERTYPE);
15582962 1460 qed_llh_add_protocol_filter(p_hwfn, p_ptt,
1e128c81
AE
1461 0x8914, 0,
1462 QED_LLH_FILTER_ETHERTYPE);
1463 }
1464
15582962
RV
1465out:
1466 qed_ptt_release(p_hwfn, p_ptt);
0a7fb11c
YM
1467 return rc;
1468}
1469
1470static void qed_ll2_post_rx_buffer_notify_fw(struct qed_hwfn *p_hwfn,
1471 struct qed_ll2_rx_queue *p_rx,
1472 struct qed_ll2_rx_packet *p_curp)
1473{
1474 struct qed_ll2_rx_packet *p_posting_packet = NULL;
1475 struct core_ll2_rx_prod rx_prod = { 0, 0, 0 };
1476 bool b_notify_fw = false;
1477 u16 bd_prod, cq_prod;
1478
1479 /* This handles the flushing of already posted buffers */
1480 while (!list_empty(&p_rx->posting_descq)) {
1481 p_posting_packet = list_first_entry(&p_rx->posting_descq,
1482 struct qed_ll2_rx_packet,
1483 list_entry);
b4f0fd4b
WY
1484 list_move_tail(&p_posting_packet->list_entry,
1485 &p_rx->active_descq);
0a7fb11c
YM
1486 b_notify_fw = true;
1487 }
1488
1489 /* This handles the supplied packet [if there is one] */
1490 if (p_curp) {
1491 list_add_tail(&p_curp->list_entry, &p_rx->active_descq);
1492 b_notify_fw = true;
1493 }
1494
1495 if (!b_notify_fw)
1496 return;
1497
1498 bd_prod = qed_chain_get_prod_idx(&p_rx->rxq_chain);
1499 cq_prod = qed_chain_get_prod_idx(&p_rx->rcq_chain);
1500 rx_prod.bd_prod = cpu_to_le16(bd_prod);
1501 rx_prod.cqe_prod = cpu_to_le16(cq_prod);
1502 DIRECT_REG_WR(p_rx->set_prod_addr, *((u32 *)&rx_prod));
1503}
1504
0518c12f 1505int qed_ll2_post_rx_buffer(void *cxt,
0a7fb11c
YM
1506 u8 connection_handle,
1507 dma_addr_t addr,
1508 u16 buf_len, void *cookie, u8 notify_fw)
1509{
0518c12f 1510 struct qed_hwfn *p_hwfn = cxt;
0a7fb11c
YM
1511 struct core_rx_bd_with_buff_len *p_curb = NULL;
1512 struct qed_ll2_rx_packet *p_curp = NULL;
1513 struct qed_ll2_info *p_ll2_conn;
1514 struct qed_ll2_rx_queue *p_rx;
1515 unsigned long flags;
1516 void *p_data;
1517 int rc = 0;
1518
1519 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1520 if (!p_ll2_conn)
1521 return -EINVAL;
1522 p_rx = &p_ll2_conn->rx_queue;
1523
1524 spin_lock_irqsave(&p_rx->lock, flags);
1525 if (!list_empty(&p_rx->free_descq))
1526 p_curp = list_first_entry(&p_rx->free_descq,
1527 struct qed_ll2_rx_packet, list_entry);
1528 if (p_curp) {
1529 if (qed_chain_get_elem_left(&p_rx->rxq_chain) &&
1530 qed_chain_get_elem_left(&p_rx->rcq_chain)) {
1531 p_data = qed_chain_produce(&p_rx->rxq_chain);
1532 p_curb = (struct core_rx_bd_with_buff_len *)p_data;
1533 qed_chain_produce(&p_rx->rcq_chain);
1534 }
1535 }
1536
1537 /* If we're lacking entires, let's try to flush buffers to FW */
1538 if (!p_curp || !p_curb) {
1539 rc = -EBUSY;
1540 p_curp = NULL;
1541 goto out_notify;
1542 }
1543
1544 /* We have an Rx packet we can fill */
1545 DMA_REGPAIR_LE(p_curb->addr, addr);
1546 p_curb->buff_length = cpu_to_le16(buf_len);
1547 p_curp->rx_buf_addr = addr;
1548 p_curp->cookie = cookie;
1549 p_curp->rxq_bd = p_curb;
1550 p_curp->buf_length = buf_len;
1551 list_del(&p_curp->list_entry);
1552
1553 /* Check if we only want to enqueue this packet without informing FW */
1554 if (!notify_fw) {
1555 list_add_tail(&p_curp->list_entry, &p_rx->posting_descq);
1556 goto out;
1557 }
1558
1559out_notify:
1560 qed_ll2_post_rx_buffer_notify_fw(p_hwfn, p_rx, p_curp);
1561out:
1562 spin_unlock_irqrestore(&p_rx->lock, flags);
1563 return rc;
1564}
1565
1566static void qed_ll2_prepare_tx_packet_set(struct qed_hwfn *p_hwfn,
1567 struct qed_ll2_tx_queue *p_tx,
1568 struct qed_ll2_tx_packet *p_curp,
7c7973b2 1569 struct qed_ll2_tx_pkt_info *pkt,
0a7fb11c
YM
1570 u8 notify_fw)
1571{
1572 list_del(&p_curp->list_entry);
7c7973b2
MY
1573 p_curp->cookie = pkt->cookie;
1574 p_curp->bd_used = pkt->num_of_bds;
0a7fb11c
YM
1575 p_curp->notify_fw = notify_fw;
1576 p_tx->cur_send_packet = p_curp;
1577 p_tx->cur_send_frag_num = 0;
1578
7c7973b2
MY
1579 p_curp->bds_set[p_tx->cur_send_frag_num].tx_frag = pkt->first_frag;
1580 p_curp->bds_set[p_tx->cur_send_frag_num].frag_len = pkt->first_frag_len;
0a7fb11c
YM
1581 p_tx->cur_send_frag_num++;
1582}
1583
be086e7c
MY
1584static void
1585qed_ll2_prepare_tx_packet_set_bd(struct qed_hwfn *p_hwfn,
1586 struct qed_ll2_info *p_ll2,
1587 struct qed_ll2_tx_packet *p_curp,
7c7973b2 1588 struct qed_ll2_tx_pkt_info *pkt)
0a7fb11c
YM
1589{
1590 struct qed_chain *p_tx_chain = &p_ll2->tx_queue.txq_chain;
1591 u16 prod_idx = qed_chain_get_prod_idx(p_tx_chain);
1592 struct core_tx_bd *start_bd = NULL;
7c7973b2
MY
1593 enum core_roce_flavor_type roce_flavor;
1594 enum core_tx_dest tx_dest;
be086e7c 1595 u16 bd_data = 0, frag_idx;
0a7fb11c 1596
7c7973b2
MY
1597 roce_flavor = (pkt->qed_roce_flavor == QED_LL2_ROCE) ? CORE_ROCE
1598 : CORE_RROCE;
1599
77caa792
MK
1600 switch (pkt->tx_dest) {
1601 case QED_LL2_TX_DEST_NW:
1602 tx_dest = CORE_TX_DEST_NW;
1603 break;
1604 case QED_LL2_TX_DEST_LB:
1605 tx_dest = CORE_TX_DEST_LB;
1606 break;
1607 case QED_LL2_TX_DEST_DROP:
1608 tx_dest = CORE_TX_DEST_DROP;
1609 break;
1610 default:
1611 tx_dest = CORE_TX_DEST_LB;
1612 break;
1613 }
7c7973b2 1614
0a7fb11c 1615 start_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
7c7973b2 1616 start_bd->nw_vlan_or_lb_echo = cpu_to_le16(pkt->vlan);
0a7fb11c 1617 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_L4_HDR_OFFSET_W,
7c7973b2 1618 cpu_to_le16(pkt->l4_hdr_offset_w));
0a7fb11c 1619 SET_FIELD(start_bd->bitfield1, CORE_TX_BD_TX_DST, tx_dest);
7c7973b2 1620 bd_data |= pkt->bd_flags;
be086e7c 1621 SET_FIELD(bd_data, CORE_TX_BD_DATA_START_BD, 0x1);
7c7973b2 1622 SET_FIELD(bd_data, CORE_TX_BD_DATA_NBDS, pkt->num_of_bds);
be086e7c 1623 SET_FIELD(bd_data, CORE_TX_BD_DATA_ROCE_FLAV, roce_flavor);
6df60fe7
MK
1624 SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_CSUM, !!(pkt->enable_ip_cksum));
1625 SET_FIELD(bd_data, CORE_TX_BD_DATA_L4_CSUM, !!(pkt->enable_l4_cksum));
1626 SET_FIELD(bd_data, CORE_TX_BD_DATA_IP_LEN, !!(pkt->calc_ip_len));
be086e7c 1627 start_bd->bd_data.as_bitfield = cpu_to_le16(bd_data);
7c7973b2
MY
1628 DMA_REGPAIR_LE(start_bd->addr, pkt->first_frag);
1629 start_bd->nbytes = cpu_to_le16(pkt->first_frag_len);
0a7fb11c
YM
1630
1631 DP_VERBOSE(p_hwfn,
1632 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1633 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Tx Producer at [0x%04x] - set with a %04x bytes %02x BDs buffer at %08x:%08x\n",
1634 p_ll2->queue_id,
1635 p_ll2->cid,
13c54771 1636 p_ll2->input.conn_type,
0a7fb11c 1637 prod_idx,
7c7973b2
MY
1638 pkt->first_frag_len,
1639 pkt->num_of_bds,
0a7fb11c
YM
1640 le32_to_cpu(start_bd->addr.hi),
1641 le32_to_cpu(start_bd->addr.lo));
1642
7c7973b2 1643 if (p_ll2->tx_queue.cur_send_frag_num == pkt->num_of_bds)
0a7fb11c
YM
1644 return;
1645
1646 /* Need to provide the packet with additional BDs for frags */
1647 for (frag_idx = p_ll2->tx_queue.cur_send_frag_num;
7c7973b2 1648 frag_idx < pkt->num_of_bds; frag_idx++) {
0a7fb11c
YM
1649 struct core_tx_bd **p_bd = &p_curp->bds_set[frag_idx].txq_bd;
1650
1651 *p_bd = (struct core_tx_bd *)qed_chain_produce(p_tx_chain);
be086e7c 1652 (*p_bd)->bd_data.as_bitfield = 0;
0a7fb11c 1653 (*p_bd)->bitfield1 = 0;
0a7fb11c
YM
1654 p_curp->bds_set[frag_idx].tx_frag = 0;
1655 p_curp->bds_set[frag_idx].frag_len = 0;
1656 }
1657}
1658
1659/* This should be called while the Txq spinlock is being held */
1660static void qed_ll2_tx_packet_notify(struct qed_hwfn *p_hwfn,
1661 struct qed_ll2_info *p_ll2_conn)
1662{
1663 bool b_notify = p_ll2_conn->tx_queue.cur_send_packet->notify_fw;
1664 struct qed_ll2_tx_queue *p_tx = &p_ll2_conn->tx_queue;
1665 struct qed_ll2_tx_packet *p_pkt = NULL;
1666 struct core_db_data db_msg = { 0, 0, 0 };
1667 u16 bd_prod;
1668
1669 /* If there are missing BDs, don't do anything now */
1670 if (p_ll2_conn->tx_queue.cur_send_frag_num !=
1671 p_ll2_conn->tx_queue.cur_send_packet->bd_used)
1672 return;
1673
1674 /* Push the current packet to the list and clean after it */
1675 list_add_tail(&p_ll2_conn->tx_queue.cur_send_packet->list_entry,
1676 &p_ll2_conn->tx_queue.sending_descq);
1677 p_ll2_conn->tx_queue.cur_send_packet = NULL;
1678 p_ll2_conn->tx_queue.cur_send_frag_num = 0;
1679
1680 /* Notify FW of packet only if requested to */
1681 if (!b_notify)
1682 return;
1683
1684 bd_prod = qed_chain_get_prod_idx(&p_ll2_conn->tx_queue.txq_chain);
1685
1686 while (!list_empty(&p_tx->sending_descq)) {
1687 p_pkt = list_first_entry(&p_tx->sending_descq,
1688 struct qed_ll2_tx_packet, list_entry);
1689 if (!p_pkt)
1690 break;
1691
b4f0fd4b 1692 list_move_tail(&p_pkt->list_entry, &p_tx->active_descq);
0a7fb11c
YM
1693 }
1694
1695 SET_FIELD(db_msg.params, CORE_DB_DATA_DEST, DB_DEST_XCM);
1696 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_CMD, DB_AGG_CMD_SET);
1697 SET_FIELD(db_msg.params, CORE_DB_DATA_AGG_VAL_SEL,
1698 DQ_XCM_CORE_TX_BD_PROD_CMD);
1699 db_msg.agg_flags = DQ_XCM_CORE_DQ_CF_CMD;
1700 db_msg.spq_prod = cpu_to_le16(bd_prod);
1701
1702 /* Make sure the BDs data is updated before ringing the doorbell */
1703 wmb();
1704
1705 DIRECT_REG_WR(p_tx->doorbell_addr, *((u32 *)&db_msg));
1706
1707 DP_VERBOSE(p_hwfn,
1708 (NETIF_MSG_TX_QUEUED | QED_MSG_LL2),
1709 "LL2 [q 0x%02x cid 0x%08x type 0x%08x] Doorbelled [producer 0x%04x]\n",
1710 p_ll2_conn->queue_id,
13c54771
MY
1711 p_ll2_conn->cid,
1712 p_ll2_conn->input.conn_type, db_msg.spq_prod);
0a7fb11c
YM
1713}
1714
0518c12f 1715int qed_ll2_prepare_tx_packet(void *cxt,
0a7fb11c 1716 u8 connection_handle,
7c7973b2
MY
1717 struct qed_ll2_tx_pkt_info *pkt,
1718 bool notify_fw)
0a7fb11c 1719{
0518c12f 1720 struct qed_hwfn *p_hwfn = cxt;
0a7fb11c
YM
1721 struct qed_ll2_tx_packet *p_curp = NULL;
1722 struct qed_ll2_info *p_ll2_conn = NULL;
1723 struct qed_ll2_tx_queue *p_tx;
1724 struct qed_chain *p_tx_chain;
1725 unsigned long flags;
1726 int rc = 0;
1727
1728 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1729 if (!p_ll2_conn)
1730 return -EINVAL;
1731 p_tx = &p_ll2_conn->tx_queue;
1732 p_tx_chain = &p_tx->txq_chain;
1733
f5823fe6 1734 if (pkt->num_of_bds > p_ll2_conn->input.tx_max_bds_per_packet)
0a7fb11c
YM
1735 return -EIO;
1736
1737 spin_lock_irqsave(&p_tx->lock, flags);
1738 if (p_tx->cur_send_packet) {
1739 rc = -EEXIST;
1740 goto out;
1741 }
1742
1743 /* Get entry, but only if we have tx elements for it */
1744 if (!list_empty(&p_tx->free_descq))
1745 p_curp = list_first_entry(&p_tx->free_descq,
1746 struct qed_ll2_tx_packet, list_entry);
7c7973b2 1747 if (p_curp && qed_chain_get_elem_left(p_tx_chain) < pkt->num_of_bds)
0a7fb11c
YM
1748 p_curp = NULL;
1749
1750 if (!p_curp) {
1751 rc = -EBUSY;
1752 goto out;
1753 }
1754
1755 /* Prepare packet and BD, and perhaps send a doorbell to FW */
7c7973b2
MY
1756 qed_ll2_prepare_tx_packet_set(p_hwfn, p_tx, p_curp, pkt, notify_fw);
1757
1758 qed_ll2_prepare_tx_packet_set_bd(p_hwfn, p_ll2_conn, p_curp, pkt);
0a7fb11c
YM
1759
1760 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
1761
1762out:
1763 spin_unlock_irqrestore(&p_tx->lock, flags);
1764 return rc;
1765}
1766
0518c12f 1767int qed_ll2_set_fragment_of_tx_packet(void *cxt,
0a7fb11c
YM
1768 u8 connection_handle,
1769 dma_addr_t addr, u16 nbytes)
1770{
1771 struct qed_ll2_tx_packet *p_cur_send_packet = NULL;
0518c12f 1772 struct qed_hwfn *p_hwfn = cxt;
0a7fb11c
YM
1773 struct qed_ll2_info *p_ll2_conn = NULL;
1774 u16 cur_send_frag_num = 0;
1775 struct core_tx_bd *p_bd;
1776 unsigned long flags;
1777
1778 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1779 if (!p_ll2_conn)
1780 return -EINVAL;
1781
1782 if (!p_ll2_conn->tx_queue.cur_send_packet)
1783 return -EINVAL;
1784
1785 p_cur_send_packet = p_ll2_conn->tx_queue.cur_send_packet;
1786 cur_send_frag_num = p_ll2_conn->tx_queue.cur_send_frag_num;
1787
1788 if (cur_send_frag_num >= p_cur_send_packet->bd_used)
1789 return -EINVAL;
1790
1791 /* Fill the BD information, and possibly notify FW */
1792 p_bd = p_cur_send_packet->bds_set[cur_send_frag_num].txq_bd;
1793 DMA_REGPAIR_LE(p_bd->addr, addr);
1794 p_bd->nbytes = cpu_to_le16(nbytes);
1795 p_cur_send_packet->bds_set[cur_send_frag_num].tx_frag = addr;
1796 p_cur_send_packet->bds_set[cur_send_frag_num].frag_len = nbytes;
1797
1798 p_ll2_conn->tx_queue.cur_send_frag_num++;
1799
1800 spin_lock_irqsave(&p_ll2_conn->tx_queue.lock, flags);
1801 qed_ll2_tx_packet_notify(p_hwfn, p_ll2_conn);
1802 spin_unlock_irqrestore(&p_ll2_conn->tx_queue.lock, flags);
1803
1804 return 0;
1805}
1806
0518c12f 1807int qed_ll2_terminate_connection(void *cxt, u8 connection_handle)
0a7fb11c 1808{
0518c12f 1809 struct qed_hwfn *p_hwfn = cxt;
0a7fb11c
YM
1810 struct qed_ll2_info *p_ll2_conn = NULL;
1811 int rc = -EINVAL;
15582962
RV
1812 struct qed_ptt *p_ptt;
1813
1814 p_ptt = qed_ptt_acquire(p_hwfn);
1815 if (!p_ptt)
1816 return -EAGAIN;
0a7fb11c
YM
1817
1818 p_ll2_conn = qed_ll2_handle_sanity_lock(p_hwfn, connection_handle);
15582962
RV
1819 if (!p_ll2_conn) {
1820 rc = -EINVAL;
1821 goto out;
1822 }
0a7fb11c
YM
1823
1824 /* Stop Tx & Rx of connection, if needed */
1825 if (QED_LL2_TX_REGISTERED(p_ll2_conn)) {
1826 rc = qed_sp_ll2_tx_queue_stop(p_hwfn, p_ll2_conn);
1827 if (rc)
15582962 1828 goto out;
0a7fb11c
YM
1829 qed_ll2_txq_flush(p_hwfn, connection_handle);
1830 }
1831
1832 if (QED_LL2_RX_REGISTERED(p_ll2_conn)) {
1833 rc = qed_sp_ll2_rx_queue_stop(p_hwfn, p_ll2_conn);
1834 if (rc)
15582962 1835 goto out;
0a7fb11c
YM
1836 qed_ll2_rxq_flush(p_hwfn, connection_handle);
1837 }
1838
526d1d05 1839 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_OOO)
1d6cff4f
YM
1840 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
1841
13c54771 1842 if (p_ll2_conn->input.conn_type == QED_LL2_TYPE_FCOE) {
15582962 1843 qed_llh_remove_protocol_filter(p_hwfn, p_ptt,
1e128c81
AE
1844 0x8906, 0,
1845 QED_LLH_FILTER_ETHERTYPE);
15582962 1846 qed_llh_remove_protocol_filter(p_hwfn, p_ptt,
1e128c81
AE
1847 0x8914, 0,
1848 QED_LLH_FILTER_ETHERTYPE);
1849 }
1850
15582962
RV
1851out:
1852 qed_ptt_release(p_hwfn, p_ptt);
0a7fb11c
YM
1853 return rc;
1854}
1855
58de2898
MY
1856static void qed_ll2_release_connection_ooo(struct qed_hwfn *p_hwfn,
1857 struct qed_ll2_info *p_ll2_conn)
1858{
1859 struct qed_ooo_buffer *p_buffer;
1860
526d1d05 1861 if (p_ll2_conn->input.conn_type != QED_LL2_TYPE_OOO)
58de2898
MY
1862 return;
1863
1864 qed_ooo_release_all_isles(p_hwfn, p_hwfn->p_ooo_info);
1865 while ((p_buffer = qed_ooo_get_free_buffer(p_hwfn,
1866 p_hwfn->p_ooo_info))) {
1867 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
1868 p_buffer->rx_buffer_size,
1869 p_buffer->rx_buffer_virt_addr,
1870 p_buffer->rx_buffer_phys_addr);
1871 kfree(p_buffer);
1872 }
1873}
0518c12f
MK
1874
1875void qed_ll2_release_connection(void *cxt, u8 connection_handle)
0a7fb11c 1876{
0518c12f 1877 struct qed_hwfn *p_hwfn = cxt;
0a7fb11c
YM
1878 struct qed_ll2_info *p_ll2_conn = NULL;
1879
1880 p_ll2_conn = qed_ll2_handle_sanity(p_hwfn, connection_handle);
1881 if (!p_ll2_conn)
1882 return;
1883
1884 if (QED_LL2_RX_REGISTERED(p_ll2_conn)) {
1885 p_ll2_conn->rx_queue.b_cb_registred = false;
1886 qed_int_unregister_cb(p_hwfn, p_ll2_conn->rx_queue.rx_sb_index);
1887 }
1888
1889 if (QED_LL2_TX_REGISTERED(p_ll2_conn)) {
1890 p_ll2_conn->tx_queue.b_cb_registred = false;
1891 qed_int_unregister_cb(p_hwfn, p_ll2_conn->tx_queue.tx_sb_index);
1892 }
1893
f5823fe6 1894 kfree(p_ll2_conn->tx_queue.descq_mem);
0a7fb11c
YM
1895 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->tx_queue.txq_chain);
1896
1897 kfree(p_ll2_conn->rx_queue.descq_array);
1898 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rxq_chain);
1899 qed_chain_free(p_hwfn->cdev, &p_ll2_conn->rx_queue.rcq_chain);
1900
1901 qed_cxt_release_cid(p_hwfn, p_ll2_conn->cid);
1902
1d6cff4f
YM
1903 qed_ll2_release_connection_ooo(p_hwfn, p_ll2_conn);
1904
0a7fb11c
YM
1905 mutex_lock(&p_ll2_conn->mutex);
1906 p_ll2_conn->b_active = false;
1907 mutex_unlock(&p_ll2_conn->mutex);
1908}
1909
3587cb87 1910int qed_ll2_alloc(struct qed_hwfn *p_hwfn)
0a7fb11c
YM
1911{
1912 struct qed_ll2_info *p_ll2_connections;
1913 u8 i;
1914
1915 /* Allocate LL2's set struct */
1916 p_ll2_connections = kcalloc(QED_MAX_NUM_OF_LL2_CONNECTIONS,
1917 sizeof(struct qed_ll2_info), GFP_KERNEL);
1918 if (!p_ll2_connections) {
1919 DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_ll2'\n");
3587cb87 1920 return -ENOMEM;
0a7fb11c
YM
1921 }
1922
1923 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
1924 p_ll2_connections[i].my_id = i;
1925
3587cb87
TT
1926 p_hwfn->p_ll2_info = p_ll2_connections;
1927 return 0;
0a7fb11c
YM
1928}
1929
3587cb87 1930void qed_ll2_setup(struct qed_hwfn *p_hwfn)
0a7fb11c
YM
1931{
1932 int i;
1933
1934 for (i = 0; i < QED_MAX_NUM_OF_LL2_CONNECTIONS; i++)
3587cb87 1935 mutex_init(&p_hwfn->p_ll2_info[i].mutex);
0a7fb11c
YM
1936}
1937
3587cb87 1938void qed_ll2_free(struct qed_hwfn *p_hwfn)
0a7fb11c 1939{
3587cb87
TT
1940 if (!p_hwfn->p_ll2_info)
1941 return;
1942
1943 kfree(p_hwfn->p_ll2_info);
1944 p_hwfn->p_ll2_info = NULL;
0a7fb11c
YM
1945}
1946
fef1c3f7
MY
1947static void _qed_ll2_get_port_stats(struct qed_hwfn *p_hwfn,
1948 struct qed_ptt *p_ptt,
1949 struct qed_ll2_stats *p_stats)
1950{
1951 struct core_ll2_port_stats port_stats;
1952
1953 memset(&port_stats, 0, sizeof(port_stats));
1954 qed_memcpy_from(p_hwfn, p_ptt, &port_stats,
1955 BAR0_MAP_REG_TSDM_RAM +
1956 TSTORM_LL2_PORT_STAT_OFFSET(MFW_PORT(p_hwfn)),
1957 sizeof(port_stats));
1958
1959 p_stats->gsi_invalid_hdr = HILO_64_REGPAIR(port_stats.gsi_invalid_hdr);
1960 p_stats->gsi_invalid_pkt_length =
1961 HILO_64_REGPAIR(port_stats.gsi_invalid_pkt_length);
1962 p_stats->gsi_unsupported_pkt_typ =
1963 HILO_64_REGPAIR(port_stats.gsi_unsupported_pkt_typ);
1964 p_stats->gsi_crcchksm_error =
1965 HILO_64_REGPAIR(port_stats.gsi_crcchksm_error);
1966}
1967
0a7fb11c
YM
1968static void _qed_ll2_get_tstats(struct qed_hwfn *p_hwfn,
1969 struct qed_ptt *p_ptt,
1970 struct qed_ll2_info *p_ll2_conn,
1971 struct qed_ll2_stats *p_stats)
1972{
1973 struct core_ll2_tstorm_per_queue_stat tstats;
1974 u8 qid = p_ll2_conn->queue_id;
1975 u32 tstats_addr;
1976
1977 memset(&tstats, 0, sizeof(tstats));
1978 tstats_addr = BAR0_MAP_REG_TSDM_RAM +
1979 CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(qid);
1980 qed_memcpy_from(p_hwfn, p_ptt, &tstats, tstats_addr, sizeof(tstats));
1981
1982 p_stats->packet_too_big_discard =
1983 HILO_64_REGPAIR(tstats.packet_too_big_discard);
1984 p_stats->no_buff_discard = HILO_64_REGPAIR(tstats.no_buff_discard);
1985}
1986
1987static void _qed_ll2_get_ustats(struct qed_hwfn *p_hwfn,
1988 struct qed_ptt *p_ptt,
1989 struct qed_ll2_info *p_ll2_conn,
1990 struct qed_ll2_stats *p_stats)
1991{
1992 struct core_ll2_ustorm_per_queue_stat ustats;
1993 u8 qid = p_ll2_conn->queue_id;
1994 u32 ustats_addr;
1995
1996 memset(&ustats, 0, sizeof(ustats));
1997 ustats_addr = BAR0_MAP_REG_USDM_RAM +
1998 CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(qid);
1999 qed_memcpy_from(p_hwfn, p_ptt, &ustats, ustats_addr, sizeof(ustats));
2000
2001 p_stats->rcv_ucast_bytes = HILO_64_REGPAIR(ustats.rcv_ucast_bytes);
2002 p_stats->rcv_mcast_bytes = HILO_64_REGPAIR(ustats.rcv_mcast_bytes);
2003 p_stats->rcv_bcast_bytes = HILO_64_REGPAIR(ustats.rcv_bcast_bytes);
2004 p_stats->rcv_ucast_pkts = HILO_64_REGPAIR(ustats.rcv_ucast_pkts);
2005 p_stats->rcv_mcast_pkts = HILO_64_REGPAIR(ustats.rcv_mcast_pkts);
2006 p_stats->rcv_bcast_pkts = HILO_64_REGPAIR(ustats.rcv_bcast_pkts);
2007}
2008
2009static void _qed_ll2_get_pstats(struct qed_hwfn *p_hwfn,
2010 struct qed_ptt *p_ptt,
2011 struct qed_ll2_info *p_ll2_conn,
2012 struct qed_ll2_stats *p_stats)
2013{
2014 struct core_ll2_pstorm_per_queue_stat pstats;
2015 u8 stats_id = p_ll2_conn->tx_stats_id;
2016 u32 pstats_addr;
2017
2018 memset(&pstats, 0, sizeof(pstats));
2019 pstats_addr = BAR0_MAP_REG_PSDM_RAM +
2020 CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(stats_id);
2021 qed_memcpy_from(p_hwfn, p_ptt, &pstats, pstats_addr, sizeof(pstats));
2022
2023 p_stats->sent_ucast_bytes = HILO_64_REGPAIR(pstats.sent_ucast_bytes);
2024 p_stats->sent_mcast_bytes = HILO_64_REGPAIR(pstats.sent_mcast_bytes);
2025 p_stats->sent_bcast_bytes = HILO_64_REGPAIR(pstats.sent_bcast_bytes);
2026 p_stats->sent_ucast_pkts = HILO_64_REGPAIR(pstats.sent_ucast_pkts);
2027 p_stats->sent_mcast_pkts = HILO_64_REGPAIR(pstats.sent_mcast_pkts);
2028 p_stats->sent_bcast_pkts = HILO_64_REGPAIR(pstats.sent_bcast_pkts);
2029}
2030
0518c12f 2031int qed_ll2_get_stats(void *cxt,
0a7fb11c
YM
2032 u8 connection_handle, struct qed_ll2_stats *p_stats)
2033{
0518c12f 2034 struct qed_hwfn *p_hwfn = cxt;
0a7fb11c
YM
2035 struct qed_ll2_info *p_ll2_conn = NULL;
2036 struct qed_ptt *p_ptt;
2037
2038 memset(p_stats, 0, sizeof(*p_stats));
2039
2040 if ((connection_handle >= QED_MAX_NUM_OF_LL2_CONNECTIONS) ||
2041 !p_hwfn->p_ll2_info)
2042 return -EINVAL;
2043
2044 p_ll2_conn = &p_hwfn->p_ll2_info[connection_handle];
2045
2046 p_ptt = qed_ptt_acquire(p_hwfn);
2047 if (!p_ptt) {
2048 DP_ERR(p_hwfn, "Failed to acquire ptt\n");
2049 return -EINVAL;
2050 }
2051
fef1c3f7
MY
2052 if (p_ll2_conn->input.gsi_enable)
2053 _qed_ll2_get_port_stats(p_hwfn, p_ptt, p_stats);
0a7fb11c
YM
2054 _qed_ll2_get_tstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2055 _qed_ll2_get_ustats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2056 if (p_ll2_conn->tx_stats_en)
2057 _qed_ll2_get_pstats(p_hwfn, p_ptt, p_ll2_conn, p_stats);
2058
2059 qed_ptt_release(p_hwfn, p_ptt);
2060 return 0;
2061}
2062
0518c12f
MK
2063static void qed_ll2b_release_rx_packet(void *cxt,
2064 u8 connection_handle,
2065 void *cookie,
2066 dma_addr_t rx_buf_addr,
2067 bool b_last_packet)
2068{
2069 struct qed_hwfn *p_hwfn = cxt;
2070
2071 qed_ll2_dealloc_buffer(p_hwfn->cdev, cookie);
2072}
2073
0a7fb11c
YM
2074static void qed_ll2_register_cb_ops(struct qed_dev *cdev,
2075 const struct qed_ll2_cb_ops *ops,
2076 void *cookie)
2077{
2078 cdev->ll2->cbs = ops;
2079 cdev->ll2->cb_cookie = cookie;
2080}
2081
0518c12f
MK
2082struct qed_ll2_cbs ll2_cbs = {
2083 .rx_comp_cb = &qed_ll2b_complete_rx_packet,
2084 .rx_release_cb = &qed_ll2b_release_rx_packet,
2085 .tx_comp_cb = &qed_ll2b_complete_tx_packet,
2086 .tx_release_cb = &qed_ll2b_complete_tx_packet,
2087};
2088
13c54771
MY
2089static void qed_ll2_set_conn_data(struct qed_dev *cdev,
2090 struct qed_ll2_acquire_data *data,
2091 struct qed_ll2_params *params,
2092 enum qed_ll2_conn_type conn_type,
0518c12f 2093 u8 *handle, bool lb)
13c54771
MY
2094{
2095 memset(data, 0, sizeof(*data));
2096
2097 data->input.conn_type = conn_type;
2098 data->input.mtu = params->mtu;
2099 data->input.rx_num_desc = QED_LL2_RX_SIZE;
2100 data->input.rx_drop_ttl0_flg = params->drop_ttl0_packets;
2101 data->input.rx_vlan_removal_en = params->rx_vlan_stripping;
2102 data->input.tx_num_desc = QED_LL2_TX_SIZE;
13c54771 2103 data->p_connection_handle = handle;
0518c12f
MK
2104 data->cbs = &ll2_cbs;
2105 ll2_cbs.cookie = QED_LEADING_HWFN(cdev);
2106
13c54771 2107 if (lb) {
526d1d05 2108 data->input.tx_tc = PKT_LB_TC;
13c54771
MY
2109 data->input.tx_dest = QED_LL2_TX_DEST_LB;
2110 } else {
2111 data->input.tx_tc = 0;
2112 data->input.tx_dest = QED_LL2_TX_DEST_NW;
2113 }
2114}
2115
2116static int qed_ll2_start_ooo(struct qed_dev *cdev,
2117 struct qed_ll2_params *params)
2118{
2119 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
2120 u8 *handle = &hwfn->pf_params.iscsi_pf_params.ll2_ooo_queue_id;
2121 struct qed_ll2_acquire_data data;
2122 int rc;
2123
2124 qed_ll2_set_conn_data(cdev, &data, params,
526d1d05 2125 QED_LL2_TYPE_OOO, handle, true);
13c54771
MY
2126
2127 rc = qed_ll2_acquire_connection(hwfn, &data);
2128 if (rc) {
2129 DP_INFO(cdev, "Failed to acquire LL2 OOO connection\n");
2130 goto out;
2131 }
2132
2133 rc = qed_ll2_establish_connection(hwfn, *handle);
2134 if (rc) {
2135 DP_INFO(cdev, "Failed to establist LL2 OOO connection\n");
2136 goto fail;
2137 }
2138
2139 return 0;
2140
2141fail:
2142 qed_ll2_release_connection(hwfn, *handle);
2143out:
2144 *handle = QED_LL2_UNUSED_HANDLE;
2145 return rc;
2146}
2147
0a7fb11c
YM
2148static int qed_ll2_start(struct qed_dev *cdev, struct qed_ll2_params *params)
2149{
88a2428b 2150 struct qed_ll2_buffer *buffer, *tmp_buffer;
0a7fb11c 2151 enum qed_ll2_conn_type conn_type;
13c54771 2152 struct qed_ll2_acquire_data data;
0a7fb11c
YM
2153 struct qed_ptt *p_ptt;
2154 int rc, i;
0518c12f 2155
0a7fb11c
YM
2156
2157 /* Initialize LL2 locks & lists */
2158 INIT_LIST_HEAD(&cdev->ll2->list);
2159 spin_lock_init(&cdev->ll2->lock);
2160 cdev->ll2->rx_size = NET_SKB_PAD + ETH_HLEN +
2161 L1_CACHE_BYTES + params->mtu;
0a7fb11c
YM
2162
2163 /*Allocate memory for LL2 */
2164 DP_INFO(cdev, "Allocating LL2 buffers of size %08x bytes\n",
2165 cdev->ll2->rx_size);
2166 for (i = 0; i < QED_LL2_RX_SIZE; i++) {
2167 buffer = kzalloc(sizeof(*buffer), GFP_KERNEL);
2168 if (!buffer) {
2169 DP_INFO(cdev, "Failed to allocate LL2 buffers\n");
2170 goto fail;
2171 }
2172
2173 rc = qed_ll2_alloc_buffer(cdev, (u8 **)&buffer->data,
2174 &buffer->phys_addr);
2175 if (rc) {
2176 kfree(buffer);
2177 goto fail;
2178 }
2179
2180 list_add_tail(&buffer->list, &cdev->ll2->list);
2181 }
2182
2183 switch (QED_LEADING_HWFN(cdev)->hw_info.personality) {
1e128c81
AE
2184 case QED_PCI_FCOE:
2185 conn_type = QED_LL2_TYPE_FCOE;
1e128c81 2186 break;
0a7fb11c
YM
2187 case QED_PCI_ISCSI:
2188 conn_type = QED_LL2_TYPE_ISCSI;
2189 break;
2190 case QED_PCI_ETH_ROCE:
2191 conn_type = QED_LL2_TYPE_ROCE;
2192 break;
2193 default:
2194 conn_type = QED_LL2_TYPE_TEST;
2195 }
2196
13c54771 2197 qed_ll2_set_conn_data(cdev, &data, params, conn_type,
0518c12f 2198 &cdev->ll2->handle, false);
0a7fb11c 2199
13c54771 2200 rc = qed_ll2_acquire_connection(QED_LEADING_HWFN(cdev), &data);
0a7fb11c
YM
2201 if (rc) {
2202 DP_INFO(cdev, "Failed to acquire LL2 connection\n");
2203 goto fail;
2204 }
2205
2206 rc = qed_ll2_establish_connection(QED_LEADING_HWFN(cdev),
2207 cdev->ll2->handle);
2208 if (rc) {
2209 DP_INFO(cdev, "Failed to establish LL2 connection\n");
2210 goto release_fail;
2211 }
2212
2213 /* Post all Rx buffers to FW */
2214 spin_lock_bh(&cdev->ll2->lock);
88a2428b 2215 list_for_each_entry_safe(buffer, tmp_buffer, &cdev->ll2->list, list) {
0a7fb11c
YM
2216 rc = qed_ll2_post_rx_buffer(QED_LEADING_HWFN(cdev),
2217 cdev->ll2->handle,
2218 buffer->phys_addr, 0, buffer, 1);
2219 if (rc) {
2220 DP_INFO(cdev,
2221 "Failed to post an Rx buffer; Deleting it\n");
2222 dma_unmap_single(&cdev->pdev->dev, buffer->phys_addr,
2223 cdev->ll2->rx_size, DMA_FROM_DEVICE);
2224 kfree(buffer->data);
2225 list_del(&buffer->list);
2226 kfree(buffer);
2227 } else {
2228 cdev->ll2->rx_cnt++;
2229 }
2230 }
2231 spin_unlock_bh(&cdev->ll2->lock);
2232
2233 if (!cdev->ll2->rx_cnt) {
2234 DP_INFO(cdev, "Failed passing even a single Rx buffer\n");
2235 goto release_terminate;
2236 }
2237
2238 if (!is_valid_ether_addr(params->ll2_mac_address)) {
2239 DP_INFO(cdev, "Invalid Ethernet address\n");
2240 goto release_terminate;
2241 }
2242
1d6cff4f
YM
2243 if (cdev->hwfns[0].hw_info.personality == QED_PCI_ISCSI &&
2244 cdev->hwfns[0].pf_params.iscsi_pf_params.ooo_enable) {
2245 DP_VERBOSE(cdev, QED_MSG_STORAGE, "Starting OOO LL2 queue\n");
2246 rc = qed_ll2_start_ooo(cdev, params);
2247 if (rc) {
2248 DP_INFO(cdev,
2249 "Failed to initialize the OOO LL2 queue\n");
2250 goto release_terminate;
2251 }
2252 }
2253
0a7fb11c
YM
2254 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev));
2255 if (!p_ptt) {
2256 DP_INFO(cdev, "Failed to acquire PTT\n");
2257 goto release_terminate;
2258 }
2259
2260 rc = qed_llh_add_mac_filter(QED_LEADING_HWFN(cdev), p_ptt,
2261 params->ll2_mac_address);
2262 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt);
2263 if (rc) {
2264 DP_ERR(cdev, "Failed to allocate LLH filter\n");
2265 goto release_terminate_all;
2266 }
2267
2268 ether_addr_copy(cdev->ll2_mac_address, params->ll2_mac_address);
0a7fb11c
YM
2269 return 0;
2270
2271release_terminate_all:
2272
2273release_terminate:
2274 qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle);
2275release_fail:
2276 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle);
2277fail:
2278 qed_ll2_kill_buffers(cdev);
2279 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2280 return -EINVAL;
2281}
2282
2283static int qed_ll2_stop(struct qed_dev *cdev)
2284{
2285 struct qed_ptt *p_ptt;
2286 int rc;
2287
2288 if (cdev->ll2->handle == QED_LL2_UNUSED_HANDLE)
2289 return 0;
2290
2291 p_ptt = qed_ptt_acquire(QED_LEADING_HWFN(cdev));
2292 if (!p_ptt) {
2293 DP_INFO(cdev, "Failed to acquire PTT\n");
2294 goto fail;
2295 }
2296
2297 qed_llh_remove_mac_filter(QED_LEADING_HWFN(cdev), p_ptt,
2298 cdev->ll2_mac_address);
2299 qed_ptt_release(QED_LEADING_HWFN(cdev), p_ptt);
2300 eth_zero_addr(cdev->ll2_mac_address);
2301
1d6cff4f
YM
2302 if (cdev->hwfns[0].hw_info.personality == QED_PCI_ISCSI &&
2303 cdev->hwfns[0].pf_params.iscsi_pf_params.ooo_enable)
2304 qed_ll2_stop_ooo(cdev);
2305
0a7fb11c
YM
2306 rc = qed_ll2_terminate_connection(QED_LEADING_HWFN(cdev),
2307 cdev->ll2->handle);
2308 if (rc)
2309 DP_INFO(cdev, "Failed to terminate LL2 connection\n");
2310
2311 qed_ll2_kill_buffers(cdev);
2312
2313 qed_ll2_release_connection(QED_LEADING_HWFN(cdev), cdev->ll2->handle);
2314 cdev->ll2->handle = QED_LL2_UNUSED_HANDLE;
2315
2316 return rc;
2317fail:
2318 return -EINVAL;
2319}
2320
2321static int qed_ll2_start_xmit(struct qed_dev *cdev, struct sk_buff *skb)
2322{
7c7973b2 2323 struct qed_ll2_tx_pkt_info pkt;
0a7fb11c
YM
2324 const skb_frag_t *frag;
2325 int rc = -EINVAL, i;
2326 dma_addr_t mapping;
2327 u16 vlan = 0;
2328 u8 flags = 0;
2329
2330 if (unlikely(skb->ip_summed != CHECKSUM_NONE)) {
2331 DP_INFO(cdev, "Cannot transmit a checksumed packet\n");
2332 return -EINVAL;
2333 }
2334
2335 if (1 + skb_shinfo(skb)->nr_frags > CORE_LL2_TX_MAX_BDS_PER_PACKET) {
2336 DP_ERR(cdev, "Cannot transmit a packet with %d fragments\n",
2337 1 + skb_shinfo(skb)->nr_frags);
2338 return -EINVAL;
2339 }
2340
2341 mapping = dma_map_single(&cdev->pdev->dev, skb->data,
2342 skb->len, DMA_TO_DEVICE);
2343 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
2344 DP_NOTICE(cdev, "SKB mapping failed\n");
2345 return -EINVAL;
2346 }
2347
2348 /* Request HW to calculate IP csum */
2349 if (!((vlan_get_protocol(skb) == htons(ETH_P_IPV6)) &&
2350 ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
be086e7c 2351 flags |= BIT(CORE_TX_BD_DATA_IP_CSUM_SHIFT);
0a7fb11c
YM
2352
2353 if (skb_vlan_tag_present(skb)) {
2354 vlan = skb_vlan_tag_get(skb);
be086e7c 2355 flags |= BIT(CORE_TX_BD_DATA_VLAN_INSERTION_SHIFT);
0a7fb11c
YM
2356 }
2357
7c7973b2
MY
2358 memset(&pkt, 0, sizeof(pkt));
2359 pkt.num_of_bds = 1 + skb_shinfo(skb)->nr_frags;
2360 pkt.vlan = vlan;
2361 pkt.bd_flags = flags;
2362 pkt.tx_dest = QED_LL2_TX_DEST_NW;
2363 pkt.first_frag = mapping;
2364 pkt.first_frag_len = skb->len;
2365 pkt.cookie = skb;
2366
2367 rc = qed_ll2_prepare_tx_packet(&cdev->hwfns[0], cdev->ll2->handle,
2368 &pkt, 1);
0a7fb11c
YM
2369 if (rc)
2370 goto err;
2371
2372 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2373 frag = &skb_shinfo(skb)->frags[i];
d2201a21
MY
2374
2375 mapping = skb_frag_dma_map(&cdev->pdev->dev, frag, 0,
2376 skb_frag_size(frag), DMA_TO_DEVICE);
2377
2378 if (unlikely(dma_mapping_error(&cdev->pdev->dev, mapping))) {
2379 DP_NOTICE(cdev,
2380 "Unable to map frag - dropping packet\n");
2381 goto err;
0a7fb11c
YM
2382 }
2383
2384 rc = qed_ll2_set_fragment_of_tx_packet(QED_LEADING_HWFN(cdev),
2385 cdev->ll2->handle,
2386 mapping,
2387 skb_frag_size(frag));
2388
2389 /* if failed not much to do here, partial packet has been posted
2390 * we can't free memory, will need to wait for completion.
2391 */
2392 if (rc)
2393 goto err2;
2394 }
2395
2396 return 0;
2397
2398err:
2399 dma_unmap_single(&cdev->pdev->dev, mapping, skb->len, DMA_TO_DEVICE);
2400
2401err2:
2402 return rc;
2403}
2404
2405static int qed_ll2_stats(struct qed_dev *cdev, struct qed_ll2_stats *stats)
2406{
2407 if (!cdev->ll2)
2408 return -EINVAL;
2409
2410 return qed_ll2_get_stats(QED_LEADING_HWFN(cdev),
2411 cdev->ll2->handle, stats);
2412}
2413
2414const struct qed_ll2_ops qed_ll2_ops_pass = {
2415 .start = &qed_ll2_start,
2416 .stop = &qed_ll2_stop,
2417 .start_xmit = &qed_ll2_start_xmit,
2418 .register_cb_ops = &qed_ll2_register_cb_ops,
2419 .get_stats = &qed_ll2_stats,
2420};
2421
2422int qed_ll2_alloc_if(struct qed_dev *cdev)
2423{
2424 cdev->ll2 = kzalloc(sizeof(*cdev->ll2), GFP_KERNEL);
2425 return cdev->ll2 ? 0 : -ENOMEM;
2426}
2427
2428void qed_ll2_dealloc_if(struct qed_dev *cdev)
2429{
2430 kfree(cdev->ll2);
2431 cdev->ll2 = NULL;
2432}