[mirror_ubuntu-hirsute-kernel.git] / drivers / net / ethernet / qlogic / qed / qed_rdma.h

/* QLogic qed NIC Driver
 * Copyright (c) 2015-2017  QLogic Corporation
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and /or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */
#ifndef _QED_RDMA_H
#define _QED_RDMA_H
#include <linux/types.h>
#include <linux/bitops.h>
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/slab.h>
#include <linux/spinlock.h>
#include <linux/qed/qed_if.h>
#include <linux/qed/qed_rdma_if.h>
#include "qed.h"
#include "qed_dev_api.h"
#include "qed_hsi.h"
#include "qed_iwarp.h"
#include "qed_roce.h"

#define QED_RDMA_MAX_FMR                    (RDMA_MAX_TIDS)
#define QED_RDMA_MAX_P_KEY                  (1)
#define QED_RDMA_MAX_WQE                    (0x7FFF)
#define QED_RDMA_MAX_SRQ_WQE_ELEM           (0x7FFF)
#define QED_RDMA_PAGE_SIZE_CAPS             (0xFFFFF000)
#define QED_RDMA_ACK_DELAY                  (15)
#define QED_RDMA_MAX_MR_SIZE                (0x10000000000ULL)
#define QED_RDMA_MAX_CQS                    (RDMA_MAX_CQS)
#define QED_RDMA_MAX_MRS                    (RDMA_MAX_TIDS)
/* Add 1 for header element */
#define QED_RDMA_MAX_SRQ_ELEM_PER_WQE	    (RDMA_MAX_SGE_PER_RQ_WQE + 1)
#define QED_RDMA_MAX_SGE_PER_SRQ_WQE        (RDMA_MAX_SGE_PER_RQ_WQE)
#define QED_RDMA_SRQ_WQE_ELEM_SIZE          (16)
#define QED_RDMA_MAX_SRQS                   (32 * 1024)

#define QED_RDMA_MAX_CQE_32_BIT             (0x7FFFFFFF - 1)
#define QED_RDMA_MAX_CQE_16_BIT             (0x7FFF - 1)

/* Up to 2^16 XRC Domains are supported, but the actual number of supported XRC
 * SRQs is much smaller so there's no need to have that many domains.
 */
#define QED_RDMA_MAX_XRCDS      (roundup_pow_of_two(RDMA_MAX_XRC_SRQS))

enum qed_rdma_toggle_bit {
	QED_RDMA_TOGGLE_BIT_CLEAR = 0,
	QED_RDMA_TOGGLE_BIT_SET = 1
};

#define QED_RDMA_MAX_BMAP_NAME	(10)
struct qed_bmap {
	unsigned long *bitmap;
	u32 max_count;
	char name[QED_RDMA_MAX_BMAP_NAME];
};

struct qed_rdma_info {
	/* spin lock to protect bitmaps */
	spinlock_t lock;

	struct qed_bmap cq_map;
	struct qed_bmap pd_map;
	struct qed_bmap xrcd_map;
	struct qed_bmap tid_map;
	struct qed_bmap qp_map;
	struct qed_bmap srq_map;
	struct qed_bmap xrc_srq_map;
	struct qed_bmap cid_map;
	struct qed_bmap tcp_cid_map;
	struct qed_bmap real_cid_map;
	struct qed_bmap dpi_map;
	struct qed_bmap toggle_bits;
	struct qed_rdma_events events;
	struct qed_rdma_device *dev;
	struct qed_rdma_port *port;
	u32 last_tid;
	u8 num_cnqs;
	u32 num_qps;
	u32 num_mrs;
	u32 num_srqs;
	u16 srq_id_offset;
	u16 queue_zone_base;
	u16 max_queue_zones;
	enum protocol_type proto;
	struct qed_iwarp_info iwarp;
	u8 active:1;
};

struct qed_rdma_qp {
	struct regpair qp_handle;
	struct regpair qp_handle_async;
	u32 qpid;
	u16 icid;
	enum qed_roce_qp_state cur_state;
	enum qed_rdma_qp_type qp_type;
	enum qed_iwarp_qp_state iwarp_state;
	bool use_srq;
	bool signal_all;
	bool fmr_and_reserved_lkey;

	bool incoming_rdma_read_en;
	bool incoming_rdma_write_en;
	bool incoming_atomic_en;
	bool e2e_flow_control_en;

	u16 pd;
	u16 pkey;
	u32 dest_qp;
	u16 mtu;
	u16 srq_id;
	u8 traffic_class_tos;
	u8 hop_limit_ttl;
	u16 dpi;
	u32 flow_label;
	bool lb_indication;
	u16 vlan_id;
	u32 ack_timeout;
	u8 retry_cnt;
	u8 rnr_retry_cnt;
	u8 min_rnr_nak_timer;
	bool sqd_async;
	union qed_gid sgid;
	union qed_gid dgid;
	enum roce_mode roce_mode;
	u16 udp_src_port;
	u8 stats_queue;

	/* requeseter */
	u8 max_rd_atomic_req;
	u32 sq_psn;
	u16 sq_cq_id;
	u16 sq_num_pages;
	dma_addr_t sq_pbl_ptr;
	void *orq;
	dma_addr_t orq_phys_addr;
	u8 orq_num_pages;
	bool req_offloaded;
	bool has_req;

	/* responder */
	u8 max_rd_atomic_resp;
	u32 rq_psn;
	u16 rq_cq_id;
	u16 rq_num_pages;
	u16 xrcd_id;
	dma_addr_t rq_pbl_ptr;
	void *irq;
	dma_addr_t irq_phys_addr;
	u8 irq_num_pages;
	bool resp_offloaded;
	u32 cq_prod;
	bool has_resp;

	u8 remote_mac_addr[6];
	u8 local_mac_addr[6];

	void *shared_queue;
	dma_addr_t shared_queue_phys_addr;
	struct qed_iwarp_ep *ep;
	u8 edpm_mode;
};

static inline bool qed_rdma_is_xrc_qp(struct qed_rdma_qp *qp)
{
	if (qp->qp_type == QED_RDMA_QP_TYPE_XRC_TGT ||
	    qp->qp_type == QED_RDMA_QP_TYPE_XRC_INI)
		return true;

	return false;
}
#if IS_ENABLED(CONFIG_QED_RDMA)
void qed_rdma_dpm_bar(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
void qed_rdma_dpm_conf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt);
int qed_rdma_info_alloc(struct qed_hwfn *p_hwfn);
void qed_rdma_info_free(struct qed_hwfn *p_hwfn);
#else
static inline void qed_rdma_dpm_conf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) {}
static inline void qed_rdma_dpm_bar(struct qed_hwfn *p_hwfn,
				    struct qed_ptt *p_ptt) {}
static inline int qed_rdma_info_alloc(struct qed_hwfn *p_hwfn) {return -EINVAL;}
static inline void qed_rdma_info_free(struct qed_hwfn *p_hwfn) {}
#endif

int
qed_rdma_bmap_alloc(struct qed_hwfn *p_hwfn,
		    struct qed_bmap *bmap, u32 max_count, char *name);

void
qed_rdma_bmap_free(struct qed_hwfn *p_hwfn, struct qed_bmap *bmap, bool check);

int
qed_rdma_bmap_alloc_id(struct qed_hwfn *p_hwfn,
		       struct qed_bmap *bmap, u32 *id_num);

void
qed_bmap_set_id(struct qed_hwfn *p_hwfn, struct qed_bmap *bmap, u32 id_num);

void
qed_bmap_release_id(struct qed_hwfn *p_hwfn, struct qed_bmap *bmap, u32 id_num);

int
qed_bmap_test_id(struct qed_hwfn *p_hwfn, struct qed_bmap *bmap, u32 id_num);

void qed_rdma_set_fw_mac(u16 *p_fw_mac, u8 *p_qed_mac);

bool qed_rdma_allocated_qps(struct qed_hwfn *p_hwfn);
#endif
Commit	Line	Data
f1372ee1 KM	1	/* QLogic qed NIC Driver
	2	* Copyright (c) 2015-2017 QLogic Corporation
	3	*
	4	* This software is available to you under a choice of one of two
	5	* licenses. You may choose to be licensed under the terms of the GNU
	6	* General Public License (GPL) Version 2, available from the file
	7	* COPYING in the main directory of this source tree, or the
	8	* OpenIB.org BSD license below:
	9	*
	10	* Redistribution and use in source and binary forms, with or
	11	* without modification, are permitted provided that the following
	12	* conditions are met:
	13	*
	14	* - Redistributions of source code must retain the above
	15	* copyright notice, this list of conditions and the following
	16	* disclaimer.
	17	*
	18	* - Redistributions in binary form must reproduce the above
	19	* copyright notice, this list of conditions and the following
	20	* disclaimer in the documentation and /or other materials
	21	* provided with the distribution.
	22	*
	23	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	24	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	25	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	26	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	27	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	28	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	29	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	30	* SOFTWARE.
	31	*/
b71b9afd KM	32	#ifndef _QED_RDMA_H
b71b9afd KM	33	#define _QED_RDMA_H
f1372ee1 KM	34	#include <linux/types.h>
	35	#include <linux/bitops.h>
	36	#include <linux/kernel.h>
	37	#include <linux/list.h>
	38	#include <linux/slab.h>
	39	#include <linux/spinlock.h>
	40	#include <linux/qed/qed_if.h>
7003cdd6	41	#include <linux/qed/qed_rdma_if.h>
f1372ee1 KM	42	#include "qed.h"
	43	#include "qed_dev_api.h"
	44	#include "qed_hsi.h"
67b40dcc	45	#include "qed_iwarp.h"
b71b9afd	46	#include "qed_roce.h"
f1372ee1 KM	47
	48	#define QED_RDMA_MAX_FMR (RDMA_MAX_TIDS)
	49	#define QED_RDMA_MAX_P_KEY (1)
	50	#define QED_RDMA_MAX_WQE (0x7FFF)
	51	#define QED_RDMA_MAX_SRQ_WQE_ELEM (0x7FFF)
	52	#define QED_RDMA_PAGE_SIZE_CAPS (0xFFFFF000)
	53	#define QED_RDMA_ACK_DELAY (15)
	54	#define QED_RDMA_MAX_MR_SIZE (0x10000000000ULL)
	55	#define QED_RDMA_MAX_CQS (RDMA_MAX_CQS)
	56	#define QED_RDMA_MAX_MRS (RDMA_MAX_TIDS)
	57	/* Add 1 for header element */
	58	#define QED_RDMA_MAX_SRQ_ELEM_PER_WQE (RDMA_MAX_SGE_PER_RQ_WQE + 1)
	59	#define QED_RDMA_MAX_SGE_PER_SRQ_WQE (RDMA_MAX_SGE_PER_RQ_WQE)
	60	#define QED_RDMA_SRQ_WQE_ELEM_SIZE (16)
	61	#define QED_RDMA_MAX_SRQS (32 * 1024)
	62
	63	#define QED_RDMA_MAX_CQE_32_BIT (0x7FFFFFFF - 1)
	64	#define QED_RDMA_MAX_CQE_16_BIT (0x7FFF - 1)
	65
7bfb399e YB	66	/* Up to 2^16 XRC Domains are supported, but the actual number of supported XRC
	67	* SRQs is much smaller so there's no need to have that many domains.
	68	*/
	69	#define QED_RDMA_MAX_XRCDS (roundup_pow_of_two(RDMA_MAX_XRC_SRQS))
	70
f1372ee1 KM	71	enum qed_rdma_toggle_bit {
	72	QED_RDMA_TOGGLE_BIT_CLEAR = 0,
	73	QED_RDMA_TOGGLE_BIT_SET = 1
	74	};
	75
	76	#define QED_RDMA_MAX_BMAP_NAME (10)
	77	struct qed_bmap {
	78	unsigned long *bitmap;
	79	u32 max_count;
	80	char name[QED_RDMA_MAX_BMAP_NAME];
	81	};
	82
	83	struct qed_rdma_info {
	84	/* spin lock to protect bitmaps */
	85	spinlock_t lock;
	86
	87	struct qed_bmap cq_map;
	88	struct qed_bmap pd_map;
7bfb399e	89	struct qed_bmap xrcd_map;
f1372ee1 KM	90	struct qed_bmap tid_map;
	91	struct qed_bmap qp_map;
	92	struct qed_bmap srq_map;
7bfb399e	93	struct qed_bmap xrc_srq_map;
f1372ee1	94	struct qed_bmap cid_map;
456a5849	95	struct qed_bmap tcp_cid_map;
f1372ee1 KM	96	struct qed_bmap real_cid_map;
	97	struct qed_bmap dpi_map;
	98	struct qed_bmap toggle_bits;
	99	struct qed_rdma_events events;
	100	struct qed_rdma_device *dev;
	101	struct qed_rdma_port *port;
	102	u32 last_tid;
	103	u8 num_cnqs;
	104	u32 num_qps;
	105	u32 num_mrs;
39dbc646 YB	106	u32 num_srqs;
39dbc646 YB	107	u16 srq_id_offset;
f1372ee1 KM	108	u16 queue_zone_base;
	109	u16 max_queue_zones;
	110	enum protocol_type proto;
67b40dcc	111	struct qed_iwarp_info iwarp;
291d57f6	112	u8 active:1;
f1372ee1 KM	113	};
	114
	115	struct qed_rdma_qp {
	116	struct regpair qp_handle;
	117	struct regpair qp_handle_async;
	118	u32 qpid;
	119	u16 icid;
	120	enum qed_roce_qp_state cur_state;
7bfb399e	121	enum qed_rdma_qp_type qp_type;
67b40dcc	122	enum qed_iwarp_qp_state iwarp_state;
f1372ee1 KM	123	bool use_srq;
	124	bool signal_all;
	125	bool fmr_and_reserved_lkey;
	126
	127	bool incoming_rdma_read_en;
	128	bool incoming_rdma_write_en;
	129	bool incoming_atomic_en;
	130	bool e2e_flow_control_en;
	131
	132	u16 pd;
	133	u16 pkey;
	134	u32 dest_qp;
	135	u16 mtu;
	136	u16 srq_id;
	137	u8 traffic_class_tos;
	138	u8 hop_limit_ttl;
	139	u16 dpi;
	140	u32 flow_label;
	141	bool lb_indication;
	142	u16 vlan_id;
	143	u32 ack_timeout;
	144	u8 retry_cnt;
	145	u8 rnr_retry_cnt;
	146	u8 min_rnr_nak_timer;
	147	bool sqd_async;
	148	union qed_gid sgid;
	149	union qed_gid dgid;
	150	enum roce_mode roce_mode;
	151	u16 udp_src_port;
	152	u8 stats_queue;
	153
	154	/* requeseter */
	155	u8 max_rd_atomic_req;
	156	u32 sq_psn;
	157	u16 sq_cq_id;
	158	u16 sq_num_pages;
	159	dma_addr_t sq_pbl_ptr;
	160	void *orq;
	161	dma_addr_t orq_phys_addr;
	162	u8 orq_num_pages;
	163	bool req_offloaded;
7bfb399e	164	bool has_req;
f1372ee1 KM	165
	166	/* responder */
	167	u8 max_rd_atomic_resp;
	168	u32 rq_psn;
	169	u16 rq_cq_id;
	170	u16 rq_num_pages;
7bfb399e	171	u16 xrcd_id;
f1372ee1 KM	172	dma_addr_t rq_pbl_ptr;
	173	void *irq;
	174	dma_addr_t irq_phys_addr;
	175	u8 irq_num_pages;
	176	bool resp_offloaded;
	177	u32 cq_prod;
7bfb399e	178	bool has_resp;
f1372ee1 KM	179
	180	u8 remote_mac_addr[6];
	181	u8 local_mac_addr[6];
	182
	183	void *shared_queue;
	184	dma_addr_t shared_queue_phys_addr;
456a5849	185	struct qed_iwarp_ep *ep;
ff937b91	186	u8 edpm_mode;
f1372ee1 KM	187	};
f1372ee1 KM	188
7bfb399e YB	189	static inline bool qed_rdma_is_xrc_qp(struct qed_rdma_qp *qp)
	190	{
	191	if (qp->qp_type == QED_RDMA_QP_TYPE_XRC_TGT \|\|
	192	qp->qp_type == QED_RDMA_QP_TYPE_XRC_INI)
	193	return true;
	194
	195	return false;
	196	}
f1372ee1 KM	197	#if IS_ENABLED(CONFIG_QED_RDMA)
f1372ee1 KM	198	void qed_rdma_dpm_bar(struct qed_hwfn p_hwfn, struct qed_ptt p_ptt);
b71b9afd	199	void qed_rdma_dpm_conf(struct qed_hwfn p_hwfn, struct qed_ptt p_ptt);
291d57f6 MK	200	int qed_rdma_info_alloc(struct qed_hwfn *p_hwfn);
291d57f6 MK	201	void qed_rdma_info_free(struct qed_hwfn *p_hwfn);
f1372ee1	202	#else
b71b9afd KM	203	static inline void qed_rdma_dpm_conf(struct qed_hwfn p_hwfn, struct qed_ptt p_ptt) {}
	204	static inline void qed_rdma_dpm_bar(struct qed_hwfn *p_hwfn,
	205	struct qed_ptt *p_ptt) {}
a97b9565	206	static inline int qed_rdma_info_alloc(struct qed_hwfn *p_hwfn) {return -EINVAL;}
291d57f6	207	static inline void qed_rdma_info_free(struct qed_hwfn *p_hwfn) {}
f1372ee1	208	#endif
b71b9afd KM	209
	210	int
	211	qed_rdma_bmap_alloc(struct qed_hwfn *p_hwfn,
	212	struct qed_bmap bmap, u32 max_count, char name);
	213
	214	void
	215	qed_rdma_bmap_free(struct qed_hwfn p_hwfn, struct qed_bmap bmap, bool check);
	216
	217	int
	218	qed_rdma_bmap_alloc_id(struct qed_hwfn *p_hwfn,
	219	struct qed_bmap bmap, u32 id_num);
	220
	221	void
	222	qed_bmap_set_id(struct qed_hwfn p_hwfn, struct qed_bmap bmap, u32 id_num);
	223
	224	void
	225	qed_bmap_release_id(struct qed_hwfn p_hwfn, struct qed_bmap bmap, u32 id_num);
	226
	227	int
	228	qed_bmap_test_id(struct qed_hwfn p_hwfn, struct qed_bmap bmap, u32 id_num);
	229
	230	void qed_rdma_set_fw_mac(u16 p_fw_mac, u8 p_qed_mac);
	231
	232	bool qed_rdma_allocated_qps(struct qed_hwfn *p_hwfn);
f1372ee1	233	#endif