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qed: Remove assumption on SB order in IGU
[mirror_ubuntu-eoan-kernel.git] / drivers / net / ethernet / qlogic / qed / qed_sriov.c
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32a47e72 1/* QLogic qed NIC Driver
e8f1cb50 2 * Copyright (c) 2015-2017 QLogic Corporation
32a47e72 3 *
e8f1cb50
MY		 4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and /or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
32a47e72
YM		 31 */
32
dacd88d6 33#include <linux/etherdevice.h>
36558c3d 34#include <linux/crc32.h>
f29ffdb6 35#include <linux/vmalloc.h>
0b55e27d 36#include <linux/qed/qed_iov_if.h>
1408cc1f
YM		 37#include "qed_cxt.h"
38#include "qed_hsi.h"
32a47e72 39#include "qed_hw.h"
1408cc1f 40#include "qed_init_ops.h"
32a47e72 41#include "qed_int.h"
1408cc1f 42#include "qed_mcp.h"
32a47e72 43#include "qed_reg_addr.h"
1408cc1f 44#include "qed_sp.h"
32a47e72
YM		 45#include "qed_sriov.h"
46#include "qed_vf.h"
47
1408cc1f 48/* IOV ramrods */
1fe614d1 49static int qed_sp_vf_start(struct qed_hwfn *p_hwfn, struct qed_vf_info *p_vf)
1408cc1f
YM		 50{
51 struct vf_start_ramrod_data *p_ramrod = NULL;
52 struct qed_spq_entry *p_ent = NULL;
53 struct qed_sp_init_data init_data;
54 int rc = -EINVAL;
1fe614d1 55 u8 fp_minor;
1408cc1f
YM		 56
57 /* Get SPQ entry */
58 memset(&init_data, 0, sizeof(init_data));
59 init_data.cid = qed_spq_get_cid(p_hwfn);
1fe614d1 60 init_data.opaque_fid = p_vf->opaque_fid;
1408cc1f
YM		 61 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
62
63 rc = qed_sp_init_request(p_hwfn, &p_ent,
64 COMMON_RAMROD_VF_START,
65 PROTOCOLID_COMMON, &init_data);
66 if (rc)
67 return rc;
68
69 p_ramrod = &p_ent->ramrod.vf_start;
70
1fe614d1
YM		 71 p_ramrod->vf_id = GET_FIELD(p_vf->concrete_fid, PXP_CONCRETE_FID_VFID);
72 p_ramrod->opaque_fid = cpu_to_le16(p_vf->opaque_fid);
73
74 switch (p_hwfn->hw_info.personality) {
75 case QED_PCI_ETH:
76 p_ramrod->personality = PERSONALITY_ETH;
77 break;
78 case QED_PCI_ETH_ROCE:
79 p_ramrod->personality = PERSONALITY_RDMA_AND_ETH;
80 break;
81 default:
82 DP_NOTICE(p_hwfn, "Unknown VF personality %d\n",
83 p_hwfn->hw_info.personality);
84 return -EINVAL;
85 }
86
87 fp_minor = p_vf->acquire.vfdev_info.eth_fp_hsi_minor;
a044df83
YM		 88 if (fp_minor > ETH_HSI_VER_MINOR &&
89 fp_minor != ETH_HSI_VER_NO_PKT_LEN_TUNN) {
1fe614d1
YM		 90 DP_VERBOSE(p_hwfn,
91 QED_MSG_IOV,
92 "VF [%d] - Requested fp hsi %02x.%02x which is slightly newer than PF's %02x.%02x; Configuring PFs version\n",
93 p_vf->abs_vf_id,
94 ETH_HSI_VER_MAJOR,
95 fp_minor, ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
96 fp_minor = ETH_HSI_VER_MINOR;
97 }
1408cc1f 98
351a4ded 99 p_ramrod->hsi_fp_ver.major_ver_arr[ETH_VER_KEY] = ETH_HSI_VER_MAJOR;
1fe614d1
YM		 100 p_ramrod->hsi_fp_ver.minor_ver_arr[ETH_VER_KEY] = fp_minor;
101
102 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
103 "VF[%d] - Starting using HSI %02x.%02x\n",
104 p_vf->abs_vf_id, ETH_HSI_VER_MAJOR, fp_minor);
1408cc1f
YM		 105
106 return qed_spq_post(p_hwfn, p_ent, NULL);
107}
108
0b55e27d
YM		 109static int qed_sp_vf_stop(struct qed_hwfn *p_hwfn,
110 u32 concrete_vfid, u16 opaque_vfid)
111{
112 struct vf_stop_ramrod_data *p_ramrod = NULL;
113 struct qed_spq_entry *p_ent = NULL;
114 struct qed_sp_init_data init_data;
115 int rc = -EINVAL;
116
117 /* Get SPQ entry */
118 memset(&init_data, 0, sizeof(init_data));
119 init_data.cid = qed_spq_get_cid(p_hwfn);
120 init_data.opaque_fid = opaque_vfid;
121 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
122
123 rc = qed_sp_init_request(p_hwfn, &p_ent,
124 COMMON_RAMROD_VF_STOP,
125 PROTOCOLID_COMMON, &init_data);
126 if (rc)
127 return rc;
128
129 p_ramrod = &p_ent->ramrod.vf_stop;
130
131 p_ramrod->vf_id = GET_FIELD(concrete_vfid, PXP_CONCRETE_FID_VFID);
132
133 return qed_spq_post(p_hwfn, p_ent, NULL);
134}
135
ba56947a 136static bool qed_iov_is_valid_vfid(struct qed_hwfn *p_hwfn,
7eff82b0
YM		 137 int rel_vf_id,
138 bool b_enabled_only, bool b_non_malicious)
32a47e72
YM		 139{
140 if (!p_hwfn->pf_iov_info) {
141 DP_NOTICE(p_hwfn->cdev, "No iov info\n");
142 return false;
143 }
144
145 if ((rel_vf_id >= p_hwfn->cdev->p_iov_info->total_vfs) ||
146 (rel_vf_id < 0))
147 return false;
148
149 if ((!p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_init) &&
150 b_enabled_only)
151 return false;
152
7eff82b0
YM		 153 if ((p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_malicious) &&
154 b_non_malicious)
155 return false;
156
32a47e72
YM		 157 return true;
158}
159
37bff2b9
YM		 160static struct qed_vf_info *qed_iov_get_vf_info(struct qed_hwfn *p_hwfn,
161 u16 relative_vf_id,
162 bool b_enabled_only)
163{
164 struct qed_vf_info *vf = NULL;
165
166 if (!p_hwfn->pf_iov_info) {
167 DP_NOTICE(p_hwfn->cdev, "No iov info\n");
168 return NULL;
169 }
170
7eff82b0
YM		 171 if (qed_iov_is_valid_vfid(p_hwfn, relative_vf_id,
172 b_enabled_only, false))
37bff2b9
YM		 173 vf = &p_hwfn->pf_iov_info->vfs_array[relative_vf_id];
174 else
175 DP_ERR(p_hwfn, "qed_iov_get_vf_info: VF[%d] is not enabled\n",
176 relative_vf_id);
177
178 return vf;
179}
180
f109c240
MY		 181enum qed_iov_validate_q_mode {
182 QED_IOV_VALIDATE_Q_NA,
183 QED_IOV_VALIDATE_Q_ENABLE,
184 QED_IOV_VALIDATE_Q_DISABLE,
185};
186
187static bool qed_iov_validate_queue_mode(struct qed_hwfn *p_hwfn,
188 struct qed_vf_info *p_vf,
189 u16 qid,
190 enum qed_iov_validate_q_mode mode,
191 bool b_is_tx)
192{
193 if (mode == QED_IOV_VALIDATE_Q_NA)
194 return true;
195
196 if ((b_is_tx && p_vf->vf_queues[qid].p_tx_cid) ||
197 (!b_is_tx && p_vf->vf_queues[qid].p_rx_cid))
198 return mode == QED_IOV_VALIDATE_Q_ENABLE;
199
200 /* In case we haven't found any valid cid, then its disabled */
201 return mode == QED_IOV_VALIDATE_Q_DISABLE;
202}
203
41086467 204static bool qed_iov_validate_rxq(struct qed_hwfn *p_hwfn,
f109c240
MY		 205 struct qed_vf_info *p_vf,
206 u16 rx_qid,
207 enum qed_iov_validate_q_mode mode)
41086467 208{
f109c240 209 if (rx_qid >= p_vf->num_rxqs) {
41086467
YM		 210 DP_VERBOSE(p_hwfn,
211 QED_MSG_IOV,
212 "VF[0x%02x] - can't touch Rx queue[%04x]; Only 0x%04x are allocated\n",
213 p_vf->abs_vf_id, rx_qid, p_vf->num_rxqs);
f109c240
MY		 214 return false;
215 }
216
217 return qed_iov_validate_queue_mode(p_hwfn, p_vf, rx_qid, mode, false);
41086467
YM		 218}
219
220static bool qed_iov_validate_txq(struct qed_hwfn *p_hwfn,
f109c240
MY		 221 struct qed_vf_info *p_vf,
222 u16 tx_qid,
223 enum qed_iov_validate_q_mode mode)
41086467 224{
f109c240 225 if (tx_qid >= p_vf->num_txqs) {
41086467
YM		 226 DP_VERBOSE(p_hwfn,
227 QED_MSG_IOV,
228 "VF[0x%02x] - can't touch Tx queue[%04x]; Only 0x%04x are allocated\n",
229 p_vf->abs_vf_id, tx_qid, p_vf->num_txqs);
f109c240
MY		 230 return false;
231 }
232
233 return qed_iov_validate_queue_mode(p_hwfn, p_vf, tx_qid, mode, true);
41086467
YM		 234}
235
236static bool qed_iov_validate_sb(struct qed_hwfn *p_hwfn,
237 struct qed_vf_info *p_vf, u16 sb_idx)
238{
239 int i;
240
241 for (i = 0; i < p_vf->num_sbs; i++)
242 if (p_vf->igu_sbs[i] == sb_idx)
243 return true;
244
245 DP_VERBOSE(p_hwfn,
246 QED_MSG_IOV,
247 "VF[0%02x] - tried using sb_idx %04x which doesn't exist as one of its 0x%02x SBs\n",
248 p_vf->abs_vf_id, sb_idx, p_vf->num_sbs);
249
250 return false;
251}
252
f109c240
MY		 253static bool qed_iov_validate_active_rxq(struct qed_hwfn *p_hwfn,
254 struct qed_vf_info *p_vf)
255{
256 u8 i;
257
258 for (i = 0; i < p_vf->num_rxqs; i++)
259 if (qed_iov_validate_queue_mode(p_hwfn, p_vf, i,
260 QED_IOV_VALIDATE_Q_ENABLE,
261 false))
262 return true;
263
264 return false;
265}
266
267static bool qed_iov_validate_active_txq(struct qed_hwfn *p_hwfn,
268 struct qed_vf_info *p_vf)
269{
270 u8 i;
271
272 for (i = 0; i < p_vf->num_txqs; i++)
273 if (qed_iov_validate_queue_mode(p_hwfn, p_vf, i,
274 QED_IOV_VALIDATE_Q_ENABLE,
275 true))
276 return true;
277
278 return false;
279}
280
ba56947a
BX		 281static int qed_iov_post_vf_bulletin(struct qed_hwfn *p_hwfn,
282 int vfid, struct qed_ptt *p_ptt)
36558c3d
YM		 283{
284 struct qed_bulletin_content *p_bulletin;
285 int crc_size = sizeof(p_bulletin->crc);
286 struct qed_dmae_params params;
287 struct qed_vf_info *p_vf;
288
289 p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
290 if (!p_vf)
291 return -EINVAL;
292
293 if (!p_vf->vf_bulletin)
294 return -EINVAL;
295
296 p_bulletin = p_vf->bulletin.p_virt;
297
298 /* Increment bulletin board version and compute crc */
299 p_bulletin->version++;
300 p_bulletin->crc = crc32(0, (u8 *)p_bulletin + crc_size,
301 p_vf->bulletin.size - crc_size);
302
303 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
304 "Posting Bulletin 0x%08x to VF[%d] (CRC 0x%08x)\n",
305 p_bulletin->version, p_vf->relative_vf_id, p_bulletin->crc);
306
307 /* propagate bulletin board via dmae to vm memory */
308 memset(&params, 0, sizeof(params));
309 params.flags = QED_DMAE_FLAG_VF_DST;
310 params.dst_vfid = p_vf->abs_vf_id;
311 return qed_dmae_host2host(p_hwfn, p_ptt, p_vf->bulletin.phys,
312 p_vf->vf_bulletin, p_vf->bulletin.size / 4,
313 &params);
314}
315
32a47e72
YM		 316static int qed_iov_pci_cfg_info(struct qed_dev *cdev)
317{
318 struct qed_hw_sriov_info *iov = cdev->p_iov_info;
319 int pos = iov->pos;
320
321 DP_VERBOSE(cdev, QED_MSG_IOV, "sriov ext pos %d\n", pos);
322 pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
323
324 pci_read_config_word(cdev->pdev,
325 pos + PCI_SRIOV_TOTAL_VF, &iov->total_vfs);
326 pci_read_config_word(cdev->pdev,
327 pos + PCI_SRIOV_INITIAL_VF, &iov->initial_vfs);
328
329 pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_NUM_VF, &iov->num_vfs);
330 if (iov->num_vfs) {
331 DP_VERBOSE(cdev,
332 QED_MSG_IOV,
333 "Number of VFs are already set to non-zero value. Ignoring PCI configuration value\n");
334 iov->num_vfs = 0;
335 }
336
337 pci_read_config_word(cdev->pdev,
338 pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
339
340 pci_read_config_word(cdev->pdev,
341 pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
342
343 pci_read_config_word(cdev->pdev,
344 pos + PCI_SRIOV_VF_DID, &iov->vf_device_id);
345
346 pci_read_config_dword(cdev->pdev,
347 pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
348
349 pci_read_config_dword(cdev->pdev, pos + PCI_SRIOV_CAP, &iov->cap);
350
351 pci_read_config_byte(cdev->pdev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
352
353 DP_VERBOSE(cdev,
354 QED_MSG_IOV,
355 "IOV info: nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
356 iov->nres,
357 iov->cap,
358 iov->ctrl,
359 iov->total_vfs,
360 iov->initial_vfs,
361 iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
362
363 /* Some sanity checks */
364 if (iov->num_vfs > NUM_OF_VFS(cdev) ||
365 iov->total_vfs > NUM_OF_VFS(cdev)) {
366 /* This can happen only due to a bug. In this case we set
367 * num_vfs to zero to avoid memory corruption in the code that
368 * assumes max number of vfs
369 */
370 DP_NOTICE(cdev,
371 "IOV: Unexpected number of vfs set: %d setting num_vf to zero\n",
372 iov->num_vfs);
373
374 iov->num_vfs = 0;
375 iov->total_vfs = 0;
376 }
377
378 return 0;
379}
380
381static void qed_iov_clear_vf_igu_blocks(struct qed_hwfn *p_hwfn,
382 struct qed_ptt *p_ptt)
383{
384 struct qed_igu_block *p_sb;
385 u16 sb_id;
386 u32 val;
387
388 if (!p_hwfn->hw_info.p_igu_info) {
389 DP_ERR(p_hwfn,
390 "qed_iov_clear_vf_igu_blocks IGU Info not initialized\n");
391 return;
392 }
393
394 for (sb_id = 0; sb_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev);
395 sb_id++) {
d749dd0d 396 p_sb = &p_hwfn->hw_info.p_igu_info->entry[sb_id];
32a47e72
YM		 397 if ((p_sb->status & QED_IGU_STATUS_FREE) &&
398 !(p_sb->status & QED_IGU_STATUS_PF)) {
399 val = qed_rd(p_hwfn, p_ptt,
400 IGU_REG_MAPPING_MEMORY + sb_id * 4);
401 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
402 qed_wr(p_hwfn, p_ptt,
403 IGU_REG_MAPPING_MEMORY + 4 * sb_id, val);
404 }
405 }
406}
407
408static void qed_iov_setup_vfdb(struct qed_hwfn *p_hwfn)
409{
410 struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
411 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
412 struct qed_bulletin_content *p_bulletin_virt;
413 dma_addr_t req_p, rply_p, bulletin_p;
414 union pfvf_tlvs *p_reply_virt_addr;
415 union vfpf_tlvs *p_req_virt_addr;
416 u8 idx = 0;
417
418 memset(p_iov_info->vfs_array, 0, sizeof(p_iov_info->vfs_array));
419
420 p_req_virt_addr = p_iov_info->mbx_msg_virt_addr;
421 req_p = p_iov_info->mbx_msg_phys_addr;
422 p_reply_virt_addr = p_iov_info->mbx_reply_virt_addr;
423 rply_p = p_iov_info->mbx_reply_phys_addr;
424 p_bulletin_virt = p_iov_info->p_bulletins;
425 bulletin_p = p_iov_info->bulletins_phys;
426 if (!p_req_virt_addr || !p_reply_virt_addr || !p_bulletin_virt) {
427 DP_ERR(p_hwfn,
428 "qed_iov_setup_vfdb called without allocating mem first\n");
429 return;
430 }
431
432 for (idx = 0; idx < p_iov->total_vfs; idx++) {
433 struct qed_vf_info *vf = &p_iov_info->vfs_array[idx];
434 u32 concrete;
435
436 vf->vf_mbx.req_virt = p_req_virt_addr + idx;
437 vf->vf_mbx.req_phys = req_p + idx * sizeof(union vfpf_tlvs);
438 vf->vf_mbx.reply_virt = p_reply_virt_addr + idx;
439 vf->vf_mbx.reply_phys = rply_p + idx * sizeof(union pfvf_tlvs);
440
441 vf->state = VF_STOPPED;
442 vf->b_init = false;
443
444 vf->bulletin.phys = idx *
445 sizeof(struct qed_bulletin_content) +
446 bulletin_p;
447 vf->bulletin.p_virt = p_bulletin_virt + idx;
448 vf->bulletin.size = sizeof(struct qed_bulletin_content);
449
450 vf->relative_vf_id = idx;
451 vf->abs_vf_id = idx + p_iov->first_vf_in_pf;
452 concrete = qed_vfid_to_concrete(p_hwfn, vf->abs_vf_id);
453 vf->concrete_fid = concrete;
454 vf->opaque_fid = (p_hwfn->hw_info.opaque_fid & 0xff) |
455 (vf->abs_vf_id << 8);
456 vf->vport_id = idx + 1;
1cf2b1a9
YM		 457
458 vf->num_mac_filters = QED_ETH_VF_NUM_MAC_FILTERS;
459 vf->num_vlan_filters = QED_ETH_VF_NUM_VLAN_FILTERS;
32a47e72
YM		 460 }
461}
462
463static int qed_iov_allocate_vfdb(struct qed_hwfn *p_hwfn)
464{
465 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
466 void **p_v_addr;
467 u16 num_vfs = 0;
468
469 num_vfs = p_hwfn->cdev->p_iov_info->total_vfs;
470
471 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
472 "qed_iov_allocate_vfdb for %d VFs\n", num_vfs);
473
474 /* Allocate PF Mailbox buffer (per-VF) */
475 p_iov_info->mbx_msg_size = sizeof(union vfpf_tlvs) * num_vfs;
476 p_v_addr = &p_iov_info->mbx_msg_virt_addr;
477 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
478 p_iov_info->mbx_msg_size,
479 &p_iov_info->mbx_msg_phys_addr,
480 GFP_KERNEL);
481 if (!*p_v_addr)
482 return -ENOMEM;
483
484 /* Allocate PF Mailbox Reply buffer (per-VF) */
485 p_iov_info->mbx_reply_size = sizeof(union pfvf_tlvs) * num_vfs;
486 p_v_addr = &p_iov_info->mbx_reply_virt_addr;
487 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
488 p_iov_info->mbx_reply_size,
489 &p_iov_info->mbx_reply_phys_addr,
490 GFP_KERNEL);
491 if (!*p_v_addr)
492 return -ENOMEM;
493
494 p_iov_info->bulletins_size = sizeof(struct qed_bulletin_content) *
495 num_vfs;
496 p_v_addr = &p_iov_info->p_bulletins;
497 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
498 p_iov_info->bulletins_size,
499 &p_iov_info->bulletins_phys,
500 GFP_KERNEL);
501 if (!*p_v_addr)
502 return -ENOMEM;
503
504 DP_VERBOSE(p_hwfn,
505 QED_MSG_IOV,
506 "PF's Requests mailbox [%p virt 0x%llx phys], Response mailbox [%p virt 0x%llx phys] Bulletins [%p virt 0x%llx phys]\n",
507 p_iov_info->mbx_msg_virt_addr,
508 (u64) p_iov_info->mbx_msg_phys_addr,
509 p_iov_info->mbx_reply_virt_addr,
510 (u64) p_iov_info->mbx_reply_phys_addr,
511 p_iov_info->p_bulletins, (u64) p_iov_info->bulletins_phys);
512
513 return 0;
514}
515
516static void qed_iov_free_vfdb(struct qed_hwfn *p_hwfn)
517{
518 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
519
520 if (p_hwfn->pf_iov_info->mbx_msg_virt_addr)
521 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
522 p_iov_info->mbx_msg_size,
523 p_iov_info->mbx_msg_virt_addr,
524 p_iov_info->mbx_msg_phys_addr);
525
526 if (p_hwfn->pf_iov_info->mbx_reply_virt_addr)
527 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
528 p_iov_info->mbx_reply_size,
529 p_iov_info->mbx_reply_virt_addr,
530 p_iov_info->mbx_reply_phys_addr);
531
532 if (p_iov_info->p_bulletins)
533 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
534 p_iov_info->bulletins_size,
535 p_iov_info->p_bulletins,
536 p_iov_info->bulletins_phys);
537}
538
539int qed_iov_alloc(struct qed_hwfn *p_hwfn)
540{
541 struct qed_pf_iov *p_sriov;
542
543 if (!IS_PF_SRIOV(p_hwfn)) {
544 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
545 "No SR-IOV - no need for IOV db\n");
546 return 0;
547 }
548
549 p_sriov = kzalloc(sizeof(*p_sriov), GFP_KERNEL);
2591c280 550 if (!p_sriov)
32a47e72 551 return -ENOMEM;
32a47e72
YM		 552
553 p_hwfn->pf_iov_info = p_sriov;
554
555 return qed_iov_allocate_vfdb(p_hwfn);
556}
557
558void qed_iov_setup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
559{
560 if (!IS_PF_SRIOV(p_hwfn) || !IS_PF_SRIOV_ALLOC(p_hwfn))
561 return;
562
563 qed_iov_setup_vfdb(p_hwfn);
564 qed_iov_clear_vf_igu_blocks(p_hwfn, p_ptt);
565}
566
567void qed_iov_free(struct qed_hwfn *p_hwfn)
568{
569 if (IS_PF_SRIOV_ALLOC(p_hwfn)) {
570 qed_iov_free_vfdb(p_hwfn);
571 kfree(p_hwfn->pf_iov_info);
572 }
573}
574
575void qed_iov_free_hw_info(struct qed_dev *cdev)
576{
577 kfree(cdev->p_iov_info);
578 cdev->p_iov_info = NULL;
579}
580
581int qed_iov_hw_info(struct qed_hwfn *p_hwfn)
582{
583 struct qed_dev *cdev = p_hwfn->cdev;
584 int pos;
585 int rc;
586
1408cc1f
YM		 587 if (IS_VF(p_hwfn->cdev))
588 return 0;
589
32a47e72
YM		 590 /* Learn the PCI configuration */
591 pos = pci_find_ext_capability(p_hwfn->cdev->pdev,
592 PCI_EXT_CAP_ID_SRIOV);
593 if (!pos) {
594 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No PCIe IOV support\n");
595 return 0;
596 }
597
598 /* Allocate a new struct for IOV information */
599 cdev->p_iov_info = kzalloc(sizeof(*cdev->p_iov_info), GFP_KERNEL);
2591c280 600 if (!cdev->p_iov_info)
32a47e72 601 return -ENOMEM;
2591c280 602
32a47e72
YM		 603 cdev->p_iov_info->pos = pos;
604
605 rc = qed_iov_pci_cfg_info(cdev);
606 if (rc)
607 return rc;
608
609 /* We want PF IOV to be synonemous with the existance of p_iov_info;
610 * In case the capability is published but there are no VFs, simply
611 * de-allocate the struct.
612 */
613 if (!cdev->p_iov_info->total_vfs) {
614 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
615 "IOV capabilities, but no VFs are published\n");
616 kfree(cdev->p_iov_info);
617 cdev->p_iov_info = NULL;
618 return 0;
619 }
620
9c79ddaa
MY		 621 /* First VF index based on offset is tricky:
622 * - If ARI is supported [likely], offset - (16 - pf_id) would
623 * provide the number for eng0. 2nd engine Vfs would begin
624 * after the first engine's VFs.
625 * - If !ARI, VFs would start on next device.
626 * so offset - (256 - pf_id) would provide the number.
627 * Utilize the fact that (256 - pf_id) is achieved only by later
8ac1ed79 628 * to differentiate between the two.
32a47e72 629 */
9c79ddaa
MY		 630
631 if (p_hwfn->cdev->p_iov_info->offset < (256 - p_hwfn->abs_pf_id)) {
632 u32 first = p_hwfn->cdev->p_iov_info->offset +
633 p_hwfn->abs_pf_id - 16;
634
635 cdev->p_iov_info->first_vf_in_pf = first;
636
637 if (QED_PATH_ID(p_hwfn))
638 cdev->p_iov_info->first_vf_in_pf -= MAX_NUM_VFS_BB;
639 } else {
640 u32 first = p_hwfn->cdev->p_iov_info->offset +
641 p_hwfn->abs_pf_id - 256;
642
643 cdev->p_iov_info->first_vf_in_pf = first;
644 }
32a47e72
YM		 645
646 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
647 "First VF in hwfn 0x%08x\n",
648 cdev->p_iov_info->first_vf_in_pf);
649
650 return 0;
651}
652
7eff82b0
YM		 653bool _qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn,
654 int vfid, bool b_fail_malicious)
37bff2b9
YM		 655{
656 /* Check PF supports sriov */
b0409fa0
YM		 657 if (IS_VF(p_hwfn->cdev) || !IS_QED_SRIOV(p_hwfn->cdev) ||
658 !IS_PF_SRIOV_ALLOC(p_hwfn))
37bff2b9
YM		 659 return false;
660
661 /* Check VF validity */
7eff82b0 662 if (!qed_iov_is_valid_vfid(p_hwfn, vfid, true, b_fail_malicious))
37bff2b9
YM		 663 return false;
664
665 return true;
666}
667
7eff82b0
YM		 668bool qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn, int vfid)
669{
670 return _qed_iov_pf_sanity_check(p_hwfn, vfid, true);
671}
672
0b55e27d
YM		 673static void qed_iov_set_vf_to_disable(struct qed_dev *cdev,
674 u16 rel_vf_id, u8 to_disable)
675{
676 struct qed_vf_info *vf;
677 int i;
678
679 for_each_hwfn(cdev, i) {
680 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
681
682 vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
683 if (!vf)
684 continue;
685
686 vf->to_disable = to_disable;
687 }
688}
689
ba56947a 690static void qed_iov_set_vfs_to_disable(struct qed_dev *cdev, u8 to_disable)
0b55e27d
YM		 691{
692 u16 i;
693
694 if (!IS_QED_SRIOV(cdev))
695 return;
696
697 for (i = 0; i < cdev->p_iov_info->total_vfs; i++)
698 qed_iov_set_vf_to_disable(cdev, i, to_disable);
699}
700
1408cc1f
YM		 701static void qed_iov_vf_pglue_clear_err(struct qed_hwfn *p_hwfn,
702 struct qed_ptt *p_ptt, u8 abs_vfid)
703{
704 qed_wr(p_hwfn, p_ptt,
705 PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR + (abs_vfid >> 5) * 4,
706 1 << (abs_vfid & 0x1f));
707}
708
dacd88d6
YM		 709static void qed_iov_vf_igu_reset(struct qed_hwfn *p_hwfn,
710 struct qed_ptt *p_ptt, struct qed_vf_info *vf)
711{
dacd88d6
YM		 712 int i;
713
714 /* Set VF masks and configuration - pretend */
715 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
716
717 qed_wr(p_hwfn, p_ptt, IGU_REG_STATISTIC_NUM_VF_MSG_SENT, 0);
718
dacd88d6
YM		 719 /* unpretend */
720 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
721
722 /* iterate over all queues, clear sb consumer */
b2b897eb
YM		 723 for (i = 0; i < vf->num_sbs; i++)
724 qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
725 vf->igu_sbs[i],
726 vf->opaque_fid, true);
dacd88d6
YM		 727}
728
0b55e27d
YM		 729static void qed_iov_vf_igu_set_int(struct qed_hwfn *p_hwfn,
730 struct qed_ptt *p_ptt,
731 struct qed_vf_info *vf, bool enable)
732{
733 u32 igu_vf_conf;
734
735 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
736
737 igu_vf_conf = qed_rd(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION);
738
739 if (enable)
740 igu_vf_conf |= IGU_VF_CONF_MSI_MSIX_EN;
741 else
742 igu_vf_conf &= ~IGU_VF_CONF_MSI_MSIX_EN;
743
744 qed_wr(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION, igu_vf_conf);
745
746 /* unpretend */
747 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
748}
749
88072fd4
MY		 750static int
751qed_iov_enable_vf_access_msix(struct qed_hwfn *p_hwfn,
752 struct qed_ptt *p_ptt, u8 abs_vf_id, u8 num_sbs)
753{
754 u8 current_max = 0;
755 int i;
756
757 /* For AH onward, configuration is per-PF. Find maximum of all
758 * the currently enabled child VFs, and set the number to be that.
759 */
760 if (!QED_IS_BB(p_hwfn->cdev)) {
761 qed_for_each_vf(p_hwfn, i) {
762 struct qed_vf_info *p_vf;
763
764 p_vf = qed_iov_get_vf_info(p_hwfn, (u16)i, true);
765 if (!p_vf)
766 continue;
767
768 current_max = max_t(u8, current_max, p_vf->num_sbs);
769 }
770 }
771
772 if (num_sbs > current_max)
773 return qed_mcp_config_vf_msix(p_hwfn, p_ptt,
774 abs_vf_id, num_sbs);
775
776 return 0;
777}
778
1408cc1f
YM		 779static int qed_iov_enable_vf_access(struct qed_hwfn *p_hwfn,
780 struct qed_ptt *p_ptt,
781 struct qed_vf_info *vf)
782{
783 u32 igu_vf_conf = IGU_VF_CONF_FUNC_EN;
784 int rc;
785
4e9b2a67
MY		 786 /* It's possible VF was previously considered malicious -
787 * clear the indication even if we're only going to disable VF.
788 */
789 vf->b_malicious = false;
790
0b55e27d
YM		 791 if (vf->to_disable)
792 return 0;
793
1408cc1f
YM		 794 DP_VERBOSE(p_hwfn,
795 QED_MSG_IOV,
796 "Enable internal access for vf %x [abs %x]\n",
797 vf->abs_vf_id, QED_VF_ABS_ID(p_hwfn, vf));
798
799 qed_iov_vf_pglue_clear_err(p_hwfn, p_ptt, QED_VF_ABS_ID(p_hwfn, vf));
800
b2b897eb
YM		 801 qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
802
88072fd4
MY		 803 rc = qed_iov_enable_vf_access_msix(p_hwfn, p_ptt,
804 vf->abs_vf_id, vf->num_sbs);
1408cc1f
YM		 805 if (rc)
806 return rc;
807
808 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
809
810 SET_FIELD(igu_vf_conf, IGU_VF_CONF_PARENT, p_hwfn->rel_pf_id);
811 STORE_RT_REG(p_hwfn, IGU_REG_VF_CONFIGURATION_RT_OFFSET, igu_vf_conf);
812
813 qed_init_run(p_hwfn, p_ptt, PHASE_VF, vf->abs_vf_id,
814 p_hwfn->hw_info.hw_mode);
815
816 /* unpretend */
817 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
818
1408cc1f
YM		 819 vf->state = VF_FREE;
820
821 return rc;
822}
823
0b55e27d
YM		 824/**
825 * @brief qed_iov_config_perm_table - configure the permission
826 * zone table.
827 * In E4, queue zone permission table size is 320x9. There
828 * are 320 VF queues for single engine device (256 for dual
829 * engine device), and each entry has the following format:
830 * {Valid, VF[7:0]}
831 * @param p_hwfn
832 * @param p_ptt
833 * @param vf
834 * @param enable
835 */
836static void qed_iov_config_perm_table(struct qed_hwfn *p_hwfn,
837 struct qed_ptt *p_ptt,
838 struct qed_vf_info *vf, u8 enable)
839{
840 u32 reg_addr, val;
841 u16 qzone_id = 0;
842 int qid;
843
844 for (qid = 0; qid < vf->num_rxqs; qid++) {
845 qed_fw_l2_queue(p_hwfn, vf->vf_queues[qid].fw_rx_qid,
846 &qzone_id);
847
848 reg_addr = PSWHST_REG_ZONE_PERMISSION_TABLE + qzone_id * 4;
1a635e48 849 val = enable ? (vf->abs_vf_id | BIT(8)) : 0;
0b55e27d
YM		 850 qed_wr(p_hwfn, p_ptt, reg_addr, val);
851 }
852}
853
dacd88d6
YM		 854static void qed_iov_enable_vf_traffic(struct qed_hwfn *p_hwfn,
855 struct qed_ptt *p_ptt,
856 struct qed_vf_info *vf)
857{
858 /* Reset vf in IGU - interrupts are still disabled */
859 qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
860
861 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 1);
862
863 /* Permission Table */
864 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, true);
865}
866
1408cc1f
YM		 867static u8 qed_iov_alloc_vf_igu_sbs(struct qed_hwfn *p_hwfn,
868 struct qed_ptt *p_ptt,
869 struct qed_vf_info *vf, u16 num_rx_queues)
870{
871 struct qed_igu_block *igu_blocks;
872 int qid = 0, igu_id = 0;
873 u32 val = 0;
874
d749dd0d 875 igu_blocks = p_hwfn->hw_info.p_igu_info->entry;
1408cc1f 876
726fdbe9
MY		 877 if (num_rx_queues > p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov)
878 num_rx_queues = p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov;
879 p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov -= num_rx_queues;
1408cc1f
YM		 880
881 SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER, vf->abs_vf_id);
882 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 1);
883 SET_FIELD(val, IGU_MAPPING_LINE_PF_VALID, 0);
884
885 while ((qid < num_rx_queues) &&
886 (igu_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev))) {
887 if (igu_blocks[igu_id].status & QED_IGU_STATUS_FREE) {
888 struct cau_sb_entry sb_entry;
889
890 vf->igu_sbs[qid] = (u16)igu_id;
891 igu_blocks[igu_id].status &= ~QED_IGU_STATUS_FREE;
892
893 SET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER, qid);
894
895 qed_wr(p_hwfn, p_ptt,
896 IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id,
897 val);
898
899 /* Configure igu sb in CAU which were marked valid */
900 qed_init_cau_sb_entry(p_hwfn, &sb_entry,
901 p_hwfn->rel_pf_id,
902 vf->abs_vf_id, 1);
903 qed_dmae_host2grc(p_hwfn, p_ptt,
904 (u64)(uintptr_t)&sb_entry,
905 CAU_REG_SB_VAR_MEMORY +
906 igu_id * sizeof(u64), 2, 0);
907 qid++;
908 }
909 igu_id++;
910 }
911
912 vf->num_sbs = (u8) num_rx_queues;
913
914 return vf->num_sbs;
915}
916
0b55e27d
YM		 917static void qed_iov_free_vf_igu_sbs(struct qed_hwfn *p_hwfn,
918 struct qed_ptt *p_ptt,
919 struct qed_vf_info *vf)
920{
921 struct qed_igu_info *p_info = p_hwfn->hw_info.p_igu_info;
922 int idx, igu_id;
923 u32 addr, val;
924
925 /* Invalidate igu CAM lines and mark them as free */
926 for (idx = 0; idx < vf->num_sbs; idx++) {
927 igu_id = vf->igu_sbs[idx];
928 addr = IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id;
929
930 val = qed_rd(p_hwfn, p_ptt, addr);
931 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
932 qed_wr(p_hwfn, p_ptt, addr, val);
933
d749dd0d 934 p_info->entry[igu_id].status |= QED_IGU_STATUS_FREE;
726fdbe9 935 p_hwfn->hw_info.p_igu_info->usage.free_cnt_iov++;
0b55e27d
YM		 936 }
937
938 vf->num_sbs = 0;
939}
940
33b2fbd0
MY		 941static void qed_iov_set_link(struct qed_hwfn *p_hwfn,
942 u16 vfid,
943 struct qed_mcp_link_params *params,
944 struct qed_mcp_link_state *link,
945 struct qed_mcp_link_capabilities *p_caps)
946{
947 struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
948 vfid,
949 false);
950 struct qed_bulletin_content *p_bulletin;
951
952 if (!p_vf)
953 return;
954
955 p_bulletin = p_vf->bulletin.p_virt;
956 p_bulletin->req_autoneg = params->speed.autoneg;
957 p_bulletin->req_adv_speed = params->speed.advertised_speeds;
958 p_bulletin->req_forced_speed = params->speed.forced_speed;
959 p_bulletin->req_autoneg_pause = params->pause.autoneg;
960 p_bulletin->req_forced_rx = params->pause.forced_rx;
961 p_bulletin->req_forced_tx = params->pause.forced_tx;
962 p_bulletin->req_loopback = params->loopback_mode;
963
964 p_bulletin->link_up = link->link_up;
965 p_bulletin->speed = link->speed;
966 p_bulletin->full_duplex = link->full_duplex;
967 p_bulletin->autoneg = link->an;
968 p_bulletin->autoneg_complete = link->an_complete;
969 p_bulletin->parallel_detection = link->parallel_detection;
970 p_bulletin->pfc_enabled = link->pfc_enabled;
971 p_bulletin->partner_adv_speed = link->partner_adv_speed;
972 p_bulletin->partner_tx_flow_ctrl_en = link->partner_tx_flow_ctrl_en;
973 p_bulletin->partner_rx_flow_ctrl_en = link->partner_rx_flow_ctrl_en;
974 p_bulletin->partner_adv_pause = link->partner_adv_pause;
975 p_bulletin->sfp_tx_fault = link->sfp_tx_fault;
976
977 p_bulletin->capability_speed = p_caps->speed_capabilities;
978}
979
1408cc1f
YM		 980static int qed_iov_init_hw_for_vf(struct qed_hwfn *p_hwfn,
981 struct qed_ptt *p_ptt,
3da7a37a 982 struct qed_iov_vf_init_params *p_params)
1408cc1f 983{
33b2fbd0
MY		 984 struct qed_mcp_link_capabilities link_caps;
985 struct qed_mcp_link_params link_params;
986 struct qed_mcp_link_state link_state;
1408cc1f
YM		 987 u8 num_of_vf_avaiable_chains = 0;
988 struct qed_vf_info *vf = NULL;
3da7a37a 989 u16 qid, num_irqs;
1408cc1f
YM		 990 int rc = 0;
991 u32 cids;
992 u8 i;
993
3da7a37a 994 vf = qed_iov_get_vf_info(p_hwfn, p_params->rel_vf_id, false);
1408cc1f
YM		 995 if (!vf) {
996 DP_ERR(p_hwfn, "qed_iov_init_hw_for_vf : vf is NULL\n");
997 return -EINVAL;
998 }
999
1000 if (vf->b_init) {
3da7a37a
MY		 1001 DP_NOTICE(p_hwfn, "VF[%d] is already active.\n",
1002 p_params->rel_vf_id);
1408cc1f
YM		 1003 return -EINVAL;
1004 }
1005
3da7a37a
MY		 1006 /* Perform sanity checking on the requested queue_id */
1007 for (i = 0; i < p_params->num_queues; i++) {
1008 u16 min_vf_qzone = FEAT_NUM(p_hwfn, QED_PF_L2_QUE);
1009 u16 max_vf_qzone = min_vf_qzone +
1010 FEAT_NUM(p_hwfn, QED_VF_L2_QUE) - 1;
1011
1012 qid = p_params->req_rx_queue[i];
1013 if (qid < min_vf_qzone || qid > max_vf_qzone) {
1014 DP_NOTICE(p_hwfn,
1015 "Can't enable Rx qid [%04x] for VF[%d]: qids [0x%04x,...,0x%04x] available\n",
1016 qid,
1017 p_params->rel_vf_id,
1018 min_vf_qzone, max_vf_qzone);
1019 return -EINVAL;
1020 }
1021
1022 qid = p_params->req_tx_queue[i];
1023 if (qid > max_vf_qzone) {
1024 DP_NOTICE(p_hwfn,
1025 "Can't enable Tx qid [%04x] for VF[%d]: max qid 0x%04x\n",
1026 qid, p_params->rel_vf_id, max_vf_qzone);
1027 return -EINVAL;
1028 }
1029
1030 /* If client *really* wants, Tx qid can be shared with PF */
1031 if (qid < min_vf_qzone)
1032 DP_VERBOSE(p_hwfn,
1033 QED_MSG_IOV,
1034 "VF[%d] is using PF qid [0x%04x] for Txq[0x%02x]\n",
1035 p_params->rel_vf_id, qid, i);
1036 }
1037
1408cc1f
YM		 1038 /* Limit number of queues according to number of CIDs */
1039 qed_cxt_get_proto_cid_count(p_hwfn, PROTOCOLID_ETH, &cids);
1040 DP_VERBOSE(p_hwfn,
1041 QED_MSG_IOV,
1042 "VF[%d] - requesting to initialize for 0x%04x queues [0x%04x CIDs available]\n",
3da7a37a
MY		 1043 vf->relative_vf_id, p_params->num_queues, (u16)cids);
1044 num_irqs = min_t(u16, p_params->num_queues, ((u16)cids));
1408cc1f
YM		 1045
1046 num_of_vf_avaiable_chains = qed_iov_alloc_vf_igu_sbs(p_hwfn,
1047 p_ptt,
3da7a37a 1048 vf, num_irqs);
1408cc1f
YM		 1049 if (!num_of_vf_avaiable_chains) {
1050 DP_ERR(p_hwfn, "no available igu sbs\n");
1051 return -ENOMEM;
1052 }
1053
1054 /* Choose queue number and index ranges */
1055 vf->num_rxqs = num_of_vf_avaiable_chains;
1056 vf->num_txqs = num_of_vf_avaiable_chains;
1057
1058 for (i = 0; i < vf->num_rxqs; i++) {
3da7a37a 1059 struct qed_vf_q_info *p_queue = &vf->vf_queues[i];
1408cc1f 1060
3da7a37a
MY		 1061 p_queue->fw_rx_qid = p_params->req_rx_queue[i];
1062 p_queue->fw_tx_qid = p_params->req_tx_queue[i];
1408cc1f
YM		 1063
1064 /* CIDs are per-VF, so no problem having them 0-based. */
3da7a37a 1065 p_queue->fw_cid = i;
1408cc1f
YM		 1066
1067 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3da7a37a
MY		 1068 "VF[%d] - Q[%d] SB %04x, qid [Rx %04x Tx %04x] CID %04x\n",
1069 vf->relative_vf_id,
1070 i, vf->igu_sbs[i],
1071 p_queue->fw_rx_qid,
1072 p_queue->fw_tx_qid, p_queue->fw_cid);
1408cc1f 1073 }
3da7a37a 1074
33b2fbd0
MY		 1075 /* Update the link configuration in bulletin */
1076 memcpy(&link_params, qed_mcp_get_link_params(p_hwfn),
1077 sizeof(link_params));
1078 memcpy(&link_state, qed_mcp_get_link_state(p_hwfn), sizeof(link_state));
1079 memcpy(&link_caps, qed_mcp_get_link_capabilities(p_hwfn),
1080 sizeof(link_caps));
1081 qed_iov_set_link(p_hwfn, p_params->rel_vf_id,
1082 &link_params, &link_state, &link_caps);
1083
1408cc1f
YM		 1084 rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, vf);
1085 if (!rc) {
1086 vf->b_init = true;
1087
1088 if (IS_LEAD_HWFN(p_hwfn))
1089 p_hwfn->cdev->p_iov_info->num_vfs++;
1090 }
1091
1092 return rc;
1093}
1094
0b55e27d
YM		 1095static int qed_iov_release_hw_for_vf(struct qed_hwfn *p_hwfn,
1096 struct qed_ptt *p_ptt, u16 rel_vf_id)
1097{
079d20a6
MC		 1098 struct qed_mcp_link_capabilities caps;
1099 struct qed_mcp_link_params params;
1100 struct qed_mcp_link_state link;
0b55e27d 1101 struct qed_vf_info *vf = NULL;
0b55e27d
YM		 1102
1103 vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
1104 if (!vf) {
1105 DP_ERR(p_hwfn, "qed_iov_release_hw_for_vf : vf is NULL\n");
1106 return -EINVAL;
1107 }
1108
36558c3d
YM		 1109 if (vf->bulletin.p_virt)
1110 memset(vf->bulletin.p_virt, 0, sizeof(*vf->bulletin.p_virt));
1111
1112 memset(&vf->p_vf_info, 0, sizeof(vf->p_vf_info));
1113
079d20a6
MC		 1114 /* Get the link configuration back in bulletin so
1115 * that when VFs are re-enabled they get the actual
1116 * link configuration.
1117 */
1118 memcpy(&params, qed_mcp_get_link_params(p_hwfn), sizeof(params));
1119 memcpy(&link, qed_mcp_get_link_state(p_hwfn), sizeof(link));
1120 memcpy(&caps, qed_mcp_get_link_capabilities(p_hwfn), sizeof(caps));
1121 qed_iov_set_link(p_hwfn, rel_vf_id, &params, &link, &caps);
1122
1fe614d1
YM		 1123 /* Forget the VF's acquisition message */
1124 memset(&vf->acquire, 0, sizeof(vf->acquire));
0b55e27d
YM		 1125
1126 /* disablng interrupts and resetting permission table was done during
1127 * vf-close, however, we could get here without going through vf_close
1128 */
1129 /* Disable Interrupts for VF */
1130 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
1131
1132 /* Reset Permission table */
1133 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
1134
1135 vf->num_rxqs = 0;
1136 vf->num_txqs = 0;
1137 qed_iov_free_vf_igu_sbs(p_hwfn, p_ptt, vf);
1138
1139 if (vf->b_init) {
1140 vf->b_init = false;
1141
1142 if (IS_LEAD_HWFN(p_hwfn))
1143 p_hwfn->cdev->p_iov_info->num_vfs--;
1144 }
1145
1146 return 0;
1147}
1148
37bff2b9
YM		 1149static bool qed_iov_tlv_supported(u16 tlvtype)
1150{
1151 return CHANNEL_TLV_NONE < tlvtype && tlvtype < CHANNEL_TLV_MAX;
1152}
1153
1154/* place a given tlv on the tlv buffer, continuing current tlv list */
1155void *qed_add_tlv(struct qed_hwfn *p_hwfn, u8 **offset, u16 type, u16 length)
1156{
1157 struct channel_tlv *tl = (struct channel_tlv *)*offset;
1158
1159 tl->type = type;
1160 tl->length = length;
1161
1162 /* Offset should keep pointing to next TLV (the end of the last) */
1163 *offset += length;
1164
1165 /* Return a pointer to the start of the added tlv */
1166 return *offset - length;
1167}
1168
1169/* list the types and lengths of the tlvs on the buffer */
1170void qed_dp_tlv_list(struct qed_hwfn *p_hwfn, void *tlvs_list)
1171{
1172 u16 i = 1, total_length = 0;
1173 struct channel_tlv *tlv;
1174
1175 do {
1176 tlv = (struct channel_tlv *)((u8 *)tlvs_list + total_length);
1177
1178 /* output tlv */
1179 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1180 "TLV number %d: type %d, length %d\n",
1181 i, tlv->type, tlv->length);
1182
1183 if (tlv->type == CHANNEL_TLV_LIST_END)
1184 return;
1185
1186 /* Validate entry - protect against malicious VFs */
1187 if (!tlv->length) {
1188 DP_NOTICE(p_hwfn, "TLV of length 0 found\n");
1189 return;
1190 }
1191
1192 total_length += tlv->length;
1193
1194 if (total_length >= sizeof(struct tlv_buffer_size)) {
1195 DP_NOTICE(p_hwfn, "TLV ==> Buffer overflow\n");
1196 return;
1197 }
1198
1199 i++;
1200 } while (1);
1201}
1202
1203static void qed_iov_send_response(struct qed_hwfn *p_hwfn,
1204 struct qed_ptt *p_ptt,
1205 struct qed_vf_info *p_vf,
1206 u16 length, u8 status)
1207{
1208 struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
1209 struct qed_dmae_params params;
1210 u8 eng_vf_id;
1211
1212 mbx->reply_virt->default_resp.hdr.status = status;
1213
1214 qed_dp_tlv_list(p_hwfn, mbx->reply_virt);
1215
1216 eng_vf_id = p_vf->abs_vf_id;
1217
1218 memset(&params, 0, sizeof(struct qed_dmae_params));
1219 params.flags = QED_DMAE_FLAG_VF_DST;
1220 params.dst_vfid = eng_vf_id;
1221
1222 qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys + sizeof(u64),
1223 mbx->req_virt->first_tlv.reply_address +
1224 sizeof(u64),
1225 (sizeof(union pfvf_tlvs) - sizeof(u64)) / 4,
1226 &params);
1227
d9194081
MY		 1228 /* Once PF copies the rc to the VF, the latter can continue
1229 * and send an additional message. So we have to make sure the
1230 * channel would be re-set to ready prior to that.
1231 */
37bff2b9
YM		 1232 REG_WR(p_hwfn,
1233 GTT_BAR0_MAP_REG_USDM_RAM +
1234 USTORM_VF_PF_CHANNEL_READY_OFFSET(eng_vf_id), 1);
d9194081
MY		 1235
1236 qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys,
1237 mbx->req_virt->first_tlv.reply_address,
1238 sizeof(u64) / 4, &params);
37bff2b9
YM		 1239}
1240
dacd88d6
YM		 1241static u16 qed_iov_vport_to_tlv(struct qed_hwfn *p_hwfn,
1242 enum qed_iov_vport_update_flag flag)
1243{
1244 switch (flag) {
1245 case QED_IOV_VP_UPDATE_ACTIVATE:
1246 return CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
17b235c1
YM		 1247 case QED_IOV_VP_UPDATE_VLAN_STRIP:
1248 return CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
1249 case QED_IOV_VP_UPDATE_TX_SWITCH:
1250 return CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
dacd88d6
YM		 1251 case QED_IOV_VP_UPDATE_MCAST:
1252 return CHANNEL_TLV_VPORT_UPDATE_MCAST;
1253 case QED_IOV_VP_UPDATE_ACCEPT_PARAM:
1254 return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
1255 case QED_IOV_VP_UPDATE_RSS:
1256 return CHANNEL_TLV_VPORT_UPDATE_RSS;
17b235c1
YM		 1257 case QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN:
1258 return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
1259 case QED_IOV_VP_UPDATE_SGE_TPA:
1260 return CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
dacd88d6
YM		 1261 default:
1262 return 0;
1263 }
1264}
1265
1266static u16 qed_iov_prep_vp_update_resp_tlvs(struct qed_hwfn *p_hwfn,
1267 struct qed_vf_info *p_vf,
1268 struct qed_iov_vf_mbx *p_mbx,
1269 u8 status,
1270 u16 tlvs_mask, u16 tlvs_accepted)
1271{
1272 struct pfvf_def_resp_tlv *resp;
1273 u16 size, total_len, i;
1274
1275 memset(p_mbx->reply_virt, 0, sizeof(union pfvf_tlvs));
1276 p_mbx->offset = (u8 *)p_mbx->reply_virt;
1277 size = sizeof(struct pfvf_def_resp_tlv);
1278 total_len = size;
1279
1280 qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_VPORT_UPDATE, size);
1281
1282 /* Prepare response for all extended tlvs if they are found by PF */
1283 for (i = 0; i < QED_IOV_VP_UPDATE_MAX; i++) {
1a635e48 1284 if (!(tlvs_mask & BIT(i)))
dacd88d6
YM		 1285 continue;
1286
1287 resp = qed_add_tlv(p_hwfn, &p_mbx->offset,
1288 qed_iov_vport_to_tlv(p_hwfn, i), size);
1289
1a635e48 1290 if (tlvs_accepted & BIT(i))
dacd88d6
YM		 1291 resp->hdr.status = status;
1292 else
1293 resp->hdr.status = PFVF_STATUS_NOT_SUPPORTED;
1294
1295 DP_VERBOSE(p_hwfn,
1296 QED_MSG_IOV,
1297 "VF[%d] - vport_update response: TLV %d, status %02x\n",
1298 p_vf->relative_vf_id,
1299 qed_iov_vport_to_tlv(p_hwfn, i), resp->hdr.status);
1300
1301 total_len += size;
1302 }
1303
1304 qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_LIST_END,
1305 sizeof(struct channel_list_end_tlv));
1306
1307 return total_len;
1308}
1309
37bff2b9
YM		 1310static void qed_iov_prepare_resp(struct qed_hwfn *p_hwfn,
1311 struct qed_ptt *p_ptt,
1312 struct qed_vf_info *vf_info,
1313 u16 type, u16 length, u8 status)
1314{
1315 struct qed_iov_vf_mbx *mbx = &vf_info->vf_mbx;
1316
1317 mbx->offset = (u8 *)mbx->reply_virt;
1318
1319 qed_add_tlv(p_hwfn, &mbx->offset, type, length);
1320 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
1321 sizeof(struct channel_list_end_tlv));
1322
1323 qed_iov_send_response(p_hwfn, p_ptt, vf_info, length, status);
1324}
1325
ba56947a
BX		 1326static struct
1327qed_public_vf_info *qed_iov_get_public_vf_info(struct qed_hwfn *p_hwfn,
1328 u16 relative_vf_id,
1329 bool b_enabled_only)
0b55e27d
YM		 1330{
1331 struct qed_vf_info *vf = NULL;
1332
1333 vf = qed_iov_get_vf_info(p_hwfn, relative_vf_id, b_enabled_only);
1334 if (!vf)
1335 return NULL;
1336
1337 return &vf->p_vf_info;
1338}
1339
ba56947a 1340static void qed_iov_clean_vf(struct qed_hwfn *p_hwfn, u8 vfid)
0b55e27d
YM		 1341{
1342 struct qed_public_vf_info *vf_info;
1343
1344 vf_info = qed_iov_get_public_vf_info(p_hwfn, vfid, false);
1345
1346 if (!vf_info)
1347 return;
1348
1349 /* Clear the VF mac */
0ee28e31 1350 eth_zero_addr(vf_info->mac);
f990c82c
MY		 1351
1352 vf_info->rx_accept_mode = 0;
1353 vf_info->tx_accept_mode = 0;
0b55e27d
YM		 1354}
1355
1356static void qed_iov_vf_cleanup(struct qed_hwfn *p_hwfn,
1357 struct qed_vf_info *p_vf)
1358{
1359 u32 i;
1360
1361 p_vf->vf_bulletin = 0;
dacd88d6 1362 p_vf->vport_instance = 0;
08feecd7 1363 p_vf->configured_features = 0;
0b55e27d
YM		 1364
1365 /* If VF previously requested less resources, go back to default */
1366 p_vf->num_rxqs = p_vf->num_sbs;
1367 p_vf->num_txqs = p_vf->num_sbs;
1368
dacd88d6
YM		 1369 p_vf->num_active_rxqs = 0;
1370
3da7a37a
MY		 1371 for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) {
1372 struct qed_vf_q_info *p_queue = &p_vf->vf_queues[i];
1373
1374 if (p_queue->p_rx_cid) {
1375 qed_eth_queue_cid_release(p_hwfn, p_queue->p_rx_cid);
1376 p_queue->p_rx_cid = NULL;
1377 }
1378
1379 if (p_queue->p_tx_cid) {
1380 qed_eth_queue_cid_release(p_hwfn, p_queue->p_tx_cid);
1381 p_queue->p_tx_cid = NULL;
1382 }
1383 }
0b55e27d 1384
08feecd7 1385 memset(&p_vf->shadow_config, 0, sizeof(p_vf->shadow_config));
1fe614d1 1386 memset(&p_vf->acquire, 0, sizeof(p_vf->acquire));
0b55e27d
YM		 1387 qed_iov_clean_vf(p_hwfn, p_vf->relative_vf_id);
1388}
1389
1cf2b1a9
YM		 1390static u8 qed_iov_vf_mbx_acquire_resc(struct qed_hwfn *p_hwfn,
1391 struct qed_ptt *p_ptt,
1392 struct qed_vf_info *p_vf,
1393 struct vf_pf_resc_request *p_req,
1394 struct pf_vf_resc *p_resp)
1395{
1396 int i;
1397
1398 /* Queue related information */
1399 p_resp->num_rxqs = p_vf->num_rxqs;
1400 p_resp->num_txqs = p_vf->num_txqs;
1401 p_resp->num_sbs = p_vf->num_sbs;
1402
1403 for (i = 0; i < p_resp->num_sbs; i++) {
1404 p_resp->hw_sbs[i].hw_sb_id = p_vf->igu_sbs[i];
1405 p_resp->hw_sbs[i].sb_qid = 0;
1406 }
1407
1408 /* These fields are filled for backward compatibility.
1409 * Unused by modern vfs.
1410 */
1411 for (i = 0; i < p_resp->num_rxqs; i++) {
1412 qed_fw_l2_queue(p_hwfn, p_vf->vf_queues[i].fw_rx_qid,
1413 (u16 *)&p_resp->hw_qid[i]);
1414 p_resp->cid[i] = p_vf->vf_queues[i].fw_cid;
1415 }
1416
1417 /* Filter related information */
1418 p_resp->num_mac_filters = min_t(u8, p_vf->num_mac_filters,
1419 p_req->num_mac_filters);
1420 p_resp->num_vlan_filters = min_t(u8, p_vf->num_vlan_filters,
1421 p_req->num_vlan_filters);
1422
1423 /* This isn't really needed/enforced, but some legacy VFs might depend
1424 * on the correct filling of this field.
1425 */
1426 p_resp->num_mc_filters = QED_MAX_MC_ADDRS;
1427
1428 /* Validate sufficient resources for VF */
1429 if (p_resp->num_rxqs < p_req->num_rxqs ||
1430 p_resp->num_txqs < p_req->num_txqs ||
1431 p_resp->num_sbs < p_req->num_sbs ||
1432 p_resp->num_mac_filters < p_req->num_mac_filters ||
1433 p_resp->num_vlan_filters < p_req->num_vlan_filters ||
1434 p_resp->num_mc_filters < p_req->num_mc_filters) {
1435 DP_VERBOSE(p_hwfn,
1436 QED_MSG_IOV,
1437 "VF[%d] - Insufficient resources: rxq [%02x/%02x] txq [%02x/%02x] sbs [%02x/%02x] mac [%02x/%02x] vlan [%02x/%02x] mc [%02x/%02x]\n",
1438 p_vf->abs_vf_id,
1439 p_req->num_rxqs,
1440 p_resp->num_rxqs,
1441 p_req->num_rxqs,
1442 p_resp->num_txqs,
1443 p_req->num_sbs,
1444 p_resp->num_sbs,
1445 p_req->num_mac_filters,
1446 p_resp->num_mac_filters,
1447 p_req->num_vlan_filters,
1448 p_resp->num_vlan_filters,
1449 p_req->num_mc_filters, p_resp->num_mc_filters);
a044df83
YM		 1450
1451 /* Some legacy OSes are incapable of correctly handling this
1452 * failure.
1453 */
1454 if ((p_vf->acquire.vfdev_info.eth_fp_hsi_minor ==
1455 ETH_HSI_VER_NO_PKT_LEN_TUNN) &&
1456 (p_vf->acquire.vfdev_info.os_type ==
1457 VFPF_ACQUIRE_OS_WINDOWS))
1458 return PFVF_STATUS_SUCCESS;
1459
1cf2b1a9
YM		 1460 return PFVF_STATUS_NO_RESOURCE;
1461 }
1462
1463 return PFVF_STATUS_SUCCESS;
1464}
1465
1466static void qed_iov_vf_mbx_acquire_stats(struct qed_hwfn *p_hwfn,
1467 struct pfvf_stats_info *p_stats)
1468{
1469 p_stats->mstats.address = PXP_VF_BAR0_START_MSDM_ZONE_B +
1470 offsetof(struct mstorm_vf_zone,
1471 non_trigger.eth_queue_stat);
1472 p_stats->mstats.len = sizeof(struct eth_mstorm_per_queue_stat);
1473 p_stats->ustats.address = PXP_VF_BAR0_START_USDM_ZONE_B +
1474 offsetof(struct ustorm_vf_zone,
1475 non_trigger.eth_queue_stat);
1476 p_stats->ustats.len = sizeof(struct eth_ustorm_per_queue_stat);
1477 p_stats->pstats.address = PXP_VF_BAR0_START_PSDM_ZONE_B +
1478 offsetof(struct pstorm_vf_zone,
1479 non_trigger.eth_queue_stat);
1480 p_stats->pstats.len = sizeof(struct eth_pstorm_per_queue_stat);
1481 p_stats->tstats.address = 0;
1482 p_stats->tstats.len = 0;
1483}
1484
1408cc1f
YM		 1485static void qed_iov_vf_mbx_acquire(struct qed_hwfn *p_hwfn,
1486 struct qed_ptt *p_ptt,
1487 struct qed_vf_info *vf)
37bff2b9 1488{
1408cc1f
YM		 1489 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1490 struct pfvf_acquire_resp_tlv *resp = &mbx->reply_virt->acquire_resp;
1491 struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
1492 struct vfpf_acquire_tlv *req = &mbx->req_virt->acquire;
1cf2b1a9 1493 u8 vfpf_status = PFVF_STATUS_NOT_SUPPORTED;
1408cc1f 1494 struct pf_vf_resc *resc = &resp->resc;
1fe614d1
YM		 1495 int rc;
1496
1497 memset(resp, 0, sizeof(*resp));
1408cc1f 1498
05fafbfb
YM		 1499 /* Write the PF version so that VF would know which version
1500 * is supported - might be later overriden. This guarantees that
1501 * VF could recognize legacy PF based on lack of versions in reply.
1502 */
1503 pfdev_info->major_fp_hsi = ETH_HSI_VER_MAJOR;
1504 pfdev_info->minor_fp_hsi = ETH_HSI_VER_MINOR;
1505
a044df83
YM		 1506 if (vf->state != VF_FREE && vf->state != VF_STOPPED) {
1507 DP_VERBOSE(p_hwfn,
1508 QED_MSG_IOV,
1509 "VF[%d] sent ACQUIRE but is already in state %d - fail request\n",
1510 vf->abs_vf_id, vf->state);
1511 goto out;
1512 }
1513
1408cc1f 1514 /* Validate FW compatibility */
1fe614d1 1515 if (req->vfdev_info.eth_fp_hsi_major != ETH_HSI_VER_MAJOR) {
a044df83
YM		 1516 if (req->vfdev_info.capabilities &
1517 VFPF_ACQUIRE_CAP_PRE_FP_HSI) {
1518 struct vf_pf_vfdev_info *p_vfdev = &req->vfdev_info;
1fe614d1 1519
a044df83
YM		 1520 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1521 "VF[%d] is pre-fastpath HSI\n",
1522 vf->abs_vf_id);
1523 p_vfdev->eth_fp_hsi_major = ETH_HSI_VER_MAJOR;
1524 p_vfdev->eth_fp_hsi_minor = ETH_HSI_VER_NO_PKT_LEN_TUNN;
1525 } else {
1526 DP_INFO(p_hwfn,
1527 "VF[%d] needs fastpath HSI %02x.%02x, which is incompatible with loaded FW's faspath HSI %02x.%02x\n",
1528 vf->abs_vf_id,
1529 req->vfdev_info.eth_fp_hsi_major,
1530 req->vfdev_info.eth_fp_hsi_minor,
1531 ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
1532
1533 goto out;
1534 }
1408cc1f
YM		 1535 }
1536
1537 /* On 100g PFs, prevent old VFs from loading */
1538 if ((p_hwfn->cdev->num_hwfns > 1) &&
1539 !(req->vfdev_info.capabilities & VFPF_ACQUIRE_CAP_100G)) {
1540 DP_INFO(p_hwfn,
1541 "VF[%d] is running an old driver that doesn't support 100g\n",
1542 vf->abs_vf_id);
1408cc1f
YM		 1543 goto out;
1544 }
1545
1fe614d1
YM		 1546 /* Store the acquire message */
1547 memcpy(&vf->acquire, req, sizeof(vf->acquire));
1408cc1f 1548
1408cc1f 1549 vf->opaque_fid = req->vfdev_info.opaque_fid;
1408cc1f
YM		 1550
1551 vf->vf_bulletin = req->bulletin_addr;
1552 vf->bulletin.size = (vf->bulletin.size < req->bulletin_size) ?
1553 vf->bulletin.size : req->bulletin_size;
1554
1555 /* fill in pfdev info */
1556 pfdev_info->chip_num = p_hwfn->cdev->chip_num;
1557 pfdev_info->db_size = 0;
1558 pfdev_info->indices_per_sb = PIS_PER_SB;
1559
1560 pfdev_info->capabilities = PFVF_ACQUIRE_CAP_DEFAULT_UNTAGGED |
1561 PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE;
1562 if (p_hwfn->cdev->num_hwfns > 1)
1563 pfdev_info->capabilities |= PFVF_ACQUIRE_CAP_100G;
1564
1cf2b1a9 1565 qed_iov_vf_mbx_acquire_stats(p_hwfn, &pfdev_info->stats_info);
1408cc1f
YM		 1566
1567 memcpy(pfdev_info->port_mac, p_hwfn->hw_info.hw_mac_addr, ETH_ALEN);
1568
1569 pfdev_info->fw_major = FW_MAJOR_VERSION;
1570 pfdev_info->fw_minor = FW_MINOR_VERSION;
1571 pfdev_info->fw_rev = FW_REVISION_VERSION;
1572 pfdev_info->fw_eng = FW_ENGINEERING_VERSION;
a044df83
YM		 1573
1574 /* Incorrect when legacy, but doesn't matter as legacy isn't reading
1575 * this field.
1576 */
1a635e48 1577 pfdev_info->minor_fp_hsi = min_t(u8, ETH_HSI_VER_MINOR,
1fe614d1 1578 req->vfdev_info.eth_fp_hsi_minor);
1408cc1f
YM		 1579 pfdev_info->os_type = VFPF_ACQUIRE_OS_LINUX;
1580 qed_mcp_get_mfw_ver(p_hwfn, p_ptt, &pfdev_info->mfw_ver, NULL);
1581
1582 pfdev_info->dev_type = p_hwfn->cdev->type;
1583 pfdev_info->chip_rev = p_hwfn->cdev->chip_rev;
1584
1cf2b1a9
YM		 1585 /* Fill resources available to VF; Make sure there are enough to
1586 * satisfy the VF's request.
1408cc1f 1587 */
1cf2b1a9
YM		 1588 vfpf_status = qed_iov_vf_mbx_acquire_resc(p_hwfn, p_ptt, vf,
1589 &req->resc_request, resc);
1590 if (vfpf_status != PFVF_STATUS_SUCCESS)
1591 goto out;
1408cc1f 1592
1fe614d1
YM		 1593 /* Start the VF in FW */
1594 rc = qed_sp_vf_start(p_hwfn, vf);
1595 if (rc) {
1596 DP_NOTICE(p_hwfn, "Failed to start VF[%02x]\n", vf->abs_vf_id);
1597 vfpf_status = PFVF_STATUS_FAILURE;
1598 goto out;
1599 }
1600
1408cc1f
YM		 1601 /* Fill agreed size of bulletin board in response */
1602 resp->bulletin_size = vf->bulletin.size;
36558c3d 1603 qed_iov_post_vf_bulletin(p_hwfn, vf->relative_vf_id, p_ptt);
1408cc1f
YM		 1604
1605 DP_VERBOSE(p_hwfn,
1606 QED_MSG_IOV,
1607 "VF[%d] ACQUIRE_RESPONSE: pfdev_info- chip_num=0x%x, db_size=%d, idx_per_sb=%d, pf_cap=0x%llx\n"
1608 "resources- n_rxq-%d, n_txq-%d, n_sbs-%d, n_macs-%d, n_vlans-%d\n",
1609 vf->abs_vf_id,
1610 resp->pfdev_info.chip_num,
1611 resp->pfdev_info.db_size,
1612 resp->pfdev_info.indices_per_sb,
1613 resp->pfdev_info.capabilities,
1614 resc->num_rxqs,
1615 resc->num_txqs,
1616 resc->num_sbs,
1617 resc->num_mac_filters,
1618 resc->num_vlan_filters);
1619 vf->state = VF_ACQUIRED;
1620
1621 /* Prepare Response */
1622out:
1623 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_ACQUIRE,
1624 sizeof(struct pfvf_acquire_resp_tlv), vfpf_status);
37bff2b9
YM		 1625}
1626
6ddc7608
YM		 1627static int __qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn,
1628 struct qed_vf_info *p_vf, bool val)
1629{
1630 struct qed_sp_vport_update_params params;
1631 int rc;
1632
1633 if (val == p_vf->spoof_chk) {
1634 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1635 "Spoofchk value[%d] is already configured\n", val);
1636 return 0;
1637 }
1638
1639 memset(&params, 0, sizeof(struct qed_sp_vport_update_params));
1640 params.opaque_fid = p_vf->opaque_fid;
1641 params.vport_id = p_vf->vport_id;
1642 params.update_anti_spoofing_en_flg = 1;
1643 params.anti_spoofing_en = val;
1644
1645 rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
cb1fa088 1646 if (!rc) {
6ddc7608
YM		 1647 p_vf->spoof_chk = val;
1648 p_vf->req_spoofchk_val = p_vf->spoof_chk;
1649 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1650 "Spoofchk val[%d] configured\n", val);
1651 } else {
1652 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1653 "Spoofchk configuration[val:%d] failed for VF[%d]\n",
1654 val, p_vf->relative_vf_id);
1655 }
1656
1657 return rc;
1658}
1659
08feecd7
YM		 1660static int qed_iov_reconfigure_unicast_vlan(struct qed_hwfn *p_hwfn,
1661 struct qed_vf_info *p_vf)
1662{
1663 struct qed_filter_ucast filter;
1664 int rc = 0;
1665 int i;
1666
1667 memset(&filter, 0, sizeof(filter));
1668 filter.is_rx_filter = 1;
1669 filter.is_tx_filter = 1;
1670 filter.vport_to_add_to = p_vf->vport_id;
1671 filter.opcode = QED_FILTER_ADD;
1672
1673 /* Reconfigure vlans */
1674 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
1675 if (!p_vf->shadow_config.vlans[i].used)
1676 continue;
1677
1678 filter.type = QED_FILTER_VLAN;
1679 filter.vlan = p_vf->shadow_config.vlans[i].vid;
1a635e48 1680 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
08feecd7
YM		 1681 "Reconfiguring VLAN [0x%04x] for VF [%04x]\n",
1682 filter.vlan, p_vf->relative_vf_id);
1a635e48
YM		 1683 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1684 &filter, QED_SPQ_MODE_CB, NULL);
08feecd7
YM		 1685 if (rc) {
1686 DP_NOTICE(p_hwfn,
1687 "Failed to configure VLAN [%04x] to VF [%04x]\n",
1688 filter.vlan, p_vf->relative_vf_id);
1689 break;
1690 }
1691 }
1692
1693 return rc;
1694}
1695
1696static int
1697qed_iov_reconfigure_unicast_shadow(struct qed_hwfn *p_hwfn,
1698 struct qed_vf_info *p_vf, u64 events)
1699{
1700 int rc = 0;
1701
1a635e48 1702 if ((events & BIT(VLAN_ADDR_FORCED)) &&
08feecd7
YM		 1703 !(p_vf->configured_features & (1 << VLAN_ADDR_FORCED)))
1704 rc = qed_iov_reconfigure_unicast_vlan(p_hwfn, p_vf);
1705
1706 return rc;
1707}
1708
1709static int qed_iov_configure_vport_forced(struct qed_hwfn *p_hwfn,
1710 struct qed_vf_info *p_vf, u64 events)
1711{
1712 int rc = 0;
1713 struct qed_filter_ucast filter;
1714
1715 if (!p_vf->vport_instance)
1716 return -EINVAL;
1717
1a635e48 1718 if (events & BIT(MAC_ADDR_FORCED)) {
eff16960
YM		 1719 /* Since there's no way [currently] of removing the MAC,
1720 * we can always assume this means we need to force it.
1721 */
1722 memset(&filter, 0, sizeof(filter));
1723 filter.type = QED_FILTER_MAC;
1724 filter.opcode = QED_FILTER_REPLACE;
1725 filter.is_rx_filter = 1;
1726 filter.is_tx_filter = 1;
1727 filter.vport_to_add_to = p_vf->vport_id;
1728 ether_addr_copy(filter.mac, p_vf->bulletin.p_virt->mac);
1729
1730 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1731 &filter, QED_SPQ_MODE_CB, NULL);
1732 if (rc) {
1733 DP_NOTICE(p_hwfn,
1734 "PF failed to configure MAC for VF\n");
1735 return rc;
1736 }
1737
1738 p_vf->configured_features |= 1 << MAC_ADDR_FORCED;
1739 }
1740
1a635e48 1741 if (events & BIT(VLAN_ADDR_FORCED)) {
08feecd7
YM		 1742 struct qed_sp_vport_update_params vport_update;
1743 u8 removal;
1744 int i;
1745
1746 memset(&filter, 0, sizeof(filter));
1747 filter.type = QED_FILTER_VLAN;
1748 filter.is_rx_filter = 1;
1749 filter.is_tx_filter = 1;
1750 filter.vport_to_add_to = p_vf->vport_id;
1751 filter.vlan = p_vf->bulletin.p_virt->pvid;
1752 filter.opcode = filter.vlan ? QED_FILTER_REPLACE :
1753 QED_FILTER_FLUSH;
1754
1755 /* Send the ramrod */
1756 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1757 &filter, QED_SPQ_MODE_CB, NULL);
1758 if (rc) {
1759 DP_NOTICE(p_hwfn,
1760 "PF failed to configure VLAN for VF\n");
1761 return rc;
1762 }
1763
1764 /* Update the default-vlan & silent vlan stripping */
1765 memset(&vport_update, 0, sizeof(vport_update));
1766 vport_update.opaque_fid = p_vf->opaque_fid;
1767 vport_update.vport_id = p_vf->vport_id;
1768 vport_update.update_default_vlan_enable_flg = 1;
1769 vport_update.default_vlan_enable_flg = filter.vlan ? 1 : 0;
1770 vport_update.update_default_vlan_flg = 1;
1771 vport_update.default_vlan = filter.vlan;
1772
1773 vport_update.update_inner_vlan_removal_flg = 1;
1774 removal = filter.vlan ? 1
1775 : p_vf->shadow_config.inner_vlan_removal;
1776 vport_update.inner_vlan_removal_flg = removal;
1777 vport_update.silent_vlan_removal_flg = filter.vlan ? 1 : 0;
1778 rc = qed_sp_vport_update(p_hwfn,
1779 &vport_update,
1780 QED_SPQ_MODE_EBLOCK, NULL);
1781 if (rc) {
1782 DP_NOTICE(p_hwfn,
1783 "PF failed to configure VF vport for vlan\n");
1784 return rc;
1785 }
1786
1787 /* Update all the Rx queues */
1788 for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) {
3da7a37a 1789 struct qed_queue_cid *p_cid;
08feecd7 1790
3da7a37a
MY		 1791 p_cid = p_vf->vf_queues[i].p_rx_cid;
1792 if (!p_cid)
08feecd7
YM		 1793 continue;
1794
3da7a37a
MY		 1795 rc = qed_sp_eth_rx_queues_update(p_hwfn,
1796 (void **)&p_cid,
08feecd7
YM		 1797 1, 0, 1,
1798 QED_SPQ_MODE_EBLOCK,
1799 NULL);
1800 if (rc) {
1801 DP_NOTICE(p_hwfn,
1802 "Failed to send Rx update fo queue[0x%04x]\n",
3da7a37a 1803 p_cid->rel.queue_id);
08feecd7
YM		 1804 return rc;
1805 }
1806 }
1807
1808 if (filter.vlan)
1809 p_vf->configured_features |= 1 << VLAN_ADDR_FORCED;
1810 else
1a635e48 1811 p_vf->configured_features &= ~BIT(VLAN_ADDR_FORCED);
08feecd7
YM		 1812 }
1813
1814 /* If forced features are terminated, we need to configure the shadow
1815 * configuration back again.
1816 */
1817 if (events)
1818 qed_iov_reconfigure_unicast_shadow(p_hwfn, p_vf, events);
1819
1820 return rc;
1821}
1822
dacd88d6
YM		 1823static void qed_iov_vf_mbx_start_vport(struct qed_hwfn *p_hwfn,
1824 struct qed_ptt *p_ptt,
1825 struct qed_vf_info *vf)
1826{
1827 struct qed_sp_vport_start_params params = { 0 };
1828 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1829 struct vfpf_vport_start_tlv *start;
1830 u8 status = PFVF_STATUS_SUCCESS;
1831 struct qed_vf_info *vf_info;
08feecd7 1832 u64 *p_bitmap;
dacd88d6
YM		 1833 int sb_id;
1834 int rc;
1835
1836 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vf->relative_vf_id, true);
1837 if (!vf_info) {
1838 DP_NOTICE(p_hwfn->cdev,
1839 "Failed to get VF info, invalid vfid [%d]\n",
1840 vf->relative_vf_id);
1841 return;
1842 }
1843
1844 vf->state = VF_ENABLED;
1845 start = &mbx->req_virt->start_vport;
1846
b801b159
MY		 1847 qed_iov_enable_vf_traffic(p_hwfn, p_ptt, vf);
1848
dacd88d6
YM		 1849 /* Initialize Status block in CAU */
1850 for (sb_id = 0; sb_id < vf->num_sbs; sb_id++) {
1851 if (!start->sb_addr[sb_id]) {
1852 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1853 "VF[%d] did not fill the address of SB %d\n",
1854 vf->relative_vf_id, sb_id);
1855 break;
1856 }
1857
1858 qed_int_cau_conf_sb(p_hwfn, p_ptt,
1859 start->sb_addr[sb_id],
1a635e48 1860 vf->igu_sbs[sb_id], vf->abs_vf_id, 1);
dacd88d6 1861 }
dacd88d6
YM		 1862
1863 vf->mtu = start->mtu;
08feecd7
YM		 1864 vf->shadow_config.inner_vlan_removal = start->inner_vlan_removal;
1865
1866 /* Take into consideration configuration forced by hypervisor;
1867 * If none is configured, use the supplied VF values [for old
1868 * vfs that would still be fine, since they passed '0' as padding].
1869 */
1870 p_bitmap = &vf_info->bulletin.p_virt->valid_bitmap;
1a635e48 1871 if (!(*p_bitmap & BIT(VFPF_BULLETIN_UNTAGGED_DEFAULT_FORCED))) {
08feecd7
YM		 1872 u8 vf_req = start->only_untagged;
1873
1874 vf_info->bulletin.p_virt->default_only_untagged = vf_req;
1875 *p_bitmap |= 1 << VFPF_BULLETIN_UNTAGGED_DEFAULT;
1876 }
dacd88d6
YM		 1877
1878 params.tpa_mode = start->tpa_mode;
1879 params.remove_inner_vlan = start->inner_vlan_removal;
831bfb0e 1880 params.tx_switching = true;
dacd88d6 1881
08feecd7 1882 params.only_untagged = vf_info->bulletin.p_virt->default_only_untagged;
dacd88d6
YM		 1883 params.drop_ttl0 = false;
1884 params.concrete_fid = vf->concrete_fid;
1885 params.opaque_fid = vf->opaque_fid;
1886 params.vport_id = vf->vport_id;
1887 params.max_buffers_per_cqe = start->max_buffers_per_cqe;
1888 params.mtu = vf->mtu;
11a85d75 1889 params.check_mac = true;
dacd88d6
YM		 1890
1891 rc = qed_sp_eth_vport_start(p_hwfn, &params);
1a635e48 1892 if (rc) {
dacd88d6
YM		 1893 DP_ERR(p_hwfn,
1894 "qed_iov_vf_mbx_start_vport returned error %d\n", rc);
1895 status = PFVF_STATUS_FAILURE;
1896 } else {
1897 vf->vport_instance++;
08feecd7
YM		 1898
1899 /* Force configuration if needed on the newly opened vport */
1900 qed_iov_configure_vport_forced(p_hwfn, vf, *p_bitmap);
6ddc7608
YM		 1901
1902 __qed_iov_spoofchk_set(p_hwfn, vf, vf->req_spoofchk_val);
dacd88d6
YM		 1903 }
1904 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_START,
1905 sizeof(struct pfvf_def_resp_tlv), status);
1906}
1907
1908static void qed_iov_vf_mbx_stop_vport(struct qed_hwfn *p_hwfn,
1909 struct qed_ptt *p_ptt,
1910 struct qed_vf_info *vf)
1911{
1912 u8 status = PFVF_STATUS_SUCCESS;
1913 int rc;
1914
1915 vf->vport_instance--;
6ddc7608 1916 vf->spoof_chk = false;
dacd88d6 1917
f109c240
MY		 1918 if ((qed_iov_validate_active_rxq(p_hwfn, vf)) ||
1919 (qed_iov_validate_active_txq(p_hwfn, vf))) {
1920 vf->b_malicious = true;
1921 DP_NOTICE(p_hwfn,
1922 "VF [%02x] - considered malicious; Unable to stop RX/TX queuess\n",
1923 vf->abs_vf_id);
1924 status = PFVF_STATUS_MALICIOUS;
1925 goto out;
1926 }
1927
dacd88d6 1928 rc = qed_sp_vport_stop(p_hwfn, vf->opaque_fid, vf->vport_id);
1a635e48 1929 if (rc) {
dacd88d6
YM		 1930 DP_ERR(p_hwfn, "qed_iov_vf_mbx_stop_vport returned error %d\n",
1931 rc);
1932 status = PFVF_STATUS_FAILURE;
1933 }
1934
08feecd7
YM		 1935 /* Forget the configuration on the vport */
1936 vf->configured_features = 0;
1937 memset(&vf->shadow_config, 0, sizeof(vf->shadow_config));
1938
f109c240 1939out:
dacd88d6
YM		 1940 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_TEARDOWN,
1941 sizeof(struct pfvf_def_resp_tlv), status);
1942}
1943
dacd88d6
YM		 1944static void qed_iov_vf_mbx_start_rxq_resp(struct qed_hwfn *p_hwfn,
1945 struct qed_ptt *p_ptt,
a044df83
YM		 1946 struct qed_vf_info *vf,
1947 u8 status, bool b_legacy)
dacd88d6
YM		 1948{
1949 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1950 struct pfvf_start_queue_resp_tlv *p_tlv;
1951 struct vfpf_start_rxq_tlv *req;
a044df83 1952 u16 length;
dacd88d6
YM		 1953
1954 mbx->offset = (u8 *)mbx->reply_virt;
1955
a044df83
YM		 1956 /* Taking a bigger struct instead of adding a TLV to list was a
1957 * mistake, but one which we're now stuck with, as some older
1958 * clients assume the size of the previous response.
1959 */
1960 if (!b_legacy)
1961 length = sizeof(*p_tlv);
1962 else
1963 length = sizeof(struct pfvf_def_resp_tlv);
1964
dacd88d6 1965 p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_RXQ,
a044df83 1966 length);
dacd88d6
YM		 1967 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
1968 sizeof(struct channel_list_end_tlv));
1969
1970 /* Update the TLV with the response */
a044df83 1971 if ((status == PFVF_STATUS_SUCCESS) && !b_legacy) {
dacd88d6 1972 req = &mbx->req_virt->start_rxq;
351a4ded
YM		 1973 p_tlv->offset = PXP_VF_BAR0_START_MSDM_ZONE_B +
1974 offsetof(struct mstorm_vf_zone,
1975 non_trigger.eth_rx_queue_producers) +
1976 sizeof(struct eth_rx_prod_data) * req->rx_qid;
dacd88d6
YM		 1977 }
1978
a044df83 1979 qed_iov_send_response(p_hwfn, p_ptt, vf, length, status);
dacd88d6
YM		 1980}
1981
1982static void qed_iov_vf_mbx_start_rxq(struct qed_hwfn *p_hwfn,
1983 struct qed_ptt *p_ptt,
1984 struct qed_vf_info *vf)
1985{
1986 struct qed_queue_start_common_params params;
1987 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
41086467 1988 u8 status = PFVF_STATUS_NO_RESOURCE;
3da7a37a 1989 struct qed_vf_q_info *p_queue;
dacd88d6 1990 struct vfpf_start_rxq_tlv *req;
a044df83 1991 bool b_legacy_vf = false;
dacd88d6
YM		 1992 int rc;
1993
dacd88d6 1994 req = &mbx->req_virt->start_rxq;
41086467 1995
f109c240
MY		 1996 if (!qed_iov_validate_rxq(p_hwfn, vf, req->rx_qid,
1997 QED_IOV_VALIDATE_Q_DISABLE) ||
41086467
YM		 1998 !qed_iov_validate_sb(p_hwfn, vf, req->hw_sb))
1999 goto out;
2000
3da7a37a
MY		 2001 /* Acquire a new queue-cid */
2002 p_queue = &vf->vf_queues[req->rx_qid];
2003
2004 memset(&params, 0, sizeof(params));
2005 params.queue_id = p_queue->fw_rx_qid;
dacd88d6 2006 params.vport_id = vf->vport_id;
3da7a37a 2007 params.stats_id = vf->abs_vf_id + 0x10;
dacd88d6
YM		 2008 params.sb = req->hw_sb;
2009 params.sb_idx = req->sb_index;
2010
3da7a37a
MY		 2011 p_queue->p_rx_cid = _qed_eth_queue_to_cid(p_hwfn,
2012 vf->opaque_fid,
2013 p_queue->fw_cid,
2014 req->rx_qid, &params);
2015 if (!p_queue->p_rx_cid)
2016 goto out;
2017
a044df83
YM		 2018 /* Legacy VFs have their Producers in a different location, which they
2019 * calculate on their own and clean the producer prior to this.
2020 */
2021 if (vf->acquire.vfdev_info.eth_fp_hsi_minor ==
2022 ETH_HSI_VER_NO_PKT_LEN_TUNN) {
2023 b_legacy_vf = true;
2024 } else {
2025 REG_WR(p_hwfn,
2026 GTT_BAR0_MAP_REG_MSDM_RAM +
2027 MSTORM_ETH_VF_PRODS_OFFSET(vf->abs_vf_id, req->rx_qid),
2028 0);
2029 }
3da7a37a 2030 p_queue->p_rx_cid->b_legacy_vf = b_legacy_vf;
a044df83 2031
3da7a37a
MY		 2032 rc = qed_eth_rxq_start_ramrod(p_hwfn,
2033 p_queue->p_rx_cid,
2034 req->bd_max_bytes,
2035 req->rxq_addr,
2036 req->cqe_pbl_addr, req->cqe_pbl_size);
dacd88d6
YM		 2037 if (rc) {
2038 status = PFVF_STATUS_FAILURE;
3da7a37a
MY		 2039 qed_eth_queue_cid_release(p_hwfn, p_queue->p_rx_cid);
2040 p_queue->p_rx_cid = NULL;
dacd88d6 2041 } else {
41086467 2042 status = PFVF_STATUS_SUCCESS;
dacd88d6
YM		 2043 vf->num_active_rxqs++;
2044 }
2045
41086467 2046out:
a044df83 2047 qed_iov_vf_mbx_start_rxq_resp(p_hwfn, p_ptt, vf, status, b_legacy_vf);
dacd88d6
YM		 2048}
2049
eaf3c0c6
CM		 2050static void
2051qed_iov_pf_update_tun_response(struct pfvf_update_tunn_param_tlv *p_resp,
2052 struct qed_tunnel_info *p_tun,
2053 u16 tunn_feature_mask)
2054{
2055 p_resp->tunn_feature_mask = tunn_feature_mask;
2056 p_resp->vxlan_mode = p_tun->vxlan.b_mode_enabled;
2057 p_resp->l2geneve_mode = p_tun->l2_geneve.b_mode_enabled;
2058 p_resp->ipgeneve_mode = p_tun->ip_geneve.b_mode_enabled;
2059 p_resp->l2gre_mode = p_tun->l2_gre.b_mode_enabled;
2060 p_resp->ipgre_mode = p_tun->l2_gre.b_mode_enabled;
2061 p_resp->vxlan_clss = p_tun->vxlan.tun_cls;
2062 p_resp->l2gre_clss = p_tun->l2_gre.tun_cls;
2063 p_resp->ipgre_clss = p_tun->ip_gre.tun_cls;
2064 p_resp->l2geneve_clss = p_tun->l2_geneve.tun_cls;
2065 p_resp->ipgeneve_clss = p_tun->ip_geneve.tun_cls;
2066 p_resp->geneve_udp_port = p_tun->geneve_port.port;
2067 p_resp->vxlan_udp_port = p_tun->vxlan_port.port;
2068}
2069
2070static void
2071__qed_iov_pf_update_tun_param(struct vfpf_update_tunn_param_tlv *p_req,
2072 struct qed_tunn_update_type *p_tun,
2073 enum qed_tunn_mode mask, u8 tun_cls)
2074{
2075 if (p_req->tun_mode_update_mask & BIT(mask)) {
2076 p_tun->b_update_mode = true;
2077
2078 if (p_req->tunn_mode & BIT(mask))
2079 p_tun->b_mode_enabled = true;
2080 }
2081
2082 p_tun->tun_cls = tun_cls;
2083}
2084
2085static void
2086qed_iov_pf_update_tun_param(struct vfpf_update_tunn_param_tlv *p_req,
2087 struct qed_tunn_update_type *p_tun,
2088 struct qed_tunn_update_udp_port *p_port,
2089 enum qed_tunn_mode mask,
2090 u8 tun_cls, u8 update_port, u16 port)
2091{
2092 if (update_port) {
2093 p_port->b_update_port = true;
2094 p_port->port = port;
2095 }
2096
2097 __qed_iov_pf_update_tun_param(p_req, p_tun, mask, tun_cls);
2098}
2099
2100static bool
2101qed_iov_pf_validate_tunn_param(struct vfpf_update_tunn_param_tlv *p_req)
2102{
2103 bool b_update_requested = false;
2104
2105 if (p_req->tun_mode_update_mask || p_req->update_tun_cls ||
2106 p_req->update_geneve_port || p_req->update_vxlan_port)
2107 b_update_requested = true;
2108
2109 return b_update_requested;
2110}
2111
2112static void qed_pf_validate_tunn_mode(struct qed_tunn_update_type *tun, int *rc)
2113{
2114 if (tun->b_update_mode && !tun->b_mode_enabled) {
2115 tun->b_update_mode = false;
2116 *rc = -EINVAL;
2117 }
2118}
2119
2120static int
2121qed_pf_validate_modify_tunn_config(struct qed_hwfn *p_hwfn,
2122 u16 *tun_features, bool *update,
2123 struct qed_tunnel_info *tun_src)
2124{
2125 struct qed_eth_cb_ops *ops = p_hwfn->cdev->protocol_ops.eth;
2126 struct qed_tunnel_info *tun = &p_hwfn->cdev->tunnel;
2127 u16 bultn_vxlan_port, bultn_geneve_port;
2128 void *cookie = p_hwfn->cdev->ops_cookie;
2129 int i, rc = 0;
2130
2131 *tun_features = p_hwfn->cdev->tunn_feature_mask;
2132 bultn_vxlan_port = tun->vxlan_port.port;
2133 bultn_geneve_port = tun->geneve_port.port;
2134 qed_pf_validate_tunn_mode(&tun_src->vxlan, &rc);
2135 qed_pf_validate_tunn_mode(&tun_src->l2_geneve, &rc);
2136 qed_pf_validate_tunn_mode(&tun_src->ip_geneve, &rc);
2137 qed_pf_validate_tunn_mode(&tun_src->l2_gre, &rc);
2138 qed_pf_validate_tunn_mode(&tun_src->ip_gre, &rc);
2139
2140 if ((tun_src->b_update_rx_cls || tun_src->b_update_tx_cls) &&
2141 (tun_src->vxlan.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
2142 tun_src->l2_geneve.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
2143 tun_src->ip_geneve.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
2144 tun_src->l2_gre.tun_cls != QED_TUNN_CLSS_MAC_VLAN ||
2145 tun_src->ip_gre.tun_cls != QED_TUNN_CLSS_MAC_VLAN)) {
2146 tun_src->b_update_rx_cls = false;
2147 tun_src->b_update_tx_cls = false;
2148 rc = -EINVAL;
2149 }
2150
2151 if (tun_src->vxlan_port.b_update_port) {
2152 if (tun_src->vxlan_port.port == tun->vxlan_port.port) {
2153 tun_src->vxlan_port.b_update_port = false;
2154 } else {
2155 *update = true;
2156 bultn_vxlan_port = tun_src->vxlan_port.port;
2157 }
2158 }
2159
2160 if (tun_src->geneve_port.b_update_port) {
2161 if (tun_src->geneve_port.port == tun->geneve_port.port) {
2162 tun_src->geneve_port.b_update_port = false;
2163 } else {
2164 *update = true;
2165 bultn_geneve_port = tun_src->geneve_port.port;
2166 }
2167 }
2168
2169 qed_for_each_vf(p_hwfn, i) {
2170 qed_iov_bulletin_set_udp_ports(p_hwfn, i, bultn_vxlan_port,
2171 bultn_geneve_port);
2172 }
2173
2174 qed_schedule_iov(p_hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
2175 ops->ports_update(cookie, bultn_vxlan_port, bultn_geneve_port);
2176
2177 return rc;
2178}
2179
2180static void qed_iov_vf_mbx_update_tunn_param(struct qed_hwfn *p_hwfn,
2181 struct qed_ptt *p_ptt,
2182 struct qed_vf_info *p_vf)
2183{
2184 struct qed_tunnel_info *p_tun = &p_hwfn->cdev->tunnel;
2185 struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
2186 struct pfvf_update_tunn_param_tlv *p_resp;
2187 struct vfpf_update_tunn_param_tlv *p_req;
2188 u8 status = PFVF_STATUS_SUCCESS;
2189 bool b_update_required = false;
2190 struct qed_tunnel_info tunn;
2191 u16 tunn_feature_mask = 0;
2192 int i, rc = 0;
2193
2194 mbx->offset = (u8 *)mbx->reply_virt;
2195
2196 memset(&tunn, 0, sizeof(tunn));
2197 p_req = &mbx->req_virt->tunn_param_update;
2198
2199 if (!qed_iov_pf_validate_tunn_param(p_req)) {
2200 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2201 "No tunnel update requested by VF\n");
2202 status = PFVF_STATUS_FAILURE;
2203 goto send_resp;
2204 }
2205
2206 tunn.b_update_rx_cls = p_req->update_tun_cls;
2207 tunn.b_update_tx_cls = p_req->update_tun_cls;
2208
2209 qed_iov_pf_update_tun_param(p_req, &tunn.vxlan, &tunn.vxlan_port,
2210 QED_MODE_VXLAN_TUNN, p_req->vxlan_clss,
2211 p_req->update_vxlan_port,
2212 p_req->vxlan_port);
2213 qed_iov_pf_update_tun_param(p_req, &tunn.l2_geneve, &tunn.geneve_port,
2214 QED_MODE_L2GENEVE_TUNN,
2215 p_req->l2geneve_clss,
2216 p_req->update_geneve_port,
2217 p_req->geneve_port);
2218 __qed_iov_pf_update_tun_param(p_req, &tunn.ip_geneve,
2219 QED_MODE_IPGENEVE_TUNN,
2220 p_req->ipgeneve_clss);
2221 __qed_iov_pf_update_tun_param(p_req, &tunn.l2_gre,
2222 QED_MODE_L2GRE_TUNN, p_req->l2gre_clss);
2223 __qed_iov_pf_update_tun_param(p_req, &tunn.ip_gre,
2224 QED_MODE_IPGRE_TUNN, p_req->ipgre_clss);
2225
2226 /* If PF modifies VF's req then it should
2227 * still return an error in case of partial configuration
2228 * or modified configuration as opposed to requested one.
2229 */
2230 rc = qed_pf_validate_modify_tunn_config(p_hwfn, &tunn_feature_mask,
2231 &b_update_required, &tunn);
2232
2233 if (rc)
2234 status = PFVF_STATUS_FAILURE;
2235
2236 /* If QED client is willing to update anything ? */
2237 if (b_update_required) {
2238 u16 geneve_port;
2239
4f64675f 2240 rc = qed_sp_pf_update_tunn_cfg(p_hwfn, p_ptt, &tunn,
eaf3c0c6
CM		 2241 QED_SPQ_MODE_EBLOCK, NULL);
2242 if (rc)
2243 status = PFVF_STATUS_FAILURE;
2244
2245 geneve_port = p_tun->geneve_port.port;
2246 qed_for_each_vf(p_hwfn, i) {
2247 qed_iov_bulletin_set_udp_ports(p_hwfn, i,
2248 p_tun->vxlan_port.port,
2249 geneve_port);
2250 }
2251 }
2252
2253send_resp:
2254 p_resp = qed_add_tlv(p_hwfn, &mbx->offset,
2255 CHANNEL_TLV_UPDATE_TUNN_PARAM, sizeof(*p_resp));
2256
2257 qed_iov_pf_update_tun_response(p_resp, p_tun, tunn_feature_mask);
2258 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
2259 sizeof(struct channel_list_end_tlv));
2260
2261 qed_iov_send_response(p_hwfn, p_ptt, p_vf, sizeof(*p_resp), status);
2262}
2263
5040acf5
YM		 2264static void qed_iov_vf_mbx_start_txq_resp(struct qed_hwfn *p_hwfn,
2265 struct qed_ptt *p_ptt,
2266 struct qed_vf_info *p_vf, u8 status)
2267{
2268 struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
2269 struct pfvf_start_queue_resp_tlv *p_tlv;
a044df83
YM		 2270 bool b_legacy = false;
2271 u16 length;
5040acf5
YM		 2272
2273 mbx->offset = (u8 *)mbx->reply_virt;
2274
a044df83
YM		 2275 /* Taking a bigger struct instead of adding a TLV to list was a
2276 * mistake, but one which we're now stuck with, as some older
2277 * clients assume the size of the previous response.
2278 */
2279 if (p_vf->acquire.vfdev_info.eth_fp_hsi_minor ==
2280 ETH_HSI_VER_NO_PKT_LEN_TUNN)
2281 b_legacy = true;
2282
2283 if (!b_legacy)
2284 length = sizeof(*p_tlv);
2285 else
2286 length = sizeof(struct pfvf_def_resp_tlv);
2287
5040acf5 2288 p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_TXQ,
a044df83 2289 length);
5040acf5
YM		 2290 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
2291 sizeof(struct channel_list_end_tlv));
2292
2293 /* Update the TLV with the response */
a044df83 2294 if ((status == PFVF_STATUS_SUCCESS) && !b_legacy) {
5040acf5
YM		 2295 u16 qid = mbx->req_virt->start_txq.tx_qid;
2296
51ff1725
RA		 2297 p_tlv->offset = qed_db_addr_vf(p_vf->vf_queues[qid].fw_cid,
2298 DQ_DEMS_LEGACY);
5040acf5
YM		 2299 }
2300
a044df83 2301 qed_iov_send_response(p_hwfn, p_ptt, p_vf, length, status);
5040acf5
YM		 2302}
2303
dacd88d6
YM		 2304static void qed_iov_vf_mbx_start_txq(struct qed_hwfn *p_hwfn,
2305 struct qed_ptt *p_ptt,
2306 struct qed_vf_info *vf)
2307{
dacd88d6
YM		 2308 struct qed_queue_start_common_params params;
2309 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
41086467 2310 u8 status = PFVF_STATUS_NO_RESOURCE;
dacd88d6 2311 struct vfpf_start_txq_tlv *req;
3da7a37a 2312 struct qed_vf_q_info *p_queue;
dacd88d6 2313 int rc;
3da7a37a 2314 u16 pq;
dacd88d6 2315
dacd88d6
YM		 2316 memset(&params, 0, sizeof(params));
2317 req = &mbx->req_virt->start_txq;
41086467 2318
f109c240
MY		 2319 if (!qed_iov_validate_txq(p_hwfn, vf, req->tx_qid,
2320 QED_IOV_VALIDATE_Q_DISABLE) ||
41086467
YM		 2321 !qed_iov_validate_sb(p_hwfn, vf, req->hw_sb))
2322 goto out;
2323
3da7a37a
MY		 2324 /* Acquire a new queue-cid */
2325 p_queue = &vf->vf_queues[req->tx_qid];
2326
2327 params.queue_id = p_queue->fw_tx_qid;
dacd88d6 2328 params.vport_id = vf->vport_id;
3da7a37a 2329 params.stats_id = vf->abs_vf_id + 0x10;
dacd88d6
YM		 2330 params.sb = req->hw_sb;
2331 params.sb_idx = req->sb_index;
2332
3da7a37a
MY		 2333 p_queue->p_tx_cid = _qed_eth_queue_to_cid(p_hwfn,
2334 vf->opaque_fid,
2335 p_queue->fw_cid,
2336 req->tx_qid, &params);
2337 if (!p_queue->p_tx_cid)
2338 goto out;
dacd88d6 2339
b5a9ee7c 2340 pq = qed_get_cm_pq_idx_vf(p_hwfn, vf->relative_vf_id);
3da7a37a
MY		 2341 rc = qed_eth_txq_start_ramrod(p_hwfn, p_queue->p_tx_cid,
2342 req->pbl_addr, req->pbl_size, pq);
41086467 2343 if (rc) {
dacd88d6 2344 status = PFVF_STATUS_FAILURE;
3da7a37a
MY		 2345 qed_eth_queue_cid_release(p_hwfn, p_queue->p_tx_cid);
2346 p_queue->p_tx_cid = NULL;
41086467
YM		 2347 } else {
2348 status = PFVF_STATUS_SUCCESS;
41086467 2349 }
dacd88d6 2350
41086467 2351out:
5040acf5 2352 qed_iov_vf_mbx_start_txq_resp(p_hwfn, p_ptt, vf, status);
dacd88d6
YM		 2353}
2354
2355static int qed_iov_vf_stop_rxqs(struct qed_hwfn *p_hwfn,
2356 struct qed_vf_info *vf,
4c4fa793 2357 u16 rxq_id, bool cqe_completion)
dacd88d6 2358{
3da7a37a 2359 struct qed_vf_q_info *p_queue;
dacd88d6 2360 int rc = 0;
dacd88d6 2361
4c4fa793
MY		 2362 if (!qed_iov_validate_rxq(p_hwfn, vf, rxq_id,
2363 QED_IOV_VALIDATE_Q_ENABLE)) {
2364 DP_VERBOSE(p_hwfn,
2365 QED_MSG_IOV,
2366 "VF[%d] Tried Closing Rx 0x%04x which is inactive\n",
2367 vf->relative_vf_id, rxq_id);
dacd88d6 2368 return -EINVAL;
4c4fa793 2369 }
dacd88d6 2370
4c4fa793 2371 p_queue = &vf->vf_queues[rxq_id];
3da7a37a 2372
4c4fa793
MY		 2373 rc = qed_eth_rx_queue_stop(p_hwfn,
2374 p_queue->p_rx_cid,
2375 false, cqe_completion);
2376 if (rc)
2377 return rc;
3da7a37a 2378
4c4fa793
MY		 2379 p_queue->p_rx_cid = NULL;
2380 vf->num_active_rxqs--;
dacd88d6 2381
4c4fa793 2382 return 0;
dacd88d6
YM		 2383}
2384
2385static int qed_iov_vf_stop_txqs(struct qed_hwfn *p_hwfn,
4c4fa793 2386 struct qed_vf_info *vf, u16 txq_id)
dacd88d6 2387{
3da7a37a 2388 struct qed_vf_q_info *p_queue;
4c4fa793 2389 int rc = 0;
dacd88d6 2390
4c4fa793
MY		 2391 if (!qed_iov_validate_txq(p_hwfn, vf, txq_id,
2392 QED_IOV_VALIDATE_Q_ENABLE))
dacd88d6
YM		 2393 return -EINVAL;
2394
4c4fa793 2395 p_queue = &vf->vf_queues[txq_id];
dacd88d6 2396
4c4fa793
MY		 2397 rc = qed_eth_tx_queue_stop(p_hwfn, p_queue->p_tx_cid);
2398 if (rc)
2399 return rc;
3da7a37a 2400
4c4fa793 2401 p_queue->p_tx_cid = NULL;
3da7a37a 2402
4c4fa793 2403 return 0;
dacd88d6
YM		 2404}
2405
2406static void qed_iov_vf_mbx_stop_rxqs(struct qed_hwfn *p_hwfn,
2407 struct qed_ptt *p_ptt,
2408 struct qed_vf_info *vf)
2409{
2410 u16 length = sizeof(struct pfvf_def_resp_tlv);
2411 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
4c4fa793 2412 u8 status = PFVF_STATUS_FAILURE;
dacd88d6
YM		 2413 struct vfpf_stop_rxqs_tlv *req;
2414 int rc;
2415
4c4fa793
MY		 2416 /* There has never been an official driver that used this interface
2417 * for stopping multiple queues, and it is now considered deprecated.
2418 * Validate this isn't used here.
dacd88d6
YM		 2419 */
2420 req = &mbx->req_virt->stop_rxqs;
4c4fa793
MY		 2421 if (req->num_rxqs != 1) {
2422 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2423 "Odd; VF[%d] tried stopping multiple Rx queues\n",
2424 vf->relative_vf_id);
2425 status = PFVF_STATUS_NOT_SUPPORTED;
2426 goto out;
2427 }
dacd88d6 2428
4c4fa793
MY		 2429 rc = qed_iov_vf_stop_rxqs(p_hwfn, vf, req->rx_qid,
2430 req->cqe_completion);
2431 if (!rc)
2432 status = PFVF_STATUS_SUCCESS;
2433out:
dacd88d6
YM		 2434 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_RXQS,
2435 length, status);
2436}
2437
2438static void qed_iov_vf_mbx_stop_txqs(struct qed_hwfn *p_hwfn,
2439 struct qed_ptt *p_ptt,
2440 struct qed_vf_info *vf)
2441{
2442 u16 length = sizeof(struct pfvf_def_resp_tlv);
2443 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
4c4fa793 2444 u8 status = PFVF_STATUS_FAILURE;
dacd88d6
YM		 2445 struct vfpf_stop_txqs_tlv *req;
2446 int rc;
2447
4c4fa793
MY		 2448 /* There has never been an official driver that used this interface
2449 * for stopping multiple queues, and it is now considered deprecated.
2450 * Validate this isn't used here.
dacd88d6
YM		 2451 */
2452 req = &mbx->req_virt->stop_txqs;
4c4fa793
MY		 2453 if (req->num_txqs != 1) {
2454 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2455 "Odd; VF[%d] tried stopping multiple Tx queues\n",
2456 vf->relative_vf_id);
2457 status = PFVF_STATUS_NOT_SUPPORTED;
2458 goto out;
2459 }
2460 rc = qed_iov_vf_stop_txqs(p_hwfn, vf, req->tx_qid);
2461 if (!rc)
2462 status = PFVF_STATUS_SUCCESS;
dacd88d6 2463
4c4fa793 2464out:
dacd88d6
YM		 2465 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_TXQS,
2466 length, status);
2467}
2468
17b235c1
YM		 2469static void qed_iov_vf_mbx_update_rxqs(struct qed_hwfn *p_hwfn,
2470 struct qed_ptt *p_ptt,
2471 struct qed_vf_info *vf)
2472{
3da7a37a 2473 struct qed_queue_cid *handlers[QED_MAX_VF_CHAINS_PER_PF];
17b235c1
YM		 2474 u16 length = sizeof(struct pfvf_def_resp_tlv);
2475 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
2476 struct vfpf_update_rxq_tlv *req;
3da7a37a 2477 u8 status = PFVF_STATUS_FAILURE;
17b235c1
YM		 2478 u8 complete_event_flg;
2479 u8 complete_cqe_flg;
2480 u16 qid;
2481 int rc;
2482 u8 i;
2483
2484 req = &mbx->req_virt->update_rxq;
2485 complete_cqe_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_CQE_FLAG);
2486 complete_event_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG);
2487
3da7a37a 2488 /* Validate inputs */
f109c240
MY		 2489 for (i = req->rx_qid; i < req->rx_qid + req->num_rxqs; i++)
2490 if (!qed_iov_validate_rxq(p_hwfn, vf, i,
2491 QED_IOV_VALIDATE_Q_ENABLE)) {
2492 DP_INFO(p_hwfn, "VF[%d]: Incorrect Rxqs [%04x, %02x]\n",
2493 vf->relative_vf_id, req->rx_qid, req->num_rxqs);
3da7a37a 2494 goto out;
17b235c1
YM		 2495 }
2496
f109c240
MY		 2497 /* Prepare the handlers */
2498 for (i = 0; i < req->num_rxqs; i++) {
2499 qid = req->rx_qid + i;
3da7a37a 2500 handlers[i] = vf->vf_queues[qid].p_rx_cid;
17b235c1
YM		 2501 }
2502
3da7a37a
MY		 2503 rc = qed_sp_eth_rx_queues_update(p_hwfn, (void **)&handlers,
2504 req->num_rxqs,
2505 complete_cqe_flg,
2506 complete_event_flg,
2507 QED_SPQ_MODE_EBLOCK, NULL);
2508 if (rc)
2509 goto out;
2510
2511 status = PFVF_STATUS_SUCCESS;
2512out:
17b235c1
YM		 2513 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UPDATE_RXQ,
2514 length, status);
2515}
2516
dacd88d6
YM		 2517void *qed_iov_search_list_tlvs(struct qed_hwfn *p_hwfn,
2518 void *p_tlvs_list, u16 req_type)
2519{
2520 struct channel_tlv *p_tlv = (struct channel_tlv *)p_tlvs_list;
2521 int len = 0;
2522
2523 do {
2524 if (!p_tlv->length) {
2525 DP_NOTICE(p_hwfn, "Zero length TLV found\n");
2526 return NULL;
2527 }
2528
2529 if (p_tlv->type == req_type) {
2530 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2531 "Extended tlv type %d, length %d found\n",
2532 p_tlv->type, p_tlv->length);
2533 return p_tlv;
2534 }
2535
2536 len += p_tlv->length;
2537 p_tlv = (struct channel_tlv *)((u8 *)p_tlv + p_tlv->length);
2538
2539 if ((len + p_tlv->length) > TLV_BUFFER_SIZE) {
2540 DP_NOTICE(p_hwfn, "TLVs has overrun the buffer size\n");
2541 return NULL;
2542 }
2543 } while (p_tlv->type != CHANNEL_TLV_LIST_END);
2544
2545 return NULL;
2546}
2547
2548static void
2549qed_iov_vp_update_act_param(struct qed_hwfn *p_hwfn,
2550 struct qed_sp_vport_update_params *p_data,
2551 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2552{
2553 struct vfpf_vport_update_activate_tlv *p_act_tlv;
2554 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
2555
2556 p_act_tlv = (struct vfpf_vport_update_activate_tlv *)
2557 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2558 if (!p_act_tlv)
2559 return;
2560
2561 p_data->update_vport_active_rx_flg = p_act_tlv->update_rx;
2562 p_data->vport_active_rx_flg = p_act_tlv->active_rx;
2563 p_data->update_vport_active_tx_flg = p_act_tlv->update_tx;
2564 p_data->vport_active_tx_flg = p_act_tlv->active_tx;
2565 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACTIVATE;
2566}
2567
17b235c1
YM		 2568static void
2569qed_iov_vp_update_vlan_param(struct qed_hwfn *p_hwfn,
2570 struct qed_sp_vport_update_params *p_data,
2571 struct qed_vf_info *p_vf,
2572 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2573{
2574 struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
2575 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
2576
2577 p_vlan_tlv = (struct vfpf_vport_update_vlan_strip_tlv *)
2578 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2579 if (!p_vlan_tlv)
2580 return;
2581
08feecd7
YM		 2582 p_vf->shadow_config.inner_vlan_removal = p_vlan_tlv->remove_vlan;
2583
2584 /* Ignore the VF request if we're forcing a vlan */
1a635e48 2585 if (!(p_vf->configured_features & BIT(VLAN_ADDR_FORCED))) {
08feecd7
YM		 2586 p_data->update_inner_vlan_removal_flg = 1;
2587 p_data->inner_vlan_removal_flg = p_vlan_tlv->remove_vlan;
2588 }
17b235c1
YM		 2589
2590 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_VLAN_STRIP;
2591}
2592
2593static void
2594qed_iov_vp_update_tx_switch(struct qed_hwfn *p_hwfn,
2595 struct qed_sp_vport_update_params *p_data,
2596 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2597{
2598 struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
2599 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
2600
2601 p_tx_switch_tlv = (struct vfpf_vport_update_tx_switch_tlv *)
2602 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
2603 tlv);
2604 if (!p_tx_switch_tlv)
2605 return;
2606
2607 p_data->update_tx_switching_flg = 1;
2608 p_data->tx_switching_flg = p_tx_switch_tlv->tx_switching;
2609 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_TX_SWITCH;
2610}
2611
dacd88d6
YM		 2612static void
2613qed_iov_vp_update_mcast_bin_param(struct qed_hwfn *p_hwfn,
2614 struct qed_sp_vport_update_params *p_data,
2615 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2616{
2617 struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
2618 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_MCAST;
2619
2620 p_mcast_tlv = (struct vfpf_vport_update_mcast_bin_tlv *)
2621 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2622 if (!p_mcast_tlv)
2623 return;
2624
2625 p_data->update_approx_mcast_flg = 1;
2626 memcpy(p_data->bins, p_mcast_tlv->bins,
2627 sizeof(unsigned long) * ETH_MULTICAST_MAC_BINS_IN_REGS);
2628 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_MCAST;
2629}
2630
2631static void
2632qed_iov_vp_update_accept_flag(struct qed_hwfn *p_hwfn,
2633 struct qed_sp_vport_update_params *p_data,
2634 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2635{
2636 struct qed_filter_accept_flags *p_flags = &p_data->accept_flags;
2637 struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
2638 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
2639
2640 p_accept_tlv = (struct vfpf_vport_update_accept_param_tlv *)
2641 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2642 if (!p_accept_tlv)
2643 return;
2644
2645 p_flags->update_rx_mode_config = p_accept_tlv->update_rx_mode;
2646 p_flags->rx_accept_filter = p_accept_tlv->rx_accept_filter;
2647 p_flags->update_tx_mode_config = p_accept_tlv->update_tx_mode;
2648 p_flags->tx_accept_filter = p_accept_tlv->tx_accept_filter;
2649 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_PARAM;
2650}
2651
17b235c1
YM		 2652static void
2653qed_iov_vp_update_accept_any_vlan(struct qed_hwfn *p_hwfn,
2654 struct qed_sp_vport_update_params *p_data,
2655 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2656{
2657 struct vfpf_vport_update_accept_any_vlan_tlv *p_accept_any_vlan;
2658 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
2659
2660 p_accept_any_vlan = (struct vfpf_vport_update_accept_any_vlan_tlv *)
2661 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
2662 tlv);
2663 if (!p_accept_any_vlan)
2664 return;
2665
2666 p_data->accept_any_vlan = p_accept_any_vlan->accept_any_vlan;
2667 p_data->update_accept_any_vlan_flg =
2668 p_accept_any_vlan->update_accept_any_vlan_flg;
2669 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN;
2670}
2671
dacd88d6
YM		 2672static void
2673qed_iov_vp_update_rss_param(struct qed_hwfn *p_hwfn,
2674 struct qed_vf_info *vf,
2675 struct qed_sp_vport_update_params *p_data,
2676 struct qed_rss_params *p_rss,
f29ffdb6
MY		 2677 struct qed_iov_vf_mbx *p_mbx,
2678 u16 *tlvs_mask, u16 *tlvs_accepted)
dacd88d6
YM		 2679{
2680 struct vfpf_vport_update_rss_tlv *p_rss_tlv;
2681 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_RSS;
f29ffdb6 2682 bool b_reject = false;
dacd88d6 2683 u16 table_size;
f29ffdb6 2684 u16 i, q_idx;
dacd88d6
YM		 2685
2686 p_rss_tlv = (struct vfpf_vport_update_rss_tlv *)
2687 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2688 if (!p_rss_tlv) {
2689 p_data->rss_params = NULL;
2690 return;
2691 }
2692
2693 memset(p_rss, 0, sizeof(struct qed_rss_params));
2694
2695 p_rss->update_rss_config = !!(p_rss_tlv->update_rss_flags &
2696 VFPF_UPDATE_RSS_CONFIG_FLAG);
2697 p_rss->update_rss_capabilities = !!(p_rss_tlv->update_rss_flags &
2698 VFPF_UPDATE_RSS_CAPS_FLAG);
2699 p_rss->update_rss_ind_table = !!(p_rss_tlv->update_rss_flags &
2700 VFPF_UPDATE_RSS_IND_TABLE_FLAG);
2701 p_rss->update_rss_key = !!(p_rss_tlv->update_rss_flags &
2702 VFPF_UPDATE_RSS_KEY_FLAG);
2703
2704 p_rss->rss_enable = p_rss_tlv->rss_enable;
2705 p_rss->rss_eng_id = vf->relative_vf_id + 1;
2706 p_rss->rss_caps = p_rss_tlv->rss_caps;
2707 p_rss->rss_table_size_log = p_rss_tlv->rss_table_size_log;
dacd88d6
YM		 2708 memcpy(p_rss->rss_key, p_rss_tlv->rss_key, sizeof(p_rss->rss_key));
2709
2710 table_size = min_t(u16, ARRAY_SIZE(p_rss->rss_ind_table),
2711 (1 << p_rss_tlv->rss_table_size_log));
2712
dacd88d6 2713 for (i = 0; i < table_size; i++) {
f29ffdb6 2714 q_idx = p_rss_tlv->rss_ind_table[i];
f109c240
MY		 2715 if (!qed_iov_validate_rxq(p_hwfn, vf, q_idx,
2716 QED_IOV_VALIDATE_Q_ENABLE)) {
f29ffdb6
MY		 2717 DP_VERBOSE(p_hwfn,
2718 QED_MSG_IOV,
2719 "VF[%d]: Omitting RSS due to wrong queue %04x\n",
2720 vf->relative_vf_id, q_idx);
2721 b_reject = true;
2722 goto out;
2723 }
dacd88d6 2724
f29ffdb6 2725 p_rss->rss_ind_table[i] = vf->vf_queues[q_idx].p_rx_cid;
dacd88d6
YM		 2726 }
2727
2728 p_data->rss_params = p_rss;
f29ffdb6 2729out:
dacd88d6 2730 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_RSS;
f29ffdb6
MY		 2731 if (!b_reject)
2732 *tlvs_accepted |= 1 << QED_IOV_VP_UPDATE_RSS;
dacd88d6
YM		 2733}
2734
17b235c1
YM		 2735static void
2736qed_iov_vp_update_sge_tpa_param(struct qed_hwfn *p_hwfn,
2737 struct qed_vf_info *vf,
2738 struct qed_sp_vport_update_params *p_data,
2739 struct qed_sge_tpa_params *p_sge_tpa,
2740 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2741{
2742 struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
2743 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
2744
2745 p_sge_tpa_tlv = (struct vfpf_vport_update_sge_tpa_tlv *)
2746 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2747
2748 if (!p_sge_tpa_tlv) {
2749 p_data->sge_tpa_params = NULL;
2750 return;
2751 }
2752
2753 memset(p_sge_tpa, 0, sizeof(struct qed_sge_tpa_params));
2754
2755 p_sge_tpa->update_tpa_en_flg =
2756 !!(p_sge_tpa_tlv->update_sge_tpa_flags & VFPF_UPDATE_TPA_EN_FLAG);
2757 p_sge_tpa->update_tpa_param_flg =
2758 !!(p_sge_tpa_tlv->update_sge_tpa_flags &
2759 VFPF_UPDATE_TPA_PARAM_FLAG);
2760
2761 p_sge_tpa->tpa_ipv4_en_flg =
2762 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV4_EN_FLAG);
2763 p_sge_tpa->tpa_ipv6_en_flg =
2764 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV6_EN_FLAG);
2765 p_sge_tpa->tpa_pkt_split_flg =
2766 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_PKT_SPLIT_FLAG);
2767 p_sge_tpa->tpa_hdr_data_split_flg =
2768 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_HDR_DATA_SPLIT_FLAG);
2769 p_sge_tpa->tpa_gro_consistent_flg =
2770 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_GRO_CONSIST_FLAG);
2771
2772 p_sge_tpa->tpa_max_aggs_num = p_sge_tpa_tlv->tpa_max_aggs_num;
2773 p_sge_tpa->tpa_max_size = p_sge_tpa_tlv->tpa_max_size;
2774 p_sge_tpa->tpa_min_size_to_start = p_sge_tpa_tlv->tpa_min_size_to_start;
2775 p_sge_tpa->tpa_min_size_to_cont = p_sge_tpa_tlv->tpa_min_size_to_cont;
2776 p_sge_tpa->max_buffers_per_cqe = p_sge_tpa_tlv->max_buffers_per_cqe;
2777
2778 p_data->sge_tpa_params = p_sge_tpa;
2779
2780 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_SGE_TPA;
2781}
2782
f990c82c
MY		 2783static int qed_iov_pre_update_vport(struct qed_hwfn *hwfn,
2784 u8 vfid,
2785 struct qed_sp_vport_update_params *params,
2786 u16 *tlvs)
2787{
2788 u8 mask = QED_ACCEPT_UCAST_UNMATCHED | QED_ACCEPT_MCAST_UNMATCHED;
2789 struct qed_filter_accept_flags *flags = &params->accept_flags;
2790 struct qed_public_vf_info *vf_info;
2791
2792 /* Untrusted VFs can't even be trusted to know that fact.
2793 * Simply indicate everything is configured fine, and trace
2794 * configuration 'behind their back'.
2795 */
2796 if (!(*tlvs & BIT(QED_IOV_VP_UPDATE_ACCEPT_PARAM)))
2797 return 0;
2798
2799 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
2800
2801 if (flags->update_rx_mode_config) {
2802 vf_info->rx_accept_mode = flags->rx_accept_filter;
2803 if (!vf_info->is_trusted_configured)
2804 flags->rx_accept_filter &= ~mask;
2805 }
2806
2807 if (flags->update_tx_mode_config) {
2808 vf_info->tx_accept_mode = flags->tx_accept_filter;
2809 if (!vf_info->is_trusted_configured)
2810 flags->tx_accept_filter &= ~mask;
2811 }
2812
2813 return 0;
2814}
2815
dacd88d6
YM		 2816static void qed_iov_vf_mbx_vport_update(struct qed_hwfn *p_hwfn,
2817 struct qed_ptt *p_ptt,
2818 struct qed_vf_info *vf)
2819{
f29ffdb6 2820 struct qed_rss_params *p_rss_params = NULL;
dacd88d6
YM		 2821 struct qed_sp_vport_update_params params;
2822 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
17b235c1 2823 struct qed_sge_tpa_params sge_tpa_params;
f29ffdb6 2824 u16 tlvs_mask = 0, tlvs_accepted = 0;
dacd88d6 2825 u8 status = PFVF_STATUS_SUCCESS;
dacd88d6
YM		 2826 u16 length;
2827 int rc;
2828
41086467
YM		 2829 /* Valiate PF can send such a request */
2830 if (!vf->vport_instance) {
2831 DP_VERBOSE(p_hwfn,
2832 QED_MSG_IOV,
2833 "No VPORT instance available for VF[%d], failing vport update\n",
2834 vf->abs_vf_id);
2835 status = PFVF_STATUS_FAILURE;
2836 goto out;
2837 }
f29ffdb6
MY		 2838 p_rss_params = vzalloc(sizeof(*p_rss_params));
2839 if (p_rss_params == NULL) {
2840 status = PFVF_STATUS_FAILURE;
2841 goto out;
2842 }
41086467 2843
dacd88d6
YM		 2844 memset(&params, 0, sizeof(params));
2845 params.opaque_fid = vf->opaque_fid;
2846 params.vport_id = vf->vport_id;
2847 params.rss_params = NULL;
2848
2849 /* Search for extended tlvs list and update values
2850 * from VF in struct qed_sp_vport_update_params.
2851 */
2852 qed_iov_vp_update_act_param(p_hwfn, &params, mbx, &tlvs_mask);
17b235c1
YM		 2853 qed_iov_vp_update_vlan_param(p_hwfn, &params, vf, mbx, &tlvs_mask);
2854 qed_iov_vp_update_tx_switch(p_hwfn, &params, mbx, &tlvs_mask);
dacd88d6
YM		 2855 qed_iov_vp_update_mcast_bin_param(p_hwfn, &params, mbx, &tlvs_mask);
2856 qed_iov_vp_update_accept_flag(p_hwfn, &params, mbx, &tlvs_mask);
17b235c1
YM		 2857 qed_iov_vp_update_accept_any_vlan(p_hwfn, &params, mbx, &tlvs_mask);
2858 qed_iov_vp_update_sge_tpa_param(p_hwfn, vf, &params,
2859 &sge_tpa_params, mbx, &tlvs_mask);
dacd88d6 2860
f29ffdb6
MY		 2861 tlvs_accepted = tlvs_mask;
2862
2863 /* Some of the extended TLVs need to be validated first; In that case,
2864 * they can update the mask without updating the accepted [so that
2865 * PF could communicate to VF it has rejected request].
dacd88d6 2866 */
f29ffdb6
MY		 2867 qed_iov_vp_update_rss_param(p_hwfn, vf, &params, p_rss_params,
2868 mbx, &tlvs_mask, &tlvs_accepted);
2869
f990c82c
MY		 2870 if (qed_iov_pre_update_vport(p_hwfn, vf->relative_vf_id,
2871 &params, &tlvs_accepted)) {
2872 tlvs_accepted = 0;
2873 status = PFVF_STATUS_NOT_SUPPORTED;
2874 goto out;
2875 }
2876
f29ffdb6
MY		 2877 if (!tlvs_accepted) {
2878 if (tlvs_mask)
2879 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2880 "Upper-layer prevents VF vport configuration\n");
2881 else
2882 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2883 "No feature tlvs found for vport update\n");
dacd88d6
YM		 2884 status = PFVF_STATUS_NOT_SUPPORTED;
2885 goto out;
2886 }
2887
2888 rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
2889
2890 if (rc)
2891 status = PFVF_STATUS_FAILURE;
2892
2893out:
f29ffdb6 2894 vfree(p_rss_params);
dacd88d6 2895 length = qed_iov_prep_vp_update_resp_tlvs(p_hwfn, vf, mbx, status,
f29ffdb6 2896 tlvs_mask, tlvs_accepted);
dacd88d6
YM		 2897 qed_iov_send_response(p_hwfn, p_ptt, vf, length, status);
2898}
2899
8246d0b4
YM		 2900static int qed_iov_vf_update_vlan_shadow(struct qed_hwfn *p_hwfn,
2901 struct qed_vf_info *p_vf,
2902 struct qed_filter_ucast *p_params)
08feecd7
YM		 2903{
2904 int i;
2905
08feecd7
YM		 2906 /* First remove entries and then add new ones */
2907 if (p_params->opcode == QED_FILTER_REMOVE) {
2908 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
2909 if (p_vf->shadow_config.vlans[i].used &&
2910 p_vf->shadow_config.vlans[i].vid ==
2911 p_params->vlan) {
2912 p_vf->shadow_config.vlans[i].used = false;
2913 break;
2914 }
2915 if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
2916 DP_VERBOSE(p_hwfn,
2917 QED_MSG_IOV,
2918 "VF [%d] - Tries to remove a non-existing vlan\n",
2919 p_vf->relative_vf_id);
2920 return -EINVAL;
2921 }
2922 } else if (p_params->opcode == QED_FILTER_REPLACE ||
2923 p_params->opcode == QED_FILTER_FLUSH) {
2924 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
2925 p_vf->shadow_config.vlans[i].used = false;
2926 }
2927
2928 /* In forced mode, we're willing to remove entries - but we don't add
2929 * new ones.
2930 */
1a635e48 2931 if (p_vf->bulletin.p_virt->valid_bitmap & BIT(VLAN_ADDR_FORCED))
08feecd7
YM		 2932 return 0;
2933
2934 if (p_params->opcode == QED_FILTER_ADD ||
2935 p_params->opcode == QED_FILTER_REPLACE) {
2936 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
2937 if (p_vf->shadow_config.vlans[i].used)
2938 continue;
2939
2940 p_vf->shadow_config.vlans[i].used = true;
2941 p_vf->shadow_config.vlans[i].vid = p_params->vlan;
2942 break;
2943 }
2944
2945 if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
2946 DP_VERBOSE(p_hwfn,
2947 QED_MSG_IOV,
2948 "VF [%d] - Tries to configure more than %d vlan filters\n",
2949 p_vf->relative_vf_id,
2950 QED_ETH_VF_NUM_VLAN_FILTERS + 1);
2951 return -EINVAL;
2952 }
2953 }
2954
2955 return 0;
2956}
2957
8246d0b4
YM		 2958static int qed_iov_vf_update_mac_shadow(struct qed_hwfn *p_hwfn,
2959 struct qed_vf_info *p_vf,
2960 struct qed_filter_ucast *p_params)
2961{
2962 int i;
2963
2964 /* If we're in forced-mode, we don't allow any change */
1a635e48 2965 if (p_vf->bulletin.p_virt->valid_bitmap & BIT(MAC_ADDR_FORCED))
8246d0b4
YM		 2966 return 0;
2967
2968 /* First remove entries and then add new ones */
2969 if (p_params->opcode == QED_FILTER_REMOVE) {
2970 for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) {
2971 if (ether_addr_equal(p_vf->shadow_config.macs[i],
2972 p_params->mac)) {
0ee28e31 2973 eth_zero_addr(p_vf->shadow_config.macs[i]);
8246d0b4
YM		 2974 break;
2975 }
2976 }
2977
2978 if (i == QED_ETH_VF_NUM_MAC_FILTERS) {
2979 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2980 "MAC isn't configured\n");
2981 return -EINVAL;
2982 }
2983 } else if (p_params->opcode == QED_FILTER_REPLACE ||
2984 p_params->opcode == QED_FILTER_FLUSH) {
2985 for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++)
0ee28e31 2986 eth_zero_addr(p_vf->shadow_config.macs[i]);
8246d0b4
YM		 2987 }
2988
2989 /* List the new MAC address */
2990 if (p_params->opcode != QED_FILTER_ADD &&
2991 p_params->opcode != QED_FILTER_REPLACE)
2992 return 0;
2993
2994 for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) {
2995 if (is_zero_ether_addr(p_vf->shadow_config.macs[i])) {
2996 ether_addr_copy(p_vf->shadow_config.macs[i],
2997 p_params->mac);
2998 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2999 "Added MAC at %d entry in shadow\n", i);
3000 break;
3001 }
3002 }
3003
3004 if (i == QED_ETH_VF_NUM_MAC_FILTERS) {
3005 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No available place for MAC\n");
3006 return -EINVAL;
3007 }
3008
3009 return 0;
3010}
3011
3012static int
3013qed_iov_vf_update_unicast_shadow(struct qed_hwfn *p_hwfn,
3014 struct qed_vf_info *p_vf,
3015 struct qed_filter_ucast *p_params)
3016{
3017 int rc = 0;
3018
3019 if (p_params->type == QED_FILTER_MAC) {
3020 rc = qed_iov_vf_update_mac_shadow(p_hwfn, p_vf, p_params);
3021 if (rc)
3022 return rc;
3023 }
3024
3025 if (p_params->type == QED_FILTER_VLAN)
3026 rc = qed_iov_vf_update_vlan_shadow(p_hwfn, p_vf, p_params);
3027
3028 return rc;
3029}
3030
ba56947a
BX		 3031static int qed_iov_chk_ucast(struct qed_hwfn *hwfn,
3032 int vfid, struct qed_filter_ucast *params)
dacd88d6
YM		 3033{
3034 struct qed_public_vf_info *vf;
3035
3036 vf = qed_iov_get_public_vf_info(hwfn, vfid, true);
3037 if (!vf)
3038 return -EINVAL;
3039
3040 /* No real decision to make; Store the configured MAC */
3041 if (params->type == QED_FILTER_MAC ||
3042 params->type == QED_FILTER_MAC_VLAN)
3043 ether_addr_copy(vf->mac, params->mac);
3044
3045 return 0;
3046}
3047
3048static void qed_iov_vf_mbx_ucast_filter(struct qed_hwfn *p_hwfn,
3049 struct qed_ptt *p_ptt,
3050 struct qed_vf_info *vf)
3051{
08feecd7 3052 struct qed_bulletin_content *p_bulletin = vf->bulletin.p_virt;
dacd88d6
YM		 3053 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
3054 struct vfpf_ucast_filter_tlv *req;
3055 u8 status = PFVF_STATUS_SUCCESS;
3056 struct qed_filter_ucast params;
3057 int rc;
3058
3059 /* Prepare the unicast filter params */
3060 memset(&params, 0, sizeof(struct qed_filter_ucast));
3061 req = &mbx->req_virt->ucast_filter;
3062 params.opcode = (enum qed_filter_opcode)req->opcode;
3063 params.type = (enum qed_filter_ucast_type)req->type;
3064
3065 params.is_rx_filter = 1;
3066 params.is_tx_filter = 1;
3067 params.vport_to_remove_from = vf->vport_id;
3068 params.vport_to_add_to = vf->vport_id;
3069 memcpy(params.mac, req->mac, ETH_ALEN);
3070 params.vlan = req->vlan;
3071
3072 DP_VERBOSE(p_hwfn,
3073 QED_MSG_IOV,
3074 "VF[%d]: opcode 0x%02x type 0x%02x [%s %s] [vport 0x%02x] MAC %02x:%02x:%02x:%02x:%02x:%02x, vlan 0x%04x\n",
3075 vf->abs_vf_id, params.opcode, params.type,
3076 params.is_rx_filter ? "RX" : "",
3077 params.is_tx_filter ? "TX" : "",
3078 params.vport_to_add_to,
3079 params.mac[0], params.mac[1],
3080 params.mac[2], params.mac[3],
3081 params.mac[4], params.mac[5], params.vlan);
3082
3083 if (!vf->vport_instance) {
3084 DP_VERBOSE(p_hwfn,
3085 QED_MSG_IOV,
3086 "No VPORT instance available for VF[%d], failing ucast MAC configuration\n",
3087 vf->abs_vf_id);
3088 status = PFVF_STATUS_FAILURE;
3089 goto out;
3090 }
3091
08feecd7
YM		 3092 /* Update shadow copy of the VF configuration */
3093 if (qed_iov_vf_update_unicast_shadow(p_hwfn, vf, &params)) {
3094 status = PFVF_STATUS_FAILURE;
3095 goto out;
3096 }
3097
3098 /* Determine if the unicast filtering is acceptible by PF */
1a635e48 3099 if ((p_bulletin->valid_bitmap & BIT(VLAN_ADDR_FORCED)) &&
08feecd7
YM		 3100 (params.type == QED_FILTER_VLAN ||
3101 params.type == QED_FILTER_MAC_VLAN)) {
3102 /* Once VLAN is forced or PVID is set, do not allow
3103 * to add/replace any further VLANs.
3104 */
3105 if (params.opcode == QED_FILTER_ADD ||
3106 params.opcode == QED_FILTER_REPLACE)
3107 status = PFVF_STATUS_FORCED;
3108 goto out;
3109 }
3110
1a635e48 3111 if ((p_bulletin->valid_bitmap & BIT(MAC_ADDR_FORCED)) &&
eff16960
YM		 3112 (params.type == QED_FILTER_MAC ||
3113 params.type == QED_FILTER_MAC_VLAN)) {
3114 if (!ether_addr_equal(p_bulletin->mac, params.mac) ||
3115 (params.opcode != QED_FILTER_ADD &&
3116 params.opcode != QED_FILTER_REPLACE))
3117 status = PFVF_STATUS_FORCED;
3118 goto out;
3119 }
3120
dacd88d6
YM		 3121 rc = qed_iov_chk_ucast(p_hwfn, vf->relative_vf_id, &params);
3122 if (rc) {
3123 status = PFVF_STATUS_FAILURE;
3124 goto out;
3125 }
3126
3127 rc = qed_sp_eth_filter_ucast(p_hwfn, vf->opaque_fid, &params,
3128 QED_SPQ_MODE_CB, NULL);
3129 if (rc)
3130 status = PFVF_STATUS_FAILURE;
3131
3132out:
3133 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UCAST_FILTER,
3134 sizeof(struct pfvf_def_resp_tlv), status);
3135}
3136
0b55e27d
YM		 3137static void qed_iov_vf_mbx_int_cleanup(struct qed_hwfn *p_hwfn,
3138 struct qed_ptt *p_ptt,
3139 struct qed_vf_info *vf)
3140{
3141 int i;
3142
3143 /* Reset the SBs */
3144 for (i = 0; i < vf->num_sbs; i++)
3145 qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
3146 vf->igu_sbs[i],
3147 vf->opaque_fid, false);
3148
3149 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_INT_CLEANUP,
3150 sizeof(struct pfvf_def_resp_tlv),
3151 PFVF_STATUS_SUCCESS);
3152}
3153
3154static void qed_iov_vf_mbx_close(struct qed_hwfn *p_hwfn,
3155 struct qed_ptt *p_ptt, struct qed_vf_info *vf)
3156{
3157 u16 length = sizeof(struct pfvf_def_resp_tlv);
3158 u8 status = PFVF_STATUS_SUCCESS;
3159
3160 /* Disable Interrupts for VF */
3161 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
3162
3163 /* Reset Permission table */
3164 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
3165
3166 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_CLOSE,
3167 length, status);
3168}
3169
3170static void qed_iov_vf_mbx_release(struct qed_hwfn *p_hwfn,
3171 struct qed_ptt *p_ptt,
3172 struct qed_vf_info *p_vf)
3173{
3174 u16 length = sizeof(struct pfvf_def_resp_tlv);
1fe614d1
YM		 3175 u8 status = PFVF_STATUS_SUCCESS;
3176 int rc = 0;
0b55e27d
YM		 3177
3178 qed_iov_vf_cleanup(p_hwfn, p_vf);
3179
1fe614d1
YM		 3180 if (p_vf->state != VF_STOPPED && p_vf->state != VF_FREE) {
3181 /* Stopping the VF */
3182 rc = qed_sp_vf_stop(p_hwfn, p_vf->concrete_fid,
3183 p_vf->opaque_fid);
3184
3185 if (rc) {
3186 DP_ERR(p_hwfn, "qed_sp_vf_stop returned error %d\n",
3187 rc);
3188 status = PFVF_STATUS_FAILURE;
3189 }
3190
3191 p_vf->state = VF_STOPPED;
3192 }
3193
0b55e27d 3194 qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf, CHANNEL_TLV_RELEASE,
1fe614d1 3195 length, status);
0b55e27d
YM		 3196}
3197
3198static int
3199qed_iov_vf_flr_poll_dorq(struct qed_hwfn *p_hwfn,
3200 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
3201{
3202 int cnt;
3203 u32 val;
3204
3205 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_vf->concrete_fid);
3206
3207 for (cnt = 0; cnt < 50; cnt++) {
3208 val = qed_rd(p_hwfn, p_ptt, DORQ_REG_VF_USAGE_CNT);
3209 if (!val)
3210 break;
3211 msleep(20);
3212 }
3213 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
3214
3215 if (cnt == 50) {
3216 DP_ERR(p_hwfn,
3217 "VF[%d] - dorq failed to cleanup [usage 0x%08x]\n",
3218 p_vf->abs_vf_id, val);
3219 return -EBUSY;
3220 }
3221
3222 return 0;
3223}
3224
3225static int
3226qed_iov_vf_flr_poll_pbf(struct qed_hwfn *p_hwfn,
3227 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
3228{
3229 u32 cons[MAX_NUM_VOQS], distance[MAX_NUM_VOQS];
3230 int i, cnt;
3231
3232 /* Read initial consumers & producers */
3233 for (i = 0; i < MAX_NUM_VOQS; i++) {
3234 u32 prod;
3235
3236 cons[i] = qed_rd(p_hwfn, p_ptt,
3237 PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
3238 i * 0x40);
3239 prod = qed_rd(p_hwfn, p_ptt,
3240 PBF_REG_NUM_BLOCKS_ALLOCATED_PROD_VOQ0 +
3241 i * 0x40);
3242 distance[i] = prod - cons[i];
3243 }
3244
3245 /* Wait for consumers to pass the producers */
3246 i = 0;
3247 for (cnt = 0; cnt < 50; cnt++) {
3248 for (; i < MAX_NUM_VOQS; i++) {
3249 u32 tmp;
3250
3251 tmp = qed_rd(p_hwfn, p_ptt,
3252 PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
3253 i * 0x40);
3254 if (distance[i] > tmp - cons[i])
3255 break;
3256 }
3257
3258 if (i == MAX_NUM_VOQS)
3259 break;
3260
3261 msleep(20);
3262 }
3263
3264 if (cnt == 50) {
3265 DP_ERR(p_hwfn, "VF[%d] - pbf polling failed on VOQ %d\n",
3266 p_vf->abs_vf_id, i);
3267 return -EBUSY;
3268 }
3269
3270 return 0;
3271}
3272
3273static int qed_iov_vf_flr_poll(struct qed_hwfn *p_hwfn,
3274 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
3275{
3276 int rc;
3277
3278 rc = qed_iov_vf_flr_poll_dorq(p_hwfn, p_vf, p_ptt);
3279 if (rc)
3280 return rc;
3281
3282 rc = qed_iov_vf_flr_poll_pbf(p_hwfn, p_vf, p_ptt);
3283 if (rc)
3284 return rc;
3285
3286 return 0;
3287}
3288
3289static int
3290qed_iov_execute_vf_flr_cleanup(struct qed_hwfn *p_hwfn,
3291 struct qed_ptt *p_ptt,
3292 u16 rel_vf_id, u32 *ack_vfs)
3293{
3294 struct qed_vf_info *p_vf;
3295 int rc = 0;
3296
3297 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
3298 if (!p_vf)
3299 return 0;
3300
3301 if (p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &
3302 (1ULL << (rel_vf_id % 64))) {
3303 u16 vfid = p_vf->abs_vf_id;
3304
3305 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3306 "VF[%d] - Handling FLR\n", vfid);
3307
3308 qed_iov_vf_cleanup(p_hwfn, p_vf);
3309
3310 /* If VF isn't active, no need for anything but SW */
3311 if (!p_vf->b_init)
3312 goto cleanup;
3313
3314 rc = qed_iov_vf_flr_poll(p_hwfn, p_vf, p_ptt);
3315 if (rc)
3316 goto cleanup;
3317
3318 rc = qed_final_cleanup(p_hwfn, p_ptt, vfid, true);
3319 if (rc) {
3320 DP_ERR(p_hwfn, "Failed handle FLR of VF[%d]\n", vfid);
3321 return rc;
3322 }
3323
7eff82b0
YM		 3324 /* Workaround to make VF-PF channel ready, as FW
3325 * doesn't do that as a part of FLR.
3326 */
3327 REG_WR(p_hwfn,
3328 GTT_BAR0_MAP_REG_USDM_RAM +
3329 USTORM_VF_PF_CHANNEL_READY_OFFSET(vfid), 1);
3330
0b55e27d
YM		 3331 /* VF_STOPPED has to be set only after final cleanup
3332 * but prior to re-enabling the VF.
3333 */
3334 p_vf->state = VF_STOPPED;
3335
3336 rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, p_vf);
3337 if (rc) {
3338 DP_ERR(p_hwfn, "Failed to re-enable VF[%d] acces\n",
3339 vfid);
3340 return rc;
3341 }
3342cleanup:
3343 /* Mark VF for ack and clean pending state */
3344 if (p_vf->state == VF_RESET)
3345 p_vf->state = VF_STOPPED;
1a635e48 3346 ack_vfs[vfid / 32] |= BIT((vfid % 32));
0b55e27d
YM		 3347 p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &=
3348 ~(1ULL << (rel_vf_id % 64));
fd3c615a 3349 p_vf->vf_mbx.b_pending_msg = false;
0b55e27d
YM		 3350 }
3351
3352 return rc;
3353}
3354
ba56947a
BX		 3355static int
3356qed_iov_vf_flr_cleanup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
0b55e27d
YM		 3357{
3358 u32 ack_vfs[VF_MAX_STATIC / 32];
3359 int rc = 0;
3360 u16 i;
3361
3362 memset(ack_vfs, 0, sizeof(u32) * (VF_MAX_STATIC / 32));
3363
3364 /* Since BRB <-> PRS interface can't be tested as part of the flr
3365 * polling due to HW limitations, simply sleep a bit. And since
3366 * there's no need to wait per-vf, do it before looping.
3367 */
3368 msleep(100);
3369
3370 for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++)
3371 qed_iov_execute_vf_flr_cleanup(p_hwfn, p_ptt, i, ack_vfs);
3372
3373 rc = qed_mcp_ack_vf_flr(p_hwfn, p_ptt, ack_vfs);
3374 return rc;
3375}
3376
cccf6f5c 3377bool qed_iov_mark_vf_flr(struct qed_hwfn *p_hwfn, u32 *p_disabled_vfs)
0b55e27d 3378{
cccf6f5c
MY		 3379 bool found = false;
3380 u16 i;
0b55e27d
YM		 3381
3382 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "Marking FLR-ed VFs\n");
3383 for (i = 0; i < (VF_MAX_STATIC / 32); i++)
3384 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3385 "[%08x,...,%08x]: %08x\n",
3386 i * 32, (i + 1) * 32 - 1, p_disabled_vfs[i]);
3387
3388 if (!p_hwfn->cdev->p_iov_info) {
3389 DP_NOTICE(p_hwfn, "VF flr but no IOV\n");
cccf6f5c 3390 return false;
0b55e27d
YM		 3391 }
3392
3393 /* Mark VFs */
3394 for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++) {
3395 struct qed_vf_info *p_vf;
3396 u8 vfid;
3397
3398 p_vf = qed_iov_get_vf_info(p_hwfn, i, false);
3399 if (!p_vf)
3400 continue;
3401
3402 vfid = p_vf->abs_vf_id;
1a635e48 3403 if (BIT((vfid % 32)) & p_disabled_vfs[vfid / 32]) {
0b55e27d
YM		 3404 u64 *p_flr = p_hwfn->pf_iov_info->pending_flr;
3405 u16 rel_vf_id = p_vf->relative_vf_id;
3406
3407 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3408 "VF[%d] [rel %d] got FLR-ed\n",
3409 vfid, rel_vf_id);
3410
3411 p_vf->state = VF_RESET;
3412
3413 /* No need to lock here, since pending_flr should
3414 * only change here and before ACKing MFw. Since
3415 * MFW will not trigger an additional attention for
3416 * VF flr until ACKs, we're safe.
3417 */
3418 p_flr[rel_vf_id / 64] |= 1ULL << (rel_vf_id % 64);
cccf6f5c 3419 found = true;
0b55e27d
YM		 3420 }
3421 }
3422
3423 return found;
3424}
3425
73390ac9
YM		 3426static void qed_iov_get_link(struct qed_hwfn *p_hwfn,
3427 u16 vfid,
3428 struct qed_mcp_link_params *p_params,
3429 struct qed_mcp_link_state *p_link,
3430 struct qed_mcp_link_capabilities *p_caps)
3431{
3432 struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
3433 vfid,
3434 false);
3435 struct qed_bulletin_content *p_bulletin;
3436
3437 if (!p_vf)
3438 return;
3439
3440 p_bulletin = p_vf->bulletin.p_virt;
3441
3442 if (p_params)
3443 __qed_vf_get_link_params(p_hwfn, p_params, p_bulletin);
3444 if (p_link)
3445 __qed_vf_get_link_state(p_hwfn, p_link, p_bulletin);
3446 if (p_caps)
3447 __qed_vf_get_link_caps(p_hwfn, p_caps, p_bulletin);
3448}
3449
37bff2b9
YM		 3450static void qed_iov_process_mbx_req(struct qed_hwfn *p_hwfn,
3451 struct qed_ptt *p_ptt, int vfid)
3452{
3453 struct qed_iov_vf_mbx *mbx;
3454 struct qed_vf_info *p_vf;
37bff2b9
YM		 3455
3456 p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3457 if (!p_vf)
3458 return;
3459
3460 mbx = &p_vf->vf_mbx;
3461
3462 /* qed_iov_process_mbx_request */
fd3c615a
MY		 3463 if (!mbx->b_pending_msg) {
3464 DP_NOTICE(p_hwfn,
3465 "VF[%02x]: Trying to process mailbox message when none is pending\n",
3466 p_vf->abs_vf_id);
3467 return;
3468 }
3469 mbx->b_pending_msg = false;
37bff2b9
YM		 3470
3471 mbx->first_tlv = mbx->req_virt->first_tlv;
3472
fd3c615a
MY		 3473 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3474 "VF[%02x]: Processing mailbox message [type %04x]\n",
3475 p_vf->abs_vf_id, mbx->first_tlv.tl.type);
3476
37bff2b9 3477 /* check if tlv type is known */
7eff82b0
YM		 3478 if (qed_iov_tlv_supported(mbx->first_tlv.tl.type) &&
3479 !p_vf->b_malicious) {
1408cc1f
YM		 3480 switch (mbx->first_tlv.tl.type) {
3481 case CHANNEL_TLV_ACQUIRE:
3482 qed_iov_vf_mbx_acquire(p_hwfn, p_ptt, p_vf);
3483 break;
dacd88d6
YM		 3484 case CHANNEL_TLV_VPORT_START:
3485 qed_iov_vf_mbx_start_vport(p_hwfn, p_ptt, p_vf);
3486 break;
3487 case CHANNEL_TLV_VPORT_TEARDOWN:
3488 qed_iov_vf_mbx_stop_vport(p_hwfn, p_ptt, p_vf);
3489 break;
3490 case CHANNEL_TLV_START_RXQ:
3491 qed_iov_vf_mbx_start_rxq(p_hwfn, p_ptt, p_vf);
3492 break;
3493 case CHANNEL_TLV_START_TXQ:
3494 qed_iov_vf_mbx_start_txq(p_hwfn, p_ptt, p_vf);
3495 break;
3496 case CHANNEL_TLV_STOP_RXQS:
3497 qed_iov_vf_mbx_stop_rxqs(p_hwfn, p_ptt, p_vf);
3498 break;
3499 case CHANNEL_TLV_STOP_TXQS:
3500 qed_iov_vf_mbx_stop_txqs(p_hwfn, p_ptt, p_vf);
3501 break;
17b235c1
YM		 3502 case CHANNEL_TLV_UPDATE_RXQ:
3503 qed_iov_vf_mbx_update_rxqs(p_hwfn, p_ptt, p_vf);
3504 break;
dacd88d6
YM		 3505 case CHANNEL_TLV_VPORT_UPDATE:
3506 qed_iov_vf_mbx_vport_update(p_hwfn, p_ptt, p_vf);
3507 break;
3508 case CHANNEL_TLV_UCAST_FILTER:
3509 qed_iov_vf_mbx_ucast_filter(p_hwfn, p_ptt, p_vf);
3510 break;
0b55e27d
YM		 3511 case CHANNEL_TLV_CLOSE:
3512 qed_iov_vf_mbx_close(p_hwfn, p_ptt, p_vf);
3513 break;
3514 case CHANNEL_TLV_INT_CLEANUP:
3515 qed_iov_vf_mbx_int_cleanup(p_hwfn, p_ptt, p_vf);
3516 break;
3517 case CHANNEL_TLV_RELEASE:
3518 qed_iov_vf_mbx_release(p_hwfn, p_ptt, p_vf);
3519 break;
eaf3c0c6
CM		 3520 case CHANNEL_TLV_UPDATE_TUNN_PARAM:
3521 qed_iov_vf_mbx_update_tunn_param(p_hwfn, p_ptt, p_vf);
3522 break;
1408cc1f 3523 }
7eff82b0
YM		 3524 } else if (qed_iov_tlv_supported(mbx->first_tlv.tl.type)) {
3525 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3526 "VF [%02x] - considered malicious; Ignoring TLV [%04x]\n",
3527 p_vf->abs_vf_id, mbx->first_tlv.tl.type);
3528
3529 qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf,
3530 mbx->first_tlv.tl.type,
3531 sizeof(struct pfvf_def_resp_tlv),
3532 PFVF_STATUS_MALICIOUS);
37bff2b9
YM		 3533 } else {
3534 /* unknown TLV - this may belong to a VF driver from the future
3535 * - a version written after this PF driver was written, which
3536 * supports features unknown as of yet. Too bad since we don't
3537 * support them. Or this may be because someone wrote a crappy
3538 * VF driver and is sending garbage over the channel.
3539 */
54fdd80f
YM		 3540 DP_NOTICE(p_hwfn,
3541 "VF[%02x]: unknown TLV. type %04x length %04x padding %08x reply address %llu\n",
3542 p_vf->abs_vf_id,
3543 mbx->first_tlv.tl.type,
3544 mbx->first_tlv.tl.length,
3545 mbx->first_tlv.padding, mbx->first_tlv.reply_address);
3546
3547 /* Try replying in case reply address matches the acquisition's
3548 * posted address.
3549 */
3550 if (p_vf->acquire.first_tlv.reply_address &&
3551 (mbx->first_tlv.reply_address ==
3552 p_vf->acquire.first_tlv.reply_address)) {
3553 qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf,
3554 mbx->first_tlv.tl.type,
3555 sizeof(struct pfvf_def_resp_tlv),
3556 PFVF_STATUS_NOT_SUPPORTED);
3557 } else {
37bff2b9
YM		 3558 DP_VERBOSE(p_hwfn,
3559 QED_MSG_IOV,
54fdd80f
YM		 3560 "VF[%02x]: Can't respond to TLV - no valid reply address\n",
3561 p_vf->abs_vf_id);
37bff2b9
YM		 3562 }
3563 }
3564}
3565
fd3c615a 3566void qed_iov_pf_get_pending_events(struct qed_hwfn *p_hwfn, u64 *events)
37bff2b9 3567{
fd3c615a 3568 int i;
37bff2b9 3569
fd3c615a 3570 memset(events, 0, sizeof(u64) * QED_VF_ARRAY_LENGTH);
37bff2b9 3571
fd3c615a
MY		 3572 qed_for_each_vf(p_hwfn, i) {
3573 struct qed_vf_info *p_vf;
37bff2b9 3574
fd3c615a
MY		 3575 p_vf = &p_hwfn->pf_iov_info->vfs_array[i];
3576 if (p_vf->vf_mbx.b_pending_msg)
3577 events[i / 64] |= 1ULL << (i % 64);
3578 }
37bff2b9
YM		 3579}
3580
7eff82b0
YM		 3581static struct qed_vf_info *qed_sriov_get_vf_from_absid(struct qed_hwfn *p_hwfn,
3582 u16 abs_vfid)
37bff2b9 3583{
7eff82b0 3584 u8 min = (u8) p_hwfn->cdev->p_iov_info->first_vf_in_pf;
37bff2b9 3585
7eff82b0 3586 if (!_qed_iov_pf_sanity_check(p_hwfn, (int)abs_vfid - min, false)) {
37bff2b9
YM		 3587 DP_VERBOSE(p_hwfn,
3588 QED_MSG_IOV,
7eff82b0 3589 "Got indication for VF [abs 0x%08x] that cannot be handled by PF\n",
37bff2b9 3590 abs_vfid);
7eff82b0 3591 return NULL;
37bff2b9 3592 }
7eff82b0
YM		 3593
3594 return &p_hwfn->pf_iov_info->vfs_array[(u8) abs_vfid - min];
3595}
3596
3597static int qed_sriov_vfpf_msg(struct qed_hwfn *p_hwfn,
3598 u16 abs_vfid, struct regpair *vf_msg)
3599{
3600 struct qed_vf_info *p_vf = qed_sriov_get_vf_from_absid(p_hwfn,
3601 abs_vfid);
3602
3603 if (!p_vf)
3604 return 0;
37bff2b9
YM		 3605
3606 /* List the physical address of the request so that handler
3607 * could later on copy the message from it.
3608 */
3609 p_vf->vf_mbx.pending_req = (((u64)vf_msg->hi) << 32) | vf_msg->lo;
3610
3611 /* Mark the event and schedule the workqueue */
fd3c615a 3612 p_vf->vf_mbx.b_pending_msg = true;
37bff2b9
YM		 3613 qed_schedule_iov(p_hwfn, QED_IOV_WQ_MSG_FLAG);
3614
3615 return 0;
3616}
3617
7eff82b0
YM		 3618static void qed_sriov_vfpf_malicious(struct qed_hwfn *p_hwfn,
3619 struct malicious_vf_eqe_data *p_data)
3620{
3621 struct qed_vf_info *p_vf;
3622
3623 p_vf = qed_sriov_get_vf_from_absid(p_hwfn, p_data->vf_id);
3624
3625 if (!p_vf)
3626 return;
3627
e99a21cb
MY		 3628 if (!p_vf->b_malicious) {
3629 DP_NOTICE(p_hwfn,
3630 "VF [%d] - Malicious behavior [%02x]\n",
3631 p_vf->abs_vf_id, p_data->err_id);
7eff82b0 3632
e99a21cb
MY		 3633 p_vf->b_malicious = true;
3634 } else {
3635 DP_INFO(p_hwfn,
3636 "VF [%d] - Malicious behavior [%02x]\n",
3637 p_vf->abs_vf_id, p_data->err_id);
3638 }
7eff82b0
YM		 3639}
3640
37bff2b9
YM		 3641int qed_sriov_eqe_event(struct qed_hwfn *p_hwfn,
3642 u8 opcode, __le16 echo, union event_ring_data *data)
3643{
3644 switch (opcode) {
3645 case COMMON_EVENT_VF_PF_CHANNEL:
3646 return qed_sriov_vfpf_msg(p_hwfn, le16_to_cpu(echo),
3647 &data->vf_pf_channel.msg_addr);
7eff82b0
YM		 3648 case COMMON_EVENT_MALICIOUS_VF:
3649 qed_sriov_vfpf_malicious(p_hwfn, &data->malicious_vf);
3650 return 0;
37bff2b9
YM		 3651 default:
3652 DP_INFO(p_hwfn->cdev, "Unknown sriov eqe event 0x%02x\n",
3653 opcode);
3654 return -EINVAL;
3655 }
3656}
3657
32a47e72
YM		 3658u16 qed_iov_get_next_active_vf(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
3659{
3660 struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
3661 u16 i;
3662
3663 if (!p_iov)
3664 goto out;
3665
3666 for (i = rel_vf_id; i < p_iov->total_vfs; i++)
7eff82b0 3667 if (qed_iov_is_valid_vfid(p_hwfn, rel_vf_id, true, false))
32a47e72
YM		 3668 return i;
3669
3670out:
3671 return MAX_NUM_VFS;
3672}
37bff2b9
YM		 3673
3674static int qed_iov_copy_vf_msg(struct qed_hwfn *p_hwfn, struct qed_ptt *ptt,
3675 int vfid)
3676{
3677 struct qed_dmae_params params;
3678 struct qed_vf_info *vf_info;
3679
3680 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3681 if (!vf_info)
3682 return -EINVAL;
3683
3684 memset(&params, 0, sizeof(struct qed_dmae_params));
3685 params.flags = QED_DMAE_FLAG_VF_SRC | QED_DMAE_FLAG_COMPLETION_DST;
3686 params.src_vfid = vf_info->abs_vf_id;
3687
3688 if (qed_dmae_host2host(p_hwfn, ptt,
3689 vf_info->vf_mbx.pending_req,
3690 vf_info->vf_mbx.req_phys,
3691 sizeof(union vfpf_tlvs) / 4, &params)) {
3692 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3693 "Failed to copy message from VF 0x%02x\n", vfid);
3694
3695 return -EIO;
3696 }
3697
3698 return 0;
3699}
3700
eff16960
YM		 3701static void qed_iov_bulletin_set_forced_mac(struct qed_hwfn *p_hwfn,
3702 u8 *mac, int vfid)
3703{
3704 struct qed_vf_info *vf_info;
3705 u64 feature;
3706
3707 vf_info = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3708 if (!vf_info) {
3709 DP_NOTICE(p_hwfn->cdev,
3710 "Can not set forced MAC, invalid vfid [%d]\n", vfid);
3711 return;
3712 }
3713
7eff82b0
YM		 3714 if (vf_info->b_malicious) {
3715 DP_NOTICE(p_hwfn->cdev,
3716 "Can't set forced MAC to malicious VF [%d]\n", vfid);
3717 return;
3718 }
3719
eff16960
YM		 3720 feature = 1 << MAC_ADDR_FORCED;
3721 memcpy(vf_info->bulletin.p_virt->mac, mac, ETH_ALEN);
3722
3723 vf_info->bulletin.p_virt->valid_bitmap |= feature;
3724 /* Forced MAC will disable MAC_ADDR */
1a635e48 3725 vf_info->bulletin.p_virt->valid_bitmap &= ~BIT(VFPF_BULLETIN_MAC_ADDR);
eff16960
YM		 3726
3727 qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
3728}
3729
ba56947a
BX		 3730static void qed_iov_bulletin_set_forced_vlan(struct qed_hwfn *p_hwfn,
3731 u16 pvid, int vfid)
08feecd7
YM		 3732{
3733 struct qed_vf_info *vf_info;
3734 u64 feature;
3735
3736 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3737 if (!vf_info) {
3738 DP_NOTICE(p_hwfn->cdev,
3739 "Can not set forced MAC, invalid vfid [%d]\n", vfid);
3740 return;
3741 }
3742
7eff82b0
YM		 3743 if (vf_info->b_malicious) {
3744 DP_NOTICE(p_hwfn->cdev,
3745 "Can't set forced vlan to malicious VF [%d]\n", vfid);
3746 return;
3747 }
3748
08feecd7
YM		 3749 feature = 1 << VLAN_ADDR_FORCED;
3750 vf_info->bulletin.p_virt->pvid = pvid;
3751 if (pvid)
3752 vf_info->bulletin.p_virt->valid_bitmap |= feature;
3753 else
3754 vf_info->bulletin.p_virt->valid_bitmap &= ~feature;
3755
3756 qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
3757}
3758
97379f15
CM		 3759void qed_iov_bulletin_set_udp_ports(struct qed_hwfn *p_hwfn,
3760 int vfid, u16 vxlan_port, u16 geneve_port)
3761{
3762 struct qed_vf_info *vf_info;
3763
3764 vf_info = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3765 if (!vf_info) {
3766 DP_NOTICE(p_hwfn->cdev,
3767 "Can not set udp ports, invalid vfid [%d]\n", vfid);
3768 return;
3769 }
3770
3771 if (vf_info->b_malicious) {
3772 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
3773 "Can not set udp ports to malicious VF [%d]\n",
3774 vfid);
3775 return;
3776 }
3777
3778 vf_info->bulletin.p_virt->vxlan_udp_port = vxlan_port;
3779 vf_info->bulletin.p_virt->geneve_udp_port = geneve_port;
3780}
3781
6ddc7608
YM		 3782static bool qed_iov_vf_has_vport_instance(struct qed_hwfn *p_hwfn, int vfid)
3783{
3784 struct qed_vf_info *p_vf_info;
3785
3786 p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3787 if (!p_vf_info)
3788 return false;
3789
3790 return !!p_vf_info->vport_instance;
3791}
3792
ba56947a 3793static bool qed_iov_is_vf_stopped(struct qed_hwfn *p_hwfn, int vfid)
0b55e27d
YM		 3794{
3795 struct qed_vf_info *p_vf_info;
3796
3797 p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3798 if (!p_vf_info)
3799 return true;
3800
3801 return p_vf_info->state == VF_STOPPED;
3802}
3803
73390ac9
YM		 3804static bool qed_iov_spoofchk_get(struct qed_hwfn *p_hwfn, int vfid)
3805{
3806 struct qed_vf_info *vf_info;
3807
3808 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3809 if (!vf_info)
3810 return false;
3811
3812 return vf_info->spoof_chk;
3813}
3814
ba56947a 3815static int qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn, int vfid, bool val)
6ddc7608
YM		 3816{
3817 struct qed_vf_info *vf;
3818 int rc = -EINVAL;
3819
3820 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
3821 DP_NOTICE(p_hwfn,
3822 "SR-IOV sanity check failed, can't set spoofchk\n");
3823 goto out;
3824 }
3825
3826 vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3827 if (!vf)
3828 goto out;
3829
3830 if (!qed_iov_vf_has_vport_instance(p_hwfn, vfid)) {
3831 /* After VF VPORT start PF will configure spoof check */
3832 vf->req_spoofchk_val = val;
3833 rc = 0;
3834 goto out;
3835 }
3836
3837 rc = __qed_iov_spoofchk_set(p_hwfn, vf, val);
3838
3839out:
3840 return rc;
3841}
3842
eff16960
YM		 3843static u8 *qed_iov_bulletin_get_forced_mac(struct qed_hwfn *p_hwfn,
3844 u16 rel_vf_id)
3845{
3846 struct qed_vf_info *p_vf;
3847
3848 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3849 if (!p_vf || !p_vf->bulletin.p_virt)
3850 return NULL;
3851
1a635e48 3852 if (!(p_vf->bulletin.p_virt->valid_bitmap & BIT(MAC_ADDR_FORCED)))
eff16960
YM		 3853 return NULL;
3854
3855 return p_vf->bulletin.p_virt->mac;
3856}
3857
ba56947a
BX		 3858static u16
3859qed_iov_bulletin_get_forced_vlan(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
08feecd7
YM		 3860{
3861 struct qed_vf_info *p_vf;
3862
3863 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3864 if (!p_vf || !p_vf->bulletin.p_virt)
3865 return 0;
3866
1a635e48 3867 if (!(p_vf->bulletin.p_virt->valid_bitmap & BIT(VLAN_ADDR_FORCED)))
08feecd7
YM		 3868 return 0;
3869
3870 return p_vf->bulletin.p_virt->pvid;
3871}
3872
733def6a
YM		 3873static int qed_iov_configure_tx_rate(struct qed_hwfn *p_hwfn,
3874 struct qed_ptt *p_ptt, int vfid, int val)
3875{
3876 struct qed_vf_info *vf;
3877 u8 abs_vp_id = 0;
3878 int rc;
3879
3880 vf = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3881 if (!vf)
3882 return -EINVAL;
3883
3884 rc = qed_fw_vport(p_hwfn, vf->vport_id, &abs_vp_id);
3885 if (rc)
3886 return rc;
3887
3888 return qed_init_vport_rl(p_hwfn, p_ptt, abs_vp_id, (u32)val);
3889}
3890
ba56947a
BX		 3891static int
3892qed_iov_configure_min_tx_rate(struct qed_dev *cdev, int vfid, u32 rate)
733def6a
YM		 3893{
3894 struct qed_vf_info *vf;
3895 u8 vport_id;
3896 int i;
3897
3898 for_each_hwfn(cdev, i) {
3899 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
3900
3901 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
3902 DP_NOTICE(p_hwfn,
3903 "SR-IOV sanity check failed, can't set min rate\n");
3904 return -EINVAL;
3905 }
3906 }
3907
3908 vf = qed_iov_get_vf_info(QED_LEADING_HWFN(cdev), (u16)vfid, true);
3909 vport_id = vf->vport_id;
3910
3911 return qed_configure_vport_wfq(cdev, vport_id, rate);
3912}
3913
73390ac9
YM		 3914static int qed_iov_get_vf_min_rate(struct qed_hwfn *p_hwfn, int vfid)
3915{
3916 struct qed_wfq_data *vf_vp_wfq;
3917 struct qed_vf_info *vf_info;
3918
3919 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3920 if (!vf_info)
3921 return 0;
3922
3923 vf_vp_wfq = &p_hwfn->qm_info.wfq_data[vf_info->vport_id];
3924
3925 if (vf_vp_wfq->configured)
3926 return vf_vp_wfq->min_speed;
3927 else
3928 return 0;
3929}
3930
37bff2b9
YM		 3931/**
3932 * qed_schedule_iov - schedules IOV task for VF and PF
3933 * @hwfn: hardware function pointer
3934 * @flag: IOV flag for VF/PF
3935 */
3936void qed_schedule_iov(struct qed_hwfn *hwfn, enum qed_iov_wq_flag flag)
3937{
3938 smp_mb__before_atomic();
3939 set_bit(flag, &hwfn->iov_task_flags);
3940 smp_mb__after_atomic();
3941 DP_VERBOSE(hwfn, QED_MSG_IOV, "Scheduling iov task [Flag: %d]\n", flag);
3942 queue_delayed_work(hwfn->iov_wq, &hwfn->iov_task, 0);
3943}
3944
1408cc1f
YM		 3945void qed_vf_start_iov_wq(struct qed_dev *cdev)
3946{
3947 int i;
3948
3949 for_each_hwfn(cdev, i)
3950 queue_delayed_work(cdev->hwfns[i].iov_wq,
3951 &cdev->hwfns[i].iov_task, 0);
3952}
3953
0b55e27d
YM		 3954int qed_sriov_disable(struct qed_dev *cdev, bool pci_enabled)
3955{
3956 int i, j;
3957
3958 for_each_hwfn(cdev, i)
3959 if (cdev->hwfns[i].iov_wq)
3960 flush_workqueue(cdev->hwfns[i].iov_wq);
3961
3962 /* Mark VFs for disablement */
3963 qed_iov_set_vfs_to_disable(cdev, true);
3964
3965 if (cdev->p_iov_info && cdev->p_iov_info->num_vfs && pci_enabled)
3966 pci_disable_sriov(cdev->pdev);
3967
3968 for_each_hwfn(cdev, i) {
3969 struct qed_hwfn *hwfn = &cdev->hwfns[i];
3970 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
3971
3972 /* Failure to acquire the ptt in 100g creates an odd error
3973 * where the first engine has already relased IOV.
3974 */
3975 if (!ptt) {
3976 DP_ERR(hwfn, "Failed to acquire ptt\n");
3977 return -EBUSY;
3978 }
3979
733def6a
YM		 3980 /* Clean WFQ db and configure equal weight for all vports */
3981 qed_clean_wfq_db(hwfn, ptt);
3982
0b55e27d
YM		 3983 qed_for_each_vf(hwfn, j) {
3984 int k;
3985
7eff82b0 3986 if (!qed_iov_is_valid_vfid(hwfn, j, true, false))
0b55e27d
YM		 3987 continue;
3988
3989 /* Wait until VF is disabled before releasing */
3990 for (k = 0; k < 100; k++) {
3991 if (!qed_iov_is_vf_stopped(hwfn, j))
3992 msleep(20);
3993 else
3994 break;
3995 }
3996
3997 if (k < 100)
3998 qed_iov_release_hw_for_vf(&cdev->hwfns[i],
3999 ptt, j);
4000 else
4001 DP_ERR(hwfn,
4002 "Timeout waiting for VF's FLR to end\n");
4003 }
4004
4005 qed_ptt_release(hwfn, ptt);
4006 }
4007
4008 qed_iov_set_vfs_to_disable(cdev, false);
4009
4010 return 0;
4011}
4012
3da7a37a
MY		 4013static void qed_sriov_enable_qid_config(struct qed_hwfn *hwfn,
4014 u16 vfid,
4015 struct qed_iov_vf_init_params *params)
4016{
4017 u16 base, i;
4018
4019 /* Since we have an equal resource distribution per-VF, and we assume
4020 * PF has acquired the QED_PF_L2_QUE first queues, we start setting
4021 * sequentially from there.
4022 */
4023 base = FEAT_NUM(hwfn, QED_PF_L2_QUE) + vfid * params->num_queues;
4024
4025 params->rel_vf_id = vfid;
4026 for (i = 0; i < params->num_queues; i++) {
4027 params->req_rx_queue[i] = base + i;
4028 params->req_tx_queue[i] = base + i;
4029 }
4030}
4031
0b55e27d
YM		 4032static int qed_sriov_enable(struct qed_dev *cdev, int num)
4033{
3da7a37a 4034 struct qed_iov_vf_init_params params;
0b55e27d
YM		 4035 int i, j, rc;
4036
4037 if (num >= RESC_NUM(&cdev->hwfns[0], QED_VPORT)) {
4038 DP_NOTICE(cdev, "Can start at most %d VFs\n",
4039 RESC_NUM(&cdev->hwfns[0], QED_VPORT) - 1);
4040 return -EINVAL;
4041 }
4042
3da7a37a
MY		 4043 memset(&params, 0, sizeof(params));
4044
0b55e27d
YM		 4045 /* Initialize HW for VF access */
4046 for_each_hwfn(cdev, j) {
4047 struct qed_hwfn *hwfn = &cdev->hwfns[j];
4048 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
5a1f965a
MY		 4049
4050 /* Make sure not to use more than 16 queues per VF */
3da7a37a
MY		 4051 params.num_queues = min_t(int,
4052 FEAT_NUM(hwfn, QED_VF_L2_QUE) / num,
4053 16);
0b55e27d
YM		 4054
4055 if (!ptt) {
4056 DP_ERR(hwfn, "Failed to acquire ptt\n");
4057 rc = -EBUSY;
4058 goto err;
4059 }
4060
0b55e27d 4061 for (i = 0; i < num; i++) {
7eff82b0 4062 if (!qed_iov_is_valid_vfid(hwfn, i, false, true))
0b55e27d
YM		 4063 continue;
4064
3da7a37a
MY		 4065 qed_sriov_enable_qid_config(hwfn, i, &params);
4066 rc = qed_iov_init_hw_for_vf(hwfn, ptt, &params);
0b55e27d
YM		 4067 if (rc) {
4068 DP_ERR(cdev, "Failed to enable VF[%d]\n", i);
4069 qed_ptt_release(hwfn, ptt);
4070 goto err;
4071 }
4072 }
4073
4074 qed_ptt_release(hwfn, ptt);
4075 }
4076
4077 /* Enable SRIOV PCIe functions */
4078 rc = pci_enable_sriov(cdev->pdev, num);
4079 if (rc) {
4080 DP_ERR(cdev, "Failed to enable sriov [%d]\n", rc);
4081 goto err;
4082 }
4083
4084 return num;
4085
4086err:
4087 qed_sriov_disable(cdev, false);
4088 return rc;
4089}
4090
4091static int qed_sriov_configure(struct qed_dev *cdev, int num_vfs_param)
4092{
4093 if (!IS_QED_SRIOV(cdev)) {
4094 DP_VERBOSE(cdev, QED_MSG_IOV, "SR-IOV is not supported\n");
4095 return -EOPNOTSUPP;
4096 }
4097
4098 if (num_vfs_param)
4099 return qed_sriov_enable(cdev, num_vfs_param);
4100 else
4101 return qed_sriov_disable(cdev, true);
4102}
4103
eff16960
YM		 4104static int qed_sriov_pf_set_mac(struct qed_dev *cdev, u8 *mac, int vfid)
4105{
4106 int i;
4107
4108 if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
4109 DP_VERBOSE(cdev, QED_MSG_IOV,
4110 "Cannot set a VF MAC; Sriov is not enabled\n");
4111 return -EINVAL;
4112 }
4113
7eff82b0 4114 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true, true)) {
eff16960
YM		 4115 DP_VERBOSE(cdev, QED_MSG_IOV,
4116 "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
4117 return -EINVAL;
4118 }
4119
4120 for_each_hwfn(cdev, i) {
4121 struct qed_hwfn *hwfn = &cdev->hwfns[i];
4122 struct qed_public_vf_info *vf_info;
4123
4124 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
4125 if (!vf_info)
4126 continue;
4127
4128 /* Set the forced MAC, and schedule the IOV task */
4129 ether_addr_copy(vf_info->forced_mac, mac);
4130 qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
4131 }
4132
4133 return 0;
4134}
4135
08feecd7
YM		 4136static int qed_sriov_pf_set_vlan(struct qed_dev *cdev, u16 vid, int vfid)
4137{
4138 int i;
4139
4140 if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
4141 DP_VERBOSE(cdev, QED_MSG_IOV,
4142 "Cannot set a VF MAC; Sriov is not enabled\n");
4143 return -EINVAL;
4144 }
4145
7eff82b0 4146 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true, true)) {
08feecd7
YM		 4147 DP_VERBOSE(cdev, QED_MSG_IOV,
4148 "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
4149 return -EINVAL;
4150 }
4151
4152 for_each_hwfn(cdev, i) {
4153 struct qed_hwfn *hwfn = &cdev->hwfns[i];
4154 struct qed_public_vf_info *vf_info;
4155
4156 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
4157 if (!vf_info)
4158 continue;
4159
4160 /* Set the forced vlan, and schedule the IOV task */
4161 vf_info->forced_vlan = vid;
4162 qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
4163 }
4164
4165 return 0;
4166}
4167
73390ac9
YM		 4168static int qed_get_vf_config(struct qed_dev *cdev,
4169 int vf_id, struct ifla_vf_info *ivi)
4170{
4171 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
4172 struct qed_public_vf_info *vf_info;
4173 struct qed_mcp_link_state link;
4174 u32 tx_rate;
4175
4176 /* Sanitize request */
4177 if (IS_VF(cdev))
4178 return -EINVAL;
4179
7eff82b0 4180 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true, false)) {
73390ac9
YM		 4181 DP_VERBOSE(cdev, QED_MSG_IOV,
4182 "VF index [%d] isn't active\n", vf_id);
4183 return -EINVAL;
4184 }
4185
4186 vf_info = qed_iov_get_public_vf_info(hwfn, vf_id, true);
4187
4188 qed_iov_get_link(hwfn, vf_id, NULL, &link, NULL);
4189
4190 /* Fill information about VF */
4191 ivi->vf = vf_id;
4192
4193 if (is_valid_ether_addr(vf_info->forced_mac))
4194 ether_addr_copy(ivi->mac, vf_info->forced_mac);
4195 else
4196 ether_addr_copy(ivi->mac, vf_info->mac);
4197
4198 ivi->vlan = vf_info->forced_vlan;
4199 ivi->spoofchk = qed_iov_spoofchk_get(hwfn, vf_id);
4200 ivi->linkstate = vf_info->link_state;
4201 tx_rate = vf_info->tx_rate;
4202 ivi->max_tx_rate = tx_rate ? tx_rate : link.speed;
4203 ivi->min_tx_rate = qed_iov_get_vf_min_rate(hwfn, vf_id);
4204
4205 return 0;
4206}
4207
36558c3d
YM		 4208void qed_inform_vf_link_state(struct qed_hwfn *hwfn)
4209{
e50728ef 4210 struct qed_hwfn *lead_hwfn = QED_LEADING_HWFN(hwfn->cdev);
36558c3d
YM		 4211 struct qed_mcp_link_capabilities caps;
4212 struct qed_mcp_link_params params;
4213 struct qed_mcp_link_state link;
4214 int i;
4215
4216 if (!hwfn->pf_iov_info)
4217 return;
4218
4219 /* Update bulletin of all future possible VFs with link configuration */
4220 for (i = 0; i < hwfn->cdev->p_iov_info->total_vfs; i++) {
733def6a
YM		 4221 struct qed_public_vf_info *vf_info;
4222
4223 vf_info = qed_iov_get_public_vf_info(hwfn, i, false);
4224 if (!vf_info)
4225 continue;
4226
e50728ef
MY		 4227 /* Only hwfn0 is actually interested in the link speed.
4228 * But since only it would receive an MFW indication of link,
4229 * need to take configuration from it - otherwise things like
4230 * rate limiting for hwfn1 VF would not work.
4231 */
4232 memcpy(&params, qed_mcp_get_link_params(lead_hwfn),
4233 sizeof(params));
4234 memcpy(&link, qed_mcp_get_link_state(lead_hwfn), sizeof(link));
4235 memcpy(&caps, qed_mcp_get_link_capabilities(lead_hwfn),
36558c3d
YM		 4236 sizeof(caps));
4237
733def6a
YM		 4238 /* Modify link according to the VF's configured link state */
4239 switch (vf_info->link_state) {
4240 case IFLA_VF_LINK_STATE_DISABLE:
4241 link.link_up = false;
4242 break;
4243 case IFLA_VF_LINK_STATE_ENABLE:
4244 link.link_up = true;
4245 /* Set speed according to maximum supported by HW.
4246 * that is 40G for regular devices and 100G for CMT
4247 * mode devices.
4248 */
4249 link.speed = (hwfn->cdev->num_hwfns > 1) ?
4250 100000 : 40000;
4251 default:
4252 /* In auto mode pass PF link image to VF */
4253 break;
4254 }
4255
4256 if (link.link_up && vf_info->tx_rate) {
4257 struct qed_ptt *ptt;
4258 int rate;
4259
4260 rate = min_t(int, vf_info->tx_rate, link.speed);
4261
4262 ptt = qed_ptt_acquire(hwfn);
4263 if (!ptt) {
4264 DP_NOTICE(hwfn, "Failed to acquire PTT\n");
4265 return;
4266 }
4267
4268 if (!qed_iov_configure_tx_rate(hwfn, ptt, i, rate)) {
4269 vf_info->tx_rate = rate;
4270 link.speed = rate;
4271 }
4272
4273 qed_ptt_release(hwfn, ptt);
4274 }
4275
36558c3d
YM		 4276 qed_iov_set_link(hwfn, i, &params, &link, &caps);
4277 }
4278
4279 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
4280}
4281
733def6a
YM		 4282static int qed_set_vf_link_state(struct qed_dev *cdev,
4283 int vf_id, int link_state)
4284{
4285 int i;
4286
4287 /* Sanitize request */
4288 if (IS_VF(cdev))
4289 return -EINVAL;
4290
7eff82b0 4291 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true, true)) {
733def6a
YM		 4292 DP_VERBOSE(cdev, QED_MSG_IOV,
4293 "VF index [%d] isn't active\n", vf_id);
4294 return -EINVAL;
4295 }
4296
4297 /* Handle configuration of link state */
4298 for_each_hwfn(cdev, i) {
4299 struct qed_hwfn *hwfn = &cdev->hwfns[i];
4300 struct qed_public_vf_info *vf;
4301
4302 vf = qed_iov_get_public_vf_info(hwfn, vf_id, true);
4303 if (!vf)
4304 continue;
4305
4306 if (vf->link_state == link_state)
4307 continue;
4308
4309 vf->link_state = link_state;
4310 qed_inform_vf_link_state(&cdev->hwfns[i]);
4311 }
4312
4313 return 0;
4314}
4315
6ddc7608
YM		 4316static int qed_spoof_configure(struct qed_dev *cdev, int vfid, bool val)
4317{
4318 int i, rc = -EINVAL;
4319
4320 for_each_hwfn(cdev, i) {
4321 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
4322
4323 rc = qed_iov_spoofchk_set(p_hwfn, vfid, val);
4324 if (rc)
4325 break;
4326 }
4327
4328 return rc;
4329}
4330
733def6a
YM		 4331static int qed_configure_max_vf_rate(struct qed_dev *cdev, int vfid, int rate)
4332{
4333 int i;
4334
4335 for_each_hwfn(cdev, i) {
4336 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
4337 struct qed_public_vf_info *vf;
4338
4339 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
4340 DP_NOTICE(p_hwfn,
4341 "SR-IOV sanity check failed, can't set tx rate\n");
4342 return -EINVAL;
4343 }
4344
4345 vf = qed_iov_get_public_vf_info(p_hwfn, vfid, true);
4346
4347 vf->tx_rate = rate;
4348
4349 qed_inform_vf_link_state(p_hwfn);
4350 }
4351
4352 return 0;
4353}
4354
4355static int qed_set_vf_rate(struct qed_dev *cdev,
4356 int vfid, u32 min_rate, u32 max_rate)
4357{
4358 int rc_min = 0, rc_max = 0;
4359
4360 if (max_rate)
4361 rc_max = qed_configure_max_vf_rate(cdev, vfid, max_rate);
4362
4363 if (min_rate)
4364 rc_min = qed_iov_configure_min_tx_rate(cdev, vfid, min_rate);
4365
4366 if (rc_max | rc_min)
4367 return -EINVAL;
4368
4369 return 0;
4370}
4371
f990c82c
MY		 4372static int qed_set_vf_trust(struct qed_dev *cdev, int vfid, bool trust)
4373{
4374 int i;
4375
4376 for_each_hwfn(cdev, i) {
4377 struct qed_hwfn *hwfn = &cdev->hwfns[i];
4378 struct qed_public_vf_info *vf;
4379
4380 if (!qed_iov_pf_sanity_check(hwfn, vfid)) {
4381 DP_NOTICE(hwfn,
4382 "SR-IOV sanity check failed, can't set trust\n");
4383 return -EINVAL;
4384 }
4385
4386 vf = qed_iov_get_public_vf_info(hwfn, vfid, true);
4387
4388 if (vf->is_trusted_request == trust)
4389 return 0;
4390 vf->is_trusted_request = trust;
4391
4392 qed_schedule_iov(hwfn, QED_IOV_WQ_TRUST_FLAG);
4393 }
4394
4395 return 0;
4396}
4397
37bff2b9
YM		 4398static void qed_handle_vf_msg(struct qed_hwfn *hwfn)
4399{
4400 u64 events[QED_VF_ARRAY_LENGTH];
4401 struct qed_ptt *ptt;
4402 int i;
4403
4404 ptt = qed_ptt_acquire(hwfn);
4405 if (!ptt) {
4406 DP_VERBOSE(hwfn, QED_MSG_IOV,
4407 "Can't acquire PTT; re-scheduling\n");
4408 qed_schedule_iov(hwfn, QED_IOV_WQ_MSG_FLAG);
4409 return;
4410 }
4411
fd3c615a 4412 qed_iov_pf_get_pending_events(hwfn, events);
37bff2b9
YM		 4413
4414 DP_VERBOSE(hwfn, QED_MSG_IOV,
4415 "Event mask of VF events: 0x%llx 0x%llx 0x%llx\n",
4416 events[0], events[1], events[2]);
4417
4418 qed_for_each_vf(hwfn, i) {
4419 /* Skip VFs with no pending messages */
4420 if (!(events[i / 64] & (1ULL << (i % 64))))
4421 continue;
4422
4423 DP_VERBOSE(hwfn, QED_MSG_IOV,
4424 "Handling VF message from VF 0x%02x [Abs 0x%02x]\n",
4425 i, hwfn->cdev->p_iov_info->first_vf_in_pf + i);
4426
4427 /* Copy VF's message to PF's request buffer for that VF */
4428 if (qed_iov_copy_vf_msg(hwfn, ptt, i))
4429 continue;
4430
4431 qed_iov_process_mbx_req(hwfn, ptt, i);
4432 }
4433
4434 qed_ptt_release(hwfn, ptt);
4435}
4436
08feecd7
YM		 4437static void qed_handle_pf_set_vf_unicast(struct qed_hwfn *hwfn)
4438{
4439 int i;
4440
4441 qed_for_each_vf(hwfn, i) {
4442 struct qed_public_vf_info *info;
4443 bool update = false;
eff16960 4444 u8 *mac;
08feecd7
YM		 4445
4446 info = qed_iov_get_public_vf_info(hwfn, i, true);
4447 if (!info)
4448 continue;
4449
4450 /* Update data on bulletin board */
eff16960
YM		 4451 mac = qed_iov_bulletin_get_forced_mac(hwfn, i);
4452 if (is_valid_ether_addr(info->forced_mac) &&
4453 (!mac || !ether_addr_equal(mac, info->forced_mac))) {
4454 DP_VERBOSE(hwfn,
4455 QED_MSG_IOV,
4456 "Handling PF setting of VF MAC to VF 0x%02x [Abs 0x%02x]\n",
4457 i,
4458 hwfn->cdev->p_iov_info->first_vf_in_pf + i);
4459
4460 /* Update bulletin board with forced MAC */
4461 qed_iov_bulletin_set_forced_mac(hwfn,
4462 info->forced_mac, i);
4463 update = true;
4464 }
08feecd7
YM		 4465
4466 if (qed_iov_bulletin_get_forced_vlan(hwfn, i) ^
4467 info->forced_vlan) {
4468 DP_VERBOSE(hwfn,
4469 QED_MSG_IOV,
4470 "Handling PF setting of pvid [0x%04x] to VF 0x%02x [Abs 0x%02x]\n",
4471 info->forced_vlan,
4472 i,
4473 hwfn->cdev->p_iov_info->first_vf_in_pf + i);
4474 qed_iov_bulletin_set_forced_vlan(hwfn,
4475 info->forced_vlan, i);
4476 update = true;
4477 }
4478
4479 if (update)
4480 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
4481 }
4482}
4483
36558c3d
YM		 4484static void qed_handle_bulletin_post(struct qed_hwfn *hwfn)
4485{
4486 struct qed_ptt *ptt;
4487 int i;
4488
4489 ptt = qed_ptt_acquire(hwfn);
4490 if (!ptt) {
4491 DP_NOTICE(hwfn, "Failed allocating a ptt entry\n");
4492 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
4493 return;
4494 }
4495
4496 qed_for_each_vf(hwfn, i)
4497 qed_iov_post_vf_bulletin(hwfn, i, ptt);
4498
4499 qed_ptt_release(hwfn, ptt);
4500}
4501
f990c82c
MY		 4502static void qed_iov_handle_trust_change(struct qed_hwfn *hwfn)
4503{
4504 struct qed_sp_vport_update_params params;
4505 struct qed_filter_accept_flags *flags;
4506 struct qed_public_vf_info *vf_info;
4507 struct qed_vf_info *vf;
4508 u8 mask;
4509 int i;
4510
4511 mask = QED_ACCEPT_UCAST_UNMATCHED | QED_ACCEPT_MCAST_UNMATCHED;
4512 flags = &params.accept_flags;
4513
4514 qed_for_each_vf(hwfn, i) {
4515 /* Need to make sure current requested configuration didn't
4516 * flip so that we'll end up configuring something that's not
4517 * needed.
4518 */
4519 vf_info = qed_iov_get_public_vf_info(hwfn, i, true);
4520 if (vf_info->is_trusted_configured ==
4521 vf_info->is_trusted_request)
4522 continue;
4523 vf_info->is_trusted_configured = vf_info->is_trusted_request;
4524
4525 /* Validate that the VF has a configured vport */
4526 vf = qed_iov_get_vf_info(hwfn, i, true);
4527 if (!vf->vport_instance)
4528 continue;
4529
4530 memset(&params, 0, sizeof(params));
4531 params.opaque_fid = vf->opaque_fid;
4532 params.vport_id = vf->vport_id;
4533
4534 if (vf_info->rx_accept_mode & mask) {
4535 flags->update_rx_mode_config = 1;
4536 flags->rx_accept_filter = vf_info->rx_accept_mode;
4537 }
4538
4539 if (vf_info->tx_accept_mode & mask) {
4540 flags->update_tx_mode_config = 1;
4541 flags->tx_accept_filter = vf_info->tx_accept_mode;
4542 }
4543
4544 /* Remove if needed; Otherwise this would set the mask */
4545 if (!vf_info->is_trusted_configured) {
4546 flags->rx_accept_filter &= ~mask;
4547 flags->tx_accept_filter &= ~mask;
4548 }
4549
4550 if (flags->update_rx_mode_config ||
4551 flags->update_tx_mode_config)
4552 qed_sp_vport_update(hwfn, &params,
4553 QED_SPQ_MODE_EBLOCK, NULL);
4554 }
4555}
4556
ba56947a
BX		 4557static void qed_iov_pf_task(struct work_struct *work)
4558
37bff2b9
YM		 4559{
4560 struct qed_hwfn *hwfn = container_of(work, struct qed_hwfn,
4561 iov_task.work);
0b55e27d 4562 int rc;
37bff2b9
YM		 4563
4564 if (test_and_clear_bit(QED_IOV_WQ_STOP_WQ_FLAG, &hwfn->iov_task_flags))
4565 return;
4566
0b55e27d
YM		 4567 if (test_and_clear_bit(QED_IOV_WQ_FLR_FLAG, &hwfn->iov_task_flags)) {
4568 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
4569
4570 if (!ptt) {
4571 qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
4572 return;
4573 }
4574
4575 rc = qed_iov_vf_flr_cleanup(hwfn, ptt);
4576 if (rc)
4577 qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
4578
4579 qed_ptt_release(hwfn, ptt);
4580 }
4581
37bff2b9
YM		 4582 if (test_and_clear_bit(QED_IOV_WQ_MSG_FLAG, &hwfn->iov_task_flags))
4583 qed_handle_vf_msg(hwfn);
08feecd7
YM		 4584
4585 if (test_and_clear_bit(QED_IOV_WQ_SET_UNICAST_FILTER_FLAG,
4586 &hwfn->iov_task_flags))
4587 qed_handle_pf_set_vf_unicast(hwfn);
4588
36558c3d
YM		 4589 if (test_and_clear_bit(QED_IOV_WQ_BULLETIN_UPDATE_FLAG,
4590 &hwfn->iov_task_flags))
4591 qed_handle_bulletin_post(hwfn);
f990c82c
MY		 4592
4593 if (test_and_clear_bit(QED_IOV_WQ_TRUST_FLAG, &hwfn->iov_task_flags))
4594 qed_iov_handle_trust_change(hwfn);
37bff2b9
YM		 4595}
4596
4597void qed_iov_wq_stop(struct qed_dev *cdev, bool schedule_first)
4598{
4599 int i;
4600
4601 for_each_hwfn(cdev, i) {
4602 if (!cdev->hwfns[i].iov_wq)
4603 continue;
4604
4605 if (schedule_first) {
4606 qed_schedule_iov(&cdev->hwfns[i],
4607 QED_IOV_WQ_STOP_WQ_FLAG);
4608 cancel_delayed_work_sync(&cdev->hwfns[i].iov_task);
4609 }
4610
4611 flush_workqueue(cdev->hwfns[i].iov_wq);
4612 destroy_workqueue(cdev->hwfns[i].iov_wq);
4613 }
4614}
4615
4616int qed_iov_wq_start(struct qed_dev *cdev)
4617{
4618 char name[NAME_SIZE];
4619 int i;
4620
4621 for_each_hwfn(cdev, i) {
4622 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
4623
36558c3d
YM		 4624 /* PFs needs a dedicated workqueue only if they support IOV.
4625 * VFs always require one.
4626 */
4627 if (IS_PF(p_hwfn->cdev) && !IS_PF_SRIOV(p_hwfn))
37bff2b9
YM		 4628 continue;
4629
4630 snprintf(name, NAME_SIZE, "iov-%02x:%02x.%02x",
4631 cdev->pdev->bus->number,
4632 PCI_SLOT(cdev->pdev->devfn), p_hwfn->abs_pf_id);
4633
4634 p_hwfn->iov_wq = create_singlethread_workqueue(name);
4635 if (!p_hwfn->iov_wq) {
4636 DP_NOTICE(p_hwfn, "Cannot create iov workqueue\n");
4637 return -ENOMEM;
4638 }
4639
36558c3d
YM		 4640 if (IS_PF(cdev))
4641 INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_pf_task);
4642 else
4643 INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_vf_task);
37bff2b9
YM		 4644 }
4645
4646 return 0;
4647}
0b55e27d
YM		 4648
4649const struct qed_iov_hv_ops qed_iov_ops_pass = {
4650 .configure = &qed_sriov_configure,
eff16960 4651 .set_mac = &qed_sriov_pf_set_mac,
08feecd7 4652 .set_vlan = &qed_sriov_pf_set_vlan,
73390ac9 4653 .get_config = &qed_get_vf_config,
733def6a 4654 .set_link_state = &qed_set_vf_link_state,
6ddc7608 4655 .set_spoof = &qed_spoof_configure,
733def6a 4656 .set_rate = &qed_set_vf_rate,
f990c82c 4657 .set_trust = &qed_set_vf_trust,
0b55e27d 4658};
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