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qed: PF-VF resource negotiation
[mirror_ubuntu-jammy-kernel.git] / drivers / net / ethernet / qlogic / qed / qed_sriov.c
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1/* QLogic qed NIC Driver
2 * Copyright (c) 2015 QLogic Corporation
3 *
4 * This software is available under the terms of the GNU General Public License
5 * (GPL) Version 2, available from the file COPYING in the main directory of
6 * this source tree.
7 */
8
dacd88d6 9#include <linux/etherdevice.h>
36558c3d 10#include <linux/crc32.h>
0b55e27d 11#include <linux/qed/qed_iov_if.h>
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12#include "qed_cxt.h"
13#include "qed_hsi.h"
32a47e72 14#include "qed_hw.h"
1408cc1f 15#include "qed_init_ops.h"
32a47e72 16#include "qed_int.h"
1408cc1f 17#include "qed_mcp.h"
32a47e72 18#include "qed_reg_addr.h"
1408cc1f 19#include "qed_sp.h"
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20#include "qed_sriov.h"
21#include "qed_vf.h"
22
1408cc1f 23/* IOV ramrods */
1fe614d1 24static int qed_sp_vf_start(struct qed_hwfn *p_hwfn, struct qed_vf_info *p_vf)
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25{
26 struct vf_start_ramrod_data *p_ramrod = NULL;
27 struct qed_spq_entry *p_ent = NULL;
28 struct qed_sp_init_data init_data;
29 int rc = -EINVAL;
1fe614d1 30 u8 fp_minor;
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31
32 /* Get SPQ entry */
33 memset(&init_data, 0, sizeof(init_data));
34 init_data.cid = qed_spq_get_cid(p_hwfn);
1fe614d1 35 init_data.opaque_fid = p_vf->opaque_fid;
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36 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
37
38 rc = qed_sp_init_request(p_hwfn, &p_ent,
39 COMMON_RAMROD_VF_START,
40 PROTOCOLID_COMMON, &init_data);
41 if (rc)
42 return rc;
43
44 p_ramrod = &p_ent->ramrod.vf_start;
45
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46 p_ramrod->vf_id = GET_FIELD(p_vf->concrete_fid, PXP_CONCRETE_FID_VFID);
47 p_ramrod->opaque_fid = cpu_to_le16(p_vf->opaque_fid);
48
49 switch (p_hwfn->hw_info.personality) {
50 case QED_PCI_ETH:
51 p_ramrod->personality = PERSONALITY_ETH;
52 break;
53 case QED_PCI_ETH_ROCE:
54 p_ramrod->personality = PERSONALITY_RDMA_AND_ETH;
55 break;
56 default:
57 DP_NOTICE(p_hwfn, "Unknown VF personality %d\n",
58 p_hwfn->hw_info.personality);
59 return -EINVAL;
60 }
61
62 fp_minor = p_vf->acquire.vfdev_info.eth_fp_hsi_minor;
63 if (fp_minor > ETH_HSI_VER_MINOR) {
64 DP_VERBOSE(p_hwfn,
65 QED_MSG_IOV,
66 "VF [%d] - Requested fp hsi %02x.%02x which is slightly newer than PF's %02x.%02x; Configuring PFs version\n",
67 p_vf->abs_vf_id,
68 ETH_HSI_VER_MAJOR,
69 fp_minor, ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
70 fp_minor = ETH_HSI_VER_MINOR;
71 }
1408cc1f 72
351a4ded 73 p_ramrod->hsi_fp_ver.major_ver_arr[ETH_VER_KEY] = ETH_HSI_VER_MAJOR;
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74 p_ramrod->hsi_fp_ver.minor_ver_arr[ETH_VER_KEY] = fp_minor;
75
76 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
77 "VF[%d] - Starting using HSI %02x.%02x\n",
78 p_vf->abs_vf_id, ETH_HSI_VER_MAJOR, fp_minor);
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79
80 return qed_spq_post(p_hwfn, p_ent, NULL);
81}
82
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83static int qed_sp_vf_stop(struct qed_hwfn *p_hwfn,
84 u32 concrete_vfid, u16 opaque_vfid)
85{
86 struct vf_stop_ramrod_data *p_ramrod = NULL;
87 struct qed_spq_entry *p_ent = NULL;
88 struct qed_sp_init_data init_data;
89 int rc = -EINVAL;
90
91 /* Get SPQ entry */
92 memset(&init_data, 0, sizeof(init_data));
93 init_data.cid = qed_spq_get_cid(p_hwfn);
94 init_data.opaque_fid = opaque_vfid;
95 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
96
97 rc = qed_sp_init_request(p_hwfn, &p_ent,
98 COMMON_RAMROD_VF_STOP,
99 PROTOCOLID_COMMON, &init_data);
100 if (rc)
101 return rc;
102
103 p_ramrod = &p_ent->ramrod.vf_stop;
104
105 p_ramrod->vf_id = GET_FIELD(concrete_vfid, PXP_CONCRETE_FID_VFID);
106
107 return qed_spq_post(p_hwfn, p_ent, NULL);
108}
109
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110bool qed_iov_is_valid_vfid(struct qed_hwfn *p_hwfn,
111 int rel_vf_id, bool b_enabled_only)
112{
113 if (!p_hwfn->pf_iov_info) {
114 DP_NOTICE(p_hwfn->cdev, "No iov info\n");
115 return false;
116 }
117
118 if ((rel_vf_id >= p_hwfn->cdev->p_iov_info->total_vfs) ||
119 (rel_vf_id < 0))
120 return false;
121
122 if ((!p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_init) &&
123 b_enabled_only)
124 return false;
125
126 return true;
127}
128
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129static struct qed_vf_info *qed_iov_get_vf_info(struct qed_hwfn *p_hwfn,
130 u16 relative_vf_id,
131 bool b_enabled_only)
132{
133 struct qed_vf_info *vf = NULL;
134
135 if (!p_hwfn->pf_iov_info) {
136 DP_NOTICE(p_hwfn->cdev, "No iov info\n");
137 return NULL;
138 }
139
140 if (qed_iov_is_valid_vfid(p_hwfn, relative_vf_id, b_enabled_only))
141 vf = &p_hwfn->pf_iov_info->vfs_array[relative_vf_id];
142 else
143 DP_ERR(p_hwfn, "qed_iov_get_vf_info: VF[%d] is not enabled\n",
144 relative_vf_id);
145
146 return vf;
147}
148
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149int qed_iov_post_vf_bulletin(struct qed_hwfn *p_hwfn,
150 int vfid, struct qed_ptt *p_ptt)
151{
152 struct qed_bulletin_content *p_bulletin;
153 int crc_size = sizeof(p_bulletin->crc);
154 struct qed_dmae_params params;
155 struct qed_vf_info *p_vf;
156
157 p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
158 if (!p_vf)
159 return -EINVAL;
160
161 if (!p_vf->vf_bulletin)
162 return -EINVAL;
163
164 p_bulletin = p_vf->bulletin.p_virt;
165
166 /* Increment bulletin board version and compute crc */
167 p_bulletin->version++;
168 p_bulletin->crc = crc32(0, (u8 *)p_bulletin + crc_size,
169 p_vf->bulletin.size - crc_size);
170
171 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
172 "Posting Bulletin 0x%08x to VF[%d] (CRC 0x%08x)\n",
173 p_bulletin->version, p_vf->relative_vf_id, p_bulletin->crc);
174
175 /* propagate bulletin board via dmae to vm memory */
176 memset(&params, 0, sizeof(params));
177 params.flags = QED_DMAE_FLAG_VF_DST;
178 params.dst_vfid = p_vf->abs_vf_id;
179 return qed_dmae_host2host(p_hwfn, p_ptt, p_vf->bulletin.phys,
180 p_vf->vf_bulletin, p_vf->bulletin.size / 4,
181 &params);
182}
183
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184static int qed_iov_pci_cfg_info(struct qed_dev *cdev)
185{
186 struct qed_hw_sriov_info *iov = cdev->p_iov_info;
187 int pos = iov->pos;
188
189 DP_VERBOSE(cdev, QED_MSG_IOV, "sriov ext pos %d\n", pos);
190 pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
191
192 pci_read_config_word(cdev->pdev,
193 pos + PCI_SRIOV_TOTAL_VF, &iov->total_vfs);
194 pci_read_config_word(cdev->pdev,
195 pos + PCI_SRIOV_INITIAL_VF, &iov->initial_vfs);
196
197 pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_NUM_VF, &iov->num_vfs);
198 if (iov->num_vfs) {
199 DP_VERBOSE(cdev,
200 QED_MSG_IOV,
201 "Number of VFs are already set to non-zero value. Ignoring PCI configuration value\n");
202 iov->num_vfs = 0;
203 }
204
205 pci_read_config_word(cdev->pdev,
206 pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
207
208 pci_read_config_word(cdev->pdev,
209 pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
210
211 pci_read_config_word(cdev->pdev,
212 pos + PCI_SRIOV_VF_DID, &iov->vf_device_id);
213
214 pci_read_config_dword(cdev->pdev,
215 pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
216
217 pci_read_config_dword(cdev->pdev, pos + PCI_SRIOV_CAP, &iov->cap);
218
219 pci_read_config_byte(cdev->pdev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
220
221 DP_VERBOSE(cdev,
222 QED_MSG_IOV,
223 "IOV info: nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
224 iov->nres,
225 iov->cap,
226 iov->ctrl,
227 iov->total_vfs,
228 iov->initial_vfs,
229 iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
230
231 /* Some sanity checks */
232 if (iov->num_vfs > NUM_OF_VFS(cdev) ||
233 iov->total_vfs > NUM_OF_VFS(cdev)) {
234 /* This can happen only due to a bug. In this case we set
235 * num_vfs to zero to avoid memory corruption in the code that
236 * assumes max number of vfs
237 */
238 DP_NOTICE(cdev,
239 "IOV: Unexpected number of vfs set: %d setting num_vf to zero\n",
240 iov->num_vfs);
241
242 iov->num_vfs = 0;
243 iov->total_vfs = 0;
244 }
245
246 return 0;
247}
248
249static void qed_iov_clear_vf_igu_blocks(struct qed_hwfn *p_hwfn,
250 struct qed_ptt *p_ptt)
251{
252 struct qed_igu_block *p_sb;
253 u16 sb_id;
254 u32 val;
255
256 if (!p_hwfn->hw_info.p_igu_info) {
257 DP_ERR(p_hwfn,
258 "qed_iov_clear_vf_igu_blocks IGU Info not initialized\n");
259 return;
260 }
261
262 for (sb_id = 0; sb_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev);
263 sb_id++) {
264 p_sb = &p_hwfn->hw_info.p_igu_info->igu_map.igu_blocks[sb_id];
265 if ((p_sb->status & QED_IGU_STATUS_FREE) &&
266 !(p_sb->status & QED_IGU_STATUS_PF)) {
267 val = qed_rd(p_hwfn, p_ptt,
268 IGU_REG_MAPPING_MEMORY + sb_id * 4);
269 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
270 qed_wr(p_hwfn, p_ptt,
271 IGU_REG_MAPPING_MEMORY + 4 * sb_id, val);
272 }
273 }
274}
275
276static void qed_iov_setup_vfdb(struct qed_hwfn *p_hwfn)
277{
278 struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
279 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
280 struct qed_bulletin_content *p_bulletin_virt;
281 dma_addr_t req_p, rply_p, bulletin_p;
282 union pfvf_tlvs *p_reply_virt_addr;
283 union vfpf_tlvs *p_req_virt_addr;
284 u8 idx = 0;
285
286 memset(p_iov_info->vfs_array, 0, sizeof(p_iov_info->vfs_array));
287
288 p_req_virt_addr = p_iov_info->mbx_msg_virt_addr;
289 req_p = p_iov_info->mbx_msg_phys_addr;
290 p_reply_virt_addr = p_iov_info->mbx_reply_virt_addr;
291 rply_p = p_iov_info->mbx_reply_phys_addr;
292 p_bulletin_virt = p_iov_info->p_bulletins;
293 bulletin_p = p_iov_info->bulletins_phys;
294 if (!p_req_virt_addr || !p_reply_virt_addr || !p_bulletin_virt) {
295 DP_ERR(p_hwfn,
296 "qed_iov_setup_vfdb called without allocating mem first\n");
297 return;
298 }
299
300 for (idx = 0; idx < p_iov->total_vfs; idx++) {
301 struct qed_vf_info *vf = &p_iov_info->vfs_array[idx];
302 u32 concrete;
303
304 vf->vf_mbx.req_virt = p_req_virt_addr + idx;
305 vf->vf_mbx.req_phys = req_p + idx * sizeof(union vfpf_tlvs);
306 vf->vf_mbx.reply_virt = p_reply_virt_addr + idx;
307 vf->vf_mbx.reply_phys = rply_p + idx * sizeof(union pfvf_tlvs);
308
309 vf->state = VF_STOPPED;
310 vf->b_init = false;
311
312 vf->bulletin.phys = idx *
313 sizeof(struct qed_bulletin_content) +
314 bulletin_p;
315 vf->bulletin.p_virt = p_bulletin_virt + idx;
316 vf->bulletin.size = sizeof(struct qed_bulletin_content);
317
318 vf->relative_vf_id = idx;
319 vf->abs_vf_id = idx + p_iov->first_vf_in_pf;
320 concrete = qed_vfid_to_concrete(p_hwfn, vf->abs_vf_id);
321 vf->concrete_fid = concrete;
322 vf->opaque_fid = (p_hwfn->hw_info.opaque_fid & 0xff) |
323 (vf->abs_vf_id << 8);
324 vf->vport_id = idx + 1;
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325
326 vf->num_mac_filters = QED_ETH_VF_NUM_MAC_FILTERS;
327 vf->num_vlan_filters = QED_ETH_VF_NUM_VLAN_FILTERS;
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328 }
329}
330
331static int qed_iov_allocate_vfdb(struct qed_hwfn *p_hwfn)
332{
333 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
334 void **p_v_addr;
335 u16 num_vfs = 0;
336
337 num_vfs = p_hwfn->cdev->p_iov_info->total_vfs;
338
339 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
340 "qed_iov_allocate_vfdb for %d VFs\n", num_vfs);
341
342 /* Allocate PF Mailbox buffer (per-VF) */
343 p_iov_info->mbx_msg_size = sizeof(union vfpf_tlvs) * num_vfs;
344 p_v_addr = &p_iov_info->mbx_msg_virt_addr;
345 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
346 p_iov_info->mbx_msg_size,
347 &p_iov_info->mbx_msg_phys_addr,
348 GFP_KERNEL);
349 if (!*p_v_addr)
350 return -ENOMEM;
351
352 /* Allocate PF Mailbox Reply buffer (per-VF) */
353 p_iov_info->mbx_reply_size = sizeof(union pfvf_tlvs) * num_vfs;
354 p_v_addr = &p_iov_info->mbx_reply_virt_addr;
355 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
356 p_iov_info->mbx_reply_size,
357 &p_iov_info->mbx_reply_phys_addr,
358 GFP_KERNEL);
359 if (!*p_v_addr)
360 return -ENOMEM;
361
362 p_iov_info->bulletins_size = sizeof(struct qed_bulletin_content) *
363 num_vfs;
364 p_v_addr = &p_iov_info->p_bulletins;
365 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
366 p_iov_info->bulletins_size,
367 &p_iov_info->bulletins_phys,
368 GFP_KERNEL);
369 if (!*p_v_addr)
370 return -ENOMEM;
371
372 DP_VERBOSE(p_hwfn,
373 QED_MSG_IOV,
374 "PF's Requests mailbox [%p virt 0x%llx phys], Response mailbox [%p virt 0x%llx phys] Bulletins [%p virt 0x%llx phys]\n",
375 p_iov_info->mbx_msg_virt_addr,
376 (u64) p_iov_info->mbx_msg_phys_addr,
377 p_iov_info->mbx_reply_virt_addr,
378 (u64) p_iov_info->mbx_reply_phys_addr,
379 p_iov_info->p_bulletins, (u64) p_iov_info->bulletins_phys);
380
381 return 0;
382}
383
384static void qed_iov_free_vfdb(struct qed_hwfn *p_hwfn)
385{
386 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
387
388 if (p_hwfn->pf_iov_info->mbx_msg_virt_addr)
389 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
390 p_iov_info->mbx_msg_size,
391 p_iov_info->mbx_msg_virt_addr,
392 p_iov_info->mbx_msg_phys_addr);
393
394 if (p_hwfn->pf_iov_info->mbx_reply_virt_addr)
395 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
396 p_iov_info->mbx_reply_size,
397 p_iov_info->mbx_reply_virt_addr,
398 p_iov_info->mbx_reply_phys_addr);
399
400 if (p_iov_info->p_bulletins)
401 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
402 p_iov_info->bulletins_size,
403 p_iov_info->p_bulletins,
404 p_iov_info->bulletins_phys);
405}
406
407int qed_iov_alloc(struct qed_hwfn *p_hwfn)
408{
409 struct qed_pf_iov *p_sriov;
410
411 if (!IS_PF_SRIOV(p_hwfn)) {
412 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
413 "No SR-IOV - no need for IOV db\n");
414 return 0;
415 }
416
417 p_sriov = kzalloc(sizeof(*p_sriov), GFP_KERNEL);
418 if (!p_sriov) {
419 DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_sriov'\n");
420 return -ENOMEM;
421 }
422
423 p_hwfn->pf_iov_info = p_sriov;
424
425 return qed_iov_allocate_vfdb(p_hwfn);
426}
427
428void qed_iov_setup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
429{
430 if (!IS_PF_SRIOV(p_hwfn) || !IS_PF_SRIOV_ALLOC(p_hwfn))
431 return;
432
433 qed_iov_setup_vfdb(p_hwfn);
434 qed_iov_clear_vf_igu_blocks(p_hwfn, p_ptt);
435}
436
437void qed_iov_free(struct qed_hwfn *p_hwfn)
438{
439 if (IS_PF_SRIOV_ALLOC(p_hwfn)) {
440 qed_iov_free_vfdb(p_hwfn);
441 kfree(p_hwfn->pf_iov_info);
442 }
443}
444
445void qed_iov_free_hw_info(struct qed_dev *cdev)
446{
447 kfree(cdev->p_iov_info);
448 cdev->p_iov_info = NULL;
449}
450
451int qed_iov_hw_info(struct qed_hwfn *p_hwfn)
452{
453 struct qed_dev *cdev = p_hwfn->cdev;
454 int pos;
455 int rc;
456
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457 if (IS_VF(p_hwfn->cdev))
458 return 0;
459
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460 /* Learn the PCI configuration */
461 pos = pci_find_ext_capability(p_hwfn->cdev->pdev,
462 PCI_EXT_CAP_ID_SRIOV);
463 if (!pos) {
464 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No PCIe IOV support\n");
465 return 0;
466 }
467
468 /* Allocate a new struct for IOV information */
469 cdev->p_iov_info = kzalloc(sizeof(*cdev->p_iov_info), GFP_KERNEL);
470 if (!cdev->p_iov_info) {
471 DP_NOTICE(p_hwfn, "Can't support IOV due to lack of memory\n");
472 return -ENOMEM;
473 }
474 cdev->p_iov_info->pos = pos;
475
476 rc = qed_iov_pci_cfg_info(cdev);
477 if (rc)
478 return rc;
479
480 /* We want PF IOV to be synonemous with the existance of p_iov_info;
481 * In case the capability is published but there are no VFs, simply
482 * de-allocate the struct.
483 */
484 if (!cdev->p_iov_info->total_vfs) {
485 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
486 "IOV capabilities, but no VFs are published\n");
487 kfree(cdev->p_iov_info);
488 cdev->p_iov_info = NULL;
489 return 0;
490 }
491
492 /* Calculate the first VF index - this is a bit tricky; Basically,
493 * VFs start at offset 16 relative to PF0, and 2nd engine VFs begin
494 * after the first engine's VFs.
495 */
496 cdev->p_iov_info->first_vf_in_pf = p_hwfn->cdev->p_iov_info->offset +
497 p_hwfn->abs_pf_id - 16;
498 if (QED_PATH_ID(p_hwfn))
499 cdev->p_iov_info->first_vf_in_pf -= MAX_NUM_VFS_BB;
500
501 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
502 "First VF in hwfn 0x%08x\n",
503 cdev->p_iov_info->first_vf_in_pf);
504
505 return 0;
506}
507
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508static bool qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn, int vfid)
509{
510 /* Check PF supports sriov */
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511 if (IS_VF(p_hwfn->cdev) || !IS_QED_SRIOV(p_hwfn->cdev) ||
512 !IS_PF_SRIOV_ALLOC(p_hwfn))
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513 return false;
514
515 /* Check VF validity */
b0409fa0 516 if (!qed_iov_is_valid_vfid(p_hwfn, vfid, true))
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517 return false;
518
519 return true;
520}
521
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522static void qed_iov_set_vf_to_disable(struct qed_dev *cdev,
523 u16 rel_vf_id, u8 to_disable)
524{
525 struct qed_vf_info *vf;
526 int i;
527
528 for_each_hwfn(cdev, i) {
529 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
530
531 vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
532 if (!vf)
533 continue;
534
535 vf->to_disable = to_disable;
536 }
537}
538
539void qed_iov_set_vfs_to_disable(struct qed_dev *cdev, u8 to_disable)
540{
541 u16 i;
542
543 if (!IS_QED_SRIOV(cdev))
544 return;
545
546 for (i = 0; i < cdev->p_iov_info->total_vfs; i++)
547 qed_iov_set_vf_to_disable(cdev, i, to_disable);
548}
549
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550static void qed_iov_vf_pglue_clear_err(struct qed_hwfn *p_hwfn,
551 struct qed_ptt *p_ptt, u8 abs_vfid)
552{
553 qed_wr(p_hwfn, p_ptt,
554 PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR + (abs_vfid >> 5) * 4,
555 1 << (abs_vfid & 0x1f));
556}
557
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558static void qed_iov_vf_igu_reset(struct qed_hwfn *p_hwfn,
559 struct qed_ptt *p_ptt, struct qed_vf_info *vf)
560{
dacd88d6
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561 int i;
562
563 /* Set VF masks and configuration - pretend */
564 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
565
566 qed_wr(p_hwfn, p_ptt, IGU_REG_STATISTIC_NUM_VF_MSG_SENT, 0);
567
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568 /* unpretend */
569 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
570
571 /* iterate over all queues, clear sb consumer */
b2b897eb
YM
572 for (i = 0; i < vf->num_sbs; i++)
573 qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
574 vf->igu_sbs[i],
575 vf->opaque_fid, true);
dacd88d6
YM
576}
577
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578static void qed_iov_vf_igu_set_int(struct qed_hwfn *p_hwfn,
579 struct qed_ptt *p_ptt,
580 struct qed_vf_info *vf, bool enable)
581{
582 u32 igu_vf_conf;
583
584 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
585
586 igu_vf_conf = qed_rd(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION);
587
588 if (enable)
589 igu_vf_conf |= IGU_VF_CONF_MSI_MSIX_EN;
590 else
591 igu_vf_conf &= ~IGU_VF_CONF_MSI_MSIX_EN;
592
593 qed_wr(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION, igu_vf_conf);
594
595 /* unpretend */
596 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
597}
598
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599static int qed_iov_enable_vf_access(struct qed_hwfn *p_hwfn,
600 struct qed_ptt *p_ptt,
601 struct qed_vf_info *vf)
602{
603 u32 igu_vf_conf = IGU_VF_CONF_FUNC_EN;
604 int rc;
605
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606 if (vf->to_disable)
607 return 0;
608
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609 DP_VERBOSE(p_hwfn,
610 QED_MSG_IOV,
611 "Enable internal access for vf %x [abs %x]\n",
612 vf->abs_vf_id, QED_VF_ABS_ID(p_hwfn, vf));
613
614 qed_iov_vf_pglue_clear_err(p_hwfn, p_ptt, QED_VF_ABS_ID(p_hwfn, vf));
615
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616 qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
617
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618 rc = qed_mcp_config_vf_msix(p_hwfn, p_ptt, vf->abs_vf_id, vf->num_sbs);
619 if (rc)
620 return rc;
621
622 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
623
624 SET_FIELD(igu_vf_conf, IGU_VF_CONF_PARENT, p_hwfn->rel_pf_id);
625 STORE_RT_REG(p_hwfn, IGU_REG_VF_CONFIGURATION_RT_OFFSET, igu_vf_conf);
626
627 qed_init_run(p_hwfn, p_ptt, PHASE_VF, vf->abs_vf_id,
628 p_hwfn->hw_info.hw_mode);
629
630 /* unpretend */
631 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
632
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633 vf->state = VF_FREE;
634
635 return rc;
636}
637
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638/**
639 * @brief qed_iov_config_perm_table - configure the permission
640 * zone table.
641 * In E4, queue zone permission table size is 320x9. There
642 * are 320 VF queues for single engine device (256 for dual
643 * engine device), and each entry has the following format:
644 * {Valid, VF[7:0]}
645 * @param p_hwfn
646 * @param p_ptt
647 * @param vf
648 * @param enable
649 */
650static void qed_iov_config_perm_table(struct qed_hwfn *p_hwfn,
651 struct qed_ptt *p_ptt,
652 struct qed_vf_info *vf, u8 enable)
653{
654 u32 reg_addr, val;
655 u16 qzone_id = 0;
656 int qid;
657
658 for (qid = 0; qid < vf->num_rxqs; qid++) {
659 qed_fw_l2_queue(p_hwfn, vf->vf_queues[qid].fw_rx_qid,
660 &qzone_id);
661
662 reg_addr = PSWHST_REG_ZONE_PERMISSION_TABLE + qzone_id * 4;
663 val = enable ? (vf->abs_vf_id | (1 << 8)) : 0;
664 qed_wr(p_hwfn, p_ptt, reg_addr, val);
665 }
666}
667
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668static void qed_iov_enable_vf_traffic(struct qed_hwfn *p_hwfn,
669 struct qed_ptt *p_ptt,
670 struct qed_vf_info *vf)
671{
672 /* Reset vf in IGU - interrupts are still disabled */
673 qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
674
675 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 1);
676
677 /* Permission Table */
678 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, true);
679}
680
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681static u8 qed_iov_alloc_vf_igu_sbs(struct qed_hwfn *p_hwfn,
682 struct qed_ptt *p_ptt,
683 struct qed_vf_info *vf, u16 num_rx_queues)
684{
685 struct qed_igu_block *igu_blocks;
686 int qid = 0, igu_id = 0;
687 u32 val = 0;
688
689 igu_blocks = p_hwfn->hw_info.p_igu_info->igu_map.igu_blocks;
690
691 if (num_rx_queues > p_hwfn->hw_info.p_igu_info->free_blks)
692 num_rx_queues = p_hwfn->hw_info.p_igu_info->free_blks;
693 p_hwfn->hw_info.p_igu_info->free_blks -= num_rx_queues;
694
695 SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER, vf->abs_vf_id);
696 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 1);
697 SET_FIELD(val, IGU_MAPPING_LINE_PF_VALID, 0);
698
699 while ((qid < num_rx_queues) &&
700 (igu_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev))) {
701 if (igu_blocks[igu_id].status & QED_IGU_STATUS_FREE) {
702 struct cau_sb_entry sb_entry;
703
704 vf->igu_sbs[qid] = (u16)igu_id;
705 igu_blocks[igu_id].status &= ~QED_IGU_STATUS_FREE;
706
707 SET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER, qid);
708
709 qed_wr(p_hwfn, p_ptt,
710 IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id,
711 val);
712
713 /* Configure igu sb in CAU which were marked valid */
714 qed_init_cau_sb_entry(p_hwfn, &sb_entry,
715 p_hwfn->rel_pf_id,
716 vf->abs_vf_id, 1);
717 qed_dmae_host2grc(p_hwfn, p_ptt,
718 (u64)(uintptr_t)&sb_entry,
719 CAU_REG_SB_VAR_MEMORY +
720 igu_id * sizeof(u64), 2, 0);
721 qid++;
722 }
723 igu_id++;
724 }
725
726 vf->num_sbs = (u8) num_rx_queues;
727
728 return vf->num_sbs;
729}
730
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731static void qed_iov_free_vf_igu_sbs(struct qed_hwfn *p_hwfn,
732 struct qed_ptt *p_ptt,
733 struct qed_vf_info *vf)
734{
735 struct qed_igu_info *p_info = p_hwfn->hw_info.p_igu_info;
736 int idx, igu_id;
737 u32 addr, val;
738
739 /* Invalidate igu CAM lines and mark them as free */
740 for (idx = 0; idx < vf->num_sbs; idx++) {
741 igu_id = vf->igu_sbs[idx];
742 addr = IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id;
743
744 val = qed_rd(p_hwfn, p_ptt, addr);
745 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
746 qed_wr(p_hwfn, p_ptt, addr, val);
747
748 p_info->igu_map.igu_blocks[igu_id].status |=
749 QED_IGU_STATUS_FREE;
750
751 p_hwfn->hw_info.p_igu_info->free_blks++;
752 }
753
754 vf->num_sbs = 0;
755}
756
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757static int qed_iov_init_hw_for_vf(struct qed_hwfn *p_hwfn,
758 struct qed_ptt *p_ptt,
759 u16 rel_vf_id, u16 num_rx_queues)
760{
761 u8 num_of_vf_avaiable_chains = 0;
762 struct qed_vf_info *vf = NULL;
763 int rc = 0;
764 u32 cids;
765 u8 i;
766
767 vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
768 if (!vf) {
769 DP_ERR(p_hwfn, "qed_iov_init_hw_for_vf : vf is NULL\n");
770 return -EINVAL;
771 }
772
773 if (vf->b_init) {
774 DP_NOTICE(p_hwfn, "VF[%d] is already active.\n", rel_vf_id);
775 return -EINVAL;
776 }
777
778 /* Limit number of queues according to number of CIDs */
779 qed_cxt_get_proto_cid_count(p_hwfn, PROTOCOLID_ETH, &cids);
780 DP_VERBOSE(p_hwfn,
781 QED_MSG_IOV,
782 "VF[%d] - requesting to initialize for 0x%04x queues [0x%04x CIDs available]\n",
783 vf->relative_vf_id, num_rx_queues, (u16) cids);
784 num_rx_queues = min_t(u16, num_rx_queues, ((u16) cids));
785
786 num_of_vf_avaiable_chains = qed_iov_alloc_vf_igu_sbs(p_hwfn,
787 p_ptt,
788 vf,
789 num_rx_queues);
790 if (!num_of_vf_avaiable_chains) {
791 DP_ERR(p_hwfn, "no available igu sbs\n");
792 return -ENOMEM;
793 }
794
795 /* Choose queue number and index ranges */
796 vf->num_rxqs = num_of_vf_avaiable_chains;
797 vf->num_txqs = num_of_vf_avaiable_chains;
798
799 for (i = 0; i < vf->num_rxqs; i++) {
800 u16 queue_id = qed_int_queue_id_from_sb_id(p_hwfn,
801 vf->igu_sbs[i]);
802
803 if (queue_id > RESC_NUM(p_hwfn, QED_L2_QUEUE)) {
804 DP_NOTICE(p_hwfn,
805 "VF[%d] will require utilizing of out-of-bounds queues - %04x\n",
806 vf->relative_vf_id, queue_id);
807 return -EINVAL;
808 }
809
810 /* CIDs are per-VF, so no problem having them 0-based. */
811 vf->vf_queues[i].fw_rx_qid = queue_id;
812 vf->vf_queues[i].fw_tx_qid = queue_id;
813 vf->vf_queues[i].fw_cid = i;
814
815 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
816 "VF[%d] - [%d] SB %04x, Tx/Rx queue %04x CID %04x\n",
817 vf->relative_vf_id, i, vf->igu_sbs[i], queue_id, i);
818 }
819 rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, vf);
820 if (!rc) {
821 vf->b_init = true;
822
823 if (IS_LEAD_HWFN(p_hwfn))
824 p_hwfn->cdev->p_iov_info->num_vfs++;
825 }
826
827 return rc;
828}
829
079d20a6
MC
830static void qed_iov_set_link(struct qed_hwfn *p_hwfn,
831 u16 vfid,
832 struct qed_mcp_link_params *params,
833 struct qed_mcp_link_state *link,
834 struct qed_mcp_link_capabilities *p_caps)
835{
836 struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
837 vfid,
838 false);
839 struct qed_bulletin_content *p_bulletin;
840
841 if (!p_vf)
842 return;
843
844 p_bulletin = p_vf->bulletin.p_virt;
845 p_bulletin->req_autoneg = params->speed.autoneg;
846 p_bulletin->req_adv_speed = params->speed.advertised_speeds;
847 p_bulletin->req_forced_speed = params->speed.forced_speed;
848 p_bulletin->req_autoneg_pause = params->pause.autoneg;
849 p_bulletin->req_forced_rx = params->pause.forced_rx;
850 p_bulletin->req_forced_tx = params->pause.forced_tx;
851 p_bulletin->req_loopback = params->loopback_mode;
852
853 p_bulletin->link_up = link->link_up;
854 p_bulletin->speed = link->speed;
855 p_bulletin->full_duplex = link->full_duplex;
856 p_bulletin->autoneg = link->an;
857 p_bulletin->autoneg_complete = link->an_complete;
858 p_bulletin->parallel_detection = link->parallel_detection;
859 p_bulletin->pfc_enabled = link->pfc_enabled;
860 p_bulletin->partner_adv_speed = link->partner_adv_speed;
861 p_bulletin->partner_tx_flow_ctrl_en = link->partner_tx_flow_ctrl_en;
862 p_bulletin->partner_rx_flow_ctrl_en = link->partner_rx_flow_ctrl_en;
863 p_bulletin->partner_adv_pause = link->partner_adv_pause;
864 p_bulletin->sfp_tx_fault = link->sfp_tx_fault;
865
866 p_bulletin->capability_speed = p_caps->speed_capabilities;
867}
868
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869static int qed_iov_release_hw_for_vf(struct qed_hwfn *p_hwfn,
870 struct qed_ptt *p_ptt, u16 rel_vf_id)
871{
079d20a6
MC
872 struct qed_mcp_link_capabilities caps;
873 struct qed_mcp_link_params params;
874 struct qed_mcp_link_state link;
0b55e27d 875 struct qed_vf_info *vf = NULL;
0b55e27d
YM
876
877 vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
878 if (!vf) {
879 DP_ERR(p_hwfn, "qed_iov_release_hw_for_vf : vf is NULL\n");
880 return -EINVAL;
881 }
882
36558c3d
YM
883 if (vf->bulletin.p_virt)
884 memset(vf->bulletin.p_virt, 0, sizeof(*vf->bulletin.p_virt));
885
886 memset(&vf->p_vf_info, 0, sizeof(vf->p_vf_info));
887
079d20a6
MC
888 /* Get the link configuration back in bulletin so
889 * that when VFs are re-enabled they get the actual
890 * link configuration.
891 */
892 memcpy(&params, qed_mcp_get_link_params(p_hwfn), sizeof(params));
893 memcpy(&link, qed_mcp_get_link_state(p_hwfn), sizeof(link));
894 memcpy(&caps, qed_mcp_get_link_capabilities(p_hwfn), sizeof(caps));
895 qed_iov_set_link(p_hwfn, rel_vf_id, &params, &link, &caps);
896
1fe614d1
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897 /* Forget the VF's acquisition message */
898 memset(&vf->acquire, 0, sizeof(vf->acquire));
0b55e27d
YM
899
900 /* disablng interrupts and resetting permission table was done during
901 * vf-close, however, we could get here without going through vf_close
902 */
903 /* Disable Interrupts for VF */
904 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
905
906 /* Reset Permission table */
907 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
908
909 vf->num_rxqs = 0;
910 vf->num_txqs = 0;
911 qed_iov_free_vf_igu_sbs(p_hwfn, p_ptt, vf);
912
913 if (vf->b_init) {
914 vf->b_init = false;
915
916 if (IS_LEAD_HWFN(p_hwfn))
917 p_hwfn->cdev->p_iov_info->num_vfs--;
918 }
919
920 return 0;
921}
922
37bff2b9
YM
923static bool qed_iov_tlv_supported(u16 tlvtype)
924{
925 return CHANNEL_TLV_NONE < tlvtype && tlvtype < CHANNEL_TLV_MAX;
926}
927
928/* place a given tlv on the tlv buffer, continuing current tlv list */
929void *qed_add_tlv(struct qed_hwfn *p_hwfn, u8 **offset, u16 type, u16 length)
930{
931 struct channel_tlv *tl = (struct channel_tlv *)*offset;
932
933 tl->type = type;
934 tl->length = length;
935
936 /* Offset should keep pointing to next TLV (the end of the last) */
937 *offset += length;
938
939 /* Return a pointer to the start of the added tlv */
940 return *offset - length;
941}
942
943/* list the types and lengths of the tlvs on the buffer */
944void qed_dp_tlv_list(struct qed_hwfn *p_hwfn, void *tlvs_list)
945{
946 u16 i = 1, total_length = 0;
947 struct channel_tlv *tlv;
948
949 do {
950 tlv = (struct channel_tlv *)((u8 *)tlvs_list + total_length);
951
952 /* output tlv */
953 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
954 "TLV number %d: type %d, length %d\n",
955 i, tlv->type, tlv->length);
956
957 if (tlv->type == CHANNEL_TLV_LIST_END)
958 return;
959
960 /* Validate entry - protect against malicious VFs */
961 if (!tlv->length) {
962 DP_NOTICE(p_hwfn, "TLV of length 0 found\n");
963 return;
964 }
965
966 total_length += tlv->length;
967
968 if (total_length >= sizeof(struct tlv_buffer_size)) {
969 DP_NOTICE(p_hwfn, "TLV ==> Buffer overflow\n");
970 return;
971 }
972
973 i++;
974 } while (1);
975}
976
977static void qed_iov_send_response(struct qed_hwfn *p_hwfn,
978 struct qed_ptt *p_ptt,
979 struct qed_vf_info *p_vf,
980 u16 length, u8 status)
981{
982 struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
983 struct qed_dmae_params params;
984 u8 eng_vf_id;
985
986 mbx->reply_virt->default_resp.hdr.status = status;
987
988 qed_dp_tlv_list(p_hwfn, mbx->reply_virt);
989
990 eng_vf_id = p_vf->abs_vf_id;
991
992 memset(&params, 0, sizeof(struct qed_dmae_params));
993 params.flags = QED_DMAE_FLAG_VF_DST;
994 params.dst_vfid = eng_vf_id;
995
996 qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys + sizeof(u64),
997 mbx->req_virt->first_tlv.reply_address +
998 sizeof(u64),
999 (sizeof(union pfvf_tlvs) - sizeof(u64)) / 4,
1000 &params);
1001
1002 qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys,
1003 mbx->req_virt->first_tlv.reply_address,
1004 sizeof(u64) / 4, &params);
1005
1006 REG_WR(p_hwfn,
1007 GTT_BAR0_MAP_REG_USDM_RAM +
1008 USTORM_VF_PF_CHANNEL_READY_OFFSET(eng_vf_id), 1);
1009}
1010
dacd88d6
YM
1011static u16 qed_iov_vport_to_tlv(struct qed_hwfn *p_hwfn,
1012 enum qed_iov_vport_update_flag flag)
1013{
1014 switch (flag) {
1015 case QED_IOV_VP_UPDATE_ACTIVATE:
1016 return CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
17b235c1
YM
1017 case QED_IOV_VP_UPDATE_VLAN_STRIP:
1018 return CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
1019 case QED_IOV_VP_UPDATE_TX_SWITCH:
1020 return CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
dacd88d6
YM
1021 case QED_IOV_VP_UPDATE_MCAST:
1022 return CHANNEL_TLV_VPORT_UPDATE_MCAST;
1023 case QED_IOV_VP_UPDATE_ACCEPT_PARAM:
1024 return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
1025 case QED_IOV_VP_UPDATE_RSS:
1026 return CHANNEL_TLV_VPORT_UPDATE_RSS;
17b235c1
YM
1027 case QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN:
1028 return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
1029 case QED_IOV_VP_UPDATE_SGE_TPA:
1030 return CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
dacd88d6
YM
1031 default:
1032 return 0;
1033 }
1034}
1035
1036static u16 qed_iov_prep_vp_update_resp_tlvs(struct qed_hwfn *p_hwfn,
1037 struct qed_vf_info *p_vf,
1038 struct qed_iov_vf_mbx *p_mbx,
1039 u8 status,
1040 u16 tlvs_mask, u16 tlvs_accepted)
1041{
1042 struct pfvf_def_resp_tlv *resp;
1043 u16 size, total_len, i;
1044
1045 memset(p_mbx->reply_virt, 0, sizeof(union pfvf_tlvs));
1046 p_mbx->offset = (u8 *)p_mbx->reply_virt;
1047 size = sizeof(struct pfvf_def_resp_tlv);
1048 total_len = size;
1049
1050 qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_VPORT_UPDATE, size);
1051
1052 /* Prepare response for all extended tlvs if they are found by PF */
1053 for (i = 0; i < QED_IOV_VP_UPDATE_MAX; i++) {
1054 if (!(tlvs_mask & (1 << i)))
1055 continue;
1056
1057 resp = qed_add_tlv(p_hwfn, &p_mbx->offset,
1058 qed_iov_vport_to_tlv(p_hwfn, i), size);
1059
1060 if (tlvs_accepted & (1 << i))
1061 resp->hdr.status = status;
1062 else
1063 resp->hdr.status = PFVF_STATUS_NOT_SUPPORTED;
1064
1065 DP_VERBOSE(p_hwfn,
1066 QED_MSG_IOV,
1067 "VF[%d] - vport_update response: TLV %d, status %02x\n",
1068 p_vf->relative_vf_id,
1069 qed_iov_vport_to_tlv(p_hwfn, i), resp->hdr.status);
1070
1071 total_len += size;
1072 }
1073
1074 qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_LIST_END,
1075 sizeof(struct channel_list_end_tlv));
1076
1077 return total_len;
1078}
1079
37bff2b9
YM
1080static void qed_iov_prepare_resp(struct qed_hwfn *p_hwfn,
1081 struct qed_ptt *p_ptt,
1082 struct qed_vf_info *vf_info,
1083 u16 type, u16 length, u8 status)
1084{
1085 struct qed_iov_vf_mbx *mbx = &vf_info->vf_mbx;
1086
1087 mbx->offset = (u8 *)mbx->reply_virt;
1088
1089 qed_add_tlv(p_hwfn, &mbx->offset, type, length);
1090 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
1091 sizeof(struct channel_list_end_tlv));
1092
1093 qed_iov_send_response(p_hwfn, p_ptt, vf_info, length, status);
1094}
1095
0b55e27d
YM
1096struct qed_public_vf_info *qed_iov_get_public_vf_info(struct qed_hwfn *p_hwfn,
1097 u16 relative_vf_id,
1098 bool b_enabled_only)
1099{
1100 struct qed_vf_info *vf = NULL;
1101
1102 vf = qed_iov_get_vf_info(p_hwfn, relative_vf_id, b_enabled_only);
1103 if (!vf)
1104 return NULL;
1105
1106 return &vf->p_vf_info;
1107}
1108
1109void qed_iov_clean_vf(struct qed_hwfn *p_hwfn, u8 vfid)
1110{
1111 struct qed_public_vf_info *vf_info;
1112
1113 vf_info = qed_iov_get_public_vf_info(p_hwfn, vfid, false);
1114
1115 if (!vf_info)
1116 return;
1117
1118 /* Clear the VF mac */
1119 memset(vf_info->mac, 0, ETH_ALEN);
1120}
1121
1122static void qed_iov_vf_cleanup(struct qed_hwfn *p_hwfn,
1123 struct qed_vf_info *p_vf)
1124{
1125 u32 i;
1126
1127 p_vf->vf_bulletin = 0;
dacd88d6 1128 p_vf->vport_instance = 0;
08feecd7 1129 p_vf->configured_features = 0;
0b55e27d
YM
1130
1131 /* If VF previously requested less resources, go back to default */
1132 p_vf->num_rxqs = p_vf->num_sbs;
1133 p_vf->num_txqs = p_vf->num_sbs;
1134
dacd88d6
YM
1135 p_vf->num_active_rxqs = 0;
1136
0b55e27d
YM
1137 for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++)
1138 p_vf->vf_queues[i].rxq_active = 0;
1139
08feecd7 1140 memset(&p_vf->shadow_config, 0, sizeof(p_vf->shadow_config));
1fe614d1 1141 memset(&p_vf->acquire, 0, sizeof(p_vf->acquire));
0b55e27d
YM
1142 qed_iov_clean_vf(p_hwfn, p_vf->relative_vf_id);
1143}
1144
1cf2b1a9
YM
1145static u8 qed_iov_vf_mbx_acquire_resc(struct qed_hwfn *p_hwfn,
1146 struct qed_ptt *p_ptt,
1147 struct qed_vf_info *p_vf,
1148 struct vf_pf_resc_request *p_req,
1149 struct pf_vf_resc *p_resp)
1150{
1151 int i;
1152
1153 /* Queue related information */
1154 p_resp->num_rxqs = p_vf->num_rxqs;
1155 p_resp->num_txqs = p_vf->num_txqs;
1156 p_resp->num_sbs = p_vf->num_sbs;
1157
1158 for (i = 0; i < p_resp->num_sbs; i++) {
1159 p_resp->hw_sbs[i].hw_sb_id = p_vf->igu_sbs[i];
1160 p_resp->hw_sbs[i].sb_qid = 0;
1161 }
1162
1163 /* These fields are filled for backward compatibility.
1164 * Unused by modern vfs.
1165 */
1166 for (i = 0; i < p_resp->num_rxqs; i++) {
1167 qed_fw_l2_queue(p_hwfn, p_vf->vf_queues[i].fw_rx_qid,
1168 (u16 *)&p_resp->hw_qid[i]);
1169 p_resp->cid[i] = p_vf->vf_queues[i].fw_cid;
1170 }
1171
1172 /* Filter related information */
1173 p_resp->num_mac_filters = min_t(u8, p_vf->num_mac_filters,
1174 p_req->num_mac_filters);
1175 p_resp->num_vlan_filters = min_t(u8, p_vf->num_vlan_filters,
1176 p_req->num_vlan_filters);
1177
1178 /* This isn't really needed/enforced, but some legacy VFs might depend
1179 * on the correct filling of this field.
1180 */
1181 p_resp->num_mc_filters = QED_MAX_MC_ADDRS;
1182
1183 /* Validate sufficient resources for VF */
1184 if (p_resp->num_rxqs < p_req->num_rxqs ||
1185 p_resp->num_txqs < p_req->num_txqs ||
1186 p_resp->num_sbs < p_req->num_sbs ||
1187 p_resp->num_mac_filters < p_req->num_mac_filters ||
1188 p_resp->num_vlan_filters < p_req->num_vlan_filters ||
1189 p_resp->num_mc_filters < p_req->num_mc_filters) {
1190 DP_VERBOSE(p_hwfn,
1191 QED_MSG_IOV,
1192 "VF[%d] - Insufficient resources: rxq [%02x/%02x] txq [%02x/%02x] sbs [%02x/%02x] mac [%02x/%02x] vlan [%02x/%02x] mc [%02x/%02x]\n",
1193 p_vf->abs_vf_id,
1194 p_req->num_rxqs,
1195 p_resp->num_rxqs,
1196 p_req->num_rxqs,
1197 p_resp->num_txqs,
1198 p_req->num_sbs,
1199 p_resp->num_sbs,
1200 p_req->num_mac_filters,
1201 p_resp->num_mac_filters,
1202 p_req->num_vlan_filters,
1203 p_resp->num_vlan_filters,
1204 p_req->num_mc_filters, p_resp->num_mc_filters);
1205 return PFVF_STATUS_NO_RESOURCE;
1206 }
1207
1208 return PFVF_STATUS_SUCCESS;
1209}
1210
1211static void qed_iov_vf_mbx_acquire_stats(struct qed_hwfn *p_hwfn,
1212 struct pfvf_stats_info *p_stats)
1213{
1214 p_stats->mstats.address = PXP_VF_BAR0_START_MSDM_ZONE_B +
1215 offsetof(struct mstorm_vf_zone,
1216 non_trigger.eth_queue_stat);
1217 p_stats->mstats.len = sizeof(struct eth_mstorm_per_queue_stat);
1218 p_stats->ustats.address = PXP_VF_BAR0_START_USDM_ZONE_B +
1219 offsetof(struct ustorm_vf_zone,
1220 non_trigger.eth_queue_stat);
1221 p_stats->ustats.len = sizeof(struct eth_ustorm_per_queue_stat);
1222 p_stats->pstats.address = PXP_VF_BAR0_START_PSDM_ZONE_B +
1223 offsetof(struct pstorm_vf_zone,
1224 non_trigger.eth_queue_stat);
1225 p_stats->pstats.len = sizeof(struct eth_pstorm_per_queue_stat);
1226 p_stats->tstats.address = 0;
1227 p_stats->tstats.len = 0;
1228}
1229
1408cc1f
YM
1230static void qed_iov_vf_mbx_acquire(struct qed_hwfn *p_hwfn,
1231 struct qed_ptt *p_ptt,
1232 struct qed_vf_info *vf)
37bff2b9 1233{
1408cc1f
YM
1234 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1235 struct pfvf_acquire_resp_tlv *resp = &mbx->reply_virt->acquire_resp;
1236 struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
1237 struct vfpf_acquire_tlv *req = &mbx->req_virt->acquire;
1cf2b1a9 1238 u8 vfpf_status = PFVF_STATUS_NOT_SUPPORTED;
1408cc1f 1239 struct pf_vf_resc *resc = &resp->resc;
1fe614d1
YM
1240 int rc;
1241
1242 memset(resp, 0, sizeof(*resp));
1408cc1f
YM
1243
1244 /* Validate FW compatibility */
1fe614d1 1245 if (req->vfdev_info.eth_fp_hsi_major != ETH_HSI_VER_MAJOR) {
1408cc1f 1246 DP_INFO(p_hwfn,
1fe614d1 1247 "VF[%d] needs fastpath HSI %02x.%02x, which is incompatible with loaded FW's faspath HSI %02x.%02x\n",
1408cc1f 1248 vf->abs_vf_id,
1fe614d1
YM
1249 req->vfdev_info.eth_fp_hsi_major,
1250 req->vfdev_info.eth_fp_hsi_minor,
1251 ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
1252
1253 /* Write the PF version so that VF would know which version
1254 * is supported.
1255 */
1256 pfdev_info->major_fp_hsi = ETH_HSI_VER_MAJOR;
1257 pfdev_info->minor_fp_hsi = ETH_HSI_VER_MINOR;
1258
1408cc1f
YM
1259 goto out;
1260 }
1261
1262 /* On 100g PFs, prevent old VFs from loading */
1263 if ((p_hwfn->cdev->num_hwfns > 1) &&
1264 !(req->vfdev_info.capabilities & VFPF_ACQUIRE_CAP_100G)) {
1265 DP_INFO(p_hwfn,
1266 "VF[%d] is running an old driver that doesn't support 100g\n",
1267 vf->abs_vf_id);
1408cc1f
YM
1268 goto out;
1269 }
1270
1fe614d1
YM
1271 /* Store the acquire message */
1272 memcpy(&vf->acquire, req, sizeof(vf->acquire));
1408cc1f 1273
1408cc1f 1274 vf->opaque_fid = req->vfdev_info.opaque_fid;
1408cc1f
YM
1275
1276 vf->vf_bulletin = req->bulletin_addr;
1277 vf->bulletin.size = (vf->bulletin.size < req->bulletin_size) ?
1278 vf->bulletin.size : req->bulletin_size;
1279
1280 /* fill in pfdev info */
1281 pfdev_info->chip_num = p_hwfn->cdev->chip_num;
1282 pfdev_info->db_size = 0;
1283 pfdev_info->indices_per_sb = PIS_PER_SB;
1284
1285 pfdev_info->capabilities = PFVF_ACQUIRE_CAP_DEFAULT_UNTAGGED |
1286 PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE;
1287 if (p_hwfn->cdev->num_hwfns > 1)
1288 pfdev_info->capabilities |= PFVF_ACQUIRE_CAP_100G;
1289
1cf2b1a9 1290 qed_iov_vf_mbx_acquire_stats(p_hwfn, &pfdev_info->stats_info);
1408cc1f
YM
1291
1292 memcpy(pfdev_info->port_mac, p_hwfn->hw_info.hw_mac_addr, ETH_ALEN);
1293
1294 pfdev_info->fw_major = FW_MAJOR_VERSION;
1295 pfdev_info->fw_minor = FW_MINOR_VERSION;
1296 pfdev_info->fw_rev = FW_REVISION_VERSION;
1297 pfdev_info->fw_eng = FW_ENGINEERING_VERSION;
1fe614d1
YM
1298 pfdev_info->minor_fp_hsi = min_t(u8,
1299 ETH_HSI_VER_MINOR,
1300 req->vfdev_info.eth_fp_hsi_minor);
1408cc1f
YM
1301 pfdev_info->os_type = VFPF_ACQUIRE_OS_LINUX;
1302 qed_mcp_get_mfw_ver(p_hwfn, p_ptt, &pfdev_info->mfw_ver, NULL);
1303
1304 pfdev_info->dev_type = p_hwfn->cdev->type;
1305 pfdev_info->chip_rev = p_hwfn->cdev->chip_rev;
1306
1cf2b1a9
YM
1307 /* Fill resources available to VF; Make sure there are enough to
1308 * satisfy the VF's request.
1408cc1f 1309 */
1cf2b1a9
YM
1310 vfpf_status = qed_iov_vf_mbx_acquire_resc(p_hwfn, p_ptt, vf,
1311 &req->resc_request, resc);
1312 if (vfpf_status != PFVF_STATUS_SUCCESS)
1313 goto out;
1408cc1f 1314
1fe614d1
YM
1315 /* Start the VF in FW */
1316 rc = qed_sp_vf_start(p_hwfn, vf);
1317 if (rc) {
1318 DP_NOTICE(p_hwfn, "Failed to start VF[%02x]\n", vf->abs_vf_id);
1319 vfpf_status = PFVF_STATUS_FAILURE;
1320 goto out;
1321 }
1322
1408cc1f
YM
1323 /* Fill agreed size of bulletin board in response */
1324 resp->bulletin_size = vf->bulletin.size;
36558c3d 1325 qed_iov_post_vf_bulletin(p_hwfn, vf->relative_vf_id, p_ptt);
1408cc1f
YM
1326
1327 DP_VERBOSE(p_hwfn,
1328 QED_MSG_IOV,
1329 "VF[%d] ACQUIRE_RESPONSE: pfdev_info- chip_num=0x%x, db_size=%d, idx_per_sb=%d, pf_cap=0x%llx\n"
1330 "resources- n_rxq-%d, n_txq-%d, n_sbs-%d, n_macs-%d, n_vlans-%d\n",
1331 vf->abs_vf_id,
1332 resp->pfdev_info.chip_num,
1333 resp->pfdev_info.db_size,
1334 resp->pfdev_info.indices_per_sb,
1335 resp->pfdev_info.capabilities,
1336 resc->num_rxqs,
1337 resc->num_txqs,
1338 resc->num_sbs,
1339 resc->num_mac_filters,
1340 resc->num_vlan_filters);
1341 vf->state = VF_ACQUIRED;
1342
1343 /* Prepare Response */
1344out:
1345 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_ACQUIRE,
1346 sizeof(struct pfvf_acquire_resp_tlv), vfpf_status);
37bff2b9
YM
1347}
1348
6ddc7608
YM
1349static int __qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn,
1350 struct qed_vf_info *p_vf, bool val)
1351{
1352 struct qed_sp_vport_update_params params;
1353 int rc;
1354
1355 if (val == p_vf->spoof_chk) {
1356 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1357 "Spoofchk value[%d] is already configured\n", val);
1358 return 0;
1359 }
1360
1361 memset(&params, 0, sizeof(struct qed_sp_vport_update_params));
1362 params.opaque_fid = p_vf->opaque_fid;
1363 params.vport_id = p_vf->vport_id;
1364 params.update_anti_spoofing_en_flg = 1;
1365 params.anti_spoofing_en = val;
1366
1367 rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
1368 if (rc) {
1369 p_vf->spoof_chk = val;
1370 p_vf->req_spoofchk_val = p_vf->spoof_chk;
1371 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1372 "Spoofchk val[%d] configured\n", val);
1373 } else {
1374 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1375 "Spoofchk configuration[val:%d] failed for VF[%d]\n",
1376 val, p_vf->relative_vf_id);
1377 }
1378
1379 return rc;
1380}
1381
08feecd7
YM
1382static int qed_iov_reconfigure_unicast_vlan(struct qed_hwfn *p_hwfn,
1383 struct qed_vf_info *p_vf)
1384{
1385 struct qed_filter_ucast filter;
1386 int rc = 0;
1387 int i;
1388
1389 memset(&filter, 0, sizeof(filter));
1390 filter.is_rx_filter = 1;
1391 filter.is_tx_filter = 1;
1392 filter.vport_to_add_to = p_vf->vport_id;
1393 filter.opcode = QED_FILTER_ADD;
1394
1395 /* Reconfigure vlans */
1396 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
1397 if (!p_vf->shadow_config.vlans[i].used)
1398 continue;
1399
1400 filter.type = QED_FILTER_VLAN;
1401 filter.vlan = p_vf->shadow_config.vlans[i].vid;
1402 DP_VERBOSE(p_hwfn,
1403 QED_MSG_IOV,
1404 "Reconfiguring VLAN [0x%04x] for VF [%04x]\n",
1405 filter.vlan, p_vf->relative_vf_id);
1406 rc = qed_sp_eth_filter_ucast(p_hwfn,
1407 p_vf->opaque_fid,
1408 &filter,
1409 QED_SPQ_MODE_CB, NULL);
1410 if (rc) {
1411 DP_NOTICE(p_hwfn,
1412 "Failed to configure VLAN [%04x] to VF [%04x]\n",
1413 filter.vlan, p_vf->relative_vf_id);
1414 break;
1415 }
1416 }
1417
1418 return rc;
1419}
1420
1421static int
1422qed_iov_reconfigure_unicast_shadow(struct qed_hwfn *p_hwfn,
1423 struct qed_vf_info *p_vf, u64 events)
1424{
1425 int rc = 0;
1426
1427 if ((events & (1 << VLAN_ADDR_FORCED)) &&
1428 !(p_vf->configured_features & (1 << VLAN_ADDR_FORCED)))
1429 rc = qed_iov_reconfigure_unicast_vlan(p_hwfn, p_vf);
1430
1431 return rc;
1432}
1433
1434static int qed_iov_configure_vport_forced(struct qed_hwfn *p_hwfn,
1435 struct qed_vf_info *p_vf, u64 events)
1436{
1437 int rc = 0;
1438 struct qed_filter_ucast filter;
1439
1440 if (!p_vf->vport_instance)
1441 return -EINVAL;
1442
eff16960
YM
1443 if (events & (1 << MAC_ADDR_FORCED)) {
1444 /* Since there's no way [currently] of removing the MAC,
1445 * we can always assume this means we need to force it.
1446 */
1447 memset(&filter, 0, sizeof(filter));
1448 filter.type = QED_FILTER_MAC;
1449 filter.opcode = QED_FILTER_REPLACE;
1450 filter.is_rx_filter = 1;
1451 filter.is_tx_filter = 1;
1452 filter.vport_to_add_to = p_vf->vport_id;
1453 ether_addr_copy(filter.mac, p_vf->bulletin.p_virt->mac);
1454
1455 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1456 &filter, QED_SPQ_MODE_CB, NULL);
1457 if (rc) {
1458 DP_NOTICE(p_hwfn,
1459 "PF failed to configure MAC for VF\n");
1460 return rc;
1461 }
1462
1463 p_vf->configured_features |= 1 << MAC_ADDR_FORCED;
1464 }
1465
08feecd7
YM
1466 if (events & (1 << VLAN_ADDR_FORCED)) {
1467 struct qed_sp_vport_update_params vport_update;
1468 u8 removal;
1469 int i;
1470
1471 memset(&filter, 0, sizeof(filter));
1472 filter.type = QED_FILTER_VLAN;
1473 filter.is_rx_filter = 1;
1474 filter.is_tx_filter = 1;
1475 filter.vport_to_add_to = p_vf->vport_id;
1476 filter.vlan = p_vf->bulletin.p_virt->pvid;
1477 filter.opcode = filter.vlan ? QED_FILTER_REPLACE :
1478 QED_FILTER_FLUSH;
1479
1480 /* Send the ramrod */
1481 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1482 &filter, QED_SPQ_MODE_CB, NULL);
1483 if (rc) {
1484 DP_NOTICE(p_hwfn,
1485 "PF failed to configure VLAN for VF\n");
1486 return rc;
1487 }
1488
1489 /* Update the default-vlan & silent vlan stripping */
1490 memset(&vport_update, 0, sizeof(vport_update));
1491 vport_update.opaque_fid = p_vf->opaque_fid;
1492 vport_update.vport_id = p_vf->vport_id;
1493 vport_update.update_default_vlan_enable_flg = 1;
1494 vport_update.default_vlan_enable_flg = filter.vlan ? 1 : 0;
1495 vport_update.update_default_vlan_flg = 1;
1496 vport_update.default_vlan = filter.vlan;
1497
1498 vport_update.update_inner_vlan_removal_flg = 1;
1499 removal = filter.vlan ? 1
1500 : p_vf->shadow_config.inner_vlan_removal;
1501 vport_update.inner_vlan_removal_flg = removal;
1502 vport_update.silent_vlan_removal_flg = filter.vlan ? 1 : 0;
1503 rc = qed_sp_vport_update(p_hwfn,
1504 &vport_update,
1505 QED_SPQ_MODE_EBLOCK, NULL);
1506 if (rc) {
1507 DP_NOTICE(p_hwfn,
1508 "PF failed to configure VF vport for vlan\n");
1509 return rc;
1510 }
1511
1512 /* Update all the Rx queues */
1513 for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) {
1514 u16 qid;
1515
1516 if (!p_vf->vf_queues[i].rxq_active)
1517 continue;
1518
1519 qid = p_vf->vf_queues[i].fw_rx_qid;
1520
1521 rc = qed_sp_eth_rx_queues_update(p_hwfn, qid,
1522 1, 0, 1,
1523 QED_SPQ_MODE_EBLOCK,
1524 NULL);
1525 if (rc) {
1526 DP_NOTICE(p_hwfn,
1527 "Failed to send Rx update fo queue[0x%04x]\n",
1528 qid);
1529 return rc;
1530 }
1531 }
1532
1533 if (filter.vlan)
1534 p_vf->configured_features |= 1 << VLAN_ADDR_FORCED;
1535 else
1536 p_vf->configured_features &= ~(1 << VLAN_ADDR_FORCED);
1537 }
1538
1539 /* If forced features are terminated, we need to configure the shadow
1540 * configuration back again.
1541 */
1542 if (events)
1543 qed_iov_reconfigure_unicast_shadow(p_hwfn, p_vf, events);
1544
1545 return rc;
1546}
1547
dacd88d6
YM
1548static void qed_iov_vf_mbx_start_vport(struct qed_hwfn *p_hwfn,
1549 struct qed_ptt *p_ptt,
1550 struct qed_vf_info *vf)
1551{
1552 struct qed_sp_vport_start_params params = { 0 };
1553 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1554 struct vfpf_vport_start_tlv *start;
1555 u8 status = PFVF_STATUS_SUCCESS;
1556 struct qed_vf_info *vf_info;
08feecd7 1557 u64 *p_bitmap;
dacd88d6
YM
1558 int sb_id;
1559 int rc;
1560
1561 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vf->relative_vf_id, true);
1562 if (!vf_info) {
1563 DP_NOTICE(p_hwfn->cdev,
1564 "Failed to get VF info, invalid vfid [%d]\n",
1565 vf->relative_vf_id);
1566 return;
1567 }
1568
1569 vf->state = VF_ENABLED;
1570 start = &mbx->req_virt->start_vport;
1571
1572 /* Initialize Status block in CAU */
1573 for (sb_id = 0; sb_id < vf->num_sbs; sb_id++) {
1574 if (!start->sb_addr[sb_id]) {
1575 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1576 "VF[%d] did not fill the address of SB %d\n",
1577 vf->relative_vf_id, sb_id);
1578 break;
1579 }
1580
1581 qed_int_cau_conf_sb(p_hwfn, p_ptt,
1582 start->sb_addr[sb_id],
1583 vf->igu_sbs[sb_id],
1584 vf->abs_vf_id, 1);
1585 }
1586 qed_iov_enable_vf_traffic(p_hwfn, p_ptt, vf);
1587
1588 vf->mtu = start->mtu;
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1589 vf->shadow_config.inner_vlan_removal = start->inner_vlan_removal;
1590
1591 /* Take into consideration configuration forced by hypervisor;
1592 * If none is configured, use the supplied VF values [for old
1593 * vfs that would still be fine, since they passed '0' as padding].
1594 */
1595 p_bitmap = &vf_info->bulletin.p_virt->valid_bitmap;
1596 if (!(*p_bitmap & (1 << VFPF_BULLETIN_UNTAGGED_DEFAULT_FORCED))) {
1597 u8 vf_req = start->only_untagged;
1598
1599 vf_info->bulletin.p_virt->default_only_untagged = vf_req;
1600 *p_bitmap |= 1 << VFPF_BULLETIN_UNTAGGED_DEFAULT;
1601 }
dacd88d6
YM
1602
1603 params.tpa_mode = start->tpa_mode;
1604 params.remove_inner_vlan = start->inner_vlan_removal;
831bfb0e 1605 params.tx_switching = true;
dacd88d6 1606
08feecd7 1607 params.only_untagged = vf_info->bulletin.p_virt->default_only_untagged;
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YM
1608 params.drop_ttl0 = false;
1609 params.concrete_fid = vf->concrete_fid;
1610 params.opaque_fid = vf->opaque_fid;
1611 params.vport_id = vf->vport_id;
1612 params.max_buffers_per_cqe = start->max_buffers_per_cqe;
1613 params.mtu = vf->mtu;
1614
1615 rc = qed_sp_eth_vport_start(p_hwfn, &params);
1616 if (rc != 0) {
1617 DP_ERR(p_hwfn,
1618 "qed_iov_vf_mbx_start_vport returned error %d\n", rc);
1619 status = PFVF_STATUS_FAILURE;
1620 } else {
1621 vf->vport_instance++;
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YM
1622
1623 /* Force configuration if needed on the newly opened vport */
1624 qed_iov_configure_vport_forced(p_hwfn, vf, *p_bitmap);
6ddc7608
YM
1625
1626 __qed_iov_spoofchk_set(p_hwfn, vf, vf->req_spoofchk_val);
dacd88d6
YM
1627 }
1628 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_START,
1629 sizeof(struct pfvf_def_resp_tlv), status);
1630}
1631
1632static void qed_iov_vf_mbx_stop_vport(struct qed_hwfn *p_hwfn,
1633 struct qed_ptt *p_ptt,
1634 struct qed_vf_info *vf)
1635{
1636 u8 status = PFVF_STATUS_SUCCESS;
1637 int rc;
1638
1639 vf->vport_instance--;
6ddc7608 1640 vf->spoof_chk = false;
dacd88d6
YM
1641
1642 rc = qed_sp_vport_stop(p_hwfn, vf->opaque_fid, vf->vport_id);
1643 if (rc != 0) {
1644 DP_ERR(p_hwfn, "qed_iov_vf_mbx_stop_vport returned error %d\n",
1645 rc);
1646 status = PFVF_STATUS_FAILURE;
1647 }
1648
08feecd7
YM
1649 /* Forget the configuration on the vport */
1650 vf->configured_features = 0;
1651 memset(&vf->shadow_config, 0, sizeof(vf->shadow_config));
1652
dacd88d6
YM
1653 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_TEARDOWN,
1654 sizeof(struct pfvf_def_resp_tlv), status);
1655}
1656
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YM
1657static void qed_iov_vf_mbx_start_rxq_resp(struct qed_hwfn *p_hwfn,
1658 struct qed_ptt *p_ptt,
1659 struct qed_vf_info *vf, u8 status)
1660{
1661 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1662 struct pfvf_start_queue_resp_tlv *p_tlv;
1663 struct vfpf_start_rxq_tlv *req;
1664
1665 mbx->offset = (u8 *)mbx->reply_virt;
1666
1667 p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_RXQ,
1668 sizeof(*p_tlv));
1669 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
1670 sizeof(struct channel_list_end_tlv));
1671
1672 /* Update the TLV with the response */
1673 if (status == PFVF_STATUS_SUCCESS) {
dacd88d6 1674 req = &mbx->req_virt->start_rxq;
351a4ded
YM
1675 p_tlv->offset = PXP_VF_BAR0_START_MSDM_ZONE_B +
1676 offsetof(struct mstorm_vf_zone,
1677 non_trigger.eth_rx_queue_producers) +
1678 sizeof(struct eth_rx_prod_data) * req->rx_qid;
dacd88d6
YM
1679 }
1680
1681 qed_iov_send_response(p_hwfn, p_ptt, vf, sizeof(*p_tlv), status);
1682}
1683
1684static void qed_iov_vf_mbx_start_rxq(struct qed_hwfn *p_hwfn,
1685 struct qed_ptt *p_ptt,
1686 struct qed_vf_info *vf)
1687{
1688 struct qed_queue_start_common_params params;
1689 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1690 u8 status = PFVF_STATUS_SUCCESS;
1691 struct vfpf_start_rxq_tlv *req;
1692 int rc;
1693
1694 memset(&params, 0, sizeof(params));
1695 req = &mbx->req_virt->start_rxq;
1696 params.queue_id = vf->vf_queues[req->rx_qid].fw_rx_qid;
351a4ded 1697 params.vf_qid = req->rx_qid;
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YM
1698 params.vport_id = vf->vport_id;
1699 params.sb = req->hw_sb;
1700 params.sb_idx = req->sb_index;
1701
1702 rc = qed_sp_eth_rxq_start_ramrod(p_hwfn, vf->opaque_fid,
1703 vf->vf_queues[req->rx_qid].fw_cid,
1704 &params,
1705 vf->abs_vf_id + 0x10,
1706 req->bd_max_bytes,
1707 req->rxq_addr,
1708 req->cqe_pbl_addr, req->cqe_pbl_size);
1709
1710 if (rc) {
1711 status = PFVF_STATUS_FAILURE;
1712 } else {
1713 vf->vf_queues[req->rx_qid].rxq_active = true;
1714 vf->num_active_rxqs++;
1715 }
1716
1717 qed_iov_vf_mbx_start_rxq_resp(p_hwfn, p_ptt, vf, status);
1718}
1719
1720static void qed_iov_vf_mbx_start_txq(struct qed_hwfn *p_hwfn,
1721 struct qed_ptt *p_ptt,
1722 struct qed_vf_info *vf)
1723{
1724 u16 length = sizeof(struct pfvf_def_resp_tlv);
1725 struct qed_queue_start_common_params params;
1726 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1727 union qed_qm_pq_params pq_params;
1728 u8 status = PFVF_STATUS_SUCCESS;
1729 struct vfpf_start_txq_tlv *req;
1730 int rc;
1731
1732 /* Prepare the parameters which would choose the right PQ */
1733 memset(&pq_params, 0, sizeof(pq_params));
1734 pq_params.eth.is_vf = 1;
1735 pq_params.eth.vf_id = vf->relative_vf_id;
1736
1737 memset(&params, 0, sizeof(params));
1738 req = &mbx->req_virt->start_txq;
1739 params.queue_id = vf->vf_queues[req->tx_qid].fw_tx_qid;
1740 params.vport_id = vf->vport_id;
1741 params.sb = req->hw_sb;
1742 params.sb_idx = req->sb_index;
1743
1744 rc = qed_sp_eth_txq_start_ramrod(p_hwfn,
1745 vf->opaque_fid,
1746 vf->vf_queues[req->tx_qid].fw_cid,
1747 &params,
1748 vf->abs_vf_id + 0x10,
1749 req->pbl_addr,
1750 req->pbl_size, &pq_params);
1751
1752 if (rc)
1753 status = PFVF_STATUS_FAILURE;
1754 else
1755 vf->vf_queues[req->tx_qid].txq_active = true;
1756
1757 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_START_TXQ,
1758 length, status);
1759}
1760
1761static int qed_iov_vf_stop_rxqs(struct qed_hwfn *p_hwfn,
1762 struct qed_vf_info *vf,
1763 u16 rxq_id, u8 num_rxqs, bool cqe_completion)
1764{
1765 int rc = 0;
1766 int qid;
1767
1768 if (rxq_id + num_rxqs > ARRAY_SIZE(vf->vf_queues))
1769 return -EINVAL;
1770
1771 for (qid = rxq_id; qid < rxq_id + num_rxqs; qid++) {
1772 if (vf->vf_queues[qid].rxq_active) {
1773 rc = qed_sp_eth_rx_queue_stop(p_hwfn,
1774 vf->vf_queues[qid].
1775 fw_rx_qid, false,
1776 cqe_completion);
1777
1778 if (rc)
1779 return rc;
1780 }
1781 vf->vf_queues[qid].rxq_active = false;
1782 vf->num_active_rxqs--;
1783 }
1784
1785 return rc;
1786}
1787
1788static int qed_iov_vf_stop_txqs(struct qed_hwfn *p_hwfn,
1789 struct qed_vf_info *vf, u16 txq_id, u8 num_txqs)
1790{
1791 int rc = 0;
1792 int qid;
1793
1794 if (txq_id + num_txqs > ARRAY_SIZE(vf->vf_queues))
1795 return -EINVAL;
1796
1797 for (qid = txq_id; qid < txq_id + num_txqs; qid++) {
1798 if (vf->vf_queues[qid].txq_active) {
1799 rc = qed_sp_eth_tx_queue_stop(p_hwfn,
1800 vf->vf_queues[qid].
1801 fw_tx_qid);
1802
1803 if (rc)
1804 return rc;
1805 }
1806 vf->vf_queues[qid].txq_active = false;
1807 }
1808 return rc;
1809}
1810
1811static void qed_iov_vf_mbx_stop_rxqs(struct qed_hwfn *p_hwfn,
1812 struct qed_ptt *p_ptt,
1813 struct qed_vf_info *vf)
1814{
1815 u16 length = sizeof(struct pfvf_def_resp_tlv);
1816 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1817 u8 status = PFVF_STATUS_SUCCESS;
1818 struct vfpf_stop_rxqs_tlv *req;
1819 int rc;
1820
1821 /* We give the option of starting from qid != 0, in this case we
1822 * need to make sure that qid + num_qs doesn't exceed the actual
1823 * amount of queues that exist.
1824 */
1825 req = &mbx->req_virt->stop_rxqs;
1826 rc = qed_iov_vf_stop_rxqs(p_hwfn, vf, req->rx_qid,
1827 req->num_rxqs, req->cqe_completion);
1828 if (rc)
1829 status = PFVF_STATUS_FAILURE;
1830
1831 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_RXQS,
1832 length, status);
1833}
1834
1835static void qed_iov_vf_mbx_stop_txqs(struct qed_hwfn *p_hwfn,
1836 struct qed_ptt *p_ptt,
1837 struct qed_vf_info *vf)
1838{
1839 u16 length = sizeof(struct pfvf_def_resp_tlv);
1840 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1841 u8 status = PFVF_STATUS_SUCCESS;
1842 struct vfpf_stop_txqs_tlv *req;
1843 int rc;
1844
1845 /* We give the option of starting from qid != 0, in this case we
1846 * need to make sure that qid + num_qs doesn't exceed the actual
1847 * amount of queues that exist.
1848 */
1849 req = &mbx->req_virt->stop_txqs;
1850 rc = qed_iov_vf_stop_txqs(p_hwfn, vf, req->tx_qid, req->num_txqs);
1851 if (rc)
1852 status = PFVF_STATUS_FAILURE;
1853
1854 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_TXQS,
1855 length, status);
1856}
1857
17b235c1
YM
1858static void qed_iov_vf_mbx_update_rxqs(struct qed_hwfn *p_hwfn,
1859 struct qed_ptt *p_ptt,
1860 struct qed_vf_info *vf)
1861{
1862 u16 length = sizeof(struct pfvf_def_resp_tlv);
1863 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1864 struct vfpf_update_rxq_tlv *req;
1865 u8 status = PFVF_STATUS_SUCCESS;
1866 u8 complete_event_flg;
1867 u8 complete_cqe_flg;
1868 u16 qid;
1869 int rc;
1870 u8 i;
1871
1872 req = &mbx->req_virt->update_rxq;
1873 complete_cqe_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_CQE_FLAG);
1874 complete_event_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG);
1875
1876 for (i = 0; i < req->num_rxqs; i++) {
1877 qid = req->rx_qid + i;
1878
1879 if (!vf->vf_queues[qid].rxq_active) {
1880 DP_NOTICE(p_hwfn, "VF rx_qid = %d isn`t active!\n",
1881 qid);
1882 status = PFVF_STATUS_FAILURE;
1883 break;
1884 }
1885
1886 rc = qed_sp_eth_rx_queues_update(p_hwfn,
1887 vf->vf_queues[qid].fw_rx_qid,
1888 1,
1889 complete_cqe_flg,
1890 complete_event_flg,
1891 QED_SPQ_MODE_EBLOCK, NULL);
1892
1893 if (rc) {
1894 status = PFVF_STATUS_FAILURE;
1895 break;
1896 }
1897 }
1898
1899 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UPDATE_RXQ,
1900 length, status);
1901}
1902
dacd88d6
YM
1903void *qed_iov_search_list_tlvs(struct qed_hwfn *p_hwfn,
1904 void *p_tlvs_list, u16 req_type)
1905{
1906 struct channel_tlv *p_tlv = (struct channel_tlv *)p_tlvs_list;
1907 int len = 0;
1908
1909 do {
1910 if (!p_tlv->length) {
1911 DP_NOTICE(p_hwfn, "Zero length TLV found\n");
1912 return NULL;
1913 }
1914
1915 if (p_tlv->type == req_type) {
1916 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1917 "Extended tlv type %d, length %d found\n",
1918 p_tlv->type, p_tlv->length);
1919 return p_tlv;
1920 }
1921
1922 len += p_tlv->length;
1923 p_tlv = (struct channel_tlv *)((u8 *)p_tlv + p_tlv->length);
1924
1925 if ((len + p_tlv->length) > TLV_BUFFER_SIZE) {
1926 DP_NOTICE(p_hwfn, "TLVs has overrun the buffer size\n");
1927 return NULL;
1928 }
1929 } while (p_tlv->type != CHANNEL_TLV_LIST_END);
1930
1931 return NULL;
1932}
1933
1934static void
1935qed_iov_vp_update_act_param(struct qed_hwfn *p_hwfn,
1936 struct qed_sp_vport_update_params *p_data,
1937 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
1938{
1939 struct vfpf_vport_update_activate_tlv *p_act_tlv;
1940 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
1941
1942 p_act_tlv = (struct vfpf_vport_update_activate_tlv *)
1943 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
1944 if (!p_act_tlv)
1945 return;
1946
1947 p_data->update_vport_active_rx_flg = p_act_tlv->update_rx;
1948 p_data->vport_active_rx_flg = p_act_tlv->active_rx;
1949 p_data->update_vport_active_tx_flg = p_act_tlv->update_tx;
1950 p_data->vport_active_tx_flg = p_act_tlv->active_tx;
1951 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACTIVATE;
1952}
1953
17b235c1
YM
1954static void
1955qed_iov_vp_update_vlan_param(struct qed_hwfn *p_hwfn,
1956 struct qed_sp_vport_update_params *p_data,
1957 struct qed_vf_info *p_vf,
1958 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
1959{
1960 struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
1961 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
1962
1963 p_vlan_tlv = (struct vfpf_vport_update_vlan_strip_tlv *)
1964 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
1965 if (!p_vlan_tlv)
1966 return;
1967
08feecd7
YM
1968 p_vf->shadow_config.inner_vlan_removal = p_vlan_tlv->remove_vlan;
1969
1970 /* Ignore the VF request if we're forcing a vlan */
1971 if (!(p_vf->configured_features & (1 << VLAN_ADDR_FORCED))) {
1972 p_data->update_inner_vlan_removal_flg = 1;
1973 p_data->inner_vlan_removal_flg = p_vlan_tlv->remove_vlan;
1974 }
17b235c1
YM
1975
1976 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_VLAN_STRIP;
1977}
1978
1979static void
1980qed_iov_vp_update_tx_switch(struct qed_hwfn *p_hwfn,
1981 struct qed_sp_vport_update_params *p_data,
1982 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
1983{
1984 struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
1985 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
1986
1987 p_tx_switch_tlv = (struct vfpf_vport_update_tx_switch_tlv *)
1988 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
1989 tlv);
1990 if (!p_tx_switch_tlv)
1991 return;
1992
1993 p_data->update_tx_switching_flg = 1;
1994 p_data->tx_switching_flg = p_tx_switch_tlv->tx_switching;
1995 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_TX_SWITCH;
1996}
1997
dacd88d6
YM
1998static void
1999qed_iov_vp_update_mcast_bin_param(struct qed_hwfn *p_hwfn,
2000 struct qed_sp_vport_update_params *p_data,
2001 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2002{
2003 struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
2004 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_MCAST;
2005
2006 p_mcast_tlv = (struct vfpf_vport_update_mcast_bin_tlv *)
2007 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2008 if (!p_mcast_tlv)
2009 return;
2010
2011 p_data->update_approx_mcast_flg = 1;
2012 memcpy(p_data->bins, p_mcast_tlv->bins,
2013 sizeof(unsigned long) * ETH_MULTICAST_MAC_BINS_IN_REGS);
2014 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_MCAST;
2015}
2016
2017static void
2018qed_iov_vp_update_accept_flag(struct qed_hwfn *p_hwfn,
2019 struct qed_sp_vport_update_params *p_data,
2020 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2021{
2022 struct qed_filter_accept_flags *p_flags = &p_data->accept_flags;
2023 struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
2024 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
2025
2026 p_accept_tlv = (struct vfpf_vport_update_accept_param_tlv *)
2027 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2028 if (!p_accept_tlv)
2029 return;
2030
2031 p_flags->update_rx_mode_config = p_accept_tlv->update_rx_mode;
2032 p_flags->rx_accept_filter = p_accept_tlv->rx_accept_filter;
2033 p_flags->update_tx_mode_config = p_accept_tlv->update_tx_mode;
2034 p_flags->tx_accept_filter = p_accept_tlv->tx_accept_filter;
2035 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_PARAM;
2036}
2037
17b235c1
YM
2038static void
2039qed_iov_vp_update_accept_any_vlan(struct qed_hwfn *p_hwfn,
2040 struct qed_sp_vport_update_params *p_data,
2041 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2042{
2043 struct vfpf_vport_update_accept_any_vlan_tlv *p_accept_any_vlan;
2044 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
2045
2046 p_accept_any_vlan = (struct vfpf_vport_update_accept_any_vlan_tlv *)
2047 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
2048 tlv);
2049 if (!p_accept_any_vlan)
2050 return;
2051
2052 p_data->accept_any_vlan = p_accept_any_vlan->accept_any_vlan;
2053 p_data->update_accept_any_vlan_flg =
2054 p_accept_any_vlan->update_accept_any_vlan_flg;
2055 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN;
2056}
2057
dacd88d6
YM
2058static void
2059qed_iov_vp_update_rss_param(struct qed_hwfn *p_hwfn,
2060 struct qed_vf_info *vf,
2061 struct qed_sp_vport_update_params *p_data,
2062 struct qed_rss_params *p_rss,
2063 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2064{
2065 struct vfpf_vport_update_rss_tlv *p_rss_tlv;
2066 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_RSS;
2067 u16 i, q_idx, max_q_idx;
2068 u16 table_size;
2069
2070 p_rss_tlv = (struct vfpf_vport_update_rss_tlv *)
2071 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2072 if (!p_rss_tlv) {
2073 p_data->rss_params = NULL;
2074 return;
2075 }
2076
2077 memset(p_rss, 0, sizeof(struct qed_rss_params));
2078
2079 p_rss->update_rss_config = !!(p_rss_tlv->update_rss_flags &
2080 VFPF_UPDATE_RSS_CONFIG_FLAG);
2081 p_rss->update_rss_capabilities = !!(p_rss_tlv->update_rss_flags &
2082 VFPF_UPDATE_RSS_CAPS_FLAG);
2083 p_rss->update_rss_ind_table = !!(p_rss_tlv->update_rss_flags &
2084 VFPF_UPDATE_RSS_IND_TABLE_FLAG);
2085 p_rss->update_rss_key = !!(p_rss_tlv->update_rss_flags &
2086 VFPF_UPDATE_RSS_KEY_FLAG);
2087
2088 p_rss->rss_enable = p_rss_tlv->rss_enable;
2089 p_rss->rss_eng_id = vf->relative_vf_id + 1;
2090 p_rss->rss_caps = p_rss_tlv->rss_caps;
2091 p_rss->rss_table_size_log = p_rss_tlv->rss_table_size_log;
2092 memcpy(p_rss->rss_ind_table, p_rss_tlv->rss_ind_table,
2093 sizeof(p_rss->rss_ind_table));
2094 memcpy(p_rss->rss_key, p_rss_tlv->rss_key, sizeof(p_rss->rss_key));
2095
2096 table_size = min_t(u16, ARRAY_SIZE(p_rss->rss_ind_table),
2097 (1 << p_rss_tlv->rss_table_size_log));
2098
2099 max_q_idx = ARRAY_SIZE(vf->vf_queues);
2100
2101 for (i = 0; i < table_size; i++) {
2102 u16 index = vf->vf_queues[0].fw_rx_qid;
2103
2104 q_idx = p_rss->rss_ind_table[i];
2105 if (q_idx >= max_q_idx)
2106 DP_NOTICE(p_hwfn,
2107 "rss_ind_table[%d] = %d, rxq is out of range\n",
2108 i, q_idx);
2109 else if (!vf->vf_queues[q_idx].rxq_active)
2110 DP_NOTICE(p_hwfn,
2111 "rss_ind_table[%d] = %d, rxq is not active\n",
2112 i, q_idx);
2113 else
2114 index = vf->vf_queues[q_idx].fw_rx_qid;
2115 p_rss->rss_ind_table[i] = index;
2116 }
2117
2118 p_data->rss_params = p_rss;
2119 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_RSS;
2120}
2121
17b235c1
YM
2122static void
2123qed_iov_vp_update_sge_tpa_param(struct qed_hwfn *p_hwfn,
2124 struct qed_vf_info *vf,
2125 struct qed_sp_vport_update_params *p_data,
2126 struct qed_sge_tpa_params *p_sge_tpa,
2127 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2128{
2129 struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
2130 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
2131
2132 p_sge_tpa_tlv = (struct vfpf_vport_update_sge_tpa_tlv *)
2133 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2134
2135 if (!p_sge_tpa_tlv) {
2136 p_data->sge_tpa_params = NULL;
2137 return;
2138 }
2139
2140 memset(p_sge_tpa, 0, sizeof(struct qed_sge_tpa_params));
2141
2142 p_sge_tpa->update_tpa_en_flg =
2143 !!(p_sge_tpa_tlv->update_sge_tpa_flags & VFPF_UPDATE_TPA_EN_FLAG);
2144 p_sge_tpa->update_tpa_param_flg =
2145 !!(p_sge_tpa_tlv->update_sge_tpa_flags &
2146 VFPF_UPDATE_TPA_PARAM_FLAG);
2147
2148 p_sge_tpa->tpa_ipv4_en_flg =
2149 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV4_EN_FLAG);
2150 p_sge_tpa->tpa_ipv6_en_flg =
2151 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV6_EN_FLAG);
2152 p_sge_tpa->tpa_pkt_split_flg =
2153 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_PKT_SPLIT_FLAG);
2154 p_sge_tpa->tpa_hdr_data_split_flg =
2155 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_HDR_DATA_SPLIT_FLAG);
2156 p_sge_tpa->tpa_gro_consistent_flg =
2157 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_GRO_CONSIST_FLAG);
2158
2159 p_sge_tpa->tpa_max_aggs_num = p_sge_tpa_tlv->tpa_max_aggs_num;
2160 p_sge_tpa->tpa_max_size = p_sge_tpa_tlv->tpa_max_size;
2161 p_sge_tpa->tpa_min_size_to_start = p_sge_tpa_tlv->tpa_min_size_to_start;
2162 p_sge_tpa->tpa_min_size_to_cont = p_sge_tpa_tlv->tpa_min_size_to_cont;
2163 p_sge_tpa->max_buffers_per_cqe = p_sge_tpa_tlv->max_buffers_per_cqe;
2164
2165 p_data->sge_tpa_params = p_sge_tpa;
2166
2167 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_SGE_TPA;
2168}
2169
dacd88d6
YM
2170static void qed_iov_vf_mbx_vport_update(struct qed_hwfn *p_hwfn,
2171 struct qed_ptt *p_ptt,
2172 struct qed_vf_info *vf)
2173{
2174 struct qed_sp_vport_update_params params;
2175 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
17b235c1 2176 struct qed_sge_tpa_params sge_tpa_params;
dacd88d6
YM
2177 struct qed_rss_params rss_params;
2178 u8 status = PFVF_STATUS_SUCCESS;
2179 u16 tlvs_mask = 0;
2180 u16 length;
2181 int rc;
2182
2183 memset(&params, 0, sizeof(params));
2184 params.opaque_fid = vf->opaque_fid;
2185 params.vport_id = vf->vport_id;
2186 params.rss_params = NULL;
2187
2188 /* Search for extended tlvs list and update values
2189 * from VF in struct qed_sp_vport_update_params.
2190 */
2191 qed_iov_vp_update_act_param(p_hwfn, &params, mbx, &tlvs_mask);
17b235c1
YM
2192 qed_iov_vp_update_vlan_param(p_hwfn, &params, vf, mbx, &tlvs_mask);
2193 qed_iov_vp_update_tx_switch(p_hwfn, &params, mbx, &tlvs_mask);
dacd88d6
YM
2194 qed_iov_vp_update_mcast_bin_param(p_hwfn, &params, mbx, &tlvs_mask);
2195 qed_iov_vp_update_accept_flag(p_hwfn, &params, mbx, &tlvs_mask);
2196 qed_iov_vp_update_rss_param(p_hwfn, vf, &params, &rss_params,
2197 mbx, &tlvs_mask);
17b235c1
YM
2198 qed_iov_vp_update_accept_any_vlan(p_hwfn, &params, mbx, &tlvs_mask);
2199 qed_iov_vp_update_sge_tpa_param(p_hwfn, vf, &params,
2200 &sge_tpa_params, mbx, &tlvs_mask);
dacd88d6
YM
2201
2202 /* Just log a message if there is no single extended tlv in buffer.
2203 * When all features of vport update ramrod would be requested by VF
2204 * as extended TLVs in buffer then an error can be returned in response
2205 * if there is no extended TLV present in buffer.
2206 */
2207 if (!tlvs_mask) {
2208 DP_NOTICE(p_hwfn,
2209 "No feature tlvs found for vport update\n");
2210 status = PFVF_STATUS_NOT_SUPPORTED;
2211 goto out;
2212 }
2213
2214 rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
2215
2216 if (rc)
2217 status = PFVF_STATUS_FAILURE;
2218
2219out:
2220 length = qed_iov_prep_vp_update_resp_tlvs(p_hwfn, vf, mbx, status,
2221 tlvs_mask, tlvs_mask);
2222 qed_iov_send_response(p_hwfn, p_ptt, vf, length, status);
2223}
2224
08feecd7
YM
2225static int qed_iov_vf_update_unicast_shadow(struct qed_hwfn *p_hwfn,
2226 struct qed_vf_info *p_vf,
2227 struct qed_filter_ucast *p_params)
2228{
2229 int i;
2230
2231 if (p_params->type == QED_FILTER_MAC)
2232 return 0;
2233
2234 /* First remove entries and then add new ones */
2235 if (p_params->opcode == QED_FILTER_REMOVE) {
2236 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
2237 if (p_vf->shadow_config.vlans[i].used &&
2238 p_vf->shadow_config.vlans[i].vid ==
2239 p_params->vlan) {
2240 p_vf->shadow_config.vlans[i].used = false;
2241 break;
2242 }
2243 if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
2244 DP_VERBOSE(p_hwfn,
2245 QED_MSG_IOV,
2246 "VF [%d] - Tries to remove a non-existing vlan\n",
2247 p_vf->relative_vf_id);
2248 return -EINVAL;
2249 }
2250 } else if (p_params->opcode == QED_FILTER_REPLACE ||
2251 p_params->opcode == QED_FILTER_FLUSH) {
2252 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
2253 p_vf->shadow_config.vlans[i].used = false;
2254 }
2255
2256 /* In forced mode, we're willing to remove entries - but we don't add
2257 * new ones.
2258 */
2259 if (p_vf->bulletin.p_virt->valid_bitmap & (1 << VLAN_ADDR_FORCED))
2260 return 0;
2261
2262 if (p_params->opcode == QED_FILTER_ADD ||
2263 p_params->opcode == QED_FILTER_REPLACE) {
2264 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
2265 if (p_vf->shadow_config.vlans[i].used)
2266 continue;
2267
2268 p_vf->shadow_config.vlans[i].used = true;
2269 p_vf->shadow_config.vlans[i].vid = p_params->vlan;
2270 break;
2271 }
2272
2273 if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
2274 DP_VERBOSE(p_hwfn,
2275 QED_MSG_IOV,
2276 "VF [%d] - Tries to configure more than %d vlan filters\n",
2277 p_vf->relative_vf_id,
2278 QED_ETH_VF_NUM_VLAN_FILTERS + 1);
2279 return -EINVAL;
2280 }
2281 }
2282
2283 return 0;
2284}
2285
dacd88d6
YM
2286int qed_iov_chk_ucast(struct qed_hwfn *hwfn,
2287 int vfid, struct qed_filter_ucast *params)
2288{
2289 struct qed_public_vf_info *vf;
2290
2291 vf = qed_iov_get_public_vf_info(hwfn, vfid, true);
2292 if (!vf)
2293 return -EINVAL;
2294
2295 /* No real decision to make; Store the configured MAC */
2296 if (params->type == QED_FILTER_MAC ||
2297 params->type == QED_FILTER_MAC_VLAN)
2298 ether_addr_copy(vf->mac, params->mac);
2299
2300 return 0;
2301}
2302
2303static void qed_iov_vf_mbx_ucast_filter(struct qed_hwfn *p_hwfn,
2304 struct qed_ptt *p_ptt,
2305 struct qed_vf_info *vf)
2306{
08feecd7 2307 struct qed_bulletin_content *p_bulletin = vf->bulletin.p_virt;
dacd88d6
YM
2308 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
2309 struct vfpf_ucast_filter_tlv *req;
2310 u8 status = PFVF_STATUS_SUCCESS;
2311 struct qed_filter_ucast params;
2312 int rc;
2313
2314 /* Prepare the unicast filter params */
2315 memset(&params, 0, sizeof(struct qed_filter_ucast));
2316 req = &mbx->req_virt->ucast_filter;
2317 params.opcode = (enum qed_filter_opcode)req->opcode;
2318 params.type = (enum qed_filter_ucast_type)req->type;
2319
2320 params.is_rx_filter = 1;
2321 params.is_tx_filter = 1;
2322 params.vport_to_remove_from = vf->vport_id;
2323 params.vport_to_add_to = vf->vport_id;
2324 memcpy(params.mac, req->mac, ETH_ALEN);
2325 params.vlan = req->vlan;
2326
2327 DP_VERBOSE(p_hwfn,
2328 QED_MSG_IOV,
2329 "VF[%d]: opcode 0x%02x type 0x%02x [%s %s] [vport 0x%02x] MAC %02x:%02x:%02x:%02x:%02x:%02x, vlan 0x%04x\n",
2330 vf->abs_vf_id, params.opcode, params.type,
2331 params.is_rx_filter ? "RX" : "",
2332 params.is_tx_filter ? "TX" : "",
2333 params.vport_to_add_to,
2334 params.mac[0], params.mac[1],
2335 params.mac[2], params.mac[3],
2336 params.mac[4], params.mac[5], params.vlan);
2337
2338 if (!vf->vport_instance) {
2339 DP_VERBOSE(p_hwfn,
2340 QED_MSG_IOV,
2341 "No VPORT instance available for VF[%d], failing ucast MAC configuration\n",
2342 vf->abs_vf_id);
2343 status = PFVF_STATUS_FAILURE;
2344 goto out;
2345 }
2346
08feecd7
YM
2347 /* Update shadow copy of the VF configuration */
2348 if (qed_iov_vf_update_unicast_shadow(p_hwfn, vf, &params)) {
2349 status = PFVF_STATUS_FAILURE;
2350 goto out;
2351 }
2352
2353 /* Determine if the unicast filtering is acceptible by PF */
2354 if ((p_bulletin->valid_bitmap & (1 << VLAN_ADDR_FORCED)) &&
2355 (params.type == QED_FILTER_VLAN ||
2356 params.type == QED_FILTER_MAC_VLAN)) {
2357 /* Once VLAN is forced or PVID is set, do not allow
2358 * to add/replace any further VLANs.
2359 */
2360 if (params.opcode == QED_FILTER_ADD ||
2361 params.opcode == QED_FILTER_REPLACE)
2362 status = PFVF_STATUS_FORCED;
2363 goto out;
2364 }
2365
eff16960
YM
2366 if ((p_bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)) &&
2367 (params.type == QED_FILTER_MAC ||
2368 params.type == QED_FILTER_MAC_VLAN)) {
2369 if (!ether_addr_equal(p_bulletin->mac, params.mac) ||
2370 (params.opcode != QED_FILTER_ADD &&
2371 params.opcode != QED_FILTER_REPLACE))
2372 status = PFVF_STATUS_FORCED;
2373 goto out;
2374 }
2375
dacd88d6
YM
2376 rc = qed_iov_chk_ucast(p_hwfn, vf->relative_vf_id, &params);
2377 if (rc) {
2378 status = PFVF_STATUS_FAILURE;
2379 goto out;
2380 }
2381
2382 rc = qed_sp_eth_filter_ucast(p_hwfn, vf->opaque_fid, &params,
2383 QED_SPQ_MODE_CB, NULL);
2384 if (rc)
2385 status = PFVF_STATUS_FAILURE;
2386
2387out:
2388 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UCAST_FILTER,
2389 sizeof(struct pfvf_def_resp_tlv), status);
2390}
2391
0b55e27d
YM
2392static void qed_iov_vf_mbx_int_cleanup(struct qed_hwfn *p_hwfn,
2393 struct qed_ptt *p_ptt,
2394 struct qed_vf_info *vf)
2395{
2396 int i;
2397
2398 /* Reset the SBs */
2399 for (i = 0; i < vf->num_sbs; i++)
2400 qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
2401 vf->igu_sbs[i],
2402 vf->opaque_fid, false);
2403
2404 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_INT_CLEANUP,
2405 sizeof(struct pfvf_def_resp_tlv),
2406 PFVF_STATUS_SUCCESS);
2407}
2408
2409static void qed_iov_vf_mbx_close(struct qed_hwfn *p_hwfn,
2410 struct qed_ptt *p_ptt, struct qed_vf_info *vf)
2411{
2412 u16 length = sizeof(struct pfvf_def_resp_tlv);
2413 u8 status = PFVF_STATUS_SUCCESS;
2414
2415 /* Disable Interrupts for VF */
2416 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
2417
2418 /* Reset Permission table */
2419 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
2420
2421 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_CLOSE,
2422 length, status);
2423}
2424
2425static void qed_iov_vf_mbx_release(struct qed_hwfn *p_hwfn,
2426 struct qed_ptt *p_ptt,
2427 struct qed_vf_info *p_vf)
2428{
2429 u16 length = sizeof(struct pfvf_def_resp_tlv);
1fe614d1
YM
2430 u8 status = PFVF_STATUS_SUCCESS;
2431 int rc = 0;
0b55e27d
YM
2432
2433 qed_iov_vf_cleanup(p_hwfn, p_vf);
2434
1fe614d1
YM
2435 if (p_vf->state != VF_STOPPED && p_vf->state != VF_FREE) {
2436 /* Stopping the VF */
2437 rc = qed_sp_vf_stop(p_hwfn, p_vf->concrete_fid,
2438 p_vf->opaque_fid);
2439
2440 if (rc) {
2441 DP_ERR(p_hwfn, "qed_sp_vf_stop returned error %d\n",
2442 rc);
2443 status = PFVF_STATUS_FAILURE;
2444 }
2445
2446 p_vf->state = VF_STOPPED;
2447 }
2448
0b55e27d 2449 qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf, CHANNEL_TLV_RELEASE,
1fe614d1 2450 length, status);
0b55e27d
YM
2451}
2452
2453static int
2454qed_iov_vf_flr_poll_dorq(struct qed_hwfn *p_hwfn,
2455 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
2456{
2457 int cnt;
2458 u32 val;
2459
2460 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_vf->concrete_fid);
2461
2462 for (cnt = 0; cnt < 50; cnt++) {
2463 val = qed_rd(p_hwfn, p_ptt, DORQ_REG_VF_USAGE_CNT);
2464 if (!val)
2465 break;
2466 msleep(20);
2467 }
2468 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
2469
2470 if (cnt == 50) {
2471 DP_ERR(p_hwfn,
2472 "VF[%d] - dorq failed to cleanup [usage 0x%08x]\n",
2473 p_vf->abs_vf_id, val);
2474 return -EBUSY;
2475 }
2476
2477 return 0;
2478}
2479
2480static int
2481qed_iov_vf_flr_poll_pbf(struct qed_hwfn *p_hwfn,
2482 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
2483{
2484 u32 cons[MAX_NUM_VOQS], distance[MAX_NUM_VOQS];
2485 int i, cnt;
2486
2487 /* Read initial consumers & producers */
2488 for (i = 0; i < MAX_NUM_VOQS; i++) {
2489 u32 prod;
2490
2491 cons[i] = qed_rd(p_hwfn, p_ptt,
2492 PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
2493 i * 0x40);
2494 prod = qed_rd(p_hwfn, p_ptt,
2495 PBF_REG_NUM_BLOCKS_ALLOCATED_PROD_VOQ0 +
2496 i * 0x40);
2497 distance[i] = prod - cons[i];
2498 }
2499
2500 /* Wait for consumers to pass the producers */
2501 i = 0;
2502 for (cnt = 0; cnt < 50; cnt++) {
2503 for (; i < MAX_NUM_VOQS; i++) {
2504 u32 tmp;
2505
2506 tmp = qed_rd(p_hwfn, p_ptt,
2507 PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
2508 i * 0x40);
2509 if (distance[i] > tmp - cons[i])
2510 break;
2511 }
2512
2513 if (i == MAX_NUM_VOQS)
2514 break;
2515
2516 msleep(20);
2517 }
2518
2519 if (cnt == 50) {
2520 DP_ERR(p_hwfn, "VF[%d] - pbf polling failed on VOQ %d\n",
2521 p_vf->abs_vf_id, i);
2522 return -EBUSY;
2523 }
2524
2525 return 0;
2526}
2527
2528static int qed_iov_vf_flr_poll(struct qed_hwfn *p_hwfn,
2529 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
2530{
2531 int rc;
2532
2533 rc = qed_iov_vf_flr_poll_dorq(p_hwfn, p_vf, p_ptt);
2534 if (rc)
2535 return rc;
2536
2537 rc = qed_iov_vf_flr_poll_pbf(p_hwfn, p_vf, p_ptt);
2538 if (rc)
2539 return rc;
2540
2541 return 0;
2542}
2543
2544static int
2545qed_iov_execute_vf_flr_cleanup(struct qed_hwfn *p_hwfn,
2546 struct qed_ptt *p_ptt,
2547 u16 rel_vf_id, u32 *ack_vfs)
2548{
2549 struct qed_vf_info *p_vf;
2550 int rc = 0;
2551
2552 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
2553 if (!p_vf)
2554 return 0;
2555
2556 if (p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &
2557 (1ULL << (rel_vf_id % 64))) {
2558 u16 vfid = p_vf->abs_vf_id;
2559
2560 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2561 "VF[%d] - Handling FLR\n", vfid);
2562
2563 qed_iov_vf_cleanup(p_hwfn, p_vf);
2564
2565 /* If VF isn't active, no need for anything but SW */
2566 if (!p_vf->b_init)
2567 goto cleanup;
2568
2569 rc = qed_iov_vf_flr_poll(p_hwfn, p_vf, p_ptt);
2570 if (rc)
2571 goto cleanup;
2572
2573 rc = qed_final_cleanup(p_hwfn, p_ptt, vfid, true);
2574 if (rc) {
2575 DP_ERR(p_hwfn, "Failed handle FLR of VF[%d]\n", vfid);
2576 return rc;
2577 }
2578
2579 /* VF_STOPPED has to be set only after final cleanup
2580 * but prior to re-enabling the VF.
2581 */
2582 p_vf->state = VF_STOPPED;
2583
2584 rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, p_vf);
2585 if (rc) {
2586 DP_ERR(p_hwfn, "Failed to re-enable VF[%d] acces\n",
2587 vfid);
2588 return rc;
2589 }
2590cleanup:
2591 /* Mark VF for ack and clean pending state */
2592 if (p_vf->state == VF_RESET)
2593 p_vf->state = VF_STOPPED;
2594 ack_vfs[vfid / 32] |= (1 << (vfid % 32));
2595 p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &=
2596 ~(1ULL << (rel_vf_id % 64));
2597 p_hwfn->pf_iov_info->pending_events[rel_vf_id / 64] &=
2598 ~(1ULL << (rel_vf_id % 64));
2599 }
2600
2601 return rc;
2602}
2603
2604int qed_iov_vf_flr_cleanup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
2605{
2606 u32 ack_vfs[VF_MAX_STATIC / 32];
2607 int rc = 0;
2608 u16 i;
2609
2610 memset(ack_vfs, 0, sizeof(u32) * (VF_MAX_STATIC / 32));
2611
2612 /* Since BRB <-> PRS interface can't be tested as part of the flr
2613 * polling due to HW limitations, simply sleep a bit. And since
2614 * there's no need to wait per-vf, do it before looping.
2615 */
2616 msleep(100);
2617
2618 for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++)
2619 qed_iov_execute_vf_flr_cleanup(p_hwfn, p_ptt, i, ack_vfs);
2620
2621 rc = qed_mcp_ack_vf_flr(p_hwfn, p_ptt, ack_vfs);
2622 return rc;
2623}
2624
2625int qed_iov_mark_vf_flr(struct qed_hwfn *p_hwfn, u32 *p_disabled_vfs)
2626{
2627 u16 i, found = 0;
2628
2629 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "Marking FLR-ed VFs\n");
2630 for (i = 0; i < (VF_MAX_STATIC / 32); i++)
2631 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2632 "[%08x,...,%08x]: %08x\n",
2633 i * 32, (i + 1) * 32 - 1, p_disabled_vfs[i]);
2634
2635 if (!p_hwfn->cdev->p_iov_info) {
2636 DP_NOTICE(p_hwfn, "VF flr but no IOV\n");
2637 return 0;
2638 }
2639
2640 /* Mark VFs */
2641 for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++) {
2642 struct qed_vf_info *p_vf;
2643 u8 vfid;
2644
2645 p_vf = qed_iov_get_vf_info(p_hwfn, i, false);
2646 if (!p_vf)
2647 continue;
2648
2649 vfid = p_vf->abs_vf_id;
2650 if ((1 << (vfid % 32)) & p_disabled_vfs[vfid / 32]) {
2651 u64 *p_flr = p_hwfn->pf_iov_info->pending_flr;
2652 u16 rel_vf_id = p_vf->relative_vf_id;
2653
2654 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2655 "VF[%d] [rel %d] got FLR-ed\n",
2656 vfid, rel_vf_id);
2657
2658 p_vf->state = VF_RESET;
2659
2660 /* No need to lock here, since pending_flr should
2661 * only change here and before ACKing MFw. Since
2662 * MFW will not trigger an additional attention for
2663 * VF flr until ACKs, we're safe.
2664 */
2665 p_flr[rel_vf_id / 64] |= 1ULL << (rel_vf_id % 64);
2666 found = 1;
2667 }
2668 }
2669
2670 return found;
2671}
2672
73390ac9
YM
2673static void qed_iov_get_link(struct qed_hwfn *p_hwfn,
2674 u16 vfid,
2675 struct qed_mcp_link_params *p_params,
2676 struct qed_mcp_link_state *p_link,
2677 struct qed_mcp_link_capabilities *p_caps)
2678{
2679 struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
2680 vfid,
2681 false);
2682 struct qed_bulletin_content *p_bulletin;
2683
2684 if (!p_vf)
2685 return;
2686
2687 p_bulletin = p_vf->bulletin.p_virt;
2688
2689 if (p_params)
2690 __qed_vf_get_link_params(p_hwfn, p_params, p_bulletin);
2691 if (p_link)
2692 __qed_vf_get_link_state(p_hwfn, p_link, p_bulletin);
2693 if (p_caps)
2694 __qed_vf_get_link_caps(p_hwfn, p_caps, p_bulletin);
2695}
2696
37bff2b9
YM
2697static void qed_iov_process_mbx_req(struct qed_hwfn *p_hwfn,
2698 struct qed_ptt *p_ptt, int vfid)
2699{
2700 struct qed_iov_vf_mbx *mbx;
2701 struct qed_vf_info *p_vf;
2702 int i;
2703
2704 p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
2705 if (!p_vf)
2706 return;
2707
2708 mbx = &p_vf->vf_mbx;
2709
2710 /* qed_iov_process_mbx_request */
2711 DP_VERBOSE(p_hwfn,
2712 QED_MSG_IOV,
2713 "qed_iov_process_mbx_req vfid %d\n", p_vf->abs_vf_id);
2714
2715 mbx->first_tlv = mbx->req_virt->first_tlv;
2716
2717 /* check if tlv type is known */
2718 if (qed_iov_tlv_supported(mbx->first_tlv.tl.type)) {
1408cc1f
YM
2719 switch (mbx->first_tlv.tl.type) {
2720 case CHANNEL_TLV_ACQUIRE:
2721 qed_iov_vf_mbx_acquire(p_hwfn, p_ptt, p_vf);
2722 break;
dacd88d6
YM
2723 case CHANNEL_TLV_VPORT_START:
2724 qed_iov_vf_mbx_start_vport(p_hwfn, p_ptt, p_vf);
2725 break;
2726 case CHANNEL_TLV_VPORT_TEARDOWN:
2727 qed_iov_vf_mbx_stop_vport(p_hwfn, p_ptt, p_vf);
2728 break;
2729 case CHANNEL_TLV_START_RXQ:
2730 qed_iov_vf_mbx_start_rxq(p_hwfn, p_ptt, p_vf);
2731 break;
2732 case CHANNEL_TLV_START_TXQ:
2733 qed_iov_vf_mbx_start_txq(p_hwfn, p_ptt, p_vf);
2734 break;
2735 case CHANNEL_TLV_STOP_RXQS:
2736 qed_iov_vf_mbx_stop_rxqs(p_hwfn, p_ptt, p_vf);
2737 break;
2738 case CHANNEL_TLV_STOP_TXQS:
2739 qed_iov_vf_mbx_stop_txqs(p_hwfn, p_ptt, p_vf);
2740 break;
17b235c1
YM
2741 case CHANNEL_TLV_UPDATE_RXQ:
2742 qed_iov_vf_mbx_update_rxqs(p_hwfn, p_ptt, p_vf);
2743 break;
dacd88d6
YM
2744 case CHANNEL_TLV_VPORT_UPDATE:
2745 qed_iov_vf_mbx_vport_update(p_hwfn, p_ptt, p_vf);
2746 break;
2747 case CHANNEL_TLV_UCAST_FILTER:
2748 qed_iov_vf_mbx_ucast_filter(p_hwfn, p_ptt, p_vf);
2749 break;
0b55e27d
YM
2750 case CHANNEL_TLV_CLOSE:
2751 qed_iov_vf_mbx_close(p_hwfn, p_ptt, p_vf);
2752 break;
2753 case CHANNEL_TLV_INT_CLEANUP:
2754 qed_iov_vf_mbx_int_cleanup(p_hwfn, p_ptt, p_vf);
2755 break;
2756 case CHANNEL_TLV_RELEASE:
2757 qed_iov_vf_mbx_release(p_hwfn, p_ptt, p_vf);
2758 break;
1408cc1f 2759 }
37bff2b9
YM
2760 } else {
2761 /* unknown TLV - this may belong to a VF driver from the future
2762 * - a version written after this PF driver was written, which
2763 * supports features unknown as of yet. Too bad since we don't
2764 * support them. Or this may be because someone wrote a crappy
2765 * VF driver and is sending garbage over the channel.
2766 */
2767 DP_ERR(p_hwfn,
2768 "unknown TLV. type %d length %d. first 20 bytes of mailbox buffer:\n",
2769 mbx->first_tlv.tl.type, mbx->first_tlv.tl.length);
2770
2771 for (i = 0; i < 20; i++) {
2772 DP_VERBOSE(p_hwfn,
2773 QED_MSG_IOV,
2774 "%x ",
2775 mbx->req_virt->tlv_buf_size.tlv_buffer[i]);
2776 }
2777 }
2778}
2779
2780void qed_iov_pf_add_pending_events(struct qed_hwfn *p_hwfn, u8 vfid)
2781{
2782 u64 add_bit = 1ULL << (vfid % 64);
2783
2784 p_hwfn->pf_iov_info->pending_events[vfid / 64] |= add_bit;
2785}
2786
2787static void qed_iov_pf_get_and_clear_pending_events(struct qed_hwfn *p_hwfn,
2788 u64 *events)
2789{
2790 u64 *p_pending_events = p_hwfn->pf_iov_info->pending_events;
2791
2792 memcpy(events, p_pending_events, sizeof(u64) * QED_VF_ARRAY_LENGTH);
2793 memset(p_pending_events, 0, sizeof(u64) * QED_VF_ARRAY_LENGTH);
2794}
2795
2796static int qed_sriov_vfpf_msg(struct qed_hwfn *p_hwfn,
2797 u16 abs_vfid, struct regpair *vf_msg)
2798{
2799 u8 min = (u8)p_hwfn->cdev->p_iov_info->first_vf_in_pf;
2800 struct qed_vf_info *p_vf;
2801
2802 if (!qed_iov_pf_sanity_check(p_hwfn, (int)abs_vfid - min)) {
2803 DP_VERBOSE(p_hwfn,
2804 QED_MSG_IOV,
2805 "Got a message from VF [abs 0x%08x] that cannot be handled by PF\n",
2806 abs_vfid);
2807 return 0;
2808 }
2809 p_vf = &p_hwfn->pf_iov_info->vfs_array[(u8)abs_vfid - min];
2810
2811 /* List the physical address of the request so that handler
2812 * could later on copy the message from it.
2813 */
2814 p_vf->vf_mbx.pending_req = (((u64)vf_msg->hi) << 32) | vf_msg->lo;
2815
2816 /* Mark the event and schedule the workqueue */
2817 qed_iov_pf_add_pending_events(p_hwfn, p_vf->relative_vf_id);
2818 qed_schedule_iov(p_hwfn, QED_IOV_WQ_MSG_FLAG);
2819
2820 return 0;
2821}
2822
2823int qed_sriov_eqe_event(struct qed_hwfn *p_hwfn,
2824 u8 opcode, __le16 echo, union event_ring_data *data)
2825{
2826 switch (opcode) {
2827 case COMMON_EVENT_VF_PF_CHANNEL:
2828 return qed_sriov_vfpf_msg(p_hwfn, le16_to_cpu(echo),
2829 &data->vf_pf_channel.msg_addr);
2830 default:
2831 DP_INFO(p_hwfn->cdev, "Unknown sriov eqe event 0x%02x\n",
2832 opcode);
2833 return -EINVAL;
2834 }
2835}
2836
32a47e72
YM
2837u16 qed_iov_get_next_active_vf(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
2838{
2839 struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
2840 u16 i;
2841
2842 if (!p_iov)
2843 goto out;
2844
2845 for (i = rel_vf_id; i < p_iov->total_vfs; i++)
2846 if (qed_iov_is_valid_vfid(p_hwfn, rel_vf_id, true))
2847 return i;
2848
2849out:
2850 return MAX_NUM_VFS;
2851}
37bff2b9
YM
2852
2853static int qed_iov_copy_vf_msg(struct qed_hwfn *p_hwfn, struct qed_ptt *ptt,
2854 int vfid)
2855{
2856 struct qed_dmae_params params;
2857 struct qed_vf_info *vf_info;
2858
2859 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
2860 if (!vf_info)
2861 return -EINVAL;
2862
2863 memset(&params, 0, sizeof(struct qed_dmae_params));
2864 params.flags = QED_DMAE_FLAG_VF_SRC | QED_DMAE_FLAG_COMPLETION_DST;
2865 params.src_vfid = vf_info->abs_vf_id;
2866
2867 if (qed_dmae_host2host(p_hwfn, ptt,
2868 vf_info->vf_mbx.pending_req,
2869 vf_info->vf_mbx.req_phys,
2870 sizeof(union vfpf_tlvs) / 4, &params)) {
2871 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2872 "Failed to copy message from VF 0x%02x\n", vfid);
2873
2874 return -EIO;
2875 }
2876
2877 return 0;
2878}
2879
eff16960
YM
2880static void qed_iov_bulletin_set_forced_mac(struct qed_hwfn *p_hwfn,
2881 u8 *mac, int vfid)
2882{
2883 struct qed_vf_info *vf_info;
2884 u64 feature;
2885
2886 vf_info = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
2887 if (!vf_info) {
2888 DP_NOTICE(p_hwfn->cdev,
2889 "Can not set forced MAC, invalid vfid [%d]\n", vfid);
2890 return;
2891 }
2892
2893 feature = 1 << MAC_ADDR_FORCED;
2894 memcpy(vf_info->bulletin.p_virt->mac, mac, ETH_ALEN);
2895
2896 vf_info->bulletin.p_virt->valid_bitmap |= feature;
2897 /* Forced MAC will disable MAC_ADDR */
2898 vf_info->bulletin.p_virt->valid_bitmap &=
2899 ~(1 << VFPF_BULLETIN_MAC_ADDR);
2900
2901 qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
2902}
2903
08feecd7
YM
2904void qed_iov_bulletin_set_forced_vlan(struct qed_hwfn *p_hwfn,
2905 u16 pvid, int vfid)
2906{
2907 struct qed_vf_info *vf_info;
2908 u64 feature;
2909
2910 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
2911 if (!vf_info) {
2912 DP_NOTICE(p_hwfn->cdev,
2913 "Can not set forced MAC, invalid vfid [%d]\n", vfid);
2914 return;
2915 }
2916
2917 feature = 1 << VLAN_ADDR_FORCED;
2918 vf_info->bulletin.p_virt->pvid = pvid;
2919 if (pvid)
2920 vf_info->bulletin.p_virt->valid_bitmap |= feature;
2921 else
2922 vf_info->bulletin.p_virt->valid_bitmap &= ~feature;
2923
2924 qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
2925}
2926
6ddc7608
YM
2927static bool qed_iov_vf_has_vport_instance(struct qed_hwfn *p_hwfn, int vfid)
2928{
2929 struct qed_vf_info *p_vf_info;
2930
2931 p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
2932 if (!p_vf_info)
2933 return false;
2934
2935 return !!p_vf_info->vport_instance;
2936}
2937
0b55e27d
YM
2938bool qed_iov_is_vf_stopped(struct qed_hwfn *p_hwfn, int vfid)
2939{
2940 struct qed_vf_info *p_vf_info;
2941
2942 p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
2943 if (!p_vf_info)
2944 return true;
2945
2946 return p_vf_info->state == VF_STOPPED;
2947}
2948
73390ac9
YM
2949static bool qed_iov_spoofchk_get(struct qed_hwfn *p_hwfn, int vfid)
2950{
2951 struct qed_vf_info *vf_info;
2952
2953 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
2954 if (!vf_info)
2955 return false;
2956
2957 return vf_info->spoof_chk;
2958}
2959
6ddc7608
YM
2960int qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn, int vfid, bool val)
2961{
2962 struct qed_vf_info *vf;
2963 int rc = -EINVAL;
2964
2965 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
2966 DP_NOTICE(p_hwfn,
2967 "SR-IOV sanity check failed, can't set spoofchk\n");
2968 goto out;
2969 }
2970
2971 vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
2972 if (!vf)
2973 goto out;
2974
2975 if (!qed_iov_vf_has_vport_instance(p_hwfn, vfid)) {
2976 /* After VF VPORT start PF will configure spoof check */
2977 vf->req_spoofchk_val = val;
2978 rc = 0;
2979 goto out;
2980 }
2981
2982 rc = __qed_iov_spoofchk_set(p_hwfn, vf, val);
2983
2984out:
2985 return rc;
2986}
2987
eff16960
YM
2988static u8 *qed_iov_bulletin_get_forced_mac(struct qed_hwfn *p_hwfn,
2989 u16 rel_vf_id)
2990{
2991 struct qed_vf_info *p_vf;
2992
2993 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
2994 if (!p_vf || !p_vf->bulletin.p_virt)
2995 return NULL;
2996
2997 if (!(p_vf->bulletin.p_virt->valid_bitmap & (1 << MAC_ADDR_FORCED)))
2998 return NULL;
2999
3000 return p_vf->bulletin.p_virt->mac;
3001}
3002
08feecd7
YM
3003u16 qed_iov_bulletin_get_forced_vlan(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
3004{
3005 struct qed_vf_info *p_vf;
3006
3007 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3008 if (!p_vf || !p_vf->bulletin.p_virt)
3009 return 0;
3010
3011 if (!(p_vf->bulletin.p_virt->valid_bitmap & (1 << VLAN_ADDR_FORCED)))
3012 return 0;
3013
3014 return p_vf->bulletin.p_virt->pvid;
3015}
3016
733def6a
YM
3017static int qed_iov_configure_tx_rate(struct qed_hwfn *p_hwfn,
3018 struct qed_ptt *p_ptt, int vfid, int val)
3019{
3020 struct qed_vf_info *vf;
3021 u8 abs_vp_id = 0;
3022 int rc;
3023
3024 vf = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3025 if (!vf)
3026 return -EINVAL;
3027
3028 rc = qed_fw_vport(p_hwfn, vf->vport_id, &abs_vp_id);
3029 if (rc)
3030 return rc;
3031
3032 return qed_init_vport_rl(p_hwfn, p_ptt, abs_vp_id, (u32)val);
3033}
3034
3035int qed_iov_configure_min_tx_rate(struct qed_dev *cdev, int vfid, u32 rate)
3036{
3037 struct qed_vf_info *vf;
3038 u8 vport_id;
3039 int i;
3040
3041 for_each_hwfn(cdev, i) {
3042 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
3043
3044 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
3045 DP_NOTICE(p_hwfn,
3046 "SR-IOV sanity check failed, can't set min rate\n");
3047 return -EINVAL;
3048 }
3049 }
3050
3051 vf = qed_iov_get_vf_info(QED_LEADING_HWFN(cdev), (u16)vfid, true);
3052 vport_id = vf->vport_id;
3053
3054 return qed_configure_vport_wfq(cdev, vport_id, rate);
3055}
3056
73390ac9
YM
3057static int qed_iov_get_vf_min_rate(struct qed_hwfn *p_hwfn, int vfid)
3058{
3059 struct qed_wfq_data *vf_vp_wfq;
3060 struct qed_vf_info *vf_info;
3061
3062 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
3063 if (!vf_info)
3064 return 0;
3065
3066 vf_vp_wfq = &p_hwfn->qm_info.wfq_data[vf_info->vport_id];
3067
3068 if (vf_vp_wfq->configured)
3069 return vf_vp_wfq->min_speed;
3070 else
3071 return 0;
3072}
3073
37bff2b9
YM
3074/**
3075 * qed_schedule_iov - schedules IOV task for VF and PF
3076 * @hwfn: hardware function pointer
3077 * @flag: IOV flag for VF/PF
3078 */
3079void qed_schedule_iov(struct qed_hwfn *hwfn, enum qed_iov_wq_flag flag)
3080{
3081 smp_mb__before_atomic();
3082 set_bit(flag, &hwfn->iov_task_flags);
3083 smp_mb__after_atomic();
3084 DP_VERBOSE(hwfn, QED_MSG_IOV, "Scheduling iov task [Flag: %d]\n", flag);
3085 queue_delayed_work(hwfn->iov_wq, &hwfn->iov_task, 0);
3086}
3087
1408cc1f
YM
3088void qed_vf_start_iov_wq(struct qed_dev *cdev)
3089{
3090 int i;
3091
3092 for_each_hwfn(cdev, i)
3093 queue_delayed_work(cdev->hwfns[i].iov_wq,
3094 &cdev->hwfns[i].iov_task, 0);
3095}
3096
0b55e27d
YM
3097int qed_sriov_disable(struct qed_dev *cdev, bool pci_enabled)
3098{
3099 int i, j;
3100
3101 for_each_hwfn(cdev, i)
3102 if (cdev->hwfns[i].iov_wq)
3103 flush_workqueue(cdev->hwfns[i].iov_wq);
3104
3105 /* Mark VFs for disablement */
3106 qed_iov_set_vfs_to_disable(cdev, true);
3107
3108 if (cdev->p_iov_info && cdev->p_iov_info->num_vfs && pci_enabled)
3109 pci_disable_sriov(cdev->pdev);
3110
3111 for_each_hwfn(cdev, i) {
3112 struct qed_hwfn *hwfn = &cdev->hwfns[i];
3113 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
3114
3115 /* Failure to acquire the ptt in 100g creates an odd error
3116 * where the first engine has already relased IOV.
3117 */
3118 if (!ptt) {
3119 DP_ERR(hwfn, "Failed to acquire ptt\n");
3120 return -EBUSY;
3121 }
3122
733def6a
YM
3123 /* Clean WFQ db and configure equal weight for all vports */
3124 qed_clean_wfq_db(hwfn, ptt);
3125
0b55e27d
YM
3126 qed_for_each_vf(hwfn, j) {
3127 int k;
3128
3129 if (!qed_iov_is_valid_vfid(hwfn, j, true))
3130 continue;
3131
3132 /* Wait until VF is disabled before releasing */
3133 for (k = 0; k < 100; k++) {
3134 if (!qed_iov_is_vf_stopped(hwfn, j))
3135 msleep(20);
3136 else
3137 break;
3138 }
3139
3140 if (k < 100)
3141 qed_iov_release_hw_for_vf(&cdev->hwfns[i],
3142 ptt, j);
3143 else
3144 DP_ERR(hwfn,
3145 "Timeout waiting for VF's FLR to end\n");
3146 }
3147
3148 qed_ptt_release(hwfn, ptt);
3149 }
3150
3151 qed_iov_set_vfs_to_disable(cdev, false);
3152
3153 return 0;
3154}
3155
3156static int qed_sriov_enable(struct qed_dev *cdev, int num)
3157{
3158 struct qed_sb_cnt_info sb_cnt_info;
3159 int i, j, rc;
3160
3161 if (num >= RESC_NUM(&cdev->hwfns[0], QED_VPORT)) {
3162 DP_NOTICE(cdev, "Can start at most %d VFs\n",
3163 RESC_NUM(&cdev->hwfns[0], QED_VPORT) - 1);
3164 return -EINVAL;
3165 }
3166
3167 /* Initialize HW for VF access */
3168 for_each_hwfn(cdev, j) {
3169 struct qed_hwfn *hwfn = &cdev->hwfns[j];
3170 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
3171 int num_sbs = 0, limit = 16;
3172
3173 if (!ptt) {
3174 DP_ERR(hwfn, "Failed to acquire ptt\n");
3175 rc = -EBUSY;
3176 goto err;
3177 }
3178
83f34bd4
YM
3179 if (IS_MF_DEFAULT(hwfn))
3180 limit = MAX_NUM_VFS_BB / hwfn->num_funcs_on_engine;
3181
0b55e27d
YM
3182 memset(&sb_cnt_info, 0, sizeof(sb_cnt_info));
3183 qed_int_get_num_sbs(hwfn, &sb_cnt_info);
3184 num_sbs = min_t(int, sb_cnt_info.sb_free_blk, limit);
3185
3186 for (i = 0; i < num; i++) {
3187 if (!qed_iov_is_valid_vfid(hwfn, i, false))
3188 continue;
3189
3190 rc = qed_iov_init_hw_for_vf(hwfn,
3191 ptt, i, num_sbs / num);
3192 if (rc) {
3193 DP_ERR(cdev, "Failed to enable VF[%d]\n", i);
3194 qed_ptt_release(hwfn, ptt);
3195 goto err;
3196 }
3197 }
3198
3199 qed_ptt_release(hwfn, ptt);
3200 }
3201
3202 /* Enable SRIOV PCIe functions */
3203 rc = pci_enable_sriov(cdev->pdev, num);
3204 if (rc) {
3205 DP_ERR(cdev, "Failed to enable sriov [%d]\n", rc);
3206 goto err;
3207 }
3208
3209 return num;
3210
3211err:
3212 qed_sriov_disable(cdev, false);
3213 return rc;
3214}
3215
3216static int qed_sriov_configure(struct qed_dev *cdev, int num_vfs_param)
3217{
3218 if (!IS_QED_SRIOV(cdev)) {
3219 DP_VERBOSE(cdev, QED_MSG_IOV, "SR-IOV is not supported\n");
3220 return -EOPNOTSUPP;
3221 }
3222
3223 if (num_vfs_param)
3224 return qed_sriov_enable(cdev, num_vfs_param);
3225 else
3226 return qed_sriov_disable(cdev, true);
3227}
3228
eff16960
YM
3229static int qed_sriov_pf_set_mac(struct qed_dev *cdev, u8 *mac, int vfid)
3230{
3231 int i;
3232
3233 if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
3234 DP_VERBOSE(cdev, QED_MSG_IOV,
3235 "Cannot set a VF MAC; Sriov is not enabled\n");
3236 return -EINVAL;
3237 }
3238
3239 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true)) {
3240 DP_VERBOSE(cdev, QED_MSG_IOV,
3241 "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
3242 return -EINVAL;
3243 }
3244
3245 for_each_hwfn(cdev, i) {
3246 struct qed_hwfn *hwfn = &cdev->hwfns[i];
3247 struct qed_public_vf_info *vf_info;
3248
3249 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
3250 if (!vf_info)
3251 continue;
3252
3253 /* Set the forced MAC, and schedule the IOV task */
3254 ether_addr_copy(vf_info->forced_mac, mac);
3255 qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
3256 }
3257
3258 return 0;
3259}
3260
08feecd7
YM
3261static int qed_sriov_pf_set_vlan(struct qed_dev *cdev, u16 vid, int vfid)
3262{
3263 int i;
3264
3265 if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
3266 DP_VERBOSE(cdev, QED_MSG_IOV,
3267 "Cannot set a VF MAC; Sriov is not enabled\n");
3268 return -EINVAL;
3269 }
3270
3271 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true)) {
3272 DP_VERBOSE(cdev, QED_MSG_IOV,
3273 "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
3274 return -EINVAL;
3275 }
3276
3277 for_each_hwfn(cdev, i) {
3278 struct qed_hwfn *hwfn = &cdev->hwfns[i];
3279 struct qed_public_vf_info *vf_info;
3280
3281 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
3282 if (!vf_info)
3283 continue;
3284
3285 /* Set the forced vlan, and schedule the IOV task */
3286 vf_info->forced_vlan = vid;
3287 qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
3288 }
3289
3290 return 0;
3291}
3292
73390ac9
YM
3293static int qed_get_vf_config(struct qed_dev *cdev,
3294 int vf_id, struct ifla_vf_info *ivi)
3295{
3296 struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
3297 struct qed_public_vf_info *vf_info;
3298 struct qed_mcp_link_state link;
3299 u32 tx_rate;
3300
3301 /* Sanitize request */
3302 if (IS_VF(cdev))
3303 return -EINVAL;
3304
3305 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true)) {
3306 DP_VERBOSE(cdev, QED_MSG_IOV,
3307 "VF index [%d] isn't active\n", vf_id);
3308 return -EINVAL;
3309 }
3310
3311 vf_info = qed_iov_get_public_vf_info(hwfn, vf_id, true);
3312
3313 qed_iov_get_link(hwfn, vf_id, NULL, &link, NULL);
3314
3315 /* Fill information about VF */
3316 ivi->vf = vf_id;
3317
3318 if (is_valid_ether_addr(vf_info->forced_mac))
3319 ether_addr_copy(ivi->mac, vf_info->forced_mac);
3320 else
3321 ether_addr_copy(ivi->mac, vf_info->mac);
3322
3323 ivi->vlan = vf_info->forced_vlan;
3324 ivi->spoofchk = qed_iov_spoofchk_get(hwfn, vf_id);
3325 ivi->linkstate = vf_info->link_state;
3326 tx_rate = vf_info->tx_rate;
3327 ivi->max_tx_rate = tx_rate ? tx_rate : link.speed;
3328 ivi->min_tx_rate = qed_iov_get_vf_min_rate(hwfn, vf_id);
3329
3330 return 0;
3331}
3332
36558c3d
YM
3333void qed_inform_vf_link_state(struct qed_hwfn *hwfn)
3334{
3335 struct qed_mcp_link_capabilities caps;
3336 struct qed_mcp_link_params params;
3337 struct qed_mcp_link_state link;
3338 int i;
3339
3340 if (!hwfn->pf_iov_info)
3341 return;
3342
3343 /* Update bulletin of all future possible VFs with link configuration */
3344 for (i = 0; i < hwfn->cdev->p_iov_info->total_vfs; i++) {
733def6a
YM
3345 struct qed_public_vf_info *vf_info;
3346
3347 vf_info = qed_iov_get_public_vf_info(hwfn, i, false);
3348 if (!vf_info)
3349 continue;
3350
36558c3d
YM
3351 memcpy(&params, qed_mcp_get_link_params(hwfn), sizeof(params));
3352 memcpy(&link, qed_mcp_get_link_state(hwfn), sizeof(link));
3353 memcpy(&caps, qed_mcp_get_link_capabilities(hwfn),
3354 sizeof(caps));
3355
733def6a
YM
3356 /* Modify link according to the VF's configured link state */
3357 switch (vf_info->link_state) {
3358 case IFLA_VF_LINK_STATE_DISABLE:
3359 link.link_up = false;
3360 break;
3361 case IFLA_VF_LINK_STATE_ENABLE:
3362 link.link_up = true;
3363 /* Set speed according to maximum supported by HW.
3364 * that is 40G for regular devices and 100G for CMT
3365 * mode devices.
3366 */
3367 link.speed = (hwfn->cdev->num_hwfns > 1) ?
3368 100000 : 40000;
3369 default:
3370 /* In auto mode pass PF link image to VF */
3371 break;
3372 }
3373
3374 if (link.link_up && vf_info->tx_rate) {
3375 struct qed_ptt *ptt;
3376 int rate;
3377
3378 rate = min_t(int, vf_info->tx_rate, link.speed);
3379
3380 ptt = qed_ptt_acquire(hwfn);
3381 if (!ptt) {
3382 DP_NOTICE(hwfn, "Failed to acquire PTT\n");
3383 return;
3384 }
3385
3386 if (!qed_iov_configure_tx_rate(hwfn, ptt, i, rate)) {
3387 vf_info->tx_rate = rate;
3388 link.speed = rate;
3389 }
3390
3391 qed_ptt_release(hwfn, ptt);
3392 }
3393
36558c3d
YM
3394 qed_iov_set_link(hwfn, i, &params, &link, &caps);
3395 }
3396
3397 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
3398}
3399
733def6a
YM
3400static int qed_set_vf_link_state(struct qed_dev *cdev,
3401 int vf_id, int link_state)
3402{
3403 int i;
3404
3405 /* Sanitize request */
3406 if (IS_VF(cdev))
3407 return -EINVAL;
3408
3409 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true)) {
3410 DP_VERBOSE(cdev, QED_MSG_IOV,
3411 "VF index [%d] isn't active\n", vf_id);
3412 return -EINVAL;
3413 }
3414
3415 /* Handle configuration of link state */
3416 for_each_hwfn(cdev, i) {
3417 struct qed_hwfn *hwfn = &cdev->hwfns[i];
3418 struct qed_public_vf_info *vf;
3419
3420 vf = qed_iov_get_public_vf_info(hwfn, vf_id, true);
3421 if (!vf)
3422 continue;
3423
3424 if (vf->link_state == link_state)
3425 continue;
3426
3427 vf->link_state = link_state;
3428 qed_inform_vf_link_state(&cdev->hwfns[i]);
3429 }
3430
3431 return 0;
3432}
3433
6ddc7608
YM
3434static int qed_spoof_configure(struct qed_dev *cdev, int vfid, bool val)
3435{
3436 int i, rc = -EINVAL;
3437
3438 for_each_hwfn(cdev, i) {
3439 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
3440
3441 rc = qed_iov_spoofchk_set(p_hwfn, vfid, val);
3442 if (rc)
3443 break;
3444 }
3445
3446 return rc;
3447}
3448
733def6a
YM
3449static int qed_configure_max_vf_rate(struct qed_dev *cdev, int vfid, int rate)
3450{
3451 int i;
3452
3453 for_each_hwfn(cdev, i) {
3454 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
3455 struct qed_public_vf_info *vf;
3456
3457 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
3458 DP_NOTICE(p_hwfn,
3459 "SR-IOV sanity check failed, can't set tx rate\n");
3460 return -EINVAL;
3461 }
3462
3463 vf = qed_iov_get_public_vf_info(p_hwfn, vfid, true);
3464
3465 vf->tx_rate = rate;
3466
3467 qed_inform_vf_link_state(p_hwfn);
3468 }
3469
3470 return 0;
3471}
3472
3473static int qed_set_vf_rate(struct qed_dev *cdev,
3474 int vfid, u32 min_rate, u32 max_rate)
3475{
3476 int rc_min = 0, rc_max = 0;
3477
3478 if (max_rate)
3479 rc_max = qed_configure_max_vf_rate(cdev, vfid, max_rate);
3480
3481 if (min_rate)
3482 rc_min = qed_iov_configure_min_tx_rate(cdev, vfid, min_rate);
3483
3484 if (rc_max | rc_min)
3485 return -EINVAL;
3486
3487 return 0;
3488}
3489
37bff2b9
YM
3490static void qed_handle_vf_msg(struct qed_hwfn *hwfn)
3491{
3492 u64 events[QED_VF_ARRAY_LENGTH];
3493 struct qed_ptt *ptt;
3494 int i;
3495
3496 ptt = qed_ptt_acquire(hwfn);
3497 if (!ptt) {
3498 DP_VERBOSE(hwfn, QED_MSG_IOV,
3499 "Can't acquire PTT; re-scheduling\n");
3500 qed_schedule_iov(hwfn, QED_IOV_WQ_MSG_FLAG);
3501 return;
3502 }
3503
3504 qed_iov_pf_get_and_clear_pending_events(hwfn, events);
3505
3506 DP_VERBOSE(hwfn, QED_MSG_IOV,
3507 "Event mask of VF events: 0x%llx 0x%llx 0x%llx\n",
3508 events[0], events[1], events[2]);
3509
3510 qed_for_each_vf(hwfn, i) {
3511 /* Skip VFs with no pending messages */
3512 if (!(events[i / 64] & (1ULL << (i % 64))))
3513 continue;
3514
3515 DP_VERBOSE(hwfn, QED_MSG_IOV,
3516 "Handling VF message from VF 0x%02x [Abs 0x%02x]\n",
3517 i, hwfn->cdev->p_iov_info->first_vf_in_pf + i);
3518
3519 /* Copy VF's message to PF's request buffer for that VF */
3520 if (qed_iov_copy_vf_msg(hwfn, ptt, i))
3521 continue;
3522
3523 qed_iov_process_mbx_req(hwfn, ptt, i);
3524 }
3525
3526 qed_ptt_release(hwfn, ptt);
3527}
3528
08feecd7
YM
3529static void qed_handle_pf_set_vf_unicast(struct qed_hwfn *hwfn)
3530{
3531 int i;
3532
3533 qed_for_each_vf(hwfn, i) {
3534 struct qed_public_vf_info *info;
3535 bool update = false;
eff16960 3536 u8 *mac;
08feecd7
YM
3537
3538 info = qed_iov_get_public_vf_info(hwfn, i, true);
3539 if (!info)
3540 continue;
3541
3542 /* Update data on bulletin board */
eff16960
YM
3543 mac = qed_iov_bulletin_get_forced_mac(hwfn, i);
3544 if (is_valid_ether_addr(info->forced_mac) &&
3545 (!mac || !ether_addr_equal(mac, info->forced_mac))) {
3546 DP_VERBOSE(hwfn,
3547 QED_MSG_IOV,
3548 "Handling PF setting of VF MAC to VF 0x%02x [Abs 0x%02x]\n",
3549 i,
3550 hwfn->cdev->p_iov_info->first_vf_in_pf + i);
3551
3552 /* Update bulletin board with forced MAC */
3553 qed_iov_bulletin_set_forced_mac(hwfn,
3554 info->forced_mac, i);
3555 update = true;
3556 }
08feecd7
YM
3557
3558 if (qed_iov_bulletin_get_forced_vlan(hwfn, i) ^
3559 info->forced_vlan) {
3560 DP_VERBOSE(hwfn,
3561 QED_MSG_IOV,
3562 "Handling PF setting of pvid [0x%04x] to VF 0x%02x [Abs 0x%02x]\n",
3563 info->forced_vlan,
3564 i,
3565 hwfn->cdev->p_iov_info->first_vf_in_pf + i);
3566 qed_iov_bulletin_set_forced_vlan(hwfn,
3567 info->forced_vlan, i);
3568 update = true;
3569 }
3570
3571 if (update)
3572 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
3573 }
3574}
3575
36558c3d
YM
3576static void qed_handle_bulletin_post(struct qed_hwfn *hwfn)
3577{
3578 struct qed_ptt *ptt;
3579 int i;
3580
3581 ptt = qed_ptt_acquire(hwfn);
3582 if (!ptt) {
3583 DP_NOTICE(hwfn, "Failed allocating a ptt entry\n");
3584 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
3585 return;
3586 }
3587
3588 qed_for_each_vf(hwfn, i)
3589 qed_iov_post_vf_bulletin(hwfn, i, ptt);
3590
3591 qed_ptt_release(hwfn, ptt);
3592}
3593
37bff2b9
YM
3594void qed_iov_pf_task(struct work_struct *work)
3595{
3596 struct qed_hwfn *hwfn = container_of(work, struct qed_hwfn,
3597 iov_task.work);
0b55e27d 3598 int rc;
37bff2b9
YM
3599
3600 if (test_and_clear_bit(QED_IOV_WQ_STOP_WQ_FLAG, &hwfn->iov_task_flags))
3601 return;
3602
0b55e27d
YM
3603 if (test_and_clear_bit(QED_IOV_WQ_FLR_FLAG, &hwfn->iov_task_flags)) {
3604 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
3605
3606 if (!ptt) {
3607 qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
3608 return;
3609 }
3610
3611 rc = qed_iov_vf_flr_cleanup(hwfn, ptt);
3612 if (rc)
3613 qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
3614
3615 qed_ptt_release(hwfn, ptt);
3616 }
3617
37bff2b9
YM
3618 if (test_and_clear_bit(QED_IOV_WQ_MSG_FLAG, &hwfn->iov_task_flags))
3619 qed_handle_vf_msg(hwfn);
08feecd7
YM
3620
3621 if (test_and_clear_bit(QED_IOV_WQ_SET_UNICAST_FILTER_FLAG,
3622 &hwfn->iov_task_flags))
3623 qed_handle_pf_set_vf_unicast(hwfn);
3624
36558c3d
YM
3625 if (test_and_clear_bit(QED_IOV_WQ_BULLETIN_UPDATE_FLAG,
3626 &hwfn->iov_task_flags))
3627 qed_handle_bulletin_post(hwfn);
37bff2b9
YM
3628}
3629
3630void qed_iov_wq_stop(struct qed_dev *cdev, bool schedule_first)
3631{
3632 int i;
3633
3634 for_each_hwfn(cdev, i) {
3635 if (!cdev->hwfns[i].iov_wq)
3636 continue;
3637
3638 if (schedule_first) {
3639 qed_schedule_iov(&cdev->hwfns[i],
3640 QED_IOV_WQ_STOP_WQ_FLAG);
3641 cancel_delayed_work_sync(&cdev->hwfns[i].iov_task);
3642 }
3643
3644 flush_workqueue(cdev->hwfns[i].iov_wq);
3645 destroy_workqueue(cdev->hwfns[i].iov_wq);
3646 }
3647}
3648
3649int qed_iov_wq_start(struct qed_dev *cdev)
3650{
3651 char name[NAME_SIZE];
3652 int i;
3653
3654 for_each_hwfn(cdev, i) {
3655 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
3656
36558c3d
YM
3657 /* PFs needs a dedicated workqueue only if they support IOV.
3658 * VFs always require one.
3659 */
3660 if (IS_PF(p_hwfn->cdev) && !IS_PF_SRIOV(p_hwfn))
37bff2b9
YM
3661 continue;
3662
3663 snprintf(name, NAME_SIZE, "iov-%02x:%02x.%02x",
3664 cdev->pdev->bus->number,
3665 PCI_SLOT(cdev->pdev->devfn), p_hwfn->abs_pf_id);
3666
3667 p_hwfn->iov_wq = create_singlethread_workqueue(name);
3668 if (!p_hwfn->iov_wq) {
3669 DP_NOTICE(p_hwfn, "Cannot create iov workqueue\n");
3670 return -ENOMEM;
3671 }
3672
36558c3d
YM
3673 if (IS_PF(cdev))
3674 INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_pf_task);
3675 else
3676 INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_vf_task);
37bff2b9
YM
3677 }
3678
3679 return 0;
3680}
0b55e27d
YM
3681
3682const struct qed_iov_hv_ops qed_iov_ops_pass = {
3683 .configure = &qed_sriov_configure,
eff16960 3684 .set_mac = &qed_sriov_pf_set_mac,
08feecd7 3685 .set_vlan = &qed_sriov_pf_set_vlan,
73390ac9 3686 .get_config = &qed_get_vf_config,
733def6a 3687 .set_link_state = &qed_set_vf_link_state,
6ddc7608 3688 .set_spoof = &qed_spoof_configure,
733def6a 3689 .set_rate = &qed_set_vf_rate,
0b55e27d 3690};