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qed*: IOV support spoof-checking
[mirror_ubuntu-eoan-kernel.git] / drivers / net / ethernet / qlogic / qed / qed_sriov.c
CommitLineData
32a47e72
YM		 1/* QLogic qed NIC Driver
2 * Copyright (c) 2015 QLogic Corporation
3 *
4 * This software is available under the terms of the GNU General Public License
5 * (GPL) Version 2, available from the file COPYING in the main directory of
6 * this source tree.
7 */
8
dacd88d6 9#include <linux/etherdevice.h>
36558c3d 10#include <linux/crc32.h>
0b55e27d 11#include <linux/qed/qed_iov_if.h>
1408cc1f
YM		 12#include "qed_cxt.h"
13#include "qed_hsi.h"
32a47e72 14#include "qed_hw.h"
1408cc1f 15#include "qed_init_ops.h"
32a47e72 16#include "qed_int.h"
1408cc1f 17#include "qed_mcp.h"
32a47e72 18#include "qed_reg_addr.h"
1408cc1f 19#include "qed_sp.h"
32a47e72
YM		 20#include "qed_sriov.h"
21#include "qed_vf.h"
22
1408cc1f
YM		 23/* IOV ramrods */
24static int qed_sp_vf_start(struct qed_hwfn *p_hwfn,
25 u32 concrete_vfid, u16 opaque_vfid)
26{
27 struct vf_start_ramrod_data *p_ramrod = NULL;
28 struct qed_spq_entry *p_ent = NULL;
29 struct qed_sp_init_data init_data;
30 int rc = -EINVAL;
31
32 /* Get SPQ entry */
33 memset(&init_data, 0, sizeof(init_data));
34 init_data.cid = qed_spq_get_cid(p_hwfn);
35 init_data.opaque_fid = opaque_vfid;
36 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
37
38 rc = qed_sp_init_request(p_hwfn, &p_ent,
39 COMMON_RAMROD_VF_START,
40 PROTOCOLID_COMMON, &init_data);
41 if (rc)
42 return rc;
43
44 p_ramrod = &p_ent->ramrod.vf_start;
45
46 p_ramrod->vf_id = GET_FIELD(concrete_vfid, PXP_CONCRETE_FID_VFID);
47 p_ramrod->opaque_fid = cpu_to_le16(opaque_vfid);
48
49 p_ramrod->personality = PERSONALITY_ETH;
50
51 return qed_spq_post(p_hwfn, p_ent, NULL);
52}
53
0b55e27d
YM		 54static int qed_sp_vf_stop(struct qed_hwfn *p_hwfn,
55 u32 concrete_vfid, u16 opaque_vfid)
56{
57 struct vf_stop_ramrod_data *p_ramrod = NULL;
58 struct qed_spq_entry *p_ent = NULL;
59 struct qed_sp_init_data init_data;
60 int rc = -EINVAL;
61
62 /* Get SPQ entry */
63 memset(&init_data, 0, sizeof(init_data));
64 init_data.cid = qed_spq_get_cid(p_hwfn);
65 init_data.opaque_fid = opaque_vfid;
66 init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
67
68 rc = qed_sp_init_request(p_hwfn, &p_ent,
69 COMMON_RAMROD_VF_STOP,
70 PROTOCOLID_COMMON, &init_data);
71 if (rc)
72 return rc;
73
74 p_ramrod = &p_ent->ramrod.vf_stop;
75
76 p_ramrod->vf_id = GET_FIELD(concrete_vfid, PXP_CONCRETE_FID_VFID);
77
78 return qed_spq_post(p_hwfn, p_ent, NULL);
79}
80
32a47e72
YM		 81bool qed_iov_is_valid_vfid(struct qed_hwfn *p_hwfn,
82 int rel_vf_id, bool b_enabled_only)
83{
84 if (!p_hwfn->pf_iov_info) {
85 DP_NOTICE(p_hwfn->cdev, "No iov info\n");
86 return false;
87 }
88
89 if ((rel_vf_id >= p_hwfn->cdev->p_iov_info->total_vfs) ||
90 (rel_vf_id < 0))
91 return false;
92
93 if ((!p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_init) &&
94 b_enabled_only)
95 return false;
96
97 return true;
98}
99
37bff2b9
YM		 100static struct qed_vf_info *qed_iov_get_vf_info(struct qed_hwfn *p_hwfn,
101 u16 relative_vf_id,
102 bool b_enabled_only)
103{
104 struct qed_vf_info *vf = NULL;
105
106 if (!p_hwfn->pf_iov_info) {
107 DP_NOTICE(p_hwfn->cdev, "No iov info\n");
108 return NULL;
109 }
110
111 if (qed_iov_is_valid_vfid(p_hwfn, relative_vf_id, b_enabled_only))
112 vf = &p_hwfn->pf_iov_info->vfs_array[relative_vf_id];
113 else
114 DP_ERR(p_hwfn, "qed_iov_get_vf_info: VF[%d] is not enabled\n",
115 relative_vf_id);
116
117 return vf;
118}
119
36558c3d
YM		 120int qed_iov_post_vf_bulletin(struct qed_hwfn *p_hwfn,
121 int vfid, struct qed_ptt *p_ptt)
122{
123 struct qed_bulletin_content *p_bulletin;
124 int crc_size = sizeof(p_bulletin->crc);
125 struct qed_dmae_params params;
126 struct qed_vf_info *p_vf;
127
128 p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
129 if (!p_vf)
130 return -EINVAL;
131
132 if (!p_vf->vf_bulletin)
133 return -EINVAL;
134
135 p_bulletin = p_vf->bulletin.p_virt;
136
137 /* Increment bulletin board version and compute crc */
138 p_bulletin->version++;
139 p_bulletin->crc = crc32(0, (u8 *)p_bulletin + crc_size,
140 p_vf->bulletin.size - crc_size);
141
142 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
143 "Posting Bulletin 0x%08x to VF[%d] (CRC 0x%08x)\n",
144 p_bulletin->version, p_vf->relative_vf_id, p_bulletin->crc);
145
146 /* propagate bulletin board via dmae to vm memory */
147 memset(&params, 0, sizeof(params));
148 params.flags = QED_DMAE_FLAG_VF_DST;
149 params.dst_vfid = p_vf->abs_vf_id;
150 return qed_dmae_host2host(p_hwfn, p_ptt, p_vf->bulletin.phys,
151 p_vf->vf_bulletin, p_vf->bulletin.size / 4,
152 &params);
153}
154
32a47e72
YM		 155static int qed_iov_pci_cfg_info(struct qed_dev *cdev)
156{
157 struct qed_hw_sriov_info *iov = cdev->p_iov_info;
158 int pos = iov->pos;
159
160 DP_VERBOSE(cdev, QED_MSG_IOV, "sriov ext pos %d\n", pos);
161 pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
162
163 pci_read_config_word(cdev->pdev,
164 pos + PCI_SRIOV_TOTAL_VF, &iov->total_vfs);
165 pci_read_config_word(cdev->pdev,
166 pos + PCI_SRIOV_INITIAL_VF, &iov->initial_vfs);
167
168 pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_NUM_VF, &iov->num_vfs);
169 if (iov->num_vfs) {
170 DP_VERBOSE(cdev,
171 QED_MSG_IOV,
172 "Number of VFs are already set to non-zero value. Ignoring PCI configuration value\n");
173 iov->num_vfs = 0;
174 }
175
176 pci_read_config_word(cdev->pdev,
177 pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
178
179 pci_read_config_word(cdev->pdev,
180 pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
181
182 pci_read_config_word(cdev->pdev,
183 pos + PCI_SRIOV_VF_DID, &iov->vf_device_id);
184
185 pci_read_config_dword(cdev->pdev,
186 pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
187
188 pci_read_config_dword(cdev->pdev, pos + PCI_SRIOV_CAP, &iov->cap);
189
190 pci_read_config_byte(cdev->pdev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
191
192 DP_VERBOSE(cdev,
193 QED_MSG_IOV,
194 "IOV info: nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
195 iov->nres,
196 iov->cap,
197 iov->ctrl,
198 iov->total_vfs,
199 iov->initial_vfs,
200 iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
201
202 /* Some sanity checks */
203 if (iov->num_vfs > NUM_OF_VFS(cdev) ||
204 iov->total_vfs > NUM_OF_VFS(cdev)) {
205 /* This can happen only due to a bug. In this case we set
206 * num_vfs to zero to avoid memory corruption in the code that
207 * assumes max number of vfs
208 */
209 DP_NOTICE(cdev,
210 "IOV: Unexpected number of vfs set: %d setting num_vf to zero\n",
211 iov->num_vfs);
212
213 iov->num_vfs = 0;
214 iov->total_vfs = 0;
215 }
216
217 return 0;
218}
219
220static void qed_iov_clear_vf_igu_blocks(struct qed_hwfn *p_hwfn,
221 struct qed_ptt *p_ptt)
222{
223 struct qed_igu_block *p_sb;
224 u16 sb_id;
225 u32 val;
226
227 if (!p_hwfn->hw_info.p_igu_info) {
228 DP_ERR(p_hwfn,
229 "qed_iov_clear_vf_igu_blocks IGU Info not initialized\n");
230 return;
231 }
232
233 for (sb_id = 0; sb_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev);
234 sb_id++) {
235 p_sb = &p_hwfn->hw_info.p_igu_info->igu_map.igu_blocks[sb_id];
236 if ((p_sb->status & QED_IGU_STATUS_FREE) &&
237 !(p_sb->status & QED_IGU_STATUS_PF)) {
238 val = qed_rd(p_hwfn, p_ptt,
239 IGU_REG_MAPPING_MEMORY + sb_id * 4);
240 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
241 qed_wr(p_hwfn, p_ptt,
242 IGU_REG_MAPPING_MEMORY + 4 * sb_id, val);
243 }
244 }
245}
246
247static void qed_iov_setup_vfdb(struct qed_hwfn *p_hwfn)
248{
249 struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
250 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
251 struct qed_bulletin_content *p_bulletin_virt;
252 dma_addr_t req_p, rply_p, bulletin_p;
253 union pfvf_tlvs *p_reply_virt_addr;
254 union vfpf_tlvs *p_req_virt_addr;
255 u8 idx = 0;
256
257 memset(p_iov_info->vfs_array, 0, sizeof(p_iov_info->vfs_array));
258
259 p_req_virt_addr = p_iov_info->mbx_msg_virt_addr;
260 req_p = p_iov_info->mbx_msg_phys_addr;
261 p_reply_virt_addr = p_iov_info->mbx_reply_virt_addr;
262 rply_p = p_iov_info->mbx_reply_phys_addr;
263 p_bulletin_virt = p_iov_info->p_bulletins;
264 bulletin_p = p_iov_info->bulletins_phys;
265 if (!p_req_virt_addr || !p_reply_virt_addr || !p_bulletin_virt) {
266 DP_ERR(p_hwfn,
267 "qed_iov_setup_vfdb called without allocating mem first\n");
268 return;
269 }
270
271 for (idx = 0; idx < p_iov->total_vfs; idx++) {
272 struct qed_vf_info *vf = &p_iov_info->vfs_array[idx];
273 u32 concrete;
274
275 vf->vf_mbx.req_virt = p_req_virt_addr + idx;
276 vf->vf_mbx.req_phys = req_p + idx * sizeof(union vfpf_tlvs);
277 vf->vf_mbx.reply_virt = p_reply_virt_addr + idx;
278 vf->vf_mbx.reply_phys = rply_p + idx * sizeof(union pfvf_tlvs);
279
280 vf->state = VF_STOPPED;
281 vf->b_init = false;
282
283 vf->bulletin.phys = idx *
284 sizeof(struct qed_bulletin_content) +
285 bulletin_p;
286 vf->bulletin.p_virt = p_bulletin_virt + idx;
287 vf->bulletin.size = sizeof(struct qed_bulletin_content);
288
289 vf->relative_vf_id = idx;
290 vf->abs_vf_id = idx + p_iov->first_vf_in_pf;
291 concrete = qed_vfid_to_concrete(p_hwfn, vf->abs_vf_id);
292 vf->concrete_fid = concrete;
293 vf->opaque_fid = (p_hwfn->hw_info.opaque_fid & 0xff) |
294 (vf->abs_vf_id << 8);
295 vf->vport_id = idx + 1;
296 }
297}
298
299static int qed_iov_allocate_vfdb(struct qed_hwfn *p_hwfn)
300{
301 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
302 void **p_v_addr;
303 u16 num_vfs = 0;
304
305 num_vfs = p_hwfn->cdev->p_iov_info->total_vfs;
306
307 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
308 "qed_iov_allocate_vfdb for %d VFs\n", num_vfs);
309
310 /* Allocate PF Mailbox buffer (per-VF) */
311 p_iov_info->mbx_msg_size = sizeof(union vfpf_tlvs) * num_vfs;
312 p_v_addr = &p_iov_info->mbx_msg_virt_addr;
313 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
314 p_iov_info->mbx_msg_size,
315 &p_iov_info->mbx_msg_phys_addr,
316 GFP_KERNEL);
317 if (!*p_v_addr)
318 return -ENOMEM;
319
320 /* Allocate PF Mailbox Reply buffer (per-VF) */
321 p_iov_info->mbx_reply_size = sizeof(union pfvf_tlvs) * num_vfs;
322 p_v_addr = &p_iov_info->mbx_reply_virt_addr;
323 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
324 p_iov_info->mbx_reply_size,
325 &p_iov_info->mbx_reply_phys_addr,
326 GFP_KERNEL);
327 if (!*p_v_addr)
328 return -ENOMEM;
329
330 p_iov_info->bulletins_size = sizeof(struct qed_bulletin_content) *
331 num_vfs;
332 p_v_addr = &p_iov_info->p_bulletins;
333 *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
334 p_iov_info->bulletins_size,
335 &p_iov_info->bulletins_phys,
336 GFP_KERNEL);
337 if (!*p_v_addr)
338 return -ENOMEM;
339
340 DP_VERBOSE(p_hwfn,
341 QED_MSG_IOV,
342 "PF's Requests mailbox [%p virt 0x%llx phys], Response mailbox [%p virt 0x%llx phys] Bulletins [%p virt 0x%llx phys]\n",
343 p_iov_info->mbx_msg_virt_addr,
344 (u64) p_iov_info->mbx_msg_phys_addr,
345 p_iov_info->mbx_reply_virt_addr,
346 (u64) p_iov_info->mbx_reply_phys_addr,
347 p_iov_info->p_bulletins, (u64) p_iov_info->bulletins_phys);
348
349 return 0;
350}
351
352static void qed_iov_free_vfdb(struct qed_hwfn *p_hwfn)
353{
354 struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
355
356 if (p_hwfn->pf_iov_info->mbx_msg_virt_addr)
357 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
358 p_iov_info->mbx_msg_size,
359 p_iov_info->mbx_msg_virt_addr,
360 p_iov_info->mbx_msg_phys_addr);
361
362 if (p_hwfn->pf_iov_info->mbx_reply_virt_addr)
363 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
364 p_iov_info->mbx_reply_size,
365 p_iov_info->mbx_reply_virt_addr,
366 p_iov_info->mbx_reply_phys_addr);
367
368 if (p_iov_info->p_bulletins)
369 dma_free_coherent(&p_hwfn->cdev->pdev->dev,
370 p_iov_info->bulletins_size,
371 p_iov_info->p_bulletins,
372 p_iov_info->bulletins_phys);
373}
374
375int qed_iov_alloc(struct qed_hwfn *p_hwfn)
376{
377 struct qed_pf_iov *p_sriov;
378
379 if (!IS_PF_SRIOV(p_hwfn)) {
380 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
381 "No SR-IOV - no need for IOV db\n");
382 return 0;
383 }
384
385 p_sriov = kzalloc(sizeof(*p_sriov), GFP_KERNEL);
386 if (!p_sriov) {
387 DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_sriov'\n");
388 return -ENOMEM;
389 }
390
391 p_hwfn->pf_iov_info = p_sriov;
392
393 return qed_iov_allocate_vfdb(p_hwfn);
394}
395
396void qed_iov_setup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
397{
398 if (!IS_PF_SRIOV(p_hwfn) || !IS_PF_SRIOV_ALLOC(p_hwfn))
399 return;
400
401 qed_iov_setup_vfdb(p_hwfn);
402 qed_iov_clear_vf_igu_blocks(p_hwfn, p_ptt);
403}
404
405void qed_iov_free(struct qed_hwfn *p_hwfn)
406{
407 if (IS_PF_SRIOV_ALLOC(p_hwfn)) {
408 qed_iov_free_vfdb(p_hwfn);
409 kfree(p_hwfn->pf_iov_info);
410 }
411}
412
413void qed_iov_free_hw_info(struct qed_dev *cdev)
414{
415 kfree(cdev->p_iov_info);
416 cdev->p_iov_info = NULL;
417}
418
419int qed_iov_hw_info(struct qed_hwfn *p_hwfn)
420{
421 struct qed_dev *cdev = p_hwfn->cdev;
422 int pos;
423 int rc;
424
1408cc1f
YM		 425 if (IS_VF(p_hwfn->cdev))
426 return 0;
427
32a47e72
YM		 428 /* Learn the PCI configuration */
429 pos = pci_find_ext_capability(p_hwfn->cdev->pdev,
430 PCI_EXT_CAP_ID_SRIOV);
431 if (!pos) {
432 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No PCIe IOV support\n");
433 return 0;
434 }
435
436 /* Allocate a new struct for IOV information */
437 cdev->p_iov_info = kzalloc(sizeof(*cdev->p_iov_info), GFP_KERNEL);
438 if (!cdev->p_iov_info) {
439 DP_NOTICE(p_hwfn, "Can't support IOV due to lack of memory\n");
440 return -ENOMEM;
441 }
442 cdev->p_iov_info->pos = pos;
443
444 rc = qed_iov_pci_cfg_info(cdev);
445 if (rc)
446 return rc;
447
448 /* We want PF IOV to be synonemous with the existance of p_iov_info;
449 * In case the capability is published but there are no VFs, simply
450 * de-allocate the struct.
451 */
452 if (!cdev->p_iov_info->total_vfs) {
453 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
454 "IOV capabilities, but no VFs are published\n");
455 kfree(cdev->p_iov_info);
456 cdev->p_iov_info = NULL;
457 return 0;
458 }
459
460 /* Calculate the first VF index - this is a bit tricky; Basically,
461 * VFs start at offset 16 relative to PF0, and 2nd engine VFs begin
462 * after the first engine's VFs.
463 */
464 cdev->p_iov_info->first_vf_in_pf = p_hwfn->cdev->p_iov_info->offset +
465 p_hwfn->abs_pf_id - 16;
466 if (QED_PATH_ID(p_hwfn))
467 cdev->p_iov_info->first_vf_in_pf -= MAX_NUM_VFS_BB;
468
469 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
470 "First VF in hwfn 0x%08x\n",
471 cdev->p_iov_info->first_vf_in_pf);
472
473 return 0;
474}
475
37bff2b9
YM		 476static bool qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn, int vfid)
477{
478 /* Check PF supports sriov */
479 if (!IS_QED_SRIOV(p_hwfn->cdev) || !IS_PF_SRIOV_ALLOC(p_hwfn))
480 return false;
481
482 /* Check VF validity */
1408cc1f
YM		 483 if (IS_VF(p_hwfn->cdev) || !IS_QED_SRIOV(p_hwfn->cdev) ||
484 !IS_PF_SRIOV_ALLOC(p_hwfn))
37bff2b9
YM		 485 return false;
486
487 return true;
488}
489
0b55e27d
YM		 490static void qed_iov_set_vf_to_disable(struct qed_dev *cdev,
491 u16 rel_vf_id, u8 to_disable)
492{
493 struct qed_vf_info *vf;
494 int i;
495
496 for_each_hwfn(cdev, i) {
497 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
498
499 vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
500 if (!vf)
501 continue;
502
503 vf->to_disable = to_disable;
504 }
505}
506
507void qed_iov_set_vfs_to_disable(struct qed_dev *cdev, u8 to_disable)
508{
509 u16 i;
510
511 if (!IS_QED_SRIOV(cdev))
512 return;
513
514 for (i = 0; i < cdev->p_iov_info->total_vfs; i++)
515 qed_iov_set_vf_to_disable(cdev, i, to_disable);
516}
517
1408cc1f
YM		 518static void qed_iov_vf_pglue_clear_err(struct qed_hwfn *p_hwfn,
519 struct qed_ptt *p_ptt, u8 abs_vfid)
520{
521 qed_wr(p_hwfn, p_ptt,
522 PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR + (abs_vfid >> 5) * 4,
523 1 << (abs_vfid & 0x1f));
524}
525
dacd88d6
YM		 526static void qed_iov_vf_igu_reset(struct qed_hwfn *p_hwfn,
527 struct qed_ptt *p_ptt, struct qed_vf_info *vf)
528{
529 u16 igu_sb_id;
530 int i;
531
532 /* Set VF masks and configuration - pretend */
533 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
534
535 qed_wr(p_hwfn, p_ptt, IGU_REG_STATISTIC_NUM_VF_MSG_SENT, 0);
536
537 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
538 "value in VF_CONFIGURATION of vf %d after write %x\n",
539 vf->abs_vf_id,
540 qed_rd(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION));
541
542 /* unpretend */
543 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
544
545 /* iterate over all queues, clear sb consumer */
546 for (i = 0; i < vf->num_sbs; i++) {
547 igu_sb_id = vf->igu_sbs[i];
548 /* Set then clear... */
549 qed_int_igu_cleanup_sb(p_hwfn, p_ptt, igu_sb_id, 1,
550 vf->opaque_fid);
551 qed_int_igu_cleanup_sb(p_hwfn, p_ptt, igu_sb_id, 0,
552 vf->opaque_fid);
553 }
554}
555
0b55e27d
YM		 556static void qed_iov_vf_igu_set_int(struct qed_hwfn *p_hwfn,
557 struct qed_ptt *p_ptt,
558 struct qed_vf_info *vf, bool enable)
559{
560 u32 igu_vf_conf;
561
562 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
563
564 igu_vf_conf = qed_rd(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION);
565
566 if (enable)
567 igu_vf_conf |= IGU_VF_CONF_MSI_MSIX_EN;
568 else
569 igu_vf_conf &= ~IGU_VF_CONF_MSI_MSIX_EN;
570
571 qed_wr(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION, igu_vf_conf);
572
573 /* unpretend */
574 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
575}
576
1408cc1f
YM		 577static int qed_iov_enable_vf_access(struct qed_hwfn *p_hwfn,
578 struct qed_ptt *p_ptt,
579 struct qed_vf_info *vf)
580{
581 u32 igu_vf_conf = IGU_VF_CONF_FUNC_EN;
582 int rc;
583
0b55e27d
YM		 584 if (vf->to_disable)
585 return 0;
586
1408cc1f
YM		 587 DP_VERBOSE(p_hwfn,
588 QED_MSG_IOV,
589 "Enable internal access for vf %x [abs %x]\n",
590 vf->abs_vf_id, QED_VF_ABS_ID(p_hwfn, vf));
591
592 qed_iov_vf_pglue_clear_err(p_hwfn, p_ptt, QED_VF_ABS_ID(p_hwfn, vf));
593
594 rc = qed_mcp_config_vf_msix(p_hwfn, p_ptt, vf->abs_vf_id, vf->num_sbs);
595 if (rc)
596 return rc;
597
598 qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
599
600 SET_FIELD(igu_vf_conf, IGU_VF_CONF_PARENT, p_hwfn->rel_pf_id);
601 STORE_RT_REG(p_hwfn, IGU_REG_VF_CONFIGURATION_RT_OFFSET, igu_vf_conf);
602
603 qed_init_run(p_hwfn, p_ptt, PHASE_VF, vf->abs_vf_id,
604 p_hwfn->hw_info.hw_mode);
605
606 /* unpretend */
607 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
608
609 if (vf->state != VF_STOPPED) {
610 DP_NOTICE(p_hwfn, "VF[%02x] is already started\n",
611 vf->abs_vf_id);
612 return -EINVAL;
613 }
614
615 /* Start VF */
616 rc = qed_sp_vf_start(p_hwfn, vf->concrete_fid, vf->opaque_fid);
617 if (rc)
618 DP_NOTICE(p_hwfn, "Failed to start VF[%02x]\n", vf->abs_vf_id);
619
620 vf->state = VF_FREE;
621
622 return rc;
623}
624
0b55e27d
YM		 625/**
626 * @brief qed_iov_config_perm_table - configure the permission
627 * zone table.
628 * In E4, queue zone permission table size is 320x9. There
629 * are 320 VF queues for single engine device (256 for dual
630 * engine device), and each entry has the following format:
631 * {Valid, VF[7:0]}
632 * @param p_hwfn
633 * @param p_ptt
634 * @param vf
635 * @param enable
636 */
637static void qed_iov_config_perm_table(struct qed_hwfn *p_hwfn,
638 struct qed_ptt *p_ptt,
639 struct qed_vf_info *vf, u8 enable)
640{
641 u32 reg_addr, val;
642 u16 qzone_id = 0;
643 int qid;
644
645 for (qid = 0; qid < vf->num_rxqs; qid++) {
646 qed_fw_l2_queue(p_hwfn, vf->vf_queues[qid].fw_rx_qid,
647 &qzone_id);
648
649 reg_addr = PSWHST_REG_ZONE_PERMISSION_TABLE + qzone_id * 4;
650 val = enable ? (vf->abs_vf_id | (1 << 8)) : 0;
651 qed_wr(p_hwfn, p_ptt, reg_addr, val);
652 }
653}
654
dacd88d6
YM		 655static void qed_iov_enable_vf_traffic(struct qed_hwfn *p_hwfn,
656 struct qed_ptt *p_ptt,
657 struct qed_vf_info *vf)
658{
659 /* Reset vf in IGU - interrupts are still disabled */
660 qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
661
662 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 1);
663
664 /* Permission Table */
665 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, true);
666}
667
1408cc1f
YM		 668static u8 qed_iov_alloc_vf_igu_sbs(struct qed_hwfn *p_hwfn,
669 struct qed_ptt *p_ptt,
670 struct qed_vf_info *vf, u16 num_rx_queues)
671{
672 struct qed_igu_block *igu_blocks;
673 int qid = 0, igu_id = 0;
674 u32 val = 0;
675
676 igu_blocks = p_hwfn->hw_info.p_igu_info->igu_map.igu_blocks;
677
678 if (num_rx_queues > p_hwfn->hw_info.p_igu_info->free_blks)
679 num_rx_queues = p_hwfn->hw_info.p_igu_info->free_blks;
680 p_hwfn->hw_info.p_igu_info->free_blks -= num_rx_queues;
681
682 SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER, vf->abs_vf_id);
683 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 1);
684 SET_FIELD(val, IGU_MAPPING_LINE_PF_VALID, 0);
685
686 while ((qid < num_rx_queues) &&
687 (igu_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev))) {
688 if (igu_blocks[igu_id].status & QED_IGU_STATUS_FREE) {
689 struct cau_sb_entry sb_entry;
690
691 vf->igu_sbs[qid] = (u16)igu_id;
692 igu_blocks[igu_id].status &= ~QED_IGU_STATUS_FREE;
693
694 SET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER, qid);
695
696 qed_wr(p_hwfn, p_ptt,
697 IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id,
698 val);
699
700 /* Configure igu sb in CAU which were marked valid */
701 qed_init_cau_sb_entry(p_hwfn, &sb_entry,
702 p_hwfn->rel_pf_id,
703 vf->abs_vf_id, 1);
704 qed_dmae_host2grc(p_hwfn, p_ptt,
705 (u64)(uintptr_t)&sb_entry,
706 CAU_REG_SB_VAR_MEMORY +
707 igu_id * sizeof(u64), 2, 0);
708 qid++;
709 }
710 igu_id++;
711 }
712
713 vf->num_sbs = (u8) num_rx_queues;
714
715 return vf->num_sbs;
716}
717
0b55e27d
YM		 718static void qed_iov_free_vf_igu_sbs(struct qed_hwfn *p_hwfn,
719 struct qed_ptt *p_ptt,
720 struct qed_vf_info *vf)
721{
722 struct qed_igu_info *p_info = p_hwfn->hw_info.p_igu_info;
723 int idx, igu_id;
724 u32 addr, val;
725
726 /* Invalidate igu CAM lines and mark them as free */
727 for (idx = 0; idx < vf->num_sbs; idx++) {
728 igu_id = vf->igu_sbs[idx];
729 addr = IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id;
730
731 val = qed_rd(p_hwfn, p_ptt, addr);
732 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
733 qed_wr(p_hwfn, p_ptt, addr, val);
734
735 p_info->igu_map.igu_blocks[igu_id].status |=
736 QED_IGU_STATUS_FREE;
737
738 p_hwfn->hw_info.p_igu_info->free_blks++;
739 }
740
741 vf->num_sbs = 0;
742}
743
1408cc1f
YM		 744static int qed_iov_init_hw_for_vf(struct qed_hwfn *p_hwfn,
745 struct qed_ptt *p_ptt,
746 u16 rel_vf_id, u16 num_rx_queues)
747{
748 u8 num_of_vf_avaiable_chains = 0;
749 struct qed_vf_info *vf = NULL;
750 int rc = 0;
751 u32 cids;
752 u8 i;
753
754 vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
755 if (!vf) {
756 DP_ERR(p_hwfn, "qed_iov_init_hw_for_vf : vf is NULL\n");
757 return -EINVAL;
758 }
759
760 if (vf->b_init) {
761 DP_NOTICE(p_hwfn, "VF[%d] is already active.\n", rel_vf_id);
762 return -EINVAL;
763 }
764
765 /* Limit number of queues according to number of CIDs */
766 qed_cxt_get_proto_cid_count(p_hwfn, PROTOCOLID_ETH, &cids);
767 DP_VERBOSE(p_hwfn,
768 QED_MSG_IOV,
769 "VF[%d] - requesting to initialize for 0x%04x queues [0x%04x CIDs available]\n",
770 vf->relative_vf_id, num_rx_queues, (u16) cids);
771 num_rx_queues = min_t(u16, num_rx_queues, ((u16) cids));
772
773 num_of_vf_avaiable_chains = qed_iov_alloc_vf_igu_sbs(p_hwfn,
774 p_ptt,
775 vf,
776 num_rx_queues);
777 if (!num_of_vf_avaiable_chains) {
778 DP_ERR(p_hwfn, "no available igu sbs\n");
779 return -ENOMEM;
780 }
781
782 /* Choose queue number and index ranges */
783 vf->num_rxqs = num_of_vf_avaiable_chains;
784 vf->num_txqs = num_of_vf_avaiable_chains;
785
786 for (i = 0; i < vf->num_rxqs; i++) {
787 u16 queue_id = qed_int_queue_id_from_sb_id(p_hwfn,
788 vf->igu_sbs[i]);
789
790 if (queue_id > RESC_NUM(p_hwfn, QED_L2_QUEUE)) {
791 DP_NOTICE(p_hwfn,
792 "VF[%d] will require utilizing of out-of-bounds queues - %04x\n",
793 vf->relative_vf_id, queue_id);
794 return -EINVAL;
795 }
796
797 /* CIDs are per-VF, so no problem having them 0-based. */
798 vf->vf_queues[i].fw_rx_qid = queue_id;
799 vf->vf_queues[i].fw_tx_qid = queue_id;
800 vf->vf_queues[i].fw_cid = i;
801
802 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
803 "VF[%d] - [%d] SB %04x, Tx/Rx queue %04x CID %04x\n",
804 vf->relative_vf_id, i, vf->igu_sbs[i], queue_id, i);
805 }
806 rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, vf);
807 if (!rc) {
808 vf->b_init = true;
809
810 if (IS_LEAD_HWFN(p_hwfn))
811 p_hwfn->cdev->p_iov_info->num_vfs++;
812 }
813
814 return rc;
815}
816
0b55e27d
YM		 817static int qed_iov_release_hw_for_vf(struct qed_hwfn *p_hwfn,
818 struct qed_ptt *p_ptt, u16 rel_vf_id)
819{
820 struct qed_vf_info *vf = NULL;
821 int rc = 0;
822
823 vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
824 if (!vf) {
825 DP_ERR(p_hwfn, "qed_iov_release_hw_for_vf : vf is NULL\n");
826 return -EINVAL;
827 }
828
36558c3d
YM		 829 if (vf->bulletin.p_virt)
830 memset(vf->bulletin.p_virt, 0, sizeof(*vf->bulletin.p_virt));
831
832 memset(&vf->p_vf_info, 0, sizeof(vf->p_vf_info));
833
0b55e27d
YM		 834 if (vf->state != VF_STOPPED) {
835 /* Stopping the VF */
836 rc = qed_sp_vf_stop(p_hwfn, vf->concrete_fid, vf->opaque_fid);
837
838 if (rc != 0) {
839 DP_ERR(p_hwfn, "qed_sp_vf_stop returned error %d\n",
840 rc);
841 return rc;
842 }
843
844 vf->state = VF_STOPPED;
845 }
846
847 /* disablng interrupts and resetting permission table was done during
848 * vf-close, however, we could get here without going through vf_close
849 */
850 /* Disable Interrupts for VF */
851 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
852
853 /* Reset Permission table */
854 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
855
856 vf->num_rxqs = 0;
857 vf->num_txqs = 0;
858 qed_iov_free_vf_igu_sbs(p_hwfn, p_ptt, vf);
859
860 if (vf->b_init) {
861 vf->b_init = false;
862
863 if (IS_LEAD_HWFN(p_hwfn))
864 p_hwfn->cdev->p_iov_info->num_vfs--;
865 }
866
867 return 0;
868}
869
37bff2b9
YM		 870static bool qed_iov_tlv_supported(u16 tlvtype)
871{
872 return CHANNEL_TLV_NONE < tlvtype && tlvtype < CHANNEL_TLV_MAX;
873}
874
875/* place a given tlv on the tlv buffer, continuing current tlv list */
876void *qed_add_tlv(struct qed_hwfn *p_hwfn, u8 **offset, u16 type, u16 length)
877{
878 struct channel_tlv *tl = (struct channel_tlv *)*offset;
879
880 tl->type = type;
881 tl->length = length;
882
883 /* Offset should keep pointing to next TLV (the end of the last) */
884 *offset += length;
885
886 /* Return a pointer to the start of the added tlv */
887 return *offset - length;
888}
889
890/* list the types and lengths of the tlvs on the buffer */
891void qed_dp_tlv_list(struct qed_hwfn *p_hwfn, void *tlvs_list)
892{
893 u16 i = 1, total_length = 0;
894 struct channel_tlv *tlv;
895
896 do {
897 tlv = (struct channel_tlv *)((u8 *)tlvs_list + total_length);
898
899 /* output tlv */
900 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
901 "TLV number %d: type %d, length %d\n",
902 i, tlv->type, tlv->length);
903
904 if (tlv->type == CHANNEL_TLV_LIST_END)
905 return;
906
907 /* Validate entry - protect against malicious VFs */
908 if (!tlv->length) {
909 DP_NOTICE(p_hwfn, "TLV of length 0 found\n");
910 return;
911 }
912
913 total_length += tlv->length;
914
915 if (total_length >= sizeof(struct tlv_buffer_size)) {
916 DP_NOTICE(p_hwfn, "TLV ==> Buffer overflow\n");
917 return;
918 }
919
920 i++;
921 } while (1);
922}
923
924static void qed_iov_send_response(struct qed_hwfn *p_hwfn,
925 struct qed_ptt *p_ptt,
926 struct qed_vf_info *p_vf,
927 u16 length, u8 status)
928{
929 struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
930 struct qed_dmae_params params;
931 u8 eng_vf_id;
932
933 mbx->reply_virt->default_resp.hdr.status = status;
934
935 qed_dp_tlv_list(p_hwfn, mbx->reply_virt);
936
937 eng_vf_id = p_vf->abs_vf_id;
938
939 memset(&params, 0, sizeof(struct qed_dmae_params));
940 params.flags = QED_DMAE_FLAG_VF_DST;
941 params.dst_vfid = eng_vf_id;
942
943 qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys + sizeof(u64),
944 mbx->req_virt->first_tlv.reply_address +
945 sizeof(u64),
946 (sizeof(union pfvf_tlvs) - sizeof(u64)) / 4,
947 &params);
948
949 qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys,
950 mbx->req_virt->first_tlv.reply_address,
951 sizeof(u64) / 4, &params);
952
953 REG_WR(p_hwfn,
954 GTT_BAR0_MAP_REG_USDM_RAM +
955 USTORM_VF_PF_CHANNEL_READY_OFFSET(eng_vf_id), 1);
956}
957
dacd88d6
YM		 958static u16 qed_iov_vport_to_tlv(struct qed_hwfn *p_hwfn,
959 enum qed_iov_vport_update_flag flag)
960{
961 switch (flag) {
962 case QED_IOV_VP_UPDATE_ACTIVATE:
963 return CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
17b235c1
YM		 964 case QED_IOV_VP_UPDATE_VLAN_STRIP:
965 return CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
966 case QED_IOV_VP_UPDATE_TX_SWITCH:
967 return CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
dacd88d6
YM		 968 case QED_IOV_VP_UPDATE_MCAST:
969 return CHANNEL_TLV_VPORT_UPDATE_MCAST;
970 case QED_IOV_VP_UPDATE_ACCEPT_PARAM:
971 return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
972 case QED_IOV_VP_UPDATE_RSS:
973 return CHANNEL_TLV_VPORT_UPDATE_RSS;
17b235c1
YM		 974 case QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN:
975 return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
976 case QED_IOV_VP_UPDATE_SGE_TPA:
977 return CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
dacd88d6
YM		 978 default:
979 return 0;
980 }
981}
982
983static u16 qed_iov_prep_vp_update_resp_tlvs(struct qed_hwfn *p_hwfn,
984 struct qed_vf_info *p_vf,
985 struct qed_iov_vf_mbx *p_mbx,
986 u8 status,
987 u16 tlvs_mask, u16 tlvs_accepted)
988{
989 struct pfvf_def_resp_tlv *resp;
990 u16 size, total_len, i;
991
992 memset(p_mbx->reply_virt, 0, sizeof(union pfvf_tlvs));
993 p_mbx->offset = (u8 *)p_mbx->reply_virt;
994 size = sizeof(struct pfvf_def_resp_tlv);
995 total_len = size;
996
997 qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_VPORT_UPDATE, size);
998
999 /* Prepare response for all extended tlvs if they are found by PF */
1000 for (i = 0; i < QED_IOV_VP_UPDATE_MAX; i++) {
1001 if (!(tlvs_mask & (1 << i)))
1002 continue;
1003
1004 resp = qed_add_tlv(p_hwfn, &p_mbx->offset,
1005 qed_iov_vport_to_tlv(p_hwfn, i), size);
1006
1007 if (tlvs_accepted & (1 << i))
1008 resp->hdr.status = status;
1009 else
1010 resp->hdr.status = PFVF_STATUS_NOT_SUPPORTED;
1011
1012 DP_VERBOSE(p_hwfn,
1013 QED_MSG_IOV,
1014 "VF[%d] - vport_update response: TLV %d, status %02x\n",
1015 p_vf->relative_vf_id,
1016 qed_iov_vport_to_tlv(p_hwfn, i), resp->hdr.status);
1017
1018 total_len += size;
1019 }
1020
1021 qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_LIST_END,
1022 sizeof(struct channel_list_end_tlv));
1023
1024 return total_len;
1025}
1026
37bff2b9
YM		 1027static void qed_iov_prepare_resp(struct qed_hwfn *p_hwfn,
1028 struct qed_ptt *p_ptt,
1029 struct qed_vf_info *vf_info,
1030 u16 type, u16 length, u8 status)
1031{
1032 struct qed_iov_vf_mbx *mbx = &vf_info->vf_mbx;
1033
1034 mbx->offset = (u8 *)mbx->reply_virt;
1035
1036 qed_add_tlv(p_hwfn, &mbx->offset, type, length);
1037 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
1038 sizeof(struct channel_list_end_tlv));
1039
1040 qed_iov_send_response(p_hwfn, p_ptt, vf_info, length, status);
1041}
1042
0b55e27d
YM		 1043struct qed_public_vf_info *qed_iov_get_public_vf_info(struct qed_hwfn *p_hwfn,
1044 u16 relative_vf_id,
1045 bool b_enabled_only)
1046{
1047 struct qed_vf_info *vf = NULL;
1048
1049 vf = qed_iov_get_vf_info(p_hwfn, relative_vf_id, b_enabled_only);
1050 if (!vf)
1051 return NULL;
1052
1053 return &vf->p_vf_info;
1054}
1055
1056void qed_iov_clean_vf(struct qed_hwfn *p_hwfn, u8 vfid)
1057{
1058 struct qed_public_vf_info *vf_info;
1059
1060 vf_info = qed_iov_get_public_vf_info(p_hwfn, vfid, false);
1061
1062 if (!vf_info)
1063 return;
1064
1065 /* Clear the VF mac */
1066 memset(vf_info->mac, 0, ETH_ALEN);
1067}
1068
1069static void qed_iov_vf_cleanup(struct qed_hwfn *p_hwfn,
1070 struct qed_vf_info *p_vf)
1071{
1072 u32 i;
1073
1074 p_vf->vf_bulletin = 0;
dacd88d6 1075 p_vf->vport_instance = 0;
0b55e27d
YM		 1076 p_vf->num_mac_filters = 0;
1077 p_vf->num_vlan_filters = 0;
08feecd7 1078 p_vf->configured_features = 0;
0b55e27d
YM		 1079
1080 /* If VF previously requested less resources, go back to default */
1081 p_vf->num_rxqs = p_vf->num_sbs;
1082 p_vf->num_txqs = p_vf->num_sbs;
1083
dacd88d6
YM		 1084 p_vf->num_active_rxqs = 0;
1085
0b55e27d
YM		 1086 for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++)
1087 p_vf->vf_queues[i].rxq_active = 0;
1088
08feecd7 1089 memset(&p_vf->shadow_config, 0, sizeof(p_vf->shadow_config));
0b55e27d
YM		 1090 qed_iov_clean_vf(p_hwfn, p_vf->relative_vf_id);
1091}
1092
1408cc1f
YM		 1093static void qed_iov_vf_mbx_acquire(struct qed_hwfn *p_hwfn,
1094 struct qed_ptt *p_ptt,
1095 struct qed_vf_info *vf)
37bff2b9 1096{
1408cc1f
YM		 1097 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1098 struct pfvf_acquire_resp_tlv *resp = &mbx->reply_virt->acquire_resp;
1099 struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
1100 struct vfpf_acquire_tlv *req = &mbx->req_virt->acquire;
1101 u8 i, vfpf_status = PFVF_STATUS_SUCCESS;
1102 struct pf_vf_resc *resc = &resp->resc;
1103
1104 /* Validate FW compatibility */
1105 if (req->vfdev_info.fw_major != FW_MAJOR_VERSION ||
1106 req->vfdev_info.fw_minor != FW_MINOR_VERSION ||
1107 req->vfdev_info.fw_revision != FW_REVISION_VERSION ||
1108 req->vfdev_info.fw_engineering != FW_ENGINEERING_VERSION) {
1109 DP_INFO(p_hwfn,
1110 "VF[%d] is running an incompatible driver [VF needs FW %02x:%02x:%02x:%02x but Hypervisor is using %02x:%02x:%02x:%02x]\n",
1111 vf->abs_vf_id,
1112 req->vfdev_info.fw_major,
1113 req->vfdev_info.fw_minor,
1114 req->vfdev_info.fw_revision,
1115 req->vfdev_info.fw_engineering,
1116 FW_MAJOR_VERSION,
1117 FW_MINOR_VERSION,
1118 FW_REVISION_VERSION, FW_ENGINEERING_VERSION);
1119 vfpf_status = PFVF_STATUS_NOT_SUPPORTED;
1120 goto out;
1121 }
1122
1123 /* On 100g PFs, prevent old VFs from loading */
1124 if ((p_hwfn->cdev->num_hwfns > 1) &&
1125 !(req->vfdev_info.capabilities & VFPF_ACQUIRE_CAP_100G)) {
1126 DP_INFO(p_hwfn,
1127 "VF[%d] is running an old driver that doesn't support 100g\n",
1128 vf->abs_vf_id);
1129 vfpf_status = PFVF_STATUS_NOT_SUPPORTED;
1130 goto out;
1131 }
1132
1133 memset(resp, 0, sizeof(*resp));
1134
1135 /* Fill in vf info stuff */
1136 vf->opaque_fid = req->vfdev_info.opaque_fid;
1137 vf->num_mac_filters = 1;
1138 vf->num_vlan_filters = QED_ETH_VF_NUM_VLAN_FILTERS;
1139
1140 vf->vf_bulletin = req->bulletin_addr;
1141 vf->bulletin.size = (vf->bulletin.size < req->bulletin_size) ?
1142 vf->bulletin.size : req->bulletin_size;
1143
1144 /* fill in pfdev info */
1145 pfdev_info->chip_num = p_hwfn->cdev->chip_num;
1146 pfdev_info->db_size = 0;
1147 pfdev_info->indices_per_sb = PIS_PER_SB;
1148
1149 pfdev_info->capabilities = PFVF_ACQUIRE_CAP_DEFAULT_UNTAGGED |
1150 PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE;
1151 if (p_hwfn->cdev->num_hwfns > 1)
1152 pfdev_info->capabilities |= PFVF_ACQUIRE_CAP_100G;
1153
1154 pfdev_info->stats_info.mstats.address =
1155 PXP_VF_BAR0_START_MSDM_ZONE_B +
1156 offsetof(struct mstorm_vf_zone, non_trigger.eth_queue_stat);
1157 pfdev_info->stats_info.mstats.len =
1158 sizeof(struct eth_mstorm_per_queue_stat);
1159
1160 pfdev_info->stats_info.ustats.address =
1161 PXP_VF_BAR0_START_USDM_ZONE_B +
1162 offsetof(struct ustorm_vf_zone, non_trigger.eth_queue_stat);
1163 pfdev_info->stats_info.ustats.len =
1164 sizeof(struct eth_ustorm_per_queue_stat);
1165
1166 pfdev_info->stats_info.pstats.address =
1167 PXP_VF_BAR0_START_PSDM_ZONE_B +
1168 offsetof(struct pstorm_vf_zone, non_trigger.eth_queue_stat);
1169 pfdev_info->stats_info.pstats.len =
1170 sizeof(struct eth_pstorm_per_queue_stat);
1171
1172 pfdev_info->stats_info.tstats.address = 0;
1173 pfdev_info->stats_info.tstats.len = 0;
1174
1175 memcpy(pfdev_info->port_mac, p_hwfn->hw_info.hw_mac_addr, ETH_ALEN);
1176
1177 pfdev_info->fw_major = FW_MAJOR_VERSION;
1178 pfdev_info->fw_minor = FW_MINOR_VERSION;
1179 pfdev_info->fw_rev = FW_REVISION_VERSION;
1180 pfdev_info->fw_eng = FW_ENGINEERING_VERSION;
1181 pfdev_info->os_type = VFPF_ACQUIRE_OS_LINUX;
1182 qed_mcp_get_mfw_ver(p_hwfn, p_ptt, &pfdev_info->mfw_ver, NULL);
1183
1184 pfdev_info->dev_type = p_hwfn->cdev->type;
1185 pfdev_info->chip_rev = p_hwfn->cdev->chip_rev;
1186
1187 resc->num_rxqs = vf->num_rxqs;
1188 resc->num_txqs = vf->num_txqs;
1189 resc->num_sbs = vf->num_sbs;
1190 for (i = 0; i < resc->num_sbs; i++) {
1191 resc->hw_sbs[i].hw_sb_id = vf->igu_sbs[i];
1192 resc->hw_sbs[i].sb_qid = 0;
1193 }
1194
1195 for (i = 0; i < resc->num_rxqs; i++) {
1196 qed_fw_l2_queue(p_hwfn, vf->vf_queues[i].fw_rx_qid,
1197 (u16 *)&resc->hw_qid[i]);
1198 resc->cid[i] = vf->vf_queues[i].fw_cid;
1199 }
1200
1201 resc->num_mac_filters = min_t(u8, vf->num_mac_filters,
1202 req->resc_request.num_mac_filters);
1203 resc->num_vlan_filters = min_t(u8, vf->num_vlan_filters,
1204 req->resc_request.num_vlan_filters);
1205
1206 /* This isn't really required as VF isn't limited, but some VFs might
1207 * actually test this value, so need to provide it.
1208 */
1209 resc->num_mc_filters = req->resc_request.num_mc_filters;
1210
1211 /* Fill agreed size of bulletin board in response */
1212 resp->bulletin_size = vf->bulletin.size;
36558c3d 1213 qed_iov_post_vf_bulletin(p_hwfn, vf->relative_vf_id, p_ptt);
1408cc1f
YM		 1214
1215 DP_VERBOSE(p_hwfn,
1216 QED_MSG_IOV,
1217 "VF[%d] ACQUIRE_RESPONSE: pfdev_info- chip_num=0x%x, db_size=%d, idx_per_sb=%d, pf_cap=0x%llx\n"
1218 "resources- n_rxq-%d, n_txq-%d, n_sbs-%d, n_macs-%d, n_vlans-%d\n",
1219 vf->abs_vf_id,
1220 resp->pfdev_info.chip_num,
1221 resp->pfdev_info.db_size,
1222 resp->pfdev_info.indices_per_sb,
1223 resp->pfdev_info.capabilities,
1224 resc->num_rxqs,
1225 resc->num_txqs,
1226 resc->num_sbs,
1227 resc->num_mac_filters,
1228 resc->num_vlan_filters);
1229 vf->state = VF_ACQUIRED;
1230
1231 /* Prepare Response */
1232out:
1233 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_ACQUIRE,
1234 sizeof(struct pfvf_acquire_resp_tlv), vfpf_status);
37bff2b9
YM		 1235}
1236
6ddc7608
YM		 1237static int __qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn,
1238 struct qed_vf_info *p_vf, bool val)
1239{
1240 struct qed_sp_vport_update_params params;
1241 int rc;
1242
1243 if (val == p_vf->spoof_chk) {
1244 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1245 "Spoofchk value[%d] is already configured\n", val);
1246 return 0;
1247 }
1248
1249 memset(&params, 0, sizeof(struct qed_sp_vport_update_params));
1250 params.opaque_fid = p_vf->opaque_fid;
1251 params.vport_id = p_vf->vport_id;
1252 params.update_anti_spoofing_en_flg = 1;
1253 params.anti_spoofing_en = val;
1254
1255 rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
1256 if (rc) {
1257 p_vf->spoof_chk = val;
1258 p_vf->req_spoofchk_val = p_vf->spoof_chk;
1259 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1260 "Spoofchk val[%d] configured\n", val);
1261 } else {
1262 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1263 "Spoofchk configuration[val:%d] failed for VF[%d]\n",
1264 val, p_vf->relative_vf_id);
1265 }
1266
1267 return rc;
1268}
1269
08feecd7
YM		 1270static int qed_iov_reconfigure_unicast_vlan(struct qed_hwfn *p_hwfn,
1271 struct qed_vf_info *p_vf)
1272{
1273 struct qed_filter_ucast filter;
1274 int rc = 0;
1275 int i;
1276
1277 memset(&filter, 0, sizeof(filter));
1278 filter.is_rx_filter = 1;
1279 filter.is_tx_filter = 1;
1280 filter.vport_to_add_to = p_vf->vport_id;
1281 filter.opcode = QED_FILTER_ADD;
1282
1283 /* Reconfigure vlans */
1284 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
1285 if (!p_vf->shadow_config.vlans[i].used)
1286 continue;
1287
1288 filter.type = QED_FILTER_VLAN;
1289 filter.vlan = p_vf->shadow_config.vlans[i].vid;
1290 DP_VERBOSE(p_hwfn,
1291 QED_MSG_IOV,
1292 "Reconfiguring VLAN [0x%04x] for VF [%04x]\n",
1293 filter.vlan, p_vf->relative_vf_id);
1294 rc = qed_sp_eth_filter_ucast(p_hwfn,
1295 p_vf->opaque_fid,
1296 &filter,
1297 QED_SPQ_MODE_CB, NULL);
1298 if (rc) {
1299 DP_NOTICE(p_hwfn,
1300 "Failed to configure VLAN [%04x] to VF [%04x]\n",
1301 filter.vlan, p_vf->relative_vf_id);
1302 break;
1303 }
1304 }
1305
1306 return rc;
1307}
1308
1309static int
1310qed_iov_reconfigure_unicast_shadow(struct qed_hwfn *p_hwfn,
1311 struct qed_vf_info *p_vf, u64 events)
1312{
1313 int rc = 0;
1314
1315 if ((events & (1 << VLAN_ADDR_FORCED)) &&
1316 !(p_vf->configured_features & (1 << VLAN_ADDR_FORCED)))
1317 rc = qed_iov_reconfigure_unicast_vlan(p_hwfn, p_vf);
1318
1319 return rc;
1320}
1321
1322static int qed_iov_configure_vport_forced(struct qed_hwfn *p_hwfn,
1323 struct qed_vf_info *p_vf, u64 events)
1324{
1325 int rc = 0;
1326 struct qed_filter_ucast filter;
1327
1328 if (!p_vf->vport_instance)
1329 return -EINVAL;
1330
eff16960
YM		 1331 if (events & (1 << MAC_ADDR_FORCED)) {
1332 /* Since there's no way [currently] of removing the MAC,
1333 * we can always assume this means we need to force it.
1334 */
1335 memset(&filter, 0, sizeof(filter));
1336 filter.type = QED_FILTER_MAC;
1337 filter.opcode = QED_FILTER_REPLACE;
1338 filter.is_rx_filter = 1;
1339 filter.is_tx_filter = 1;
1340 filter.vport_to_add_to = p_vf->vport_id;
1341 ether_addr_copy(filter.mac, p_vf->bulletin.p_virt->mac);
1342
1343 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1344 &filter, QED_SPQ_MODE_CB, NULL);
1345 if (rc) {
1346 DP_NOTICE(p_hwfn,
1347 "PF failed to configure MAC for VF\n");
1348 return rc;
1349 }
1350
1351 p_vf->configured_features |= 1 << MAC_ADDR_FORCED;
1352 }
1353
08feecd7
YM		 1354 if (events & (1 << VLAN_ADDR_FORCED)) {
1355 struct qed_sp_vport_update_params vport_update;
1356 u8 removal;
1357 int i;
1358
1359 memset(&filter, 0, sizeof(filter));
1360 filter.type = QED_FILTER_VLAN;
1361 filter.is_rx_filter = 1;
1362 filter.is_tx_filter = 1;
1363 filter.vport_to_add_to = p_vf->vport_id;
1364 filter.vlan = p_vf->bulletin.p_virt->pvid;
1365 filter.opcode = filter.vlan ? QED_FILTER_REPLACE :
1366 QED_FILTER_FLUSH;
1367
1368 /* Send the ramrod */
1369 rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1370 &filter, QED_SPQ_MODE_CB, NULL);
1371 if (rc) {
1372 DP_NOTICE(p_hwfn,
1373 "PF failed to configure VLAN for VF\n");
1374 return rc;
1375 }
1376
1377 /* Update the default-vlan & silent vlan stripping */
1378 memset(&vport_update, 0, sizeof(vport_update));
1379 vport_update.opaque_fid = p_vf->opaque_fid;
1380 vport_update.vport_id = p_vf->vport_id;
1381 vport_update.update_default_vlan_enable_flg = 1;
1382 vport_update.default_vlan_enable_flg = filter.vlan ? 1 : 0;
1383 vport_update.update_default_vlan_flg = 1;
1384 vport_update.default_vlan = filter.vlan;
1385
1386 vport_update.update_inner_vlan_removal_flg = 1;
1387 removal = filter.vlan ? 1
1388 : p_vf->shadow_config.inner_vlan_removal;
1389 vport_update.inner_vlan_removal_flg = removal;
1390 vport_update.silent_vlan_removal_flg = filter.vlan ? 1 : 0;
1391 rc = qed_sp_vport_update(p_hwfn,
1392 &vport_update,
1393 QED_SPQ_MODE_EBLOCK, NULL);
1394 if (rc) {
1395 DP_NOTICE(p_hwfn,
1396 "PF failed to configure VF vport for vlan\n");
1397 return rc;
1398 }
1399
1400 /* Update all the Rx queues */
1401 for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) {
1402 u16 qid;
1403
1404 if (!p_vf->vf_queues[i].rxq_active)
1405 continue;
1406
1407 qid = p_vf->vf_queues[i].fw_rx_qid;
1408
1409 rc = qed_sp_eth_rx_queues_update(p_hwfn, qid,
1410 1, 0, 1,
1411 QED_SPQ_MODE_EBLOCK,
1412 NULL);
1413 if (rc) {
1414 DP_NOTICE(p_hwfn,
1415 "Failed to send Rx update fo queue[0x%04x]\n",
1416 qid);
1417 return rc;
1418 }
1419 }
1420
1421 if (filter.vlan)
1422 p_vf->configured_features |= 1 << VLAN_ADDR_FORCED;
1423 else
1424 p_vf->configured_features &= ~(1 << VLAN_ADDR_FORCED);
1425 }
1426
1427 /* If forced features are terminated, we need to configure the shadow
1428 * configuration back again.
1429 */
1430 if (events)
1431 qed_iov_reconfigure_unicast_shadow(p_hwfn, p_vf, events);
1432
1433 return rc;
1434}
1435
dacd88d6
YM		 1436static void qed_iov_vf_mbx_start_vport(struct qed_hwfn *p_hwfn,
1437 struct qed_ptt *p_ptt,
1438 struct qed_vf_info *vf)
1439{
1440 struct qed_sp_vport_start_params params = { 0 };
1441 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1442 struct vfpf_vport_start_tlv *start;
1443 u8 status = PFVF_STATUS_SUCCESS;
1444 struct qed_vf_info *vf_info;
08feecd7 1445 u64 *p_bitmap;
dacd88d6
YM		 1446 int sb_id;
1447 int rc;
1448
1449 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vf->relative_vf_id, true);
1450 if (!vf_info) {
1451 DP_NOTICE(p_hwfn->cdev,
1452 "Failed to get VF info, invalid vfid [%d]\n",
1453 vf->relative_vf_id);
1454 return;
1455 }
1456
1457 vf->state = VF_ENABLED;
1458 start = &mbx->req_virt->start_vport;
1459
1460 /* Initialize Status block in CAU */
1461 for (sb_id = 0; sb_id < vf->num_sbs; sb_id++) {
1462 if (!start->sb_addr[sb_id]) {
1463 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1464 "VF[%d] did not fill the address of SB %d\n",
1465 vf->relative_vf_id, sb_id);
1466 break;
1467 }
1468
1469 qed_int_cau_conf_sb(p_hwfn, p_ptt,
1470 start->sb_addr[sb_id],
1471 vf->igu_sbs[sb_id],
1472 vf->abs_vf_id, 1);
1473 }
1474 qed_iov_enable_vf_traffic(p_hwfn, p_ptt, vf);
1475
1476 vf->mtu = start->mtu;
08feecd7
YM		 1477 vf->shadow_config.inner_vlan_removal = start->inner_vlan_removal;
1478
1479 /* Take into consideration configuration forced by hypervisor;
1480 * If none is configured, use the supplied VF values [for old
1481 * vfs that would still be fine, since they passed '0' as padding].
1482 */
1483 p_bitmap = &vf_info->bulletin.p_virt->valid_bitmap;
1484 if (!(*p_bitmap & (1 << VFPF_BULLETIN_UNTAGGED_DEFAULT_FORCED))) {
1485 u8 vf_req = start->only_untagged;
1486
1487 vf_info->bulletin.p_virt->default_only_untagged = vf_req;
1488 *p_bitmap |= 1 << VFPF_BULLETIN_UNTAGGED_DEFAULT;
1489 }
dacd88d6
YM		 1490
1491 params.tpa_mode = start->tpa_mode;
1492 params.remove_inner_vlan = start->inner_vlan_removal;
1493
08feecd7 1494 params.only_untagged = vf_info->bulletin.p_virt->default_only_untagged;
dacd88d6
YM		 1495 params.drop_ttl0 = false;
1496 params.concrete_fid = vf->concrete_fid;
1497 params.opaque_fid = vf->opaque_fid;
1498 params.vport_id = vf->vport_id;
1499 params.max_buffers_per_cqe = start->max_buffers_per_cqe;
1500 params.mtu = vf->mtu;
1501
1502 rc = qed_sp_eth_vport_start(p_hwfn, &params);
1503 if (rc != 0) {
1504 DP_ERR(p_hwfn,
1505 "qed_iov_vf_mbx_start_vport returned error %d\n", rc);
1506 status = PFVF_STATUS_FAILURE;
1507 } else {
1508 vf->vport_instance++;
08feecd7
YM		 1509
1510 /* Force configuration if needed on the newly opened vport */
1511 qed_iov_configure_vport_forced(p_hwfn, vf, *p_bitmap);
6ddc7608
YM		 1512
1513 __qed_iov_spoofchk_set(p_hwfn, vf, vf->req_spoofchk_val);
dacd88d6
YM		 1514 }
1515 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_START,
1516 sizeof(struct pfvf_def_resp_tlv), status);
1517}
1518
1519static void qed_iov_vf_mbx_stop_vport(struct qed_hwfn *p_hwfn,
1520 struct qed_ptt *p_ptt,
1521 struct qed_vf_info *vf)
1522{
1523 u8 status = PFVF_STATUS_SUCCESS;
1524 int rc;
1525
1526 vf->vport_instance--;
6ddc7608 1527 vf->spoof_chk = false;
dacd88d6
YM		 1528
1529 rc = qed_sp_vport_stop(p_hwfn, vf->opaque_fid, vf->vport_id);
1530 if (rc != 0) {
1531 DP_ERR(p_hwfn, "qed_iov_vf_mbx_stop_vport returned error %d\n",
1532 rc);
1533 status = PFVF_STATUS_FAILURE;
1534 }
1535
08feecd7
YM		 1536 /* Forget the configuration on the vport */
1537 vf->configured_features = 0;
1538 memset(&vf->shadow_config, 0, sizeof(vf->shadow_config));
1539
dacd88d6
YM		 1540 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_TEARDOWN,
1541 sizeof(struct pfvf_def_resp_tlv), status);
1542}
1543
1544#define TSTORM_QZONE_START PXP_VF_BAR0_START_SDM_ZONE_A
1545#define MSTORM_QZONE_START(dev) (TSTORM_QZONE_START + \
1546 (TSTORM_QZONE_SIZE * NUM_OF_L2_QUEUES(dev)))
1547
1548static void qed_iov_vf_mbx_start_rxq_resp(struct qed_hwfn *p_hwfn,
1549 struct qed_ptt *p_ptt,
1550 struct qed_vf_info *vf, u8 status)
1551{
1552 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1553 struct pfvf_start_queue_resp_tlv *p_tlv;
1554 struct vfpf_start_rxq_tlv *req;
1555
1556 mbx->offset = (u8 *)mbx->reply_virt;
1557
1558 p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_RXQ,
1559 sizeof(*p_tlv));
1560 qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
1561 sizeof(struct channel_list_end_tlv));
1562
1563 /* Update the TLV with the response */
1564 if (status == PFVF_STATUS_SUCCESS) {
1565 u16 hw_qid = 0;
1566
1567 req = &mbx->req_virt->start_rxq;
1568 qed_fw_l2_queue(p_hwfn, vf->vf_queues[req->rx_qid].fw_rx_qid,
1569 &hw_qid);
1570
1571 p_tlv->offset = MSTORM_QZONE_START(p_hwfn->cdev) +
1572 hw_qid * MSTORM_QZONE_SIZE +
1573 offsetof(struct mstorm_eth_queue_zone,
1574 rx_producers);
1575 }
1576
1577 qed_iov_send_response(p_hwfn, p_ptt, vf, sizeof(*p_tlv), status);
1578}
1579
1580static void qed_iov_vf_mbx_start_rxq(struct qed_hwfn *p_hwfn,
1581 struct qed_ptt *p_ptt,
1582 struct qed_vf_info *vf)
1583{
1584 struct qed_queue_start_common_params params;
1585 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1586 u8 status = PFVF_STATUS_SUCCESS;
1587 struct vfpf_start_rxq_tlv *req;
1588 int rc;
1589
1590 memset(&params, 0, sizeof(params));
1591 req = &mbx->req_virt->start_rxq;
1592 params.queue_id = vf->vf_queues[req->rx_qid].fw_rx_qid;
1593 params.vport_id = vf->vport_id;
1594 params.sb = req->hw_sb;
1595 params.sb_idx = req->sb_index;
1596
1597 rc = qed_sp_eth_rxq_start_ramrod(p_hwfn, vf->opaque_fid,
1598 vf->vf_queues[req->rx_qid].fw_cid,
1599 &params,
1600 vf->abs_vf_id + 0x10,
1601 req->bd_max_bytes,
1602 req->rxq_addr,
1603 req->cqe_pbl_addr, req->cqe_pbl_size);
1604
1605 if (rc) {
1606 status = PFVF_STATUS_FAILURE;
1607 } else {
1608 vf->vf_queues[req->rx_qid].rxq_active = true;
1609 vf->num_active_rxqs++;
1610 }
1611
1612 qed_iov_vf_mbx_start_rxq_resp(p_hwfn, p_ptt, vf, status);
1613}
1614
1615static void qed_iov_vf_mbx_start_txq(struct qed_hwfn *p_hwfn,
1616 struct qed_ptt *p_ptt,
1617 struct qed_vf_info *vf)
1618{
1619 u16 length = sizeof(struct pfvf_def_resp_tlv);
1620 struct qed_queue_start_common_params params;
1621 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1622 union qed_qm_pq_params pq_params;
1623 u8 status = PFVF_STATUS_SUCCESS;
1624 struct vfpf_start_txq_tlv *req;
1625 int rc;
1626
1627 /* Prepare the parameters which would choose the right PQ */
1628 memset(&pq_params, 0, sizeof(pq_params));
1629 pq_params.eth.is_vf = 1;
1630 pq_params.eth.vf_id = vf->relative_vf_id;
1631
1632 memset(&params, 0, sizeof(params));
1633 req = &mbx->req_virt->start_txq;
1634 params.queue_id = vf->vf_queues[req->tx_qid].fw_tx_qid;
1635 params.vport_id = vf->vport_id;
1636 params.sb = req->hw_sb;
1637 params.sb_idx = req->sb_index;
1638
1639 rc = qed_sp_eth_txq_start_ramrod(p_hwfn,
1640 vf->opaque_fid,
1641 vf->vf_queues[req->tx_qid].fw_cid,
1642 &params,
1643 vf->abs_vf_id + 0x10,
1644 req->pbl_addr,
1645 req->pbl_size, &pq_params);
1646
1647 if (rc)
1648 status = PFVF_STATUS_FAILURE;
1649 else
1650 vf->vf_queues[req->tx_qid].txq_active = true;
1651
1652 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_START_TXQ,
1653 length, status);
1654}
1655
1656static int qed_iov_vf_stop_rxqs(struct qed_hwfn *p_hwfn,
1657 struct qed_vf_info *vf,
1658 u16 rxq_id, u8 num_rxqs, bool cqe_completion)
1659{
1660 int rc = 0;
1661 int qid;
1662
1663 if (rxq_id + num_rxqs > ARRAY_SIZE(vf->vf_queues))
1664 return -EINVAL;
1665
1666 for (qid = rxq_id; qid < rxq_id + num_rxqs; qid++) {
1667 if (vf->vf_queues[qid].rxq_active) {
1668 rc = qed_sp_eth_rx_queue_stop(p_hwfn,
1669 vf->vf_queues[qid].
1670 fw_rx_qid, false,
1671 cqe_completion);
1672
1673 if (rc)
1674 return rc;
1675 }
1676 vf->vf_queues[qid].rxq_active = false;
1677 vf->num_active_rxqs--;
1678 }
1679
1680 return rc;
1681}
1682
1683static int qed_iov_vf_stop_txqs(struct qed_hwfn *p_hwfn,
1684 struct qed_vf_info *vf, u16 txq_id, u8 num_txqs)
1685{
1686 int rc = 0;
1687 int qid;
1688
1689 if (txq_id + num_txqs > ARRAY_SIZE(vf->vf_queues))
1690 return -EINVAL;
1691
1692 for (qid = txq_id; qid < txq_id + num_txqs; qid++) {
1693 if (vf->vf_queues[qid].txq_active) {
1694 rc = qed_sp_eth_tx_queue_stop(p_hwfn,
1695 vf->vf_queues[qid].
1696 fw_tx_qid);
1697
1698 if (rc)
1699 return rc;
1700 }
1701 vf->vf_queues[qid].txq_active = false;
1702 }
1703 return rc;
1704}
1705
1706static void qed_iov_vf_mbx_stop_rxqs(struct qed_hwfn *p_hwfn,
1707 struct qed_ptt *p_ptt,
1708 struct qed_vf_info *vf)
1709{
1710 u16 length = sizeof(struct pfvf_def_resp_tlv);
1711 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1712 u8 status = PFVF_STATUS_SUCCESS;
1713 struct vfpf_stop_rxqs_tlv *req;
1714 int rc;
1715
1716 /* We give the option of starting from qid != 0, in this case we
1717 * need to make sure that qid + num_qs doesn't exceed the actual
1718 * amount of queues that exist.
1719 */
1720 req = &mbx->req_virt->stop_rxqs;
1721 rc = qed_iov_vf_stop_rxqs(p_hwfn, vf, req->rx_qid,
1722 req->num_rxqs, req->cqe_completion);
1723 if (rc)
1724 status = PFVF_STATUS_FAILURE;
1725
1726 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_RXQS,
1727 length, status);
1728}
1729
1730static void qed_iov_vf_mbx_stop_txqs(struct qed_hwfn *p_hwfn,
1731 struct qed_ptt *p_ptt,
1732 struct qed_vf_info *vf)
1733{
1734 u16 length = sizeof(struct pfvf_def_resp_tlv);
1735 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1736 u8 status = PFVF_STATUS_SUCCESS;
1737 struct vfpf_stop_txqs_tlv *req;
1738 int rc;
1739
1740 /* We give the option of starting from qid != 0, in this case we
1741 * need to make sure that qid + num_qs doesn't exceed the actual
1742 * amount of queues that exist.
1743 */
1744 req = &mbx->req_virt->stop_txqs;
1745 rc = qed_iov_vf_stop_txqs(p_hwfn, vf, req->tx_qid, req->num_txqs);
1746 if (rc)
1747 status = PFVF_STATUS_FAILURE;
1748
1749 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_TXQS,
1750 length, status);
1751}
1752
17b235c1
YM		 1753static void qed_iov_vf_mbx_update_rxqs(struct qed_hwfn *p_hwfn,
1754 struct qed_ptt *p_ptt,
1755 struct qed_vf_info *vf)
1756{
1757 u16 length = sizeof(struct pfvf_def_resp_tlv);
1758 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
1759 struct vfpf_update_rxq_tlv *req;
1760 u8 status = PFVF_STATUS_SUCCESS;
1761 u8 complete_event_flg;
1762 u8 complete_cqe_flg;
1763 u16 qid;
1764 int rc;
1765 u8 i;
1766
1767 req = &mbx->req_virt->update_rxq;
1768 complete_cqe_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_CQE_FLAG);
1769 complete_event_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG);
1770
1771 for (i = 0; i < req->num_rxqs; i++) {
1772 qid = req->rx_qid + i;
1773
1774 if (!vf->vf_queues[qid].rxq_active) {
1775 DP_NOTICE(p_hwfn, "VF rx_qid = %d isn`t active!\n",
1776 qid);
1777 status = PFVF_STATUS_FAILURE;
1778 break;
1779 }
1780
1781 rc = qed_sp_eth_rx_queues_update(p_hwfn,
1782 vf->vf_queues[qid].fw_rx_qid,
1783 1,
1784 complete_cqe_flg,
1785 complete_event_flg,
1786 QED_SPQ_MODE_EBLOCK, NULL);
1787
1788 if (rc) {
1789 status = PFVF_STATUS_FAILURE;
1790 break;
1791 }
1792 }
1793
1794 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UPDATE_RXQ,
1795 length, status);
1796}
1797
dacd88d6
YM		 1798void *qed_iov_search_list_tlvs(struct qed_hwfn *p_hwfn,
1799 void *p_tlvs_list, u16 req_type)
1800{
1801 struct channel_tlv *p_tlv = (struct channel_tlv *)p_tlvs_list;
1802 int len = 0;
1803
1804 do {
1805 if (!p_tlv->length) {
1806 DP_NOTICE(p_hwfn, "Zero length TLV found\n");
1807 return NULL;
1808 }
1809
1810 if (p_tlv->type == req_type) {
1811 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
1812 "Extended tlv type %d, length %d found\n",
1813 p_tlv->type, p_tlv->length);
1814 return p_tlv;
1815 }
1816
1817 len += p_tlv->length;
1818 p_tlv = (struct channel_tlv *)((u8 *)p_tlv + p_tlv->length);
1819
1820 if ((len + p_tlv->length) > TLV_BUFFER_SIZE) {
1821 DP_NOTICE(p_hwfn, "TLVs has overrun the buffer size\n");
1822 return NULL;
1823 }
1824 } while (p_tlv->type != CHANNEL_TLV_LIST_END);
1825
1826 return NULL;
1827}
1828
1829static void
1830qed_iov_vp_update_act_param(struct qed_hwfn *p_hwfn,
1831 struct qed_sp_vport_update_params *p_data,
1832 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
1833{
1834 struct vfpf_vport_update_activate_tlv *p_act_tlv;
1835 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
1836
1837 p_act_tlv = (struct vfpf_vport_update_activate_tlv *)
1838 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
1839 if (!p_act_tlv)
1840 return;
1841
1842 p_data->update_vport_active_rx_flg = p_act_tlv->update_rx;
1843 p_data->vport_active_rx_flg = p_act_tlv->active_rx;
1844 p_data->update_vport_active_tx_flg = p_act_tlv->update_tx;
1845 p_data->vport_active_tx_flg = p_act_tlv->active_tx;
1846 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACTIVATE;
1847}
1848
17b235c1
YM		 1849static void
1850qed_iov_vp_update_vlan_param(struct qed_hwfn *p_hwfn,
1851 struct qed_sp_vport_update_params *p_data,
1852 struct qed_vf_info *p_vf,
1853 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
1854{
1855 struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
1856 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
1857
1858 p_vlan_tlv = (struct vfpf_vport_update_vlan_strip_tlv *)
1859 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
1860 if (!p_vlan_tlv)
1861 return;
1862
08feecd7
YM		 1863 p_vf->shadow_config.inner_vlan_removal = p_vlan_tlv->remove_vlan;
1864
1865 /* Ignore the VF request if we're forcing a vlan */
1866 if (!(p_vf->configured_features & (1 << VLAN_ADDR_FORCED))) {
1867 p_data->update_inner_vlan_removal_flg = 1;
1868 p_data->inner_vlan_removal_flg = p_vlan_tlv->remove_vlan;
1869 }
17b235c1
YM		 1870
1871 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_VLAN_STRIP;
1872}
1873
1874static void
1875qed_iov_vp_update_tx_switch(struct qed_hwfn *p_hwfn,
1876 struct qed_sp_vport_update_params *p_data,
1877 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
1878{
1879 struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
1880 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
1881
1882 p_tx_switch_tlv = (struct vfpf_vport_update_tx_switch_tlv *)
1883 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
1884 tlv);
1885 if (!p_tx_switch_tlv)
1886 return;
1887
1888 p_data->update_tx_switching_flg = 1;
1889 p_data->tx_switching_flg = p_tx_switch_tlv->tx_switching;
1890 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_TX_SWITCH;
1891}
1892
dacd88d6
YM		 1893static void
1894qed_iov_vp_update_mcast_bin_param(struct qed_hwfn *p_hwfn,
1895 struct qed_sp_vport_update_params *p_data,
1896 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
1897{
1898 struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
1899 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_MCAST;
1900
1901 p_mcast_tlv = (struct vfpf_vport_update_mcast_bin_tlv *)
1902 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
1903 if (!p_mcast_tlv)
1904 return;
1905
1906 p_data->update_approx_mcast_flg = 1;
1907 memcpy(p_data->bins, p_mcast_tlv->bins,
1908 sizeof(unsigned long) * ETH_MULTICAST_MAC_BINS_IN_REGS);
1909 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_MCAST;
1910}
1911
1912static void
1913qed_iov_vp_update_accept_flag(struct qed_hwfn *p_hwfn,
1914 struct qed_sp_vport_update_params *p_data,
1915 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
1916{
1917 struct qed_filter_accept_flags *p_flags = &p_data->accept_flags;
1918 struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
1919 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
1920
1921 p_accept_tlv = (struct vfpf_vport_update_accept_param_tlv *)
1922 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
1923 if (!p_accept_tlv)
1924 return;
1925
1926 p_flags->update_rx_mode_config = p_accept_tlv->update_rx_mode;
1927 p_flags->rx_accept_filter = p_accept_tlv->rx_accept_filter;
1928 p_flags->update_tx_mode_config = p_accept_tlv->update_tx_mode;
1929 p_flags->tx_accept_filter = p_accept_tlv->tx_accept_filter;
1930 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_PARAM;
1931}
1932
17b235c1
YM		 1933static void
1934qed_iov_vp_update_accept_any_vlan(struct qed_hwfn *p_hwfn,
1935 struct qed_sp_vport_update_params *p_data,
1936 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
1937{
1938 struct vfpf_vport_update_accept_any_vlan_tlv *p_accept_any_vlan;
1939 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
1940
1941 p_accept_any_vlan = (struct vfpf_vport_update_accept_any_vlan_tlv *)
1942 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
1943 tlv);
1944 if (!p_accept_any_vlan)
1945 return;
1946
1947 p_data->accept_any_vlan = p_accept_any_vlan->accept_any_vlan;
1948 p_data->update_accept_any_vlan_flg =
1949 p_accept_any_vlan->update_accept_any_vlan_flg;
1950 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN;
1951}
1952
dacd88d6
YM		 1953static void
1954qed_iov_vp_update_rss_param(struct qed_hwfn *p_hwfn,
1955 struct qed_vf_info *vf,
1956 struct qed_sp_vport_update_params *p_data,
1957 struct qed_rss_params *p_rss,
1958 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
1959{
1960 struct vfpf_vport_update_rss_tlv *p_rss_tlv;
1961 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_RSS;
1962 u16 i, q_idx, max_q_idx;
1963 u16 table_size;
1964
1965 p_rss_tlv = (struct vfpf_vport_update_rss_tlv *)
1966 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
1967 if (!p_rss_tlv) {
1968 p_data->rss_params = NULL;
1969 return;
1970 }
1971
1972 memset(p_rss, 0, sizeof(struct qed_rss_params));
1973
1974 p_rss->update_rss_config = !!(p_rss_tlv->update_rss_flags &
1975 VFPF_UPDATE_RSS_CONFIG_FLAG);
1976 p_rss->update_rss_capabilities = !!(p_rss_tlv->update_rss_flags &
1977 VFPF_UPDATE_RSS_CAPS_FLAG);
1978 p_rss->update_rss_ind_table = !!(p_rss_tlv->update_rss_flags &
1979 VFPF_UPDATE_RSS_IND_TABLE_FLAG);
1980 p_rss->update_rss_key = !!(p_rss_tlv->update_rss_flags &
1981 VFPF_UPDATE_RSS_KEY_FLAG);
1982
1983 p_rss->rss_enable = p_rss_tlv->rss_enable;
1984 p_rss->rss_eng_id = vf->relative_vf_id + 1;
1985 p_rss->rss_caps = p_rss_tlv->rss_caps;
1986 p_rss->rss_table_size_log = p_rss_tlv->rss_table_size_log;
1987 memcpy(p_rss->rss_ind_table, p_rss_tlv->rss_ind_table,
1988 sizeof(p_rss->rss_ind_table));
1989 memcpy(p_rss->rss_key, p_rss_tlv->rss_key, sizeof(p_rss->rss_key));
1990
1991 table_size = min_t(u16, ARRAY_SIZE(p_rss->rss_ind_table),
1992 (1 << p_rss_tlv->rss_table_size_log));
1993
1994 max_q_idx = ARRAY_SIZE(vf->vf_queues);
1995
1996 for (i = 0; i < table_size; i++) {
1997 u16 index = vf->vf_queues[0].fw_rx_qid;
1998
1999 q_idx = p_rss->rss_ind_table[i];
2000 if (q_idx >= max_q_idx)
2001 DP_NOTICE(p_hwfn,
2002 "rss_ind_table[%d] = %d, rxq is out of range\n",
2003 i, q_idx);
2004 else if (!vf->vf_queues[q_idx].rxq_active)
2005 DP_NOTICE(p_hwfn,
2006 "rss_ind_table[%d] = %d, rxq is not active\n",
2007 i, q_idx);
2008 else
2009 index = vf->vf_queues[q_idx].fw_rx_qid;
2010 p_rss->rss_ind_table[i] = index;
2011 }
2012
2013 p_data->rss_params = p_rss;
2014 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_RSS;
2015}
2016
17b235c1
YM		 2017static void
2018qed_iov_vp_update_sge_tpa_param(struct qed_hwfn *p_hwfn,
2019 struct qed_vf_info *vf,
2020 struct qed_sp_vport_update_params *p_data,
2021 struct qed_sge_tpa_params *p_sge_tpa,
2022 struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
2023{
2024 struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
2025 u16 tlv = CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
2026
2027 p_sge_tpa_tlv = (struct vfpf_vport_update_sge_tpa_tlv *)
2028 qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2029
2030 if (!p_sge_tpa_tlv) {
2031 p_data->sge_tpa_params = NULL;
2032 return;
2033 }
2034
2035 memset(p_sge_tpa, 0, sizeof(struct qed_sge_tpa_params));
2036
2037 p_sge_tpa->update_tpa_en_flg =
2038 !!(p_sge_tpa_tlv->update_sge_tpa_flags & VFPF_UPDATE_TPA_EN_FLAG);
2039 p_sge_tpa->update_tpa_param_flg =
2040 !!(p_sge_tpa_tlv->update_sge_tpa_flags &
2041 VFPF_UPDATE_TPA_PARAM_FLAG);
2042
2043 p_sge_tpa->tpa_ipv4_en_flg =
2044 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV4_EN_FLAG);
2045 p_sge_tpa->tpa_ipv6_en_flg =
2046 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV6_EN_FLAG);
2047 p_sge_tpa->tpa_pkt_split_flg =
2048 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_PKT_SPLIT_FLAG);
2049 p_sge_tpa->tpa_hdr_data_split_flg =
2050 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_HDR_DATA_SPLIT_FLAG);
2051 p_sge_tpa->tpa_gro_consistent_flg =
2052 !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_GRO_CONSIST_FLAG);
2053
2054 p_sge_tpa->tpa_max_aggs_num = p_sge_tpa_tlv->tpa_max_aggs_num;
2055 p_sge_tpa->tpa_max_size = p_sge_tpa_tlv->tpa_max_size;
2056 p_sge_tpa->tpa_min_size_to_start = p_sge_tpa_tlv->tpa_min_size_to_start;
2057 p_sge_tpa->tpa_min_size_to_cont = p_sge_tpa_tlv->tpa_min_size_to_cont;
2058 p_sge_tpa->max_buffers_per_cqe = p_sge_tpa_tlv->max_buffers_per_cqe;
2059
2060 p_data->sge_tpa_params = p_sge_tpa;
2061
2062 *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_SGE_TPA;
2063}
2064
dacd88d6
YM		 2065static void qed_iov_vf_mbx_vport_update(struct qed_hwfn *p_hwfn,
2066 struct qed_ptt *p_ptt,
2067 struct qed_vf_info *vf)
2068{
2069 struct qed_sp_vport_update_params params;
2070 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
17b235c1 2071 struct qed_sge_tpa_params sge_tpa_params;
dacd88d6
YM		 2072 struct qed_rss_params rss_params;
2073 u8 status = PFVF_STATUS_SUCCESS;
2074 u16 tlvs_mask = 0;
2075 u16 length;
2076 int rc;
2077
2078 memset(&params, 0, sizeof(params));
2079 params.opaque_fid = vf->opaque_fid;
2080 params.vport_id = vf->vport_id;
2081 params.rss_params = NULL;
2082
2083 /* Search for extended tlvs list and update values
2084 * from VF in struct qed_sp_vport_update_params.
2085 */
2086 qed_iov_vp_update_act_param(p_hwfn, &params, mbx, &tlvs_mask);
17b235c1
YM		 2087 qed_iov_vp_update_vlan_param(p_hwfn, &params, vf, mbx, &tlvs_mask);
2088 qed_iov_vp_update_tx_switch(p_hwfn, &params, mbx, &tlvs_mask);
dacd88d6
YM		 2089 qed_iov_vp_update_mcast_bin_param(p_hwfn, &params, mbx, &tlvs_mask);
2090 qed_iov_vp_update_accept_flag(p_hwfn, &params, mbx, &tlvs_mask);
2091 qed_iov_vp_update_rss_param(p_hwfn, vf, &params, &rss_params,
2092 mbx, &tlvs_mask);
17b235c1
YM		 2093 qed_iov_vp_update_accept_any_vlan(p_hwfn, &params, mbx, &tlvs_mask);
2094 qed_iov_vp_update_sge_tpa_param(p_hwfn, vf, &params,
2095 &sge_tpa_params, mbx, &tlvs_mask);
dacd88d6
YM		 2096
2097 /* Just log a message if there is no single extended tlv in buffer.
2098 * When all features of vport update ramrod would be requested by VF
2099 * as extended TLVs in buffer then an error can be returned in response
2100 * if there is no extended TLV present in buffer.
2101 */
2102 if (!tlvs_mask) {
2103 DP_NOTICE(p_hwfn,
2104 "No feature tlvs found for vport update\n");
2105 status = PFVF_STATUS_NOT_SUPPORTED;
2106 goto out;
2107 }
2108
2109 rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
2110
2111 if (rc)
2112 status = PFVF_STATUS_FAILURE;
2113
2114out:
2115 length = qed_iov_prep_vp_update_resp_tlvs(p_hwfn, vf, mbx, status,
2116 tlvs_mask, tlvs_mask);
2117 qed_iov_send_response(p_hwfn, p_ptt, vf, length, status);
2118}
2119
08feecd7
YM		 2120static int qed_iov_vf_update_unicast_shadow(struct qed_hwfn *p_hwfn,
2121 struct qed_vf_info *p_vf,
2122 struct qed_filter_ucast *p_params)
2123{
2124 int i;
2125
2126 if (p_params->type == QED_FILTER_MAC)
2127 return 0;
2128
2129 /* First remove entries and then add new ones */
2130 if (p_params->opcode == QED_FILTER_REMOVE) {
2131 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
2132 if (p_vf->shadow_config.vlans[i].used &&
2133 p_vf->shadow_config.vlans[i].vid ==
2134 p_params->vlan) {
2135 p_vf->shadow_config.vlans[i].used = false;
2136 break;
2137 }
2138 if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
2139 DP_VERBOSE(p_hwfn,
2140 QED_MSG_IOV,
2141 "VF [%d] - Tries to remove a non-existing vlan\n",
2142 p_vf->relative_vf_id);
2143 return -EINVAL;
2144 }
2145 } else if (p_params->opcode == QED_FILTER_REPLACE ||
2146 p_params->opcode == QED_FILTER_FLUSH) {
2147 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
2148 p_vf->shadow_config.vlans[i].used = false;
2149 }
2150
2151 /* In forced mode, we're willing to remove entries - but we don't add
2152 * new ones.
2153 */
2154 if (p_vf->bulletin.p_virt->valid_bitmap & (1 << VLAN_ADDR_FORCED))
2155 return 0;
2156
2157 if (p_params->opcode == QED_FILTER_ADD ||
2158 p_params->opcode == QED_FILTER_REPLACE) {
2159 for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
2160 if (p_vf->shadow_config.vlans[i].used)
2161 continue;
2162
2163 p_vf->shadow_config.vlans[i].used = true;
2164 p_vf->shadow_config.vlans[i].vid = p_params->vlan;
2165 break;
2166 }
2167
2168 if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
2169 DP_VERBOSE(p_hwfn,
2170 QED_MSG_IOV,
2171 "VF [%d] - Tries to configure more than %d vlan filters\n",
2172 p_vf->relative_vf_id,
2173 QED_ETH_VF_NUM_VLAN_FILTERS + 1);
2174 return -EINVAL;
2175 }
2176 }
2177
2178 return 0;
2179}
2180
dacd88d6
YM		 2181int qed_iov_chk_ucast(struct qed_hwfn *hwfn,
2182 int vfid, struct qed_filter_ucast *params)
2183{
2184 struct qed_public_vf_info *vf;
2185
2186 vf = qed_iov_get_public_vf_info(hwfn, vfid, true);
2187 if (!vf)
2188 return -EINVAL;
2189
2190 /* No real decision to make; Store the configured MAC */
2191 if (params->type == QED_FILTER_MAC ||
2192 params->type == QED_FILTER_MAC_VLAN)
2193 ether_addr_copy(vf->mac, params->mac);
2194
2195 return 0;
2196}
2197
2198static void qed_iov_vf_mbx_ucast_filter(struct qed_hwfn *p_hwfn,
2199 struct qed_ptt *p_ptt,
2200 struct qed_vf_info *vf)
2201{
08feecd7 2202 struct qed_bulletin_content *p_bulletin = vf->bulletin.p_virt;
dacd88d6
YM		 2203 struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
2204 struct vfpf_ucast_filter_tlv *req;
2205 u8 status = PFVF_STATUS_SUCCESS;
2206 struct qed_filter_ucast params;
2207 int rc;
2208
2209 /* Prepare the unicast filter params */
2210 memset(&params, 0, sizeof(struct qed_filter_ucast));
2211 req = &mbx->req_virt->ucast_filter;
2212 params.opcode = (enum qed_filter_opcode)req->opcode;
2213 params.type = (enum qed_filter_ucast_type)req->type;
2214
2215 params.is_rx_filter = 1;
2216 params.is_tx_filter = 1;
2217 params.vport_to_remove_from = vf->vport_id;
2218 params.vport_to_add_to = vf->vport_id;
2219 memcpy(params.mac, req->mac, ETH_ALEN);
2220 params.vlan = req->vlan;
2221
2222 DP_VERBOSE(p_hwfn,
2223 QED_MSG_IOV,
2224 "VF[%d]: opcode 0x%02x type 0x%02x [%s %s] [vport 0x%02x] MAC %02x:%02x:%02x:%02x:%02x:%02x, vlan 0x%04x\n",
2225 vf->abs_vf_id, params.opcode, params.type,
2226 params.is_rx_filter ? "RX" : "",
2227 params.is_tx_filter ? "TX" : "",
2228 params.vport_to_add_to,
2229 params.mac[0], params.mac[1],
2230 params.mac[2], params.mac[3],
2231 params.mac[4], params.mac[5], params.vlan);
2232
2233 if (!vf->vport_instance) {
2234 DP_VERBOSE(p_hwfn,
2235 QED_MSG_IOV,
2236 "No VPORT instance available for VF[%d], failing ucast MAC configuration\n",
2237 vf->abs_vf_id);
2238 status = PFVF_STATUS_FAILURE;
2239 goto out;
2240 }
2241
08feecd7
YM		 2242 /* Update shadow copy of the VF configuration */
2243 if (qed_iov_vf_update_unicast_shadow(p_hwfn, vf, &params)) {
2244 status = PFVF_STATUS_FAILURE;
2245 goto out;
2246 }
2247
2248 /* Determine if the unicast filtering is acceptible by PF */
2249 if ((p_bulletin->valid_bitmap & (1 << VLAN_ADDR_FORCED)) &&
2250 (params.type == QED_FILTER_VLAN ||
2251 params.type == QED_FILTER_MAC_VLAN)) {
2252 /* Once VLAN is forced or PVID is set, do not allow
2253 * to add/replace any further VLANs.
2254 */
2255 if (params.opcode == QED_FILTER_ADD ||
2256 params.opcode == QED_FILTER_REPLACE)
2257 status = PFVF_STATUS_FORCED;
2258 goto out;
2259 }
2260
eff16960
YM		 2261 if ((p_bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)) &&
2262 (params.type == QED_FILTER_MAC ||
2263 params.type == QED_FILTER_MAC_VLAN)) {
2264 if (!ether_addr_equal(p_bulletin->mac, params.mac) ||
2265 (params.opcode != QED_FILTER_ADD &&
2266 params.opcode != QED_FILTER_REPLACE))
2267 status = PFVF_STATUS_FORCED;
2268 goto out;
2269 }
2270
dacd88d6
YM		 2271 rc = qed_iov_chk_ucast(p_hwfn, vf->relative_vf_id, &params);
2272 if (rc) {
2273 status = PFVF_STATUS_FAILURE;
2274 goto out;
2275 }
2276
2277 rc = qed_sp_eth_filter_ucast(p_hwfn, vf->opaque_fid, &params,
2278 QED_SPQ_MODE_CB, NULL);
2279 if (rc)
2280 status = PFVF_STATUS_FAILURE;
2281
2282out:
2283 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UCAST_FILTER,
2284 sizeof(struct pfvf_def_resp_tlv), status);
2285}
2286
0b55e27d
YM		 2287static void qed_iov_vf_mbx_int_cleanup(struct qed_hwfn *p_hwfn,
2288 struct qed_ptt *p_ptt,
2289 struct qed_vf_info *vf)
2290{
2291 int i;
2292
2293 /* Reset the SBs */
2294 for (i = 0; i < vf->num_sbs; i++)
2295 qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
2296 vf->igu_sbs[i],
2297 vf->opaque_fid, false);
2298
2299 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_INT_CLEANUP,
2300 sizeof(struct pfvf_def_resp_tlv),
2301 PFVF_STATUS_SUCCESS);
2302}
2303
2304static void qed_iov_vf_mbx_close(struct qed_hwfn *p_hwfn,
2305 struct qed_ptt *p_ptt, struct qed_vf_info *vf)
2306{
2307 u16 length = sizeof(struct pfvf_def_resp_tlv);
2308 u8 status = PFVF_STATUS_SUCCESS;
2309
2310 /* Disable Interrupts for VF */
2311 qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
2312
2313 /* Reset Permission table */
2314 qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
2315
2316 qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_CLOSE,
2317 length, status);
2318}
2319
2320static void qed_iov_vf_mbx_release(struct qed_hwfn *p_hwfn,
2321 struct qed_ptt *p_ptt,
2322 struct qed_vf_info *p_vf)
2323{
2324 u16 length = sizeof(struct pfvf_def_resp_tlv);
2325
2326 qed_iov_vf_cleanup(p_hwfn, p_vf);
2327
2328 qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf, CHANNEL_TLV_RELEASE,
2329 length, PFVF_STATUS_SUCCESS);
2330}
2331
2332static int
2333qed_iov_vf_flr_poll_dorq(struct qed_hwfn *p_hwfn,
2334 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
2335{
2336 int cnt;
2337 u32 val;
2338
2339 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_vf->concrete_fid);
2340
2341 for (cnt = 0; cnt < 50; cnt++) {
2342 val = qed_rd(p_hwfn, p_ptt, DORQ_REG_VF_USAGE_CNT);
2343 if (!val)
2344 break;
2345 msleep(20);
2346 }
2347 qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
2348
2349 if (cnt == 50) {
2350 DP_ERR(p_hwfn,
2351 "VF[%d] - dorq failed to cleanup [usage 0x%08x]\n",
2352 p_vf->abs_vf_id, val);
2353 return -EBUSY;
2354 }
2355
2356 return 0;
2357}
2358
2359static int
2360qed_iov_vf_flr_poll_pbf(struct qed_hwfn *p_hwfn,
2361 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
2362{
2363 u32 cons[MAX_NUM_VOQS], distance[MAX_NUM_VOQS];
2364 int i, cnt;
2365
2366 /* Read initial consumers & producers */
2367 for (i = 0; i < MAX_NUM_VOQS; i++) {
2368 u32 prod;
2369
2370 cons[i] = qed_rd(p_hwfn, p_ptt,
2371 PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
2372 i * 0x40);
2373 prod = qed_rd(p_hwfn, p_ptt,
2374 PBF_REG_NUM_BLOCKS_ALLOCATED_PROD_VOQ0 +
2375 i * 0x40);
2376 distance[i] = prod - cons[i];
2377 }
2378
2379 /* Wait for consumers to pass the producers */
2380 i = 0;
2381 for (cnt = 0; cnt < 50; cnt++) {
2382 for (; i < MAX_NUM_VOQS; i++) {
2383 u32 tmp;
2384
2385 tmp = qed_rd(p_hwfn, p_ptt,
2386 PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
2387 i * 0x40);
2388 if (distance[i] > tmp - cons[i])
2389 break;
2390 }
2391
2392 if (i == MAX_NUM_VOQS)
2393 break;
2394
2395 msleep(20);
2396 }
2397
2398 if (cnt == 50) {
2399 DP_ERR(p_hwfn, "VF[%d] - pbf polling failed on VOQ %d\n",
2400 p_vf->abs_vf_id, i);
2401 return -EBUSY;
2402 }
2403
2404 return 0;
2405}
2406
2407static int qed_iov_vf_flr_poll(struct qed_hwfn *p_hwfn,
2408 struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
2409{
2410 int rc;
2411
2412 rc = qed_iov_vf_flr_poll_dorq(p_hwfn, p_vf, p_ptt);
2413 if (rc)
2414 return rc;
2415
2416 rc = qed_iov_vf_flr_poll_pbf(p_hwfn, p_vf, p_ptt);
2417 if (rc)
2418 return rc;
2419
2420 return 0;
2421}
2422
2423static int
2424qed_iov_execute_vf_flr_cleanup(struct qed_hwfn *p_hwfn,
2425 struct qed_ptt *p_ptt,
2426 u16 rel_vf_id, u32 *ack_vfs)
2427{
2428 struct qed_vf_info *p_vf;
2429 int rc = 0;
2430
2431 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
2432 if (!p_vf)
2433 return 0;
2434
2435 if (p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &
2436 (1ULL << (rel_vf_id % 64))) {
2437 u16 vfid = p_vf->abs_vf_id;
2438
2439 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2440 "VF[%d] - Handling FLR\n", vfid);
2441
2442 qed_iov_vf_cleanup(p_hwfn, p_vf);
2443
2444 /* If VF isn't active, no need for anything but SW */
2445 if (!p_vf->b_init)
2446 goto cleanup;
2447
2448 rc = qed_iov_vf_flr_poll(p_hwfn, p_vf, p_ptt);
2449 if (rc)
2450 goto cleanup;
2451
2452 rc = qed_final_cleanup(p_hwfn, p_ptt, vfid, true);
2453 if (rc) {
2454 DP_ERR(p_hwfn, "Failed handle FLR of VF[%d]\n", vfid);
2455 return rc;
2456 }
2457
2458 /* VF_STOPPED has to be set only after final cleanup
2459 * but prior to re-enabling the VF.
2460 */
2461 p_vf->state = VF_STOPPED;
2462
2463 rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, p_vf);
2464 if (rc) {
2465 DP_ERR(p_hwfn, "Failed to re-enable VF[%d] acces\n",
2466 vfid);
2467 return rc;
2468 }
2469cleanup:
2470 /* Mark VF for ack and clean pending state */
2471 if (p_vf->state == VF_RESET)
2472 p_vf->state = VF_STOPPED;
2473 ack_vfs[vfid / 32] |= (1 << (vfid % 32));
2474 p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &=
2475 ~(1ULL << (rel_vf_id % 64));
2476 p_hwfn->pf_iov_info->pending_events[rel_vf_id / 64] &=
2477 ~(1ULL << (rel_vf_id % 64));
2478 }
2479
2480 return rc;
2481}
2482
2483int qed_iov_vf_flr_cleanup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
2484{
2485 u32 ack_vfs[VF_MAX_STATIC / 32];
2486 int rc = 0;
2487 u16 i;
2488
2489 memset(ack_vfs, 0, sizeof(u32) * (VF_MAX_STATIC / 32));
2490
2491 /* Since BRB <-> PRS interface can't be tested as part of the flr
2492 * polling due to HW limitations, simply sleep a bit. And since
2493 * there's no need to wait per-vf, do it before looping.
2494 */
2495 msleep(100);
2496
2497 for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++)
2498 qed_iov_execute_vf_flr_cleanup(p_hwfn, p_ptt, i, ack_vfs);
2499
2500 rc = qed_mcp_ack_vf_flr(p_hwfn, p_ptt, ack_vfs);
2501 return rc;
2502}
2503
2504int qed_iov_mark_vf_flr(struct qed_hwfn *p_hwfn, u32 *p_disabled_vfs)
2505{
2506 u16 i, found = 0;
2507
2508 DP_VERBOSE(p_hwfn, QED_MSG_IOV, "Marking FLR-ed VFs\n");
2509 for (i = 0; i < (VF_MAX_STATIC / 32); i++)
2510 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2511 "[%08x,...,%08x]: %08x\n",
2512 i * 32, (i + 1) * 32 - 1, p_disabled_vfs[i]);
2513
2514 if (!p_hwfn->cdev->p_iov_info) {
2515 DP_NOTICE(p_hwfn, "VF flr but no IOV\n");
2516 return 0;
2517 }
2518
2519 /* Mark VFs */
2520 for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++) {
2521 struct qed_vf_info *p_vf;
2522 u8 vfid;
2523
2524 p_vf = qed_iov_get_vf_info(p_hwfn, i, false);
2525 if (!p_vf)
2526 continue;
2527
2528 vfid = p_vf->abs_vf_id;
2529 if ((1 << (vfid % 32)) & p_disabled_vfs[vfid / 32]) {
2530 u64 *p_flr = p_hwfn->pf_iov_info->pending_flr;
2531 u16 rel_vf_id = p_vf->relative_vf_id;
2532
2533 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2534 "VF[%d] [rel %d] got FLR-ed\n",
2535 vfid, rel_vf_id);
2536
2537 p_vf->state = VF_RESET;
2538
2539 /* No need to lock here, since pending_flr should
2540 * only change here and before ACKing MFw. Since
2541 * MFW will not trigger an additional attention for
2542 * VF flr until ACKs, we're safe.
2543 */
2544 p_flr[rel_vf_id / 64] |= 1ULL << (rel_vf_id % 64);
2545 found = 1;
2546 }
2547 }
2548
2549 return found;
2550}
2551
36558c3d
YM		 2552void qed_iov_set_link(struct qed_hwfn *p_hwfn,
2553 u16 vfid,
2554 struct qed_mcp_link_params *params,
2555 struct qed_mcp_link_state *link,
2556 struct qed_mcp_link_capabilities *p_caps)
2557{
2558 struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
2559 vfid,
2560 false);
2561 struct qed_bulletin_content *p_bulletin;
2562
2563 if (!p_vf)
2564 return;
2565
2566 p_bulletin = p_vf->bulletin.p_virt;
2567 p_bulletin->req_autoneg = params->speed.autoneg;
2568 p_bulletin->req_adv_speed = params->speed.advertised_speeds;
2569 p_bulletin->req_forced_speed = params->speed.forced_speed;
2570 p_bulletin->req_autoneg_pause = params->pause.autoneg;
2571 p_bulletin->req_forced_rx = params->pause.forced_rx;
2572 p_bulletin->req_forced_tx = params->pause.forced_tx;
2573 p_bulletin->req_loopback = params->loopback_mode;
2574
2575 p_bulletin->link_up = link->link_up;
2576 p_bulletin->speed = link->speed;
2577 p_bulletin->full_duplex = link->full_duplex;
2578 p_bulletin->autoneg = link->an;
2579 p_bulletin->autoneg_complete = link->an_complete;
2580 p_bulletin->parallel_detection = link->parallel_detection;
2581 p_bulletin->pfc_enabled = link->pfc_enabled;
2582 p_bulletin->partner_adv_speed = link->partner_adv_speed;
2583 p_bulletin->partner_tx_flow_ctrl_en = link->partner_tx_flow_ctrl_en;
2584 p_bulletin->partner_rx_flow_ctrl_en = link->partner_rx_flow_ctrl_en;
2585 p_bulletin->partner_adv_pause = link->partner_adv_pause;
2586 p_bulletin->sfp_tx_fault = link->sfp_tx_fault;
2587
2588 p_bulletin->capability_speed = p_caps->speed_capabilities;
2589}
2590
37bff2b9
YM		 2591static void qed_iov_process_mbx_req(struct qed_hwfn *p_hwfn,
2592 struct qed_ptt *p_ptt, int vfid)
2593{
2594 struct qed_iov_vf_mbx *mbx;
2595 struct qed_vf_info *p_vf;
2596 int i;
2597
2598 p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
2599 if (!p_vf)
2600 return;
2601
2602 mbx = &p_vf->vf_mbx;
2603
2604 /* qed_iov_process_mbx_request */
2605 DP_VERBOSE(p_hwfn,
2606 QED_MSG_IOV,
2607 "qed_iov_process_mbx_req vfid %d\n", p_vf->abs_vf_id);
2608
2609 mbx->first_tlv = mbx->req_virt->first_tlv;
2610
2611 /* check if tlv type is known */
2612 if (qed_iov_tlv_supported(mbx->first_tlv.tl.type)) {
1408cc1f
YM		 2613 switch (mbx->first_tlv.tl.type) {
2614 case CHANNEL_TLV_ACQUIRE:
2615 qed_iov_vf_mbx_acquire(p_hwfn, p_ptt, p_vf);
2616 break;
dacd88d6
YM		 2617 case CHANNEL_TLV_VPORT_START:
2618 qed_iov_vf_mbx_start_vport(p_hwfn, p_ptt, p_vf);
2619 break;
2620 case CHANNEL_TLV_VPORT_TEARDOWN:
2621 qed_iov_vf_mbx_stop_vport(p_hwfn, p_ptt, p_vf);
2622 break;
2623 case CHANNEL_TLV_START_RXQ:
2624 qed_iov_vf_mbx_start_rxq(p_hwfn, p_ptt, p_vf);
2625 break;
2626 case CHANNEL_TLV_START_TXQ:
2627 qed_iov_vf_mbx_start_txq(p_hwfn, p_ptt, p_vf);
2628 break;
2629 case CHANNEL_TLV_STOP_RXQS:
2630 qed_iov_vf_mbx_stop_rxqs(p_hwfn, p_ptt, p_vf);
2631 break;
2632 case CHANNEL_TLV_STOP_TXQS:
2633 qed_iov_vf_mbx_stop_txqs(p_hwfn, p_ptt, p_vf);
2634 break;
17b235c1
YM		 2635 case CHANNEL_TLV_UPDATE_RXQ:
2636 qed_iov_vf_mbx_update_rxqs(p_hwfn, p_ptt, p_vf);
2637 break;
dacd88d6
YM		 2638 case CHANNEL_TLV_VPORT_UPDATE:
2639 qed_iov_vf_mbx_vport_update(p_hwfn, p_ptt, p_vf);
2640 break;
2641 case CHANNEL_TLV_UCAST_FILTER:
2642 qed_iov_vf_mbx_ucast_filter(p_hwfn, p_ptt, p_vf);
2643 break;
0b55e27d
YM		 2644 case CHANNEL_TLV_CLOSE:
2645 qed_iov_vf_mbx_close(p_hwfn, p_ptt, p_vf);
2646 break;
2647 case CHANNEL_TLV_INT_CLEANUP:
2648 qed_iov_vf_mbx_int_cleanup(p_hwfn, p_ptt, p_vf);
2649 break;
2650 case CHANNEL_TLV_RELEASE:
2651 qed_iov_vf_mbx_release(p_hwfn, p_ptt, p_vf);
2652 break;
1408cc1f 2653 }
37bff2b9
YM		 2654 } else {
2655 /* unknown TLV - this may belong to a VF driver from the future
2656 * - a version written after this PF driver was written, which
2657 * supports features unknown as of yet. Too bad since we don't
2658 * support them. Or this may be because someone wrote a crappy
2659 * VF driver and is sending garbage over the channel.
2660 */
2661 DP_ERR(p_hwfn,
2662 "unknown TLV. type %d length %d. first 20 bytes of mailbox buffer:\n",
2663 mbx->first_tlv.tl.type, mbx->first_tlv.tl.length);
2664
2665 for (i = 0; i < 20; i++) {
2666 DP_VERBOSE(p_hwfn,
2667 QED_MSG_IOV,
2668 "%x ",
2669 mbx->req_virt->tlv_buf_size.tlv_buffer[i]);
2670 }
2671 }
2672}
2673
2674void qed_iov_pf_add_pending_events(struct qed_hwfn *p_hwfn, u8 vfid)
2675{
2676 u64 add_bit = 1ULL << (vfid % 64);
2677
2678 p_hwfn->pf_iov_info->pending_events[vfid / 64] |= add_bit;
2679}
2680
2681static void qed_iov_pf_get_and_clear_pending_events(struct qed_hwfn *p_hwfn,
2682 u64 *events)
2683{
2684 u64 *p_pending_events = p_hwfn->pf_iov_info->pending_events;
2685
2686 memcpy(events, p_pending_events, sizeof(u64) * QED_VF_ARRAY_LENGTH);
2687 memset(p_pending_events, 0, sizeof(u64) * QED_VF_ARRAY_LENGTH);
2688}
2689
2690static int qed_sriov_vfpf_msg(struct qed_hwfn *p_hwfn,
2691 u16 abs_vfid, struct regpair *vf_msg)
2692{
2693 u8 min = (u8)p_hwfn->cdev->p_iov_info->first_vf_in_pf;
2694 struct qed_vf_info *p_vf;
2695
2696 if (!qed_iov_pf_sanity_check(p_hwfn, (int)abs_vfid - min)) {
2697 DP_VERBOSE(p_hwfn,
2698 QED_MSG_IOV,
2699 "Got a message from VF [abs 0x%08x] that cannot be handled by PF\n",
2700 abs_vfid);
2701 return 0;
2702 }
2703 p_vf = &p_hwfn->pf_iov_info->vfs_array[(u8)abs_vfid - min];
2704
2705 /* List the physical address of the request so that handler
2706 * could later on copy the message from it.
2707 */
2708 p_vf->vf_mbx.pending_req = (((u64)vf_msg->hi) << 32) | vf_msg->lo;
2709
2710 /* Mark the event and schedule the workqueue */
2711 qed_iov_pf_add_pending_events(p_hwfn, p_vf->relative_vf_id);
2712 qed_schedule_iov(p_hwfn, QED_IOV_WQ_MSG_FLAG);
2713
2714 return 0;
2715}
2716
2717int qed_sriov_eqe_event(struct qed_hwfn *p_hwfn,
2718 u8 opcode, __le16 echo, union event_ring_data *data)
2719{
2720 switch (opcode) {
2721 case COMMON_EVENT_VF_PF_CHANNEL:
2722 return qed_sriov_vfpf_msg(p_hwfn, le16_to_cpu(echo),
2723 &data->vf_pf_channel.msg_addr);
2724 default:
2725 DP_INFO(p_hwfn->cdev, "Unknown sriov eqe event 0x%02x\n",
2726 opcode);
2727 return -EINVAL;
2728 }
2729}
2730
32a47e72
YM		 2731u16 qed_iov_get_next_active_vf(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
2732{
2733 struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
2734 u16 i;
2735
2736 if (!p_iov)
2737 goto out;
2738
2739 for (i = rel_vf_id; i < p_iov->total_vfs; i++)
2740 if (qed_iov_is_valid_vfid(p_hwfn, rel_vf_id, true))
2741 return i;
2742
2743out:
2744 return MAX_NUM_VFS;
2745}
37bff2b9
YM		 2746
2747static int qed_iov_copy_vf_msg(struct qed_hwfn *p_hwfn, struct qed_ptt *ptt,
2748 int vfid)
2749{
2750 struct qed_dmae_params params;
2751 struct qed_vf_info *vf_info;
2752
2753 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
2754 if (!vf_info)
2755 return -EINVAL;
2756
2757 memset(&params, 0, sizeof(struct qed_dmae_params));
2758 params.flags = QED_DMAE_FLAG_VF_SRC | QED_DMAE_FLAG_COMPLETION_DST;
2759 params.src_vfid = vf_info->abs_vf_id;
2760
2761 if (qed_dmae_host2host(p_hwfn, ptt,
2762 vf_info->vf_mbx.pending_req,
2763 vf_info->vf_mbx.req_phys,
2764 sizeof(union vfpf_tlvs) / 4, &params)) {
2765 DP_VERBOSE(p_hwfn, QED_MSG_IOV,
2766 "Failed to copy message from VF 0x%02x\n", vfid);
2767
2768 return -EIO;
2769 }
2770
2771 return 0;
2772}
2773
eff16960
YM		 2774static void qed_iov_bulletin_set_forced_mac(struct qed_hwfn *p_hwfn,
2775 u8 *mac, int vfid)
2776{
2777 struct qed_vf_info *vf_info;
2778 u64 feature;
2779
2780 vf_info = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
2781 if (!vf_info) {
2782 DP_NOTICE(p_hwfn->cdev,
2783 "Can not set forced MAC, invalid vfid [%d]\n", vfid);
2784 return;
2785 }
2786
2787 feature = 1 << MAC_ADDR_FORCED;
2788 memcpy(vf_info->bulletin.p_virt->mac, mac, ETH_ALEN);
2789
2790 vf_info->bulletin.p_virt->valid_bitmap |= feature;
2791 /* Forced MAC will disable MAC_ADDR */
2792 vf_info->bulletin.p_virt->valid_bitmap &=
2793 ~(1 << VFPF_BULLETIN_MAC_ADDR);
2794
2795 qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
2796}
2797
08feecd7
YM		 2798void qed_iov_bulletin_set_forced_vlan(struct qed_hwfn *p_hwfn,
2799 u16 pvid, int vfid)
2800{
2801 struct qed_vf_info *vf_info;
2802 u64 feature;
2803
2804 vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
2805 if (!vf_info) {
2806 DP_NOTICE(p_hwfn->cdev,
2807 "Can not set forced MAC, invalid vfid [%d]\n", vfid);
2808 return;
2809 }
2810
2811 feature = 1 << VLAN_ADDR_FORCED;
2812 vf_info->bulletin.p_virt->pvid = pvid;
2813 if (pvid)
2814 vf_info->bulletin.p_virt->valid_bitmap |= feature;
2815 else
2816 vf_info->bulletin.p_virt->valid_bitmap &= ~feature;
2817
2818 qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
2819}
2820
6ddc7608
YM		 2821static bool qed_iov_vf_has_vport_instance(struct qed_hwfn *p_hwfn, int vfid)
2822{
2823 struct qed_vf_info *p_vf_info;
2824
2825 p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
2826 if (!p_vf_info)
2827 return false;
2828
2829 return !!p_vf_info->vport_instance;
2830}
2831
0b55e27d
YM		 2832bool qed_iov_is_vf_stopped(struct qed_hwfn *p_hwfn, int vfid)
2833{
2834 struct qed_vf_info *p_vf_info;
2835
2836 p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
2837 if (!p_vf_info)
2838 return true;
2839
2840 return p_vf_info->state == VF_STOPPED;
2841}
2842
6ddc7608
YM		 2843int qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn, int vfid, bool val)
2844{
2845 struct qed_vf_info *vf;
2846 int rc = -EINVAL;
2847
2848 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
2849 DP_NOTICE(p_hwfn,
2850 "SR-IOV sanity check failed, can't set spoofchk\n");
2851 goto out;
2852 }
2853
2854 vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
2855 if (!vf)
2856 goto out;
2857
2858 if (!qed_iov_vf_has_vport_instance(p_hwfn, vfid)) {
2859 /* After VF VPORT start PF will configure spoof check */
2860 vf->req_spoofchk_val = val;
2861 rc = 0;
2862 goto out;
2863 }
2864
2865 rc = __qed_iov_spoofchk_set(p_hwfn, vf, val);
2866
2867out:
2868 return rc;
2869}
2870
eff16960
YM		 2871static u8 *qed_iov_bulletin_get_forced_mac(struct qed_hwfn *p_hwfn,
2872 u16 rel_vf_id)
2873{
2874 struct qed_vf_info *p_vf;
2875
2876 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
2877 if (!p_vf || !p_vf->bulletin.p_virt)
2878 return NULL;
2879
2880 if (!(p_vf->bulletin.p_virt->valid_bitmap & (1 << MAC_ADDR_FORCED)))
2881 return NULL;
2882
2883 return p_vf->bulletin.p_virt->mac;
2884}
2885
08feecd7
YM		 2886u16 qed_iov_bulletin_get_forced_vlan(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
2887{
2888 struct qed_vf_info *p_vf;
2889
2890 p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
2891 if (!p_vf || !p_vf->bulletin.p_virt)
2892 return 0;
2893
2894 if (!(p_vf->bulletin.p_virt->valid_bitmap & (1 << VLAN_ADDR_FORCED)))
2895 return 0;
2896
2897 return p_vf->bulletin.p_virt->pvid;
2898}
2899
733def6a
YM		 2900static int qed_iov_configure_tx_rate(struct qed_hwfn *p_hwfn,
2901 struct qed_ptt *p_ptt, int vfid, int val)
2902{
2903 struct qed_vf_info *vf;
2904 u8 abs_vp_id = 0;
2905 int rc;
2906
2907 vf = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
2908 if (!vf)
2909 return -EINVAL;
2910
2911 rc = qed_fw_vport(p_hwfn, vf->vport_id, &abs_vp_id);
2912 if (rc)
2913 return rc;
2914
2915 return qed_init_vport_rl(p_hwfn, p_ptt, abs_vp_id, (u32)val);
2916}
2917
2918int qed_iov_configure_min_tx_rate(struct qed_dev *cdev, int vfid, u32 rate)
2919{
2920 struct qed_vf_info *vf;
2921 u8 vport_id;
2922 int i;
2923
2924 for_each_hwfn(cdev, i) {
2925 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
2926
2927 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
2928 DP_NOTICE(p_hwfn,
2929 "SR-IOV sanity check failed, can't set min rate\n");
2930 return -EINVAL;
2931 }
2932 }
2933
2934 vf = qed_iov_get_vf_info(QED_LEADING_HWFN(cdev), (u16)vfid, true);
2935 vport_id = vf->vport_id;
2936
2937 return qed_configure_vport_wfq(cdev, vport_id, rate);
2938}
2939
37bff2b9
YM		 2940/**
2941 * qed_schedule_iov - schedules IOV task for VF and PF
2942 * @hwfn: hardware function pointer
2943 * @flag: IOV flag for VF/PF
2944 */
2945void qed_schedule_iov(struct qed_hwfn *hwfn, enum qed_iov_wq_flag flag)
2946{
2947 smp_mb__before_atomic();
2948 set_bit(flag, &hwfn->iov_task_flags);
2949 smp_mb__after_atomic();
2950 DP_VERBOSE(hwfn, QED_MSG_IOV, "Scheduling iov task [Flag: %d]\n", flag);
2951 queue_delayed_work(hwfn->iov_wq, &hwfn->iov_task, 0);
2952}
2953
1408cc1f
YM		 2954void qed_vf_start_iov_wq(struct qed_dev *cdev)
2955{
2956 int i;
2957
2958 for_each_hwfn(cdev, i)
2959 queue_delayed_work(cdev->hwfns[i].iov_wq,
2960 &cdev->hwfns[i].iov_task, 0);
2961}
2962
0b55e27d
YM		 2963int qed_sriov_disable(struct qed_dev *cdev, bool pci_enabled)
2964{
2965 int i, j;
2966
2967 for_each_hwfn(cdev, i)
2968 if (cdev->hwfns[i].iov_wq)
2969 flush_workqueue(cdev->hwfns[i].iov_wq);
2970
2971 /* Mark VFs for disablement */
2972 qed_iov_set_vfs_to_disable(cdev, true);
2973
2974 if (cdev->p_iov_info && cdev->p_iov_info->num_vfs && pci_enabled)
2975 pci_disable_sriov(cdev->pdev);
2976
2977 for_each_hwfn(cdev, i) {
2978 struct qed_hwfn *hwfn = &cdev->hwfns[i];
2979 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
2980
2981 /* Failure to acquire the ptt in 100g creates an odd error
2982 * where the first engine has already relased IOV.
2983 */
2984 if (!ptt) {
2985 DP_ERR(hwfn, "Failed to acquire ptt\n");
2986 return -EBUSY;
2987 }
2988
733def6a
YM		 2989 /* Clean WFQ db and configure equal weight for all vports */
2990 qed_clean_wfq_db(hwfn, ptt);
2991
0b55e27d
YM		 2992 qed_for_each_vf(hwfn, j) {
2993 int k;
2994
2995 if (!qed_iov_is_valid_vfid(hwfn, j, true))
2996 continue;
2997
2998 /* Wait until VF is disabled before releasing */
2999 for (k = 0; k < 100; k++) {
3000 if (!qed_iov_is_vf_stopped(hwfn, j))
3001 msleep(20);
3002 else
3003 break;
3004 }
3005
3006 if (k < 100)
3007 qed_iov_release_hw_for_vf(&cdev->hwfns[i],
3008 ptt, j);
3009 else
3010 DP_ERR(hwfn,
3011 "Timeout waiting for VF's FLR to end\n");
3012 }
3013
3014 qed_ptt_release(hwfn, ptt);
3015 }
3016
3017 qed_iov_set_vfs_to_disable(cdev, false);
3018
3019 return 0;
3020}
3021
3022static int qed_sriov_enable(struct qed_dev *cdev, int num)
3023{
3024 struct qed_sb_cnt_info sb_cnt_info;
3025 int i, j, rc;
3026
3027 if (num >= RESC_NUM(&cdev->hwfns[0], QED_VPORT)) {
3028 DP_NOTICE(cdev, "Can start at most %d VFs\n",
3029 RESC_NUM(&cdev->hwfns[0], QED_VPORT) - 1);
3030 return -EINVAL;
3031 }
3032
3033 /* Initialize HW for VF access */
3034 for_each_hwfn(cdev, j) {
3035 struct qed_hwfn *hwfn = &cdev->hwfns[j];
3036 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
3037 int num_sbs = 0, limit = 16;
3038
3039 if (!ptt) {
3040 DP_ERR(hwfn, "Failed to acquire ptt\n");
3041 rc = -EBUSY;
3042 goto err;
3043 }
3044
3045 memset(&sb_cnt_info, 0, sizeof(sb_cnt_info));
3046 qed_int_get_num_sbs(hwfn, &sb_cnt_info);
3047 num_sbs = min_t(int, sb_cnt_info.sb_free_blk, limit);
3048
3049 for (i = 0; i < num; i++) {
3050 if (!qed_iov_is_valid_vfid(hwfn, i, false))
3051 continue;
3052
3053 rc = qed_iov_init_hw_for_vf(hwfn,
3054 ptt, i, num_sbs / num);
3055 if (rc) {
3056 DP_ERR(cdev, "Failed to enable VF[%d]\n", i);
3057 qed_ptt_release(hwfn, ptt);
3058 goto err;
3059 }
3060 }
3061
3062 qed_ptt_release(hwfn, ptt);
3063 }
3064
3065 /* Enable SRIOV PCIe functions */
3066 rc = pci_enable_sriov(cdev->pdev, num);
3067 if (rc) {
3068 DP_ERR(cdev, "Failed to enable sriov [%d]\n", rc);
3069 goto err;
3070 }
3071
3072 return num;
3073
3074err:
3075 qed_sriov_disable(cdev, false);
3076 return rc;
3077}
3078
3079static int qed_sriov_configure(struct qed_dev *cdev, int num_vfs_param)
3080{
3081 if (!IS_QED_SRIOV(cdev)) {
3082 DP_VERBOSE(cdev, QED_MSG_IOV, "SR-IOV is not supported\n");
3083 return -EOPNOTSUPP;
3084 }
3085
3086 if (num_vfs_param)
3087 return qed_sriov_enable(cdev, num_vfs_param);
3088 else
3089 return qed_sriov_disable(cdev, true);
3090}
3091
eff16960
YM		 3092static int qed_sriov_pf_set_mac(struct qed_dev *cdev, u8 *mac, int vfid)
3093{
3094 int i;
3095
3096 if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
3097 DP_VERBOSE(cdev, QED_MSG_IOV,
3098 "Cannot set a VF MAC; Sriov is not enabled\n");
3099 return -EINVAL;
3100 }
3101
3102 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true)) {
3103 DP_VERBOSE(cdev, QED_MSG_IOV,
3104 "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
3105 return -EINVAL;
3106 }
3107
3108 for_each_hwfn(cdev, i) {
3109 struct qed_hwfn *hwfn = &cdev->hwfns[i];
3110 struct qed_public_vf_info *vf_info;
3111
3112 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
3113 if (!vf_info)
3114 continue;
3115
3116 /* Set the forced MAC, and schedule the IOV task */
3117 ether_addr_copy(vf_info->forced_mac, mac);
3118 qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
3119 }
3120
3121 return 0;
3122}
3123
08feecd7
YM		 3124static int qed_sriov_pf_set_vlan(struct qed_dev *cdev, u16 vid, int vfid)
3125{
3126 int i;
3127
3128 if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
3129 DP_VERBOSE(cdev, QED_MSG_IOV,
3130 "Cannot set a VF MAC; Sriov is not enabled\n");
3131 return -EINVAL;
3132 }
3133
3134 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true)) {
3135 DP_VERBOSE(cdev, QED_MSG_IOV,
3136 "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
3137 return -EINVAL;
3138 }
3139
3140 for_each_hwfn(cdev, i) {
3141 struct qed_hwfn *hwfn = &cdev->hwfns[i];
3142 struct qed_public_vf_info *vf_info;
3143
3144 vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
3145 if (!vf_info)
3146 continue;
3147
3148 /* Set the forced vlan, and schedule the IOV task */
3149 vf_info->forced_vlan = vid;
3150 qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
3151 }
3152
3153 return 0;
3154}
3155
36558c3d
YM		 3156void qed_inform_vf_link_state(struct qed_hwfn *hwfn)
3157{
3158 struct qed_mcp_link_capabilities caps;
3159 struct qed_mcp_link_params params;
3160 struct qed_mcp_link_state link;
3161 int i;
3162
3163 if (!hwfn->pf_iov_info)
3164 return;
3165
3166 /* Update bulletin of all future possible VFs with link configuration */
3167 for (i = 0; i < hwfn->cdev->p_iov_info->total_vfs; i++) {
733def6a
YM		 3168 struct qed_public_vf_info *vf_info;
3169
3170 vf_info = qed_iov_get_public_vf_info(hwfn, i, false);
3171 if (!vf_info)
3172 continue;
3173
36558c3d
YM		 3174 memcpy(&params, qed_mcp_get_link_params(hwfn), sizeof(params));
3175 memcpy(&link, qed_mcp_get_link_state(hwfn), sizeof(link));
3176 memcpy(&caps, qed_mcp_get_link_capabilities(hwfn),
3177 sizeof(caps));
3178
733def6a
YM		 3179 /* Modify link according to the VF's configured link state */
3180 switch (vf_info->link_state) {
3181 case IFLA_VF_LINK_STATE_DISABLE:
3182 link.link_up = false;
3183 break;
3184 case IFLA_VF_LINK_STATE_ENABLE:
3185 link.link_up = true;
3186 /* Set speed according to maximum supported by HW.
3187 * that is 40G for regular devices and 100G for CMT
3188 * mode devices.
3189 */
3190 link.speed = (hwfn->cdev->num_hwfns > 1) ?
3191 100000 : 40000;
3192 default:
3193 /* In auto mode pass PF link image to VF */
3194 break;
3195 }
3196
3197 if (link.link_up && vf_info->tx_rate) {
3198 struct qed_ptt *ptt;
3199 int rate;
3200
3201 rate = min_t(int, vf_info->tx_rate, link.speed);
3202
3203 ptt = qed_ptt_acquire(hwfn);
3204 if (!ptt) {
3205 DP_NOTICE(hwfn, "Failed to acquire PTT\n");
3206 return;
3207 }
3208
3209 if (!qed_iov_configure_tx_rate(hwfn, ptt, i, rate)) {
3210 vf_info->tx_rate = rate;
3211 link.speed = rate;
3212 }
3213
3214 qed_ptt_release(hwfn, ptt);
3215 }
3216
36558c3d
YM		 3217 qed_iov_set_link(hwfn, i, &params, &link, &caps);
3218 }
3219
3220 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
3221}
3222
733def6a
YM		 3223static int qed_set_vf_link_state(struct qed_dev *cdev,
3224 int vf_id, int link_state)
3225{
3226 int i;
3227
3228 /* Sanitize request */
3229 if (IS_VF(cdev))
3230 return -EINVAL;
3231
3232 if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true)) {
3233 DP_VERBOSE(cdev, QED_MSG_IOV,
3234 "VF index [%d] isn't active\n", vf_id);
3235 return -EINVAL;
3236 }
3237
3238 /* Handle configuration of link state */
3239 for_each_hwfn(cdev, i) {
3240 struct qed_hwfn *hwfn = &cdev->hwfns[i];
3241 struct qed_public_vf_info *vf;
3242
3243 vf = qed_iov_get_public_vf_info(hwfn, vf_id, true);
3244 if (!vf)
3245 continue;
3246
3247 if (vf->link_state == link_state)
3248 continue;
3249
3250 vf->link_state = link_state;
3251 qed_inform_vf_link_state(&cdev->hwfns[i]);
3252 }
3253
3254 return 0;
3255}
3256
6ddc7608
YM		 3257static int qed_spoof_configure(struct qed_dev *cdev, int vfid, bool val)
3258{
3259 int i, rc = -EINVAL;
3260
3261 for_each_hwfn(cdev, i) {
3262 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
3263
3264 rc = qed_iov_spoofchk_set(p_hwfn, vfid, val);
3265 if (rc)
3266 break;
3267 }
3268
3269 return rc;
3270}
3271
733def6a
YM		 3272static int qed_configure_max_vf_rate(struct qed_dev *cdev, int vfid, int rate)
3273{
3274 int i;
3275
3276 for_each_hwfn(cdev, i) {
3277 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
3278 struct qed_public_vf_info *vf;
3279
3280 if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
3281 DP_NOTICE(p_hwfn,
3282 "SR-IOV sanity check failed, can't set tx rate\n");
3283 return -EINVAL;
3284 }
3285
3286 vf = qed_iov_get_public_vf_info(p_hwfn, vfid, true);
3287
3288 vf->tx_rate = rate;
3289
3290 qed_inform_vf_link_state(p_hwfn);
3291 }
3292
3293 return 0;
3294}
3295
3296static int qed_set_vf_rate(struct qed_dev *cdev,
3297 int vfid, u32 min_rate, u32 max_rate)
3298{
3299 int rc_min = 0, rc_max = 0;
3300
3301 if (max_rate)
3302 rc_max = qed_configure_max_vf_rate(cdev, vfid, max_rate);
3303
3304 if (min_rate)
3305 rc_min = qed_iov_configure_min_tx_rate(cdev, vfid, min_rate);
3306
3307 if (rc_max | rc_min)
3308 return -EINVAL;
3309
3310 return 0;
3311}
3312
37bff2b9
YM		 3313static void qed_handle_vf_msg(struct qed_hwfn *hwfn)
3314{
3315 u64 events[QED_VF_ARRAY_LENGTH];
3316 struct qed_ptt *ptt;
3317 int i;
3318
3319 ptt = qed_ptt_acquire(hwfn);
3320 if (!ptt) {
3321 DP_VERBOSE(hwfn, QED_MSG_IOV,
3322 "Can't acquire PTT; re-scheduling\n");
3323 qed_schedule_iov(hwfn, QED_IOV_WQ_MSG_FLAG);
3324 return;
3325 }
3326
3327 qed_iov_pf_get_and_clear_pending_events(hwfn, events);
3328
3329 DP_VERBOSE(hwfn, QED_MSG_IOV,
3330 "Event mask of VF events: 0x%llx 0x%llx 0x%llx\n",
3331 events[0], events[1], events[2]);
3332
3333 qed_for_each_vf(hwfn, i) {
3334 /* Skip VFs with no pending messages */
3335 if (!(events[i / 64] & (1ULL << (i % 64))))
3336 continue;
3337
3338 DP_VERBOSE(hwfn, QED_MSG_IOV,
3339 "Handling VF message from VF 0x%02x [Abs 0x%02x]\n",
3340 i, hwfn->cdev->p_iov_info->first_vf_in_pf + i);
3341
3342 /* Copy VF's message to PF's request buffer for that VF */
3343 if (qed_iov_copy_vf_msg(hwfn, ptt, i))
3344 continue;
3345
3346 qed_iov_process_mbx_req(hwfn, ptt, i);
3347 }
3348
3349 qed_ptt_release(hwfn, ptt);
3350}
3351
08feecd7
YM		 3352static void qed_handle_pf_set_vf_unicast(struct qed_hwfn *hwfn)
3353{
3354 int i;
3355
3356 qed_for_each_vf(hwfn, i) {
3357 struct qed_public_vf_info *info;
3358 bool update = false;
eff16960 3359 u8 *mac;
08feecd7
YM		 3360
3361 info = qed_iov_get_public_vf_info(hwfn, i, true);
3362 if (!info)
3363 continue;
3364
3365 /* Update data on bulletin board */
eff16960
YM		 3366 mac = qed_iov_bulletin_get_forced_mac(hwfn, i);
3367 if (is_valid_ether_addr(info->forced_mac) &&
3368 (!mac || !ether_addr_equal(mac, info->forced_mac))) {
3369 DP_VERBOSE(hwfn,
3370 QED_MSG_IOV,
3371 "Handling PF setting of VF MAC to VF 0x%02x [Abs 0x%02x]\n",
3372 i,
3373 hwfn->cdev->p_iov_info->first_vf_in_pf + i);
3374
3375 /* Update bulletin board with forced MAC */
3376 qed_iov_bulletin_set_forced_mac(hwfn,
3377 info->forced_mac, i);
3378 update = true;
3379 }
08feecd7
YM		 3380
3381 if (qed_iov_bulletin_get_forced_vlan(hwfn, i) ^
3382 info->forced_vlan) {
3383 DP_VERBOSE(hwfn,
3384 QED_MSG_IOV,
3385 "Handling PF setting of pvid [0x%04x] to VF 0x%02x [Abs 0x%02x]\n",
3386 info->forced_vlan,
3387 i,
3388 hwfn->cdev->p_iov_info->first_vf_in_pf + i);
3389 qed_iov_bulletin_set_forced_vlan(hwfn,
3390 info->forced_vlan, i);
3391 update = true;
3392 }
3393
3394 if (update)
3395 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
3396 }
3397}
3398
36558c3d
YM		 3399static void qed_handle_bulletin_post(struct qed_hwfn *hwfn)
3400{
3401 struct qed_ptt *ptt;
3402 int i;
3403
3404 ptt = qed_ptt_acquire(hwfn);
3405 if (!ptt) {
3406 DP_NOTICE(hwfn, "Failed allocating a ptt entry\n");
3407 qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
3408 return;
3409 }
3410
3411 qed_for_each_vf(hwfn, i)
3412 qed_iov_post_vf_bulletin(hwfn, i, ptt);
3413
3414 qed_ptt_release(hwfn, ptt);
3415}
3416
37bff2b9
YM		 3417void qed_iov_pf_task(struct work_struct *work)
3418{
3419 struct qed_hwfn *hwfn = container_of(work, struct qed_hwfn,
3420 iov_task.work);
0b55e27d 3421 int rc;
37bff2b9
YM		 3422
3423 if (test_and_clear_bit(QED_IOV_WQ_STOP_WQ_FLAG, &hwfn->iov_task_flags))
3424 return;
3425
0b55e27d
YM		 3426 if (test_and_clear_bit(QED_IOV_WQ_FLR_FLAG, &hwfn->iov_task_flags)) {
3427 struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
3428
3429 if (!ptt) {
3430 qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
3431 return;
3432 }
3433
3434 rc = qed_iov_vf_flr_cleanup(hwfn, ptt);
3435 if (rc)
3436 qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
3437
3438 qed_ptt_release(hwfn, ptt);
3439 }
3440
37bff2b9
YM		 3441 if (test_and_clear_bit(QED_IOV_WQ_MSG_FLAG, &hwfn->iov_task_flags))
3442 qed_handle_vf_msg(hwfn);
08feecd7
YM		 3443
3444 if (test_and_clear_bit(QED_IOV_WQ_SET_UNICAST_FILTER_FLAG,
3445 &hwfn->iov_task_flags))
3446 qed_handle_pf_set_vf_unicast(hwfn);
3447
36558c3d
YM		 3448 if (test_and_clear_bit(QED_IOV_WQ_BULLETIN_UPDATE_FLAG,
3449 &hwfn->iov_task_flags))
3450 qed_handle_bulletin_post(hwfn);
37bff2b9
YM		 3451}
3452
3453void qed_iov_wq_stop(struct qed_dev *cdev, bool schedule_first)
3454{
3455 int i;
3456
3457 for_each_hwfn(cdev, i) {
3458 if (!cdev->hwfns[i].iov_wq)
3459 continue;
3460
3461 if (schedule_first) {
3462 qed_schedule_iov(&cdev->hwfns[i],
3463 QED_IOV_WQ_STOP_WQ_FLAG);
3464 cancel_delayed_work_sync(&cdev->hwfns[i].iov_task);
3465 }
3466
3467 flush_workqueue(cdev->hwfns[i].iov_wq);
3468 destroy_workqueue(cdev->hwfns[i].iov_wq);
3469 }
3470}
3471
3472int qed_iov_wq_start(struct qed_dev *cdev)
3473{
3474 char name[NAME_SIZE];
3475 int i;
3476
3477 for_each_hwfn(cdev, i) {
3478 struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
3479
36558c3d
YM		 3480 /* PFs needs a dedicated workqueue only if they support IOV.
3481 * VFs always require one.
3482 */
3483 if (IS_PF(p_hwfn->cdev) && !IS_PF_SRIOV(p_hwfn))
37bff2b9
YM		 3484 continue;
3485
3486 snprintf(name, NAME_SIZE, "iov-%02x:%02x.%02x",
3487 cdev->pdev->bus->number,
3488 PCI_SLOT(cdev->pdev->devfn), p_hwfn->abs_pf_id);
3489
3490 p_hwfn->iov_wq = create_singlethread_workqueue(name);
3491 if (!p_hwfn->iov_wq) {
3492 DP_NOTICE(p_hwfn, "Cannot create iov workqueue\n");
3493 return -ENOMEM;
3494 }
3495
36558c3d
YM		 3496 if (IS_PF(cdev))
3497 INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_pf_task);
3498 else
3499 INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_vf_task);
37bff2b9
YM		 3500 }
3501
3502 return 0;
3503}
0b55e27d
YM		 3504
3505const struct qed_iov_hv_ops qed_iov_ops_pass = {
3506 .configure = &qed_sriov_configure,
eff16960 3507 .set_mac = &qed_sriov_pf_set_mac,
08feecd7 3508 .set_vlan = &qed_sriov_pf_set_vlan,
733def6a 3509 .set_link_state = &qed_set_vf_link_state,
6ddc7608 3510 .set_spoof = &qed_spoof_configure,
733def6a 3511 .set_rate = &qed_set_vf_rate,
0b55e27d 3512};
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