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qed/qede: use 8.7.3.0 FW.
[mirror_ubuntu-hirsute-kernel.git] / drivers / net / ethernet / qlogic / qede / qede_main.c
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e712d52b
YM		 1/* QLogic qede NIC Driver
2* Copyright (c) 2015 QLogic Corporation
3*
4* This software is available under the terms of the GNU General Public License
5* (GPL) Version 2, available from the file COPYING in the main directory of
6* this source tree.
7*/
8
9#include <linux/module.h>
10#include <linux/pci.h>
11#include <linux/version.h>
12#include <linux/device.h>
13#include <linux/netdevice.h>
14#include <linux/etherdevice.h>
15#include <linux/skbuff.h>
16#include <linux/errno.h>
17#include <linux/list.h>
18#include <linux/string.h>
19#include <linux/dma-mapping.h>
20#include <linux/interrupt.h>
21#include <asm/byteorder.h>
22#include <asm/param.h>
23#include <linux/io.h>
24#include <linux/netdev_features.h>
25#include <linux/udp.h>
26#include <linux/tcp.h>
27#include <net/vxlan.h>
28#include <linux/ip.h>
29#include <net/ipv6.h>
30#include <net/tcp.h>
31#include <linux/if_ether.h>
32#include <linux/if_vlan.h>
33#include <linux/pkt_sched.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/random.h>
37#include <net/ip6_checksum.h>
38#include <linux/bitops.h>
39
40#include "qede.h"
41
42static const char version[] = "QLogic QL4xxx 40G/100G Ethernet Driver qede "
43 DRV_MODULE_VERSION "\n";
44
45MODULE_DESCRIPTION("QLogic 40G/100G Ethernet Driver");
46MODULE_LICENSE("GPL");
47MODULE_VERSION(DRV_MODULE_VERSION);
48
49static uint debug;
50module_param(debug, uint, 0);
51MODULE_PARM_DESC(debug, " Default debug msglevel");
52
53static const struct qed_eth_ops *qed_ops;
54
55#define CHIP_NUM_57980S_40 0x1634
56#define CHIP_NUM_57980S_10 0x1635
57#define CHIP_NUM_57980S_MF 0x1636
58#define CHIP_NUM_57980S_100 0x1644
59#define CHIP_NUM_57980S_50 0x1654
60#define CHIP_NUM_57980S_25 0x1656
61
62#ifndef PCI_DEVICE_ID_NX2_57980E
63#define PCI_DEVICE_ID_57980S_40 CHIP_NUM_57980S_40
64#define PCI_DEVICE_ID_57980S_10 CHIP_NUM_57980S_10
65#define PCI_DEVICE_ID_57980S_MF CHIP_NUM_57980S_MF
66#define PCI_DEVICE_ID_57980S_100 CHIP_NUM_57980S_100
67#define PCI_DEVICE_ID_57980S_50 CHIP_NUM_57980S_50
68#define PCI_DEVICE_ID_57980S_25 CHIP_NUM_57980S_25
69#endif
70
71static const struct pci_device_id qede_pci_tbl[] = {
72 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_40), 0 },
73 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_10), 0 },
74 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_MF), 0 },
75 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_100), 0 },
76 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_50), 0 },
77 { PCI_VDEVICE(QLOGIC, PCI_DEVICE_ID_57980S_25), 0 },
78 { 0 }
79};
80
81MODULE_DEVICE_TABLE(pci, qede_pci_tbl);
82
83static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id);
84
85#define TX_TIMEOUT (5 * HZ)
86
87static void qede_remove(struct pci_dev *pdev);
2950219d
YM		 88static int qede_alloc_rx_buffer(struct qede_dev *edev,
89 struct qede_rx_queue *rxq);
a2ec6172 90static void qede_link_update(void *dev, struct qed_link_output *link);
e712d52b
YM		 91
92static struct pci_driver qede_pci_driver = {
93 .name = "qede",
94 .id_table = qede_pci_tbl,
95 .probe = qede_probe,
96 .remove = qede_remove,
97};
98
a2ec6172
SK		 99static struct qed_eth_cb_ops qede_ll_ops = {
100 {
101 .link_update = qede_link_update,
102 },
103};
104
2950219d
YM		 105static int qede_netdev_event(struct notifier_block *this, unsigned long event,
106 void *ptr)
107{
108 struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
109 struct ethtool_drvinfo drvinfo;
110 struct qede_dev *edev;
111
112 /* Currently only support name change */
113 if (event != NETDEV_CHANGENAME)
114 goto done;
115
116 /* Check whether this is a qede device */
117 if (!ndev || !ndev->ethtool_ops || !ndev->ethtool_ops->get_drvinfo)
118 goto done;
119
120 memset(&drvinfo, 0, sizeof(drvinfo));
121 ndev->ethtool_ops->get_drvinfo(ndev, &drvinfo);
122 if (strcmp(drvinfo.driver, "qede"))
123 goto done;
124 edev = netdev_priv(ndev);
125
126 /* Notify qed of the name change */
127 if (!edev->ops || !edev->ops->common)
128 goto done;
129 edev->ops->common->set_id(edev->cdev, edev->ndev->name,
130 "qede");
131
132done:
133 return NOTIFY_DONE;
134}
135
136static struct notifier_block qede_netdev_notifier = {
137 .notifier_call = qede_netdev_event,
138};
139
e712d52b
YM		 140static
141int __init qede_init(void)
142{
143 int ret;
144 u32 qed_ver;
145
146 pr_notice("qede_init: %s\n", version);
147
148 qed_ver = qed_get_protocol_version(QED_PROTOCOL_ETH);
149 if (qed_ver != QEDE_ETH_INTERFACE_VERSION) {
150 pr_notice("Version mismatch [%08x != %08x]\n",
151 qed_ver,
152 QEDE_ETH_INTERFACE_VERSION);
153 return -EINVAL;
154 }
155
156 qed_ops = qed_get_eth_ops(QEDE_ETH_INTERFACE_VERSION);
157 if (!qed_ops) {
158 pr_notice("Failed to get qed ethtool operations\n");
159 return -EINVAL;
160 }
161
2950219d
YM		 162 /* Must register notifier before pci ops, since we might miss
163 * interface rename after pci probe and netdev registeration.
164 */
165 ret = register_netdevice_notifier(&qede_netdev_notifier);
166 if (ret) {
167 pr_notice("Failed to register netdevice_notifier\n");
168 qed_put_eth_ops();
169 return -EINVAL;
170 }
171
e712d52b
YM		 172 ret = pci_register_driver(&qede_pci_driver);
173 if (ret) {
174 pr_notice("Failed to register driver\n");
2950219d 175 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 176 qed_put_eth_ops();
177 return -EINVAL;
178 }
179
180 return 0;
181}
182
183static void __exit qede_cleanup(void)
184{
185 pr_notice("qede_cleanup called\n");
186
2950219d 187 unregister_netdevice_notifier(&qede_netdev_notifier);
e712d52b
YM		 188 pci_unregister_driver(&qede_pci_driver);
189 qed_put_eth_ops();
190}
191
192module_init(qede_init);
193module_exit(qede_cleanup);
194
2950219d
YM		 195/* -------------------------------------------------------------------------
196 * START OF FAST-PATH
197 * -------------------------------------------------------------------------
198 */
199
200/* Unmap the data and free skb */
201static int qede_free_tx_pkt(struct qede_dev *edev,
202 struct qede_tx_queue *txq,
203 int *len)
204{
205 u16 idx = txq->sw_tx_cons & NUM_TX_BDS_MAX;
206 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
207 struct eth_tx_1st_bd *first_bd;
208 struct eth_tx_bd *tx_data_bd;
209 int bds_consumed = 0;
210 int nbds;
211 bool data_split = txq->sw_tx_ring[idx].flags & QEDE_TSO_SPLIT_BD;
212 int i, split_bd_len = 0;
213
214 if (unlikely(!skb)) {
215 DP_ERR(edev,
216 "skb is null for txq idx=%d txq->sw_tx_cons=%d txq->sw_tx_prod=%d\n",
217 idx, txq->sw_tx_cons, txq->sw_tx_prod);
218 return -1;
219 }
220
221 *len = skb->len;
222
223 first_bd = (struct eth_tx_1st_bd *)qed_chain_consume(&txq->tx_pbl);
224
225 bds_consumed++;
226
227 nbds = first_bd->data.nbds;
228
229 if (data_split) {
230 struct eth_tx_bd *split = (struct eth_tx_bd *)
231 qed_chain_consume(&txq->tx_pbl);
232 split_bd_len = BD_UNMAP_LEN(split);
233 bds_consumed++;
234 }
235 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
236 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
237
238 /* Unmap the data of the skb frags */
239 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++, bds_consumed++) {
240 tx_data_bd = (struct eth_tx_bd *)
241 qed_chain_consume(&txq->tx_pbl);
242 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
243 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
244 }
245
246 while (bds_consumed++ < nbds)
247 qed_chain_consume(&txq->tx_pbl);
248
249 /* Free skb */
250 dev_kfree_skb_any(skb);
251 txq->sw_tx_ring[idx].skb = NULL;
252 txq->sw_tx_ring[idx].flags = 0;
253
254 return 0;
255}
256
257/* Unmap the data and free skb when mapping failed during start_xmit */
258static void qede_free_failed_tx_pkt(struct qede_dev *edev,
259 struct qede_tx_queue *txq,
260 struct eth_tx_1st_bd *first_bd,
261 int nbd,
262 bool data_split)
263{
264 u16 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
265 struct sk_buff *skb = txq->sw_tx_ring[idx].skb;
266 struct eth_tx_bd *tx_data_bd;
267 int i, split_bd_len = 0;
268
269 /* Return prod to its position before this skb was handled */
270 qed_chain_set_prod(&txq->tx_pbl,
271 le16_to_cpu(txq->tx_db.data.bd_prod),
272 first_bd);
273
274 first_bd = (struct eth_tx_1st_bd *)qed_chain_produce(&txq->tx_pbl);
275
276 if (data_split) {
277 struct eth_tx_bd *split = (struct eth_tx_bd *)
278 qed_chain_produce(&txq->tx_pbl);
279 split_bd_len = BD_UNMAP_LEN(split);
280 nbd--;
281 }
282
283 dma_unmap_page(&edev->pdev->dev, BD_UNMAP_ADDR(first_bd),
284 BD_UNMAP_LEN(first_bd) + split_bd_len, DMA_TO_DEVICE);
285
286 /* Unmap the data of the skb frags */
287 for (i = 0; i < nbd; i++) {
288 tx_data_bd = (struct eth_tx_bd *)
289 qed_chain_produce(&txq->tx_pbl);
290 if (tx_data_bd->nbytes)
291 dma_unmap_page(&edev->pdev->dev,
292 BD_UNMAP_ADDR(tx_data_bd),
293 BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
294 }
295
296 /* Return again prod to its position before this skb was handled */
297 qed_chain_set_prod(&txq->tx_pbl,
298 le16_to_cpu(txq->tx_db.data.bd_prod),
299 first_bd);
300
301 /* Free skb */
302 dev_kfree_skb_any(skb);
303 txq->sw_tx_ring[idx].skb = NULL;
304 txq->sw_tx_ring[idx].flags = 0;
305}
306
307static u32 qede_xmit_type(struct qede_dev *edev,
308 struct sk_buff *skb,
309 int *ipv6_ext)
310{
311 u32 rc = XMIT_L4_CSUM;
312 __be16 l3_proto;
313
314 if (skb->ip_summed != CHECKSUM_PARTIAL)
315 return XMIT_PLAIN;
316
317 l3_proto = vlan_get_protocol(skb);
318 if (l3_proto == htons(ETH_P_IPV6) &&
319 (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
320 *ipv6_ext = 1;
321
322 if (skb_is_gso(skb))
323 rc |= XMIT_LSO;
324
325 return rc;
326}
327
328static void qede_set_params_for_ipv6_ext(struct sk_buff *skb,
329 struct eth_tx_2nd_bd *second_bd,
330 struct eth_tx_3rd_bd *third_bd)
331{
332 u8 l4_proto;
fc48b7a6 333 u16 bd2_bits1 = 0, bd2_bits2 = 0;
2950219d 334
fc48b7a6 335 bd2_bits1 |= (1 << ETH_TX_DATA_2ND_BD_IPV6_EXT_SHIFT);
2950219d 336
fc48b7a6 337 bd2_bits2 |= ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) &
2950219d
YM		 338 ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_MASK)
339 << ETH_TX_DATA_2ND_BD_L4_HDR_START_OFFSET_W_SHIFT;
340
fc48b7a6 341 bd2_bits1 |= (ETH_L4_PSEUDO_CSUM_CORRECT_LENGTH <<
2950219d
YM		 342 ETH_TX_DATA_2ND_BD_L4_PSEUDO_CSUM_MODE_SHIFT);
343
344 if (vlan_get_protocol(skb) == htons(ETH_P_IPV6))
345 l4_proto = ipv6_hdr(skb)->nexthdr;
346 else
347 l4_proto = ip_hdr(skb)->protocol;
348
349 if (l4_proto == IPPROTO_UDP)
fc48b7a6 350 bd2_bits1 |= 1 << ETH_TX_DATA_2ND_BD_L4_UDP_SHIFT;
2950219d 351
fc48b7a6 352 if (third_bd)
2950219d 353 third_bd->data.bitfields |=
fc48b7a6
YM		 354 cpu_to_le16(((tcp_hdrlen(skb) / 4) &
355 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_MASK) <<
356 ETH_TX_DATA_3RD_BD_TCP_HDR_LEN_DW_SHIFT);
2950219d 357
fc48b7a6 358 second_bd->data.bitfields1 = cpu_to_le16(bd2_bits1);
2950219d
YM		 359 second_bd->data.bitfields2 = cpu_to_le16(bd2_bits2);
360}
361
362static int map_frag_to_bd(struct qede_dev *edev,
363 skb_frag_t *frag,
364 struct eth_tx_bd *bd)
365{
366 dma_addr_t mapping;
367
368 /* Map skb non-linear frag data for DMA */
369 mapping = skb_frag_dma_map(&edev->pdev->dev, frag, 0,
370 skb_frag_size(frag),
371 DMA_TO_DEVICE);
372 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
373 DP_NOTICE(edev, "Unable to map frag - dropping packet\n");
374 return -ENOMEM;
375 }
376
377 /* Setup the data pointer of the frag data */
378 BD_SET_UNMAP_ADDR_LEN(bd, mapping, skb_frag_size(frag));
379
380 return 0;
381}
382
383/* Main transmit function */
384static
385netdev_tx_t qede_start_xmit(struct sk_buff *skb,
386 struct net_device *ndev)
387{
388 struct qede_dev *edev = netdev_priv(ndev);
389 struct netdev_queue *netdev_txq;
390 struct qede_tx_queue *txq;
391 struct eth_tx_1st_bd *first_bd;
392 struct eth_tx_2nd_bd *second_bd = NULL;
393 struct eth_tx_3rd_bd *third_bd = NULL;
394 struct eth_tx_bd *tx_data_bd = NULL;
395 u16 txq_index;
396 u8 nbd = 0;
397 dma_addr_t mapping;
398 int rc, frag_idx = 0, ipv6_ext = 0;
399 u8 xmit_type;
400 u16 idx;
401 u16 hlen;
402 bool data_split;
403
404 /* Get tx-queue context and netdev index */
405 txq_index = skb_get_queue_mapping(skb);
406 WARN_ON(txq_index >= QEDE_TSS_CNT(edev));
407 txq = QEDE_TX_QUEUE(edev, txq_index);
408 netdev_txq = netdev_get_tx_queue(ndev, txq_index);
409
410 /* Current code doesn't support SKB linearization, since the max number
411 * of skb frags can be passed in the FW HSI.
412 */
413 BUILD_BUG_ON(MAX_SKB_FRAGS > ETH_TX_MAX_BDS_PER_NON_LSO_PACKET);
414
415 WARN_ON(qed_chain_get_elem_left(&txq->tx_pbl) <
416 (MAX_SKB_FRAGS + 1));
417
418 xmit_type = qede_xmit_type(edev, skb, &ipv6_ext);
419
420 /* Fill the entry in the SW ring and the BDs in the FW ring */
421 idx = txq->sw_tx_prod & NUM_TX_BDS_MAX;
422 txq->sw_tx_ring[idx].skb = skb;
423 first_bd = (struct eth_tx_1st_bd *)
424 qed_chain_produce(&txq->tx_pbl);
425 memset(first_bd, 0, sizeof(*first_bd));
426 first_bd->data.bd_flags.bitfields =
427 1 << ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT;
428
429 /* Map skb linear data for DMA and set in the first BD */
430 mapping = dma_map_single(&edev->pdev->dev, skb->data,
431 skb_headlen(skb), DMA_TO_DEVICE);
432 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
433 DP_NOTICE(edev, "SKB mapping failed\n");
434 qede_free_failed_tx_pkt(edev, txq, first_bd, 0, false);
435 return NETDEV_TX_OK;
436 }
437 nbd++;
438 BD_SET_UNMAP_ADDR_LEN(first_bd, mapping, skb_headlen(skb));
439
440 /* In case there is IPv6 with extension headers or LSO we need 2nd and
441 * 3rd BDs.
442 */
443 if (unlikely((xmit_type & XMIT_LSO) | ipv6_ext)) {
444 second_bd = (struct eth_tx_2nd_bd *)
445 qed_chain_produce(&txq->tx_pbl);
446 memset(second_bd, 0, sizeof(*second_bd));
447
448 nbd++;
449 third_bd = (struct eth_tx_3rd_bd *)
450 qed_chain_produce(&txq->tx_pbl);
451 memset(third_bd, 0, sizeof(*third_bd));
452
453 nbd++;
454 /* We need to fill in additional data in second_bd... */
455 tx_data_bd = (struct eth_tx_bd *)second_bd;
456 }
457
458 if (skb_vlan_tag_present(skb)) {
459 first_bd->data.vlan = cpu_to_le16(skb_vlan_tag_get(skb));
460 first_bd->data.bd_flags.bitfields |=
461 1 << ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT;
462 }
463
464 /* Fill the parsing flags & params according to the requested offload */
465 if (xmit_type & XMIT_L4_CSUM) {
fc48b7a6
YM		 466 u16 temp = 1 << ETH_TX_DATA_1ST_BD_TUNN_CFG_OVERRIDE_SHIFT;
467
2950219d
YM		 468 /* We don't re-calculate IP checksum as it is already done by
469 * the upper stack
470 */
471 first_bd->data.bd_flags.bitfields |=
472 1 << ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT;
473
fc48b7a6
YM		 474 first_bd->data.bitfields |= cpu_to_le16(temp);
475
2950219d
YM		 476 /* If the packet is IPv6 with extension header, indicate that
477 * to FW and pass few params, since the device cracker doesn't
478 * support parsing IPv6 with extension header/s.
479 */
480 if (unlikely(ipv6_ext))
481 qede_set_params_for_ipv6_ext(skb, second_bd, third_bd);
482 }
483
484 if (xmit_type & XMIT_LSO) {
485 first_bd->data.bd_flags.bitfields |=
486 (1 << ETH_TX_1ST_BD_FLAGS_LSO_SHIFT);
487 third_bd->data.lso_mss =
488 cpu_to_le16(skb_shinfo(skb)->gso_size);
489
490 first_bd->data.bd_flags.bitfields |=
491 1 << ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT;
492 hlen = skb_transport_header(skb) +
493 tcp_hdrlen(skb) - skb->data;
494
495 /* @@@TBD - if will not be removed need to check */
496 third_bd->data.bitfields |=
fc48b7a6 497 cpu_to_le16((1 << ETH_TX_DATA_3RD_BD_HDR_NBD_SHIFT));
2950219d
YM		 498
499 /* Make life easier for FW guys who can't deal with header and
500 * data on same BD. If we need to split, use the second bd...
501 */
502 if (unlikely(skb_headlen(skb) > hlen)) {
503 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
504 "TSO split header size is %d (%x:%x)\n",
505 first_bd->nbytes, first_bd->addr.hi,
506 first_bd->addr.lo);
507
508 mapping = HILO_U64(le32_to_cpu(first_bd->addr.hi),
509 le32_to_cpu(first_bd->addr.lo)) +
510 hlen;
511
512 BD_SET_UNMAP_ADDR_LEN(tx_data_bd, mapping,
513 le16_to_cpu(first_bd->nbytes) -
514 hlen);
515
516 /* this marks the BD as one that has no
517 * individual mapping
518 */
519 txq->sw_tx_ring[idx].flags |= QEDE_TSO_SPLIT_BD;
520
521 first_bd->nbytes = cpu_to_le16(hlen);
522
523 tx_data_bd = (struct eth_tx_bd *)third_bd;
524 data_split = true;
525 }
526 }
527
528 /* Handle fragmented skb */
529 /* special handle for frags inside 2nd and 3rd bds.. */
530 while (tx_data_bd && frag_idx < skb_shinfo(skb)->nr_frags) {
531 rc = map_frag_to_bd(edev,
532 &skb_shinfo(skb)->frags[frag_idx],
533 tx_data_bd);
534 if (rc) {
535 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
536 data_split);
537 return NETDEV_TX_OK;
538 }
539
540 if (tx_data_bd == (struct eth_tx_bd *)second_bd)
541 tx_data_bd = (struct eth_tx_bd *)third_bd;
542 else
543 tx_data_bd = NULL;
544
545 frag_idx++;
546 }
547
548 /* map last frags into 4th, 5th .... */
549 for (; frag_idx < skb_shinfo(skb)->nr_frags; frag_idx++, nbd++) {
550 tx_data_bd = (struct eth_tx_bd *)
551 qed_chain_produce(&txq->tx_pbl);
552
553 memset(tx_data_bd, 0, sizeof(*tx_data_bd));
554
555 rc = map_frag_to_bd(edev,
556 &skb_shinfo(skb)->frags[frag_idx],
557 tx_data_bd);
558 if (rc) {
559 qede_free_failed_tx_pkt(edev, txq, first_bd, nbd,
560 data_split);
561 return NETDEV_TX_OK;
562 }
563 }
564
565 /* update the first BD with the actual num BDs */
566 first_bd->data.nbds = nbd;
567
568 netdev_tx_sent_queue(netdev_txq, skb->len);
569
570 skb_tx_timestamp(skb);
571
572 /* Advance packet producer only before sending the packet since mapping
573 * of pages may fail.
574 */
575 txq->sw_tx_prod++;
576
577 /* 'next page' entries are counted in the producer value */
578 txq->tx_db.data.bd_prod =
579 cpu_to_le16(qed_chain_get_prod_idx(&txq->tx_pbl));
580
581 /* wmb makes sure that the BDs data is updated before updating the
582 * producer, otherwise FW may read old data from the BDs.
583 */
584 wmb();
585 barrier();
586 writel(txq->tx_db.raw, txq->doorbell_addr);
587
588 /* mmiowb is needed to synchronize doorbell writes from more than one
589 * processor. It guarantees that the write arrives to the device before
590 * the queue lock is released and another start_xmit is called (possibly
591 * on another CPU). Without this barrier, the next doorbell can bypass
592 * this doorbell. This is applicable to IA64/Altix systems.
593 */
594 mmiowb();
595
596 if (unlikely(qed_chain_get_elem_left(&txq->tx_pbl)
597 < (MAX_SKB_FRAGS + 1))) {
598 netif_tx_stop_queue(netdev_txq);
599 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
600 "Stop queue was called\n");
601 /* paired memory barrier is in qede_tx_int(), we have to keep
602 * ordering of set_bit() in netif_tx_stop_queue() and read of
603 * fp->bd_tx_cons
604 */
605 smp_mb();
606
607 if (qed_chain_get_elem_left(&txq->tx_pbl)
608 >= (MAX_SKB_FRAGS + 1) &&
609 (edev->state == QEDE_STATE_OPEN)) {
610 netif_tx_wake_queue(netdev_txq);
611 DP_VERBOSE(edev, NETIF_MSG_TX_QUEUED,
612 "Wake queue was called\n");
613 }
614 }
615
616 return NETDEV_TX_OK;
617}
618
619static int qede_txq_has_work(struct qede_tx_queue *txq)
620{
621 u16 hw_bd_cons;
622
623 /* Tell compiler that consumer and producer can change */
624 barrier();
625 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
626 if (qed_chain_get_cons_idx(&txq->tx_pbl) == hw_bd_cons + 1)
627 return 0;
628
629 return hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl);
630}
631
632static int qede_tx_int(struct qede_dev *edev,
633 struct qede_tx_queue *txq)
634{
635 struct netdev_queue *netdev_txq;
636 u16 hw_bd_cons;
637 unsigned int pkts_compl = 0, bytes_compl = 0;
638 int rc;
639
640 netdev_txq = netdev_get_tx_queue(edev->ndev, txq->index);
641
642 hw_bd_cons = le16_to_cpu(*txq->hw_cons_ptr);
643 barrier();
644
645 while (hw_bd_cons != qed_chain_get_cons_idx(&txq->tx_pbl)) {
646 int len = 0;
647
648 rc = qede_free_tx_pkt(edev, txq, &len);
649 if (rc) {
650 DP_NOTICE(edev, "hw_bd_cons = %d, chain_cons=%d\n",
651 hw_bd_cons,
652 qed_chain_get_cons_idx(&txq->tx_pbl));
653 break;
654 }
655
656 bytes_compl += len;
657 pkts_compl++;
658 txq->sw_tx_cons++;
659 }
660
661 netdev_tx_completed_queue(netdev_txq, pkts_compl, bytes_compl);
662
663 /* Need to make the tx_bd_cons update visible to start_xmit()
664 * before checking for netif_tx_queue_stopped(). Without the
665 * memory barrier, there is a small possibility that
666 * start_xmit() will miss it and cause the queue to be stopped
667 * forever.
668 * On the other hand we need an rmb() here to ensure the proper
669 * ordering of bit testing in the following
670 * netif_tx_queue_stopped(txq) call.
671 */
672 smp_mb();
673
674 if (unlikely(netif_tx_queue_stopped(netdev_txq))) {
675 /* Taking tx_lock is needed to prevent reenabling the queue
676 * while it's empty. This could have happen if rx_action() gets
677 * suspended in qede_tx_int() after the condition before
678 * netif_tx_wake_queue(), while tx_action (qede_start_xmit()):
679 *
680 * stops the queue->sees fresh tx_bd_cons->releases the queue->
681 * sends some packets consuming the whole queue again->
682 * stops the queue
683 */
684
685 __netif_tx_lock(netdev_txq, smp_processor_id());
686
687 if ((netif_tx_queue_stopped(netdev_txq)) &&
688 (edev->state == QEDE_STATE_OPEN) &&
689 (qed_chain_get_elem_left(&txq->tx_pbl)
690 >= (MAX_SKB_FRAGS + 1))) {
691 netif_tx_wake_queue(netdev_txq);
692 DP_VERBOSE(edev, NETIF_MSG_TX_DONE,
693 "Wake queue was called\n");
694 }
695
696 __netif_tx_unlock(netdev_txq);
697 }
698
699 return 0;
700}
701
702static bool qede_has_rx_work(struct qede_rx_queue *rxq)
703{
704 u16 hw_comp_cons, sw_comp_cons;
705
706 /* Tell compiler that status block fields can change */
707 barrier();
708
709 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
710 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
711
712 return hw_comp_cons != sw_comp_cons;
713}
714
715static bool qede_has_tx_work(struct qede_fastpath *fp)
716{
717 u8 tc;
718
719 for (tc = 0; tc < fp->edev->num_tc; tc++)
720 if (qede_txq_has_work(&fp->txqs[tc]))
721 return true;
722 return false;
723}
724
fc48b7a6
YM		 725/* This function reuses the buffer(from an offset) from
726 * consumer index to producer index in the bd ring
2950219d 727 */
fc48b7a6
YM		 728static inline void qede_reuse_page(struct qede_dev *edev,
729 struct qede_rx_queue *rxq,
730 struct sw_rx_data *curr_cons)
2950219d 731{
2950219d 732 struct eth_rx_bd *rx_bd_prod = qed_chain_produce(&rxq->rx_bd_ring);
fc48b7a6
YM		 733 struct sw_rx_data *curr_prod;
734 dma_addr_t new_mapping;
2950219d 735
fc48b7a6
YM		 736 curr_prod = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
737 *curr_prod = *curr_cons;
2950219d 738
fc48b7a6
YM		 739 new_mapping = curr_prod->mapping + curr_prod->page_offset;
740
741 rx_bd_prod->addr.hi = cpu_to_le32(upper_32_bits(new_mapping));
742 rx_bd_prod->addr.lo = cpu_to_le32(lower_32_bits(new_mapping));
2950219d 743
2950219d 744 rxq->sw_rx_prod++;
fc48b7a6
YM		 745 curr_cons->data = NULL;
746}
747
748static inline int qede_realloc_rx_buffer(struct qede_dev *edev,
749 struct qede_rx_queue *rxq,
750 struct sw_rx_data *curr_cons)
751{
752 /* Move to the next segment in the page */
753 curr_cons->page_offset += rxq->rx_buf_seg_size;
754
755 if (curr_cons->page_offset == PAGE_SIZE) {
756 if (unlikely(qede_alloc_rx_buffer(edev, rxq)))
757 return -ENOMEM;
758
759 dma_unmap_page(&edev->pdev->dev, curr_cons->mapping,
760 PAGE_SIZE, DMA_FROM_DEVICE);
761 } else {
762 /* Increment refcount of the page as we don't want
763 * network stack to take the ownership of the page
764 * which can be recycled multiple times by the driver.
765 */
766 atomic_inc(&curr_cons->data->_count);
767 qede_reuse_page(edev, rxq, curr_cons);
768 }
769
770 return 0;
2950219d
YM		 771}
772
773static inline void qede_update_rx_prod(struct qede_dev *edev,
774 struct qede_rx_queue *rxq)
775{
776 u16 bd_prod = qed_chain_get_prod_idx(&rxq->rx_bd_ring);
777 u16 cqe_prod = qed_chain_get_prod_idx(&rxq->rx_comp_ring);
778 struct eth_rx_prod_data rx_prods = {0};
779
780 /* Update producers */
781 rx_prods.bd_prod = cpu_to_le16(bd_prod);
782 rx_prods.cqe_prod = cpu_to_le16(cqe_prod);
783
784 /* Make sure that the BD and SGE data is updated before updating the
785 * producers since FW might read the BD/SGE right after the producer
786 * is updated.
787 */
788 wmb();
789
790 internal_ram_wr(rxq->hw_rxq_prod_addr, sizeof(rx_prods),
791 (u32 *)&rx_prods);
792
793 /* mmiowb is needed to synchronize doorbell writes from more than one
794 * processor. It guarantees that the write arrives to the device before
795 * the napi lock is released and another qede_poll is called (possibly
796 * on another CPU). Without this barrier, the next doorbell can bypass
797 * this doorbell. This is applicable to IA64/Altix systems.
798 */
799 mmiowb();
800}
801
802static u32 qede_get_rxhash(struct qede_dev *edev,
803 u8 bitfields,
804 __le32 rss_hash,
805 enum pkt_hash_types *rxhash_type)
806{
807 enum rss_hash_type htype;
808
809 htype = GET_FIELD(bitfields, ETH_FAST_PATH_RX_REG_CQE_RSS_HASH_TYPE);
810
811 if ((edev->ndev->features & NETIF_F_RXHASH) && htype) {
812 *rxhash_type = ((htype == RSS_HASH_TYPE_IPV4) ||
813 (htype == RSS_HASH_TYPE_IPV6)) ?
814 PKT_HASH_TYPE_L3 : PKT_HASH_TYPE_L4;
815 return le32_to_cpu(rss_hash);
816 }
817 *rxhash_type = PKT_HASH_TYPE_NONE;
818 return 0;
819}
820
821static void qede_set_skb_csum(struct sk_buff *skb, u8 csum_flag)
822{
823 skb_checksum_none_assert(skb);
824
825 if (csum_flag & QEDE_CSUM_UNNECESSARY)
826 skb->ip_summed = CHECKSUM_UNNECESSARY;
827}
828
829static inline void qede_skb_receive(struct qede_dev *edev,
830 struct qede_fastpath *fp,
831 struct sk_buff *skb,
832 u16 vlan_tag)
833{
834 if (vlan_tag)
835 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
836 vlan_tag);
837
838 napi_gro_receive(&fp->napi, skb);
839}
840
841static u8 qede_check_csum(u16 flag)
842{
843 u16 csum_flag = 0;
844 u8 csum = 0;
845
846 if ((PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_MASK <<
847 PARSING_AND_ERR_FLAGS_L4CHKSMWASCALCULATED_SHIFT) & flag) {
848 csum_flag |= PARSING_AND_ERR_FLAGS_L4CHKSMERROR_MASK <<
849 PARSING_AND_ERR_FLAGS_L4CHKSMERROR_SHIFT;
850 csum = QEDE_CSUM_UNNECESSARY;
851 }
852
853 csum_flag |= PARSING_AND_ERR_FLAGS_IPHDRERROR_MASK <<
854 PARSING_AND_ERR_FLAGS_IPHDRERROR_SHIFT;
855
856 if (csum_flag & flag)
857 return QEDE_CSUM_ERROR;
858
859 return csum;
860}
861
862static int qede_rx_int(struct qede_fastpath *fp, int budget)
863{
864 struct qede_dev *edev = fp->edev;
865 struct qede_rx_queue *rxq = fp->rxq;
866
867 u16 hw_comp_cons, sw_comp_cons, sw_rx_index, parse_flag;
868 int rx_pkt = 0;
869 u8 csum_flag;
870
871 hw_comp_cons = le16_to_cpu(*rxq->hw_cons_ptr);
872 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
873
874 /* Memory barrier to prevent the CPU from doing speculative reads of CQE
875 * / BD in the while-loop before reading hw_comp_cons. If the CQE is
876 * read before it is written by FW, then FW writes CQE and SB, and then
877 * the CPU reads the hw_comp_cons, it will use an old CQE.
878 */
879 rmb();
880
881 /* Loop to complete all indicated BDs */
882 while (sw_comp_cons != hw_comp_cons) {
883 struct eth_fast_path_rx_reg_cqe *fp_cqe;
884 enum pkt_hash_types rxhash_type;
885 enum eth_rx_cqe_type cqe_type;
886 struct sw_rx_data *sw_rx_data;
887 union eth_rx_cqe *cqe;
888 struct sk_buff *skb;
fc48b7a6
YM		 889 struct page *data;
890 __le16 flags;
2950219d
YM		 891 u16 len, pad;
892 u32 rx_hash;
2950219d
YM		 893
894 /* Get the CQE from the completion ring */
895 cqe = (union eth_rx_cqe *)
896 qed_chain_consume(&rxq->rx_comp_ring);
897 cqe_type = cqe->fast_path_regular.type;
898
899 if (unlikely(cqe_type == ETH_RX_CQE_TYPE_SLOW_PATH)) {
900 edev->ops->eth_cqe_completion(
901 edev->cdev, fp->rss_id,
902 (struct eth_slow_path_rx_cqe *)cqe);
903 goto next_cqe;
904 }
905
906 /* Get the data from the SW ring */
907 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
908 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
909 data = sw_rx_data->data;
910
911 fp_cqe = &cqe->fast_path_regular;
fc48b7a6 912 len = le16_to_cpu(fp_cqe->len_on_first_bd);
2950219d 913 pad = fp_cqe->placement_offset;
fc48b7a6 914 flags = cqe->fast_path_regular.pars_flags.flags;
2950219d 915
fc48b7a6
YM		 916 /* If this is an error packet then drop it */
917 parse_flag = le16_to_cpu(flags);
2950219d 918
fc48b7a6
YM		 919 csum_flag = qede_check_csum(parse_flag);
920 if (unlikely(csum_flag == QEDE_CSUM_ERROR)) {
921 DP_NOTICE(edev,
922 "CQE in CONS = %u has error, flags = %x, dropping incoming packet\n",
923 sw_comp_cons, parse_flag);
924 rxq->rx_hw_errors++;
925 qede_reuse_page(edev, rxq, sw_rx_data);
926 goto next_rx;
927 }
2950219d 928
fc48b7a6
YM		 929 skb = netdev_alloc_skb(edev->ndev, QEDE_RX_HDR_SIZE);
930 if (unlikely(!skb)) {
2950219d 931 DP_NOTICE(edev,
fc48b7a6
YM		 932 "Build_skb failed, dropping incoming packet\n");
933 qede_reuse_page(edev, rxq, sw_rx_data);
2950219d 934 rxq->rx_alloc_errors++;
fc48b7a6
YM		 935 goto next_rx;
936 }
937
938 /* Copy data into SKB */
939 if (len + pad <= QEDE_RX_HDR_SIZE) {
940 memcpy(skb_put(skb, len),
941 page_address(data) + pad +
942 sw_rx_data->page_offset, len);
943 qede_reuse_page(edev, rxq, sw_rx_data);
944 } else {
945 struct skb_frag_struct *frag;
946 unsigned int pull_len;
947 unsigned char *va;
948
949 frag = &skb_shinfo(skb)->frags[0];
950
951 skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, data,
952 pad + sw_rx_data->page_offset,
953 len, rxq->rx_buf_seg_size);
954
955 va = skb_frag_address(frag);
956 pull_len = eth_get_headlen(va, QEDE_RX_HDR_SIZE);
957
958 /* Align the pull_len to optimize memcpy */
959 memcpy(skb->data, va, ALIGN(pull_len, sizeof(long)));
960
961 skb_frag_size_sub(frag, pull_len);
962 frag->page_offset += pull_len;
963 skb->data_len -= pull_len;
964 skb->tail += pull_len;
965
966 if (unlikely(qede_realloc_rx_buffer(edev, rxq,
967 sw_rx_data))) {
968 DP_ERR(edev, "Failed to allocate rx buffer\n");
969 rxq->rx_alloc_errors++;
970 goto next_cqe;
971 }
2950219d
YM		 972 }
973
fc48b7a6
YM		 974 if (fp_cqe->bd_num != 1) {
975 u16 pkt_len = le16_to_cpu(fp_cqe->pkt_len);
976 u8 num_frags;
977
978 pkt_len -= len;
979
980 for (num_frags = fp_cqe->bd_num - 1; num_frags > 0;
981 num_frags--) {
982 u16 cur_size = pkt_len > rxq->rx_buf_size ?
983 rxq->rx_buf_size : pkt_len;
984
985 WARN_ONCE(!cur_size,
986 "Still got %d BDs for mapping jumbo, but length became 0\n",
987 num_frags);
988
989 if (unlikely(qede_alloc_rx_buffer(edev, rxq)))
990 goto next_cqe;
991
992 rxq->sw_rx_cons++;
993 sw_rx_index = rxq->sw_rx_cons & NUM_RX_BDS_MAX;
994 sw_rx_data = &rxq->sw_rx_ring[sw_rx_index];
995 qed_chain_consume(&rxq->rx_bd_ring);
996 dma_unmap_page(&edev->pdev->dev,
997 sw_rx_data->mapping,
998 PAGE_SIZE, DMA_FROM_DEVICE);
999
1000 skb_fill_page_desc(skb,
1001 skb_shinfo(skb)->nr_frags++,
1002 sw_rx_data->data, 0,
1003 cur_size);
1004
1005 skb->truesize += PAGE_SIZE;
1006 skb->data_len += cur_size;
1007 skb->len += cur_size;
1008 pkt_len -= cur_size;
1009 }
2950219d 1010
fc48b7a6
YM		 1011 if (pkt_len)
1012 DP_ERR(edev,
1013 "Mapped all BDs of jumbo, but still have %d bytes\n",
1014 pkt_len);
1015 }
2950219d
YM		 1016
1017 skb->protocol = eth_type_trans(skb, edev->ndev);
1018
1019 rx_hash = qede_get_rxhash(edev, fp_cqe->bitfields,
1020 fp_cqe->rss_hash,
1021 &rxhash_type);
1022
1023 skb_set_hash(skb, rx_hash, rxhash_type);
1024
1025 qede_set_skb_csum(skb, csum_flag);
1026
1027 skb_record_rx_queue(skb, fp->rss_id);
1028
1029 qede_skb_receive(edev, fp, skb, le16_to_cpu(fp_cqe->vlan_tag));
1030
1031 qed_chain_consume(&rxq->rx_bd_ring);
1032
1033next_rx:
1034 rxq->sw_rx_cons++;
1035 rx_pkt++;
1036
1037next_cqe: /* don't consume bd rx buffer */
1038 qed_chain_recycle_consumed(&rxq->rx_comp_ring);
1039 sw_comp_cons = qed_chain_get_cons_idx(&rxq->rx_comp_ring);
1040 /* CR TPA - revisit how to handle budget in TPA perhaps
1041 * increase on "end"
1042 */
1043 if (rx_pkt == budget)
1044 break;
1045 } /* repeat while sw_comp_cons != hw_comp_cons... */
1046
1047 /* Update producers */
1048 qede_update_rx_prod(edev, rxq);
1049
1050 return rx_pkt;
1051}
1052
1053static int qede_poll(struct napi_struct *napi, int budget)
1054{
1055 int work_done = 0;
1056 struct qede_fastpath *fp = container_of(napi, struct qede_fastpath,
1057 napi);
1058 struct qede_dev *edev = fp->edev;
1059
1060 while (1) {
1061 u8 tc;
1062
1063 for (tc = 0; tc < edev->num_tc; tc++)
1064 if (qede_txq_has_work(&fp->txqs[tc]))
1065 qede_tx_int(edev, &fp->txqs[tc]);
1066
1067 if (qede_has_rx_work(fp->rxq)) {
1068 work_done += qede_rx_int(fp, budget - work_done);
1069
1070 /* must not complete if we consumed full budget */
1071 if (work_done >= budget)
1072 break;
1073 }
1074
1075 /* Fall out from the NAPI loop if needed */
1076 if (!(qede_has_rx_work(fp->rxq) || qede_has_tx_work(fp))) {
1077 qed_sb_update_sb_idx(fp->sb_info);
1078 /* *_has_*_work() reads the status block,
1079 * thus we need to ensure that status block indices
1080 * have been actually read (qed_sb_update_sb_idx)
1081 * prior to this check (*_has_*_work) so that
1082 * we won't write the "newer" value of the status block
1083 * to HW (if there was a DMA right after
1084 * qede_has_rx_work and if there is no rmb, the memory
1085 * reading (qed_sb_update_sb_idx) may be postponed
1086 * to right before *_ack_sb). In this case there
1087 * will never be another interrupt until there is
1088 * another update of the status block, while there
1089 * is still unhandled work.
1090 */
1091 rmb();
1092
1093 if (!(qede_has_rx_work(fp->rxq) ||
1094 qede_has_tx_work(fp))) {
1095 napi_complete(napi);
1096 /* Update and reenable interrupts */
1097 qed_sb_ack(fp->sb_info, IGU_INT_ENABLE,
1098 1 /*update*/);
1099 break;
1100 }
1101 }
1102 }
1103
1104 return work_done;
1105}
1106
1107static irqreturn_t qede_msix_fp_int(int irq, void *fp_cookie)
1108{
1109 struct qede_fastpath *fp = fp_cookie;
1110
1111 qed_sb_ack(fp->sb_info, IGU_INT_DISABLE, 0 /*do not update*/);
1112
1113 napi_schedule_irqoff(&fp->napi);
1114 return IRQ_HANDLED;
1115}
1116
1117/* -------------------------------------------------------------------------
1118 * END OF FAST-PATH
1119 * -------------------------------------------------------------------------
1120 */
1121
1122static int qede_open(struct net_device *ndev);
1123static int qede_close(struct net_device *ndev);
0d8e0aa0
SK		 1124static int qede_set_mac_addr(struct net_device *ndev, void *p);
1125static void qede_set_rx_mode(struct net_device *ndev);
1126static void qede_config_rx_mode(struct net_device *ndev);
1127
1128static int qede_set_ucast_rx_mac(struct qede_dev *edev,
1129 enum qed_filter_xcast_params_type opcode,
1130 unsigned char mac[ETH_ALEN])
1131{
1132 struct qed_filter_params filter_cmd;
1133
1134 memset(&filter_cmd, 0, sizeof(filter_cmd));
1135 filter_cmd.type = QED_FILTER_TYPE_UCAST;
1136 filter_cmd.filter.ucast.type = opcode;
1137 filter_cmd.filter.ucast.mac_valid = 1;
1138 ether_addr_copy(filter_cmd.filter.ucast.mac, mac);
1139
1140 return edev->ops->filter_config(edev->cdev, &filter_cmd);
1141}
1142
133fac0e
SK		 1143void qede_fill_by_demand_stats(struct qede_dev *edev)
1144{
1145 struct qed_eth_stats stats;
1146
1147 edev->ops->get_vport_stats(edev->cdev, &stats);
1148 edev->stats.no_buff_discards = stats.no_buff_discards;
1149 edev->stats.rx_ucast_bytes = stats.rx_ucast_bytes;
1150 edev->stats.rx_mcast_bytes = stats.rx_mcast_bytes;
1151 edev->stats.rx_bcast_bytes = stats.rx_bcast_bytes;
1152 edev->stats.rx_ucast_pkts = stats.rx_ucast_pkts;
1153 edev->stats.rx_mcast_pkts = stats.rx_mcast_pkts;
1154 edev->stats.rx_bcast_pkts = stats.rx_bcast_pkts;
1155 edev->stats.mftag_filter_discards = stats.mftag_filter_discards;
1156 edev->stats.mac_filter_discards = stats.mac_filter_discards;
1157
1158 edev->stats.tx_ucast_bytes = stats.tx_ucast_bytes;
1159 edev->stats.tx_mcast_bytes = stats.tx_mcast_bytes;
1160 edev->stats.tx_bcast_bytes = stats.tx_bcast_bytes;
1161 edev->stats.tx_ucast_pkts = stats.tx_ucast_pkts;
1162 edev->stats.tx_mcast_pkts = stats.tx_mcast_pkts;
1163 edev->stats.tx_bcast_pkts = stats.tx_bcast_pkts;
1164 edev->stats.tx_err_drop_pkts = stats.tx_err_drop_pkts;
1165 edev->stats.coalesced_pkts = stats.tpa_coalesced_pkts;
1166 edev->stats.coalesced_events = stats.tpa_coalesced_events;
1167 edev->stats.coalesced_aborts_num = stats.tpa_aborts_num;
1168 edev->stats.non_coalesced_pkts = stats.tpa_not_coalesced_pkts;
1169 edev->stats.coalesced_bytes = stats.tpa_coalesced_bytes;
1170
1171 edev->stats.rx_64_byte_packets = stats.rx_64_byte_packets;
1172 edev->stats.rx_127_byte_packets = stats.rx_127_byte_packets;
1173 edev->stats.rx_255_byte_packets = stats.rx_255_byte_packets;
1174 edev->stats.rx_511_byte_packets = stats.rx_511_byte_packets;
1175 edev->stats.rx_1023_byte_packets = stats.rx_1023_byte_packets;
1176 edev->stats.rx_1518_byte_packets = stats.rx_1518_byte_packets;
1177 edev->stats.rx_1522_byte_packets = stats.rx_1522_byte_packets;
1178 edev->stats.rx_2047_byte_packets = stats.rx_2047_byte_packets;
1179 edev->stats.rx_4095_byte_packets = stats.rx_4095_byte_packets;
1180 edev->stats.rx_9216_byte_packets = stats.rx_9216_byte_packets;
1181 edev->stats.rx_16383_byte_packets = stats.rx_16383_byte_packets;
1182 edev->stats.rx_crc_errors = stats.rx_crc_errors;
1183 edev->stats.rx_mac_crtl_frames = stats.rx_mac_crtl_frames;
1184 edev->stats.rx_pause_frames = stats.rx_pause_frames;
1185 edev->stats.rx_pfc_frames = stats.rx_pfc_frames;
1186 edev->stats.rx_align_errors = stats.rx_align_errors;
1187 edev->stats.rx_carrier_errors = stats.rx_carrier_errors;
1188 edev->stats.rx_oversize_packets = stats.rx_oversize_packets;
1189 edev->stats.rx_jabbers = stats.rx_jabbers;
1190 edev->stats.rx_undersize_packets = stats.rx_undersize_packets;
1191 edev->stats.rx_fragments = stats.rx_fragments;
1192 edev->stats.tx_64_byte_packets = stats.tx_64_byte_packets;
1193 edev->stats.tx_65_to_127_byte_packets = stats.tx_65_to_127_byte_packets;
1194 edev->stats.tx_128_to_255_byte_packets =
1195 stats.tx_128_to_255_byte_packets;
1196 edev->stats.tx_256_to_511_byte_packets =
1197 stats.tx_256_to_511_byte_packets;
1198 edev->stats.tx_512_to_1023_byte_packets =
1199 stats.tx_512_to_1023_byte_packets;
1200 edev->stats.tx_1024_to_1518_byte_packets =
1201 stats.tx_1024_to_1518_byte_packets;
1202 edev->stats.tx_1519_to_2047_byte_packets =
1203 stats.tx_1519_to_2047_byte_packets;
1204 edev->stats.tx_2048_to_4095_byte_packets =
1205 stats.tx_2048_to_4095_byte_packets;
1206 edev->stats.tx_4096_to_9216_byte_packets =
1207 stats.tx_4096_to_9216_byte_packets;
1208 edev->stats.tx_9217_to_16383_byte_packets =
1209 stats.tx_9217_to_16383_byte_packets;
1210 edev->stats.tx_pause_frames = stats.tx_pause_frames;
1211 edev->stats.tx_pfc_frames = stats.tx_pfc_frames;
1212 edev->stats.tx_lpi_entry_count = stats.tx_lpi_entry_count;
1213 edev->stats.tx_total_collisions = stats.tx_total_collisions;
1214 edev->stats.brb_truncates = stats.brb_truncates;
1215 edev->stats.brb_discards = stats.brb_discards;
1216 edev->stats.tx_mac_ctrl_frames = stats.tx_mac_ctrl_frames;
1217}
1218
1219static struct rtnl_link_stats64 *qede_get_stats64(
1220 struct net_device *dev,
1221 struct rtnl_link_stats64 *stats)
1222{
1223 struct qede_dev *edev = netdev_priv(dev);
1224
1225 qede_fill_by_demand_stats(edev);
1226
1227 stats->rx_packets = edev->stats.rx_ucast_pkts +
1228 edev->stats.rx_mcast_pkts +
1229 edev->stats.rx_bcast_pkts;
1230 stats->tx_packets = edev->stats.tx_ucast_pkts +
1231 edev->stats.tx_mcast_pkts +
1232 edev->stats.tx_bcast_pkts;
1233
1234 stats->rx_bytes = edev->stats.rx_ucast_bytes +
1235 edev->stats.rx_mcast_bytes +
1236 edev->stats.rx_bcast_bytes;
1237
1238 stats->tx_bytes = edev->stats.tx_ucast_bytes +
1239 edev->stats.tx_mcast_bytes +
1240 edev->stats.tx_bcast_bytes;
1241
1242 stats->tx_errors = edev->stats.tx_err_drop_pkts;
1243 stats->multicast = edev->stats.rx_mcast_pkts +
1244 edev->stats.rx_bcast_pkts;
1245
1246 stats->rx_fifo_errors = edev->stats.no_buff_discards;
1247
1248 stats->collisions = edev->stats.tx_total_collisions;
1249 stats->rx_crc_errors = edev->stats.rx_crc_errors;
1250 stats->rx_frame_errors = edev->stats.rx_align_errors;
1251
1252 return stats;
1253}
1254
2950219d
YM		 1255static const struct net_device_ops qede_netdev_ops = {
1256 .ndo_open = qede_open,
1257 .ndo_stop = qede_close,
1258 .ndo_start_xmit = qede_start_xmit,
0d8e0aa0
SK		 1259 .ndo_set_rx_mode = qede_set_rx_mode,
1260 .ndo_set_mac_address = qede_set_mac_addr,
2950219d 1261 .ndo_validate_addr = eth_validate_addr,
133fac0e
SK		 1262 .ndo_change_mtu = qede_change_mtu,
1263 .ndo_get_stats64 = qede_get_stats64,
2950219d
YM		 1264};
1265
e712d52b
YM		 1266/* -------------------------------------------------------------------------
1267 * START OF PROBE / REMOVE
1268 * -------------------------------------------------------------------------
1269 */
1270
1271static struct qede_dev *qede_alloc_etherdev(struct qed_dev *cdev,
1272 struct pci_dev *pdev,
1273 struct qed_dev_eth_info *info,
1274 u32 dp_module,
1275 u8 dp_level)
1276{
1277 struct net_device *ndev;
1278 struct qede_dev *edev;
1279
1280 ndev = alloc_etherdev_mqs(sizeof(*edev),
1281 info->num_queues,
1282 info->num_queues);
1283 if (!ndev) {
1284 pr_err("etherdev allocation failed\n");
1285 return NULL;
1286 }
1287
1288 edev = netdev_priv(ndev);
1289 edev->ndev = ndev;
1290 edev->cdev = cdev;
1291 edev->pdev = pdev;
1292 edev->dp_module = dp_module;
1293 edev->dp_level = dp_level;
1294 edev->ops = qed_ops;
2950219d
YM		 1295 edev->q_num_rx_buffers = NUM_RX_BDS_DEF;
1296 edev->q_num_tx_buffers = NUM_TX_BDS_DEF;
e712d52b
YM		 1297
1298 DP_INFO(edev, "Allocated netdev with 64 tx queues and 64 rx queues\n");
1299
1300 SET_NETDEV_DEV(ndev, &pdev->dev);
1301
133fac0e 1302 memset(&edev->stats, 0, sizeof(edev->stats));
e712d52b
YM		 1303 memcpy(&edev->dev_info, info, sizeof(*info));
1304
1305 edev->num_tc = edev->dev_info.num_tc;
1306
1307 return edev;
1308}
1309
1310static void qede_init_ndev(struct qede_dev *edev)
1311{
1312 struct net_device *ndev = edev->ndev;
1313 struct pci_dev *pdev = edev->pdev;
1314 u32 hw_features;
1315
1316 pci_set_drvdata(pdev, ndev);
1317
1318 ndev->mem_start = edev->dev_info.common.pci_mem_start;
1319 ndev->base_addr = ndev->mem_start;
1320 ndev->mem_end = edev->dev_info.common.pci_mem_end;
1321 ndev->irq = edev->dev_info.common.pci_irq;
1322
1323 ndev->watchdog_timeo = TX_TIMEOUT;
1324
2950219d
YM		 1325 ndev->netdev_ops = &qede_netdev_ops;
1326
133fac0e
SK		 1327 qede_set_ethtool_ops(ndev);
1328
e712d52b
YM		 1329 /* user-changeble features */
1330 hw_features = NETIF_F_GRO | NETIF_F_SG |
1331 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1332 NETIF_F_TSO | NETIF_F_TSO6;
1333
1334 ndev->vlan_features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
1335 NETIF_F_HIGHDMA;
1336 ndev->features = hw_features | NETIF_F_RXHASH | NETIF_F_RXCSUM |
1337 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HIGHDMA |
1338 NETIF_F_HW_VLAN_CTAG_TX;
1339
1340 ndev->hw_features = hw_features;
1341
1342 /* Set network device HW mac */
1343 ether_addr_copy(edev->ndev->dev_addr, edev->dev_info.common.hw_mac);
1344}
1345
1346/* This function converts from 32b param to two params of level and module
1347 * Input 32b decoding:
1348 * b31 - enable all NOTICE prints. NOTICE prints are for deviation from the
1349 * 'happy' flow, e.g. memory allocation failed.
1350 * b30 - enable all INFO prints. INFO prints are for major steps in the flow
1351 * and provide important parameters.
1352 * b29-b0 - per-module bitmap, where each bit enables VERBOSE prints of that
1353 * module. VERBOSE prints are for tracking the specific flow in low level.
1354 *
1355 * Notice that the level should be that of the lowest required logs.
1356 */
133fac0e 1357void qede_config_debug(uint debug, u32 *p_dp_module, u8 *p_dp_level)
e712d52b
YM		 1358{
1359 *p_dp_level = QED_LEVEL_NOTICE;
1360 *p_dp_module = 0;
1361
1362 if (debug & QED_LOG_VERBOSE_MASK) {
1363 *p_dp_level = QED_LEVEL_VERBOSE;
1364 *p_dp_module = (debug & 0x3FFFFFFF);
1365 } else if (debug & QED_LOG_INFO_MASK) {
1366 *p_dp_level = QED_LEVEL_INFO;
1367 } else if (debug & QED_LOG_NOTICE_MASK) {
1368 *p_dp_level = QED_LEVEL_NOTICE;
1369 }
1370}
1371
2950219d
YM		 1372static void qede_free_fp_array(struct qede_dev *edev)
1373{
1374 if (edev->fp_array) {
1375 struct qede_fastpath *fp;
1376 int i;
1377
1378 for_each_rss(i) {
1379 fp = &edev->fp_array[i];
1380
1381 kfree(fp->sb_info);
1382 kfree(fp->rxq);
1383 kfree(fp->txqs);
1384 }
1385 kfree(edev->fp_array);
1386 }
1387 edev->num_rss = 0;
1388}
1389
1390static int qede_alloc_fp_array(struct qede_dev *edev)
1391{
1392 struct qede_fastpath *fp;
1393 int i;
1394
1395 edev->fp_array = kcalloc(QEDE_RSS_CNT(edev),
1396 sizeof(*edev->fp_array), GFP_KERNEL);
1397 if (!edev->fp_array) {
1398 DP_NOTICE(edev, "fp array allocation failed\n");
1399 goto err;
1400 }
1401
1402 for_each_rss(i) {
1403 fp = &edev->fp_array[i];
1404
1405 fp->sb_info = kcalloc(1, sizeof(*fp->sb_info), GFP_KERNEL);
1406 if (!fp->sb_info) {
1407 DP_NOTICE(edev, "sb info struct allocation failed\n");
1408 goto err;
1409 }
1410
1411 fp->rxq = kcalloc(1, sizeof(*fp->rxq), GFP_KERNEL);
1412 if (!fp->rxq) {
1413 DP_NOTICE(edev, "RXQ struct allocation failed\n");
1414 goto err;
1415 }
1416
1417 fp->txqs = kcalloc(edev->num_tc, sizeof(*fp->txqs), GFP_KERNEL);
1418 if (!fp->txqs) {
1419 DP_NOTICE(edev, "TXQ array allocation failed\n");
1420 goto err;
1421 }
1422 }
1423
1424 return 0;
1425err:
1426 qede_free_fp_array(edev);
1427 return -ENOMEM;
1428}
1429
0d8e0aa0
SK		 1430static void qede_sp_task(struct work_struct *work)
1431{
1432 struct qede_dev *edev = container_of(work, struct qede_dev,
1433 sp_task.work);
1434 mutex_lock(&edev->qede_lock);
1435
1436 if (edev->state == QEDE_STATE_OPEN) {
1437 if (test_and_clear_bit(QEDE_SP_RX_MODE, &edev->sp_flags))
1438 qede_config_rx_mode(edev->ndev);
1439 }
1440
1441 mutex_unlock(&edev->qede_lock);
1442}
1443
e712d52b
YM		 1444static void qede_update_pf_params(struct qed_dev *cdev)
1445{
1446 struct qed_pf_params pf_params;
1447
1448 /* 16 rx + 16 tx */
1449 memset(&pf_params, 0, sizeof(struct qed_pf_params));
1450 pf_params.eth_pf_params.num_cons = 32;
1451 qed_ops->common->update_pf_params(cdev, &pf_params);
1452}
1453
1454enum qede_probe_mode {
1455 QEDE_PROBE_NORMAL,
1456};
1457
1458static int __qede_probe(struct pci_dev *pdev, u32 dp_module, u8 dp_level,
1459 enum qede_probe_mode mode)
1460{
1461 struct qed_slowpath_params params;
1462 struct qed_dev_eth_info dev_info;
1463 struct qede_dev *edev;
1464 struct qed_dev *cdev;
1465 int rc;
1466
1467 if (unlikely(dp_level & QED_LEVEL_INFO))
1468 pr_notice("Starting qede probe\n");
1469
1470 cdev = qed_ops->common->probe(pdev, QED_PROTOCOL_ETH,
1471 dp_module, dp_level);
1472 if (!cdev) {
1473 rc = -ENODEV;
1474 goto err0;
1475 }
1476
1477 qede_update_pf_params(cdev);
1478
1479 /* Start the Slowpath-process */
1480 memset(&params, 0, sizeof(struct qed_slowpath_params));
1481 params.int_mode = QED_INT_MODE_MSIX;
1482 params.drv_major = QEDE_MAJOR_VERSION;
1483 params.drv_minor = QEDE_MINOR_VERSION;
1484 params.drv_rev = QEDE_REVISION_VERSION;
1485 params.drv_eng = QEDE_ENGINEERING_VERSION;
1486 strlcpy(params.name, "qede LAN", QED_DRV_VER_STR_SIZE);
1487 rc = qed_ops->common->slowpath_start(cdev, &params);
1488 if (rc) {
1489 pr_notice("Cannot start slowpath\n");
1490 goto err1;
1491 }
1492
1493 /* Learn information crucial for qede to progress */
1494 rc = qed_ops->fill_dev_info(cdev, &dev_info);
1495 if (rc)
1496 goto err2;
1497
1498 edev = qede_alloc_etherdev(cdev, pdev, &dev_info, dp_module,
1499 dp_level);
1500 if (!edev) {
1501 rc = -ENOMEM;
1502 goto err2;
1503 }
1504
1505 qede_init_ndev(edev);
1506
2950219d
YM		 1507 rc = register_netdev(edev->ndev);
1508 if (rc) {
1509 DP_NOTICE(edev, "Cannot register net-device\n");
1510 goto err3;
1511 }
1512
e712d52b
YM		 1513 edev->ops->common->set_id(cdev, edev->ndev->name, DRV_MODULE_VERSION);
1514
a2ec6172
SK		 1515 edev->ops->register_ops(cdev, &qede_ll_ops, edev);
1516
0d8e0aa0
SK		 1517 INIT_DELAYED_WORK(&edev->sp_task, qede_sp_task);
1518 mutex_init(&edev->qede_lock);
1519
e712d52b
YM		 1520 DP_INFO(edev, "Ending successfully qede probe\n");
1521
1522 return 0;
1523
2950219d
YM		 1524err3:
1525 free_netdev(edev->ndev);
e712d52b
YM		 1526err2:
1527 qed_ops->common->slowpath_stop(cdev);
1528err1:
1529 qed_ops->common->remove(cdev);
1530err0:
1531 return rc;
1532}
1533
1534static int qede_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1535{
1536 u32 dp_module = 0;
1537 u8 dp_level = 0;
1538
1539 qede_config_debug(debug, &dp_module, &dp_level);
1540
1541 return __qede_probe(pdev, dp_module, dp_level,
1542 QEDE_PROBE_NORMAL);
1543}
1544
1545enum qede_remove_mode {
1546 QEDE_REMOVE_NORMAL,
1547};
1548
1549static void __qede_remove(struct pci_dev *pdev, enum qede_remove_mode mode)
1550{
1551 struct net_device *ndev = pci_get_drvdata(pdev);
1552 struct qede_dev *edev = netdev_priv(ndev);
1553 struct qed_dev *cdev = edev->cdev;
1554
1555 DP_INFO(edev, "Starting qede_remove\n");
1556
0d8e0aa0 1557 cancel_delayed_work_sync(&edev->sp_task);
2950219d
YM		 1558 unregister_netdev(ndev);
1559
e712d52b
YM		 1560 edev->ops->common->set_power_state(cdev, PCI_D0);
1561
1562 pci_set_drvdata(pdev, NULL);
1563
1564 free_netdev(ndev);
1565
1566 /* Use global ops since we've freed edev */
1567 qed_ops->common->slowpath_stop(cdev);
1568 qed_ops->common->remove(cdev);
1569
1570 pr_notice("Ending successfully qede_remove\n");
1571}
1572
1573static void qede_remove(struct pci_dev *pdev)
1574{
1575 __qede_remove(pdev, QEDE_REMOVE_NORMAL);
1576}
2950219d
YM		 1577
1578/* -------------------------------------------------------------------------
1579 * START OF LOAD / UNLOAD
1580 * -------------------------------------------------------------------------
1581 */
1582
1583static int qede_set_num_queues(struct qede_dev *edev)
1584{
1585 int rc;
1586 u16 rss_num;
1587
1588 /* Setup queues according to possible resources*/
8edf049d
SK		 1589 if (edev->req_rss)
1590 rss_num = edev->req_rss;
1591 else
1592 rss_num = netif_get_num_default_rss_queues() *
1593 edev->dev_info.common.num_hwfns;
2950219d
YM		 1594
1595 rss_num = min_t(u16, QEDE_MAX_RSS_CNT(edev), rss_num);
1596
1597 rc = edev->ops->common->set_fp_int(edev->cdev, rss_num);
1598 if (rc > 0) {
1599 /* Managed to request interrupts for our queues */
1600 edev->num_rss = rc;
1601 DP_INFO(edev, "Managed %d [of %d] RSS queues\n",
1602 QEDE_RSS_CNT(edev), rss_num);
1603 rc = 0;
1604 }
1605 return rc;
1606}
1607
1608static void qede_free_mem_sb(struct qede_dev *edev,
1609 struct qed_sb_info *sb_info)
1610{
1611 if (sb_info->sb_virt)
1612 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_info->sb_virt),
1613 (void *)sb_info->sb_virt, sb_info->sb_phys);
1614}
1615
1616/* This function allocates fast-path status block memory */
1617static int qede_alloc_mem_sb(struct qede_dev *edev,
1618 struct qed_sb_info *sb_info,
1619 u16 sb_id)
1620{
1621 struct status_block *sb_virt;
1622 dma_addr_t sb_phys;
1623 int rc;
1624
1625 sb_virt = dma_alloc_coherent(&edev->pdev->dev,
1626 sizeof(*sb_virt),
1627 &sb_phys, GFP_KERNEL);
1628 if (!sb_virt) {
1629 DP_ERR(edev, "Status block allocation failed\n");
1630 return -ENOMEM;
1631 }
1632
1633 rc = edev->ops->common->sb_init(edev->cdev, sb_info,
1634 sb_virt, sb_phys, sb_id,
1635 QED_SB_TYPE_L2_QUEUE);
1636 if (rc) {
1637 DP_ERR(edev, "Status block initialization failed\n");
1638 dma_free_coherent(&edev->pdev->dev, sizeof(*sb_virt),
1639 sb_virt, sb_phys);
1640 return rc;
1641 }
1642
1643 return 0;
1644}
1645
1646static void qede_free_rx_buffers(struct qede_dev *edev,
1647 struct qede_rx_queue *rxq)
1648{
1649 u16 i;
1650
1651 for (i = rxq->sw_rx_cons; i != rxq->sw_rx_prod; i++) {
1652 struct sw_rx_data *rx_buf;
fc48b7a6 1653 struct page *data;
2950219d
YM		 1654
1655 rx_buf = &rxq->sw_rx_ring[i & NUM_RX_BDS_MAX];
1656 data = rx_buf->data;
1657
fc48b7a6
YM		 1658 dma_unmap_page(&edev->pdev->dev,
1659 rx_buf->mapping,
1660 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d
YM		 1661
1662 rx_buf->data = NULL;
fc48b7a6 1663 __free_page(data);
2950219d
YM		 1664 }
1665}
1666
1667static void qede_free_mem_rxq(struct qede_dev *edev,
1668 struct qede_rx_queue *rxq)
1669{
1670 /* Free rx buffers */
1671 qede_free_rx_buffers(edev, rxq);
1672
1673 /* Free the parallel SW ring */
1674 kfree(rxq->sw_rx_ring);
1675
1676 /* Free the real RQ ring used by FW */
1677 edev->ops->common->chain_free(edev->cdev, &rxq->rx_bd_ring);
1678 edev->ops->common->chain_free(edev->cdev, &rxq->rx_comp_ring);
1679}
1680
1681static int qede_alloc_rx_buffer(struct qede_dev *edev,
1682 struct qede_rx_queue *rxq)
1683{
1684 struct sw_rx_data *sw_rx_data;
1685 struct eth_rx_bd *rx_bd;
1686 dma_addr_t mapping;
fc48b7a6 1687 struct page *data;
2950219d 1688 u16 rx_buf_size;
2950219d
YM		 1689
1690 rx_buf_size = rxq->rx_buf_size;
1691
fc48b7a6 1692 data = alloc_pages(GFP_ATOMIC, 0);
2950219d 1693 if (unlikely(!data)) {
fc48b7a6 1694 DP_NOTICE(edev, "Failed to allocate Rx data [page]\n");
2950219d
YM		 1695 return -ENOMEM;
1696 }
1697
fc48b7a6
YM		 1698 /* Map the entire page as it would be used
1699 * for multiple RX buffer segment size mapping.
1700 */
1701 mapping = dma_map_page(&edev->pdev->dev, data, 0,
1702 PAGE_SIZE, DMA_FROM_DEVICE);
2950219d 1703 if (unlikely(dma_mapping_error(&edev->pdev->dev, mapping))) {
fc48b7a6 1704 __free_page(data);
2950219d
YM		 1705 DP_NOTICE(edev, "Failed to map Rx buffer\n");
1706 return -ENOMEM;
1707 }
1708
1709 sw_rx_data = &rxq->sw_rx_ring[rxq->sw_rx_prod & NUM_RX_BDS_MAX];
fc48b7a6 1710 sw_rx_data->page_offset = 0;
2950219d 1711 sw_rx_data->data = data;
fc48b7a6 1712 sw_rx_data->mapping = mapping;
2950219d
YM		 1713
1714 /* Advance PROD and get BD pointer */
1715 rx_bd = (struct eth_rx_bd *)qed_chain_produce(&rxq->rx_bd_ring);
1716 WARN_ON(!rx_bd);
1717 rx_bd->addr.hi = cpu_to_le32(upper_32_bits(mapping));
1718 rx_bd->addr.lo = cpu_to_le32(lower_32_bits(mapping));
1719
1720 rxq->sw_rx_prod++;
1721
1722 return 0;
1723}
1724
1725/* This function allocates all memory needed per Rx queue */
1726static int qede_alloc_mem_rxq(struct qede_dev *edev,
1727 struct qede_rx_queue *rxq)
1728{
1729 int i, rc, size, num_allocated;
1730
1731 rxq->num_rx_buffers = edev->q_num_rx_buffers;
1732
fc48b7a6
YM		 1733 rxq->rx_buf_size = NET_IP_ALIGN + ETH_OVERHEAD +
1734 edev->ndev->mtu;
1735 if (rxq->rx_buf_size > PAGE_SIZE)
1736 rxq->rx_buf_size = PAGE_SIZE;
1737
1738 /* Segment size to spilt a page in multiple equal parts */
1739 rxq->rx_buf_seg_size = roundup_pow_of_two(rxq->rx_buf_size);
2950219d
YM		 1740
1741 /* Allocate the parallel driver ring for Rx buffers */
fc48b7a6 1742 size = sizeof(*rxq->sw_rx_ring) * RX_RING_SIZE;
2950219d
YM		 1743 rxq->sw_rx_ring = kzalloc(size, GFP_KERNEL);
1744 if (!rxq->sw_rx_ring) {
1745 DP_ERR(edev, "Rx buffers ring allocation failed\n");
1746 goto err;
1747 }
1748
1749 /* Allocate FW Rx ring */
1750 rc = edev->ops->common->chain_alloc(edev->cdev,
1751 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1752 QED_CHAIN_MODE_NEXT_PTR,
fc48b7a6 1753 RX_RING_SIZE,
2950219d
YM		 1754 sizeof(struct eth_rx_bd),
1755 &rxq->rx_bd_ring);
1756
1757 if (rc)
1758 goto err;
1759
1760 /* Allocate FW completion ring */
1761 rc = edev->ops->common->chain_alloc(edev->cdev,
1762 QED_CHAIN_USE_TO_CONSUME,
1763 QED_CHAIN_MODE_PBL,
fc48b7a6 1764 RX_RING_SIZE,
2950219d
YM		 1765 sizeof(union eth_rx_cqe),
1766 &rxq->rx_comp_ring);
1767 if (rc)
1768 goto err;
1769
1770 /* Allocate buffers for the Rx ring */
1771 for (i = 0; i < rxq->num_rx_buffers; i++) {
1772 rc = qede_alloc_rx_buffer(edev, rxq);
1773 if (rc)
1774 break;
1775 }
1776 num_allocated = i;
1777 if (!num_allocated) {
1778 DP_ERR(edev, "Rx buffers allocation failed\n");
1779 goto err;
1780 } else if (num_allocated < rxq->num_rx_buffers) {
1781 DP_NOTICE(edev,
1782 "Allocated less buffers than desired (%d allocated)\n",
1783 num_allocated);
1784 }
1785
1786 return 0;
1787
1788err:
1789 qede_free_mem_rxq(edev, rxq);
1790 return -ENOMEM;
1791}
1792
1793static void qede_free_mem_txq(struct qede_dev *edev,
1794 struct qede_tx_queue *txq)
1795{
1796 /* Free the parallel SW ring */
1797 kfree(txq->sw_tx_ring);
1798
1799 /* Free the real RQ ring used by FW */
1800 edev->ops->common->chain_free(edev->cdev, &txq->tx_pbl);
1801}
1802
1803/* This function allocates all memory needed per Tx queue */
1804static int qede_alloc_mem_txq(struct qede_dev *edev,
1805 struct qede_tx_queue *txq)
1806{
1807 int size, rc;
1808 union eth_tx_bd_types *p_virt;
1809
1810 txq->num_tx_buffers = edev->q_num_tx_buffers;
1811
1812 /* Allocate the parallel driver ring for Tx buffers */
1813 size = sizeof(*txq->sw_tx_ring) * NUM_TX_BDS_MAX;
1814 txq->sw_tx_ring = kzalloc(size, GFP_KERNEL);
1815 if (!txq->sw_tx_ring) {
1816 DP_NOTICE(edev, "Tx buffers ring allocation failed\n");
1817 goto err;
1818 }
1819
1820 rc = edev->ops->common->chain_alloc(edev->cdev,
1821 QED_CHAIN_USE_TO_CONSUME_PRODUCE,
1822 QED_CHAIN_MODE_PBL,
1823 NUM_TX_BDS_MAX,
1824 sizeof(*p_virt),
1825 &txq->tx_pbl);
1826 if (rc)
1827 goto err;
1828
1829 return 0;
1830
1831err:
1832 qede_free_mem_txq(edev, txq);
1833 return -ENOMEM;
1834}
1835
1836/* This function frees all memory of a single fp */
1837static void qede_free_mem_fp(struct qede_dev *edev,
1838 struct qede_fastpath *fp)
1839{
1840 int tc;
1841
1842 qede_free_mem_sb(edev, fp->sb_info);
1843
1844 qede_free_mem_rxq(edev, fp->rxq);
1845
1846 for (tc = 0; tc < edev->num_tc; tc++)
1847 qede_free_mem_txq(edev, &fp->txqs[tc]);
1848}
1849
1850/* This function allocates all memory needed for a single fp (i.e. an entity
1851 * which contains status block, one rx queue and multiple per-TC tx queues.
1852 */
1853static int qede_alloc_mem_fp(struct qede_dev *edev,
1854 struct qede_fastpath *fp)
1855{
1856 int rc, tc;
1857
1858 rc = qede_alloc_mem_sb(edev, fp->sb_info, fp->rss_id);
1859 if (rc)
1860 goto err;
1861
1862 rc = qede_alloc_mem_rxq(edev, fp->rxq);
1863 if (rc)
1864 goto err;
1865
1866 for (tc = 0; tc < edev->num_tc; tc++) {
1867 rc = qede_alloc_mem_txq(edev, &fp->txqs[tc]);
1868 if (rc)
1869 goto err;
1870 }
1871
1872 return 0;
1873
1874err:
1875 qede_free_mem_fp(edev, fp);
1876 return -ENOMEM;
1877}
1878
1879static void qede_free_mem_load(struct qede_dev *edev)
1880{
1881 int i;
1882
1883 for_each_rss(i) {
1884 struct qede_fastpath *fp = &edev->fp_array[i];
1885
1886 qede_free_mem_fp(edev, fp);
1887 }
1888}
1889
1890/* This function allocates all qede memory at NIC load. */
1891static int qede_alloc_mem_load(struct qede_dev *edev)
1892{
1893 int rc = 0, rss_id;
1894
1895 for (rss_id = 0; rss_id < QEDE_RSS_CNT(edev); rss_id++) {
1896 struct qede_fastpath *fp = &edev->fp_array[rss_id];
1897
1898 rc = qede_alloc_mem_fp(edev, fp);
1899 if (rc)
1900 break;
1901 }
1902
1903 if (rss_id != QEDE_RSS_CNT(edev)) {
1904 /* Failed allocating memory for all the queues */
1905 if (!rss_id) {
1906 DP_ERR(edev,
1907 "Failed to allocate memory for the leading queue\n");
1908 rc = -ENOMEM;
1909 } else {
1910 DP_NOTICE(edev,
1911 "Failed to allocate memory for all of RSS queues\n Desired: %d queues, allocated: %d queues\n",
1912 QEDE_RSS_CNT(edev), rss_id);
1913 }
1914 edev->num_rss = rss_id;
1915 }
1916
1917 return 0;
1918}
1919
1920/* This function inits fp content and resets the SB, RXQ and TXQ structures */
1921static void qede_init_fp(struct qede_dev *edev)
1922{
1923 int rss_id, txq_index, tc;
1924 struct qede_fastpath *fp;
1925
1926 for_each_rss(rss_id) {
1927 fp = &edev->fp_array[rss_id];
1928
1929 fp->edev = edev;
1930 fp->rss_id = rss_id;
1931
1932 memset((void *)&fp->napi, 0, sizeof(fp->napi));
1933
1934 memset((void *)fp->sb_info, 0, sizeof(*fp->sb_info));
1935
1936 memset((void *)fp->rxq, 0, sizeof(*fp->rxq));
1937 fp->rxq->rxq_id = rss_id;
1938
1939 memset((void *)fp->txqs, 0, (edev->num_tc * sizeof(*fp->txqs)));
1940 for (tc = 0; tc < edev->num_tc; tc++) {
1941 txq_index = tc * QEDE_RSS_CNT(edev) + rss_id;
1942 fp->txqs[tc].index = txq_index;
1943 }
1944
1945 snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
1946 edev->ndev->name, rss_id);
1947 }
1948}
1949
1950static int qede_set_real_num_queues(struct qede_dev *edev)
1951{
1952 int rc = 0;
1953
1954 rc = netif_set_real_num_tx_queues(edev->ndev, QEDE_TSS_CNT(edev));
1955 if (rc) {
1956 DP_NOTICE(edev, "Failed to set real number of Tx queues\n");
1957 return rc;
1958 }
1959 rc = netif_set_real_num_rx_queues(edev->ndev, QEDE_RSS_CNT(edev));
1960 if (rc) {
1961 DP_NOTICE(edev, "Failed to set real number of Rx queues\n");
1962 return rc;
1963 }
1964
1965 return 0;
1966}
1967
1968static void qede_napi_disable_remove(struct qede_dev *edev)
1969{
1970 int i;
1971
1972 for_each_rss(i) {
1973 napi_disable(&edev->fp_array[i].napi);
1974
1975 netif_napi_del(&edev->fp_array[i].napi);
1976 }
1977}
1978
1979static void qede_napi_add_enable(struct qede_dev *edev)
1980{
1981 int i;
1982
1983 /* Add NAPI objects */
1984 for_each_rss(i) {
1985 netif_napi_add(edev->ndev, &edev->fp_array[i].napi,
1986 qede_poll, NAPI_POLL_WEIGHT);
1987 napi_enable(&edev->fp_array[i].napi);
1988 }
1989}
1990
1991static void qede_sync_free_irqs(struct qede_dev *edev)
1992{
1993 int i;
1994
1995 for (i = 0; i < edev->int_info.used_cnt; i++) {
1996 if (edev->int_info.msix_cnt) {
1997 synchronize_irq(edev->int_info.msix[i].vector);
1998 free_irq(edev->int_info.msix[i].vector,
1999 &edev->fp_array[i]);
2000 } else {
2001 edev->ops->common->simd_handler_clean(edev->cdev, i);
2002 }
2003 }
2004
2005 edev->int_info.used_cnt = 0;
2006}
2007
2008static int qede_req_msix_irqs(struct qede_dev *edev)
2009{
2010 int i, rc;
2011
2012 /* Sanitize number of interrupts == number of prepared RSS queues */
2013 if (QEDE_RSS_CNT(edev) > edev->int_info.msix_cnt) {
2014 DP_ERR(edev,
2015 "Interrupt mismatch: %d RSS queues > %d MSI-x vectors\n",
2016 QEDE_RSS_CNT(edev), edev->int_info.msix_cnt);
2017 return -EINVAL;
2018 }
2019
2020 for (i = 0; i < QEDE_RSS_CNT(edev); i++) {
2021 rc = request_irq(edev->int_info.msix[i].vector,
2022 qede_msix_fp_int, 0, edev->fp_array[i].name,
2023 &edev->fp_array[i]);
2024 if (rc) {
2025 DP_ERR(edev, "Request fp %d irq failed\n", i);
2026 qede_sync_free_irqs(edev);
2027 return rc;
2028 }
2029 DP_VERBOSE(edev, NETIF_MSG_INTR,
2030 "Requested fp irq for %s [entry %d]. Cookie is at %p\n",
2031 edev->fp_array[i].name, i,
2032 &edev->fp_array[i]);
2033 edev->int_info.used_cnt++;
2034 }
2035
2036 return 0;
2037}
2038
2039static void qede_simd_fp_handler(void *cookie)
2040{
2041 struct qede_fastpath *fp = (struct qede_fastpath *)cookie;
2042
2043 napi_schedule_irqoff(&fp->napi);
2044}
2045
2046static int qede_setup_irqs(struct qede_dev *edev)
2047{
2048 int i, rc = 0;
2049
2050 /* Learn Interrupt configuration */
2051 rc = edev->ops->common->get_fp_int(edev->cdev, &edev->int_info);
2052 if (rc)
2053 return rc;
2054
2055 if (edev->int_info.msix_cnt) {
2056 rc = qede_req_msix_irqs(edev);
2057 if (rc)
2058 return rc;
2059 edev->ndev->irq = edev->int_info.msix[0].vector;
2060 } else {
2061 const struct qed_common_ops *ops;
2062
2063 /* qed should learn receive the RSS ids and callbacks */
2064 ops = edev->ops->common;
2065 for (i = 0; i < QEDE_RSS_CNT(edev); i++)
2066 ops->simd_handler_config(edev->cdev,
2067 &edev->fp_array[i], i,
2068 qede_simd_fp_handler);
2069 edev->int_info.used_cnt = QEDE_RSS_CNT(edev);
2070 }
2071 return 0;
2072}
2073
2074static int qede_drain_txq(struct qede_dev *edev,
2075 struct qede_tx_queue *txq,
2076 bool allow_drain)
2077{
2078 int rc, cnt = 1000;
2079
2080 while (txq->sw_tx_cons != txq->sw_tx_prod) {
2081 if (!cnt) {
2082 if (allow_drain) {
2083 DP_NOTICE(edev,
2084 "Tx queue[%d] is stuck, requesting MCP to drain\n",
2085 txq->index);
2086 rc = edev->ops->common->drain(edev->cdev);
2087 if (rc)
2088 return rc;
2089 return qede_drain_txq(edev, txq, false);
2090 }
2091 DP_NOTICE(edev,
2092 "Timeout waiting for tx queue[%d]: PROD=%d, CONS=%d\n",
2093 txq->index, txq->sw_tx_prod,
2094 txq->sw_tx_cons);
2095 return -ENODEV;
2096 }
2097 cnt--;
2098 usleep_range(1000, 2000);
2099 barrier();
2100 }
2101
2102 /* FW finished processing, wait for HW to transmit all tx packets */
2103 usleep_range(1000, 2000);
2104
2105 return 0;
2106}
2107
2108static int qede_stop_queues(struct qede_dev *edev)
2109{
2110 struct qed_update_vport_params vport_update_params;
2111 struct qed_dev *cdev = edev->cdev;
2112 int rc, tc, i;
2113
2114 /* Disable the vport */
2115 memset(&vport_update_params, 0, sizeof(vport_update_params));
2116 vport_update_params.vport_id = 0;
2117 vport_update_params.update_vport_active_flg = 1;
2118 vport_update_params.vport_active_flg = 0;
2119 vport_update_params.update_rss_flg = 0;
2120
2121 rc = edev->ops->vport_update(cdev, &vport_update_params);
2122 if (rc) {
2123 DP_ERR(edev, "Failed to update vport\n");
2124 return rc;
2125 }
2126
2127 /* Flush Tx queues. If needed, request drain from MCP */
2128 for_each_rss(i) {
2129 struct qede_fastpath *fp = &edev->fp_array[i];
2130
2131 for (tc = 0; tc < edev->num_tc; tc++) {
2132 struct qede_tx_queue *txq = &fp->txqs[tc];
2133
2134 rc = qede_drain_txq(edev, txq, true);
2135 if (rc)
2136 return rc;
2137 }
2138 }
2139
2140 /* Stop all Queues in reverse order*/
2141 for (i = QEDE_RSS_CNT(edev) - 1; i >= 0; i--) {
2142 struct qed_stop_rxq_params rx_params;
2143
2144 /* Stop the Tx Queue(s)*/
2145 for (tc = 0; tc < edev->num_tc; tc++) {
2146 struct qed_stop_txq_params tx_params;
2147
2148 tx_params.rss_id = i;
2149 tx_params.tx_queue_id = tc * QEDE_RSS_CNT(edev) + i;
2150 rc = edev->ops->q_tx_stop(cdev, &tx_params);
2151 if (rc) {
2152 DP_ERR(edev, "Failed to stop TXQ #%d\n",
2153 tx_params.tx_queue_id);
2154 return rc;
2155 }
2156 }
2157
2158 /* Stop the Rx Queue*/
2159 memset(&rx_params, 0, sizeof(rx_params));
2160 rx_params.rss_id = i;
2161 rx_params.rx_queue_id = i;
2162
2163 rc = edev->ops->q_rx_stop(cdev, &rx_params);
2164 if (rc) {
2165 DP_ERR(edev, "Failed to stop RXQ #%d\n", i);
2166 return rc;
2167 }
2168 }
2169
2170 /* Stop the vport */
2171 rc = edev->ops->vport_stop(cdev, 0);
2172 if (rc)
2173 DP_ERR(edev, "Failed to stop VPORT\n");
2174
2175 return rc;
2176}
2177
2178static int qede_start_queues(struct qede_dev *edev)
2179{
2180 int rc, tc, i;
2181 int vport_id = 0, drop_ttl0_flg = 1, vlan_removal_en = 1;
2182 struct qed_dev *cdev = edev->cdev;
2183 struct qed_update_vport_rss_params *rss_params = &edev->rss_params;
2184 struct qed_update_vport_params vport_update_params;
2185 struct qed_queue_start_common_params q_params;
2186
2187 if (!edev->num_rss) {
2188 DP_ERR(edev,
2189 "Cannot update V-VPORT as active as there are no Rx queues\n");
2190 return -EINVAL;
2191 }
2192
2193 rc = edev->ops->vport_start(cdev, vport_id,
2194 edev->ndev->mtu,
2195 drop_ttl0_flg,
2196 vlan_removal_en);
2197
2198 if (rc) {
2199 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
2200 return rc;
2201 }
2202
2203 DP_VERBOSE(edev, NETIF_MSG_IFUP,
2204 "Start vport ramrod passed, vport_id = %d, MTU = %d, vlan_removal_en = %d\n",
2205 vport_id, edev->ndev->mtu + 0xe, vlan_removal_en);
2206
2207 for_each_rss(i) {
2208 struct qede_fastpath *fp = &edev->fp_array[i];
2209 dma_addr_t phys_table = fp->rxq->rx_comp_ring.pbl.p_phys_table;
2210
2211 memset(&q_params, 0, sizeof(q_params));
2212 q_params.rss_id = i;
2213 q_params.queue_id = i;
2214 q_params.vport_id = 0;
2215 q_params.sb = fp->sb_info->igu_sb_id;
2216 q_params.sb_idx = RX_PI;
2217
2218 rc = edev->ops->q_rx_start(cdev, &q_params,
2219 fp->rxq->rx_buf_size,
2220 fp->rxq->rx_bd_ring.p_phys_addr,
2221 phys_table,
2222 fp->rxq->rx_comp_ring.page_cnt,
2223 &fp->rxq->hw_rxq_prod_addr);
2224 if (rc) {
2225 DP_ERR(edev, "Start RXQ #%d failed %d\n", i, rc);
2226 return rc;
2227 }
2228
2229 fp->rxq->hw_cons_ptr = &fp->sb_info->sb_virt->pi_array[RX_PI];
2230
2231 qede_update_rx_prod(edev, fp->rxq);
2232
2233 for (tc = 0; tc < edev->num_tc; tc++) {
2234 struct qede_tx_queue *txq = &fp->txqs[tc];
2235 int txq_index = tc * QEDE_RSS_CNT(edev) + i;
2236
2237 memset(&q_params, 0, sizeof(q_params));
2238 q_params.rss_id = i;
2239 q_params.queue_id = txq_index;
2240 q_params.vport_id = 0;
2241 q_params.sb = fp->sb_info->igu_sb_id;
2242 q_params.sb_idx = TX_PI(tc);
2243
2244 rc = edev->ops->q_tx_start(cdev, &q_params,
2245 txq->tx_pbl.pbl.p_phys_table,
2246 txq->tx_pbl.page_cnt,
2247 &txq->doorbell_addr);
2248 if (rc) {
2249 DP_ERR(edev, "Start TXQ #%d failed %d\n",
2250 txq_index, rc);
2251 return rc;
2252 }
2253
2254 txq->hw_cons_ptr =
2255 &fp->sb_info->sb_virt->pi_array[TX_PI(tc)];
2256 SET_FIELD(txq->tx_db.data.params,
2257 ETH_DB_DATA_DEST, DB_DEST_XCM);
2258 SET_FIELD(txq->tx_db.data.params, ETH_DB_DATA_AGG_CMD,
2259 DB_AGG_CMD_SET);
2260 SET_FIELD(txq->tx_db.data.params,
2261 ETH_DB_DATA_AGG_VAL_SEL,
2262 DQ_XCM_ETH_TX_BD_PROD_CMD);
2263
2264 txq->tx_db.data.agg_flags = DQ_XCM_ETH_DQ_CF_CMD;
2265 }
2266 }
2267
2268 /* Prepare and send the vport enable */
2269 memset(&vport_update_params, 0, sizeof(vport_update_params));
2270 vport_update_params.vport_id = vport_id;
2271 vport_update_params.update_vport_active_flg = 1;
2272 vport_update_params.vport_active_flg = 1;
2273
2274 /* Fill struct with RSS params */
2275 if (QEDE_RSS_CNT(edev) > 1) {
2276 vport_update_params.update_rss_flg = 1;
2277 for (i = 0; i < 128; i++)
2278 rss_params->rss_ind_table[i] =
2279 ethtool_rxfh_indir_default(i, QEDE_RSS_CNT(edev));
2280 netdev_rss_key_fill(rss_params->rss_key,
2281 sizeof(rss_params->rss_key));
2282 } else {
2283 memset(rss_params, 0, sizeof(*rss_params));
2284 }
2285 memcpy(&vport_update_params.rss_params, rss_params,
2286 sizeof(*rss_params));
2287
2288 rc = edev->ops->vport_update(cdev, &vport_update_params);
2289 if (rc) {
2290 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
2291 return rc;
2292 }
2293
2294 return 0;
2295}
2296
0d8e0aa0
SK		 2297static int qede_set_mcast_rx_mac(struct qede_dev *edev,
2298 enum qed_filter_xcast_params_type opcode,
2299 unsigned char *mac, int num_macs)
2300{
2301 struct qed_filter_params filter_cmd;
2302 int i;
2303
2304 memset(&filter_cmd, 0, sizeof(filter_cmd));
2305 filter_cmd.type = QED_FILTER_TYPE_MCAST;
2306 filter_cmd.filter.mcast.type = opcode;
2307 filter_cmd.filter.mcast.num = num_macs;
2308
2309 for (i = 0; i < num_macs; i++, mac += ETH_ALEN)
2310 ether_addr_copy(filter_cmd.filter.mcast.mac[i], mac);
2311
2312 return edev->ops->filter_config(edev->cdev, &filter_cmd);
2313}
2314
2950219d
YM		 2315enum qede_unload_mode {
2316 QEDE_UNLOAD_NORMAL,
2317};
2318
2319static void qede_unload(struct qede_dev *edev, enum qede_unload_mode mode)
2320{
a2ec6172 2321 struct qed_link_params link_params;
2950219d
YM		 2322 int rc;
2323
2324 DP_INFO(edev, "Starting qede unload\n");
2325
0d8e0aa0
SK		 2326 mutex_lock(&edev->qede_lock);
2327 edev->state = QEDE_STATE_CLOSED;
2328
2950219d
YM		 2329 /* Close OS Tx */
2330 netif_tx_disable(edev->ndev);
2331 netif_carrier_off(edev->ndev);
2332
a2ec6172
SK		 2333 /* Reset the link */
2334 memset(&link_params, 0, sizeof(link_params));
2335 link_params.link_up = false;
2336 edev->ops->common->set_link(edev->cdev, &link_params);
2950219d
YM		 2337 rc = qede_stop_queues(edev);
2338 if (rc) {
2339 qede_sync_free_irqs(edev);
2340 goto out;
2341 }
2342
2343 DP_INFO(edev, "Stopped Queues\n");
2344
2345 edev->ops->fastpath_stop(edev->cdev);
2346
2347 /* Release the interrupts */
2348 qede_sync_free_irqs(edev);
2349 edev->ops->common->set_fp_int(edev->cdev, 0);
2350
2351 qede_napi_disable_remove(edev);
2352
2353 qede_free_mem_load(edev);
2354 qede_free_fp_array(edev);
2355
2356out:
2357 mutex_unlock(&edev->qede_lock);
2358 DP_INFO(edev, "Ending qede unload\n");
2359}
2360
2361enum qede_load_mode {
2362 QEDE_LOAD_NORMAL,
2363};
2364
2365static int qede_load(struct qede_dev *edev, enum qede_load_mode mode)
2366{
a2ec6172
SK		 2367 struct qed_link_params link_params;
2368 struct qed_link_output link_output;
2950219d
YM		 2369 int rc;
2370
2371 DP_INFO(edev, "Starting qede load\n");
2372
2373 rc = qede_set_num_queues(edev);
2374 if (rc)
2375 goto err0;
2376
2377 rc = qede_alloc_fp_array(edev);
2378 if (rc)
2379 goto err0;
2380
2381 qede_init_fp(edev);
2382
2383 rc = qede_alloc_mem_load(edev);
2384 if (rc)
2385 goto err1;
2386 DP_INFO(edev, "Allocated %d RSS queues on %d TC/s\n",
2387 QEDE_RSS_CNT(edev), edev->num_tc);
2388
2389 rc = qede_set_real_num_queues(edev);
2390 if (rc)
2391 goto err2;
2392
2393 qede_napi_add_enable(edev);
2394 DP_INFO(edev, "Napi added and enabled\n");
2395
2396 rc = qede_setup_irqs(edev);
2397 if (rc)
2398 goto err3;
2399 DP_INFO(edev, "Setup IRQs succeeded\n");
2400
2401 rc = qede_start_queues(edev);
2402 if (rc)
2403 goto err4;
2404 DP_INFO(edev, "Start VPORT, RXQ and TXQ succeeded\n");
2405
2406 /* Add primary mac and set Rx filters */
2407 ether_addr_copy(edev->primary_mac, edev->ndev->dev_addr);
2408
0d8e0aa0
SK		 2409 mutex_lock(&edev->qede_lock);
2410 edev->state = QEDE_STATE_OPEN;
2411 mutex_unlock(&edev->qede_lock);
a2ec6172
SK		 2412
2413 /* Ask for link-up using current configuration */
2414 memset(&link_params, 0, sizeof(link_params));
2415 link_params.link_up = true;
2416 edev->ops->common->set_link(edev->cdev, &link_params);
2417
2418 /* Query whether link is already-up */
2419 memset(&link_output, 0, sizeof(link_output));
2420 edev->ops->common->get_link(edev->cdev, &link_output);
2421 qede_link_update(edev, &link_output);
2422
2950219d
YM		 2423 DP_INFO(edev, "Ending successfully qede load\n");
2424
2425 return 0;
2426
2427err4:
2428 qede_sync_free_irqs(edev);
2429 memset(&edev->int_info.msix_cnt, 0, sizeof(struct qed_int_info));
2430err3:
2431 qede_napi_disable_remove(edev);
2432err2:
2433 qede_free_mem_load(edev);
2434err1:
2435 edev->ops->common->set_fp_int(edev->cdev, 0);
2436 qede_free_fp_array(edev);
2437 edev->num_rss = 0;
2438err0:
2439 return rc;
2440}
2441
133fac0e
SK		 2442void qede_reload(struct qede_dev *edev,
2443 void (*func)(struct qede_dev *, union qede_reload_args *),
2444 union qede_reload_args *args)
2445{
2446 qede_unload(edev, QEDE_UNLOAD_NORMAL);
2447 /* Call function handler to update parameters
2448 * needed for function load.
2449 */
2450 if (func)
2451 func(edev, args);
2452
2453 qede_load(edev, QEDE_LOAD_NORMAL);
2454
2455 mutex_lock(&edev->qede_lock);
2456 qede_config_rx_mode(edev->ndev);
2457 mutex_unlock(&edev->qede_lock);
2458}
2459
2950219d
YM		 2460/* called with rtnl_lock */
2461static int qede_open(struct net_device *ndev)
2462{
2463 struct qede_dev *edev = netdev_priv(ndev);
2464
2465 netif_carrier_off(ndev);
2466
2467 edev->ops->common->set_power_state(edev->cdev, PCI_D0);
2468
2469 return qede_load(edev, QEDE_LOAD_NORMAL);
2470}
2471
2472static int qede_close(struct net_device *ndev)
2473{
2474 struct qede_dev *edev = netdev_priv(ndev);
2475
2476 qede_unload(edev, QEDE_UNLOAD_NORMAL);
2477
2478 return 0;
2479}
0d8e0aa0 2480
a2ec6172
SK		 2481static void qede_link_update(void *dev, struct qed_link_output *link)
2482{
2483 struct qede_dev *edev = dev;
2484
2485 if (!netif_running(edev->ndev)) {
2486 DP_VERBOSE(edev, NETIF_MSG_LINK, "Interface is not running\n");
2487 return;
2488 }
2489
2490 if (link->link_up) {
2491 DP_NOTICE(edev, "Link is up\n");
2492 netif_tx_start_all_queues(edev->ndev);
2493 netif_carrier_on(edev->ndev);
2494 } else {
2495 DP_NOTICE(edev, "Link is down\n");
2496 netif_tx_disable(edev->ndev);
2497 netif_carrier_off(edev->ndev);
2498 }
2499}
2500
0d8e0aa0
SK		 2501static int qede_set_mac_addr(struct net_device *ndev, void *p)
2502{
2503 struct qede_dev *edev = netdev_priv(ndev);
2504 struct sockaddr *addr = p;
2505 int rc;
2506
2507 ASSERT_RTNL(); /* @@@TBD To be removed */
2508
2509 DP_INFO(edev, "Set_mac_addr called\n");
2510
2511 if (!is_valid_ether_addr(addr->sa_data)) {
2512 DP_NOTICE(edev, "The MAC address is not valid\n");
2513 return -EFAULT;
2514 }
2515
2516 ether_addr_copy(ndev->dev_addr, addr->sa_data);
2517
2518 if (!netif_running(ndev)) {
2519 DP_NOTICE(edev, "The device is currently down\n");
2520 return 0;
2521 }
2522
2523 /* Remove the previous primary mac */
2524 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
2525 edev->primary_mac);
2526 if (rc)
2527 return rc;
2528
2529 /* Add MAC filter according to the new unicast HW MAC address */
2530 ether_addr_copy(edev->primary_mac, ndev->dev_addr);
2531 return qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
2532 edev->primary_mac);
2533}
2534
2535static int
2536qede_configure_mcast_filtering(struct net_device *ndev,
2537 enum qed_filter_rx_mode_type *accept_flags)
2538{
2539 struct qede_dev *edev = netdev_priv(ndev);
2540 unsigned char *mc_macs, *temp;
2541 struct netdev_hw_addr *ha;
2542 int rc = 0, mc_count;
2543 size_t size;
2544
2545 size = 64 * ETH_ALEN;
2546
2547 mc_macs = kzalloc(size, GFP_KERNEL);
2548 if (!mc_macs) {
2549 DP_NOTICE(edev,
2550 "Failed to allocate memory for multicast MACs\n");
2551 rc = -ENOMEM;
2552 goto exit;
2553 }
2554
2555 temp = mc_macs;
2556
2557 /* Remove all previously configured MAC filters */
2558 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_DEL,
2559 mc_macs, 1);
2560 if (rc)
2561 goto exit;
2562
2563 netif_addr_lock_bh(ndev);
2564
2565 mc_count = netdev_mc_count(ndev);
2566 if (mc_count < 64) {
2567 netdev_for_each_mc_addr(ha, ndev) {
2568 ether_addr_copy(temp, ha->addr);
2569 temp += ETH_ALEN;
2570 }
2571 }
2572
2573 netif_addr_unlock_bh(ndev);
2574
2575 /* Check for all multicast @@@TBD resource allocation */
2576 if ((ndev->flags & IFF_ALLMULTI) ||
2577 (mc_count > 64)) {
2578 if (*accept_flags == QED_FILTER_RX_MODE_TYPE_REGULAR)
2579 *accept_flags = QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
2580 } else {
2581 /* Add all multicast MAC filters */
2582 rc = qede_set_mcast_rx_mac(edev, QED_FILTER_XCAST_TYPE_ADD,
2583 mc_macs, mc_count);
2584 }
2585
2586exit:
2587 kfree(mc_macs);
2588 return rc;
2589}
2590
2591static void qede_set_rx_mode(struct net_device *ndev)
2592{
2593 struct qede_dev *edev = netdev_priv(ndev);
2594
2595 DP_INFO(edev, "qede_set_rx_mode called\n");
2596
2597 if (edev->state != QEDE_STATE_OPEN) {
2598 DP_INFO(edev,
2599 "qede_set_rx_mode called while interface is down\n");
2600 } else {
2601 set_bit(QEDE_SP_RX_MODE, &edev->sp_flags);
2602 schedule_delayed_work(&edev->sp_task, 0);
2603 }
2604}
2605
2606/* Must be called with qede_lock held */
2607static void qede_config_rx_mode(struct net_device *ndev)
2608{
2609 enum qed_filter_rx_mode_type accept_flags = QED_FILTER_TYPE_UCAST;
2610 struct qede_dev *edev = netdev_priv(ndev);
2611 struct qed_filter_params rx_mode;
2612 unsigned char *uc_macs, *temp;
2613 struct netdev_hw_addr *ha;
2614 int rc, uc_count;
2615 size_t size;
2616
2617 netif_addr_lock_bh(ndev);
2618
2619 uc_count = netdev_uc_count(ndev);
2620 size = uc_count * ETH_ALEN;
2621
2622 uc_macs = kzalloc(size, GFP_ATOMIC);
2623 if (!uc_macs) {
2624 DP_NOTICE(edev, "Failed to allocate memory for unicast MACs\n");
2625 netif_addr_unlock_bh(ndev);
2626 return;
2627 }
2628
2629 temp = uc_macs;
2630 netdev_for_each_uc_addr(ha, ndev) {
2631 ether_addr_copy(temp, ha->addr);
2632 temp += ETH_ALEN;
2633 }
2634
2635 netif_addr_unlock_bh(ndev);
2636
2637 /* Configure the struct for the Rx mode */
2638 memset(&rx_mode, 0, sizeof(struct qed_filter_params));
2639 rx_mode.type = QED_FILTER_TYPE_RX_MODE;
2640
2641 /* Remove all previous unicast secondary macs and multicast macs
2642 * (configrue / leave the primary mac)
2643 */
2644 rc = qede_set_ucast_rx_mac(edev, QED_FILTER_XCAST_TYPE_REPLACE,
2645 edev->primary_mac);
2646 if (rc)
2647 goto out;
2648
2649 /* Check for promiscuous */
2650 if ((ndev->flags & IFF_PROMISC) ||
2651 (uc_count > 15)) { /* @@@TBD resource allocation - 1 */
2652 accept_flags = QED_FILTER_RX_MODE_TYPE_PROMISC;
2653 } else {
2654 /* Add MAC filters according to the unicast secondary macs */
2655 int i;
2656
2657 temp = uc_macs;
2658 for (i = 0; i < uc_count; i++) {
2659 rc = qede_set_ucast_rx_mac(edev,
2660 QED_FILTER_XCAST_TYPE_ADD,
2661 temp);
2662 if (rc)
2663 goto out;
2664
2665 temp += ETH_ALEN;
2666 }
2667
2668 rc = qede_configure_mcast_filtering(ndev, &accept_flags);
2669 if (rc)
2670 goto out;
2671 }
2672
2673 rx_mode.filter.accept_flags = accept_flags;
2674 edev->ops->filter_config(edev->cdev, &rx_mode);
2675out:
2676 kfree(uc_macs);
2677}
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