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d2912cb1 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
8ceee660 | 2 | /**************************************************************************** |
f7a6d2c4 | 3 | * Driver for Solarflare network controllers and boards |
0a6f40c6 | 4 | * Copyright 2006-2011 Solarflare Communications Inc. |
8ceee660 BH |
5 | */ |
6 | ||
5a6681e2 EC |
7 | #ifndef EF4_MDIO_10G_H |
8 | #define EF4_MDIO_10G_H | |
8ceee660 | 9 | |
68e7f45e BH |
10 | #include <linux/mdio.h> |
11 | ||
8ceee660 | 12 | /* |
68e7f45e | 13 | * Helper functions for doing 10G MDIO as specified in IEEE 802.3 clause 45. |
8ceee660 BH |
14 | */ |
15 | ||
16 | #include "efx.h" | |
8ceee660 | 17 | |
5a6681e2 EC |
18 | static inline unsigned ef4_mdio_id_rev(u32 id) { return id & 0xf; } |
19 | static inline unsigned ef4_mdio_id_model(u32 id) { return (id >> 4) & 0x3f; } | |
20 | unsigned ef4_mdio_id_oui(u32 id); | |
8ceee660 | 21 | |
5a6681e2 | 22 | static inline int ef4_mdio_read(struct ef4_nic *efx, int devad, int addr) |
8ceee660 | 23 | { |
68e7f45e | 24 | return efx->mdio.mdio_read(efx->net_dev, efx->mdio.prtad, devad, addr); |
8ceee660 BH |
25 | } |
26 | ||
68e7f45e | 27 | static inline void |
5a6681e2 | 28 | ef4_mdio_write(struct ef4_nic *efx, int devad, int addr, int value) |
8ceee660 | 29 | { |
68e7f45e | 30 | efx->mdio.mdio_write(efx->net_dev, efx->mdio.prtad, devad, addr, value); |
8ceee660 BH |
31 | } |
32 | ||
5a6681e2 | 33 | static inline u32 ef4_mdio_read_id(struct ef4_nic *efx, int mmd) |
8ceee660 | 34 | { |
5a6681e2 EC |
35 | u16 id_low = ef4_mdio_read(efx, mmd, MDIO_DEVID2); |
36 | u16 id_hi = ef4_mdio_read(efx, mmd, MDIO_DEVID1); | |
8ceee660 BH |
37 | return (id_hi << 16) | (id_low); |
38 | } | |
39 | ||
5a6681e2 | 40 | static inline bool ef4_mdio_phyxgxs_lane_sync(struct ef4_nic *efx) |
8ceee660 | 41 | { |
dc8cfa55 BH |
42 | int i, lane_status; |
43 | bool sync; | |
8ceee660 BH |
44 | |
45 | for (i = 0; i < 2; ++i) | |
5a6681e2 | 46 | lane_status = ef4_mdio_read(efx, MDIO_MMD_PHYXS, |
68e7f45e | 47 | MDIO_PHYXS_LNSTAT); |
8ceee660 | 48 | |
68e7f45e | 49 | sync = !!(lane_status & MDIO_PHYXS_LNSTAT_ALIGN); |
8ceee660 | 50 | if (!sync) |
62776d03 BH |
51 | netif_dbg(efx, hw, efx->net_dev, "XGXS lane status: %x\n", |
52 | lane_status); | |
8ceee660 BH |
53 | return sync; |
54 | } | |
55 | ||
5a6681e2 | 56 | const char *ef4_mdio_mmd_name(int mmd); |
8ceee660 BH |
57 | |
58 | /* | |
59 | * Reset a specific MMD and wait for reset to clear. | |
60 | * Return number of spins left (>0) on success, -%ETIMEDOUT on failure. | |
61 | * | |
62 | * This function will sleep | |
63 | */ | |
5a6681e2 | 64 | int ef4_mdio_reset_mmd(struct ef4_nic *efx, int mmd, int spins, int spintime); |
8ceee660 | 65 | |
5a6681e2 EC |
66 | /* As ef4_mdio_check_mmd but for multiple MMDs */ |
67 | int ef4_mdio_check_mmds(struct ef4_nic *efx, unsigned int mmd_mask); | |
8ceee660 BH |
68 | |
69 | /* Check the link status of specified mmds in bit mask */ | |
5a6681e2 | 70 | bool ef4_mdio_links_ok(struct ef4_nic *efx, unsigned int mmd_mask); |
8ceee660 | 71 | |
3273c2e8 | 72 | /* Generic transmit disable support though PMAPMD */ |
5a6681e2 | 73 | void ef4_mdio_transmit_disable(struct ef4_nic *efx); |
3273c2e8 BH |
74 | |
75 | /* Generic part of reconfigure: set/clear loopback bits */ | |
5a6681e2 | 76 | void ef4_mdio_phy_reconfigure(struct ef4_nic *efx); |
3273c2e8 | 77 | |
3e133c44 | 78 | /* Set the power state of the specified MMDs */ |
5a6681e2 | 79 | void ef4_mdio_set_mmds_lpower(struct ef4_nic *efx, int low_power, |
00aef986 | 80 | unsigned int mmd_mask); |
04cc8cac | 81 | |
8ceee660 | 82 | /* Set (some of) the PHY settings over MDIO */ |
e938ed15 PR |
83 | int ef4_mdio_set_link_ksettings(struct ef4_nic *efx, |
84 | const struct ethtool_link_ksettings *cmd); | |
8ceee660 | 85 | |
d3245b28 | 86 | /* Push advertising flags and restart autonegotiation */ |
5a6681e2 | 87 | void ef4_mdio_an_reconfigure(struct ef4_nic *efx); |
d3245b28 | 88 | |
04cc8cac BH |
89 | /* Get pause parameters from AN if available (otherwise return |
90 | * requested pause parameters) | |
91 | */ | |
5a6681e2 | 92 | u8 ef4_mdio_get_pause(struct ef4_nic *efx); |
04cc8cac | 93 | |
8ceee660 | 94 | /* Wait for specified MMDs to exit reset within a timeout */ |
5a6681e2 | 95 | int ef4_mdio_wait_reset_mmds(struct ef4_nic *efx, unsigned int mmd_mask); |
8ceee660 | 96 | |
356eebb2 | 97 | /* Set or clear flag, debouncing */ |
68e7f45e | 98 | static inline void |
5a6681e2 | 99 | ef4_mdio_set_flag(struct ef4_nic *efx, int devad, int addr, |
68e7f45e BH |
100 | int mask, bool state) |
101 | { | |
102 | mdio_set_flag(&efx->mdio, efx->mdio.prtad, devad, addr, mask, state); | |
103 | } | |
356eebb2 | 104 | |
4f16c073 | 105 | /* Liveness self-test for MDIO PHYs */ |
5a6681e2 | 106 | int ef4_mdio_test_alive(struct ef4_nic *efx); |
4f16c073 | 107 | |
5a6681e2 | 108 | #endif /* EF4_MDIO_10G_H */ |