]>
Commit | Line | Data |
---|---|---|
afd4aea0 | 1 | /**************************************************************************** |
f7a6d2c4 BH |
2 | * Driver for Solarflare network controllers and boards |
3 | * Copyright 2008-2013 Solarflare Communications Inc. | |
afd4aea0 BH |
4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | |
6 | * under the terms of the GNU General Public License version 2 as published | |
7 | * by the Free Software Foundation, incorporated herein by reference. | |
8 | */ | |
9 | ||
10 | #include <linux/delay.h> | |
42ca087f | 11 | #include <linux/moduleparam.h> |
84567995 | 12 | #include <linux/atomic.h> |
afd4aea0 BH |
13 | #include "net_driver.h" |
14 | #include "nic.h" | |
15 | #include "io.h" | |
8b8a95a1 | 16 | #include "farch_regs.h" |
afd4aea0 | 17 | #include "mcdi_pcol.h" |
afd4aea0 BH |
18 | |
19 | /************************************************************************** | |
20 | * | |
21 | * Management-Controller-to-Driver Interface | |
22 | * | |
23 | ************************************************************************** | |
24 | */ | |
25 | ||
ebf98e79 | 26 | #define MCDI_RPC_TIMEOUT (10 * HZ) |
afd4aea0 | 27 | |
3f713bf4 BH |
28 | /* A reboot/assertion causes the MCDI status word to be set after the |
29 | * command word is set or a REBOOT event is sent. If we notice a reboot | |
b2d32f03 | 30 | * via these mechanisms then wait 250ms for the status word to be set. |
d36a08b4 | 31 | */ |
3f713bf4 | 32 | #define MCDI_STATUS_DELAY_US 100 |
b2d32f03 | 33 | #define MCDI_STATUS_DELAY_COUNT 2500 |
3f713bf4 BH |
34 | #define MCDI_STATUS_SLEEP_MS \ |
35 | (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000) | |
afd4aea0 BH |
36 | |
37 | #define SEQ_MASK \ | |
38 | EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ)) | |
39 | ||
cade715f BH |
40 | struct efx_mcdi_async_param { |
41 | struct list_head list; | |
42 | unsigned int cmd; | |
43 | size_t inlen; | |
44 | size_t outlen; | |
1e0b8120 | 45 | bool quiet; |
cade715f BH |
46 | efx_mcdi_async_completer *complete; |
47 | unsigned long cookie; | |
48 | /* followed by request/response buffer */ | |
49 | }; | |
50 | ||
51 | static void efx_mcdi_timeout_async(unsigned long context); | |
4c75b43a BH |
52 | static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating, |
53 | bool *was_attached_out); | |
5731d7b3 | 54 | static bool efx_mcdi_poll_once(struct efx_nic *efx); |
e283546c | 55 | static void efx_mcdi_abandon(struct efx_nic *efx); |
afd4aea0 | 56 | |
42ca087f EC |
57 | #ifdef CONFIG_SFC_MCDI_LOGGING |
58 | static bool mcdi_logging_default; | |
59 | module_param(mcdi_logging_default, bool, 0644); | |
60 | MODULE_PARM_DESC(mcdi_logging_default, | |
61 | "Enable MCDI logging on newly-probed functions"); | |
62 | #endif | |
63 | ||
f073dde0 | 64 | int efx_mcdi_init(struct efx_nic *efx) |
afd4aea0 BH |
65 | { |
66 | struct efx_mcdi_iface *mcdi; | |
4c75b43a | 67 | bool already_attached; |
75aba2a5 | 68 | int rc = -ENOMEM; |
afd4aea0 | 69 | |
f3ad5003 BH |
70 | efx->mcdi = kzalloc(sizeof(*efx->mcdi), GFP_KERNEL); |
71 | if (!efx->mcdi) | |
75aba2a5 | 72 | goto fail; |
f3ad5003 | 73 | |
afd4aea0 | 74 | mcdi = efx_mcdi(efx); |
cade715f | 75 | mcdi->efx = efx; |
75aba2a5 EC |
76 | #ifdef CONFIG_SFC_MCDI_LOGGING |
77 | /* consuming code assumes buffer is page-sized */ | |
78 | mcdi->logging_buffer = (char *)__get_free_page(GFP_KERNEL); | |
79 | if (!mcdi->logging_buffer) | |
80 | goto fail1; | |
42ca087f | 81 | mcdi->logging_enabled = mcdi_logging_default; |
75aba2a5 | 82 | #endif |
afd4aea0 | 83 | init_waitqueue_head(&mcdi->wq); |
acd43a90 | 84 | init_waitqueue_head(&mcdi->proxy_rx_wq); |
afd4aea0 | 85 | spin_lock_init(&mcdi->iface_lock); |
251111d9 | 86 | mcdi->state = MCDI_STATE_QUIESCENT; |
afd4aea0 | 87 | mcdi->mode = MCDI_MODE_POLL; |
cade715f BH |
88 | spin_lock_init(&mcdi->async_lock); |
89 | INIT_LIST_HEAD(&mcdi->async_list); | |
90 | setup_timer(&mcdi->async_timer, efx_mcdi_timeout_async, | |
91 | (unsigned long)mcdi); | |
afd4aea0 BH |
92 | |
93 | (void) efx_mcdi_poll_reboot(efx); | |
d36a08b4 | 94 | mcdi->new_epoch = true; |
f073dde0 BH |
95 | |
96 | /* Recover from a failed assertion before probing */ | |
4c75b43a BH |
97 | rc = efx_mcdi_handle_assertion(efx); |
98 | if (rc) | |
75aba2a5 | 99 | goto fail2; |
4c75b43a BH |
100 | |
101 | /* Let the MC (and BMC, if this is a LOM) know that the driver | |
102 | * is loaded. We should do this before we reset the NIC. | |
103 | */ | |
104 | rc = efx_mcdi_drv_attach(efx, true, &already_attached); | |
105 | if (rc) { | |
106 | netif_err(efx, probe, efx->net_dev, | |
107 | "Unable to register driver with MCPU\n"); | |
75aba2a5 | 108 | goto fail2; |
4c75b43a BH |
109 | } |
110 | if (already_attached) | |
111 | /* Not a fatal error */ | |
112 | netif_err(efx, probe, efx->net_dev, | |
113 | "Host already registered with MCPU\n"); | |
114 | ||
0bcf4a64 BH |
115 | if (efx->mcdi->fn_flags & |
116 | (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY)) | |
117 | efx->primary = efx; | |
118 | ||
4c75b43a | 119 | return 0; |
75aba2a5 EC |
120 | fail2: |
121 | #ifdef CONFIG_SFC_MCDI_LOGGING | |
122 | free_page((unsigned long)mcdi->logging_buffer); | |
123 | fail1: | |
124 | #endif | |
125 | kfree(efx->mcdi); | |
126 | efx->mcdi = NULL; | |
127 | fail: | |
128 | return rc; | |
afd4aea0 BH |
129 | } |
130 | ||
e5fbd977 | 131 | void efx_mcdi_detach(struct efx_nic *efx) |
f3ad5003 | 132 | { |
4c75b43a BH |
133 | if (!efx->mcdi) |
134 | return; | |
135 | ||
136 | BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT); | |
137 | ||
138 | /* Relinquish the device (back to the BMC, if this is a LOM) */ | |
139 | efx_mcdi_drv_attach(efx, false, NULL); | |
e5fbd977 JC |
140 | } |
141 | ||
142 | void efx_mcdi_fini(struct efx_nic *efx) | |
143 | { | |
144 | if (!efx->mcdi) | |
145 | return; | |
4c75b43a | 146 | |
75aba2a5 EC |
147 | #ifdef CONFIG_SFC_MCDI_LOGGING |
148 | free_page((unsigned long)efx->mcdi->iface.logging_buffer); | |
149 | #endif | |
150 | ||
f3ad5003 BH |
151 | kfree(efx->mcdi); |
152 | } | |
153 | ||
2f4bcdcc BH |
154 | static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd, |
155 | const efx_dword_t *inbuf, size_t inlen) | |
afd4aea0 BH |
156 | { |
157 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
75aba2a5 EC |
158 | #ifdef CONFIG_SFC_MCDI_LOGGING |
159 | char *buf = mcdi->logging_buffer; /* page-sized */ | |
160 | #endif | |
df2cd8af BH |
161 | efx_dword_t hdr[2]; |
162 | size_t hdr_len; | |
afd4aea0 BH |
163 | u32 xflags, seqno; |
164 | ||
251111d9 | 165 | BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT); |
afd4aea0 | 166 | |
2f4bcdcc BH |
167 | /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */ |
168 | spin_lock_bh(&mcdi->iface_lock); | |
169 | ++mcdi->seqno; | |
170 | spin_unlock_bh(&mcdi->iface_lock); | |
171 | ||
afd4aea0 BH |
172 | seqno = mcdi->seqno & SEQ_MASK; |
173 | xflags = 0; | |
174 | if (mcdi->mode == MCDI_MODE_EVENTS) | |
175 | xflags |= MCDI_HEADER_XFLAGS_EVREQ; | |
176 | ||
df2cd8af BH |
177 | if (efx->type->mcdi_max_ver == 1) { |
178 | /* MCDI v1 */ | |
d36a08b4 | 179 | EFX_POPULATE_DWORD_7(hdr[0], |
df2cd8af BH |
180 | MCDI_HEADER_RESPONSE, 0, |
181 | MCDI_HEADER_RESYNC, 1, | |
182 | MCDI_HEADER_CODE, cmd, | |
183 | MCDI_HEADER_DATALEN, inlen, | |
184 | MCDI_HEADER_SEQ, seqno, | |
d36a08b4 DP |
185 | MCDI_HEADER_XFLAGS, xflags, |
186 | MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch); | |
df2cd8af BH |
187 | hdr_len = 4; |
188 | } else { | |
189 | /* MCDI v2 */ | |
190 | BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2); | |
d36a08b4 | 191 | EFX_POPULATE_DWORD_7(hdr[0], |
df2cd8af BH |
192 | MCDI_HEADER_RESPONSE, 0, |
193 | MCDI_HEADER_RESYNC, 1, | |
194 | MCDI_HEADER_CODE, MC_CMD_V2_EXTN, | |
195 | MCDI_HEADER_DATALEN, 0, | |
196 | MCDI_HEADER_SEQ, seqno, | |
d36a08b4 DP |
197 | MCDI_HEADER_XFLAGS, xflags, |
198 | MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch); | |
df2cd8af BH |
199 | EFX_POPULATE_DWORD_2(hdr[1], |
200 | MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd, | |
201 | MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen); | |
202 | hdr_len = 8; | |
203 | } | |
afd4aea0 | 204 | |
75aba2a5 | 205 | #ifdef CONFIG_SFC_MCDI_LOGGING |
e7fef9b4 | 206 | if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) { |
75aba2a5 EC |
207 | int bytes = 0; |
208 | int i; | |
209 | /* Lengths should always be a whole number of dwords, so scream | |
210 | * if they're not. | |
211 | */ | |
212 | WARN_ON_ONCE(hdr_len % 4); | |
213 | WARN_ON_ONCE(inlen % 4); | |
214 | ||
215 | /* We own the logging buffer, as only one MCDI can be in | |
216 | * progress on a NIC at any one time. So no need for locking. | |
217 | */ | |
218 | for (i = 0; i < hdr_len / 4 && bytes < PAGE_SIZE; i++) | |
219 | bytes += snprintf(buf + bytes, PAGE_SIZE - bytes, | |
220 | " %08x", le32_to_cpu(hdr[i].u32[0])); | |
221 | ||
222 | for (i = 0; i < inlen / 4 && bytes < PAGE_SIZE; i++) | |
223 | bytes += snprintf(buf + bytes, PAGE_SIZE - bytes, | |
224 | " %08x", le32_to_cpu(inbuf[i].u32[0])); | |
225 | ||
226 | netif_info(efx, hw, efx->net_dev, "MCDI RPC REQ:%s\n", buf); | |
227 | } | |
228 | #endif | |
229 | ||
df2cd8af | 230 | efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen); |
2f4bcdcc BH |
231 | |
232 | mcdi->new_epoch = false; | |
afd4aea0 BH |
233 | } |
234 | ||
5bc283e5 BH |
235 | static int efx_mcdi_errno(unsigned int mcdi_err) |
236 | { | |
237 | switch (mcdi_err) { | |
238 | case 0: | |
239 | return 0; | |
240 | #define TRANSLATE_ERROR(name) \ | |
241 | case MC_CMD_ERR_ ## name: \ | |
242 | return -name; | |
df2cd8af | 243 | TRANSLATE_ERROR(EPERM); |
5bc283e5 BH |
244 | TRANSLATE_ERROR(ENOENT); |
245 | TRANSLATE_ERROR(EINTR); | |
df2cd8af | 246 | TRANSLATE_ERROR(EAGAIN); |
5bc283e5 BH |
247 | TRANSLATE_ERROR(EACCES); |
248 | TRANSLATE_ERROR(EBUSY); | |
249 | TRANSLATE_ERROR(EINVAL); | |
250 | TRANSLATE_ERROR(EDEADLK); | |
251 | TRANSLATE_ERROR(ENOSYS); | |
252 | TRANSLATE_ERROR(ETIME); | |
df2cd8af BH |
253 | TRANSLATE_ERROR(EALREADY); |
254 | TRANSLATE_ERROR(ENOSPC); | |
5bc283e5 | 255 | #undef TRANSLATE_ERROR |
ea136ae7 BH |
256 | case MC_CMD_ERR_ENOTSUP: |
257 | return -EOPNOTSUPP; | |
df2cd8af BH |
258 | case MC_CMD_ERR_ALLOC_FAIL: |
259 | return -ENOBUFS; | |
260 | case MC_CMD_ERR_MAC_EXIST: | |
261 | return -EADDRINUSE; | |
5bc283e5 | 262 | default: |
df2cd8af BH |
263 | return -EPROTO; |
264 | } | |
265 | } | |
266 | ||
267 | static void efx_mcdi_read_response_header(struct efx_nic *efx) | |
268 | { | |
269 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
270 | unsigned int respseq, respcmd, error; | |
75aba2a5 EC |
271 | #ifdef CONFIG_SFC_MCDI_LOGGING |
272 | char *buf = mcdi->logging_buffer; /* page-sized */ | |
273 | #endif | |
df2cd8af BH |
274 | efx_dword_t hdr; |
275 | ||
276 | efx->type->mcdi_read_response(efx, &hdr, 0, 4); | |
277 | respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ); | |
278 | respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE); | |
279 | error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR); | |
280 | ||
281 | if (respcmd != MC_CMD_V2_EXTN) { | |
282 | mcdi->resp_hdr_len = 4; | |
283 | mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN); | |
284 | } else { | |
285 | efx->type->mcdi_read_response(efx, &hdr, 4, 4); | |
286 | mcdi->resp_hdr_len = 8; | |
287 | mcdi->resp_data_len = | |
288 | EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN); | |
289 | } | |
290 | ||
75aba2a5 | 291 | #ifdef CONFIG_SFC_MCDI_LOGGING |
e7fef9b4 | 292 | if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) { |
75aba2a5 EC |
293 | size_t hdr_len, data_len; |
294 | int bytes = 0; | |
295 | int i; | |
296 | ||
297 | WARN_ON_ONCE(mcdi->resp_hdr_len % 4); | |
298 | hdr_len = mcdi->resp_hdr_len / 4; | |
299 | /* MCDI_DECLARE_BUF ensures that underlying buffer is padded | |
300 | * to dword size, and the MCDI buffer is always dword size | |
301 | */ | |
302 | data_len = DIV_ROUND_UP(mcdi->resp_data_len, 4); | |
303 | ||
304 | /* We own the logging buffer, as only one MCDI can be in | |
305 | * progress on a NIC at any one time. So no need for locking. | |
306 | */ | |
307 | for (i = 0; i < hdr_len && bytes < PAGE_SIZE; i++) { | |
308 | efx->type->mcdi_read_response(efx, &hdr, (i * 4), 4); | |
309 | bytes += snprintf(buf + bytes, PAGE_SIZE - bytes, | |
310 | " %08x", le32_to_cpu(hdr.u32[0])); | |
311 | } | |
312 | ||
313 | for (i = 0; i < data_len && bytes < PAGE_SIZE; i++) { | |
314 | efx->type->mcdi_read_response(efx, &hdr, | |
315 | mcdi->resp_hdr_len + (i * 4), 4); | |
316 | bytes += snprintf(buf + bytes, PAGE_SIZE - bytes, | |
317 | " %08x", le32_to_cpu(hdr.u32[0])); | |
318 | } | |
319 | ||
320 | netif_info(efx, hw, efx->net_dev, "MCDI RPC RESP:%s\n", buf); | |
321 | } | |
322 | #endif | |
323 | ||
ac28d179 | 324 | mcdi->resprc_raw = 0; |
df2cd8af BH |
325 | if (error && mcdi->resp_data_len == 0) { |
326 | netif_err(efx, hw, efx->net_dev, "MC rebooted\n"); | |
327 | mcdi->resprc = -EIO; | |
328 | } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) { | |
329 | netif_err(efx, hw, efx->net_dev, | |
330 | "MC response mismatch tx seq 0x%x rx seq 0x%x\n", | |
331 | respseq, mcdi->seqno); | |
332 | mcdi->resprc = -EIO; | |
333 | } else if (error) { | |
334 | efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4); | |
ac28d179 BK |
335 | mcdi->resprc_raw = EFX_DWORD_FIELD(hdr, EFX_DWORD_0); |
336 | mcdi->resprc = efx_mcdi_errno(mcdi->resprc_raw); | |
df2cd8af BH |
337 | } else { |
338 | mcdi->resprc = 0; | |
5bc283e5 BH |
339 | } |
340 | } | |
341 | ||
5731d7b3 RS |
342 | static bool efx_mcdi_poll_once(struct efx_nic *efx) |
343 | { | |
344 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
345 | ||
346 | rmb(); | |
347 | if (!efx->type->mcdi_poll_response(efx)) | |
348 | return false; | |
349 | ||
350 | spin_lock_bh(&mcdi->iface_lock); | |
351 | efx_mcdi_read_response_header(efx); | |
352 | spin_unlock_bh(&mcdi->iface_lock); | |
353 | ||
354 | return true; | |
355 | } | |
356 | ||
afd4aea0 BH |
357 | static int efx_mcdi_poll(struct efx_nic *efx) |
358 | { | |
359 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
ebf98e79 | 360 | unsigned long time, finish; |
5bc283e5 | 361 | unsigned int spins; |
5bc283e5 | 362 | int rc; |
afd4aea0 BH |
363 | |
364 | /* Check for a reboot atomically with respect to efx_mcdi_copyout() */ | |
5bc283e5 | 365 | rc = efx_mcdi_poll_reboot(efx); |
df2cd8af | 366 | if (rc) { |
369327fa | 367 | spin_lock_bh(&mcdi->iface_lock); |
df2cd8af BH |
368 | mcdi->resprc = rc; |
369 | mcdi->resp_hdr_len = 0; | |
370 | mcdi->resp_data_len = 0; | |
369327fa | 371 | spin_unlock_bh(&mcdi->iface_lock); |
df2cd8af BH |
372 | return 0; |
373 | } | |
afd4aea0 BH |
374 | |
375 | /* Poll for completion. Poll quickly (once a us) for the 1st jiffy, | |
376 | * because generally mcdi responses are fast. After that, back off | |
377 | * and poll once a jiffy (approximately) | |
378 | */ | |
379 | spins = TICK_USEC; | |
ebf98e79 | 380 | finish = jiffies + MCDI_RPC_TIMEOUT; |
afd4aea0 BH |
381 | |
382 | while (1) { | |
383 | if (spins != 0) { | |
384 | --spins; | |
385 | udelay(1); | |
55029c1d BH |
386 | } else { |
387 | schedule_timeout_uninterruptible(1); | |
388 | } | |
afd4aea0 | 389 | |
ebf98e79 | 390 | time = jiffies; |
afd4aea0 | 391 | |
5731d7b3 | 392 | if (efx_mcdi_poll_once(efx)) |
afd4aea0 BH |
393 | break; |
394 | ||
ebf98e79 | 395 | if (time_after(time, finish)) |
afd4aea0 BH |
396 | return -ETIMEDOUT; |
397 | } | |
398 | ||
afd4aea0 BH |
399 | /* Return rc=0 like wait_event_timeout() */ |
400 | return 0; | |
401 | } | |
402 | ||
876be083 BH |
403 | /* Test and clear MC-rebooted flag for this port/function; reset |
404 | * software state as necessary. | |
405 | */ | |
afd4aea0 BH |
406 | int efx_mcdi_poll_reboot(struct efx_nic *efx) |
407 | { | |
f3ad5003 BH |
408 | if (!efx->mcdi) |
409 | return 0; | |
afd4aea0 | 410 | |
cd0ecc9a | 411 | return efx->type->mcdi_poll_reboot(efx); |
afd4aea0 BH |
412 | } |
413 | ||
cade715f BH |
414 | static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi) |
415 | { | |
416 | return cmpxchg(&mcdi->state, | |
417 | MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) == | |
418 | MCDI_STATE_QUIESCENT; | |
419 | } | |
420 | ||
421 | static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi) | |
afd4aea0 BH |
422 | { |
423 | /* Wait until the interface becomes QUIESCENT and we win the race | |
cade715f BH |
424 | * to mark it RUNNING_SYNC. |
425 | */ | |
afd4aea0 | 426 | wait_event(mcdi->wq, |
251111d9 | 427 | cmpxchg(&mcdi->state, |
cade715f | 428 | MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) == |
251111d9 | 429 | MCDI_STATE_QUIESCENT); |
afd4aea0 BH |
430 | } |
431 | ||
432 | static int efx_mcdi_await_completion(struct efx_nic *efx) | |
433 | { | |
434 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
435 | ||
251111d9 BH |
436 | if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED, |
437 | MCDI_RPC_TIMEOUT) == 0) | |
afd4aea0 BH |
438 | return -ETIMEDOUT; |
439 | ||
440 | /* Check if efx_mcdi_set_mode() switched us back to polled completions. | |
441 | * In which case, poll for completions directly. If efx_mcdi_ev_cpl() | |
442 | * completed the request first, then we'll just end up completing the | |
443 | * request again, which is safe. | |
444 | * | |
445 | * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which | |
446 | * wait_event_timeout() implicitly provides. | |
447 | */ | |
448 | if (mcdi->mode == MCDI_MODE_POLL) | |
449 | return efx_mcdi_poll(efx); | |
450 | ||
451 | return 0; | |
452 | } | |
453 | ||
cade715f BH |
454 | /* If the interface is RUNNING_SYNC, switch to COMPLETED and wake the |
455 | * requester. Return whether this was done. Does not take any locks. | |
456 | */ | |
457 | static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi) | |
afd4aea0 | 458 | { |
cade715f BH |
459 | if (cmpxchg(&mcdi->state, |
460 | MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) == | |
461 | MCDI_STATE_RUNNING_SYNC) { | |
afd4aea0 BH |
462 | wake_up(&mcdi->wq); |
463 | return true; | |
464 | } | |
465 | ||
466 | return false; | |
467 | } | |
468 | ||
469 | static void efx_mcdi_release(struct efx_mcdi_iface *mcdi) | |
470 | { | |
cade715f BH |
471 | if (mcdi->mode == MCDI_MODE_EVENTS) { |
472 | struct efx_mcdi_async_param *async; | |
473 | struct efx_nic *efx = mcdi->efx; | |
474 | ||
475 | /* Process the asynchronous request queue */ | |
476 | spin_lock_bh(&mcdi->async_lock); | |
477 | async = list_first_entry_or_null( | |
478 | &mcdi->async_list, struct efx_mcdi_async_param, list); | |
479 | if (async) { | |
480 | mcdi->state = MCDI_STATE_RUNNING_ASYNC; | |
481 | efx_mcdi_send_request(efx, async->cmd, | |
482 | (const efx_dword_t *)(async + 1), | |
483 | async->inlen); | |
484 | mod_timer(&mcdi->async_timer, | |
485 | jiffies + MCDI_RPC_TIMEOUT); | |
486 | } | |
487 | spin_unlock_bh(&mcdi->async_lock); | |
488 | ||
489 | if (async) | |
490 | return; | |
491 | } | |
492 | ||
251111d9 | 493 | mcdi->state = MCDI_STATE_QUIESCENT; |
afd4aea0 BH |
494 | wake_up(&mcdi->wq); |
495 | } | |
496 | ||
cade715f BH |
497 | /* If the interface is RUNNING_ASYNC, switch to COMPLETED, call the |
498 | * asynchronous completion function, and release the interface. | |
499 | * Return whether this was done. Must be called in bh-disabled | |
500 | * context. Will take iface_lock and async_lock. | |
501 | */ | |
502 | static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout) | |
503 | { | |
504 | struct efx_nic *efx = mcdi->efx; | |
505 | struct efx_mcdi_async_param *async; | |
1e0b8120 | 506 | size_t hdr_len, data_len, err_len; |
cade715f | 507 | efx_dword_t *outbuf; |
aa09a3da | 508 | MCDI_DECLARE_BUF_ERR(errbuf); |
cade715f BH |
509 | int rc; |
510 | ||
511 | if (cmpxchg(&mcdi->state, | |
512 | MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) != | |
513 | MCDI_STATE_RUNNING_ASYNC) | |
514 | return false; | |
515 | ||
516 | spin_lock(&mcdi->iface_lock); | |
517 | if (timeout) { | |
518 | /* Ensure that if the completion event arrives later, | |
519 | * the seqno check in efx_mcdi_ev_cpl() will fail | |
520 | */ | |
521 | ++mcdi->seqno; | |
522 | ++mcdi->credits; | |
523 | rc = -ETIMEDOUT; | |
524 | hdr_len = 0; | |
525 | data_len = 0; | |
526 | } else { | |
527 | rc = mcdi->resprc; | |
528 | hdr_len = mcdi->resp_hdr_len; | |
529 | data_len = mcdi->resp_data_len; | |
530 | } | |
531 | spin_unlock(&mcdi->iface_lock); | |
532 | ||
533 | /* Stop the timer. In case the timer function is running, we | |
534 | * must wait for it to return so that there is no possibility | |
535 | * of it aborting the next request. | |
536 | */ | |
537 | if (!timeout) | |
538 | del_timer_sync(&mcdi->async_timer); | |
539 | ||
540 | spin_lock(&mcdi->async_lock); | |
541 | async = list_first_entry(&mcdi->async_list, | |
542 | struct efx_mcdi_async_param, list); | |
543 | list_del(&async->list); | |
544 | spin_unlock(&mcdi->async_lock); | |
545 | ||
546 | outbuf = (efx_dword_t *)(async + 1); | |
547 | efx->type->mcdi_read_response(efx, outbuf, hdr_len, | |
548 | min(async->outlen, data_len)); | |
1e0b8120 EC |
549 | if (!timeout && rc && !async->quiet) { |
550 | err_len = min(sizeof(errbuf), data_len); | |
551 | efx->type->mcdi_read_response(efx, errbuf, hdr_len, | |
552 | sizeof(errbuf)); | |
553 | efx_mcdi_display_error(efx, async->cmd, async->inlen, errbuf, | |
554 | err_len, rc); | |
555 | } | |
7014d7f6 BK |
556 | |
557 | if (async->complete) | |
558 | async->complete(efx, async->cookie, rc, outbuf, | |
559 | min(async->outlen, data_len)); | |
cade715f BH |
560 | kfree(async); |
561 | ||
562 | efx_mcdi_release(mcdi); | |
563 | ||
564 | return true; | |
565 | } | |
566 | ||
afd4aea0 | 567 | static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno, |
5bc283e5 | 568 | unsigned int datalen, unsigned int mcdi_err) |
afd4aea0 BH |
569 | { |
570 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
571 | bool wake = false; | |
572 | ||
573 | spin_lock(&mcdi->iface_lock); | |
574 | ||
575 | if ((seqno ^ mcdi->seqno) & SEQ_MASK) { | |
576 | if (mcdi->credits) | |
577 | /* The request has been cancelled */ | |
578 | --mcdi->credits; | |
579 | else | |
62776d03 BH |
580 | netif_err(efx, hw, efx->net_dev, |
581 | "MC response mismatch tx seq 0x%x rx " | |
582 | "seq 0x%x\n", seqno, mcdi->seqno); | |
afd4aea0 | 583 | } else { |
df2cd8af BH |
584 | if (efx->type->mcdi_max_ver >= 2) { |
585 | /* MCDI v2 responses don't fit in an event */ | |
586 | efx_mcdi_read_response_header(efx); | |
587 | } else { | |
588 | mcdi->resprc = efx_mcdi_errno(mcdi_err); | |
589 | mcdi->resp_hdr_len = 4; | |
590 | mcdi->resp_data_len = datalen; | |
591 | } | |
afd4aea0 BH |
592 | |
593 | wake = true; | |
594 | } | |
595 | ||
596 | spin_unlock(&mcdi->iface_lock); | |
597 | ||
cade715f BH |
598 | if (wake) { |
599 | if (!efx_mcdi_complete_async(mcdi, false)) | |
600 | (void) efx_mcdi_complete_sync(mcdi); | |
601 | ||
602 | /* If the interface isn't RUNNING_ASYNC or | |
603 | * RUNNING_SYNC then we've received a duplicate | |
604 | * completion after we've already transitioned back to | |
605 | * QUIESCENT. [A subsequent invocation would increment | |
606 | * seqno, so would have failed the seqno check]. | |
607 | */ | |
608 | } | |
609 | } | |
610 | ||
611 | static void efx_mcdi_timeout_async(unsigned long context) | |
612 | { | |
613 | struct efx_mcdi_iface *mcdi = (struct efx_mcdi_iface *)context; | |
614 | ||
615 | efx_mcdi_complete_async(mcdi, true); | |
afd4aea0 BH |
616 | } |
617 | ||
2f4bcdcc BH |
618 | static int |
619 | efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen) | |
620 | { | |
621 | if (efx->type->mcdi_max_ver < 0 || | |
622 | (efx->type->mcdi_max_ver < 2 && | |
623 | cmd > MC_CMD_CMD_SPACE_ESCAPE_7)) | |
624 | return -EINVAL; | |
625 | ||
626 | if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 || | |
627 | (efx->type->mcdi_max_ver < 2 && | |
628 | inlen > MCDI_CTL_SDU_LEN_MAX_V1)) | |
629 | return -EMSGSIZE; | |
630 | ||
631 | return 0; | |
632 | } | |
633 | ||
acd43a90 BK |
634 | static bool efx_mcdi_get_proxy_handle(struct efx_nic *efx, |
635 | size_t hdr_len, size_t data_len, | |
636 | u32 *proxy_handle) | |
637 | { | |
638 | MCDI_DECLARE_BUF_ERR(testbuf); | |
639 | const size_t buflen = sizeof(testbuf); | |
640 | ||
641 | if (!proxy_handle || data_len < buflen) | |
642 | return false; | |
643 | ||
644 | efx->type->mcdi_read_response(efx, testbuf, hdr_len, buflen); | |
645 | if (MCDI_DWORD(testbuf, ERR_CODE) == MC_CMD_ERR_PROXY_PENDING) { | |
646 | *proxy_handle = MCDI_DWORD(testbuf, ERR_PROXY_PENDING_HANDLE); | |
647 | return true; | |
648 | } | |
649 | ||
650 | return false; | |
651 | } | |
652 | ||
653 | static int _efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned int cmd, | |
654 | size_t inlen, | |
1e0b8120 | 655 | efx_dword_t *outbuf, size_t outlen, |
ac28d179 | 656 | size_t *outlen_actual, bool quiet, |
acd43a90 | 657 | u32 *proxy_handle, int *raw_rc) |
1e0b8120 EC |
658 | { |
659 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
aa09a3da | 660 | MCDI_DECLARE_BUF_ERR(errbuf); |
1e0b8120 EC |
661 | int rc; |
662 | ||
663 | if (mcdi->mode == MCDI_MODE_POLL) | |
664 | rc = efx_mcdi_poll(efx); | |
665 | else | |
666 | rc = efx_mcdi_await_completion(efx); | |
667 | ||
668 | if (rc != 0) { | |
669 | netif_err(efx, hw, efx->net_dev, | |
670 | "MC command 0x%x inlen %d mode %d timed out\n", | |
671 | cmd, (int)inlen, mcdi->mode); | |
672 | ||
673 | if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) { | |
674 | netif_err(efx, hw, efx->net_dev, | |
675 | "MCDI request was completed without an event\n"); | |
676 | rc = 0; | |
677 | } | |
678 | ||
e283546c EC |
679 | efx_mcdi_abandon(efx); |
680 | ||
1e0b8120 EC |
681 | /* Close the race with efx_mcdi_ev_cpl() executing just too late |
682 | * and completing a request we've just cancelled, by ensuring | |
683 | * that the seqno check therein fails. | |
684 | */ | |
685 | spin_lock_bh(&mcdi->iface_lock); | |
686 | ++mcdi->seqno; | |
687 | ++mcdi->credits; | |
688 | spin_unlock_bh(&mcdi->iface_lock); | |
689 | } | |
690 | ||
acd43a90 BK |
691 | if (proxy_handle) |
692 | *proxy_handle = 0; | |
693 | ||
1e0b8120 EC |
694 | if (rc != 0) { |
695 | if (outlen_actual) | |
696 | *outlen_actual = 0; | |
697 | } else { | |
698 | size_t hdr_len, data_len, err_len; | |
699 | ||
700 | /* At the very least we need a memory barrier here to ensure | |
701 | * we pick up changes from efx_mcdi_ev_cpl(). Protect against | |
702 | * a spurious efx_mcdi_ev_cpl() running concurrently by | |
703 | * acquiring the iface_lock. */ | |
704 | spin_lock_bh(&mcdi->iface_lock); | |
705 | rc = mcdi->resprc; | |
ac28d179 BK |
706 | if (raw_rc) |
707 | *raw_rc = mcdi->resprc_raw; | |
1e0b8120 EC |
708 | hdr_len = mcdi->resp_hdr_len; |
709 | data_len = mcdi->resp_data_len; | |
710 | err_len = min(sizeof(errbuf), data_len); | |
711 | spin_unlock_bh(&mcdi->iface_lock); | |
712 | ||
713 | BUG_ON(rc > 0); | |
714 | ||
715 | efx->type->mcdi_read_response(efx, outbuf, hdr_len, | |
716 | min(outlen, data_len)); | |
717 | if (outlen_actual) | |
718 | *outlen_actual = data_len; | |
719 | ||
720 | efx->type->mcdi_read_response(efx, errbuf, hdr_len, err_len); | |
721 | ||
722 | if (cmd == MC_CMD_REBOOT && rc == -EIO) { | |
723 | /* Don't reset if MC_CMD_REBOOT returns EIO */ | |
724 | } else if (rc == -EIO || rc == -EINTR) { | |
0ca2b46d JC |
725 | netif_err(efx, hw, efx->net_dev, "MC reboot detected\n"); |
726 | netif_dbg(efx, hw, efx->net_dev, "MC rebooted during command %d rc %d\n", | |
727 | cmd, -rc); | |
728 | if (efx->type->mcdi_reboot_detected) | |
729 | efx->type->mcdi_reboot_detected(efx); | |
1e0b8120 | 730 | efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); |
acd43a90 BK |
731 | } else if (proxy_handle && (rc == -EPROTO) && |
732 | efx_mcdi_get_proxy_handle(efx, hdr_len, data_len, | |
733 | proxy_handle)) { | |
734 | mcdi->proxy_rx_status = 0; | |
735 | mcdi->proxy_rx_handle = 0; | |
736 | mcdi->state = MCDI_STATE_PROXY_WAIT; | |
1e0b8120 EC |
737 | } else if (rc && !quiet) { |
738 | efx_mcdi_display_error(efx, cmd, inlen, errbuf, err_len, | |
739 | rc); | |
740 | } | |
741 | ||
742 | if (rc == -EIO || rc == -EINTR) { | |
743 | msleep(MCDI_STATUS_SLEEP_MS); | |
744 | efx_mcdi_poll_reboot(efx); | |
745 | mcdi->new_epoch = true; | |
746 | } | |
747 | } | |
748 | ||
acd43a90 BK |
749 | if (!proxy_handle || !*proxy_handle) |
750 | efx_mcdi_release(mcdi); | |
1e0b8120 EC |
751 | return rc; |
752 | } | |
753 | ||
acd43a90 BK |
754 | static void efx_mcdi_proxy_abort(struct efx_mcdi_iface *mcdi) |
755 | { | |
756 | if (mcdi->state == MCDI_STATE_PROXY_WAIT) { | |
757 | /* Interrupt the proxy wait. */ | |
758 | mcdi->proxy_rx_status = -EINTR; | |
759 | wake_up(&mcdi->proxy_rx_wq); | |
760 | } | |
761 | } | |
762 | ||
763 | static void efx_mcdi_ev_proxy_response(struct efx_nic *efx, | |
764 | u32 handle, int status) | |
765 | { | |
766 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
767 | ||
768 | WARN_ON(mcdi->state != MCDI_STATE_PROXY_WAIT); | |
769 | ||
770 | mcdi->proxy_rx_status = efx_mcdi_errno(status); | |
771 | /* Ensure the status is written before we update the handle, since the | |
772 | * latter is used to check if we've finished. | |
773 | */ | |
774 | wmb(); | |
775 | mcdi->proxy_rx_handle = handle; | |
776 | wake_up(&mcdi->proxy_rx_wq); | |
777 | } | |
778 | ||
779 | static int efx_mcdi_proxy_wait(struct efx_nic *efx, u32 handle, bool quiet) | |
780 | { | |
781 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
782 | int rc; | |
783 | ||
784 | /* Wait for a proxy event, or timeout. */ | |
785 | rc = wait_event_timeout(mcdi->proxy_rx_wq, | |
786 | mcdi->proxy_rx_handle != 0 || | |
787 | mcdi->proxy_rx_status == -EINTR, | |
788 | MCDI_RPC_TIMEOUT); | |
789 | ||
790 | if (rc <= 0) { | |
791 | netif_dbg(efx, hw, efx->net_dev, | |
792 | "MCDI proxy timeout %d\n", handle); | |
793 | return -ETIMEDOUT; | |
794 | } else if (mcdi->proxy_rx_handle != handle) { | |
795 | netif_warn(efx, hw, efx->net_dev, | |
796 | "MCDI proxy unexpected handle %d (expected %d)\n", | |
797 | mcdi->proxy_rx_handle, handle); | |
798 | return -EINVAL; | |
799 | } | |
800 | ||
801 | return mcdi->proxy_rx_status; | |
802 | } | |
803 | ||
804 | static int _efx_mcdi_rpc(struct efx_nic *efx, unsigned int cmd, | |
1e0b8120 EC |
805 | const efx_dword_t *inbuf, size_t inlen, |
806 | efx_dword_t *outbuf, size_t outlen, | |
ac28d179 | 807 | size_t *outlen_actual, bool quiet, int *raw_rc) |
1e0b8120 | 808 | { |
acd43a90 | 809 | u32 proxy_handle = 0; /* Zero is an invalid proxy handle. */ |
1e0b8120 EC |
810 | int rc; |
811 | ||
acd43a90 BK |
812 | if (inbuf && inlen && (inbuf == outbuf)) { |
813 | /* The input buffer can't be aliased with the output. */ | |
814 | WARN_ON(1); | |
815 | return -EINVAL; | |
816 | } | |
817 | ||
1e0b8120 | 818 | rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen); |
ac28d179 | 819 | if (rc) |
1e0b8120 | 820 | return rc; |
ac28d179 | 821 | |
acd43a90 BK |
822 | rc = _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen, |
823 | outlen_actual, quiet, &proxy_handle, raw_rc); | |
824 | ||
825 | if (proxy_handle) { | |
826 | /* Handle proxy authorisation. This allows approval of MCDI | |
827 | * operations to be delegated to the admin function, allowing | |
828 | * fine control over (eg) multicast subscriptions. | |
829 | */ | |
830 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
831 | ||
832 | netif_dbg(efx, hw, efx->net_dev, | |
833 | "MCDI waiting for proxy auth %d\n", | |
834 | proxy_handle); | |
835 | rc = efx_mcdi_proxy_wait(efx, proxy_handle, quiet); | |
836 | ||
837 | if (rc == 0) { | |
838 | netif_dbg(efx, hw, efx->net_dev, | |
839 | "MCDI proxy retry %d\n", proxy_handle); | |
840 | ||
841 | /* We now retry the original request. */ | |
842 | mcdi->state = MCDI_STATE_RUNNING_SYNC; | |
843 | efx_mcdi_send_request(efx, cmd, inbuf, inlen); | |
844 | ||
845 | rc = _efx_mcdi_rpc_finish(efx, cmd, inlen, | |
846 | outbuf, outlen, outlen_actual, | |
847 | quiet, NULL, raw_rc); | |
848 | } else { | |
34e7aefb JC |
849 | netif_cond_dbg(efx, hw, efx->net_dev, rc == -EPERM, err, |
850 | "MC command 0x%x failed after proxy auth rc=%d\n", | |
851 | cmd, rc); | |
acd43a90 BK |
852 | |
853 | if (rc == -EINTR || rc == -EIO) | |
854 | efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); | |
855 | efx_mcdi_release(mcdi); | |
856 | } | |
857 | } | |
858 | ||
859 | return rc; | |
ac28d179 BK |
860 | } |
861 | ||
862 | static int _efx_mcdi_rpc_evb_retry(struct efx_nic *efx, unsigned cmd, | |
863 | const efx_dword_t *inbuf, size_t inlen, | |
864 | efx_dword_t *outbuf, size_t outlen, | |
865 | size_t *outlen_actual, bool quiet) | |
866 | { | |
867 | int raw_rc = 0; | |
868 | int rc; | |
869 | ||
870 | rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen, | |
871 | outbuf, outlen, outlen_actual, true, &raw_rc); | |
872 | ||
873 | if ((rc == -EPROTO) && (raw_rc == MC_CMD_ERR_NO_EVB_PORT) && | |
874 | efx->type->is_vf) { | |
875 | /* If the EVB port isn't available within a VF this may | |
876 | * mean the PF is still bringing the switch up. We should | |
877 | * retry our request shortly. | |
878 | */ | |
879 | unsigned long abort_time = jiffies + MCDI_RPC_TIMEOUT; | |
880 | unsigned int delay_us = 10000; | |
881 | ||
882 | netif_dbg(efx, hw, efx->net_dev, | |
883 | "%s: NO_EVB_PORT; will retry request\n", | |
884 | __func__); | |
885 | ||
886 | do { | |
887 | usleep_range(delay_us, delay_us + 10000); | |
888 | rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen, | |
889 | outbuf, outlen, outlen_actual, | |
890 | true, &raw_rc); | |
891 | if (delay_us < 100000) | |
892 | delay_us <<= 1; | |
893 | } while ((rc == -EPROTO) && | |
894 | (raw_rc == MC_CMD_ERR_NO_EVB_PORT) && | |
895 | time_before(jiffies, abort_time)); | |
896 | } | |
897 | ||
898 | if (rc && !quiet && !(cmd == MC_CMD_REBOOT && rc == -EIO)) | |
899 | efx_mcdi_display_error(efx, cmd, inlen, | |
900 | outbuf, outlen, rc); | |
901 | ||
902 | return rc; | |
1e0b8120 EC |
903 | } |
904 | ||
ac28d179 BK |
905 | /** |
906 | * efx_mcdi_rpc - Issue an MCDI command and wait for completion | |
907 | * @efx: NIC through which to issue the command | |
908 | * @cmd: Command type number | |
909 | * @inbuf: Command parameters | |
910 | * @inlen: Length of command parameters, in bytes. Must be a multiple | |
911 | * of 4 and no greater than %MCDI_CTL_SDU_LEN_MAX_V1. | |
912 | * @outbuf: Response buffer. May be %NULL if @outlen is 0. | |
913 | * @outlen: Length of response buffer, in bytes. If the actual | |
914 | * response is longer than @outlen & ~3, it will be truncated | |
915 | * to that length. | |
916 | * @outlen_actual: Pointer through which to return the actual response | |
917 | * length. May be %NULL if this is not needed. | |
918 | * | |
919 | * This function may sleep and therefore must be called in an appropriate | |
920 | * context. | |
921 | * | |
922 | * Return: A negative error code, or zero if successful. The error | |
923 | * code may come from the MCDI response or may indicate a failure | |
924 | * to communicate with the MC. In the former case, the response | |
925 | * will still be copied to @outbuf and *@outlen_actual will be | |
926 | * set accordingly. In the latter case, *@outlen_actual will be | |
927 | * set to zero. | |
928 | */ | |
afd4aea0 | 929 | int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd, |
9528b921 BH |
930 | const efx_dword_t *inbuf, size_t inlen, |
931 | efx_dword_t *outbuf, size_t outlen, | |
afd4aea0 | 932 | size_t *outlen_actual) |
c3cba721 | 933 | { |
ac28d179 BK |
934 | return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen, |
935 | outlen_actual, false); | |
1e0b8120 | 936 | } |
df2cd8af | 937 | |
1e0b8120 EC |
938 | /* Normally, on receiving an error code in the MCDI response, |
939 | * efx_mcdi_rpc will log an error message containing (among other | |
940 | * things) the raw error code, by means of efx_mcdi_display_error. | |
941 | * This _quiet version suppresses that; if the caller wishes to log | |
942 | * the error conditionally on the return code, it should call this | |
943 | * function and is then responsible for calling efx_mcdi_display_error | |
944 | * as needed. | |
945 | */ | |
946 | int efx_mcdi_rpc_quiet(struct efx_nic *efx, unsigned cmd, | |
947 | const efx_dword_t *inbuf, size_t inlen, | |
948 | efx_dword_t *outbuf, size_t outlen, | |
949 | size_t *outlen_actual) | |
950 | { | |
ac28d179 BK |
951 | return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen, |
952 | outlen_actual, true); | |
c3cba721 SH |
953 | } |
954 | ||
df2cd8af BH |
955 | int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd, |
956 | const efx_dword_t *inbuf, size_t inlen) | |
afd4aea0 BH |
957 | { |
958 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
2f4bcdcc | 959 | int rc; |
c3cba721 | 960 | |
2f4bcdcc BH |
961 | rc = efx_mcdi_check_supported(efx, cmd, inlen); |
962 | if (rc) | |
963 | return rc; | |
df2cd8af | 964 | |
74cd60a4 JC |
965 | if (efx->mc_bist_for_other_fn) |
966 | return -ENETDOWN; | |
967 | ||
e283546c EC |
968 | if (mcdi->mode == MCDI_MODE_FAIL) |
969 | return -ENETDOWN; | |
970 | ||
cade715f | 971 | efx_mcdi_acquire_sync(mcdi); |
2f4bcdcc | 972 | efx_mcdi_send_request(efx, cmd, inbuf, inlen); |
df2cd8af | 973 | return 0; |
c3cba721 SH |
974 | } |
975 | ||
1e0b8120 EC |
976 | static int _efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd, |
977 | const efx_dword_t *inbuf, size_t inlen, | |
978 | size_t outlen, | |
979 | efx_mcdi_async_completer *complete, | |
980 | unsigned long cookie, bool quiet) | |
cade715f BH |
981 | { |
982 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
983 | struct efx_mcdi_async_param *async; | |
984 | int rc; | |
985 | ||
986 | rc = efx_mcdi_check_supported(efx, cmd, inlen); | |
987 | if (rc) | |
988 | return rc; | |
989 | ||
74cd60a4 JC |
990 | if (efx->mc_bist_for_other_fn) |
991 | return -ENETDOWN; | |
992 | ||
cade715f BH |
993 | async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4), |
994 | GFP_ATOMIC); | |
995 | if (!async) | |
996 | return -ENOMEM; | |
997 | ||
998 | async->cmd = cmd; | |
999 | async->inlen = inlen; | |
1000 | async->outlen = outlen; | |
1e0b8120 | 1001 | async->quiet = quiet; |
cade715f BH |
1002 | async->complete = complete; |
1003 | async->cookie = cookie; | |
1004 | memcpy(async + 1, inbuf, inlen); | |
1005 | ||
1006 | spin_lock_bh(&mcdi->async_lock); | |
1007 | ||
1008 | if (mcdi->mode == MCDI_MODE_EVENTS) { | |
1009 | list_add_tail(&async->list, &mcdi->async_list); | |
1010 | ||
1011 | /* If this is at the front of the queue, try to start it | |
1012 | * immediately | |
1013 | */ | |
1014 | if (mcdi->async_list.next == &async->list && | |
1015 | efx_mcdi_acquire_async(mcdi)) { | |
1016 | efx_mcdi_send_request(efx, cmd, inbuf, inlen); | |
1017 | mod_timer(&mcdi->async_timer, | |
1018 | jiffies + MCDI_RPC_TIMEOUT); | |
1019 | } | |
1020 | } else { | |
1021 | kfree(async); | |
1022 | rc = -ENETDOWN; | |
1023 | } | |
1024 | ||
1025 | spin_unlock_bh(&mcdi->async_lock); | |
1026 | ||
1027 | return rc; | |
1028 | } | |
1029 | ||
1e0b8120 EC |
1030 | /** |
1031 | * efx_mcdi_rpc_async - Schedule an MCDI command to run asynchronously | |
1032 | * @efx: NIC through which to issue the command | |
1033 | * @cmd: Command type number | |
1034 | * @inbuf: Command parameters | |
1035 | * @inlen: Length of command parameters, in bytes | |
1036 | * @outlen: Length to allocate for response buffer, in bytes | |
1037 | * @complete: Function to be called on completion or cancellation. | |
1038 | * @cookie: Arbitrary value to be passed to @complete. | |
1039 | * | |
1040 | * This function does not sleep and therefore may be called in atomic | |
1041 | * context. It will fail if event queues are disabled or if MCDI | |
1042 | * event completions have been disabled due to an error. | |
1043 | * | |
1044 | * If it succeeds, the @complete function will be called exactly once | |
1045 | * in atomic context, when one of the following occurs: | |
1046 | * (a) the completion event is received (in NAPI context) | |
1047 | * (b) event queues are disabled (in the process that disables them) | |
1048 | * (c) the request times-out (in timer context) | |
1049 | */ | |
1050 | int | |
1051 | efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd, | |
1052 | const efx_dword_t *inbuf, size_t inlen, size_t outlen, | |
1053 | efx_mcdi_async_completer *complete, unsigned long cookie) | |
1054 | { | |
1055 | return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete, | |
1056 | cookie, false); | |
1057 | } | |
1058 | ||
1059 | int efx_mcdi_rpc_async_quiet(struct efx_nic *efx, unsigned int cmd, | |
1060 | const efx_dword_t *inbuf, size_t inlen, | |
1061 | size_t outlen, efx_mcdi_async_completer *complete, | |
1062 | unsigned long cookie) | |
1063 | { | |
1064 | return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete, | |
1065 | cookie, true); | |
1066 | } | |
1067 | ||
c3cba721 | 1068 | int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen, |
9528b921 BH |
1069 | efx_dword_t *outbuf, size_t outlen, |
1070 | size_t *outlen_actual) | |
c3cba721 | 1071 | { |
1e0b8120 | 1072 | return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen, |
acd43a90 | 1073 | outlen_actual, false, NULL, NULL); |
1e0b8120 | 1074 | } |
5bc283e5 | 1075 | |
1e0b8120 EC |
1076 | int efx_mcdi_rpc_finish_quiet(struct efx_nic *efx, unsigned cmd, size_t inlen, |
1077 | efx_dword_t *outbuf, size_t outlen, | |
1078 | size_t *outlen_actual) | |
1079 | { | |
1080 | return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen, | |
acd43a90 | 1081 | outlen_actual, true, NULL, NULL); |
1e0b8120 | 1082 | } |
3f713bf4 | 1083 | |
1e0b8120 EC |
1084 | void efx_mcdi_display_error(struct efx_nic *efx, unsigned cmd, |
1085 | size_t inlen, efx_dword_t *outbuf, | |
1086 | size_t outlen, int rc) | |
1087 | { | |
1088 | int code = 0, err_arg = 0; | |
afd4aea0 | 1089 | |
1e0b8120 EC |
1090 | if (outlen >= MC_CMD_ERR_CODE_OFST + 4) |
1091 | code = MCDI_DWORD(outbuf, ERR_CODE); | |
1092 | if (outlen >= MC_CMD_ERR_ARG_OFST + 4) | |
1093 | err_arg = MCDI_DWORD(outbuf, ERR_ARG); | |
34e7aefb JC |
1094 | netif_cond_dbg(efx, hw, efx->net_dev, rc == -EPERM, err, |
1095 | "MC command 0x%x inlen %zu failed rc=%d (raw=%d) arg=%d\n", | |
1096 | cmd, inlen, rc, code, err_arg); | |
afd4aea0 BH |
1097 | } |
1098 | ||
cade715f BH |
1099 | /* Switch to polled MCDI completions. This can be called in various |
1100 | * error conditions with various locks held, so it must be lockless. | |
1101 | * Caller is responsible for flushing asynchronous requests later. | |
1102 | */ | |
afd4aea0 BH |
1103 | void efx_mcdi_mode_poll(struct efx_nic *efx) |
1104 | { | |
1105 | struct efx_mcdi_iface *mcdi; | |
1106 | ||
f3ad5003 | 1107 | if (!efx->mcdi) |
afd4aea0 BH |
1108 | return; |
1109 | ||
1110 | mcdi = efx_mcdi(efx); | |
e283546c EC |
1111 | /* If already in polling mode, nothing to do. |
1112 | * If in fail-fast state, don't switch to polled completion. | |
1113 | * FLR recovery will do that later. | |
1114 | */ | |
1115 | if (mcdi->mode == MCDI_MODE_POLL || mcdi->mode == MCDI_MODE_FAIL) | |
afd4aea0 BH |
1116 | return; |
1117 | ||
1118 | /* We can switch from event completion to polled completion, because | |
1119 | * mcdi requests are always completed in shared memory. We do this by | |
1120 | * switching the mode to POLL'd then completing the request. | |
1121 | * efx_mcdi_await_completion() will then call efx_mcdi_poll(). | |
1122 | * | |
1123 | * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(), | |
cade715f | 1124 | * which efx_mcdi_complete_sync() provides for us. |
afd4aea0 BH |
1125 | */ |
1126 | mcdi->mode = MCDI_MODE_POLL; | |
1127 | ||
cade715f BH |
1128 | efx_mcdi_complete_sync(mcdi); |
1129 | } | |
1130 | ||
1131 | /* Flush any running or queued asynchronous requests, after event processing | |
1132 | * is stopped | |
1133 | */ | |
1134 | void efx_mcdi_flush_async(struct efx_nic *efx) | |
1135 | { | |
1136 | struct efx_mcdi_async_param *async, *next; | |
1137 | struct efx_mcdi_iface *mcdi; | |
1138 | ||
1139 | if (!efx->mcdi) | |
1140 | return; | |
1141 | ||
1142 | mcdi = efx_mcdi(efx); | |
1143 | ||
e283546c EC |
1144 | /* We must be in poll or fail mode so no more requests can be queued */ |
1145 | BUG_ON(mcdi->mode == MCDI_MODE_EVENTS); | |
cade715f BH |
1146 | |
1147 | del_timer_sync(&mcdi->async_timer); | |
1148 | ||
1149 | /* If a request is still running, make sure we give the MC | |
1150 | * time to complete it so that the response won't overwrite our | |
1151 | * next request. | |
1152 | */ | |
1153 | if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) { | |
1154 | efx_mcdi_poll(efx); | |
1155 | mcdi->state = MCDI_STATE_QUIESCENT; | |
1156 | } | |
1157 | ||
1158 | /* Nothing else will access the async list now, so it is safe | |
1159 | * to walk it without holding async_lock. If we hold it while | |
1160 | * calling a completer then lockdep may warn that we have | |
1161 | * acquired locks in the wrong order. | |
1162 | */ | |
1163 | list_for_each_entry_safe(async, next, &mcdi->async_list, list) { | |
429baa6f BK |
1164 | if (async->complete) |
1165 | async->complete(efx, async->cookie, -ENETDOWN, NULL, 0); | |
cade715f BH |
1166 | list_del(&async->list); |
1167 | kfree(async); | |
1168 | } | |
afd4aea0 BH |
1169 | } |
1170 | ||
1171 | void efx_mcdi_mode_event(struct efx_nic *efx) | |
1172 | { | |
1173 | struct efx_mcdi_iface *mcdi; | |
1174 | ||
f3ad5003 | 1175 | if (!efx->mcdi) |
afd4aea0 BH |
1176 | return; |
1177 | ||
1178 | mcdi = efx_mcdi(efx); | |
e283546c EC |
1179 | /* If already in event completion mode, nothing to do. |
1180 | * If in fail-fast state, don't switch to event completion. FLR | |
1181 | * recovery will do that later. | |
1182 | */ | |
1183 | if (mcdi->mode == MCDI_MODE_EVENTS || mcdi->mode == MCDI_MODE_FAIL) | |
afd4aea0 BH |
1184 | return; |
1185 | ||
1186 | /* We can't switch from polled to event completion in the middle of a | |
1187 | * request, because the completion method is specified in the request. | |
1188 | * So acquire the interface to serialise the requestors. We don't need | |
1189 | * to acquire the iface_lock to change the mode here, but we do need a | |
1190 | * write memory barrier ensure that efx_mcdi_rpc() sees it, which | |
1191 | * efx_mcdi_acquire() provides. | |
1192 | */ | |
cade715f | 1193 | efx_mcdi_acquire_sync(mcdi); |
afd4aea0 BH |
1194 | mcdi->mode = MCDI_MODE_EVENTS; |
1195 | efx_mcdi_release(mcdi); | |
1196 | } | |
1197 | ||
1198 | static void efx_mcdi_ev_death(struct efx_nic *efx, int rc) | |
1199 | { | |
1200 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
1201 | ||
1202 | /* If there is an outstanding MCDI request, it has been terminated | |
1203 | * either by a BADASSERT or REBOOT event. If the mcdi interface is | |
1204 | * in polled mode, then do nothing because the MC reboot handler will | |
1205 | * set the header correctly. However, if the mcdi interface is waiting | |
1206 | * for a CMDDONE event it won't receive it [and since all MCDI events | |
1207 | * are sent to the same queue, we can't be racing with | |
1208 | * efx_mcdi_ev_cpl()] | |
1209 | * | |
cade715f BH |
1210 | * If there is an outstanding asynchronous request, we can't |
1211 | * complete it now (efx_mcdi_complete() would deadlock). The | |
1212 | * reset process will take care of this. | |
1213 | * | |
1214 | * There's a race here with efx_mcdi_send_request(), because | |
1215 | * we might receive a REBOOT event *before* the request has | |
1216 | * been copied out. In polled mode (during startup) this is | |
1217 | * irrelevant, because efx_mcdi_complete_sync() is ignored. In | |
1218 | * event mode, this condition is just an edge-case of | |
1219 | * receiving a REBOOT event after posting the MCDI | |
1220 | * request. Did the mc reboot before or after the copyout? The | |
1221 | * best we can do always is just return failure. | |
acd43a90 BK |
1222 | * |
1223 | * If there is an outstanding proxy response expected it is not going | |
1224 | * to arrive. We should thus abort it. | |
afd4aea0 BH |
1225 | */ |
1226 | spin_lock(&mcdi->iface_lock); | |
acd43a90 BK |
1227 | efx_mcdi_proxy_abort(mcdi); |
1228 | ||
cade715f | 1229 | if (efx_mcdi_complete_sync(mcdi)) { |
afd4aea0 BH |
1230 | if (mcdi->mode == MCDI_MODE_EVENTS) { |
1231 | mcdi->resprc = rc; | |
df2cd8af BH |
1232 | mcdi->resp_hdr_len = 0; |
1233 | mcdi->resp_data_len = 0; | |
18e3ee2c | 1234 | ++mcdi->credits; |
afd4aea0 | 1235 | } |
3f713bf4 BH |
1236 | } else { |
1237 | int count; | |
1238 | ||
3f713bf4 BH |
1239 | /* Consume the status word since efx_mcdi_rpc_finish() won't */ |
1240 | for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) { | |
c577e59e DP |
1241 | rc = efx_mcdi_poll_reboot(efx); |
1242 | if (rc) | |
3f713bf4 BH |
1243 | break; |
1244 | udelay(MCDI_STATUS_DELAY_US); | |
1245 | } | |
c577e59e DP |
1246 | |
1247 | /* On EF10, a CODE_MC_REBOOT event can be received without the | |
1248 | * reboot detection in efx_mcdi_poll_reboot() being triggered. | |
1249 | * If zero was returned from the final call to | |
1250 | * efx_mcdi_poll_reboot(), the MC reboot wasn't noticed but the | |
1251 | * MC has definitely rebooted so prepare for the reset. | |
1252 | */ | |
1253 | if (!rc && efx->type->mcdi_reboot_detected) | |
1254 | efx->type->mcdi_reboot_detected(efx); | |
1255 | ||
d36a08b4 | 1256 | mcdi->new_epoch = true; |
dfdaa95c DP |
1257 | |
1258 | /* Nobody was waiting for an MCDI request, so trigger a reset */ | |
1259 | efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE); | |
3f713bf4 BH |
1260 | } |
1261 | ||
afd4aea0 BH |
1262 | spin_unlock(&mcdi->iface_lock); |
1263 | } | |
1264 | ||
74cd60a4 JC |
1265 | /* The MC is going down in to BIST mode. set the BIST flag to block |
1266 | * new MCDI, cancel any outstanding MCDI and and schedule a BIST-type reset | |
1267 | * (which doesn't actually execute a reset, it waits for the controlling | |
1268 | * function to reset it). | |
1269 | */ | |
1270 | static void efx_mcdi_ev_bist(struct efx_nic *efx) | |
1271 | { | |
1272 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
1273 | ||
1274 | spin_lock(&mcdi->iface_lock); | |
1275 | efx->mc_bist_for_other_fn = true; | |
acd43a90 BK |
1276 | efx_mcdi_proxy_abort(mcdi); |
1277 | ||
74cd60a4 JC |
1278 | if (efx_mcdi_complete_sync(mcdi)) { |
1279 | if (mcdi->mode == MCDI_MODE_EVENTS) { | |
1280 | mcdi->resprc = -EIO; | |
1281 | mcdi->resp_hdr_len = 0; | |
1282 | mcdi->resp_data_len = 0; | |
1283 | ++mcdi->credits; | |
1284 | } | |
1285 | } | |
1286 | mcdi->new_epoch = true; | |
1287 | efx_schedule_reset(efx, RESET_TYPE_MC_BIST); | |
1288 | spin_unlock(&mcdi->iface_lock); | |
1289 | } | |
1290 | ||
e283546c EC |
1291 | /* MCDI timeouts seen, so make all MCDI calls fail-fast and issue an FLR to try |
1292 | * to recover. | |
1293 | */ | |
1294 | static void efx_mcdi_abandon(struct efx_nic *efx) | |
1295 | { | |
1296 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
1297 | ||
1298 | if (xchg(&mcdi->mode, MCDI_MODE_FAIL) == MCDI_MODE_FAIL) | |
1299 | return; /* it had already been done */ | |
1300 | netif_dbg(efx, hw, efx->net_dev, "MCDI is timing out; trying to recover\n"); | |
1301 | efx_schedule_reset(efx, RESET_TYPE_MCDI_TIMEOUT); | |
1302 | } | |
1303 | ||
53172d9b | 1304 | /* Called from efx_farch_ev_process and efx_ef10_ev_process for MCDI events */ |
afd4aea0 BH |
1305 | void efx_mcdi_process_event(struct efx_channel *channel, |
1306 | efx_qword_t *event) | |
1307 | { | |
1308 | struct efx_nic *efx = channel->efx; | |
1309 | int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE); | |
1310 | u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA); | |
1311 | ||
1312 | switch (code) { | |
1313 | case MCDI_EVENT_CODE_BADSSERT: | |
62776d03 BH |
1314 | netif_err(efx, hw, efx->net_dev, |
1315 | "MC watchdog or assertion failure at 0x%x\n", data); | |
5bc283e5 | 1316 | efx_mcdi_ev_death(efx, -EINTR); |
afd4aea0 BH |
1317 | break; |
1318 | ||
1319 | case MCDI_EVENT_CODE_PMNOTICE: | |
62776d03 | 1320 | netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n"); |
afd4aea0 BH |
1321 | break; |
1322 | ||
1323 | case MCDI_EVENT_CODE_CMDDONE: | |
1324 | efx_mcdi_ev_cpl(efx, | |
1325 | MCDI_EVENT_FIELD(*event, CMDDONE_SEQ), | |
1326 | MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN), | |
1327 | MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO)); | |
1328 | break; | |
1329 | ||
1330 | case MCDI_EVENT_CODE_LINKCHANGE: | |
1331 | efx_mcdi_process_link_change(efx, event); | |
1332 | break; | |
1333 | case MCDI_EVENT_CODE_SENSOREVT: | |
1334 | efx_mcdi_sensor_event(efx, event); | |
1335 | break; | |
1336 | case MCDI_EVENT_CODE_SCHEDERR: | |
2d9955be RS |
1337 | netif_dbg(efx, hw, efx->net_dev, |
1338 | "MC Scheduler alert (0x%x)\n", data); | |
afd4aea0 BH |
1339 | break; |
1340 | case MCDI_EVENT_CODE_REBOOT: | |
8127d661 | 1341 | case MCDI_EVENT_CODE_MC_REBOOT: |
62776d03 | 1342 | netif_info(efx, hw, efx->net_dev, "MC Reboot\n"); |
5bc283e5 | 1343 | efx_mcdi_ev_death(efx, -EIO); |
afd4aea0 | 1344 | break; |
74cd60a4 JC |
1345 | case MCDI_EVENT_CODE_MC_BIST: |
1346 | netif_info(efx, hw, efx->net_dev, "MC entered BIST mode\n"); | |
1347 | efx_mcdi_ev_bist(efx); | |
1348 | break; | |
afd4aea0 BH |
1349 | case MCDI_EVENT_CODE_MAC_STATS_DMA: |
1350 | /* MAC stats are gather lazily. We can ignore this. */ | |
1351 | break; | |
cd2d5b52 | 1352 | case MCDI_EVENT_CODE_FLR: |
7fa8d547 SS |
1353 | if (efx->type->sriov_flr) |
1354 | efx->type->sriov_flr(efx, | |
1355 | MCDI_EVENT_FIELD(*event, FLR_VF)); | |
cd2d5b52 | 1356 | break; |
7c236c43 SH |
1357 | case MCDI_EVENT_CODE_PTP_RX: |
1358 | case MCDI_EVENT_CODE_PTP_FAULT: | |
1359 | case MCDI_EVENT_CODE_PTP_PPS: | |
1360 | efx_ptp_event(efx, event); | |
1361 | break; | |
bd9a265d JC |
1362 | case MCDI_EVENT_CODE_PTP_TIME: |
1363 | efx_time_sync_event(channel, event); | |
1364 | break; | |
8127d661 BH |
1365 | case MCDI_EVENT_CODE_TX_FLUSH: |
1366 | case MCDI_EVENT_CODE_RX_FLUSH: | |
1367 | /* Two flush events will be sent: one to the same event | |
1368 | * queue as completions, and one to event queue 0. | |
1369 | * In the latter case the {RX,TX}_FLUSH_TO_DRIVER | |
1370 | * flag will be set, and we should ignore the event | |
1371 | * because we want to wait for all completions. | |
1372 | */ | |
1373 | BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN != | |
1374 | MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN); | |
1375 | if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER)) | |
1376 | efx_ef10_handle_drain_event(efx); | |
1377 | break; | |
3de82b91 AR |
1378 | case MCDI_EVENT_CODE_TX_ERR: |
1379 | case MCDI_EVENT_CODE_RX_ERR: | |
1380 | netif_err(efx, hw, efx->net_dev, | |
1381 | "%s DMA error (event: "EFX_QWORD_FMT")\n", | |
1382 | code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX", | |
1383 | EFX_QWORD_VAL(*event)); | |
1384 | efx_schedule_reset(efx, RESET_TYPE_DMA_ERROR); | |
1385 | break; | |
acd43a90 BK |
1386 | case MCDI_EVENT_CODE_PROXY_RESPONSE: |
1387 | efx_mcdi_ev_proxy_response(efx, | |
1388 | MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_HANDLE), | |
1389 | MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_RC)); | |
1390 | break; | |
afd4aea0 | 1391 | default: |
4e2e347b JC |
1392 | netif_err(efx, hw, efx->net_dev, |
1393 | "Unknown MCDI event " EFX_QWORD_FMT "\n", | |
1394 | EFX_QWORD_VAL(*event)); | |
afd4aea0 BH |
1395 | } |
1396 | } | |
1397 | ||
1398 | /************************************************************************** | |
1399 | * | |
1400 | * Specific request functions | |
1401 | * | |
1402 | ************************************************************************** | |
1403 | */ | |
1404 | ||
e5f0fd27 | 1405 | void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len) |
afd4aea0 | 1406 | { |
8d9f9dd4 | 1407 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_VERSION_OUT_LEN); |
afd4aea0 BH |
1408 | size_t outlength; |
1409 | const __le16 *ver_words; | |
8127d661 | 1410 | size_t offset; |
afd4aea0 BH |
1411 | int rc; |
1412 | ||
1413 | BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0); | |
afd4aea0 BH |
1414 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0, |
1415 | outbuf, sizeof(outbuf), &outlength); | |
1416 | if (rc) | |
1417 | goto fail; | |
05a9320f | 1418 | if (outlength < MC_CMD_GET_VERSION_OUT_LEN) { |
00bbb4a5 | 1419 | rc = -EIO; |
afd4aea0 BH |
1420 | goto fail; |
1421 | } | |
1422 | ||
1423 | ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION); | |
8127d661 BH |
1424 | offset = snprintf(buf, len, "%u.%u.%u.%u", |
1425 | le16_to_cpu(ver_words[0]), le16_to_cpu(ver_words[1]), | |
1426 | le16_to_cpu(ver_words[2]), le16_to_cpu(ver_words[3])); | |
1427 | ||
1428 | /* EF10 may have multiple datapath firmware variants within a | |
1429 | * single version. Report which variants are running. | |
1430 | */ | |
1431 | if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) { | |
8d9f9dd4 DP |
1432 | struct efx_ef10_nic_data *nic_data = efx->nic_data; |
1433 | ||
1434 | offset += snprintf(buf + offset, len - offset, " rx%x tx%x", | |
1435 | nic_data->rx_dpcpu_fw_id, | |
1436 | nic_data->tx_dpcpu_fw_id); | |
8127d661 BH |
1437 | |
1438 | /* It's theoretically possible for the string to exceed 31 | |
1439 | * characters, though in practice the first three version | |
1440 | * components are short enough that this doesn't happen. | |
1441 | */ | |
1442 | if (WARN_ON(offset >= len)) | |
1443 | buf[0] = 0; | |
1444 | } | |
1445 | ||
e5f0fd27 | 1446 | return; |
afd4aea0 BH |
1447 | |
1448 | fail: | |
62776d03 | 1449 | netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
e5f0fd27 | 1450 | buf[0] = 0; |
afd4aea0 BH |
1451 | } |
1452 | ||
4c75b43a BH |
1453 | static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating, |
1454 | bool *was_attached) | |
afd4aea0 | 1455 | { |
59cfc479 | 1456 | MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN); |
ecb1c9cc | 1457 | MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN); |
afd4aea0 BH |
1458 | size_t outlen; |
1459 | int rc; | |
1460 | ||
1461 | MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE, | |
1462 | driver_operating ? 1 : 0); | |
1463 | MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1); | |
f2b0befd | 1464 | MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY); |
afd4aea0 | 1465 | |
267d9d73 EC |
1466 | rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf), |
1467 | outbuf, sizeof(outbuf), &outlen); | |
1468 | /* If we're not the primary PF, trying to ATTACH with a FIRMWARE_ID | |
1469 | * specified will fail with EPERM, and we have to tell the MC we don't | |
1470 | * care what firmware we get. | |
1471 | */ | |
1472 | if (rc == -EPERM) { | |
1473 | netif_dbg(efx, probe, efx->net_dev, | |
1474 | "efx_mcdi_drv_attach with fw-variant setting failed EPERM, trying without it\n"); | |
1475 | MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, | |
1476 | MC_CMD_FW_DONT_CARE); | |
1477 | rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf, | |
1478 | sizeof(inbuf), outbuf, sizeof(outbuf), | |
1479 | &outlen); | |
1480 | } | |
1481 | if (rc) { | |
1482 | efx_mcdi_display_error(efx, MC_CMD_DRV_ATTACH, sizeof(inbuf), | |
1483 | outbuf, outlen, rc); | |
afd4aea0 | 1484 | goto fail; |
267d9d73 | 1485 | } |
00bbb4a5 BH |
1486 | if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) { |
1487 | rc = -EIO; | |
afd4aea0 | 1488 | goto fail; |
00bbb4a5 | 1489 | } |
afd4aea0 | 1490 | |
8349f7f6 BH |
1491 | if (driver_operating) { |
1492 | if (outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN) { | |
1493 | efx->mcdi->fn_flags = | |
1494 | MCDI_DWORD(outbuf, | |
1495 | DRV_ATTACH_EXT_OUT_FUNC_FLAGS); | |
1496 | } else { | |
1497 | /* Synthesise flags for Siena */ | |
1498 | efx->mcdi->fn_flags = | |
1499 | 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL | | |
1500 | 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED | | |
1501 | (efx_port_num(efx) == 0) << | |
1502 | MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY; | |
1503 | } | |
1504 | } | |
1505 | ||
ecb1c9cc BH |
1506 | /* We currently assume we have control of the external link |
1507 | * and are completely trusted by firmware. Abort probing | |
1508 | * if that's not true for this function. | |
1509 | */ | |
ecb1c9cc | 1510 | |
afd4aea0 BH |
1511 | if (was_attached != NULL) |
1512 | *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE); | |
1513 | return 0; | |
1514 | ||
1515 | fail: | |
62776d03 | 1516 | netif_err(efx, probe, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
afd4aea0 BH |
1517 | return rc; |
1518 | } | |
1519 | ||
1520 | int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address, | |
6aa9c7f6 | 1521 | u16 *fw_subtype_list, u32 *capabilities) |
afd4aea0 | 1522 | { |
59cfc479 | 1523 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX); |
c5bb0e98 | 1524 | size_t outlen, i; |
afd4aea0 | 1525 | int port_num = efx_port_num(efx); |
afd4aea0 BH |
1526 | int rc; |
1527 | ||
1528 | BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0); | |
cd84ff4d EC |
1529 | /* we need __aligned(2) for ether_addr_copy */ |
1530 | BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST & 1); | |
1531 | BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST & 1); | |
afd4aea0 BH |
1532 | |
1533 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0, | |
1534 | outbuf, sizeof(outbuf), &outlen); | |
1535 | if (rc) | |
1536 | goto fail; | |
1537 | ||
05a9320f | 1538 | if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) { |
00bbb4a5 | 1539 | rc = -EIO; |
afd4aea0 BH |
1540 | goto fail; |
1541 | } | |
1542 | ||
afd4aea0 | 1543 | if (mac_address) |
cd84ff4d EC |
1544 | ether_addr_copy(mac_address, |
1545 | port_num ? | |
1546 | MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) : | |
1547 | MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0)); | |
bfeed902 | 1548 | if (fw_subtype_list) { |
bfeed902 | 1549 | for (i = 0; |
c5bb0e98 BH |
1550 | i < MCDI_VAR_ARRAY_LEN(outlen, |
1551 | GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST); | |
1552 | i++) | |
1553 | fw_subtype_list[i] = MCDI_ARRAY_WORD( | |
1554 | outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i); | |
1555 | for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++) | |
1556 | fw_subtype_list[i] = 0; | |
bfeed902 | 1557 | } |
6aa9c7f6 MS |
1558 | if (capabilities) { |
1559 | if (port_num) | |
1560 | *capabilities = MCDI_DWORD(outbuf, | |
1561 | GET_BOARD_CFG_OUT_CAPABILITIES_PORT1); | |
1562 | else | |
1563 | *capabilities = MCDI_DWORD(outbuf, | |
1564 | GET_BOARD_CFG_OUT_CAPABILITIES_PORT0); | |
1565 | } | |
afd4aea0 BH |
1566 | |
1567 | return 0; | |
1568 | ||
1569 | fail: | |
62776d03 BH |
1570 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n", |
1571 | __func__, rc, (int)outlen); | |
afd4aea0 BH |
1572 | |
1573 | return rc; | |
1574 | } | |
1575 | ||
1576 | int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq) | |
1577 | { | |
59cfc479 | 1578 | MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN); |
afd4aea0 BH |
1579 | u32 dest = 0; |
1580 | int rc; | |
1581 | ||
1582 | if (uart) | |
1583 | dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART; | |
1584 | if (evq) | |
1585 | dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ; | |
1586 | ||
1587 | MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest); | |
1588 | MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq); | |
1589 | ||
1590 | BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0); | |
1591 | ||
1592 | rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf), | |
1593 | NULL, 0, NULL); | |
afd4aea0 BH |
1594 | return rc; |
1595 | } | |
1596 | ||
1597 | int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out) | |
1598 | { | |
59cfc479 | 1599 | MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN); |
afd4aea0 BH |
1600 | size_t outlen; |
1601 | int rc; | |
1602 | ||
1603 | BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0); | |
1604 | ||
1605 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0, | |
1606 | outbuf, sizeof(outbuf), &outlen); | |
1607 | if (rc) | |
1608 | goto fail; | |
00bbb4a5 BH |
1609 | if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) { |
1610 | rc = -EIO; | |
afd4aea0 | 1611 | goto fail; |
00bbb4a5 | 1612 | } |
afd4aea0 BH |
1613 | |
1614 | *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES); | |
1615 | return 0; | |
1616 | ||
1617 | fail: | |
62776d03 BH |
1618 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", |
1619 | __func__, rc); | |
afd4aea0 BH |
1620 | return rc; |
1621 | } | |
1622 | ||
1623 | int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type, | |
1624 | size_t *size_out, size_t *erase_size_out, | |
1625 | bool *protected_out) | |
1626 | { | |
59cfc479 BH |
1627 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN); |
1628 | MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_OUT_LEN); | |
afd4aea0 BH |
1629 | size_t outlen; |
1630 | int rc; | |
1631 | ||
1632 | MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type); | |
1633 | ||
1634 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf), | |
1635 | outbuf, sizeof(outbuf), &outlen); | |
1636 | if (rc) | |
1637 | goto fail; | |
00bbb4a5 BH |
1638 | if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) { |
1639 | rc = -EIO; | |
afd4aea0 | 1640 | goto fail; |
00bbb4a5 | 1641 | } |
afd4aea0 BH |
1642 | |
1643 | *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE); | |
1644 | *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE); | |
1645 | *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) & | |
05a9320f | 1646 | (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN)); |
afd4aea0 BH |
1647 | return 0; |
1648 | ||
1649 | fail: | |
62776d03 | 1650 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
afd4aea0 BH |
1651 | return rc; |
1652 | } | |
1653 | ||
2e803407 BH |
1654 | static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type) |
1655 | { | |
59cfc479 BH |
1656 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN); |
1657 | MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN); | |
2e803407 BH |
1658 | int rc; |
1659 | ||
1660 | MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type); | |
1661 | ||
1662 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf), | |
1663 | outbuf, sizeof(outbuf), NULL); | |
1664 | if (rc) | |
1665 | return rc; | |
1666 | ||
1667 | switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) { | |
1668 | case MC_CMD_NVRAM_TEST_PASS: | |
1669 | case MC_CMD_NVRAM_TEST_NOTSUPP: | |
1670 | return 0; | |
1671 | default: | |
1672 | return -EIO; | |
1673 | } | |
1674 | } | |
1675 | ||
1676 | int efx_mcdi_nvram_test_all(struct efx_nic *efx) | |
1677 | { | |
1678 | u32 nvram_types; | |
1679 | unsigned int type; | |
1680 | int rc; | |
1681 | ||
1682 | rc = efx_mcdi_nvram_types(efx, &nvram_types); | |
1683 | if (rc) | |
b548a988 | 1684 | goto fail1; |
2e803407 BH |
1685 | |
1686 | type = 0; | |
1687 | while (nvram_types != 0) { | |
1688 | if (nvram_types & 1) { | |
1689 | rc = efx_mcdi_nvram_test(efx, type); | |
1690 | if (rc) | |
b548a988 | 1691 | goto fail2; |
2e803407 BH |
1692 | } |
1693 | type++; | |
1694 | nvram_types >>= 1; | |
1695 | } | |
1696 | ||
1697 | return 0; | |
b548a988 BH |
1698 | |
1699 | fail2: | |
62776d03 BH |
1700 | netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n", |
1701 | __func__, type); | |
b548a988 | 1702 | fail1: |
62776d03 | 1703 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
b548a988 | 1704 | return rc; |
2e803407 BH |
1705 | } |
1706 | ||
267d9d73 EC |
1707 | /* Returns 1 if an assertion was read, 0 if no assertion had fired, |
1708 | * negative on error. | |
1709 | */ | |
8b2103ad | 1710 | static int efx_mcdi_read_assertion(struct efx_nic *efx) |
afd4aea0 | 1711 | { |
59cfc479 | 1712 | MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN); |
aa09a3da | 1713 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN); |
c5bb0e98 | 1714 | unsigned int flags, index; |
afd4aea0 BH |
1715 | const char *reason; |
1716 | size_t outlen; | |
1717 | int retry; | |
1718 | int rc; | |
1719 | ||
8b2103ad SH |
1720 | /* Attempt to read any stored assertion state before we reboot |
1721 | * the mcfw out of the assertion handler. Retry twice, once | |
afd4aea0 BH |
1722 | * because a boot-time assertion might cause this command to fail |
1723 | * with EINTR. And once again because GET_ASSERTS can race with | |
1724 | * MC_CMD_REBOOT running on the other port. */ | |
1725 | retry = 2; | |
1726 | do { | |
8b2103ad | 1727 | MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1); |
1e0b8120 EC |
1728 | rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_ASSERTS, |
1729 | inbuf, MC_CMD_GET_ASSERTS_IN_LEN, | |
1730 | outbuf, sizeof(outbuf), &outlen); | |
267d9d73 EC |
1731 | if (rc == -EPERM) |
1732 | return 0; | |
afd4aea0 BH |
1733 | } while ((rc == -EINTR || rc == -EIO) && retry-- > 0); |
1734 | ||
1e0b8120 EC |
1735 | if (rc) { |
1736 | efx_mcdi_display_error(efx, MC_CMD_GET_ASSERTS, | |
1737 | MC_CMD_GET_ASSERTS_IN_LEN, outbuf, | |
1738 | outlen, rc); | |
afd4aea0 | 1739 | return rc; |
1e0b8120 | 1740 | } |
afd4aea0 | 1741 | if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN) |
00bbb4a5 | 1742 | return -EIO; |
afd4aea0 | 1743 | |
8b2103ad SH |
1744 | /* Print out any recorded assertion state */ |
1745 | flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS); | |
afd4aea0 BH |
1746 | if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS) |
1747 | return 0; | |
1748 | ||
afd4aea0 BH |
1749 | reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL) |
1750 | ? "system-level assertion" | |
1751 | : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL) | |
1752 | ? "thread-level assertion" | |
1753 | : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED) | |
1754 | ? "watchdog reset" | |
1755 | : "unknown assertion"; | |
62776d03 BH |
1756 | netif_err(efx, hw, efx->net_dev, |
1757 | "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason, | |
1758 | MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS), | |
1759 | MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS)); | |
afd4aea0 BH |
1760 | |
1761 | /* Print out the registers */ | |
c5bb0e98 BH |
1762 | for (index = 0; |
1763 | index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM; | |
1764 | index++) | |
1765 | netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n", | |
1766 | 1 + index, | |
1767 | MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS, | |
1768 | index)); | |
afd4aea0 | 1769 | |
267d9d73 | 1770 | return 1; |
afd4aea0 BH |
1771 | } |
1772 | ||
267d9d73 | 1773 | static int efx_mcdi_exit_assertion(struct efx_nic *efx) |
8b2103ad | 1774 | { |
59cfc479 | 1775 | MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN); |
267d9d73 | 1776 | int rc; |
8b2103ad | 1777 | |
0f1e54ae BH |
1778 | /* If the MC is running debug firmware, it might now be |
1779 | * waiting for a debugger to attach, but we just want it to | |
1780 | * reboot. We set a flag that makes the command a no-op if it | |
267d9d73 EC |
1781 | * has already done so. |
1782 | * The MCDI will thus return either 0 or -EIO. | |
0f1e54ae | 1783 | */ |
8b2103ad SH |
1784 | BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0); |
1785 | MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, | |
1786 | MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION); | |
267d9d73 EC |
1787 | rc = efx_mcdi_rpc_quiet(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN, |
1788 | NULL, 0, NULL); | |
1789 | if (rc == -EIO) | |
1790 | rc = 0; | |
1791 | if (rc) | |
1792 | efx_mcdi_display_error(efx, MC_CMD_REBOOT, MC_CMD_REBOOT_IN_LEN, | |
1793 | NULL, 0, rc); | |
1794 | return rc; | |
8b2103ad SH |
1795 | } |
1796 | ||
1797 | int efx_mcdi_handle_assertion(struct efx_nic *efx) | |
1798 | { | |
1799 | int rc; | |
1800 | ||
1801 | rc = efx_mcdi_read_assertion(efx); | |
267d9d73 | 1802 | if (rc <= 0) |
8b2103ad SH |
1803 | return rc; |
1804 | ||
267d9d73 | 1805 | return efx_mcdi_exit_assertion(efx); |
8b2103ad SH |
1806 | } |
1807 | ||
afd4aea0 BH |
1808 | void efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode) |
1809 | { | |
59cfc479 | 1810 | MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN); |
afd4aea0 BH |
1811 | int rc; |
1812 | ||
1813 | BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF); | |
1814 | BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON); | |
1815 | BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT); | |
1816 | ||
1817 | BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0); | |
1818 | ||
1819 | MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode); | |
1820 | ||
1821 | rc = efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf), | |
1822 | NULL, 0, NULL); | |
afd4aea0 BH |
1823 | } |
1824 | ||
3e336261 | 1825 | static int efx_mcdi_reset_func(struct efx_nic *efx) |
afd4aea0 | 1826 | { |
3e336261 JC |
1827 | MCDI_DECLARE_BUF(inbuf, MC_CMD_ENTITY_RESET_IN_LEN); |
1828 | int rc; | |
1829 | ||
1830 | BUILD_BUG_ON(MC_CMD_ENTITY_RESET_OUT_LEN != 0); | |
1831 | MCDI_POPULATE_DWORD_1(inbuf, ENTITY_RESET_IN_FLAG, | |
1832 | ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET, 1); | |
1833 | rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, inbuf, sizeof(inbuf), | |
1834 | NULL, 0, NULL); | |
1835 | return rc; | |
afd4aea0 BH |
1836 | } |
1837 | ||
6bff861d | 1838 | static int efx_mcdi_reset_mc(struct efx_nic *efx) |
afd4aea0 | 1839 | { |
59cfc479 | 1840 | MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN); |
afd4aea0 BH |
1841 | int rc; |
1842 | ||
1843 | BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0); | |
1844 | MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0); | |
1845 | rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf), | |
1846 | NULL, 0, NULL); | |
1847 | /* White is black, and up is down */ | |
1848 | if (rc == -EIO) | |
1849 | return 0; | |
1850 | if (rc == 0) | |
1851 | rc = -EIO; | |
afd4aea0 BH |
1852 | return rc; |
1853 | } | |
1854 | ||
6bff861d BH |
1855 | enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason) |
1856 | { | |
1857 | return RESET_TYPE_RECOVER_OR_ALL; | |
1858 | } | |
1859 | ||
1860 | int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method) | |
1861 | { | |
1862 | int rc; | |
1863 | ||
e283546c EC |
1864 | /* If MCDI is down, we can't handle_assertion */ |
1865 | if (method == RESET_TYPE_MCDI_TIMEOUT) { | |
1866 | rc = pci_reset_function(efx->pci_dev); | |
1867 | if (rc) | |
1868 | return rc; | |
1869 | /* Re-enable polled MCDI completion */ | |
1870 | if (efx->mcdi) { | |
1871 | struct efx_mcdi_iface *mcdi = efx_mcdi(efx); | |
1872 | mcdi->mode = MCDI_MODE_POLL; | |
1873 | } | |
1874 | return 0; | |
1875 | } | |
1876 | ||
6bff861d BH |
1877 | /* Recover from a failed assertion pre-reset */ |
1878 | rc = efx_mcdi_handle_assertion(efx); | |
1879 | if (rc) | |
1880 | return rc; | |
1881 | ||
087e9025 JC |
1882 | if (method == RESET_TYPE_DATAPATH) |
1883 | return 0; | |
1884 | else if (method == RESET_TYPE_WORLD) | |
6bff861d BH |
1885 | return efx_mcdi_reset_mc(efx); |
1886 | else | |
3e336261 | 1887 | return efx_mcdi_reset_func(efx); |
6bff861d BH |
1888 | } |
1889 | ||
d215697f | 1890 | static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type, |
1891 | const u8 *mac, int *id_out) | |
afd4aea0 | 1892 | { |
59cfc479 BH |
1893 | MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN); |
1894 | MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN); | |
afd4aea0 BH |
1895 | size_t outlen; |
1896 | int rc; | |
1897 | ||
1898 | MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type); | |
1899 | MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE, | |
1900 | MC_CMD_FILTER_MODE_SIMPLE); | |
cd84ff4d | 1901 | ether_addr_copy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac); |
afd4aea0 BH |
1902 | |
1903 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf), | |
1904 | outbuf, sizeof(outbuf), &outlen); | |
1905 | if (rc) | |
1906 | goto fail; | |
1907 | ||
1908 | if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) { | |
00bbb4a5 | 1909 | rc = -EIO; |
afd4aea0 BH |
1910 | goto fail; |
1911 | } | |
1912 | ||
1913 | *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID); | |
1914 | ||
1915 | return 0; | |
1916 | ||
1917 | fail: | |
1918 | *id_out = -1; | |
62776d03 | 1919 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
afd4aea0 BH |
1920 | return rc; |
1921 | ||
1922 | } | |
1923 | ||
1924 | ||
1925 | int | |
1926 | efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out) | |
1927 | { | |
1928 | return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out); | |
1929 | } | |
1930 | ||
1931 | ||
1932 | int efx_mcdi_wol_filter_get_magic(struct efx_nic *efx, int *id_out) | |
1933 | { | |
59cfc479 | 1934 | MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_GET_OUT_LEN); |
afd4aea0 BH |
1935 | size_t outlen; |
1936 | int rc; | |
1937 | ||
1938 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_GET, NULL, 0, | |
1939 | outbuf, sizeof(outbuf), &outlen); | |
1940 | if (rc) | |
1941 | goto fail; | |
1942 | ||
1943 | if (outlen < MC_CMD_WOL_FILTER_GET_OUT_LEN) { | |
00bbb4a5 | 1944 | rc = -EIO; |
afd4aea0 BH |
1945 | goto fail; |
1946 | } | |
1947 | ||
1948 | *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_GET_OUT_FILTER_ID); | |
1949 | ||
1950 | return 0; | |
1951 | ||
1952 | fail: | |
1953 | *id_out = -1; | |
62776d03 | 1954 | netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc); |
afd4aea0 BH |
1955 | return rc; |
1956 | } | |
1957 | ||
1958 | ||
1959 | int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id) | |
1960 | { | |
59cfc479 | 1961 | MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN); |
afd4aea0 BH |
1962 | int rc; |
1963 | ||
1964 | MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id); | |
1965 | ||
1966 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf), | |
1967 | NULL, 0, NULL); | |
afd4aea0 BH |
1968 | return rc; |
1969 | } | |
1970 | ||
cd2d5b52 BH |
1971 | int efx_mcdi_flush_rxqs(struct efx_nic *efx) |
1972 | { | |
1973 | struct efx_channel *channel; | |
1974 | struct efx_rx_queue *rx_queue; | |
c5bb0e98 BH |
1975 | MCDI_DECLARE_BUF(inbuf, |
1976 | MC_CMD_FLUSH_RX_QUEUES_IN_LEN(EFX_MAX_CHANNELS)); | |
cd2d5b52 BH |
1977 | int rc, count; |
1978 | ||
45078374 BH |
1979 | BUILD_BUG_ON(EFX_MAX_CHANNELS > |
1980 | MC_CMD_FLUSH_RX_QUEUES_IN_QID_OFST_MAXNUM); | |
1981 | ||
cd2d5b52 BH |
1982 | count = 0; |
1983 | efx_for_each_channel(channel, efx) { | |
1984 | efx_for_each_channel_rx_queue(rx_queue, channel) { | |
1985 | if (rx_queue->flush_pending) { | |
1986 | rx_queue->flush_pending = false; | |
1987 | atomic_dec(&efx->rxq_flush_pending); | |
c5bb0e98 BH |
1988 | MCDI_SET_ARRAY_DWORD( |
1989 | inbuf, FLUSH_RX_QUEUES_IN_QID_OFST, | |
1990 | count, efx_rx_queue_index(rx_queue)); | |
1991 | count++; | |
cd2d5b52 BH |
1992 | } |
1993 | } | |
1994 | } | |
1995 | ||
c5bb0e98 BH |
1996 | rc = efx_mcdi_rpc(efx, MC_CMD_FLUSH_RX_QUEUES, inbuf, |
1997 | MC_CMD_FLUSH_RX_QUEUES_IN_LEN(count), NULL, 0, NULL); | |
bbec969b | 1998 | WARN_ON(rc < 0); |
cd2d5b52 | 1999 | |
cd2d5b52 BH |
2000 | return rc; |
2001 | } | |
afd4aea0 BH |
2002 | |
2003 | int efx_mcdi_wol_filter_reset(struct efx_nic *efx) | |
2004 | { | |
2005 | int rc; | |
2006 | ||
2007 | rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL); | |
afd4aea0 BH |
2008 | return rc; |
2009 | } | |
2010 | ||
34ccfe6f DP |
2011 | int efx_mcdi_set_workaround(struct efx_nic *efx, u32 type, bool enabled, |
2012 | unsigned int *flags) | |
8127d661 BH |
2013 | { |
2014 | MCDI_DECLARE_BUF(inbuf, MC_CMD_WORKAROUND_IN_LEN); | |
34ccfe6f DP |
2015 | MCDI_DECLARE_BUF(outbuf, MC_CMD_WORKAROUND_EXT_OUT_LEN); |
2016 | size_t outlen; | |
2017 | int rc; | |
8127d661 BH |
2018 | |
2019 | BUILD_BUG_ON(MC_CMD_WORKAROUND_OUT_LEN != 0); | |
2020 | MCDI_SET_DWORD(inbuf, WORKAROUND_IN_TYPE, type); | |
2021 | MCDI_SET_DWORD(inbuf, WORKAROUND_IN_ENABLED, enabled); | |
34ccfe6f DP |
2022 | rc = efx_mcdi_rpc(efx, MC_CMD_WORKAROUND, inbuf, sizeof(inbuf), |
2023 | outbuf, sizeof(outbuf), &outlen); | |
2024 | if (rc) | |
2025 | return rc; | |
2026 | ||
2027 | if (!flags) | |
2028 | return 0; | |
2029 | ||
2030 | if (outlen >= MC_CMD_WORKAROUND_EXT_OUT_LEN) | |
2031 | *flags = MCDI_DWORD(outbuf, WORKAROUND_EXT_OUT_FLAGS); | |
2032 | else | |
2033 | *flags = 0; | |
2034 | ||
2035 | return 0; | |
8127d661 BH |
2036 | } |
2037 | ||
267d9d73 EC |
2038 | int efx_mcdi_get_workarounds(struct efx_nic *efx, unsigned int *impl_out, |
2039 | unsigned int *enabled_out) | |
2040 | { | |
aa09a3da | 2041 | MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_WORKAROUNDS_OUT_LEN); |
267d9d73 EC |
2042 | size_t outlen; |
2043 | int rc; | |
2044 | ||
2045 | rc = efx_mcdi_rpc(efx, MC_CMD_GET_WORKAROUNDS, NULL, 0, | |
2046 | outbuf, sizeof(outbuf), &outlen); | |
2047 | if (rc) | |
2048 | goto fail; | |
2049 | ||
2050 | if (outlen < MC_CMD_GET_WORKAROUNDS_OUT_LEN) { | |
2051 | rc = -EIO; | |
2052 | goto fail; | |
2053 | } | |
2054 | ||
2055 | if (impl_out) | |
2056 | *impl_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_IMPLEMENTED); | |
2057 | ||
2058 | if (enabled_out) | |
2059 | *enabled_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_ENABLED); | |
2060 | ||
2061 | return 0; | |
2062 | ||
2063 | fail: | |
832dc9ed EC |
2064 | /* Older firmware lacks GET_WORKAROUNDS and this isn't especially |
2065 | * terrifying. The call site will have to deal with it though. | |
2066 | */ | |
34e7aefb JC |
2067 | netif_cond_dbg(efx, hw, efx->net_dev, rc == -ENOSYS, err, |
2068 | "%s: failed rc=%d\n", __func__, rc); | |
267d9d73 EC |
2069 | return rc; |
2070 | } | |
2071 | ||
45a3fd55 BH |
2072 | #ifdef CONFIG_SFC_MTD |
2073 | ||
2074 | #define EFX_MCDI_NVRAM_LEN_MAX 128 | |
2075 | ||
2076 | static int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type) | |
2077 | { | |
2078 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_IN_LEN); | |
2079 | int rc; | |
2080 | ||
2081 | MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type); | |
2082 | ||
2083 | BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0); | |
2084 | ||
2085 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf), | |
2086 | NULL, 0, NULL); | |
45a3fd55 BH |
2087 | return rc; |
2088 | } | |
2089 | ||
2090 | static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type, | |
2091 | loff_t offset, u8 *buffer, size_t length) | |
2092 | { | |
2093 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_LEN); | |
2094 | MCDI_DECLARE_BUF(outbuf, | |
2095 | MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX)); | |
2096 | size_t outlen; | |
2097 | int rc; | |
2098 | ||
2099 | MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type); | |
2100 | MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset); | |
2101 | MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length); | |
2102 | ||
2103 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf), | |
2104 | outbuf, sizeof(outbuf), &outlen); | |
2105 | if (rc) | |
1e0b8120 | 2106 | return rc; |
45a3fd55 BH |
2107 | |
2108 | memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length); | |
2109 | return 0; | |
45a3fd55 BH |
2110 | } |
2111 | ||
2112 | static int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type, | |
2113 | loff_t offset, const u8 *buffer, size_t length) | |
2114 | { | |
2115 | MCDI_DECLARE_BUF(inbuf, | |
2116 | MC_CMD_NVRAM_WRITE_IN_LEN(EFX_MCDI_NVRAM_LEN_MAX)); | |
2117 | int rc; | |
2118 | ||
2119 | MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type); | |
2120 | MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset); | |
2121 | MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length); | |
2122 | memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length); | |
2123 | ||
2124 | BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0); | |
2125 | ||
2126 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf, | |
2127 | ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4), | |
2128 | NULL, 0, NULL); | |
45a3fd55 BH |
2129 | return rc; |
2130 | } | |
2131 | ||
2132 | static int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type, | |
2133 | loff_t offset, size_t length) | |
2134 | { | |
2135 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN); | |
2136 | int rc; | |
2137 | ||
2138 | MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type); | |
2139 | MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset); | |
2140 | MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length); | |
2141 | ||
2142 | BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0); | |
2143 | ||
2144 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf), | |
2145 | NULL, 0, NULL); | |
45a3fd55 BH |
2146 | return rc; |
2147 | } | |
2148 | ||
2149 | static int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type) | |
2150 | { | |
2151 | MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_IN_LEN); | |
2152 | int rc; | |
2153 | ||
2154 | MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type); | |
2155 | ||
2156 | BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_FINISH_OUT_LEN != 0); | |
2157 | ||
2158 | rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf), | |
2159 | NULL, 0, NULL); | |
45a3fd55 BH |
2160 | return rc; |
2161 | } | |
2162 | ||
2163 | int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start, | |
2164 | size_t len, size_t *retlen, u8 *buffer) | |
2165 | { | |
2166 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); | |
2167 | struct efx_nic *efx = mtd->priv; | |
2168 | loff_t offset = start; | |
2169 | loff_t end = min_t(loff_t, start + len, mtd->size); | |
2170 | size_t chunk; | |
2171 | int rc = 0; | |
2172 | ||
2173 | while (offset < end) { | |
2174 | chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX); | |
2175 | rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset, | |
2176 | buffer, chunk); | |
2177 | if (rc) | |
2178 | goto out; | |
2179 | offset += chunk; | |
2180 | buffer += chunk; | |
2181 | } | |
2182 | out: | |
2183 | *retlen = offset - start; | |
2184 | return rc; | |
2185 | } | |
2186 | ||
2187 | int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len) | |
2188 | { | |
2189 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); | |
2190 | struct efx_nic *efx = mtd->priv; | |
2191 | loff_t offset = start & ~((loff_t)(mtd->erasesize - 1)); | |
2192 | loff_t end = min_t(loff_t, start + len, mtd->size); | |
2193 | size_t chunk = part->common.mtd.erasesize; | |
2194 | int rc = 0; | |
2195 | ||
2196 | if (!part->updating) { | |
2197 | rc = efx_mcdi_nvram_update_start(efx, part->nvram_type); | |
2198 | if (rc) | |
2199 | goto out; | |
2200 | part->updating = true; | |
2201 | } | |
2202 | ||
2203 | /* The MCDI interface can in fact do multiple erase blocks at once; | |
2204 | * but erasing may be slow, so we make multiple calls here to avoid | |
2205 | * tripping the MCDI RPC timeout. */ | |
2206 | while (offset < end) { | |
2207 | rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset, | |
2208 | chunk); | |
2209 | if (rc) | |
2210 | goto out; | |
2211 | offset += chunk; | |
2212 | } | |
2213 | out: | |
2214 | return rc; | |
2215 | } | |
2216 | ||
2217 | int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start, | |
2218 | size_t len, size_t *retlen, const u8 *buffer) | |
2219 | { | |
2220 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); | |
2221 | struct efx_nic *efx = mtd->priv; | |
2222 | loff_t offset = start; | |
2223 | loff_t end = min_t(loff_t, start + len, mtd->size); | |
2224 | size_t chunk; | |
2225 | int rc = 0; | |
2226 | ||
2227 | if (!part->updating) { | |
2228 | rc = efx_mcdi_nvram_update_start(efx, part->nvram_type); | |
2229 | if (rc) | |
2230 | goto out; | |
2231 | part->updating = true; | |
2232 | } | |
2233 | ||
2234 | while (offset < end) { | |
2235 | chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX); | |
2236 | rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset, | |
2237 | buffer, chunk); | |
2238 | if (rc) | |
2239 | goto out; | |
2240 | offset += chunk; | |
2241 | buffer += chunk; | |
2242 | } | |
2243 | out: | |
2244 | *retlen = offset - start; | |
2245 | return rc; | |
2246 | } | |
2247 | ||
2248 | int efx_mcdi_mtd_sync(struct mtd_info *mtd) | |
2249 | { | |
2250 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); | |
2251 | struct efx_nic *efx = mtd->priv; | |
2252 | int rc = 0; | |
2253 | ||
2254 | if (part->updating) { | |
2255 | part->updating = false; | |
2256 | rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type); | |
2257 | } | |
2258 | ||
2259 | return rc; | |
2260 | } | |
2261 | ||
2262 | void efx_mcdi_mtd_rename(struct efx_mtd_partition *part) | |
2263 | { | |
2264 | struct efx_mcdi_mtd_partition *mcdi_part = | |
2265 | container_of(part, struct efx_mcdi_mtd_partition, common); | |
2266 | struct efx_nic *efx = part->mtd.priv; | |
2267 | ||
2268 | snprintf(part->name, sizeof(part->name), "%s %s:%02x", | |
2269 | efx->name, part->type_name, mcdi_part->fw_subtype); | |
2270 | } | |
2271 | ||
2272 | #endif /* CONFIG_SFC_MTD */ |