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sfc: basic MCDI mapping of 25/50/100G link speeds
[mirror_ubuntu-hirsute-kernel.git] / drivers / net / ethernet / sfc / mcdi_port.c
CommitLineData
afd4aea0 1/****************************************************************************
f7a6d2c4
BH		 2 * Driver for Solarflare network controllers and boards
3 * Copyright 2009-2013 Solarflare Communications Inc.
afd4aea0
BH		 4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
8 */
9
10/*
11 * Driver for PHY related operations via MCDI.
12 */
13
5a0e3ad6 14#include <linux/slab.h>
afd4aea0 15#include "efx.h"
afd4aea0
BH		 16#include "mcdi.h"
17#include "mcdi_pcol.h"
affaf485
SH		 18#include "nic.h"
19#include "selftest.h"
afd4aea0 20
3bd93035 21struct efx_mcdi_phy_data {
afd4aea0
BH		 22 u32 flags;
23 u32 type;
24 u32 supported_cap;
25 u32 channel;
26 u32 port;
27 u32 stats_mask;
28 u8 name[20];
29 u32 media;
30 u32 mmd_mask;
31 u8 revision[20];
32 u32 forced_cap;
33};
34
35static int
3bd93035 36efx_mcdi_get_phy_cfg(struct efx_nic *efx, struct efx_mcdi_phy_data *cfg)
afd4aea0 37{
59cfc479 38 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_PHY_CFG_OUT_LEN);
afd4aea0
BH		 39 size_t outlen;
40 int rc;
41
42 BUILD_BUG_ON(MC_CMD_GET_PHY_CFG_IN_LEN != 0);
43 BUILD_BUG_ON(MC_CMD_GET_PHY_CFG_OUT_NAME_LEN != sizeof(cfg->name));
44
45 rc = efx_mcdi_rpc(efx, MC_CMD_GET_PHY_CFG, NULL, 0,
46 outbuf, sizeof(outbuf), &outlen);
47 if (rc)
48 goto fail;
49
50 if (outlen < MC_CMD_GET_PHY_CFG_OUT_LEN) {
00bbb4a5 51 rc = -EIO;
afd4aea0
BH		 52 goto fail;
53 }
54
55 cfg->flags = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_FLAGS);
56 cfg->type = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_TYPE);
57 cfg->supported_cap =
58 MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_SUPPORTED_CAP);
59 cfg->channel = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_CHANNEL);
60 cfg->port = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_PRT);
61 cfg->stats_mask = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_STATS_MASK);
62 memcpy(cfg->name, MCDI_PTR(outbuf, GET_PHY_CFG_OUT_NAME),
63 sizeof(cfg->name));
64 cfg->media = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_MEDIA_TYPE);
65 cfg->mmd_mask = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_MMD_MASK);
66 memcpy(cfg->revision, MCDI_PTR(outbuf, GET_PHY_CFG_OUT_REVISION),
67 sizeof(cfg->revision));
68
69 return 0;
70
71fail:
62776d03 72 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 73 return rc;
74}
75
76static int efx_mcdi_set_link(struct efx_nic *efx, u32 capabilities,
77 u32 flags, u32 loopback_mode,
78 u32 loopback_speed)
79{
59cfc479 80 MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_LINK_IN_LEN);
afd4aea0
BH		 81 int rc;
82
83 BUILD_BUG_ON(MC_CMD_SET_LINK_OUT_LEN != 0);
84
85 MCDI_SET_DWORD(inbuf, SET_LINK_IN_CAP, capabilities);
86 MCDI_SET_DWORD(inbuf, SET_LINK_IN_FLAGS, flags);
87 MCDI_SET_DWORD(inbuf, SET_LINK_IN_LOOPBACK_MODE, loopback_mode);
88 MCDI_SET_DWORD(inbuf, SET_LINK_IN_LOOPBACK_SPEED, loopback_speed);
89
90 rc = efx_mcdi_rpc(efx, MC_CMD_SET_LINK, inbuf, sizeof(inbuf),
91 NULL, 0, NULL);
afd4aea0
BH		 92 return rc;
93}
94
95static int efx_mcdi_loopback_modes(struct efx_nic *efx, u64 *loopback_modes)
96{
59cfc479 97 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_LOOPBACK_MODES_OUT_LEN);
afd4aea0
BH		 98 size_t outlen;
99 int rc;
100
101 rc = efx_mcdi_rpc(efx, MC_CMD_GET_LOOPBACK_MODES, NULL, 0,
102 outbuf, sizeof(outbuf), &outlen);
103 if (rc)
104 goto fail;
105
f2b0befd
BH		 106 if (outlen < (MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_OFST +
107 MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LEN)) {
00bbb4a5 108 rc = -EIO;
afd4aea0
BH		 109 goto fail;
110 }
111
05a9320f 112 *loopback_modes = MCDI_QWORD(outbuf, GET_LOOPBACK_MODES_OUT_SUGGESTED);
afd4aea0
BH		 113
114 return 0;
115
116fail:
62776d03 117 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 118 return rc;
119}
120
43f775b2
BH		 121static int efx_mcdi_mdio_read(struct net_device *net_dev,
122 int prtad, int devad, u16 addr)
afd4aea0 123{
43f775b2 124 struct efx_nic *efx = netdev_priv(net_dev);
59cfc479
BH		 125 MCDI_DECLARE_BUF(inbuf, MC_CMD_MDIO_READ_IN_LEN);
126 MCDI_DECLARE_BUF(outbuf, MC_CMD_MDIO_READ_OUT_LEN);
afd4aea0
BH		 127 size_t outlen;
128 int rc;
129
43f775b2 130 MCDI_SET_DWORD(inbuf, MDIO_READ_IN_BUS, efx->mdio_bus);
afd4aea0
BH		 131 MCDI_SET_DWORD(inbuf, MDIO_READ_IN_PRTAD, prtad);
132 MCDI_SET_DWORD(inbuf, MDIO_READ_IN_DEVAD, devad);
133 MCDI_SET_DWORD(inbuf, MDIO_READ_IN_ADDR, addr);
134
135 rc = efx_mcdi_rpc(efx, MC_CMD_MDIO_READ, inbuf, sizeof(inbuf),
136 outbuf, sizeof(outbuf), &outlen);
137 if (rc)
1e0b8120 138 return rc;
afd4aea0 139
43f775b2
BH		 140 if (MCDI_DWORD(outbuf, MDIO_READ_OUT_STATUS) !=
141 MC_CMD_MDIO_STATUS_GOOD)
142 return -EIO;
143
144 return (u16)MCDI_DWORD(outbuf, MDIO_READ_OUT_VALUE);
afd4aea0
BH		 145}
146
43f775b2
BH		 147static int efx_mcdi_mdio_write(struct net_device *net_dev,
148 int prtad, int devad, u16 addr, u16 value)
afd4aea0 149{
43f775b2 150 struct efx_nic *efx = netdev_priv(net_dev);
59cfc479
BH		 151 MCDI_DECLARE_BUF(inbuf, MC_CMD_MDIO_WRITE_IN_LEN);
152 MCDI_DECLARE_BUF(outbuf, MC_CMD_MDIO_WRITE_OUT_LEN);
afd4aea0
BH		 153 size_t outlen;
154 int rc;
155
43f775b2 156 MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_BUS, efx->mdio_bus);
afd4aea0
BH		 157 MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_PRTAD, prtad);
158 MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_DEVAD, devad);
159 MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_ADDR, addr);
160 MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_VALUE, value);
161
162 rc = efx_mcdi_rpc(efx, MC_CMD_MDIO_WRITE, inbuf, sizeof(inbuf),
163 outbuf, sizeof(outbuf), &outlen);
164 if (rc)
1e0b8120 165 return rc;
afd4aea0 166
43f775b2
BH		 167 if (MCDI_DWORD(outbuf, MDIO_WRITE_OUT_STATUS) !=
168 MC_CMD_MDIO_STATUS_GOOD)
169 return -EIO;
170
afd4aea0 171 return 0;
afd4aea0
BH		 172}
173
174static u32 mcdi_to_ethtool_cap(u32 media, u32 cap)
175{
176 u32 result = 0;
177
178 switch (media) {
179 case MC_CMD_MEDIA_KX4:
180 result |= SUPPORTED_Backplane;
181 if (cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN))
182 result |= SUPPORTED_1000baseKX_Full;
183 if (cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN))
184 result |= SUPPORTED_10000baseKX4_Full;
ac331e94
EC		 185 if (cap & (1 << MC_CMD_PHY_CAP_40000FDX_LBN))
186 result |= SUPPORTED_40000baseKR4_Full;
afd4aea0
BH		 187 break;
188
189 case MC_CMD_MEDIA_XFP:
190 case MC_CMD_MEDIA_SFP_PLUS:
ac331e94
EC		 191 case MC_CMD_MEDIA_QSFP_PLUS:
192 result |= SUPPORTED_FIBRE;
3497ed8c
BK		 193 if (cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN))
194 result |= SUPPORTED_1000baseT_Full;
195 if (cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN))
196 result |= SUPPORTED_10000baseT_Full;
ac331e94
EC		 197 if (cap & (1 << MC_CMD_PHY_CAP_40000FDX_LBN))
198 result |= SUPPORTED_40000baseCR4_Full;
199 break;
200
afd4aea0
BH		 201 case MC_CMD_MEDIA_BASE_T:
202 result |= SUPPORTED_TP;
203 if (cap & (1 << MC_CMD_PHY_CAP_10HDX_LBN))
204 result |= SUPPORTED_10baseT_Half;
205 if (cap & (1 << MC_CMD_PHY_CAP_10FDX_LBN))
206 result |= SUPPORTED_10baseT_Full;
207 if (cap & (1 << MC_CMD_PHY_CAP_100HDX_LBN))
208 result |= SUPPORTED_100baseT_Half;
209 if (cap & (1 << MC_CMD_PHY_CAP_100FDX_LBN))
210 result |= SUPPORTED_100baseT_Full;
211 if (cap & (1 << MC_CMD_PHY_CAP_1000HDX_LBN))
212 result |= SUPPORTED_1000baseT_Half;
213 if (cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN))
214 result |= SUPPORTED_1000baseT_Full;
215 if (cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN))
216 result |= SUPPORTED_10000baseT_Full;
217 break;
218 }
219
220 if (cap & (1 << MC_CMD_PHY_CAP_PAUSE_LBN))
221 result |= SUPPORTED_Pause;
222 if (cap & (1 << MC_CMD_PHY_CAP_ASYM_LBN))
223 result |= SUPPORTED_Asym_Pause;
224 if (cap & (1 << MC_CMD_PHY_CAP_AN_LBN))
225 result |= SUPPORTED_Autoneg;
226
227 return result;
228}
229
230static u32 ethtool_to_mcdi_cap(u32 cap)
231{
232 u32 result = 0;
233
234 if (cap & SUPPORTED_10baseT_Half)
235 result |= (1 << MC_CMD_PHY_CAP_10HDX_LBN);
236 if (cap & SUPPORTED_10baseT_Full)
237 result |= (1 << MC_CMD_PHY_CAP_10FDX_LBN);
238 if (cap & SUPPORTED_100baseT_Half)
239 result |= (1 << MC_CMD_PHY_CAP_100HDX_LBN);
240 if (cap & SUPPORTED_100baseT_Full)
241 result |= (1 << MC_CMD_PHY_CAP_100FDX_LBN);
242 if (cap & SUPPORTED_1000baseT_Half)
243 result |= (1 << MC_CMD_PHY_CAP_1000HDX_LBN);
244 if (cap & (SUPPORTED_1000baseT_Full | SUPPORTED_1000baseKX_Full))
245 result |= (1 << MC_CMD_PHY_CAP_1000FDX_LBN);
246 if (cap & (SUPPORTED_10000baseT_Full | SUPPORTED_10000baseKX4_Full))
247 result |= (1 << MC_CMD_PHY_CAP_10000FDX_LBN);
ac331e94
EC		 248 if (cap & (SUPPORTED_40000baseCR4_Full | SUPPORTED_40000baseKR4_Full))
249 result |= (1 << MC_CMD_PHY_CAP_40000FDX_LBN);
afd4aea0
BH		 250 if (cap & SUPPORTED_Pause)
251 result |= (1 << MC_CMD_PHY_CAP_PAUSE_LBN);
252 if (cap & SUPPORTED_Asym_Pause)
253 result |= (1 << MC_CMD_PHY_CAP_ASYM_LBN);
254 if (cap & SUPPORTED_Autoneg)
255 result |= (1 << MC_CMD_PHY_CAP_AN_LBN);
256
257 return result;
258}
259
260static u32 efx_get_mcdi_phy_flags(struct efx_nic *efx)
261{
3bd93035 262 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data;
afd4aea0
BH		 263 enum efx_phy_mode mode, supported;
264 u32 flags;
265
266 /* TODO: Advertise the capabilities supported by this PHY */
267 supported = 0;
05a9320f 268 if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_TXDIS_LBN))
afd4aea0 269 supported |= PHY_MODE_TX_DISABLED;
05a9320f 270 if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_LOWPOWER_LBN))
afd4aea0 271 supported |= PHY_MODE_LOW_POWER;
05a9320f 272 if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_POWEROFF_LBN))
afd4aea0
BH		 273 supported |= PHY_MODE_OFF;
274
275 mode = efx->phy_mode & supported;
276
277 flags = 0;
278 if (mode & PHY_MODE_TX_DISABLED)
05a9320f 279 flags |= (1 << MC_CMD_SET_LINK_IN_TXDIS_LBN);
afd4aea0 280 if (mode & PHY_MODE_LOW_POWER)
05a9320f 281 flags |= (1 << MC_CMD_SET_LINK_IN_LOWPOWER_LBN);
afd4aea0 282 if (mode & PHY_MODE_OFF)
05a9320f 283 flags |= (1 << MC_CMD_SET_LINK_IN_POWEROFF_LBN);
afd4aea0
BH		 284
285 return flags;
286}
287
288static u32 mcdi_to_ethtool_media(u32 media)
289{
290 switch (media) {
291 case MC_CMD_MEDIA_XAUI:
292 case MC_CMD_MEDIA_CX4:
293 case MC_CMD_MEDIA_KX4:
294 return PORT_OTHER;
295
296 case MC_CMD_MEDIA_XFP:
297 case MC_CMD_MEDIA_SFP_PLUS:
ac331e94 298 case MC_CMD_MEDIA_QSFP_PLUS:
afd4aea0
BH		 299 return PORT_FIBRE;
300
301 case MC_CMD_MEDIA_BASE_T:
302 return PORT_TP;
303
304 default:
305 return PORT_OTHER;
306 }
307}
308
43f775b2
BH		 309static void efx_mcdi_phy_decode_link(struct efx_nic *efx,
310 struct efx_link_state *link_state,
311 u32 speed, u32 flags, u32 fcntl)
312{
313 switch (fcntl) {
314 case MC_CMD_FCNTL_AUTO:
315 WARN_ON(1); /* This is not a link mode */
316 link_state->fc = EFX_FC_AUTO | EFX_FC_TX | EFX_FC_RX;
317 break;
318 case MC_CMD_FCNTL_BIDIR:
319 link_state->fc = EFX_FC_TX | EFX_FC_RX;
320 break;
321 case MC_CMD_FCNTL_RESPOND:
322 link_state->fc = EFX_FC_RX;
323 break;
324 default:
325 WARN_ON(1);
326 case MC_CMD_FCNTL_OFF:
327 link_state->fc = 0;
328 break;
329 }
330
331 link_state->up = !!(flags & (1 << MC_CMD_GET_LINK_OUT_LINK_UP_LBN));
332 link_state->fd = !!(flags & (1 << MC_CMD_GET_LINK_OUT_FULL_DUPLEX_LBN));
333 link_state->speed = speed;
334}
335
afd4aea0
BH		 336static int efx_mcdi_phy_probe(struct efx_nic *efx)
337{
3bd93035 338 struct efx_mcdi_phy_data *phy_data;
59cfc479 339 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_LINK_OUT_LEN);
ff3b00a0 340 u32 caps;
afd4aea0
BH		 341 int rc;
342
ff3b00a0
SH		 343 /* Initialise and populate phy_data */
344 phy_data = kzalloc(sizeof(*phy_data), GFP_KERNEL);
345 if (phy_data == NULL)
346 return -ENOMEM;
347
348 rc = efx_mcdi_get_phy_cfg(efx, phy_data);
afd4aea0
BH		 349 if (rc != 0)
350 goto fail;
351
ff3b00a0
SH		 352 /* Read initial link advertisement */
353 BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0);
354 rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0,
355 outbuf, sizeof(outbuf), NULL);
356 if (rc)
357 goto fail;
358
359 /* Fill out nic state */
360 efx->phy_data = phy_data;
361 efx->phy_type = phy_data->type;
afd4aea0 362
ff3b00a0
SH		 363 efx->mdio_bus = phy_data->channel;
364 efx->mdio.prtad = phy_data->port;
365 efx->mdio.mmds = phy_data->mmd_mask & ~(1 << MC_CMD_MMD_CLAUSE22);
afd4aea0 366 efx->mdio.mode_support = 0;
ff3b00a0 367 if (phy_data->mmd_mask & (1 << MC_CMD_MMD_CLAUSE22))
afd4aea0 368 efx->mdio.mode_support |= MDIO_SUPPORTS_C22;
ff3b00a0 369 if (phy_data->mmd_mask & ~(1 << MC_CMD_MMD_CLAUSE22))
afd4aea0
BH		 370 efx->mdio.mode_support |= MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
371
ff3b00a0
SH		 372 caps = MCDI_DWORD(outbuf, GET_LINK_OUT_CAP);
373 if (caps & (1 << MC_CMD_PHY_CAP_AN_LBN))
374 efx->link_advertising =
375 mcdi_to_ethtool_cap(phy_data->media, caps);
376 else
377 phy_data->forced_cap = caps;
378
afd4aea0
BH		 379 /* Assert that we can map efx -> mcdi loopback modes */
380 BUILD_BUG_ON(LOOPBACK_NONE != MC_CMD_LOOPBACK_NONE);
381 BUILD_BUG_ON(LOOPBACK_DATA != MC_CMD_LOOPBACK_DATA);
382 BUILD_BUG_ON(LOOPBACK_GMAC != MC_CMD_LOOPBACK_GMAC);
383 BUILD_BUG_ON(LOOPBACK_XGMII != MC_CMD_LOOPBACK_XGMII);
384 BUILD_BUG_ON(LOOPBACK_XGXS != MC_CMD_LOOPBACK_XGXS);
385 BUILD_BUG_ON(LOOPBACK_XAUI != MC_CMD_LOOPBACK_XAUI);
386 BUILD_BUG_ON(LOOPBACK_GMII != MC_CMD_LOOPBACK_GMII);
387 BUILD_BUG_ON(LOOPBACK_SGMII != MC_CMD_LOOPBACK_SGMII);
388 BUILD_BUG_ON(LOOPBACK_XGBR != MC_CMD_LOOPBACK_XGBR);
389 BUILD_BUG_ON(LOOPBACK_XFI != MC_CMD_LOOPBACK_XFI);
390 BUILD_BUG_ON(LOOPBACK_XAUI_FAR != MC_CMD_LOOPBACK_XAUI_FAR);
391 BUILD_BUG_ON(LOOPBACK_GMII_FAR != MC_CMD_LOOPBACK_GMII_FAR);
392 BUILD_BUG_ON(LOOPBACK_SGMII_FAR != MC_CMD_LOOPBACK_SGMII_FAR);
393 BUILD_BUG_ON(LOOPBACK_XFI_FAR != MC_CMD_LOOPBACK_XFI_FAR);
394 BUILD_BUG_ON(LOOPBACK_GPHY != MC_CMD_LOOPBACK_GPHY);
395 BUILD_BUG_ON(LOOPBACK_PHYXS != MC_CMD_LOOPBACK_PHYXS);
396 BUILD_BUG_ON(LOOPBACK_PCS != MC_CMD_LOOPBACK_PCS);
397 BUILD_BUG_ON(LOOPBACK_PMAPMD != MC_CMD_LOOPBACK_PMAPMD);
398 BUILD_BUG_ON(LOOPBACK_XPORT != MC_CMD_LOOPBACK_XPORT);
399 BUILD_BUG_ON(LOOPBACK_XGMII_WS != MC_CMD_LOOPBACK_XGMII_WS);
400 BUILD_BUG_ON(LOOPBACK_XAUI_WS != MC_CMD_LOOPBACK_XAUI_WS);
401 BUILD_BUG_ON(LOOPBACK_XAUI_WS_FAR != MC_CMD_LOOPBACK_XAUI_WS_FAR);
402 BUILD_BUG_ON(LOOPBACK_XAUI_WS_NEAR != MC_CMD_LOOPBACK_XAUI_WS_NEAR);
403 BUILD_BUG_ON(LOOPBACK_GMII_WS != MC_CMD_LOOPBACK_GMII_WS);
404 BUILD_BUG_ON(LOOPBACK_XFI_WS != MC_CMD_LOOPBACK_XFI_WS);
405 BUILD_BUG_ON(LOOPBACK_XFI_WS_FAR != MC_CMD_LOOPBACK_XFI_WS_FAR);
406 BUILD_BUG_ON(LOOPBACK_PHYXS_WS != MC_CMD_LOOPBACK_PHYXS_WS);
407
408 rc = efx_mcdi_loopback_modes(efx, &efx->loopback_modes);
409 if (rc != 0)
410 goto fail;
411 /* The MC indicates that LOOPBACK_NONE is a valid loopback mode,
412 * but by convention we don't */
413 efx->loopback_modes &= ~(1 << LOOPBACK_NONE);
414
7a6b8f6f
SH		 415 /* Set the initial link mode */
416 efx_mcdi_phy_decode_link(
417 efx, &efx->link_state,
418 MCDI_DWORD(outbuf, GET_LINK_OUT_LINK_SPEED),
419 MCDI_DWORD(outbuf, GET_LINK_OUT_FLAGS),
420 MCDI_DWORD(outbuf, GET_LINK_OUT_FCNTL));
421
422 /* Default to Autonegotiated flow control if the PHY supports it */
423 efx->wanted_fc = EFX_FC_RX | EFX_FC_TX;
424 if (phy_data->supported_cap & (1 << MC_CMD_PHY_CAP_AN_LBN))
425 efx->wanted_fc |= EFX_FC_AUTO;
cffe9d4c 426 efx_link_set_wanted_fc(efx, efx->wanted_fc);
7a6b8f6f 427
afd4aea0
BH		 428 return 0;
429
430fail:
431 kfree(phy_data);
432 return rc;
433}
434
43f775b2 435int efx_mcdi_port_reconfigure(struct efx_nic *efx)
afd4aea0 436{
3bd93035 437 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data;
afd4aea0
BH		 438 u32 caps = (efx->link_advertising ?
439 ethtool_to_mcdi_cap(efx->link_advertising) :
440 phy_cfg->forced_cap);
441
442 return efx_mcdi_set_link(efx, caps, efx_get_mcdi_phy_flags(efx),
443 efx->loopback_mode, 0);
444}
445
afd4aea0
BH		 446/* Verify that the forced flow control settings (!EFX_FC_AUTO) are
447 * supported by the link partner. Warn the user if this isn't the case
448 */
43f775b2 449static void efx_mcdi_phy_check_fcntl(struct efx_nic *efx, u32 lpa)
afd4aea0 450{
3bd93035 451 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data;
afd4aea0
BH		 452 u32 rmtadv;
453
25985edc 454 /* The link partner capabilities are only relevant if the
afd4aea0 455 * link supports flow control autonegotiation */
7a6b8f6f 456 if (~phy_cfg->supported_cap & (1 << MC_CMD_PHY_CAP_AN_LBN))
afd4aea0
BH		 457 return;
458
459 /* If flow control autoneg is supported and enabled, then fine */
460 if (efx->wanted_fc & EFX_FC_AUTO)
461 return;
462
463 rmtadv = 0;
464 if (lpa & (1 << MC_CMD_PHY_CAP_PAUSE_LBN))
465 rmtadv |= ADVERTISED_Pause;
466 if (lpa & (1 << MC_CMD_PHY_CAP_ASYM_LBN))
467 rmtadv |= ADVERTISED_Asym_Pause;
468
469 if ((efx->wanted_fc & EFX_FC_TX) && rmtadv == ADVERTISED_Asym_Pause)
62776d03
BH		 470 netif_err(efx, link, efx->net_dev,
471 "warning: link partner doesn't support pause frames");
afd4aea0
BH		 472}
473
474static bool efx_mcdi_phy_poll(struct efx_nic *efx)
475{
476 struct efx_link_state old_state = efx->link_state;
59cfc479 477 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_LINK_OUT_LEN);
afd4aea0
BH		 478 int rc;
479
480 WARN_ON(!mutex_is_locked(&efx->mac_lock));
481
482 BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0);
483
484 rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0,
485 outbuf, sizeof(outbuf), NULL);
1e0b8120 486 if (rc)
afd4aea0 487 efx->link_state.up = false;
1e0b8120 488 else
afd4aea0
BH		 489 efx_mcdi_phy_decode_link(
490 efx, &efx->link_state,
491 MCDI_DWORD(outbuf, GET_LINK_OUT_LINK_SPEED),
492 MCDI_DWORD(outbuf, GET_LINK_OUT_FLAGS),
493 MCDI_DWORD(outbuf, GET_LINK_OUT_FCNTL));
afd4aea0
BH		 494
495 return !efx_link_state_equal(&efx->link_state, &old_state);
496}
497
ff3b00a0 498static void efx_mcdi_phy_remove(struct efx_nic *efx)
afd4aea0
BH		 499{
500 struct efx_mcdi_phy_data *phy_data = efx->phy_data;
501
502 efx->phy_data = NULL;
503 kfree(phy_data);
504}
505
7cafe8f8
PR		 506static void efx_mcdi_phy_get_link_ksettings(struct efx_nic *efx,
507 struct ethtool_link_ksettings *cmd)
afd4aea0 508{
3bd93035 509 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data;
59cfc479 510 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_LINK_OUT_LEN);
afd4aea0 511 int rc;
7cafe8f8
PR		 512 u32 supported, advertising, lp_advertising;
513
514 supported = mcdi_to_ethtool_cap(phy_cfg->media, phy_cfg->supported_cap);
515 advertising = efx->link_advertising;
516 cmd->base.speed = efx->link_state.speed;
517 cmd->base.duplex = efx->link_state.fd;
518 cmd->base.port = mcdi_to_ethtool_media(phy_cfg->media);
519 cmd->base.phy_address = phy_cfg->port;
520 cmd->base.autoneg = !!(efx->link_advertising & ADVERTISED_Autoneg);
521 cmd->base.mdio_support = (efx->mdio.mode_support &
afd4aea0
BH		 522 (MDIO_SUPPORTS_C45 | MDIO_SUPPORTS_C22));
523
7cafe8f8
PR		 524 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
525 supported);
526 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
527 advertising);
528
afd4aea0
BH		 529 BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0);
530 rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0,
531 outbuf, sizeof(outbuf), NULL);
1e0b8120 532 if (rc)
afd4aea0 533 return;
7cafe8f8 534 lp_advertising =
afd4aea0
BH		 535 mcdi_to_ethtool_cap(phy_cfg->media,
536 MCDI_DWORD(outbuf, GET_LINK_OUT_LP_CAP));
7cafe8f8
PR		 537
538 ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.lp_advertising,
539 lp_advertising);
afd4aea0
BH		 540}
541
7cafe8f8
PR		 542static int
543efx_mcdi_phy_set_link_ksettings(struct efx_nic *efx,
544 const struct ethtool_link_ksettings *cmd)
afd4aea0 545{
3bd93035 546 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data;
afd4aea0
BH		 547 u32 caps;
548 int rc;
7cafe8f8
PR		 549 u32 advertising;
550
551 ethtool_convert_link_mode_to_legacy_u32(&advertising,
552 cmd->link_modes.advertising);
afd4aea0 553
7cafe8f8
PR		 554 if (cmd->base.autoneg) {
555 caps = (ethtool_to_mcdi_cap(advertising) |
afd4aea0 556 1 << MC_CMD_PHY_CAP_AN_LBN);
7cafe8f8
PR		 557 } else if (cmd->base.duplex) {
558 switch (cmd->base.speed) {
702b3d51
EC		 559 case 10: caps = 1 << MC_CMD_PHY_CAP_10FDX_LBN; break;
560 case 100: caps = 1 << MC_CMD_PHY_CAP_100FDX_LBN; break;
561 case 1000: caps = 1 << MC_CMD_PHY_CAP_1000FDX_LBN; break;
562 case 10000: caps = 1 << MC_CMD_PHY_CAP_10000FDX_LBN; break;
563 case 40000: caps = 1 << MC_CMD_PHY_CAP_40000FDX_LBN; break;
564 case 100000: caps = 1 << MC_CMD_PHY_CAP_100000FDX_LBN; break;
565 case 25000: caps = 1 << MC_CMD_PHY_CAP_25000FDX_LBN; break;
566 case 50000: caps = 1 << MC_CMD_PHY_CAP_50000FDX_LBN; break;
567 default: return -EINVAL;
afd4aea0
BH		 568 }
569 } else {
7cafe8f8 570 switch (cmd->base.speed) {
702b3d51
EC		 571 case 10: caps = 1 << MC_CMD_PHY_CAP_10HDX_LBN; break;
572 case 100: caps = 1 << MC_CMD_PHY_CAP_100HDX_LBN; break;
573 case 1000: caps = 1 << MC_CMD_PHY_CAP_1000HDX_LBN; break;
574 default: return -EINVAL;
afd4aea0
BH		 575 }
576 }
577
578 rc = efx_mcdi_set_link(efx, caps, efx_get_mcdi_phy_flags(efx),
579 efx->loopback_mode, 0);
580 if (rc)
581 return rc;
582
7cafe8f8 583 if (cmd->base.autoneg) {
afd4aea0 584 efx_link_set_advertising(
7cafe8f8 585 efx, advertising | ADVERTISED_Autoneg);
afd4aea0
BH		 586 phy_cfg->forced_cap = 0;
587 } else {
588 efx_link_set_advertising(efx, 0);
589 phy_cfg->forced_cap = caps;
590 }
591 return 0;
592}
593
4f16c073
BH		 594static int efx_mcdi_phy_test_alive(struct efx_nic *efx)
595{
59cfc479 596 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_PHY_STATE_OUT_LEN);
4f16c073
BH		 597 size_t outlen;
598 int rc;
599
600 BUILD_BUG_ON(MC_CMD_GET_PHY_STATE_IN_LEN != 0);
601
602 rc = efx_mcdi_rpc(efx, MC_CMD_GET_PHY_STATE, NULL, 0,
603 outbuf, sizeof(outbuf), &outlen);
604 if (rc)
605 return rc;
606
607 if (outlen < MC_CMD_GET_PHY_STATE_OUT_LEN)
00bbb4a5 608 return -EIO;
05a9320f 609 if (MCDI_DWORD(outbuf, GET_PHY_STATE_OUT_STATE) != MC_CMD_PHY_STATE_OK)
4f16c073
BH		 610 return -EINVAL;
611
612 return 0;
613}
614
affaf485
SH		 615static const char *const mcdi_sft9001_cable_diag_names[] = {
616 "cable.pairA.length",
617 "cable.pairB.length",
618 "cable.pairC.length",
619 "cable.pairD.length",
620 "cable.pairA.status",
621 "cable.pairB.status",
622 "cable.pairC.status",
623 "cable.pairD.status",
624};
625
626static int efx_mcdi_bist(struct efx_nic *efx, unsigned int bist_mode,
627 int *results)
628{
629 unsigned int retry, i, count = 0;
630 size_t outlen;
631 u32 status;
c5bb0e98
BH		 632 MCDI_DECLARE_BUF(inbuf, MC_CMD_START_BIST_IN_LEN);
633 MCDI_DECLARE_BUF(outbuf, MC_CMD_POLL_BIST_OUT_SFT9001_LEN);
634 u8 *ptr;
affaf485
SH		 635 int rc;
636
affaf485 637 BUILD_BUG_ON(MC_CMD_START_BIST_OUT_LEN != 0);
c5bb0e98
BH		 638 MCDI_SET_DWORD(inbuf, START_BIST_IN_TYPE, bist_mode);
639 rc = efx_mcdi_rpc(efx, MC_CMD_START_BIST,
640 inbuf, MC_CMD_START_BIST_IN_LEN, NULL, 0, NULL);
affaf485
SH		 641 if (rc)
642 goto out;
643
644 /* Wait up to 10s for BIST to finish */
645 for (retry = 0; retry < 100; ++retry) {
646 BUILD_BUG_ON(MC_CMD_POLL_BIST_IN_LEN != 0);
647 rc = efx_mcdi_rpc(efx, MC_CMD_POLL_BIST, NULL, 0,
c5bb0e98 648 outbuf, sizeof(outbuf), &outlen);
affaf485
SH		 649 if (rc)
650 goto out;
651
c5bb0e98 652 status = MCDI_DWORD(outbuf, POLL_BIST_OUT_RESULT);
affaf485
SH		 653 if (status != MC_CMD_POLL_BIST_RUNNING)
654 goto finished;
655
656 msleep(100);
657 }
658
659 rc = -ETIMEDOUT;
660 goto out;
661
662finished:
663 results[count++] = (status == MC_CMD_POLL_BIST_PASSED) ? 1 : -1;
664
665 /* SFT9001 specific cable diagnostics output */
666 if (efx->phy_type == PHY_TYPE_SFT9001B &&
667 (bist_mode == MC_CMD_PHY_BIST_CABLE_SHORT ||
668 bist_mode == MC_CMD_PHY_BIST_CABLE_LONG)) {
c5bb0e98 669 ptr = MCDI_PTR(outbuf, POLL_BIST_OUT_SFT9001_CABLE_LENGTH_A);
affaf485
SH		 670 if (status == MC_CMD_POLL_BIST_PASSED &&
671 outlen >= MC_CMD_POLL_BIST_OUT_SFT9001_LEN) {
672 for (i = 0; i < 8; i++) {
673 results[count + i] =
674 EFX_DWORD_FIELD(((efx_dword_t *)ptr)[i],
675 EFX_DWORD_0);
676 }
677 }
678 count += 8;
679 }
680 rc = count;
681
682out:
affaf485
SH		 683 return rc;
684}
685
686static int efx_mcdi_phy_run_tests(struct efx_nic *efx, int *results,
687 unsigned flags)
688{
3bd93035 689 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data;
affaf485
SH		 690 u32 mode;
691 int rc;
692
05a9320f 693 if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_LBN)) {
affaf485
SH		 694 rc = efx_mcdi_bist(efx, MC_CMD_PHY_BIST, results);
695 if (rc < 0)
696 return rc;
697
698 results += rc;
699 }
700
701 /* If we support both LONG and SHORT, then run each in response to
702 * break or not. Otherwise, run the one we support */
703 mode = 0;
05a9320f 704 if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_SHORT_LBN)) {
affaf485
SH		 705 if ((flags & ETH_TEST_FL_OFFLINE) &&
706 (phy_cfg->flags &
05a9320f 707 (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_LONG_LBN)))
affaf485
SH		 708 mode = MC_CMD_PHY_BIST_CABLE_LONG;
709 else
710 mode = MC_CMD_PHY_BIST_CABLE_SHORT;
711 } else if (phy_cfg->flags &
05a9320f 712 (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_LONG_LBN))
affaf485
SH		 713 mode = MC_CMD_PHY_BIST_CABLE_LONG;
714
715 if (mode != 0) {
716 rc = efx_mcdi_bist(efx, mode, results);
717 if (rc < 0)
718 return rc;
719 results += rc;
720 }
721
722 return 0;
723}
724
d215697f 725static const char *efx_mcdi_phy_test_name(struct efx_nic *efx,
726 unsigned int index)
affaf485 727{
3bd93035 728 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data;
affaf485 729
05a9320f 730 if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_LBN)) {
affaf485
SH		 731 if (index == 0)
732 return "bist";
733 --index;
734 }
735
05a9320f
BH		 736 if (phy_cfg->flags & ((1 << MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_SHORT_LBN) |
737 (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_LONG_LBN))) {
affaf485
SH		 738 if (index == 0)
739 return "cable";
740 --index;
741
742 if (efx->phy_type == PHY_TYPE_SFT9001B) {
743 if (index < ARRAY_SIZE(mcdi_sft9001_cable_diag_names))
744 return mcdi_sft9001_cable_diag_names[index];
745 index -= ARRAY_SIZE(mcdi_sft9001_cable_diag_names);
746 }
747 }
748
749 return NULL;
750}
751
9b17010d
MH		 752#define SFP_PAGE_SIZE 128
753#define SFF_DIAG_TYPE_OFFSET 92
754#define SFF_DIAG_ADDR_CHANGE BIT(2)
755#define SFF_8079_NUM_PAGES 2
756#define SFF_8472_NUM_PAGES 4
757#define SFF_8436_NUM_PAGES 5
758#define SFF_DMT_LEVEL_OFFSET 94
759
760/** efx_mcdi_phy_get_module_eeprom_page() - Get a single page of module eeprom
761 * @efx: NIC context
762 * @page: EEPROM page number
763 * @data: Destination data pointer
764 * @offset: Offset in page to copy from in to data
765 * @space: Space available in data
766 *
767 * Return:
768 * >=0 - amount of data copied
769 * <0 - error
770 */
771static int efx_mcdi_phy_get_module_eeprom_page(struct efx_nic *efx,
772 unsigned int page,
773 u8 *data, ssize_t offset,
774 ssize_t space)
c087bd2c 775{
59cfc479
BH		 776 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMAX);
777 MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_PHY_MEDIA_INFO_IN_LEN);
c087bd2c 778 size_t outlen;
c087bd2c 779 unsigned int payload_len;
c087bd2c 780 unsigned int to_copy;
9b17010d 781 int rc;
c087bd2c 782
9b17010d
MH		 783 if (offset > SFP_PAGE_SIZE)
784 return -EINVAL;
c087bd2c 785
9b17010d 786 to_copy = min(space, SFP_PAGE_SIZE - offset);
c087bd2c 787
9b17010d
MH		 788 MCDI_SET_DWORD(inbuf, GET_PHY_MEDIA_INFO_IN_PAGE, page);
789 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_PHY_MEDIA_INFO,
790 inbuf, sizeof(inbuf),
791 outbuf, sizeof(outbuf),
792 &outlen);
c087bd2c 793
9b17010d
MH		 794 if (rc)
795 return rc;
c087bd2c 796
9b17010d
MH		 797 if (outlen < (MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_OFST +
798 SFP_PAGE_SIZE))
799 return -EIO;
c087bd2c 800
9b17010d
MH		 801 payload_len = MCDI_DWORD(outbuf, GET_PHY_MEDIA_INFO_OUT_DATALEN);
802 if (payload_len != SFP_PAGE_SIZE)
803 return -EIO;
c087bd2c 804
9b17010d
MH		 805 memcpy(data, MCDI_PTR(outbuf, GET_PHY_MEDIA_INFO_OUT_DATA) + offset,
806 to_copy);
c087bd2c 807
9b17010d
MH		 808 return to_copy;
809}
c087bd2c 810
9b17010d
MH		 811static int efx_mcdi_phy_get_module_eeprom_byte(struct efx_nic *efx,
812 unsigned int page,
813 u8 byte)
814{
815 int rc;
816 u8 data;
817
818 rc = efx_mcdi_phy_get_module_eeprom_page(efx, page, &data, byte, 1);
819 if (rc == 1)
820 return data;
821
822 return rc;
823}
824
825static int efx_mcdi_phy_diag_type(struct efx_nic *efx)
826{
827 /* Page zero of the EEPROM includes the diagnostic type at byte 92. */
828 return efx_mcdi_phy_get_module_eeprom_byte(efx, 0,
829 SFF_DIAG_TYPE_OFFSET);
830}
831
832static int efx_mcdi_phy_sff_8472_level(struct efx_nic *efx)
833{
834 /* Page zero of the EEPROM includes the DMT level at byte 94. */
835 return efx_mcdi_phy_get_module_eeprom_byte(efx, 0,
836 SFF_DMT_LEVEL_OFFSET);
837}
838
839static u32 efx_mcdi_phy_module_type(struct efx_nic *efx)
840{
841 struct efx_mcdi_phy_data *phy_data = efx->phy_data;
842
843 if (phy_data->media != MC_CMD_MEDIA_QSFP_PLUS)
844 return phy_data->media;
845
846 /* A QSFP+ NIC may actually have an SFP+ module attached.
847 * The ID is page 0, byte 0.
848 */
849 switch (efx_mcdi_phy_get_module_eeprom_byte(efx, 0, 0)) {
850 case 0x3:
851 return MC_CMD_MEDIA_SFP_PLUS;
852 case 0xc:
853 case 0xd:
854 return MC_CMD_MEDIA_QSFP_PLUS;
855 default:
856 return 0;
857 }
858}
859
860static int efx_mcdi_phy_get_module_eeprom(struct efx_nic *efx,
861 struct ethtool_eeprom *ee, u8 *data)
862{
863 int rc;
864 ssize_t space_remaining = ee->len;
865 unsigned int page_off;
866 bool ignore_missing;
867 int num_pages;
868 int page;
869
870 switch (efx_mcdi_phy_module_type(efx)) {
871 case MC_CMD_MEDIA_SFP_PLUS:
872 num_pages = efx_mcdi_phy_sff_8472_level(efx) > 0 ?
873 SFF_8472_NUM_PAGES : SFF_8079_NUM_PAGES;
874 page = 0;
875 ignore_missing = false;
876 break;
877 case MC_CMD_MEDIA_QSFP_PLUS:
878 num_pages = SFF_8436_NUM_PAGES;
879 page = -1; /* We obtain the lower page by asking for -1. */
880 ignore_missing = true; /* Ignore missing pages after page 0. */
881 break;
882 default:
883 return -EOPNOTSUPP;
884 }
885
886 page_off = ee->offset % SFP_PAGE_SIZE;
887 page += ee->offset / SFP_PAGE_SIZE;
888
889 while (space_remaining && (page < num_pages)) {
890 rc = efx_mcdi_phy_get_module_eeprom_page(efx, page,
891 data, page_off,
892 space_remaining);
893
894 if (rc > 0) {
895 space_remaining -= rc;
896 data += rc;
897 page_off = 0;
898 page++;
899 } else if (rc == 0) {
900 space_remaining = 0;
901 } else if (ignore_missing && (page > 0)) {
902 int intended_size = SFP_PAGE_SIZE - page_off;
903
904 space_remaining -= intended_size;
905 if (space_remaining < 0) {
906 space_remaining = 0;
907 } else {
908 memset(data, 0, intended_size);
909 data += intended_size;
910 page_off = 0;
911 page++;
912 rc = 0;
913 }
914 } else {
915 return rc;
916 }
c087bd2c
SH		 917 }
918
919 return 0;
920}
921
922static int efx_mcdi_phy_get_module_info(struct efx_nic *efx,
923 struct ethtool_modinfo *modinfo)
924{
9b17010d
MH		 925 int sff_8472_level;
926 int diag_type;
c087bd2c 927
9b17010d 928 switch (efx_mcdi_phy_module_type(efx)) {
c087bd2c 929 case MC_CMD_MEDIA_SFP_PLUS:
9b17010d
MH		 930 sff_8472_level = efx_mcdi_phy_sff_8472_level(efx);
931
932 /* If we can't read the diagnostics level we have none. */
933 if (sff_8472_level < 0)
934 return -EOPNOTSUPP;
935
936 /* Check if this module requires the (unsupported) address
937 * change operation.
938 */
939 diag_type = efx_mcdi_phy_diag_type(efx);
940
941 if ((sff_8472_level == 0) ||
942 (diag_type & SFF_DIAG_ADDR_CHANGE)) {
943 modinfo->type = ETH_MODULE_SFF_8079;
944 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
945 } else {
946 modinfo->type = ETH_MODULE_SFF_8472;
947 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
948 }
949 break;
950
951 case MC_CMD_MEDIA_QSFP_PLUS:
952 modinfo->type = ETH_MODULE_SFF_8436;
953 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
954 break;
955
c087bd2c
SH		 956 default:
957 return -EOPNOTSUPP;
958 }
9b17010d
MH		 959
960 return 0;
c087bd2c
SH		 961}
962
43f775b2 963static const struct efx_phy_operations efx_mcdi_phy_ops = {
afd4aea0 964 .probe = efx_mcdi_phy_probe,
9c636baf 965 .init = efx_port_dummy_op_int,
43f775b2 966 .reconfigure = efx_mcdi_port_reconfigure,
afd4aea0 967 .poll = efx_mcdi_phy_poll,
ff3b00a0
SH		 968 .fini = efx_port_dummy_op_void,
969 .remove = efx_mcdi_phy_remove,
7cafe8f8
PR		 970 .get_link_ksettings = efx_mcdi_phy_get_link_ksettings,
971 .set_link_ksettings = efx_mcdi_phy_set_link_ksettings,
4f16c073 972 .test_alive = efx_mcdi_phy_test_alive,
affaf485
SH		 973 .run_tests = efx_mcdi_phy_run_tests,
974 .test_name = efx_mcdi_phy_test_name,
c087bd2c
SH		 975 .get_module_eeprom = efx_mcdi_phy_get_module_eeprom,
976 .get_module_info = efx_mcdi_phy_get_module_info,
afd4aea0 977};
43f775b2 978
8127d661
BH		 979u32 efx_mcdi_phy_get_caps(struct efx_nic *efx)
980{
981 struct efx_mcdi_phy_data *phy_data = efx->phy_data;
982
983 return phy_data->supported_cap;
984}
985
43f775b2
BH		 986static unsigned int efx_mcdi_event_link_speed[] = {
987 [MCDI_EVENT_LINKCHANGE_SPEED_100M] = 100,
988 [MCDI_EVENT_LINKCHANGE_SPEED_1G] = 1000,
989 [MCDI_EVENT_LINKCHANGE_SPEED_10G] = 10000,
9a12a306 990 [MCDI_EVENT_LINKCHANGE_SPEED_40G] = 40000,
702b3d51
EC		 991 [MCDI_EVENT_LINKCHANGE_SPEED_25G] = 25000,
992 [MCDI_EVENT_LINKCHANGE_SPEED_50G] = 50000,
993 [MCDI_EVENT_LINKCHANGE_SPEED_100G] = 100000,
43f775b2
BH		 994};
995
996void efx_mcdi_process_link_change(struct efx_nic *efx, efx_qword_t *ev)
997{
998 u32 flags, fcntl, speed, lpa;
999
1000 speed = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_SPEED);
e01b16a7 1001 EFX_WARN_ON_PARANOID(speed >= ARRAY_SIZE(efx_mcdi_event_link_speed));
43f775b2
BH		 1002 speed = efx_mcdi_event_link_speed[speed];
1003
1004 flags = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LINK_FLAGS);
1005 fcntl = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_FCNTL);
1006 lpa = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LP_CAP);
1007
1008 /* efx->link_state is only modified by efx_mcdi_phy_get_link(),
1009 * which is only run after flushing the event queues. Therefore, it
1010 * is safe to modify the link state outside of the mac_lock here.
1011 */
1012 efx_mcdi_phy_decode_link(efx, &efx->link_state, speed, flags, fcntl);
1013
1014 efx_mcdi_phy_check_fcntl(efx, lpa);
1015
1016 efx_link_status_changed(efx);
1017}
1018
1019int efx_mcdi_set_mac(struct efx_nic *efx)
1020{
964e6135 1021 u32 fcntl;
43f775b2
BH		 1022 MCDI_DECLARE_BUF(cmdbytes, MC_CMD_SET_MAC_IN_LEN);
1023
1024 BUILD_BUG_ON(MC_CMD_SET_MAC_OUT_LEN != 0);
1025
910c8789 1026 /* This has no effect on EF10 */
cd84ff4d
EC		 1027 ether_addr_copy(MCDI_PTR(cmdbytes, SET_MAC_IN_ADDR),
1028 efx->net_dev->dev_addr);
43f775b2
BH		 1029
1030 MCDI_SET_DWORD(cmdbytes, SET_MAC_IN_MTU,
1031 EFX_MAX_FRAME_LEN(efx->net_dev->mtu));
1032 MCDI_SET_DWORD(cmdbytes, SET_MAC_IN_DRAIN, 0);
1033
964e6135
BH		 1034 /* Set simple MAC filter for Siena */
1035 MCDI_POPULATE_DWORD_1(cmdbytes, SET_MAC_IN_REJECT,
1036 SET_MAC_IN_REJECT_UNCST, efx->unicast_filter);
43f775b2 1037
6978729f
EC		 1038 MCDI_POPULATE_DWORD_1(cmdbytes, SET_MAC_IN_FLAGS,
1039 SET_MAC_IN_FLAG_INCLUDE_FCS,
1040 !!(efx->net_dev->features & NETIF_F_RXFCS));
1041
43f775b2
BH		 1042 switch (efx->wanted_fc) {
1043 case EFX_FC_RX | EFX_FC_TX:
1044 fcntl = MC_CMD_FCNTL_BIDIR;
1045 break;
1046 case EFX_FC_RX:
1047 fcntl = MC_CMD_FCNTL_RESPOND;
1048 break;
1049 default:
1050 fcntl = MC_CMD_FCNTL_OFF;
1051 break;
1052 }
1053 if (efx->wanted_fc & EFX_FC_AUTO)
1054 fcntl = MC_CMD_FCNTL_AUTO;
1055 if (efx->fc_disable)
1056 fcntl = MC_CMD_FCNTL_OFF;
1057
1058 MCDI_SET_DWORD(cmdbytes, SET_MAC_IN_FCNTL, fcntl);
1059
1060 return efx_mcdi_rpc(efx, MC_CMD_SET_MAC, cmdbytes, sizeof(cmdbytes),
1061 NULL, 0, NULL);
1062}
1063
1064bool efx_mcdi_mac_check_fault(struct efx_nic *efx)
1065{
1066 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_LINK_OUT_LEN);
1067 size_t outlength;
1068 int rc;
1069
1070 BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0);
1071
1072 rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0,
1073 outbuf, sizeof(outbuf), &outlength);
1e0b8120 1074 if (rc)
43f775b2 1075 return true;
43f775b2
BH		 1076
1077 return MCDI_DWORD(outbuf, GET_LINK_OUT_MAC_FAULT) != 0;
1078}
1079
f8f3b5ae
JC		 1080enum efx_stats_action {
1081 EFX_STATS_ENABLE,
1082 EFX_STATS_DISABLE,
1083 EFX_STATS_PULL,
1084};
1085
1086static int efx_mcdi_mac_stats(struct efx_nic *efx,
1087 enum efx_stats_action action, int clear)
43f775b2
BH		 1088{
1089 MCDI_DECLARE_BUF(inbuf, MC_CMD_MAC_STATS_IN_LEN);
1090 int rc;
f8f3b5ae
JC		 1091 int change = action == EFX_STATS_PULL ? 0 : 1;
1092 int enable = action == EFX_STATS_ENABLE ? 1 : 0;
1093 int period = action == EFX_STATS_ENABLE ? 1000 : 0;
1094 dma_addr_t dma_addr = efx->stats_buffer.dma_addr;
1095 u32 dma_len = action != EFX_STATS_DISABLE ?
c1be4821 1096 efx->num_mac_stats * sizeof(u64) : 0;
43f775b2
BH		 1097
1098 BUILD_BUG_ON(MC_CMD_MAC_STATS_OUT_DMA_LEN != 0);
1099
1100 MCDI_SET_QWORD(inbuf, MAC_STATS_IN_DMA_ADDR, dma_addr);
f5253d92
BH		 1101 MCDI_POPULATE_DWORD_7(inbuf, MAC_STATS_IN_CMD,
1102 MAC_STATS_IN_DMA, !!enable,
1103 MAC_STATS_IN_CLEAR, clear,
f8f3b5ae
JC		 1104 MAC_STATS_IN_PERIODIC_CHANGE, change,
1105 MAC_STATS_IN_PERIODIC_ENABLE, enable,
f5253d92
BH		 1106 MAC_STATS_IN_PERIODIC_CLEAR, 0,
1107 MAC_STATS_IN_PERIODIC_NOEVENT, 1,
1108 MAC_STATS_IN_PERIOD_MS, period);
43f775b2 1109 MCDI_SET_DWORD(inbuf, MAC_STATS_IN_DMA_LEN, dma_len);
61deee96
BK		 1110
1111 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) {
1112 struct efx_ef10_nic_data *nic_data = efx->nic_data;
1113
1114 MCDI_SET_DWORD(inbuf, MAC_STATS_IN_PORT_ID, nic_data->vport_id);
1115 }
43f775b2 1116
6dd4859b
DP		 1117 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_MAC_STATS, inbuf, sizeof(inbuf),
1118 NULL, 0, NULL);
1119 /* Expect ENOENT if DMA queues have not been set up */
1120 if (rc && (rc != -ENOENT || atomic_read(&efx->active_queues)))
1121 efx_mcdi_display_error(efx, MC_CMD_MAC_STATS, sizeof(inbuf),
1122 NULL, 0, rc);
43f775b2
BH		 1123 return rc;
1124}
1125
1126void efx_mcdi_mac_start_stats(struct efx_nic *efx)
1127{
1128 __le64 *dma_stats = efx->stats_buffer.addr;
1129
c1be4821 1130 dma_stats[efx->num_mac_stats - 1] = EFX_MC_STATS_GENERATION_INVALID;
43f775b2 1131
f8f3b5ae 1132 efx_mcdi_mac_stats(efx, EFX_STATS_ENABLE, 0);
43f775b2
BH		 1133}
1134
1135void efx_mcdi_mac_stop_stats(struct efx_nic *efx)
1136{
f8f3b5ae
JC		 1137 efx_mcdi_mac_stats(efx, EFX_STATS_DISABLE, 0);
1138}
1139
1140#define EFX_MAC_STATS_WAIT_US 100
1141#define EFX_MAC_STATS_WAIT_ATTEMPTS 10
1142
1143void efx_mcdi_mac_pull_stats(struct efx_nic *efx)
1144{
1145 __le64 *dma_stats = efx->stats_buffer.addr;
1146 int attempts = EFX_MAC_STATS_WAIT_ATTEMPTS;
1147
c1be4821 1148 dma_stats[efx->num_mac_stats - 1] = EFX_MC_STATS_GENERATION_INVALID;
f8f3b5ae
JC		 1149 efx_mcdi_mac_stats(efx, EFX_STATS_PULL, 0);
1150
c1be4821 1151 while (dma_stats[efx->num_mac_stats - 1] ==
f8f3b5ae
JC		 1152 EFX_MC_STATS_GENERATION_INVALID &&
1153 attempts-- != 0)
1154 udelay(EFX_MAC_STATS_WAIT_US);
43f775b2
BH		 1155}
1156
1157int efx_mcdi_port_probe(struct efx_nic *efx)
1158{
1159 int rc;
1160
1161 /* Hook in PHY operations table */
1162 efx->phy_op = &efx_mcdi_phy_ops;
1163
1164 /* Set up MDIO structure for PHY */
1165 efx->mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
1166 efx->mdio.mdio_read = efx_mcdi_mdio_read;
1167 efx->mdio.mdio_write = efx_mcdi_mdio_write;
1168
1169 /* Fill out MDIO structure, loopback modes, and initial link state */
1170 rc = efx->phy_op->probe(efx);
1171 if (rc != 0)
1172 return rc;
1173
1174 /* Allocate buffer for stats */
1175 rc = efx_nic_alloc_buffer(efx, &efx->stats_buffer,
c1be4821 1176 efx->num_mac_stats * sizeof(u64), GFP_KERNEL);
43f775b2
BH		 1177 if (rc)
1178 return rc;
1179 netif_dbg(efx, probe, efx->net_dev,
1180 "stats buffer at %llx (virt %p phys %llx)\n",
1181 (u64)efx->stats_buffer.dma_addr,
1182 efx->stats_buffer.addr,
1183 (u64)virt_to_phys(efx->stats_buffer.addr));
1184
f8f3b5ae 1185 efx_mcdi_mac_stats(efx, EFX_STATS_DISABLE, 1);
43f775b2
BH		 1186
1187 return 0;
1188}
1189
1190void efx_mcdi_port_remove(struct efx_nic *efx)
1191{
1192 efx->phy_op->remove(efx);
1193 efx_nic_free_buffer(efx, &efx->stats_buffer);
1194}
8127d661
BH		 1195
1196/* Get physical port number (EF10 only; on Siena it is same as PF number) */
1197int efx_mcdi_port_get_number(struct efx_nic *efx)
1198{
1199 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_PORT_ASSIGNMENT_OUT_LEN);
1200 int rc;
1201
1202 rc = efx_mcdi_rpc(efx, MC_CMD_GET_PORT_ASSIGNMENT, NULL, 0,
1203 outbuf, sizeof(outbuf), NULL);
1204 if (rc)
1205 return rc;
1206
1207 return MCDI_DWORD(outbuf, GET_PORT_ASSIGNMENT_OUT_PORT);
1208}
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