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[mirror_ubuntu-hirsute-kernel.git] / drivers / net / ethernet / sfc / mcdi_port.c
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d2912cb1 1// SPDX-License-Identifier: GPL-2.0-only
afd4aea0 2/****************************************************************************
f7a6d2c4
BH		 3 * Driver for Solarflare network controllers and boards
4 * Copyright 2009-2013 Solarflare Communications Inc.
afd4aea0
BH		 5 */
6
7/*
8 * Driver for PHY related operations via MCDI.
9 */
10
5a0e3ad6 11#include <linux/slab.h>
afd4aea0 12#include "efx.h"
afd4aea0
BH		 13#include "mcdi.h"
14#include "mcdi_pcol.h"
affaf485
SH		 15#include "nic.h"
16#include "selftest.h"
afd4aea0 17
3bd93035 18struct efx_mcdi_phy_data {
afd4aea0
BH		 19 u32 flags;
20 u32 type;
21 u32 supported_cap;
22 u32 channel;
23 u32 port;
24 u32 stats_mask;
25 u8 name[20];
26 u32 media;
27 u32 mmd_mask;
28 u8 revision[20];
29 u32 forced_cap;
30};
31
32static int
3bd93035 33efx_mcdi_get_phy_cfg(struct efx_nic *efx, struct efx_mcdi_phy_data *cfg)
afd4aea0 34{
59cfc479 35 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_PHY_CFG_OUT_LEN);
afd4aea0
BH		 36 size_t outlen;
37 int rc;
38
39 BUILD_BUG_ON(MC_CMD_GET_PHY_CFG_IN_LEN != 0);
40 BUILD_BUG_ON(MC_CMD_GET_PHY_CFG_OUT_NAME_LEN != sizeof(cfg->name));
41
42 rc = efx_mcdi_rpc(efx, MC_CMD_GET_PHY_CFG, NULL, 0,
43 outbuf, sizeof(outbuf), &outlen);
44 if (rc)
45 goto fail;
46
47 if (outlen < MC_CMD_GET_PHY_CFG_OUT_LEN) {
00bbb4a5 48 rc = -EIO;
afd4aea0
BH		 49 goto fail;
50 }
51
52 cfg->flags = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_FLAGS);
53 cfg->type = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_TYPE);
54 cfg->supported_cap =
55 MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_SUPPORTED_CAP);
56 cfg->channel = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_CHANNEL);
57 cfg->port = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_PRT);
58 cfg->stats_mask = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_STATS_MASK);
59 memcpy(cfg->name, MCDI_PTR(outbuf, GET_PHY_CFG_OUT_NAME),
60 sizeof(cfg->name));
61 cfg->media = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_MEDIA_TYPE);
62 cfg->mmd_mask = MCDI_DWORD(outbuf, GET_PHY_CFG_OUT_MMD_MASK);
63 memcpy(cfg->revision, MCDI_PTR(outbuf, GET_PHY_CFG_OUT_REVISION),
64 sizeof(cfg->revision));
65
66 return 0;
67
68fail:
62776d03 69 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 70 return rc;
71}
72
73static int efx_mcdi_set_link(struct efx_nic *efx, u32 capabilities,
74 u32 flags, u32 loopback_mode,
75 u32 loopback_speed)
76{
59cfc479 77 MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_LINK_IN_LEN);
afd4aea0
BH		 78 int rc;
79
80 BUILD_BUG_ON(MC_CMD_SET_LINK_OUT_LEN != 0);
81
82 MCDI_SET_DWORD(inbuf, SET_LINK_IN_CAP, capabilities);
83 MCDI_SET_DWORD(inbuf, SET_LINK_IN_FLAGS, flags);
84 MCDI_SET_DWORD(inbuf, SET_LINK_IN_LOOPBACK_MODE, loopback_mode);
85 MCDI_SET_DWORD(inbuf, SET_LINK_IN_LOOPBACK_SPEED, loopback_speed);
86
87 rc = efx_mcdi_rpc(efx, MC_CMD_SET_LINK, inbuf, sizeof(inbuf),
88 NULL, 0, NULL);
afd4aea0
BH		 89 return rc;
90}
91
92static int efx_mcdi_loopback_modes(struct efx_nic *efx, u64 *loopback_modes)
93{
59cfc479 94 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_LOOPBACK_MODES_OUT_LEN);
afd4aea0
BH		 95 size_t outlen;
96 int rc;
97
98 rc = efx_mcdi_rpc(efx, MC_CMD_GET_LOOPBACK_MODES, NULL, 0,
99 outbuf, sizeof(outbuf), &outlen);
100 if (rc)
101 goto fail;
102
f2b0befd
BH		 103 if (outlen < (MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_OFST +
104 MC_CMD_GET_LOOPBACK_MODES_OUT_SUGGESTED_LEN)) {
00bbb4a5 105 rc = -EIO;
afd4aea0
BH		 106 goto fail;
107 }
108
05a9320f 109 *loopback_modes = MCDI_QWORD(outbuf, GET_LOOPBACK_MODES_OUT_SUGGESTED);
afd4aea0
BH		 110
111 return 0;
112
113fail:
62776d03 114 netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
afd4aea0
BH		 115 return rc;
116}
117
43f775b2
BH		 118static int efx_mcdi_mdio_read(struct net_device *net_dev,
119 int prtad, int devad, u16 addr)
afd4aea0 120{
43f775b2 121 struct efx_nic *efx = netdev_priv(net_dev);
59cfc479
BH		 122 MCDI_DECLARE_BUF(inbuf, MC_CMD_MDIO_READ_IN_LEN);
123 MCDI_DECLARE_BUF(outbuf, MC_CMD_MDIO_READ_OUT_LEN);
afd4aea0
BH		 124 size_t outlen;
125 int rc;
126
43f775b2 127 MCDI_SET_DWORD(inbuf, MDIO_READ_IN_BUS, efx->mdio_bus);
afd4aea0
BH		 128 MCDI_SET_DWORD(inbuf, MDIO_READ_IN_PRTAD, prtad);
129 MCDI_SET_DWORD(inbuf, MDIO_READ_IN_DEVAD, devad);
130 MCDI_SET_DWORD(inbuf, MDIO_READ_IN_ADDR, addr);
131
132 rc = efx_mcdi_rpc(efx, MC_CMD_MDIO_READ, inbuf, sizeof(inbuf),
133 outbuf, sizeof(outbuf), &outlen);
134 if (rc)
1e0b8120 135 return rc;
afd4aea0 136
43f775b2
BH		 137 if (MCDI_DWORD(outbuf, MDIO_READ_OUT_STATUS) !=
138 MC_CMD_MDIO_STATUS_GOOD)
139 return -EIO;
140
141 return (u16)MCDI_DWORD(outbuf, MDIO_READ_OUT_VALUE);
afd4aea0
BH		 142}
143
43f775b2
BH		 144static int efx_mcdi_mdio_write(struct net_device *net_dev,
145 int prtad, int devad, u16 addr, u16 value)
afd4aea0 146{
43f775b2 147 struct efx_nic *efx = netdev_priv(net_dev);
59cfc479
BH		 148 MCDI_DECLARE_BUF(inbuf, MC_CMD_MDIO_WRITE_IN_LEN);
149 MCDI_DECLARE_BUF(outbuf, MC_CMD_MDIO_WRITE_OUT_LEN);
afd4aea0
BH		 150 size_t outlen;
151 int rc;
152
43f775b2 153 MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_BUS, efx->mdio_bus);
afd4aea0
BH		 154 MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_PRTAD, prtad);
155 MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_DEVAD, devad);
156 MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_ADDR, addr);
157 MCDI_SET_DWORD(inbuf, MDIO_WRITE_IN_VALUE, value);
158
159 rc = efx_mcdi_rpc(efx, MC_CMD_MDIO_WRITE, inbuf, sizeof(inbuf),
160 outbuf, sizeof(outbuf), &outlen);
161 if (rc)
1e0b8120 162 return rc;
afd4aea0 163
43f775b2
BH		 164 if (MCDI_DWORD(outbuf, MDIO_WRITE_OUT_STATUS) !=
165 MC_CMD_MDIO_STATUS_GOOD)
166 return -EIO;
167
afd4aea0 168 return 0;
afd4aea0
BH		 169}
170
c2ab85d2 171static void mcdi_to_ethtool_linkset(u32 media, u32 cap, unsigned long *linkset)
afd4aea0 172{
c2ab85d2
EC		 173 #define SET_BIT(name) __set_bit(ETHTOOL_LINK_MODE_ ## name ## _BIT, \
174 linkset)
afd4aea0 175
c2ab85d2 176 bitmap_zero(linkset, __ETHTOOL_LINK_MODE_MASK_NBITS);
afd4aea0
BH		 177 switch (media) {
178 case MC_CMD_MEDIA_KX4:
c2ab85d2 179 SET_BIT(Backplane);
afd4aea0 180 if (cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN))
c2ab85d2 181 SET_BIT(1000baseKX_Full);
afd4aea0 182 if (cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN))
c2ab85d2 183 SET_BIT(10000baseKX4_Full);
ac331e94 184 if (cap & (1 << MC_CMD_PHY_CAP_40000FDX_LBN))
c2ab85d2 185 SET_BIT(40000baseKR4_Full);
afd4aea0
BH		 186 break;
187
188 case MC_CMD_MEDIA_XFP:
189 case MC_CMD_MEDIA_SFP_PLUS:
ac331e94 190 case MC_CMD_MEDIA_QSFP_PLUS:
c2ab85d2 191 SET_BIT(FIBRE);
3497ed8c 192 if (cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN))
c2ab85d2 193 SET_BIT(1000baseT_Full);
3497ed8c 194 if (cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN))
c2ab85d2 195 SET_BIT(10000baseT_Full);
ac331e94 196 if (cap & (1 << MC_CMD_PHY_CAP_40000FDX_LBN))
c2ab85d2 197 SET_BIT(40000baseCR4_Full);
5abb5e7f
EC		 198 if (cap & (1 << MC_CMD_PHY_CAP_100000FDX_LBN))
199 SET_BIT(100000baseCR4_Full);
200 if (cap & (1 << MC_CMD_PHY_CAP_25000FDX_LBN))
201 SET_BIT(25000baseCR_Full);
202 if (cap & (1 << MC_CMD_PHY_CAP_50000FDX_LBN))
203 SET_BIT(50000baseCR2_Full);
ac331e94
EC		 204 break;
205
afd4aea0 206 case MC_CMD_MEDIA_BASE_T:
c2ab85d2 207 SET_BIT(TP);
afd4aea0 208 if (cap & (1 << MC_CMD_PHY_CAP_10HDX_LBN))
c2ab85d2 209 SET_BIT(10baseT_Half);
afd4aea0 210 if (cap & (1 << MC_CMD_PHY_CAP_10FDX_LBN))
c2ab85d2 211 SET_BIT(10baseT_Full);
afd4aea0 212 if (cap & (1 << MC_CMD_PHY_CAP_100HDX_LBN))
c2ab85d2 213 SET_BIT(100baseT_Half);
afd4aea0 214 if (cap & (1 << MC_CMD_PHY_CAP_100FDX_LBN))
c2ab85d2 215 SET_BIT(100baseT_Full);
afd4aea0 216 if (cap & (1 << MC_CMD_PHY_CAP_1000HDX_LBN))
c2ab85d2 217 SET_BIT(1000baseT_Half);
afd4aea0 218 if (cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN))
c2ab85d2 219 SET_BIT(1000baseT_Full);
afd4aea0 220 if (cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN))
c2ab85d2 221 SET_BIT(10000baseT_Full);
afd4aea0
BH		 222 break;
223 }
224
225 if (cap & (1 << MC_CMD_PHY_CAP_PAUSE_LBN))
c2ab85d2 226 SET_BIT(Pause);
afd4aea0 227 if (cap & (1 << MC_CMD_PHY_CAP_ASYM_LBN))
c2ab85d2 228 SET_BIT(Asym_Pause);
afd4aea0 229 if (cap & (1 << MC_CMD_PHY_CAP_AN_LBN))
c2ab85d2 230 SET_BIT(Autoneg);
afd4aea0 231
c2ab85d2 232 #undef SET_BIT
afd4aea0
BH		 233}
234
c2ab85d2 235static u32 ethtool_linkset_to_mcdi_cap(const unsigned long *linkset)
afd4aea0
BH		 236{
237 u32 result = 0;
238
c2ab85d2
EC		 239 #define TEST_BIT(name) test_bit(ETHTOOL_LINK_MODE_ ## name ## _BIT, \
240 linkset)
241
242 if (TEST_BIT(10baseT_Half))
afd4aea0 243 result |= (1 << MC_CMD_PHY_CAP_10HDX_LBN);
c2ab85d2 244 if (TEST_BIT(10baseT_Full))
afd4aea0 245 result |= (1 << MC_CMD_PHY_CAP_10FDX_LBN);
c2ab85d2 246 if (TEST_BIT(100baseT_Half))
afd4aea0 247 result |= (1 << MC_CMD_PHY_CAP_100HDX_LBN);
c2ab85d2 248 if (TEST_BIT(100baseT_Full))
afd4aea0 249 result |= (1 << MC_CMD_PHY_CAP_100FDX_LBN);
c2ab85d2 250 if (TEST_BIT(1000baseT_Half))
afd4aea0 251 result |= (1 << MC_CMD_PHY_CAP_1000HDX_LBN);
c2ab85d2 252 if (TEST_BIT(1000baseT_Full) || TEST_BIT(1000baseKX_Full))
afd4aea0 253 result |= (1 << MC_CMD_PHY_CAP_1000FDX_LBN);
c2ab85d2 254 if (TEST_BIT(10000baseT_Full) || TEST_BIT(10000baseKX4_Full))
afd4aea0 255 result |= (1 << MC_CMD_PHY_CAP_10000FDX_LBN);
c2ab85d2 256 if (TEST_BIT(40000baseCR4_Full) || TEST_BIT(40000baseKR4_Full))
ac331e94 257 result |= (1 << MC_CMD_PHY_CAP_40000FDX_LBN);
5abb5e7f
EC		 258 if (TEST_BIT(100000baseCR4_Full))
259 result |= (1 << MC_CMD_PHY_CAP_100000FDX_LBN);
260 if (TEST_BIT(25000baseCR_Full))
261 result |= (1 << MC_CMD_PHY_CAP_25000FDX_LBN);
262 if (TEST_BIT(50000baseCR2_Full))
263 result |= (1 << MC_CMD_PHY_CAP_50000FDX_LBN);
c2ab85d2 264 if (TEST_BIT(Pause))
afd4aea0 265 result |= (1 << MC_CMD_PHY_CAP_PAUSE_LBN);
c2ab85d2 266 if (TEST_BIT(Asym_Pause))
afd4aea0 267 result |= (1 << MC_CMD_PHY_CAP_ASYM_LBN);
c2ab85d2 268 if (TEST_BIT(Autoneg))
afd4aea0
BH		 269 result |= (1 << MC_CMD_PHY_CAP_AN_LBN);
270
c2ab85d2
EC		 271 #undef TEST_BIT
272
afd4aea0
BH		 273 return result;
274}
275
276static u32 efx_get_mcdi_phy_flags(struct efx_nic *efx)
277{
3bd93035 278 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data;
afd4aea0
BH		 279 enum efx_phy_mode mode, supported;
280 u32 flags;
281
282 /* TODO: Advertise the capabilities supported by this PHY */
283 supported = 0;
05a9320f 284 if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_TXDIS_LBN))
afd4aea0 285 supported |= PHY_MODE_TX_DISABLED;
05a9320f 286 if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_LOWPOWER_LBN))
afd4aea0 287 supported |= PHY_MODE_LOW_POWER;
05a9320f 288 if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_POWEROFF_LBN))
afd4aea0
BH		 289 supported |= PHY_MODE_OFF;
290
291 mode = efx->phy_mode & supported;
292
293 flags = 0;
294 if (mode & PHY_MODE_TX_DISABLED)
05a9320f 295 flags |= (1 << MC_CMD_SET_LINK_IN_TXDIS_LBN);
afd4aea0 296 if (mode & PHY_MODE_LOW_POWER)
05a9320f 297 flags |= (1 << MC_CMD_SET_LINK_IN_LOWPOWER_LBN);
afd4aea0 298 if (mode & PHY_MODE_OFF)
05a9320f 299 flags |= (1 << MC_CMD_SET_LINK_IN_POWEROFF_LBN);
afd4aea0
BH		 300
301 return flags;
302}
303
c2ab85d2 304static u8 mcdi_to_ethtool_media(u32 media)
afd4aea0
BH		 305{
306 switch (media) {
307 case MC_CMD_MEDIA_XAUI:
308 case MC_CMD_MEDIA_CX4:
309 case MC_CMD_MEDIA_KX4:
310 return PORT_OTHER;
311
312 case MC_CMD_MEDIA_XFP:
313 case MC_CMD_MEDIA_SFP_PLUS:
ac331e94 314 case MC_CMD_MEDIA_QSFP_PLUS:
afd4aea0
BH		 315 return PORT_FIBRE;
316
317 case MC_CMD_MEDIA_BASE_T:
318 return PORT_TP;
319
320 default:
321 return PORT_OTHER;
322 }
323}
324
43f775b2
BH		 325static void efx_mcdi_phy_decode_link(struct efx_nic *efx,
326 struct efx_link_state *link_state,
327 u32 speed, u32 flags, u32 fcntl)
328{
329 switch (fcntl) {
330 case MC_CMD_FCNTL_AUTO:
331 WARN_ON(1); /* This is not a link mode */
332 link_state->fc = EFX_FC_AUTO | EFX_FC_TX | EFX_FC_RX;
333 break;
334 case MC_CMD_FCNTL_BIDIR:
335 link_state->fc = EFX_FC_TX | EFX_FC_RX;
336 break;
337 case MC_CMD_FCNTL_RESPOND:
338 link_state->fc = EFX_FC_RX;
339 break;
340 default:
341 WARN_ON(1);
4a46a7c3 342 /* Fall through */
43f775b2
BH		 343 case MC_CMD_FCNTL_OFF:
344 link_state->fc = 0;
345 break;
346 }
347
348 link_state->up = !!(flags & (1 << MC_CMD_GET_LINK_OUT_LINK_UP_LBN));
349 link_state->fd = !!(flags & (1 << MC_CMD_GET_LINK_OUT_FULL_DUPLEX_LBN));
350 link_state->speed = speed;
351}
352
7f61e6c6
EC		 353/* The semantics of the ethtool FEC mode bitmask are not well defined,
354 * particularly the meaning of combinations of bits. Which means we get to
355 * define our own semantics, as follows:
356 * OFF overrides any other bits, and means "disable all FEC" (with the
357 * exception of 25G KR4/CR4, where it is not possible to reject it if AN
358 * partner requests it).
359 * AUTO on its own means use cable requirements and link partner autoneg with
360 * fw-default preferences for the cable type.
361 * AUTO and either RS or BASER means use the specified FEC type if cable and
362 * link partner support it, otherwise autoneg/fw-default.
363 * RS or BASER alone means use the specified FEC type if cable and link partner
364 * support it and either requests it, otherwise no FEC.
365 * Both RS and BASER (whether AUTO or not) means use FEC if cable and link
366 * partner support it, preferring RS to BASER.
367 */
368static u32 ethtool_fec_caps_to_mcdi(u32 ethtool_cap)
369{
370 u32 ret = 0;
371
372 if (ethtool_cap & ETHTOOL_FEC_OFF)
373 return 0;
374
375 if (ethtool_cap & ETHTOOL_FEC_AUTO)
376 ret |= (1 << MC_CMD_PHY_CAP_BASER_FEC_LBN) |
377 (1 << MC_CMD_PHY_CAP_25G_BASER_FEC_LBN) |
378 (1 << MC_CMD_PHY_CAP_RS_FEC_LBN);
379 if (ethtool_cap & ETHTOOL_FEC_RS)
380 ret |= (1 << MC_CMD_PHY_CAP_RS_FEC_LBN) |
381 (1 << MC_CMD_PHY_CAP_RS_FEC_REQUESTED_LBN);
382 if (ethtool_cap & ETHTOOL_FEC_BASER)
383 ret |= (1 << MC_CMD_PHY_CAP_BASER_FEC_LBN) |
384 (1 << MC_CMD_PHY_CAP_25G_BASER_FEC_LBN) |
385 (1 << MC_CMD_PHY_CAP_BASER_FEC_REQUESTED_LBN) |
386 (1 << MC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_LBN);
387 return ret;
388}
389
390/* Invert ethtool_fec_caps_to_mcdi. There are two combinations that function
391 * can never produce, (baser xor rs) and neither req; the implementation below
392 * maps both of those to AUTO. This should never matter, and it's not clear
393 * what a better mapping would be anyway.
394 */
395static u32 mcdi_fec_caps_to_ethtool(u32 caps, bool is_25g)
396{
397 bool rs = caps & (1 << MC_CMD_PHY_CAP_RS_FEC_LBN),
398 rs_req = caps & (1 << MC_CMD_PHY_CAP_RS_FEC_REQUESTED_LBN),
399 baser = is_25g ? caps & (1 << MC_CMD_PHY_CAP_25G_BASER_FEC_LBN)
400 : caps & (1 << MC_CMD_PHY_CAP_BASER_FEC_LBN),
401 baser_req = is_25g ? caps & (1 << MC_CMD_PHY_CAP_25G_BASER_FEC_REQUESTED_LBN)
402 : caps & (1 << MC_CMD_PHY_CAP_BASER_FEC_REQUESTED_LBN);
403
404 if (!baser && !rs)
405 return ETHTOOL_FEC_OFF;
406 return (rs_req ? ETHTOOL_FEC_RS : 0) |
407 (baser_req ? ETHTOOL_FEC_BASER : 0) |
408 (baser == baser_req && rs == rs_req ? 0 : ETHTOOL_FEC_AUTO);
409}
410
afd4aea0
BH		 411static int efx_mcdi_phy_probe(struct efx_nic *efx)
412{
3bd93035 413 struct efx_mcdi_phy_data *phy_data;
59cfc479 414 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_LINK_OUT_LEN);
ff3b00a0 415 u32 caps;
afd4aea0
BH		 416 int rc;
417
ff3b00a0
SH		 418 /* Initialise and populate phy_data */
419 phy_data = kzalloc(sizeof(*phy_data), GFP_KERNEL);
420 if (phy_data == NULL)
421 return -ENOMEM;
422
423 rc = efx_mcdi_get_phy_cfg(efx, phy_data);
afd4aea0
BH		 424 if (rc != 0)
425 goto fail;
426
ff3b00a0
SH		 427 /* Read initial link advertisement */
428 BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0);
429 rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0,
430 outbuf, sizeof(outbuf), NULL);
431 if (rc)
432 goto fail;
433
434 /* Fill out nic state */
435 efx->phy_data = phy_data;
436 efx->phy_type = phy_data->type;
afd4aea0 437
ff3b00a0
SH		 438 efx->mdio_bus = phy_data->channel;
439 efx->mdio.prtad = phy_data->port;
440 efx->mdio.mmds = phy_data->mmd_mask & ~(1 << MC_CMD_MMD_CLAUSE22);
afd4aea0 441 efx->mdio.mode_support = 0;
ff3b00a0 442 if (phy_data->mmd_mask & (1 << MC_CMD_MMD_CLAUSE22))
afd4aea0 443 efx->mdio.mode_support |= MDIO_SUPPORTS_C22;
ff3b00a0 444 if (phy_data->mmd_mask & ~(1 << MC_CMD_MMD_CLAUSE22))
afd4aea0
BH		 445 efx->mdio.mode_support |= MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
446
ff3b00a0
SH		 447 caps = MCDI_DWORD(outbuf, GET_LINK_OUT_CAP);
448 if (caps & (1 << MC_CMD_PHY_CAP_AN_LBN))
c2ab85d2
EC		 449 mcdi_to_ethtool_linkset(phy_data->media, caps,
450 efx->link_advertising);
ff3b00a0
SH		 451 else
452 phy_data->forced_cap = caps;
453
afd4aea0
BH		 454 /* Assert that we can map efx -> mcdi loopback modes */
455 BUILD_BUG_ON(LOOPBACK_NONE != MC_CMD_LOOPBACK_NONE);
456 BUILD_BUG_ON(LOOPBACK_DATA != MC_CMD_LOOPBACK_DATA);
457 BUILD_BUG_ON(LOOPBACK_GMAC != MC_CMD_LOOPBACK_GMAC);
458 BUILD_BUG_ON(LOOPBACK_XGMII != MC_CMD_LOOPBACK_XGMII);
459 BUILD_BUG_ON(LOOPBACK_XGXS != MC_CMD_LOOPBACK_XGXS);
460 BUILD_BUG_ON(LOOPBACK_XAUI != MC_CMD_LOOPBACK_XAUI);
461 BUILD_BUG_ON(LOOPBACK_GMII != MC_CMD_LOOPBACK_GMII);
462 BUILD_BUG_ON(LOOPBACK_SGMII != MC_CMD_LOOPBACK_SGMII);
463 BUILD_BUG_ON(LOOPBACK_XGBR != MC_CMD_LOOPBACK_XGBR);
464 BUILD_BUG_ON(LOOPBACK_XFI != MC_CMD_LOOPBACK_XFI);
465 BUILD_BUG_ON(LOOPBACK_XAUI_FAR != MC_CMD_LOOPBACK_XAUI_FAR);
466 BUILD_BUG_ON(LOOPBACK_GMII_FAR != MC_CMD_LOOPBACK_GMII_FAR);
467 BUILD_BUG_ON(LOOPBACK_SGMII_FAR != MC_CMD_LOOPBACK_SGMII_FAR);
468 BUILD_BUG_ON(LOOPBACK_XFI_FAR != MC_CMD_LOOPBACK_XFI_FAR);
469 BUILD_BUG_ON(LOOPBACK_GPHY != MC_CMD_LOOPBACK_GPHY);
470 BUILD_BUG_ON(LOOPBACK_PHYXS != MC_CMD_LOOPBACK_PHYXS);
471 BUILD_BUG_ON(LOOPBACK_PCS != MC_CMD_LOOPBACK_PCS);
472 BUILD_BUG_ON(LOOPBACK_PMAPMD != MC_CMD_LOOPBACK_PMAPMD);
473 BUILD_BUG_ON(LOOPBACK_XPORT != MC_CMD_LOOPBACK_XPORT);
474 BUILD_BUG_ON(LOOPBACK_XGMII_WS != MC_CMD_LOOPBACK_XGMII_WS);
475 BUILD_BUG_ON(LOOPBACK_XAUI_WS != MC_CMD_LOOPBACK_XAUI_WS);
476 BUILD_BUG_ON(LOOPBACK_XAUI_WS_FAR != MC_CMD_LOOPBACK_XAUI_WS_FAR);
477 BUILD_BUG_ON(LOOPBACK_XAUI_WS_NEAR != MC_CMD_LOOPBACK_XAUI_WS_NEAR);
478 BUILD_BUG_ON(LOOPBACK_GMII_WS != MC_CMD_LOOPBACK_GMII_WS);
479 BUILD_BUG_ON(LOOPBACK_XFI_WS != MC_CMD_LOOPBACK_XFI_WS);
480 BUILD_BUG_ON(LOOPBACK_XFI_WS_FAR != MC_CMD_LOOPBACK_XFI_WS_FAR);
481 BUILD_BUG_ON(LOOPBACK_PHYXS_WS != MC_CMD_LOOPBACK_PHYXS_WS);
482
483 rc = efx_mcdi_loopback_modes(efx, &efx->loopback_modes);
484 if (rc != 0)
485 goto fail;
486 /* The MC indicates that LOOPBACK_NONE is a valid loopback mode,
487 * but by convention we don't */
488 efx->loopback_modes &= ~(1 << LOOPBACK_NONE);
489
7a6b8f6f
SH		 490 /* Set the initial link mode */
491 efx_mcdi_phy_decode_link(
492 efx, &efx->link_state,
493 MCDI_DWORD(outbuf, GET_LINK_OUT_LINK_SPEED),
494 MCDI_DWORD(outbuf, GET_LINK_OUT_FLAGS),
495 MCDI_DWORD(outbuf, GET_LINK_OUT_FCNTL));
496
7f61e6c6
EC		 497 /* Record the initial FEC configuration (or nearest approximation
498 * representable in the ethtool configuration space)
499 */
500 efx->fec_config = mcdi_fec_caps_to_ethtool(caps,
501 efx->link_state.speed == 25000 ||
502 efx->link_state.speed == 50000);
503
7a6b8f6f
SH		 504 /* Default to Autonegotiated flow control if the PHY supports it */
505 efx->wanted_fc = EFX_FC_RX | EFX_FC_TX;
506 if (phy_data->supported_cap & (1 << MC_CMD_PHY_CAP_AN_LBN))
507 efx->wanted_fc |= EFX_FC_AUTO;
cffe9d4c 508 efx_link_set_wanted_fc(efx, efx->wanted_fc);
7a6b8f6f 509
afd4aea0
BH		 510 return 0;
511
512fail:
513 kfree(phy_data);
514 return rc;
515}
516
43f775b2 517int efx_mcdi_port_reconfigure(struct efx_nic *efx)
afd4aea0 518{
3bd93035 519 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data;
c2ab85d2
EC		 520 u32 caps = (efx->link_advertising[0] ?
521 ethtool_linkset_to_mcdi_cap(efx->link_advertising) :
afd4aea0
BH		 522 phy_cfg->forced_cap);
523
7f61e6c6
EC		 524 caps |= ethtool_fec_caps_to_mcdi(efx->fec_config);
525
afd4aea0
BH		 526 return efx_mcdi_set_link(efx, caps, efx_get_mcdi_phy_flags(efx),
527 efx->loopback_mode, 0);
528}
529
afd4aea0
BH		 530/* Verify that the forced flow control settings (!EFX_FC_AUTO) are
531 * supported by the link partner. Warn the user if this isn't the case
532 */
43f775b2 533static void efx_mcdi_phy_check_fcntl(struct efx_nic *efx, u32 lpa)
afd4aea0 534{
3bd93035 535 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data;
afd4aea0
BH		 536 u32 rmtadv;
537
25985edc 538 /* The link partner capabilities are only relevant if the
afd4aea0 539 * link supports flow control autonegotiation */
7a6b8f6f 540 if (~phy_cfg->supported_cap & (1 << MC_CMD_PHY_CAP_AN_LBN))
afd4aea0
BH		 541 return;
542
543 /* If flow control autoneg is supported and enabled, then fine */
544 if (efx->wanted_fc & EFX_FC_AUTO)
545 return;
546
547 rmtadv = 0;
548 if (lpa & (1 << MC_CMD_PHY_CAP_PAUSE_LBN))
549 rmtadv |= ADVERTISED_Pause;
550 if (lpa & (1 << MC_CMD_PHY_CAP_ASYM_LBN))
551 rmtadv |= ADVERTISED_Asym_Pause;
552
553 if ((efx->wanted_fc & EFX_FC_TX) && rmtadv == ADVERTISED_Asym_Pause)
62776d03
BH		 554 netif_err(efx, link, efx->net_dev,
555 "warning: link partner doesn't support pause frames");
afd4aea0
BH		 556}
557
558static bool efx_mcdi_phy_poll(struct efx_nic *efx)
559{
560 struct efx_link_state old_state = efx->link_state;
59cfc479 561 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_LINK_OUT_LEN);
afd4aea0
BH		 562 int rc;
563
564 WARN_ON(!mutex_is_locked(&efx->mac_lock));
565
566 BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0);
567
568 rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0,
569 outbuf, sizeof(outbuf), NULL);
1e0b8120 570 if (rc)
afd4aea0 571 efx->link_state.up = false;
1e0b8120 572 else
afd4aea0
BH		 573 efx_mcdi_phy_decode_link(
574 efx, &efx->link_state,
575 MCDI_DWORD(outbuf, GET_LINK_OUT_LINK_SPEED),
576 MCDI_DWORD(outbuf, GET_LINK_OUT_FLAGS),
577 MCDI_DWORD(outbuf, GET_LINK_OUT_FCNTL));
afd4aea0
BH		 578
579 return !efx_link_state_equal(&efx->link_state, &old_state);
580}
581
ff3b00a0 582static void efx_mcdi_phy_remove(struct efx_nic *efx)
afd4aea0
BH		 583{
584 struct efx_mcdi_phy_data *phy_data = efx->phy_data;
585
586 efx->phy_data = NULL;
587 kfree(phy_data);
588}
589
7cafe8f8
PR		 590static void efx_mcdi_phy_get_link_ksettings(struct efx_nic *efx,
591 struct ethtool_link_ksettings *cmd)
afd4aea0 592{
3bd93035 593 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data;
59cfc479 594 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_LINK_OUT_LEN);
afd4aea0 595 int rc;
7cafe8f8 596
7cafe8f8
PR		 597 cmd->base.speed = efx->link_state.speed;
598 cmd->base.duplex = efx->link_state.fd;
599 cmd->base.port = mcdi_to_ethtool_media(phy_cfg->media);
600 cmd->base.phy_address = phy_cfg->port;
c2ab85d2 601 cmd->base.autoneg = !!(efx->link_advertising[0] & ADVERTISED_Autoneg);
7cafe8f8 602 cmd->base.mdio_support = (efx->mdio.mode_support &
afd4aea0
BH		 603 (MDIO_SUPPORTS_C45 | MDIO_SUPPORTS_C22));
604
c2ab85d2
EC		 605 mcdi_to_ethtool_linkset(phy_cfg->media, phy_cfg->supported_cap,
606 cmd->link_modes.supported);
607 memcpy(cmd->link_modes.advertising, efx->link_advertising,
608 sizeof(__ETHTOOL_DECLARE_LINK_MODE_MASK()));
7cafe8f8 609
afd4aea0
BH		 610 BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0);
611 rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0,
612 outbuf, sizeof(outbuf), NULL);
1e0b8120 613 if (rc)
afd4aea0 614 return;
c2ab85d2
EC		 615 mcdi_to_ethtool_linkset(phy_cfg->media,
616 MCDI_DWORD(outbuf, GET_LINK_OUT_LP_CAP),
617 cmd->link_modes.lp_advertising);
afd4aea0
BH		 618}
619
7cafe8f8
PR		 620static int
621efx_mcdi_phy_set_link_ksettings(struct efx_nic *efx,
622 const struct ethtool_link_ksettings *cmd)
afd4aea0 623{
3bd93035 624 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data;
afd4aea0
BH		 625 u32 caps;
626 int rc;
627
7cafe8f8 628 if (cmd->base.autoneg) {
c2ab85d2
EC		 629 caps = (ethtool_linkset_to_mcdi_cap(cmd->link_modes.advertising) |
630 1 << MC_CMD_PHY_CAP_AN_LBN);
7cafe8f8
PR		 631 } else if (cmd->base.duplex) {
632 switch (cmd->base.speed) {
702b3d51
EC		 633 case 10: caps = 1 << MC_CMD_PHY_CAP_10FDX_LBN; break;
634 case 100: caps = 1 << MC_CMD_PHY_CAP_100FDX_LBN; break;
635 case 1000: caps = 1 << MC_CMD_PHY_CAP_1000FDX_LBN; break;
636 case 10000: caps = 1 << MC_CMD_PHY_CAP_10000FDX_LBN; break;
637 case 40000: caps = 1 << MC_CMD_PHY_CAP_40000FDX_LBN; break;
638 case 100000: caps = 1 << MC_CMD_PHY_CAP_100000FDX_LBN; break;
639 case 25000: caps = 1 << MC_CMD_PHY_CAP_25000FDX_LBN; break;
640 case 50000: caps = 1 << MC_CMD_PHY_CAP_50000FDX_LBN; break;
641 default: return -EINVAL;
afd4aea0
BH		 642 }
643 } else {
7cafe8f8 644 switch (cmd->base.speed) {
702b3d51
EC		 645 case 10: caps = 1 << MC_CMD_PHY_CAP_10HDX_LBN; break;
646 case 100: caps = 1 << MC_CMD_PHY_CAP_100HDX_LBN; break;
647 case 1000: caps = 1 << MC_CMD_PHY_CAP_1000HDX_LBN; break;
648 default: return -EINVAL;
afd4aea0
BH		 649 }
650 }
651
7f61e6c6
EC		 652 caps |= ethtool_fec_caps_to_mcdi(efx->fec_config);
653
afd4aea0
BH		 654 rc = efx_mcdi_set_link(efx, caps, efx_get_mcdi_phy_flags(efx),
655 efx->loopback_mode, 0);
656 if (rc)
657 return rc;
658
7cafe8f8 659 if (cmd->base.autoneg) {
c2ab85d2 660 efx_link_set_advertising(efx, cmd->link_modes.advertising);
afd4aea0
BH		 661 phy_cfg->forced_cap = 0;
662 } else {
c2ab85d2 663 efx_link_clear_advertising(efx);
afd4aea0
BH		 664 phy_cfg->forced_cap = caps;
665 }
666 return 0;
667}
668
7f61e6c6
EC		 669static int efx_mcdi_phy_get_fecparam(struct efx_nic *efx,
670 struct ethtool_fecparam *fec)
671{
672 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_LINK_OUT_V2_LEN);
673 u32 caps, active, speed; /* MCDI format */
674 bool is_25g = false;
675 size_t outlen;
676 int rc;
677
678 BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0);
679 rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0,
680 outbuf, sizeof(outbuf), &outlen);
681 if (rc)
682 return rc;
683 if (outlen < MC_CMD_GET_LINK_OUT_V2_LEN)
684 return -EOPNOTSUPP;
685
686 /* behaviour for 25G/50G links depends on 25G BASER bit */
687 speed = MCDI_DWORD(outbuf, GET_LINK_OUT_V2_LINK_SPEED);
688 is_25g = speed == 25000 || speed == 50000;
689
690 caps = MCDI_DWORD(outbuf, GET_LINK_OUT_V2_CAP);
691 fec->fec = mcdi_fec_caps_to_ethtool(caps, is_25g);
692 /* BASER is never supported on 100G */
693 if (speed == 100000)
694 fec->fec &= ~ETHTOOL_FEC_BASER;
695
696 active = MCDI_DWORD(outbuf, GET_LINK_OUT_V2_FEC_TYPE);
697 switch (active) {
698 case MC_CMD_FEC_NONE:
699 fec->active_fec = ETHTOOL_FEC_OFF;
700 break;
701 case MC_CMD_FEC_BASER:
702 fec->active_fec = ETHTOOL_FEC_BASER;
703 break;
704 case MC_CMD_FEC_RS:
705 fec->active_fec = ETHTOOL_FEC_RS;
706 break;
707 default:
708 netif_warn(efx, hw, efx->net_dev,
709 "Firmware reports unrecognised FEC_TYPE %u\n",
710 active);
711 /* We don't know what firmware has picked. AUTO is as good a
712 * "can't happen" value as any other.
713 */
714 fec->active_fec = ETHTOOL_FEC_AUTO;
715 break;
716 }
717
718 return 0;
719}
720
721static int efx_mcdi_phy_set_fecparam(struct efx_nic *efx,
722 const struct ethtool_fecparam *fec)
723{
724 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data;
725 u32 caps;
726 int rc;
727
728 /* Work out what efx_mcdi_phy_set_link_ksettings() would produce from
729 * saved advertising bits
730 */
731 if (test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, efx->link_advertising))
732 caps = (ethtool_linkset_to_mcdi_cap(efx->link_advertising) |
733 1 << MC_CMD_PHY_CAP_AN_LBN);
734 else
735 caps = phy_cfg->forced_cap;
736
737 caps |= ethtool_fec_caps_to_mcdi(fec->fec);
738 rc = efx_mcdi_set_link(efx, caps, efx_get_mcdi_phy_flags(efx),
739 efx->loopback_mode, 0);
740 if (rc)
741 return rc;
742
743 /* Record the new FEC setting for subsequent set_link calls */
744 efx->fec_config = fec->fec;
745 return 0;
746}
747
4f16c073
BH		 748static int efx_mcdi_phy_test_alive(struct efx_nic *efx)
749{
59cfc479 750 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_PHY_STATE_OUT_LEN);
4f16c073
BH		 751 size_t outlen;
752 int rc;
753
754 BUILD_BUG_ON(MC_CMD_GET_PHY_STATE_IN_LEN != 0);
755
756 rc = efx_mcdi_rpc(efx, MC_CMD_GET_PHY_STATE, NULL, 0,
757 outbuf, sizeof(outbuf), &outlen);
758 if (rc)
759 return rc;
760
761 if (outlen < MC_CMD_GET_PHY_STATE_OUT_LEN)
00bbb4a5 762 return -EIO;
05a9320f 763 if (MCDI_DWORD(outbuf, GET_PHY_STATE_OUT_STATE) != MC_CMD_PHY_STATE_OK)
4f16c073
BH		 764 return -EINVAL;
765
766 return 0;
767}
768
affaf485
SH		 769static const char *const mcdi_sft9001_cable_diag_names[] = {
770 "cable.pairA.length",
771 "cable.pairB.length",
772 "cable.pairC.length",
773 "cable.pairD.length",
774 "cable.pairA.status",
775 "cable.pairB.status",
776 "cable.pairC.status",
777 "cable.pairD.status",
778};
779
780static int efx_mcdi_bist(struct efx_nic *efx, unsigned int bist_mode,
781 int *results)
782{
783 unsigned int retry, i, count = 0;
784 size_t outlen;
785 u32 status;
c5bb0e98
BH		 786 MCDI_DECLARE_BUF(inbuf, MC_CMD_START_BIST_IN_LEN);
787 MCDI_DECLARE_BUF(outbuf, MC_CMD_POLL_BIST_OUT_SFT9001_LEN);
788 u8 *ptr;
affaf485
SH		 789 int rc;
790
affaf485 791 BUILD_BUG_ON(MC_CMD_START_BIST_OUT_LEN != 0);
c5bb0e98
BH		 792 MCDI_SET_DWORD(inbuf, START_BIST_IN_TYPE, bist_mode);
793 rc = efx_mcdi_rpc(efx, MC_CMD_START_BIST,
794 inbuf, MC_CMD_START_BIST_IN_LEN, NULL, 0, NULL);
affaf485
SH		 795 if (rc)
796 goto out;
797
798 /* Wait up to 10s for BIST to finish */
799 for (retry = 0; retry < 100; ++retry) {
800 BUILD_BUG_ON(MC_CMD_POLL_BIST_IN_LEN != 0);
801 rc = efx_mcdi_rpc(efx, MC_CMD_POLL_BIST, NULL, 0,
c5bb0e98 802 outbuf, sizeof(outbuf), &outlen);
affaf485
SH		 803 if (rc)
804 goto out;
805
c5bb0e98 806 status = MCDI_DWORD(outbuf, POLL_BIST_OUT_RESULT);
affaf485
SH		 807 if (status != MC_CMD_POLL_BIST_RUNNING)
808 goto finished;
809
810 msleep(100);
811 }
812
813 rc = -ETIMEDOUT;
814 goto out;
815
816finished:
817 results[count++] = (status == MC_CMD_POLL_BIST_PASSED) ? 1 : -1;
818
819 /* SFT9001 specific cable diagnostics output */
820 if (efx->phy_type == PHY_TYPE_SFT9001B &&
821 (bist_mode == MC_CMD_PHY_BIST_CABLE_SHORT ||
822 bist_mode == MC_CMD_PHY_BIST_CABLE_LONG)) {
c5bb0e98 823 ptr = MCDI_PTR(outbuf, POLL_BIST_OUT_SFT9001_CABLE_LENGTH_A);
affaf485
SH		 824 if (status == MC_CMD_POLL_BIST_PASSED &&
825 outlen >= MC_CMD_POLL_BIST_OUT_SFT9001_LEN) {
826 for (i = 0; i < 8; i++) {
827 results[count + i] =
828 EFX_DWORD_FIELD(((efx_dword_t *)ptr)[i],
829 EFX_DWORD_0);
830 }
831 }
832 count += 8;
833 }
834 rc = count;
835
836out:
affaf485
SH		 837 return rc;
838}
839
840static int efx_mcdi_phy_run_tests(struct efx_nic *efx, int *results,
841 unsigned flags)
842{
3bd93035 843 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data;
affaf485
SH		 844 u32 mode;
845 int rc;
846
05a9320f 847 if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_LBN)) {
affaf485
SH		 848 rc = efx_mcdi_bist(efx, MC_CMD_PHY_BIST, results);
849 if (rc < 0)
850 return rc;
851
852 results += rc;
853 }
854
855 /* If we support both LONG and SHORT, then run each in response to
856 * break or not. Otherwise, run the one we support */
857 mode = 0;
05a9320f 858 if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_SHORT_LBN)) {
affaf485
SH		 859 if ((flags & ETH_TEST_FL_OFFLINE) &&
860 (phy_cfg->flags &
05a9320f 861 (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_LONG_LBN)))
affaf485
SH		 862 mode = MC_CMD_PHY_BIST_CABLE_LONG;
863 else
864 mode = MC_CMD_PHY_BIST_CABLE_SHORT;
865 } else if (phy_cfg->flags &
05a9320f 866 (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_LONG_LBN))
affaf485
SH		 867 mode = MC_CMD_PHY_BIST_CABLE_LONG;
868
869 if (mode != 0) {
870 rc = efx_mcdi_bist(efx, mode, results);
871 if (rc < 0)
872 return rc;
873 results += rc;
874 }
875
876 return 0;
877}
878
d215697f 879static const char *efx_mcdi_phy_test_name(struct efx_nic *efx,
880 unsigned int index)
affaf485 881{
3bd93035 882 struct efx_mcdi_phy_data *phy_cfg = efx->phy_data;
affaf485 883
05a9320f 884 if (phy_cfg->flags & (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_LBN)) {
affaf485
SH		 885 if (index == 0)
886 return "bist";
887 --index;
888 }
889
05a9320f
BH		 890 if (phy_cfg->flags & ((1 << MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_SHORT_LBN) |
891 (1 << MC_CMD_GET_PHY_CFG_OUT_BIST_CABLE_LONG_LBN))) {
affaf485
SH		 892 if (index == 0)
893 return "cable";
894 --index;
895
896 if (efx->phy_type == PHY_TYPE_SFT9001B) {
897 if (index < ARRAY_SIZE(mcdi_sft9001_cable_diag_names))
898 return mcdi_sft9001_cable_diag_names[index];
899 index -= ARRAY_SIZE(mcdi_sft9001_cable_diag_names);
900 }
901 }
902
903 return NULL;
904}
905
9b17010d
MH		 906#define SFP_PAGE_SIZE 128
907#define SFF_DIAG_TYPE_OFFSET 92
908#define SFF_DIAG_ADDR_CHANGE BIT(2)
909#define SFF_8079_NUM_PAGES 2
910#define SFF_8472_NUM_PAGES 4
911#define SFF_8436_NUM_PAGES 5
912#define SFF_DMT_LEVEL_OFFSET 94
913
914/** efx_mcdi_phy_get_module_eeprom_page() - Get a single page of module eeprom
915 * @efx: NIC context
916 * @page: EEPROM page number
917 * @data: Destination data pointer
918 * @offset: Offset in page to copy from in to data
919 * @space: Space available in data
920 *
921 * Return:
922 * >=0 - amount of data copied
923 * <0 - error
924 */
925static int efx_mcdi_phy_get_module_eeprom_page(struct efx_nic *efx,
926 unsigned int page,
927 u8 *data, ssize_t offset,
928 ssize_t space)
c087bd2c 929{
59cfc479
BH		 930 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_PHY_MEDIA_INFO_OUT_LENMAX);
931 MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_PHY_MEDIA_INFO_IN_LEN);
c087bd2c 932 size_t outlen;
c087bd2c 933 unsigned int payload_len;
c087bd2c 934 unsigned int to_copy;
9b17010d 935 int rc;
c087bd2c 936
9b17010d
MH		 937 if (offset > SFP_PAGE_SIZE)
938 return -EINVAL;
c087bd2c 939
9b17010d 940 to_copy = min(space, SFP_PAGE_SIZE - offset);
c087bd2c 941
9b17010d
MH		 942 MCDI_SET_DWORD(inbuf, GET_PHY_MEDIA_INFO_IN_PAGE, page);
943 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_PHY_MEDIA_INFO,
944 inbuf, sizeof(inbuf),
945 outbuf, sizeof(outbuf),
946 &outlen);
c087bd2c 947
9b17010d
MH		 948 if (rc)
949 return rc;
c087bd2c 950
9b17010d
MH		 951 if (outlen < (MC_CMD_GET_PHY_MEDIA_INFO_OUT_DATA_OFST +
952 SFP_PAGE_SIZE))
953 return -EIO;
c087bd2c 954
9b17010d
MH		 955 payload_len = MCDI_DWORD(outbuf, GET_PHY_MEDIA_INFO_OUT_DATALEN);
956 if (payload_len != SFP_PAGE_SIZE)
957 return -EIO;
c087bd2c 958
9b17010d
MH		 959 memcpy(data, MCDI_PTR(outbuf, GET_PHY_MEDIA_INFO_OUT_DATA) + offset,
960 to_copy);
c087bd2c 961
9b17010d
MH		 962 return to_copy;
963}
c087bd2c 964
9b17010d
MH		 965static int efx_mcdi_phy_get_module_eeprom_byte(struct efx_nic *efx,
966 unsigned int page,
967 u8 byte)
968{
969 int rc;
970 u8 data;
971
972 rc = efx_mcdi_phy_get_module_eeprom_page(efx, page, &data, byte, 1);
973 if (rc == 1)
974 return data;
975
976 return rc;
977}
978
979static int efx_mcdi_phy_diag_type(struct efx_nic *efx)
980{
981 /* Page zero of the EEPROM includes the diagnostic type at byte 92. */
982 return efx_mcdi_phy_get_module_eeprom_byte(efx, 0,
983 SFF_DIAG_TYPE_OFFSET);
984}
985
986static int efx_mcdi_phy_sff_8472_level(struct efx_nic *efx)
987{
988 /* Page zero of the EEPROM includes the DMT level at byte 94. */
989 return efx_mcdi_phy_get_module_eeprom_byte(efx, 0,
990 SFF_DMT_LEVEL_OFFSET);
991}
992
993static u32 efx_mcdi_phy_module_type(struct efx_nic *efx)
994{
995 struct efx_mcdi_phy_data *phy_data = efx->phy_data;
996
997 if (phy_data->media != MC_CMD_MEDIA_QSFP_PLUS)
998 return phy_data->media;
999
1000 /* A QSFP+ NIC may actually have an SFP+ module attached.
1001 * The ID is page 0, byte 0.
1002 */
1003 switch (efx_mcdi_phy_get_module_eeprom_byte(efx, 0, 0)) {
1004 case 0x3:
1005 return MC_CMD_MEDIA_SFP_PLUS;
1006 case 0xc:
1007 case 0xd:
1008 return MC_CMD_MEDIA_QSFP_PLUS;
1009 default:
1010 return 0;
1011 }
1012}
1013
1014static int efx_mcdi_phy_get_module_eeprom(struct efx_nic *efx,
1015 struct ethtool_eeprom *ee, u8 *data)
1016{
1017 int rc;
1018 ssize_t space_remaining = ee->len;
1019 unsigned int page_off;
1020 bool ignore_missing;
1021 int num_pages;
1022 int page;
1023
1024 switch (efx_mcdi_phy_module_type(efx)) {
1025 case MC_CMD_MEDIA_SFP_PLUS:
1026 num_pages = efx_mcdi_phy_sff_8472_level(efx) > 0 ?
1027 SFF_8472_NUM_PAGES : SFF_8079_NUM_PAGES;
1028 page = 0;
1029 ignore_missing = false;
1030 break;
1031 case MC_CMD_MEDIA_QSFP_PLUS:
1032 num_pages = SFF_8436_NUM_PAGES;
1033 page = -1; /* We obtain the lower page by asking for -1. */
1034 ignore_missing = true; /* Ignore missing pages after page 0. */
1035 break;
1036 default:
1037 return -EOPNOTSUPP;
1038 }
1039
1040 page_off = ee->offset % SFP_PAGE_SIZE;
1041 page += ee->offset / SFP_PAGE_SIZE;
1042
1043 while (space_remaining && (page < num_pages)) {
1044 rc = efx_mcdi_phy_get_module_eeprom_page(efx, page,
1045 data, page_off,
1046 space_remaining);
1047
1048 if (rc > 0) {
1049 space_remaining -= rc;
1050 data += rc;
1051 page_off = 0;
1052 page++;
1053 } else if (rc == 0) {
1054 space_remaining = 0;
1055 } else if (ignore_missing && (page > 0)) {
1056 int intended_size = SFP_PAGE_SIZE - page_off;
1057
1058 space_remaining -= intended_size;
1059 if (space_remaining < 0) {
1060 space_remaining = 0;
1061 } else {
1062 memset(data, 0, intended_size);
1063 data += intended_size;
1064 page_off = 0;
1065 page++;
1066 rc = 0;
1067 }
1068 } else {
1069 return rc;
1070 }
c087bd2c
SH		 1071 }
1072
1073 return 0;
1074}
1075
1076static int efx_mcdi_phy_get_module_info(struct efx_nic *efx,
1077 struct ethtool_modinfo *modinfo)
1078{
9b17010d
MH		 1079 int sff_8472_level;
1080 int diag_type;
c087bd2c 1081
9b17010d 1082 switch (efx_mcdi_phy_module_type(efx)) {
c087bd2c 1083 case MC_CMD_MEDIA_SFP_PLUS:
9b17010d
MH		 1084 sff_8472_level = efx_mcdi_phy_sff_8472_level(efx);
1085
1086 /* If we can't read the diagnostics level we have none. */
1087 if (sff_8472_level < 0)
1088 return -EOPNOTSUPP;
1089
1090 /* Check if this module requires the (unsupported) address
1091 * change operation.
1092 */
1093 diag_type = efx_mcdi_phy_diag_type(efx);
1094
1095 if ((sff_8472_level == 0) ||
1096 (diag_type & SFF_DIAG_ADDR_CHANGE)) {
1097 modinfo->type = ETH_MODULE_SFF_8079;
1098 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
1099 } else {
1100 modinfo->type = ETH_MODULE_SFF_8472;
1101 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
1102 }
1103 break;
1104
1105 case MC_CMD_MEDIA_QSFP_PLUS:
1106 modinfo->type = ETH_MODULE_SFF_8436;
1107 modinfo->eeprom_len = ETH_MODULE_SFF_8436_LEN;
1108 break;
1109
c087bd2c
SH		 1110 default:
1111 return -EOPNOTSUPP;
1112 }
9b17010d
MH		 1113
1114 return 0;
c087bd2c
SH		 1115}
1116
43f775b2 1117static const struct efx_phy_operations efx_mcdi_phy_ops = {
afd4aea0 1118 .probe = efx_mcdi_phy_probe,
9c636baf 1119 .init = efx_port_dummy_op_int,
43f775b2 1120 .reconfigure = efx_mcdi_port_reconfigure,
afd4aea0 1121 .poll = efx_mcdi_phy_poll,
ff3b00a0
SH		 1122 .fini = efx_port_dummy_op_void,
1123 .remove = efx_mcdi_phy_remove,
7cafe8f8
PR		 1124 .get_link_ksettings = efx_mcdi_phy_get_link_ksettings,
1125 .set_link_ksettings = efx_mcdi_phy_set_link_ksettings,
7f61e6c6
EC		 1126 .get_fecparam = efx_mcdi_phy_get_fecparam,
1127 .set_fecparam = efx_mcdi_phy_set_fecparam,
4f16c073 1128 .test_alive = efx_mcdi_phy_test_alive,
affaf485
SH		 1129 .run_tests = efx_mcdi_phy_run_tests,
1130 .test_name = efx_mcdi_phy_test_name,
c087bd2c
SH		 1131 .get_module_eeprom = efx_mcdi_phy_get_module_eeprom,
1132 .get_module_info = efx_mcdi_phy_get_module_info,
afd4aea0 1133};
43f775b2 1134
8127d661
BH		 1135u32 efx_mcdi_phy_get_caps(struct efx_nic *efx)
1136{
1137 struct efx_mcdi_phy_data *phy_data = efx->phy_data;
1138
1139 return phy_data->supported_cap;
1140}
1141
43f775b2
BH		 1142static unsigned int efx_mcdi_event_link_speed[] = {
1143 [MCDI_EVENT_LINKCHANGE_SPEED_100M] = 100,
1144 [MCDI_EVENT_LINKCHANGE_SPEED_1G] = 1000,
1145 [MCDI_EVENT_LINKCHANGE_SPEED_10G] = 10000,
9a12a306 1146 [MCDI_EVENT_LINKCHANGE_SPEED_40G] = 40000,
702b3d51
EC		 1147 [MCDI_EVENT_LINKCHANGE_SPEED_25G] = 25000,
1148 [MCDI_EVENT_LINKCHANGE_SPEED_50G] = 50000,
1149 [MCDI_EVENT_LINKCHANGE_SPEED_100G] = 100000,
43f775b2
BH		 1150};
1151
1152void efx_mcdi_process_link_change(struct efx_nic *efx, efx_qword_t *ev)
1153{
1154 u32 flags, fcntl, speed, lpa;
1155
1156 speed = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_SPEED);
e01b16a7 1157 EFX_WARN_ON_PARANOID(speed >= ARRAY_SIZE(efx_mcdi_event_link_speed));
43f775b2
BH		 1158 speed = efx_mcdi_event_link_speed[speed];
1159
1160 flags = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LINK_FLAGS);
1161 fcntl = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_FCNTL);
1162 lpa = EFX_QWORD_FIELD(*ev, MCDI_EVENT_LINKCHANGE_LP_CAP);
1163
1164 /* efx->link_state is only modified by efx_mcdi_phy_get_link(),
1165 * which is only run after flushing the event queues. Therefore, it
1166 * is safe to modify the link state outside of the mac_lock here.
1167 */
1168 efx_mcdi_phy_decode_link(efx, &efx->link_state, speed, flags, fcntl);
1169
1170 efx_mcdi_phy_check_fcntl(efx, lpa);
1171
1172 efx_link_status_changed(efx);
1173}
1174
1175int efx_mcdi_set_mac(struct efx_nic *efx)
1176{
964e6135 1177 u32 fcntl;
43f775b2
BH		 1178 MCDI_DECLARE_BUF(cmdbytes, MC_CMD_SET_MAC_IN_LEN);
1179
1180 BUILD_BUG_ON(MC_CMD_SET_MAC_OUT_LEN != 0);
1181
910c8789 1182 /* This has no effect on EF10 */
cd84ff4d
EC		 1183 ether_addr_copy(MCDI_PTR(cmdbytes, SET_MAC_IN_ADDR),
1184 efx->net_dev->dev_addr);
43f775b2
BH		 1185
1186 MCDI_SET_DWORD(cmdbytes, SET_MAC_IN_MTU,
1187 EFX_MAX_FRAME_LEN(efx->net_dev->mtu));
1188 MCDI_SET_DWORD(cmdbytes, SET_MAC_IN_DRAIN, 0);
1189
964e6135
BH		 1190 /* Set simple MAC filter for Siena */
1191 MCDI_POPULATE_DWORD_1(cmdbytes, SET_MAC_IN_REJECT,
1192 SET_MAC_IN_REJECT_UNCST, efx->unicast_filter);
43f775b2 1193
6978729f
EC		 1194 MCDI_POPULATE_DWORD_1(cmdbytes, SET_MAC_IN_FLAGS,
1195 SET_MAC_IN_FLAG_INCLUDE_FCS,
1196 !!(efx->net_dev->features & NETIF_F_RXFCS));
1197
43f775b2
BH		 1198 switch (efx->wanted_fc) {
1199 case EFX_FC_RX | EFX_FC_TX:
1200 fcntl = MC_CMD_FCNTL_BIDIR;
1201 break;
1202 case EFX_FC_RX:
1203 fcntl = MC_CMD_FCNTL_RESPOND;
1204 break;
1205 default:
1206 fcntl = MC_CMD_FCNTL_OFF;
1207 break;
1208 }
1209 if (efx->wanted_fc & EFX_FC_AUTO)
1210 fcntl = MC_CMD_FCNTL_AUTO;
1211 if (efx->fc_disable)
1212 fcntl = MC_CMD_FCNTL_OFF;
1213
1214 MCDI_SET_DWORD(cmdbytes, SET_MAC_IN_FCNTL, fcntl);
1215
1216 return efx_mcdi_rpc(efx, MC_CMD_SET_MAC, cmdbytes, sizeof(cmdbytes),
1217 NULL, 0, NULL);
1218}
1219
1220bool efx_mcdi_mac_check_fault(struct efx_nic *efx)
1221{
1222 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_LINK_OUT_LEN);
1223 size_t outlength;
1224 int rc;
1225
1226 BUILD_BUG_ON(MC_CMD_GET_LINK_IN_LEN != 0);
1227
1228 rc = efx_mcdi_rpc(efx, MC_CMD_GET_LINK, NULL, 0,
1229 outbuf, sizeof(outbuf), &outlength);
1e0b8120 1230 if (rc)
43f775b2 1231 return true;
43f775b2
BH		 1232
1233 return MCDI_DWORD(outbuf, GET_LINK_OUT_MAC_FAULT) != 0;
1234}
1235
f8f3b5ae
JC		 1236enum efx_stats_action {
1237 EFX_STATS_ENABLE,
1238 EFX_STATS_DISABLE,
1239 EFX_STATS_PULL,
1240};
1241
1242static int efx_mcdi_mac_stats(struct efx_nic *efx,
1243 enum efx_stats_action action, int clear)
43f775b2
BH		 1244{
1245 MCDI_DECLARE_BUF(inbuf, MC_CMD_MAC_STATS_IN_LEN);
1246 int rc;
f8f3b5ae
JC		 1247 int change = action == EFX_STATS_PULL ? 0 : 1;
1248 int enable = action == EFX_STATS_ENABLE ? 1 : 0;
1249 int period = action == EFX_STATS_ENABLE ? 1000 : 0;
1250 dma_addr_t dma_addr = efx->stats_buffer.dma_addr;
1251 u32 dma_len = action != EFX_STATS_DISABLE ?
c1be4821 1252 efx->num_mac_stats * sizeof(u64) : 0;
43f775b2
BH		 1253
1254 BUILD_BUG_ON(MC_CMD_MAC_STATS_OUT_DMA_LEN != 0);
1255
1256 MCDI_SET_QWORD(inbuf, MAC_STATS_IN_DMA_ADDR, dma_addr);
f5253d92
BH		 1257 MCDI_POPULATE_DWORD_7(inbuf, MAC_STATS_IN_CMD,
1258 MAC_STATS_IN_DMA, !!enable,
1259 MAC_STATS_IN_CLEAR, clear,
f8f3b5ae
JC		 1260 MAC_STATS_IN_PERIODIC_CHANGE, change,
1261 MAC_STATS_IN_PERIODIC_ENABLE, enable,
f5253d92
BH		 1262 MAC_STATS_IN_PERIODIC_CLEAR, 0,
1263 MAC_STATS_IN_PERIODIC_NOEVENT, 1,
1264 MAC_STATS_IN_PERIOD_MS, period);
43f775b2 1265 MCDI_SET_DWORD(inbuf, MAC_STATS_IN_DMA_LEN, dma_len);
61deee96
BK		 1266
1267 if (efx_nic_rev(efx) >= EFX_REV_HUNT_A0) {
1268 struct efx_ef10_nic_data *nic_data = efx->nic_data;
1269
1270 MCDI_SET_DWORD(inbuf, MAC_STATS_IN_PORT_ID, nic_data->vport_id);
1271 }
43f775b2 1272
6dd4859b
DP		 1273 rc = efx_mcdi_rpc_quiet(efx, MC_CMD_MAC_STATS, inbuf, sizeof(inbuf),
1274 NULL, 0, NULL);
1275 /* Expect ENOENT if DMA queues have not been set up */
1276 if (rc && (rc != -ENOENT || atomic_read(&efx->active_queues)))
1277 efx_mcdi_display_error(efx, MC_CMD_MAC_STATS, sizeof(inbuf),
1278 NULL, 0, rc);
43f775b2
BH		 1279 return rc;
1280}
1281
1282void efx_mcdi_mac_start_stats(struct efx_nic *efx)
1283{
1284 __le64 *dma_stats = efx->stats_buffer.addr;
1285
c1be4821 1286 dma_stats[efx->num_mac_stats - 1] = EFX_MC_STATS_GENERATION_INVALID;
43f775b2 1287
f8f3b5ae 1288 efx_mcdi_mac_stats(efx, EFX_STATS_ENABLE, 0);
43f775b2
BH		 1289}
1290
1291void efx_mcdi_mac_stop_stats(struct efx_nic *efx)
1292{
f8f3b5ae
JC		 1293 efx_mcdi_mac_stats(efx, EFX_STATS_DISABLE, 0);
1294}
1295
1296#define EFX_MAC_STATS_WAIT_US 100
1297#define EFX_MAC_STATS_WAIT_ATTEMPTS 10
1298
1299void efx_mcdi_mac_pull_stats(struct efx_nic *efx)
1300{
1301 __le64 *dma_stats = efx->stats_buffer.addr;
1302 int attempts = EFX_MAC_STATS_WAIT_ATTEMPTS;
1303
c1be4821 1304 dma_stats[efx->num_mac_stats - 1] = EFX_MC_STATS_GENERATION_INVALID;
f8f3b5ae
JC		 1305 efx_mcdi_mac_stats(efx, EFX_STATS_PULL, 0);
1306
c1be4821 1307 while (dma_stats[efx->num_mac_stats - 1] ==
f8f3b5ae
JC		 1308 EFX_MC_STATS_GENERATION_INVALID &&
1309 attempts-- != 0)
1310 udelay(EFX_MAC_STATS_WAIT_US);
43f775b2
BH		 1311}
1312
1313int efx_mcdi_port_probe(struct efx_nic *efx)
1314{
1315 int rc;
1316
1317 /* Hook in PHY operations table */
1318 efx->phy_op = &efx_mcdi_phy_ops;
1319
1320 /* Set up MDIO structure for PHY */
1321 efx->mdio.mode_support = MDIO_SUPPORTS_C45 | MDIO_EMULATE_C22;
1322 efx->mdio.mdio_read = efx_mcdi_mdio_read;
1323 efx->mdio.mdio_write = efx_mcdi_mdio_write;
1324
1325 /* Fill out MDIO structure, loopback modes, and initial link state */
1326 rc = efx->phy_op->probe(efx);
1327 if (rc != 0)
1328 return rc;
1329
1330 /* Allocate buffer for stats */
1331 rc = efx_nic_alloc_buffer(efx, &efx->stats_buffer,
c1be4821 1332 efx->num_mac_stats * sizeof(u64), GFP_KERNEL);
43f775b2
BH		 1333 if (rc)
1334 return rc;
1335 netif_dbg(efx, probe, efx->net_dev,
1336 "stats buffer at %llx (virt %p phys %llx)\n",
1337 (u64)efx->stats_buffer.dma_addr,
1338 efx->stats_buffer.addr,
1339 (u64)virt_to_phys(efx->stats_buffer.addr));
1340
f8f3b5ae 1341 efx_mcdi_mac_stats(efx, EFX_STATS_DISABLE, 1);
43f775b2
BH		 1342
1343 return 0;
1344}
1345
1346void efx_mcdi_port_remove(struct efx_nic *efx)
1347{
1348 efx->phy_op->remove(efx);
1349 efx_nic_free_buffer(efx, &efx->stats_buffer);
1350}
8127d661
BH		 1351
1352/* Get physical port number (EF10 only; on Siena it is same as PF number) */
1353int efx_mcdi_port_get_number(struct efx_nic *efx)
1354{
1355 MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_PORT_ASSIGNMENT_OUT_LEN);
1356 int rc;
1357
1358 rc = efx_mcdi_rpc(efx, MC_CMD_GET_PORT_ASSIGNMENT, NULL, 0,
1359 outbuf, sizeof(outbuf), NULL);
1360 if (rc)
1361 return rc;
1362
1363 return MCDI_DWORD(outbuf, GET_PORT_ASSIGNMENT_OUT_PORT);
1364}
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