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f4150724 BH |
1 | /**************************************************************************** |
2 | * Driver for Solarflare Solarstorm network controllers and boards | |
3 | * Copyright 2005-2006 Fen Systems Ltd. | |
0a6f40c6 | 4 | * Copyright 2006-2010 Solarflare Communications Inc. |
f4150724 BH |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify it | |
7 | * under the terms of the GNU General Public License version 2 as published | |
8 | * by the Free Software Foundation, incorporated herein by reference. | |
9 | */ | |
10 | ||
8880f4ec | 11 | #include <linux/bitops.h> |
f4150724 BH |
12 | #include <linux/module.h> |
13 | #include <linux/mtd/mtd.h> | |
14 | #include <linux/delay.h> | |
5a0e3ad6 | 15 | #include <linux/slab.h> |
76884835 | 16 | #include <linux/rtnetlink.h> |
f4150724 | 17 | |
f4150724 BH |
18 | #include "net_driver.h" |
19 | #include "spi.h" | |
ff2ef902 | 20 | #include "efx.h" |
744093c9 | 21 | #include "nic.h" |
8880f4ec BH |
22 | #include "mcdi.h" |
23 | #include "mcdi_pcol.h" | |
f4150724 | 24 | |
ecd0a6f0 | 25 | #define FALCON_SPI_VERIFY_BUF_LEN 16 |
f4150724 | 26 | |
76884835 | 27 | struct efx_mtd_partition { |
b766630b | 28 | struct list_head node; |
f4150724 | 29 | struct mtd_info mtd; |
b766630b | 30 | const char *dev_type_name; |
76884835 | 31 | const char *type_name; |
f4150724 BH |
32 | char name[IFNAMSIZ + 20]; |
33 | }; | |
34 | ||
141d748e BH |
35 | struct falcon_mtd_partition { |
36 | struct efx_mtd_partition common; | |
37 | const struct falcon_spi_device *spi; | |
38 | size_t offset; | |
39 | }; | |
40 | ||
76884835 | 41 | struct efx_mtd_ops { |
141d748e | 42 | void (*rename)(struct efx_mtd_partition *part); |
76884835 BH |
43 | int (*read)(struct mtd_info *mtd, loff_t start, size_t len, |
44 | size_t *retlen, u8 *buffer); | |
45 | int (*erase)(struct mtd_info *mtd, loff_t start, size_t len); | |
46 | int (*write)(struct mtd_info *mtd, loff_t start, size_t len, | |
47 | size_t *retlen, const u8 *buffer); | |
48 | int (*sync)(struct mtd_info *mtd); | |
49 | }; | |
50 | ||
76884835 BH |
51 | #define to_efx_mtd_partition(mtd) \ |
52 | container_of(mtd, struct efx_mtd_partition, mtd) | |
53 | ||
141d748e BH |
54 | #define to_falcon_mtd_partition(mtd) \ |
55 | container_of(mtd, struct falcon_mtd_partition, common.mtd) | |
56 | ||
76884835 | 57 | static int falcon_mtd_probe(struct efx_nic *efx); |
8880f4ec | 58 | static int siena_mtd_probe(struct efx_nic *efx); |
76884835 | 59 | |
f4150724 BH |
60 | /* SPI utilities */ |
61 | ||
0c605a20 | 62 | static int |
141d748e | 63 | falcon_spi_slow_wait(struct falcon_mtd_partition *part, bool uninterruptible) |
f4150724 | 64 | { |
141d748e BH |
65 | const struct falcon_spi_device *spi = part->spi; |
66 | struct efx_nic *efx = part->common.mtd.priv; | |
f4150724 BH |
67 | u8 status; |
68 | int rc, i; | |
69 | ||
70 | /* Wait up to 4s for flash/EEPROM to finish a slow operation. */ | |
71 | for (i = 0; i < 40; i++) { | |
72 | __set_current_state(uninterruptible ? | |
73 | TASK_UNINTERRUPTIBLE : TASK_INTERRUPTIBLE); | |
74 | schedule_timeout(HZ / 10); | |
76884835 | 75 | rc = falcon_spi_cmd(efx, spi, SPI_RDSR, -1, NULL, |
f4150724 BH |
76 | &status, sizeof(status)); |
77 | if (rc) | |
78 | return rc; | |
79 | if (!(status & SPI_STATUS_NRDY)) | |
80 | return 0; | |
81 | if (signal_pending(current)) | |
82 | return -EINTR; | |
83 | } | |
b766630b | 84 | pr_err("%s: timed out waiting for %s\n", |
141d748e | 85 | part->common.name, part->common.dev_type_name); |
f4150724 BH |
86 | return -ETIMEDOUT; |
87 | } | |
88 | ||
76884835 | 89 | static int |
ecd0a6f0 | 90 | falcon_spi_unlock(struct efx_nic *efx, const struct falcon_spi_device *spi) |
f4150724 BH |
91 | { |
92 | const u8 unlock_mask = (SPI_STATUS_BP2 | SPI_STATUS_BP1 | | |
93 | SPI_STATUS_BP0); | |
94 | u8 status; | |
95 | int rc; | |
96 | ||
76884835 BH |
97 | rc = falcon_spi_cmd(efx, spi, SPI_RDSR, -1, NULL, |
98 | &status, sizeof(status)); | |
f4150724 BH |
99 | if (rc) |
100 | return rc; | |
101 | ||
102 | if (!(status & unlock_mask)) | |
103 | return 0; /* already unlocked */ | |
104 | ||
76884835 | 105 | rc = falcon_spi_cmd(efx, spi, SPI_WREN, -1, NULL, NULL, 0); |
f4150724 BH |
106 | if (rc) |
107 | return rc; | |
76884835 | 108 | rc = falcon_spi_cmd(efx, spi, SPI_SST_EWSR, -1, NULL, NULL, 0); |
f4150724 BH |
109 | if (rc) |
110 | return rc; | |
111 | ||
112 | status &= ~unlock_mask; | |
76884835 BH |
113 | rc = falcon_spi_cmd(efx, spi, SPI_WRSR, -1, &status, |
114 | NULL, sizeof(status)); | |
f4150724 BH |
115 | if (rc) |
116 | return rc; | |
76884835 | 117 | rc = falcon_spi_wait_write(efx, spi); |
f4150724 BH |
118 | if (rc) |
119 | return rc; | |
120 | ||
121 | return 0; | |
122 | } | |
123 | ||
0c605a20 | 124 | static int |
141d748e | 125 | falcon_spi_erase(struct falcon_mtd_partition *part, loff_t start, size_t len) |
f4150724 | 126 | { |
141d748e BH |
127 | const struct falcon_spi_device *spi = part->spi; |
128 | struct efx_nic *efx = part->common.mtd.priv; | |
f4150724 | 129 | unsigned pos, block_len; |
ecd0a6f0 BH |
130 | u8 empty[FALCON_SPI_VERIFY_BUF_LEN]; |
131 | u8 buffer[FALCON_SPI_VERIFY_BUF_LEN]; | |
f4150724 BH |
132 | int rc; |
133 | ||
134 | if (len != spi->erase_size) | |
135 | return -EINVAL; | |
136 | ||
137 | if (spi->erase_command == 0) | |
138 | return -EOPNOTSUPP; | |
139 | ||
ecd0a6f0 | 140 | rc = falcon_spi_unlock(efx, spi); |
f4150724 BH |
141 | if (rc) |
142 | return rc; | |
76884835 | 143 | rc = falcon_spi_cmd(efx, spi, SPI_WREN, -1, NULL, NULL, 0); |
f4150724 BH |
144 | if (rc) |
145 | return rc; | |
76884835 BH |
146 | rc = falcon_spi_cmd(efx, spi, spi->erase_command, start, NULL, |
147 | NULL, 0); | |
f4150724 BH |
148 | if (rc) |
149 | return rc; | |
ecd0a6f0 | 150 | rc = falcon_spi_slow_wait(part, false); |
f4150724 BH |
151 | |
152 | /* Verify the entire region has been wiped */ | |
153 | memset(empty, 0xff, sizeof(empty)); | |
154 | for (pos = 0; pos < len; pos += block_len) { | |
155 | block_len = min(len - pos, sizeof(buffer)); | |
76884835 BH |
156 | rc = falcon_spi_read(efx, spi, start + pos, block_len, |
157 | NULL, buffer); | |
f4150724 BH |
158 | if (rc) |
159 | return rc; | |
160 | if (memcmp(empty, buffer, block_len)) | |
161 | return -EIO; | |
162 | ||
163 | /* Avoid locking up the system */ | |
164 | cond_resched(); | |
165 | if (signal_pending(current)) | |
166 | return -EINTR; | |
167 | } | |
168 | ||
169 | return rc; | |
170 | } | |
171 | ||
172 | /* MTD interface */ | |
173 | ||
76884835 BH |
174 | static int efx_mtd_erase(struct mtd_info *mtd, struct erase_info *erase) |
175 | { | |
b766630b | 176 | struct efx_nic *efx = mtd->priv; |
76884835 BH |
177 | int rc; |
178 | ||
b766630b | 179 | rc = efx->mtd_ops->erase(mtd, erase->addr, erase->len); |
76884835 BH |
180 | if (rc == 0) { |
181 | erase->state = MTD_ERASE_DONE; | |
182 | } else { | |
183 | erase->state = MTD_ERASE_FAILED; | |
88dfda5f | 184 | erase->fail_addr = MTD_FAIL_ADDR_UNKNOWN; |
76884835 BH |
185 | } |
186 | mtd_erase_callback(erase); | |
187 | return rc; | |
188 | } | |
189 | ||
190 | static void efx_mtd_sync(struct mtd_info *mtd) | |
191 | { | |
0c605a20 | 192 | struct efx_mtd_partition *part = to_efx_mtd_partition(mtd); |
b766630b | 193 | struct efx_nic *efx = mtd->priv; |
76884835 BH |
194 | int rc; |
195 | ||
b766630b | 196 | rc = efx->mtd_ops->sync(mtd); |
76884835 | 197 | if (rc) |
0c605a20 | 198 | pr_err("%s: %s sync failed (%d)\n", |
b766630b | 199 | part->name, part->dev_type_name, rc); |
76884835 BH |
200 | } |
201 | ||
202 | static void efx_mtd_remove_partition(struct efx_mtd_partition *part) | |
203 | { | |
204 | int rc; | |
205 | ||
206 | for (;;) { | |
ee0e87b1 | 207 | rc = mtd_device_unregister(&part->mtd); |
76884835 BH |
208 | if (rc != -EBUSY) |
209 | break; | |
210 | ssleep(1); | |
211 | } | |
212 | WARN_ON(rc); | |
b766630b | 213 | list_del(&part->node); |
76884835 BH |
214 | } |
215 | ||
b766630b | 216 | static void efx_mtd_rename_partition(struct efx_mtd_partition *part) |
76884835 | 217 | { |
b766630b | 218 | struct efx_nic *efx = part->mtd.priv; |
76884835 | 219 | |
141d748e | 220 | efx->mtd_ops->rename(part); |
76884835 BH |
221 | } |
222 | ||
141d748e BH |
223 | static int efx_mtd_add(struct efx_nic *efx, struct efx_mtd_partition *parts, |
224 | size_t n_parts, size_t sizeof_part) | |
76884835 BH |
225 | { |
226 | struct efx_mtd_partition *part; | |
b766630b | 227 | size_t i; |
76884835 | 228 | |
b766630b | 229 | for (i = 0; i < n_parts; i++) { |
141d748e BH |
230 | part = (struct efx_mtd_partition *)((char *)parts + |
231 | i * sizeof_part); | |
76884835 | 232 | |
76884835 BH |
233 | part->mtd.writesize = 1; |
234 | ||
235 | part->mtd.owner = THIS_MODULE; | |
b766630b | 236 | part->mtd.priv = efx; |
76884835 | 237 | part->mtd.name = part->name; |
3c3c10bb | 238 | part->mtd._erase = efx_mtd_erase; |
b766630b BH |
239 | part->mtd._read = efx->mtd_ops->read; |
240 | part->mtd._write = efx->mtd_ops->write; | |
3c3c10bb | 241 | part->mtd._sync = efx_mtd_sync; |
76884835 | 242 | |
b766630b BH |
243 | efx_mtd_rename_partition(part); |
244 | ||
ee0e87b1 | 245 | if (mtd_device_register(&part->mtd, NULL, 0)) |
76884835 | 246 | goto fail; |
b766630b BH |
247 | |
248 | /* Add to list in order - efx_mtd_remove() depends on this */ | |
249 | list_add_tail(&part->node, &efx->mtd_list); | |
76884835 BH |
250 | } |
251 | ||
76884835 BH |
252 | return 0; |
253 | ||
254 | fail: | |
141d748e BH |
255 | while (i--) { |
256 | part = (struct efx_mtd_partition *)((char *)parts + | |
257 | i * sizeof_part); | |
258 | efx_mtd_remove_partition(part); | |
259 | } | |
7c43161c | 260 | /* Failure is unlikely here, but probably means we're out of memory */ |
76884835 BH |
261 | return -ENOMEM; |
262 | } | |
263 | ||
264 | void efx_mtd_remove(struct efx_nic *efx) | |
f4150724 | 265 | { |
b766630b | 266 | struct efx_mtd_partition *parts, *part, *next; |
76884835 BH |
267 | |
268 | WARN_ON(efx_dev_registered(efx)); | |
269 | ||
b766630b BH |
270 | if (list_empty(&efx->mtd_list)) |
271 | return; | |
272 | ||
273 | parts = list_first_entry(&efx->mtd_list, struct efx_mtd_partition, | |
274 | node); | |
275 | ||
276 | list_for_each_entry_safe(part, next, &efx->mtd_list, node) | |
277 | efx_mtd_remove_partition(part); | |
278 | ||
279 | kfree(parts); | |
76884835 BH |
280 | } |
281 | ||
282 | void efx_mtd_rename(struct efx_nic *efx) | |
283 | { | |
b766630b | 284 | struct efx_mtd_partition *part; |
76884835 BH |
285 | |
286 | ASSERT_RTNL(); | |
287 | ||
b766630b BH |
288 | list_for_each_entry(part, &efx->mtd_list, node) |
289 | efx_mtd_rename_partition(part); | |
76884835 BH |
290 | } |
291 | ||
292 | int efx_mtd_probe(struct efx_nic *efx) | |
293 | { | |
8880f4ec BH |
294 | if (efx_nic_rev(efx) >= EFX_REV_SIENA_A0) |
295 | return siena_mtd_probe(efx); | |
296 | else | |
297 | return falcon_mtd_probe(efx); | |
76884835 BH |
298 | } |
299 | ||
300 | /* Implementation of MTD operations for Falcon */ | |
301 | ||
141d748e BH |
302 | static void falcon_mtd_rename(struct efx_mtd_partition *part) |
303 | { | |
304 | struct efx_nic *efx = part->mtd.priv; | |
305 | ||
306 | snprintf(part->name, sizeof(part->name), "%s %s", | |
307 | efx->name, part->type_name); | |
308 | } | |
309 | ||
76884835 BH |
310 | static int falcon_mtd_read(struct mtd_info *mtd, loff_t start, |
311 | size_t len, size_t *retlen, u8 *buffer) | |
312 | { | |
141d748e | 313 | struct falcon_mtd_partition *part = to_falcon_mtd_partition(mtd); |
b766630b | 314 | struct efx_nic *efx = mtd->priv; |
4de92180 | 315 | struct falcon_nic_data *nic_data = efx->nic_data; |
f4150724 BH |
316 | int rc; |
317 | ||
4de92180 | 318 | rc = mutex_lock_interruptible(&nic_data->spi_lock); |
f4150724 BH |
319 | if (rc) |
320 | return rc; | |
141d748e | 321 | rc = falcon_spi_read(efx, part->spi, part->offset + start, |
b766630b | 322 | len, retlen, buffer); |
4de92180 | 323 | mutex_unlock(&nic_data->spi_lock); |
f4150724 BH |
324 | return rc; |
325 | } | |
326 | ||
76884835 | 327 | static int falcon_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len) |
f4150724 | 328 | { |
141d748e | 329 | struct falcon_mtd_partition *part = to_falcon_mtd_partition(mtd); |
b766630b | 330 | struct efx_nic *efx = mtd->priv; |
4de92180 | 331 | struct falcon_nic_data *nic_data = efx->nic_data; |
f4150724 BH |
332 | int rc; |
333 | ||
4de92180 | 334 | rc = mutex_lock_interruptible(&nic_data->spi_lock); |
f4150724 BH |
335 | if (rc) |
336 | return rc; | |
141d748e | 337 | rc = falcon_spi_erase(part, part->offset + start, len); |
4de92180 | 338 | mutex_unlock(&nic_data->spi_lock); |
f4150724 BH |
339 | return rc; |
340 | } | |
341 | ||
76884835 BH |
342 | static int falcon_mtd_write(struct mtd_info *mtd, loff_t start, |
343 | size_t len, size_t *retlen, const u8 *buffer) | |
f4150724 | 344 | { |
141d748e | 345 | struct falcon_mtd_partition *part = to_falcon_mtd_partition(mtd); |
b766630b | 346 | struct efx_nic *efx = mtd->priv; |
4de92180 | 347 | struct falcon_nic_data *nic_data = efx->nic_data; |
f4150724 BH |
348 | int rc; |
349 | ||
4de92180 | 350 | rc = mutex_lock_interruptible(&nic_data->spi_lock); |
f4150724 BH |
351 | if (rc) |
352 | return rc; | |
141d748e BH |
353 | rc = falcon_spi_write(efx, part->spi, part->offset + start, |
354 | len, retlen, buffer); | |
4de92180 | 355 | mutex_unlock(&nic_data->spi_lock); |
f4150724 BH |
356 | return rc; |
357 | } | |
358 | ||
76884835 | 359 | static int falcon_mtd_sync(struct mtd_info *mtd) |
f4150724 | 360 | { |
141d748e | 361 | struct falcon_mtd_partition *part = to_falcon_mtd_partition(mtd); |
b766630b | 362 | struct efx_nic *efx = mtd->priv; |
4de92180 | 363 | struct falcon_nic_data *nic_data = efx->nic_data; |
f4150724 BH |
364 | int rc; |
365 | ||
4de92180 | 366 | mutex_lock(&nic_data->spi_lock); |
ecd0a6f0 | 367 | rc = falcon_spi_slow_wait(part, true); |
4de92180 | 368 | mutex_unlock(&nic_data->spi_lock); |
76884835 | 369 | return rc; |
f4150724 BH |
370 | } |
371 | ||
18e83e4c | 372 | static const struct efx_mtd_ops falcon_mtd_ops = { |
141d748e | 373 | .rename = falcon_mtd_rename, |
76884835 BH |
374 | .read = falcon_mtd_read, |
375 | .erase = falcon_mtd_erase, | |
376 | .write = falcon_mtd_write, | |
377 | .sync = falcon_mtd_sync, | |
378 | }; | |
f4150724 | 379 | |
76884835 | 380 | static int falcon_mtd_probe(struct efx_nic *efx) |
f4150724 | 381 | { |
4de92180 | 382 | struct falcon_nic_data *nic_data = efx->nic_data; |
141d748e | 383 | struct falcon_mtd_partition *parts; |
ecd0a6f0 | 384 | struct falcon_spi_device *spi; |
b766630b | 385 | size_t n_parts; |
6a8872c5 | 386 | int rc = -ENODEV; |
76884835 BH |
387 | |
388 | ASSERT_RTNL(); | |
f4150724 | 389 | |
b766630b BH |
390 | efx->mtd_ops = &falcon_mtd_ops; |
391 | ||
392 | /* Allocate space for maximum number of partitions */ | |
393 | parts = kcalloc(2, sizeof(*parts), GFP_KERNEL); | |
394 | n_parts = 0; | |
395 | ||
4de92180 | 396 | spi = &nic_data->spi_flash; |
ecd0a6f0 | 397 | if (falcon_spi_present(spi) && spi->size > FALCON_FLASH_BOOTCODE_START) { |
141d748e BH |
398 | parts[n_parts].spi = spi; |
399 | parts[n_parts].offset = FALCON_FLASH_BOOTCODE_START; | |
400 | parts[n_parts].common.dev_type_name = "flash"; | |
401 | parts[n_parts].common.type_name = "sfc_flash_bootrom"; | |
402 | parts[n_parts].common.mtd.type = MTD_NORFLASH; | |
403 | parts[n_parts].common.mtd.flags = MTD_CAP_NORFLASH; | |
404 | parts[n_parts].common.mtd.size = spi->size - FALCON_FLASH_BOOTCODE_START; | |
405 | parts[n_parts].common.mtd.erasesize = spi->erase_size; | |
b766630b | 406 | n_parts++; |
6a8872c5 | 407 | } |
76884835 | 408 | |
4de92180 | 409 | spi = &nic_data->spi_eeprom; |
ecd0a6f0 | 410 | if (falcon_spi_present(spi) && spi->size > FALCON_EEPROM_BOOTCONFIG_START) { |
141d748e BH |
411 | parts[n_parts].spi = spi; |
412 | parts[n_parts].offset = FALCON_EEPROM_BOOTCONFIG_START; | |
413 | parts[n_parts].common.dev_type_name = "EEPROM"; | |
414 | parts[n_parts].common.type_name = "sfc_bootconfig"; | |
415 | parts[n_parts].common.mtd.type = MTD_RAM; | |
416 | parts[n_parts].common.mtd.flags = MTD_CAP_RAM; | |
417 | parts[n_parts].common.mtd.size = | |
ecd0a6f0 BH |
418 | min(spi->size, FALCON_EEPROM_BOOTCONFIG_END) - |
419 | FALCON_EEPROM_BOOTCONFIG_START; | |
141d748e | 420 | parts[n_parts].common.mtd.erasesize = spi->erase_size; |
b766630b | 421 | n_parts++; |
6a8872c5 | 422 | } |
76884835 | 423 | |
141d748e | 424 | rc = efx_mtd_add(efx, &parts[0].common, n_parts, sizeof(*parts)); |
b766630b BH |
425 | if (rc) |
426 | kfree(parts); | |
76884835 | 427 | return rc; |
f4150724 | 428 | } |
8880f4ec BH |
429 | |
430 | /* Implementation of MTD operations for Siena */ | |
431 | ||
141d748e BH |
432 | struct efx_mcdi_mtd_partition { |
433 | struct efx_mtd_partition common; | |
434 | bool updating; | |
435 | u8 nvram_type; | |
436 | u16 fw_subtype; | |
437 | }; | |
438 | ||
439 | #define to_efx_mcdi_mtd_partition(mtd) \ | |
440 | container_of(mtd, struct efx_mcdi_mtd_partition, common.mtd) | |
441 | ||
442 | static void siena_mtd_rename(struct efx_mtd_partition *part) | |
443 | { | |
444 | struct efx_mcdi_mtd_partition *mcdi_part = | |
445 | container_of(part, struct efx_mcdi_mtd_partition, common); | |
446 | struct efx_nic *efx = part->mtd.priv; | |
447 | ||
448 | snprintf(part->name, sizeof(part->name), "%s %s:%02x", | |
449 | efx->name, part->type_name, mcdi_part->fw_subtype); | |
450 | } | |
451 | ||
8880f4ec BH |
452 | static int siena_mtd_read(struct mtd_info *mtd, loff_t start, |
453 | size_t len, size_t *retlen, u8 *buffer) | |
454 | { | |
141d748e | 455 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); |
b766630b | 456 | struct efx_nic *efx = mtd->priv; |
8880f4ec BH |
457 | loff_t offset = start; |
458 | loff_t end = min_t(loff_t, start + len, mtd->size); | |
459 | size_t chunk; | |
460 | int rc = 0; | |
461 | ||
462 | while (offset < end) { | |
5a27e86b | 463 | chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX); |
141d748e | 464 | rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset, |
8880f4ec BH |
465 | buffer, chunk); |
466 | if (rc) | |
467 | goto out; | |
468 | offset += chunk; | |
469 | buffer += chunk; | |
470 | } | |
471 | out: | |
472 | *retlen = offset - start; | |
473 | return rc; | |
474 | } | |
475 | ||
476 | static int siena_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len) | |
477 | { | |
141d748e | 478 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); |
b766630b | 479 | struct efx_nic *efx = mtd->priv; |
8880f4ec BH |
480 | loff_t offset = start & ~((loff_t)(mtd->erasesize - 1)); |
481 | loff_t end = min_t(loff_t, start + len, mtd->size); | |
141d748e | 482 | size_t chunk = part->common.mtd.erasesize; |
8880f4ec BH |
483 | int rc = 0; |
484 | ||
141d748e BH |
485 | if (!part->updating) { |
486 | rc = efx_mcdi_nvram_update_start(efx, part->nvram_type); | |
8880f4ec BH |
487 | if (rc) |
488 | goto out; | |
141d748e | 489 | part->updating = true; |
8880f4ec BH |
490 | } |
491 | ||
492 | /* The MCDI interface can in fact do multiple erase blocks at once; | |
493 | * but erasing may be slow, so we make multiple calls here to avoid | |
494 | * tripping the MCDI RPC timeout. */ | |
495 | while (offset < end) { | |
141d748e | 496 | rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset, |
8880f4ec BH |
497 | chunk); |
498 | if (rc) | |
499 | goto out; | |
500 | offset += chunk; | |
501 | } | |
502 | out: | |
503 | return rc; | |
504 | } | |
505 | ||
506 | static int siena_mtd_write(struct mtd_info *mtd, loff_t start, | |
507 | size_t len, size_t *retlen, const u8 *buffer) | |
508 | { | |
141d748e | 509 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); |
b766630b | 510 | struct efx_nic *efx = mtd->priv; |
8880f4ec BH |
511 | loff_t offset = start; |
512 | loff_t end = min_t(loff_t, start + len, mtd->size); | |
513 | size_t chunk; | |
514 | int rc = 0; | |
515 | ||
141d748e BH |
516 | if (!part->updating) { |
517 | rc = efx_mcdi_nvram_update_start(efx, part->nvram_type); | |
8880f4ec BH |
518 | if (rc) |
519 | goto out; | |
141d748e | 520 | part->updating = true; |
8880f4ec BH |
521 | } |
522 | ||
523 | while (offset < end) { | |
5a27e86b | 524 | chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX); |
141d748e | 525 | rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset, |
8880f4ec BH |
526 | buffer, chunk); |
527 | if (rc) | |
528 | goto out; | |
529 | offset += chunk; | |
530 | buffer += chunk; | |
531 | } | |
532 | out: | |
533 | *retlen = offset - start; | |
534 | return rc; | |
535 | } | |
536 | ||
537 | static int siena_mtd_sync(struct mtd_info *mtd) | |
538 | { | |
141d748e | 539 | struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd); |
b766630b | 540 | struct efx_nic *efx = mtd->priv; |
8880f4ec BH |
541 | int rc = 0; |
542 | ||
141d748e BH |
543 | if (part->updating) { |
544 | part->updating = false; | |
545 | rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type); | |
8880f4ec BH |
546 | } |
547 | ||
548 | return rc; | |
549 | } | |
550 | ||
18e83e4c | 551 | static const struct efx_mtd_ops siena_mtd_ops = { |
141d748e | 552 | .rename = siena_mtd_rename, |
8880f4ec BH |
553 | .read = siena_mtd_read, |
554 | .erase = siena_mtd_erase, | |
555 | .write = siena_mtd_write, | |
556 | .sync = siena_mtd_sync, | |
557 | }; | |
558 | ||
559 | struct siena_nvram_type_info { | |
560 | int port; | |
561 | const char *name; | |
562 | }; | |
563 | ||
18e83e4c | 564 | static const struct siena_nvram_type_info siena_nvram_types[] = { |
8880f4ec BH |
565 | [MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO] = { 0, "sfc_dummy_phy" }, |
566 | [MC_CMD_NVRAM_TYPE_MC_FW] = { 0, "sfc_mcfw" }, | |
567 | [MC_CMD_NVRAM_TYPE_MC_FW_BACKUP] = { 0, "sfc_mcfw_backup" }, | |
568 | [MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT0] = { 0, "sfc_static_cfg" }, | |
569 | [MC_CMD_NVRAM_TYPE_STATIC_CFG_PORT1] = { 1, "sfc_static_cfg" }, | |
570 | [MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0] = { 0, "sfc_dynamic_cfg" }, | |
571 | [MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1] = { 1, "sfc_dynamic_cfg" }, | |
572 | [MC_CMD_NVRAM_TYPE_EXP_ROM] = { 0, "sfc_exp_rom" }, | |
573 | [MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0] = { 0, "sfc_exp_rom_cfg" }, | |
574 | [MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1] = { 1, "sfc_exp_rom_cfg" }, | |
575 | [MC_CMD_NVRAM_TYPE_PHY_PORT0] = { 0, "sfc_phy_fw" }, | |
576 | [MC_CMD_NVRAM_TYPE_PHY_PORT1] = { 1, "sfc_phy_fw" }, | |
e5621545 | 577 | [MC_CMD_NVRAM_TYPE_FPGA] = { 0, "sfc_fpga" }, |
8880f4ec BH |
578 | }; |
579 | ||
580 | static int siena_mtd_probe_partition(struct efx_nic *efx, | |
141d748e | 581 | struct efx_mcdi_mtd_partition *part, |
8880f4ec BH |
582 | unsigned int type) |
583 | { | |
18e83e4c | 584 | const struct siena_nvram_type_info *info; |
8880f4ec BH |
585 | size_t size, erase_size; |
586 | bool protected; | |
587 | int rc; | |
588 | ||
e5621545 BH |
589 | if (type >= ARRAY_SIZE(siena_nvram_types) || |
590 | siena_nvram_types[type].name == NULL) | |
8880f4ec BH |
591 | return -ENODEV; |
592 | ||
593 | info = &siena_nvram_types[type]; | |
594 | ||
595 | if (info->port != efx_port_num(efx)) | |
596 | return -ENODEV; | |
597 | ||
598 | rc = efx_mcdi_nvram_info(efx, type, &size, &erase_size, &protected); | |
599 | if (rc) | |
600 | return rc; | |
601 | if (protected) | |
602 | return -ENODEV; /* hide it */ | |
603 | ||
141d748e BH |
604 | part->nvram_type = type; |
605 | part->common.dev_type_name = "Siena NVRAM manager"; | |
606 | part->common.type_name = info->name; | |
8880f4ec | 607 | |
141d748e BH |
608 | part->common.mtd.type = MTD_NORFLASH; |
609 | part->common.mtd.flags = MTD_CAP_NORFLASH; | |
610 | part->common.mtd.size = size; | |
611 | part->common.mtd.erasesize = erase_size; | |
8880f4ec BH |
612 | |
613 | return 0; | |
614 | } | |
615 | ||
616 | static int siena_mtd_get_fw_subtypes(struct efx_nic *efx, | |
141d748e | 617 | struct efx_mcdi_mtd_partition *parts, |
b766630b | 618 | size_t n_parts) |
8880f4ec | 619 | { |
e3f5ec11 BH |
620 | uint16_t fw_subtype_list[ |
621 | MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM]; | |
b766630b | 622 | size_t i; |
8880f4ec BH |
623 | int rc; |
624 | ||
6aa9c7f6 | 625 | rc = efx_mcdi_get_board_cfg(efx, NULL, fw_subtype_list, NULL); |
8880f4ec BH |
626 | if (rc) |
627 | return rc; | |
628 | ||
b766630b | 629 | for (i = 0; i < n_parts; i++) |
141d748e | 630 | parts[i].fw_subtype = fw_subtype_list[parts[i].nvram_type]; |
8880f4ec BH |
631 | |
632 | return 0; | |
633 | } | |
634 | ||
635 | static int siena_mtd_probe(struct efx_nic *efx) | |
636 | { | |
141d748e | 637 | struct efx_mcdi_mtd_partition *parts; |
8880f4ec BH |
638 | u32 nvram_types; |
639 | unsigned int type; | |
b766630b BH |
640 | size_t n_parts; |
641 | int rc; | |
8880f4ec BH |
642 | |
643 | ASSERT_RTNL(); | |
644 | ||
b766630b BH |
645 | efx->mtd_ops = &siena_mtd_ops; |
646 | ||
8880f4ec BH |
647 | rc = efx_mcdi_nvram_types(efx, &nvram_types); |
648 | if (rc) | |
649 | return rc; | |
650 | ||
b766630b BH |
651 | parts = kcalloc(hweight32(nvram_types), sizeof(*parts), GFP_KERNEL); |
652 | if (!parts) | |
8880f4ec BH |
653 | return -ENOMEM; |
654 | ||
8880f4ec | 655 | type = 0; |
b766630b | 656 | n_parts = 0; |
8880f4ec BH |
657 | |
658 | while (nvram_types != 0) { | |
659 | if (nvram_types & 1) { | |
b766630b BH |
660 | rc = siena_mtd_probe_partition(efx, &parts[n_parts], |
661 | type); | |
8880f4ec | 662 | if (rc == 0) |
b766630b | 663 | n_parts++; |
8880f4ec BH |
664 | else if (rc != -ENODEV) |
665 | goto fail; | |
666 | } | |
667 | type++; | |
668 | nvram_types >>= 1; | |
669 | } | |
670 | ||
b766630b | 671 | rc = siena_mtd_get_fw_subtypes(efx, parts, n_parts); |
8880f4ec BH |
672 | if (rc) |
673 | goto fail; | |
674 | ||
141d748e | 675 | rc = efx_mtd_add(efx, &parts[0].common, n_parts, sizeof(*parts)); |
8880f4ec BH |
676 | fail: |
677 | if (rc) | |
b766630b | 678 | kfree(parts); |
8880f4ec BH |
679 | return rc; |
680 | } | |
681 |