[mirror_ubuntu-hirsute-kernel.git] / drivers / net / ethernet / sfc / nic.h

/****************************************************************************
 * Driver for Solarflare Solarstorm network controllers and boards
 * Copyright 2005-2006 Fen Systems Ltd.
 * Copyright 2006-2011 Solarflare Communications Inc.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published
 * by the Free Software Foundation, incorporated herein by reference.
 */

#ifndef EFX_NIC_H
#define EFX_NIC_H

#include <linux/i2c-algo-bit.h>
#include "net_driver.h"
#include "efx.h"
#include "mcdi.h"
#include "spi.h"

/*
 * Falcon hardware control
 */

enum {
	EFX_REV_FALCON_A0 = 0,
	EFX_REV_FALCON_A1 = 1,
	EFX_REV_FALCON_B0 = 2,
	EFX_REV_SIENA_A0 = 3,
};

static inline int efx_nic_rev(struct efx_nic *efx)
{
	return efx->type->revision;
}

extern u32 efx_nic_fpga_ver(struct efx_nic *efx);

/* NIC has two interlinked PCI functions for the same port. */
static inline bool efx_nic_is_dual_func(struct efx_nic *efx)
{
	return efx_nic_rev(efx) < EFX_REV_FALCON_B0;
}

enum {
	PHY_TYPE_NONE = 0,
	PHY_TYPE_TXC43128 = 1,
	PHY_TYPE_88E1111 = 2,
	PHY_TYPE_SFX7101 = 3,
	PHY_TYPE_QT2022C2 = 4,
	PHY_TYPE_PM8358 = 6,
	PHY_TYPE_SFT9001A = 8,
	PHY_TYPE_QT2025C = 9,
	PHY_TYPE_SFT9001B = 10,
};

#define FALCON_XMAC_LOOPBACKS			\
	((1 << LOOPBACK_XGMII) |		\
	 (1 << LOOPBACK_XGXS) |			\
	 (1 << LOOPBACK_XAUI))

#define FALCON_GMAC_LOOPBACKS			\
	(1 << LOOPBACK_GMAC)

/* Alignment of PCIe DMA boundaries (4KB) */
#define EFX_PAGE_SIZE	4096
/* Size and alignment of buffer table entries (same) */
#define EFX_BUF_SIZE	EFX_PAGE_SIZE

/**
 * struct falcon_board_type - board operations and type information
 * @id: Board type id, as found in NVRAM
 * @ref_model: Model number of Solarflare reference design
 * @gen_type: Generic board type description
 * @init: Allocate resources and initialise peripheral hardware
 * @init_phy: Do board-specific PHY initialisation
 * @fini: Shut down hardware and free resources
 * @set_id_led: Set state of identifying LED or revert to automatic function
 * @monitor: Board-specific health check function
 */
struct falcon_board_type {
	u8 id;
	const char *ref_model;
	const char *gen_type;
	int (*init) (struct efx_nic *nic);
	void (*init_phy) (struct efx_nic *efx);
	void (*fini) (struct efx_nic *nic);
	void (*set_id_led) (struct efx_nic *efx, enum efx_led_mode mode);
	int (*monitor) (struct efx_nic *nic);
};

/**
 * struct falcon_board - board information
 * @type: Type of board
 * @major: Major rev. ('A', 'B' ...)
 * @minor: Minor rev. (0, 1, ...)
 * @i2c_adap: I2C adapter for on-board peripherals
 * @i2c_data: Data for bit-banging algorithm
 * @hwmon_client: I2C client for hardware monitor
 * @ioexp_client: I2C client for power/port control
 */
struct falcon_board {
	const struct falcon_board_type *type;
	int major;
	int minor;
	struct i2c_adapter i2c_adap;
	struct i2c_algo_bit_data i2c_data;
	struct i2c_client *hwmon_client, *ioexp_client;
};

/**
 * struct falcon_nic_data - Falcon NIC state
 * @pci_dev2: Secondary function of Falcon A
 * @board: Board state and functions
 * @stats_disable_count: Nest count for disabling statistics fetches
 * @stats_pending: Is there a pending DMA of MAC statistics.
 * @stats_timer: A timer for regularly fetching MAC statistics.
 * @stats_dma_done: Pointer to the flag which indicates DMA completion.
 * @spi_flash: SPI flash device
 * @spi_eeprom: SPI EEPROM device
 * @spi_lock: SPI bus lock
 * @mdio_lock: MDIO bus lock
 * @xmac_poll_required: XMAC link state needs polling
 */
struct falcon_nic_data {
	struct pci_dev *pci_dev2;
	struct falcon_board board;
	unsigned int stats_disable_count;
	bool stats_pending;
	struct timer_list stats_timer;
	u32 *stats_dma_done;
	struct efx_spi_device spi_flash;
	struct efx_spi_device spi_eeprom;
	struct mutex spi_lock;
	struct mutex mdio_lock;
	bool xmac_poll_required;
};

static inline struct falcon_board *falcon_board(struct efx_nic *efx)
{
	struct falcon_nic_data *data = efx->nic_data;
	return &data->board;
}

/**
 * struct siena_nic_data - Siena NIC state
 * @mcdi: Management-Controller-to-Driver Interface
 * @wol_filter_id: Wake-on-LAN packet filter id
 * @hwmon: Hardware monitor state
 */
struct siena_nic_data {
	struct efx_mcdi_iface mcdi;
	int wol_filter_id;
#ifdef CONFIG_SFC_MCDI_MON
	struct efx_mcdi_mon hwmon;
#endif
};

#ifdef CONFIG_SFC_MCDI_MON
static inline struct efx_mcdi_mon *efx_mcdi_mon(struct efx_nic *efx)
{
	struct siena_nic_data *nic_data;
	EFX_BUG_ON_PARANOID(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
	nic_data = efx->nic_data;
	return &nic_data->hwmon;
}
#endif

/*
 * On the SFC9000 family each port is associated with 1 PCI physical
 * function (PF) handled by sfc and a configurable number of virtual
 * functions (VFs) that may be handled by some other driver, often in
 * a VM guest.  The queue pointer registers are mapped in both PF and
 * VF BARs such that an 8K region provides access to a single RX, TX
 * and event queue (collectively a Virtual Interface, VI or VNIC).
 *
 * The PF has access to all 1024 VIs while VFs are mapped to VIs
 * according to VI_BASE and VI_SCALE: VF i has access to VIs numbered
 * in range [VI_BASE + i << VI_SCALE, VI_BASE + i + 1 << VI_SCALE).
 * The number of VIs and the VI_SCALE value are configurable but must
 * be established at boot time by firmware.
 */

/* Maximum VI_SCALE parameter supported by Siena */
#define EFX_VI_SCALE_MAX 6
/* Base VI to use for SR-IOV. Must be aligned to (1 << EFX_VI_SCALE_MAX),
 * so this is the smallest allowed value. */
#define EFX_VI_BASE 128U
/* Maximum number of VFs allowed */
#define EFX_VF_COUNT_MAX 127
/* Limit EVQs on VFs to be only 8k to reduce buffer table reservation */
#define EFX_MAX_VF_EVQ_SIZE 8192UL
/* The number of buffer table entries reserved for each VI on a VF */
#define EFX_VF_BUFTBL_PER_VI					\
	((EFX_MAX_VF_EVQ_SIZE + 2 * EFX_MAX_DMAQ_SIZE) *	\
	 sizeof(efx_qword_t) / EFX_BUF_SIZE)

#ifdef CONFIG_SFC_SRIOV

static inline bool efx_sriov_wanted(struct efx_nic *efx)
{
	return efx->vf_count != 0;
}
static inline bool efx_sriov_enabled(struct efx_nic *efx)
{
	return efx->vf_init_count != 0;
}
static inline unsigned int efx_vf_size(struct efx_nic *efx)
{
	return 1 << efx->vi_scale;
}

extern int efx_init_sriov(void);
extern void efx_sriov_probe(struct efx_nic *efx);
extern int efx_sriov_init(struct efx_nic *efx);
extern void efx_sriov_mac_address_changed(struct efx_nic *efx);
extern void efx_sriov_tx_flush_done(struct efx_nic *efx, efx_qword_t *event);
extern void efx_sriov_rx_flush_done(struct efx_nic *efx, efx_qword_t *event);
extern void efx_sriov_event(struct efx_channel *channel, efx_qword_t *event);
extern void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq);
extern void efx_sriov_flr(struct efx_nic *efx, unsigned flr);
extern void efx_sriov_reset(struct efx_nic *efx);
extern void efx_sriov_fini(struct efx_nic *efx);
extern void efx_fini_sriov(void);

#else

static inline bool efx_sriov_wanted(struct efx_nic *efx) { return false; }
static inline bool efx_sriov_enabled(struct efx_nic *efx) { return false; }
static inline unsigned int efx_vf_size(struct efx_nic *efx) { return 0; }

static inline int efx_init_sriov(void) { return 0; }
static inline void efx_sriov_probe(struct efx_nic *efx) {}
static inline int efx_sriov_init(struct efx_nic *efx) { return -EOPNOTSUPP; }
static inline void efx_sriov_mac_address_changed(struct efx_nic *efx) {}
static inline void efx_sriov_tx_flush_done(struct efx_nic *efx,
					   efx_qword_t *event) {}
static inline void efx_sriov_rx_flush_done(struct efx_nic *efx,
					   efx_qword_t *event) {}
static inline void efx_sriov_event(struct efx_channel *channel,
				   efx_qword_t *event) {}
static inline void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq) {}
static inline void efx_sriov_flr(struct efx_nic *efx, unsigned flr) {}
static inline void efx_sriov_reset(struct efx_nic *efx) {}
static inline void efx_sriov_fini(struct efx_nic *efx) {}
static inline void efx_fini_sriov(void) {}

#endif

extern int efx_sriov_set_vf_mac(struct net_device *dev, int vf, u8 *mac);
extern int efx_sriov_set_vf_vlan(struct net_device *dev, int vf,
				 u16 vlan, u8 qos);
extern int efx_sriov_get_vf_config(struct net_device *dev, int vf,
				   struct ifla_vf_info *ivf);
extern int efx_sriov_set_vf_spoofchk(struct net_device *net_dev, int vf,
				     bool spoofchk);

extern const struct efx_nic_type falcon_a1_nic_type;
extern const struct efx_nic_type falcon_b0_nic_type;
extern const struct efx_nic_type siena_a0_nic_type;

/**************************************************************************
 *
 * Externs
 *
 **************************************************************************
 */

extern int falcon_probe_board(struct efx_nic *efx, u16 revision_info);

/* TX data path */
extern int efx_nic_probe_tx(struct efx_tx_queue *tx_queue);
extern void efx_nic_init_tx(struct efx_tx_queue *tx_queue);
extern void efx_nic_fini_tx(struct efx_tx_queue *tx_queue);
extern void efx_nic_remove_tx(struct efx_tx_queue *tx_queue);
extern void efx_nic_push_buffers(struct efx_tx_queue *tx_queue);

/* RX data path */
extern int efx_nic_probe_rx(struct efx_rx_queue *rx_queue);
extern void efx_nic_init_rx(struct efx_rx_queue *rx_queue);
extern void efx_nic_fini_rx(struct efx_rx_queue *rx_queue);
extern void efx_nic_remove_rx(struct efx_rx_queue *rx_queue);
extern void efx_nic_notify_rx_desc(struct efx_rx_queue *rx_queue);
extern void efx_nic_generate_fill_event(struct efx_rx_queue *rx_queue);

/* Event data path */
extern int efx_nic_probe_eventq(struct efx_channel *channel);
extern void efx_nic_init_eventq(struct efx_channel *channel);
extern void efx_nic_fini_eventq(struct efx_channel *channel);
extern void efx_nic_remove_eventq(struct efx_channel *channel);
extern int efx_nic_process_eventq(struct efx_channel *channel, int rx_quota);
extern void efx_nic_eventq_read_ack(struct efx_channel *channel);
extern bool efx_nic_event_present(struct efx_channel *channel);

/* MAC/PHY */
extern void falcon_drain_tx_fifo(struct efx_nic *efx);
extern void falcon_reconfigure_mac_wrapper(struct efx_nic *efx);
extern bool falcon_xmac_check_fault(struct efx_nic *efx);
extern int falcon_reconfigure_xmac(struct efx_nic *efx);
extern void falcon_update_stats_xmac(struct efx_nic *efx);

/* Interrupts and test events */
extern int efx_nic_init_interrupt(struct efx_nic *efx);
extern void efx_nic_enable_interrupts(struct efx_nic *efx);
extern void efx_nic_generate_test_event(struct efx_channel *channel);
extern void efx_nic_generate_interrupt(struct efx_nic *efx);
extern void efx_nic_disable_interrupts(struct efx_nic *efx);
extern void efx_nic_fini_interrupt(struct efx_nic *efx);
extern irqreturn_t efx_nic_fatal_interrupt(struct efx_nic *efx);
extern irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id);
extern void falcon_irq_ack_a1(struct efx_nic *efx);

/* Global Resources */
extern int efx_nic_flush_queues(struct efx_nic *efx);
extern void falcon_start_nic_stats(struct efx_nic *efx);
extern void falcon_stop_nic_stats(struct efx_nic *efx);
extern void falcon_setup_xaui(struct efx_nic *efx);
extern int falcon_reset_xaui(struct efx_nic *efx);
extern void
efx_nic_dimension_resources(struct efx_nic *efx, unsigned sram_lim_qw);
extern void efx_nic_init_common(struct efx_nic *efx);
extern void efx_nic_push_rx_indir_table(struct efx_nic *efx);

int efx_nic_alloc_buffer(struct efx_nic *efx, struct efx_buffer *buffer,
			 unsigned int len);
void efx_nic_free_buffer(struct efx_nic *efx, struct efx_buffer *buffer);

/* Tests */
struct efx_nic_register_test {
	unsigned address;
	efx_oword_t mask;
};
extern int efx_nic_test_registers(struct efx_nic *efx,
				  const struct efx_nic_register_test *regs,
				  size_t n_regs);

extern size_t efx_nic_get_regs_len(struct efx_nic *efx);
extern void efx_nic_get_regs(struct efx_nic *efx, void *buf);

/**************************************************************************
 *
 * Falcon MAC stats
 *
 **************************************************************************
 */

#define FALCON_STAT_OFFSET(falcon_stat) EFX_VAL(falcon_stat, offset)
#define FALCON_STAT_WIDTH(falcon_stat) EFX_VAL(falcon_stat, WIDTH)

/* Retrieve statistic from statistics block */
#define FALCON_STAT(efx, falcon_stat, efx_stat) do {		\
	if (FALCON_STAT_WIDTH(falcon_stat) == 16)		\
		(efx)->mac_stats.efx_stat += le16_to_cpu(	\
			*((__force __le16 *)				\
			  (efx->stats_buffer.addr +		\
			   FALCON_STAT_OFFSET(falcon_stat))));	\
	else if (FALCON_STAT_WIDTH(falcon_stat) == 32)		\
		(efx)->mac_stats.efx_stat += le32_to_cpu(	\
			*((__force __le32 *)				\
			  (efx->stats_buffer.addr +		\
			   FALCON_STAT_OFFSET(falcon_stat))));	\
	else							\
		(efx)->mac_stats.efx_stat += le64_to_cpu(	\
			*((__force __le64 *)				\
			  (efx->stats_buffer.addr +		\
			   FALCON_STAT_OFFSET(falcon_stat))));	\
	} while (0)

#define FALCON_MAC_STATS_SIZE 0x100

#define MAC_DATA_LBN 0
#define MAC_DATA_WIDTH 32

extern void efx_generate_event(struct efx_nic *efx, unsigned int evq,
			       efx_qword_t *event);

extern void falcon_poll_xmac(struct efx_nic *efx);

#endif /* EFX_NIC_H */
Commit	Line	Data
8ceee660 BH	1	/****************************************************************************
	2	* Driver for Solarflare Solarstorm network controllers and boards
	3	* Copyright 2005-2006 Fen Systems Ltd.
0a6f40c6	4	* Copyright 2006-2011 Solarflare Communications Inc.
8ceee660 BH	5	*
	6	* This program is free software; you can redistribute it and/or modify it
	7	* under the terms of the GNU General Public License version 2 as published
	8	* by the Free Software Foundation, incorporated herein by reference.
	9	*/
	10
744093c9 BH	11	#ifndef EFX_NIC_H
744093c9 BH	12	#define EFX_NIC_H
8ceee660	13
5c16a96c	14	#include <linux/i2c-algo-bit.h>
8ceee660	15	#include "net_driver.h"
177dfcd8	16	#include "efx.h"
8880f4ec	17	#include "mcdi.h"
4de92180	18	#include "spi.h"
8ceee660 BH	19
	20	/*
	21	* Falcon hardware control
	22	*/
	23
daeda630 BH	24	enum {
	25	EFX_REV_FALCON_A0 = 0,
	26	EFX_REV_FALCON_A1 = 1,
	27	EFX_REV_FALCON_B0 = 2,
8880f4ec	28	EFX_REV_SIENA_A0 = 3,
8ceee660 BH	29	};
8ceee660 BH	30
daeda630	31	static inline int efx_nic_rev(struct efx_nic *efx)
55668611	32	{
daeda630	33	return efx->type->revision;
55668611	34	}
8ceee660	35
152b6a62 BH	36	extern u32 efx_nic_fpga_ver(struct efx_nic *efx);
	37
	38	/* NIC has two interlinked PCI functions for the same port. */
	39	static inline bool efx_nic_is_dual_func(struct efx_nic *efx)
	40	{
	41	return efx_nic_rev(efx) < EFX_REV_FALCON_B0;
	42	}
	43
c1c4f453 BH	44	enum {
	45	PHY_TYPE_NONE = 0,
	46	PHY_TYPE_TXC43128 = 1,
	47	PHY_TYPE_88E1111 = 2,
	48	PHY_TYPE_SFX7101 = 3,
	49	PHY_TYPE_QT2022C2 = 4,
	50	PHY_TYPE_PM8358 = 6,
	51	PHY_TYPE_SFT9001A = 8,
	52	PHY_TYPE_QT2025C = 9,
	53	PHY_TYPE_SFT9001B = 10,
	54	};
	55
	56	#define FALCON_XMAC_LOOPBACKS \
	57	((1 << LOOPBACK_XGMII) \| \
	58	(1 << LOOPBACK_XGXS) \| \
	59	(1 << LOOPBACK_XAUI))
	60
	61	#define FALCON_GMAC_LOOPBACKS \
	62	(1 << LOOPBACK_GMAC)
	63
5b6262d0 BH	64	/* Alignment of PCIe DMA boundaries (4KB) */
	65	#define EFX_PAGE_SIZE 4096
	66	/* Size and alignment of buffer table entries (same) */
	67	#define EFX_BUF_SIZE EFX_PAGE_SIZE
	68
3759433d	69	/**
44838a44 BH	70	* struct falcon_board_type - board operations and type information
	71	* @id: Board type id, as found in NVRAM
	72	* @ref_model: Model number of Solarflare reference design
	73	* @gen_type: Generic board type description
3759433d BH	74	* @init: Allocate resources and initialise peripheral hardware
3759433d BH	75	* @init_phy: Do board-specific PHY initialisation
44838a44	76	* @fini: Shut down hardware and free resources
3759433d BH	77	* @set_id_led: Set state of identifying LED or revert to automatic function
3759433d BH	78	* @monitor: Board-specific health check function
44838a44 BH	79	*/
	80	struct falcon_board_type {
	81	u8 id;
	82	const char *ref_model;
	83	const char *gen_type;
	84	int (init) (struct efx_nic nic);
	85	void (init_phy) (struct efx_nic efx);
	86	void (fini) (struct efx_nic nic);
	87	void (set_id_led) (struct efx_nic efx, enum efx_led_mode mode);
	88	int (monitor) (struct efx_nic nic);
	89	};
	90
	91	/**
	92	* struct falcon_board - board information
	93	* @type: Type of board
	94	* @major: Major rev. ('A', 'B' ...)
	95	* @minor: Minor rev. (0, 1, ...)
e775fb93 BH	96	* @i2c_adap: I2C adapter for on-board peripherals
e775fb93 BH	97	* @i2c_data: Data for bit-banging algorithm
3759433d BH	98	* @hwmon_client: I2C client for hardware monitor
	99	* @ioexp_client: I2C client for power/port control
	100	*/
	101	struct falcon_board {
44838a44	102	const struct falcon_board_type *type;
3759433d BH	103	int major;
3759433d BH	104	int minor;
e775fb93 BH	105	struct i2c_adapter i2c_adap;
e775fb93 BH	106	struct i2c_algo_bit_data i2c_data;
3759433d BH	107	struct i2c_client hwmon_client, ioexp_client;
	108	};
	109
5c16a96c BH	110	/**
5c16a96c BH	111	* struct falcon_nic_data - Falcon NIC state
8986352a	112	* @pci_dev2: Secondary function of Falcon A
3759433d	113	* @board: Board state and functions
55edc6e6 BH	114	* @stats_disable_count: Nest count for disabling statistics fetches
	115	* @stats_pending: Is there a pending DMA of MAC statistics.
	116	* @stats_timer: A timer for regularly fetching MAC statistics.
	117	* @stats_dma_done: Pointer to the flag which indicates DMA completion.
4de92180 BH	118	* @spi_flash: SPI flash device
	119	* @spi_eeprom: SPI EEPROM device
	120	* @spi_lock: SPI bus lock
4833f02a	121	* @mdio_lock: MDIO bus lock
cef68bde	122	* @xmac_poll_required: XMAC link state needs polling
5c16a96c BH	123	*/
	124	struct falcon_nic_data {
	125	struct pci_dev *pci_dev2;
3759433d	126	struct falcon_board board;
55edc6e6 BH	127	unsigned int stats_disable_count;
	128	bool stats_pending;
	129	struct timer_list stats_timer;
	130	u32 *stats_dma_done;
4de92180 BH	131	struct efx_spi_device spi_flash;
	132	struct efx_spi_device spi_eeprom;
	133	struct mutex spi_lock;
4833f02a	134	struct mutex mdio_lock;
cef68bde	135	bool xmac_poll_required;
5c16a96c BH	136	};
5c16a96c BH	137
278c0621 BH	138	static inline struct falcon_board falcon_board(struct efx_nic efx)
278c0621 BH	139	{
3759433d BH	140	struct falcon_nic_data *data = efx->nic_data;
3759433d BH	141	return &data->board;
278c0621 BH	142	}
278c0621 BH	143
8880f4ec BH	144	/**
8880f4ec BH	145	* struct siena_nic_data - Siena NIC state
8880f4ec BH	146	* @mcdi: Management-Controller-to-Driver Interface
8880f4ec BH	147	* @wol_filter_id: Wake-on-LAN packet filter id
55c5e0f8	148	* @hwmon: Hardware monitor state
8880f4ec BH	149	*/
8880f4ec BH	150	struct siena_nic_data {
8880f4ec BH	151	struct efx_mcdi_iface mcdi;
8880f4ec BH	152	int wol_filter_id;
55c5e0f8 BH	153	#ifdef CONFIG_SFC_MCDI_MON
	154	struct efx_mcdi_mon hwmon;
	155	#endif
8880f4ec BH	156	};
8880f4ec BH	157
55c5e0f8 BH	158	#ifdef CONFIG_SFC_MCDI_MON
	159	static inline struct efx_mcdi_mon efx_mcdi_mon(struct efx_nic efx)
	160	{
	161	struct siena_nic_data *nic_data;
	162	EFX_BUG_ON_PARANOID(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
	163	nic_data = efx->nic_data;
	164	return &nic_data->hwmon;
	165	}
	166	#endif
	167
cd2d5b52 BH	168	/*
	169	* On the SFC9000 family each port is associated with 1 PCI physical
	170	* function (PF) handled by sfc and a configurable number of virtual
	171	* functions (VFs) that may be handled by some other driver, often in
	172	* a VM guest. The queue pointer registers are mapped in both PF and
	173	* VF BARs such that an 8K region provides access to a single RX, TX
	174	* and event queue (collectively a Virtual Interface, VI or VNIC).
	175	*
	176	* The PF has access to all 1024 VIs while VFs are mapped to VIs
	177	* according to VI_BASE and VI_SCALE: VF i has access to VIs numbered
	178	* in range [VI_BASE + i << VI_SCALE, VI_BASE + i + 1 << VI_SCALE).
	179	* The number of VIs and the VI_SCALE value are configurable but must
	180	* be established at boot time by firmware.
	181	*/
	182
	183	/* Maximum VI_SCALE parameter supported by Siena */
	184	#define EFX_VI_SCALE_MAX 6
	185	/* Base VI to use for SR-IOV. Must be aligned to (1 << EFX_VI_SCALE_MAX),
	186	* so this is the smallest allowed value. */
	187	#define EFX_VI_BASE 128U
	188	/* Maximum number of VFs allowed */
	189	#define EFX_VF_COUNT_MAX 127
	190	/* Limit EVQs on VFs to be only 8k to reduce buffer table reservation */
	191	#define EFX_MAX_VF_EVQ_SIZE 8192UL
	192	/* The number of buffer table entries reserved for each VI on a VF */
	193	#define EFX_VF_BUFTBL_PER_VI \
	194	((EFX_MAX_VF_EVQ_SIZE + 2 * EFX_MAX_DMAQ_SIZE) * \
	195	sizeof(efx_qword_t) / EFX_BUF_SIZE)
	196
	197	#ifdef CONFIG_SFC_SRIOV
	198
	199	static inline bool efx_sriov_wanted(struct efx_nic *efx)
	200	{
	201	return efx->vf_count != 0;
	202	}
	203	static inline bool efx_sriov_enabled(struct efx_nic *efx)
	204	{
	205	return efx->vf_init_count != 0;
	206	}
	207	static inline unsigned int efx_vf_size(struct efx_nic *efx)
	208	{
	209	return 1 << efx->vi_scale;
	210	}
	211
	212	extern int efx_init_sriov(void);
	213	extern void efx_sriov_probe(struct efx_nic *efx);
	214	extern int efx_sriov_init(struct efx_nic *efx);
	215	extern void efx_sriov_mac_address_changed(struct efx_nic *efx);
	216	extern void efx_sriov_tx_flush_done(struct efx_nic efx, efx_qword_t event);
	217	extern void efx_sriov_rx_flush_done(struct efx_nic efx, efx_qword_t event);
	218	extern void efx_sriov_event(struct efx_channel channel, efx_qword_t event);
	219	extern void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq);
	220	extern void efx_sriov_flr(struct efx_nic *efx, unsigned flr);
	221	extern void efx_sriov_reset(struct efx_nic *efx);
	222	extern void efx_sriov_fini(struct efx_nic *efx);
	223	extern void efx_fini_sriov(void);
	224
	225	#else
	226
	227	static inline bool efx_sriov_wanted(struct efx_nic *efx) { return false; }
	228	static inline bool efx_sriov_enabled(struct efx_nic *efx) { return false; }
	229	static inline unsigned int efx_vf_size(struct efx_nic *efx) { return 0; }
	230
	231	static inline int efx_init_sriov(void) { return 0; }
232	static inline void efx_sriov_probe(struct efx_nic *efx) {}
233	static inline int efx_sriov_init(struct efx_nic *efx) { return -EOPNOTSUPP; }
234	static inline void efx_sriov_mac_address_changed(struct efx_nic *efx) {}
235	static inline void efx_sriov_tx_flush_done(struct efx_nic *efx,
236	efx_qword_t *event) {}
237	static inline void efx_sriov_rx_flush_done(struct efx_nic *efx,
238	efx_qword_t *event) {}
239	static inline void efx_sriov_event(struct efx_channel *channel,
240	efx_qword_t *event) {}
241	static inline void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq) {}
242	static inline void efx_sriov_flr(struct efx_nic *efx, unsigned flr) {}
243	static inline void efx_sriov_reset(struct efx_nic *efx) {}
244	static inline void efx_sriov_fini(struct efx_nic *efx) {}
245	static inline void efx_fini_sriov(void) {}
246
247	#endif
248
249	extern int efx_sriov_set_vf_mac(struct net_device dev, int vf, u8 mac);
250	extern int efx_sriov_set_vf_vlan(struct net_device *dev, int vf,
251	u16 vlan, u8 qos);
252	extern int efx_sriov_get_vf_config(struct net_device *dev, int vf,
253	struct ifla_vf_info *ivf);
254	extern int efx_sriov_set_vf_spoofchk(struct net_device *net_dev, int vf,
255	bool spoofchk);
256
6c8c2513	257	extern const struct efx_nic_type falcon_a1_nic_type;
	258	extern const struct efx_nic_type falcon_b0_nic_type;
	259	extern const struct efx_nic_type siena_a0_nic_type;
8ceee660 BH	260
	261	/**************************************************************************
	262	*
	263	* Externs
	264	*
	265	**************************************************************************
	266	*/
	267
e41c11ee	268	extern int falcon_probe_board(struct efx_nic *efx, u16 revision_info);
5087b54d	269
8ceee660	270	/* TX data path */
152b6a62 BH	271	extern int efx_nic_probe_tx(struct efx_tx_queue *tx_queue);
	272	extern void efx_nic_init_tx(struct efx_tx_queue *tx_queue);
	273	extern void efx_nic_fini_tx(struct efx_tx_queue *tx_queue);
	274	extern void efx_nic_remove_tx(struct efx_tx_queue *tx_queue);
	275	extern void efx_nic_push_buffers(struct efx_tx_queue *tx_queue);
8ceee660 BH	276
8ceee660 BH	277	/* RX data path */
152b6a62 BH	278	extern int efx_nic_probe_rx(struct efx_rx_queue *rx_queue);
	279	extern void efx_nic_init_rx(struct efx_rx_queue *rx_queue);
	280	extern void efx_nic_fini_rx(struct efx_rx_queue *rx_queue);
	281	extern void efx_nic_remove_rx(struct efx_rx_queue *rx_queue);
	282	extern void efx_nic_notify_rx_desc(struct efx_rx_queue *rx_queue);
2ae75dac	283	extern void efx_nic_generate_fill_event(struct efx_rx_queue *rx_queue);
8ceee660 BH	284
8ceee660 BH	285	/* Event data path */
152b6a62 BH	286	extern int efx_nic_probe_eventq(struct efx_channel *channel);
	287	extern void efx_nic_init_eventq(struct efx_channel *channel);
	288	extern void efx_nic_fini_eventq(struct efx_channel *channel);
	289	extern void efx_nic_remove_eventq(struct efx_channel *channel);
	290	extern int efx_nic_process_eventq(struct efx_channel *channel, int rx_quota);
	291	extern void efx_nic_eventq_read_ack(struct efx_channel *channel);
d4fabcc8	292	extern bool efx_nic_event_present(struct efx_channel *channel);
8ceee660	293
8ceee660	294	/* MAC/PHY */
8ceee660	295	extern void falcon_drain_tx_fifo(struct efx_nic *efx);
8ceee660	296	extern void falcon_reconfigure_mac_wrapper(struct efx_nic *efx);
710b208d BH	297	extern bool falcon_xmac_check_fault(struct efx_nic *efx);
	298	extern int falcon_reconfigure_xmac(struct efx_nic *efx);
	299	extern void falcon_update_stats_xmac(struct efx_nic *efx);
8ceee660 BH	300
8ceee660 BH	301	/* Interrupts and test events */
152b6a62 BH	302	extern int efx_nic_init_interrupt(struct efx_nic *efx);
152b6a62 BH	303	extern void efx_nic_enable_interrupts(struct efx_nic *efx);
d730dc52	304	extern void efx_nic_generate_test_event(struct efx_channel *channel);
152b6a62 BH	305	extern void efx_nic_generate_interrupt(struct efx_nic *efx);
	306	extern void efx_nic_disable_interrupts(struct efx_nic *efx);
	307	extern void efx_nic_fini_interrupt(struct efx_nic *efx);
	308	extern irqreturn_t efx_nic_fatal_interrupt(struct efx_nic *efx);
	309	extern irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id);
	310	extern void falcon_irq_ack_a1(struct efx_nic *efx);
	311
8ceee660	312	/* Global Resources */
152b6a62	313	extern int efx_nic_flush_queues(struct efx_nic *efx);
55edc6e6 BH	314	extern void falcon_start_nic_stats(struct efx_nic *efx);
55edc6e6 BH	315	extern void falcon_stop_nic_stats(struct efx_nic *efx);
b7b40eeb	316	extern void falcon_setup_xaui(struct efx_nic *efx);
8ceee660	317	extern int falcon_reset_xaui(struct efx_nic *efx);
28e47c49 BH	318	extern void
28e47c49 BH	319	efx_nic_dimension_resources(struct efx_nic *efx, unsigned sram_lim_qw);
152b6a62	320	extern void efx_nic_init_common(struct efx_nic *efx);
765c9f46	321	extern void efx_nic_push_rx_indir_table(struct efx_nic *efx);
152b6a62 BH	322
	323	int efx_nic_alloc_buffer(struct efx_nic efx, struct efx_buffer buffer,
	324	unsigned int len);
	325	void efx_nic_free_buffer(struct efx_nic efx, struct efx_buffer buffer);
8ceee660	326
8c8661e4	327	/* Tests */
152b6a62 BH	328	struct efx_nic_register_test {
	329	unsigned address;
	330	efx_oword_t mask;
	331	};
	332	extern int efx_nic_test_registers(struct efx_nic *efx,
	333	const struct efx_nic_register_test *regs,
	334	size_t n_regs);
8c8661e4	335
5b98c1bf BH	336	extern size_t efx_nic_get_regs_len(struct efx_nic *efx);
	337	extern void efx_nic_get_regs(struct efx_nic efx, void buf);
	338
8ceee660 BH	339	/**************************************************************************
	340	*
	341	* Falcon MAC stats
	342	*
	343	**************************************************************************
	344	*/
	345
	346	#define FALCON_STAT_OFFSET(falcon_stat) EFX_VAL(falcon_stat, offset)
	347	#define FALCON_STAT_WIDTH(falcon_stat) EFX_VAL(falcon_stat, WIDTH)
	348
	349	/* Retrieve statistic from statistics block */
	350	#define FALCON_STAT(efx, falcon_stat, efx_stat) do { \
	351	if (FALCON_STAT_WIDTH(falcon_stat) == 16) \
	352	(efx)->mac_stats.efx_stat += le16_to_cpu( \
	353	((__force __le16 ) \
	354	(efx->stats_buffer.addr + \
	355	FALCON_STAT_OFFSET(falcon_stat)))); \
	356	else if (FALCON_STAT_WIDTH(falcon_stat) == 32) \
	357	(efx)->mac_stats.efx_stat += le32_to_cpu( \
	358	((__force __le32 ) \
	359	(efx->stats_buffer.addr + \
	360	FALCON_STAT_OFFSET(falcon_stat)))); \
	361	else \
	362	(efx)->mac_stats.efx_stat += le64_to_cpu( \
	363	((__force __le64 ) \
	364	(efx->stats_buffer.addr + \
	365	FALCON_STAT_OFFSET(falcon_stat)))); \
	366	} while (0)
	367
	368	#define FALCON_MAC_STATS_SIZE 0x100
	369
	370	#define MAC_DATA_LBN 0
	371	#define MAC_DATA_WIDTH 32
	372
90893000 BH	373	extern void efx_generate_event(struct efx_nic *efx, unsigned int evq,
90893000 BH	374	efx_qword_t *event);
8ceee660	375
9007b9fa BH	376	extern void falcon_poll_xmac(struct efx_nic *efx);
9007b9fa BH	377
744093c9	378	#endif /* EFX_NIC_H */