]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/net/ethernet/sis/sis900.c
netdev: ethernet dev_alloc_skb to netdev_alloc_skb
[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / sis / sis900.c
CommitLineData
1da177e4 1/* sis900.c: A SiS 900/7016 PCI Fast Ethernet driver for Linux.
6aa20a22 2 Copyright 1999 Silicon Integrated System Corporation
d269a69f 3 Revision: 1.08.10 Apr. 2 2006
6aa20a22 4
1da177e4 5 Modified from the driver which is originally written by Donald Becker.
6aa20a22 6
1da177e4
LT
7 This software may be used and distributed according to the terms
8 of the GNU General Public License (GPL), incorporated herein by reference.
9 Drivers based on this skeleton fall under the GPL and must retain
10 the authorship (implicit copyright) notice.
6aa20a22 11
1da177e4
LT
12 References:
13 SiS 7016 Fast Ethernet PCI Bus 10/100 Mbps LAN Controller with OnNow Support,
14 preliminary Rev. 1.0 Jan. 14, 1998
15 SiS 900 Fast Ethernet PCI Bus 10/100 Mbps LAN Single Chip with OnNow Support,
16 preliminary Rev. 1.0 Nov. 10, 1998
17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
18 preliminary Rev. 1.0 Jan. 18, 1998
19
d269a69f 20 Rev 1.08.10 Apr. 2 2006 Daniele Venzano add vlan (jumbo packets) support
ea37ccea 21 Rev 1.08.09 Sep. 19 2005 Daniele Venzano add Wake on LAN support
1da177e4 22 Rev 1.08.08 Jan. 22 2005 Daniele Venzano use netif_msg for debugging messages
d269a69f 23 Rev 1.08.07 Nov. 2 2003 Daniele Venzano <venza@brownhat.org> add suspend/resume support
1da177e4
LT
24 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
26 Rev 1.08.04 Apr. 25 2002 Mufasa Yang <mufasa@sis.com.tw> added SiS962 support
27 Rev 1.08.03 Feb. 1 2002 Matt Domsch <Matt_Domsch@dell.com> update to use library crc32 function
28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
31 Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kernel 2.4.3
6aa20a22 32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
1da177e4
LT
33 Rev 1.07.09 Feb. 9 2001 Dave Jones <davej@suse.de> PCI enable cleanup
34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
35 Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaround fix
36 Rev 1.07.06 Nov. 7 2000 Jeff Garzik <jgarzik@pobox.com> some bug fix and cleaning
37 Rev 1.07.05 Nov. 6 2000 metapirat<metapirat@gmx.de> contribute media type select by ifconfig
38 Rev 1.07.04 Sep. 6 2000 Lei-Chun Chang added ICS1893 PHY support
b595076a 39 Rev 1.07.03 Aug. 24 2000 Lei-Chun Chang (lcchang@sis.com.tw) modified 630E equalizer workaround rule
1da177e4
LT
40 Rev 1.07.01 Aug. 08 2000 Ollie Lho minor update for SiS 630E and SiS 630E A1
41 Rev 1.07 Mar. 07 2000 Ollie Lho bug fix in Rx buffer ring
42 Rev 1.06.04 Feb. 11 2000 Jeff Garzik <jgarzik@pobox.com> softnet and init for kernel 2.4
43 Rev 1.06.03 Dec. 23 1999 Ollie Lho Third release
44 Rev 1.06.02 Nov. 23 1999 Ollie Lho bug in mac probing fixed
45 Rev 1.06.01 Nov. 16 1999 Ollie Lho CRC calculation provide by Joseph Zbiciak (im14u2c@primenet.com)
46 Rev 1.06 Nov. 4 1999 Ollie Lho (ollie@sis.com.tw) Second release
47 Rev 1.05.05 Oct. 29 1999 Ollie Lho (ollie@sis.com.tw) Single buffer Tx/Rx
48 Chin-Shan Li (lcs@sis.com.tw) Added AMD Am79c901 HomePNA PHY support
49 Rev 1.05 Aug. 7 1999 Jim Huang (cmhuang@sis.com.tw) Initial release
50*/
51
52#include <linux/module.h>
53#include <linux/moduleparam.h>
54#include <linux/kernel.h>
d43c36dc 55#include <linux/sched.h>
1da177e4
LT
56#include <linux/string.h>
57#include <linux/timer.h>
58#include <linux/errno.h>
59#include <linux/ioport.h>
60#include <linux/slab.h>
61#include <linux/interrupt.h>
62#include <linux/pci.h>
63#include <linux/netdevice.h>
64#include <linux/init.h>
65#include <linux/mii.h>
66#include <linux/etherdevice.h>
67#include <linux/skbuff.h>
68#include <linux/delay.h>
69#include <linux/ethtool.h>
70#include <linux/crc32.h>
71#include <linux/bitops.h>
12b279f9 72#include <linux/dma-mapping.h>
1da177e4
LT
73
74#include <asm/processor.h> /* Processor type for cache alignment. */
75#include <asm/io.h>
76#include <asm/irq.h>
77#include <asm/uaccess.h> /* User space memory access functions */
78
79#include "sis900.h"
80
81#define SIS900_MODULE_NAME "sis900"
d269a69f 82#define SIS900_DRV_VERSION "v1.08.10 Apr. 2 2006"
1da177e4 83
9a3c3de7
SH
84static const char version[] __devinitconst =
85 KERN_INFO "sis900.c: " SIS900_DRV_VERSION "\n";
1da177e4
LT
86
87static int max_interrupt_work = 40;
88static int multicast_filter_limit = 128;
89
90static int sis900_debug = -1; /* Use SIS900_DEF_MSG as value */
91
92#define SIS900_DEF_MSG \
93 (NETIF_MSG_DRV | \
94 NETIF_MSG_LINK | \
95 NETIF_MSG_RX_ERR | \
96 NETIF_MSG_TX_ERR)
97
98/* Time in jiffies before concluding the transmitter is hung. */
99#define TX_TIMEOUT (4*HZ)
1da177e4
LT
100
101enum {
102 SIS_900 = 0,
103 SIS_7016
104};
f71e1309 105static const char * card_names[] = {
1da177e4
LT
106 "SiS 900 PCI Fast Ethernet",
107 "SiS 7016 PCI Fast Ethernet"
108};
a3aa1884 109static DEFINE_PCI_DEVICE_TABLE(sis900_pci_tbl) = {
1da177e4
LT
110 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_900,
111 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_900},
112 {PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_7016,
113 PCI_ANY_ID, PCI_ANY_ID, 0, 0, SIS_7016},
114 {0,}
115};
116MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
117
118static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
119
f71e1309 120static const struct mii_chip_info {
1da177e4
LT
121 const char * name;
122 u16 phy_id0;
123 u16 phy_id1;
124 u8 phy_types;
125#define HOME 0x0001
126#define LAN 0x0002
127#define MIX 0x0003
128#define UNKNOWN 0x0
129} mii_chip_table[] = {
130 { "SiS 900 Internal MII PHY", 0x001d, 0x8000, LAN },
131 { "SiS 7014 Physical Layer Solution", 0x0016, 0xf830, LAN },
d8e95e52 132 { "SiS 900 on Foxconn 661 7MI", 0x0143, 0xBC70, LAN },
1da177e4 133 { "Altimata AC101LF PHY", 0x0022, 0x5520, LAN },
494aced2 134 { "ADM 7001 LAN PHY", 0x002e, 0xcc60, LAN },
1da177e4
LT
135 { "AMD 79C901 10BASE-T PHY", 0x0000, 0x6B70, LAN },
136 { "AMD 79C901 HomePNA PHY", 0x0000, 0x6B90, HOME},
137 { "ICS LAN PHY", 0x0015, 0xF440, LAN },
80a8003f 138 { "ICS LAN PHY", 0x0143, 0xBC70, LAN },
1da177e4
LT
139 { "NS 83851 PHY", 0x2000, 0x5C20, MIX },
140 { "NS 83847 PHY", 0x2000, 0x5C30, MIX },
141 { "Realtek RTL8201 PHY", 0x0000, 0x8200, LAN },
142 { "VIA 6103 PHY", 0x0101, 0x8f20, LAN },
143 {NULL,},
144};
145
146struct mii_phy {
147 struct mii_phy * next;
148 int phy_addr;
149 u16 phy_id0;
150 u16 phy_id1;
151 u16 status;
152 u8 phy_types;
153};
154
155typedef struct _BufferDesc {
156 u32 link;
157 u32 cmdsts;
158 u32 bufptr;
159} BufferDesc;
160
161struct sis900_private {
1da177e4
LT
162 struct pci_dev * pci_dev;
163
164 spinlock_t lock;
165
166 struct mii_phy * mii;
167 struct mii_phy * first_mii; /* record the first mii structure */
168 unsigned int cur_phy;
da369b01 169 struct mii_if_info mii_info;
1da177e4
LT
170
171 struct timer_list timer; /* Link status detection timer. */
172 u8 autong_complete; /* 1: auto-negotiate complete */
173
174 u32 msg_enable;
175
176 unsigned int cur_rx, dirty_rx; /* producer/comsumer pointers for Tx/Rx ring */
177 unsigned int cur_tx, dirty_tx;
178
179 /* The saved address of a sent/receive-in-place packet buffer */
180 struct sk_buff *tx_skbuff[NUM_TX_DESC];
181 struct sk_buff *rx_skbuff[NUM_RX_DESC];
182 BufferDesc *tx_ring;
183 BufferDesc *rx_ring;
184
185 dma_addr_t tx_ring_dma;
186 dma_addr_t rx_ring_dma;
187
188 unsigned int tx_full; /* The Tx queue is full. */
189 u8 host_bridge_rev;
190 u8 chipset_rev;
191};
192
193MODULE_AUTHOR("Jim Huang <cmhuang@sis.com.tw>, Ollie Lho <ollie@sis.com.tw>");
194MODULE_DESCRIPTION("SiS 900 PCI Fast Ethernet driver");
195MODULE_LICENSE("GPL");
196
197module_param(multicast_filter_limit, int, 0444);
198module_param(max_interrupt_work, int, 0444);
199module_param(sis900_debug, int, 0444);
200MODULE_PARM_DESC(multicast_filter_limit, "SiS 900/7016 maximum number of filtered multicast addresses");
201MODULE_PARM_DESC(max_interrupt_work, "SiS 900/7016 maximum events handled per interrupt");
202MODULE_PARM_DESC(sis900_debug, "SiS 900/7016 bitmapped debugging message level");
203
204#ifdef CONFIG_NET_POLL_CONTROLLER
205static void sis900_poll(struct net_device *dev);
206#endif
207static int sis900_open(struct net_device *net_dev);
208static int sis900_mii_probe (struct net_device * net_dev);
209static void sis900_init_rxfilter (struct net_device * net_dev);
210static u16 read_eeprom(long ioaddr, int location);
da369b01 211static int mdio_read(struct net_device *net_dev, int phy_id, int location);
1da177e4
LT
212static void mdio_write(struct net_device *net_dev, int phy_id, int location, int val);
213static void sis900_timer(unsigned long data);
214static void sis900_check_mode (struct net_device *net_dev, struct mii_phy *mii_phy);
215static void sis900_tx_timeout(struct net_device *net_dev);
216static void sis900_init_tx_ring(struct net_device *net_dev);
217static void sis900_init_rx_ring(struct net_device *net_dev);
61357325
SH
218static netdev_tx_t sis900_start_xmit(struct sk_buff *skb,
219 struct net_device *net_dev);
1da177e4
LT
220static int sis900_rx(struct net_device *net_dev);
221static void sis900_finish_xmit (struct net_device *net_dev);
7d12e780 222static irqreturn_t sis900_interrupt(int irq, void *dev_instance);
1da177e4
LT
223static int sis900_close(struct net_device *net_dev);
224static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd);
1da177e4
LT
225static u16 sis900_mcast_bitnr(u8 *addr, u8 revision);
226static void set_rx_mode(struct net_device *net_dev);
227static void sis900_reset(struct net_device *net_dev);
228static void sis630_set_eq(struct net_device *net_dev, u8 revision);
229static int sis900_set_config(struct net_device *dev, struct ifmap *map);
230static u16 sis900_default_phy(struct net_device * net_dev);
231static void sis900_set_capability( struct net_device *net_dev ,struct mii_phy *phy);
232static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr);
233static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr);
234static void sis900_set_mode (long ioaddr, int speed, int duplex);
7282d491 235static const struct ethtool_ops sis900_ethtool_ops;
1da177e4
LT
236
237/**
238 * sis900_get_mac_addr - Get MAC address for stand alone SiS900 model
239 * @pci_dev: the sis900 pci device
6aa20a22 240 * @net_dev: the net device to get address for
1da177e4
LT
241 *
242 * Older SiS900 and friends, use EEPROM to store MAC address.
efa2ad89
OS
243 * MAC address is read from read_eeprom() into @net_dev->dev_addr and
244 * @net_dev->perm_addr.
1da177e4
LT
245 */
246
247static int __devinit sis900_get_mac_addr(struct pci_dev * pci_dev, struct net_device *net_dev)
248{
249 long ioaddr = pci_resource_start(pci_dev, 0);
250 u16 signature;
251 int i;
252
253 /* check to see if we have sane EEPROM */
6aa20a22 254 signature = (u16) read_eeprom(ioaddr, EEPROMSignature);
1da177e4 255 if (signature == 0xffff || signature == 0x0000) {
6aa20a22 256 printk (KERN_WARNING "%s: Error EERPOM read %x\n",
1da177e4
LT
257 pci_name(pci_dev), signature);
258 return 0;
259 }
260
261 /* get MAC address from EEPROM */
262 for (i = 0; i < 3; i++)
263 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
264
efa2ad89
OS
265 /* Store MAC Address in perm_addr */
266 memcpy(net_dev->perm_addr, net_dev->dev_addr, ETH_ALEN);
267
1da177e4
LT
268 return 1;
269}
270
271/**
272 * sis630e_get_mac_addr - Get MAC address for SiS630E model
273 * @pci_dev: the sis900 pci device
6aa20a22 274 * @net_dev: the net device to get address for
1da177e4
LT
275 *
276 * SiS630E model, use APC CMOS RAM to store MAC address.
277 * APC CMOS RAM is accessed through ISA bridge.
efa2ad89
OS
278 * MAC address is read into @net_dev->dev_addr and
279 * @net_dev->perm_addr.
1da177e4
LT
280 */
281
282static int __devinit sis630e_get_mac_addr(struct pci_dev * pci_dev,
283 struct net_device *net_dev)
284{
285 struct pci_dev *isa_bridge = NULL;
286 u8 reg;
287 int i;
288
289 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0008, isa_bridge);
290 if (!isa_bridge)
291 isa_bridge = pci_get_device(PCI_VENDOR_ID_SI, 0x0018, isa_bridge);
292 if (!isa_bridge) {
293 printk(KERN_WARNING "%s: Can not find ISA bridge\n",
294 pci_name(pci_dev));
295 return 0;
296 }
297 pci_read_config_byte(isa_bridge, 0x48, &reg);
298 pci_write_config_byte(isa_bridge, 0x48, reg | 0x40);
299
300 for (i = 0; i < 6; i++) {
301 outb(0x09 + i, 0x70);
6aa20a22 302 ((u8 *)(net_dev->dev_addr))[i] = inb(0x71);
1da177e4 303 }
efa2ad89
OS
304
305 /* Store MAC Address in perm_addr */
306 memcpy(net_dev->perm_addr, net_dev->dev_addr, ETH_ALEN);
307
1da177e4
LT
308 pci_write_config_byte(isa_bridge, 0x48, reg & ~0x40);
309 pci_dev_put(isa_bridge);
310
311 return 1;
312}
313
314
315/**
316 * sis635_get_mac_addr - Get MAC address for SIS635 model
317 * @pci_dev: the sis900 pci device
6aa20a22 318 * @net_dev: the net device to get address for
1da177e4
LT
319 *
320 * SiS635 model, set MAC Reload Bit to load Mac address from APC
6aa20a22 321 * to rfdr. rfdr is accessed through rfcr. MAC address is read into
efa2ad89 322 * @net_dev->dev_addr and @net_dev->perm_addr.
1da177e4
LT
323 */
324
325static int __devinit sis635_get_mac_addr(struct pci_dev * pci_dev,
326 struct net_device *net_dev)
327{
328 long ioaddr = net_dev->base_addr;
329 u32 rfcrSave;
330 u32 i;
331
332 rfcrSave = inl(rfcr + ioaddr);
333
334 outl(rfcrSave | RELOAD, ioaddr + cr);
335 outl(0, ioaddr + cr);
336
337 /* disable packet filtering before setting filter */
338 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
339
340 /* load MAC addr to filter data register */
341 for (i = 0 ; i < 3 ; i++) {
342 outl((i << RFADDR_shift), ioaddr + rfcr);
343 *( ((u16 *)net_dev->dev_addr) + i) = inw(ioaddr + rfdr);
344 }
345
efa2ad89
OS
346 /* Store MAC Address in perm_addr */
347 memcpy(net_dev->perm_addr, net_dev->dev_addr, ETH_ALEN);
348
1da177e4
LT
349 /* enable packet filtering */
350 outl(rfcrSave | RFEN, rfcr + ioaddr);
351
352 return 1;
353}
354
355/**
356 * sis96x_get_mac_addr - Get MAC address for SiS962 or SiS963 model
357 * @pci_dev: the sis900 pci device
6aa20a22 358 * @net_dev: the net device to get address for
1da177e4 359 *
6aa20a22 360 * SiS962 or SiS963 model, use EEPROM to store MAC address. And EEPROM
1da177e4 361 * is shared by
6aa20a22
JG
362 * LAN and 1394. When access EEPROM, send EEREQ signal to hardware first
363 * and wait for EEGNT. If EEGNT is ON, EEPROM is permitted to be access
1da177e4 364 * by LAN, otherwise is not. After MAC address is read from EEPROM, send
6aa20a22
JG
365 * EEDONE signal to refuse EEPROM access by LAN.
366 * The EEPROM map of SiS962 or SiS963 is different to SiS900.
367 * The signature field in SiS962 or SiS963 spec is meaningless.
efa2ad89 368 * MAC address is read into @net_dev->dev_addr and @net_dev->perm_addr.
1da177e4
LT
369 */
370
371static int __devinit sis96x_get_mac_addr(struct pci_dev * pci_dev,
372 struct net_device *net_dev)
373{
374 long ioaddr = net_dev->base_addr;
375 long ee_addr = ioaddr + mear;
376 u32 waittime = 0;
377 int i;
6aa20a22 378
1da177e4
LT
379 outl(EEREQ, ee_addr);
380 while(waittime < 2000) {
381 if(inl(ee_addr) & EEGNT) {
382
383 /* get MAC address from EEPROM */
384 for (i = 0; i < 3; i++)
385 ((u16 *)(net_dev->dev_addr))[i] = read_eeprom(ioaddr, i+EEPROMMACAddr);
386
efa2ad89
OS
387 /* Store MAC Address in perm_addr */
388 memcpy(net_dev->perm_addr, net_dev->dev_addr, ETH_ALEN);
389
1da177e4
LT
390 outl(EEDONE, ee_addr);
391 return 1;
392 } else {
6aa20a22 393 udelay(1);
1da177e4
LT
394 waittime ++;
395 }
396 }
397 outl(EEDONE, ee_addr);
398 return 0;
399}
400
09ab9e7c
SH
401static const struct net_device_ops sis900_netdev_ops = {
402 .ndo_open = sis900_open,
403 .ndo_stop = sis900_close,
404 .ndo_start_xmit = sis900_start_xmit,
405 .ndo_set_config = sis900_set_config,
afc4b13d 406 .ndo_set_rx_mode = set_rx_mode,
09ab9e7c
SH
407 .ndo_change_mtu = eth_change_mtu,
408 .ndo_validate_addr = eth_validate_addr,
fe96aaa1 409 .ndo_set_mac_address = eth_mac_addr,
09ab9e7c
SH
410 .ndo_do_ioctl = mii_ioctl,
411 .ndo_tx_timeout = sis900_tx_timeout,
412#ifdef CONFIG_NET_POLL_CONTROLLER
413 .ndo_poll_controller = sis900_poll,
414#endif
415};
416
1da177e4
LT
417/**
418 * sis900_probe - Probe for sis900 device
419 * @pci_dev: the sis900 pci device
420 * @pci_id: the pci device ID
421 *
422 * Check and probe sis900 net device for @pci_dev.
6aa20a22 423 * Get mac address according to the chip revision,
1da177e4
LT
424 * and assign SiS900-specific entries in the device structure.
425 * ie: sis900_open(), sis900_start_xmit(), sis900_close(), etc.
426 */
427
428static int __devinit sis900_probe(struct pci_dev *pci_dev,
429 const struct pci_device_id *pci_id)
430{
431 struct sis900_private *sis_priv;
432 struct net_device *net_dev;
433 struct pci_dev *dev;
434 dma_addr_t ring_dma;
435 void *ring_space;
436 long ioaddr;
437 int i, ret;
f71e1309 438 const char *card_name = card_names[pci_id->driver_data];
1da177e4
LT
439 const char *dev_name = pci_name(pci_dev);
440
441/* when built into the kernel, we only print version if device is found */
442#ifndef MODULE
443 static int printed_version;
444 if (!printed_version++)
445 printk(version);
446#endif
447
448 /* setup various bits in PCI command register */
449 ret = pci_enable_device(pci_dev);
450 if(ret) return ret;
6aa20a22 451
284901a9 452 i = pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32));
1da177e4 453 if(i){
2450022a 454 printk(KERN_ERR "sis900.c: architecture does not support "
1da177e4
LT
455 "32bit PCI busmaster DMA\n");
456 return i;
457 }
6aa20a22 458
1da177e4 459 pci_set_master(pci_dev);
6aa20a22 460
1da177e4
LT
461 net_dev = alloc_etherdev(sizeof(struct sis900_private));
462 if (!net_dev)
463 return -ENOMEM;
1da177e4
LT
464 SET_NETDEV_DEV(net_dev, &pci_dev->dev);
465
466 /* We do a request_region() to register /proc/ioports info. */
6aa20a22 467 ioaddr = pci_resource_start(pci_dev, 0);
1da177e4
LT
468 ret = pci_request_regions(pci_dev, "sis900");
469 if (ret)
470 goto err_out;
471
8f15ea42 472 sis_priv = netdev_priv(net_dev);
1da177e4
LT
473 net_dev->base_addr = ioaddr;
474 net_dev->irq = pci_dev->irq;
475 sis_priv->pci_dev = pci_dev;
476 spin_lock_init(&sis_priv->lock);
477
478 pci_set_drvdata(pci_dev, net_dev);
479
480 ring_space = pci_alloc_consistent(pci_dev, TX_TOTAL_SIZE, &ring_dma);
481 if (!ring_space) {
482 ret = -ENOMEM;
483 goto err_out_cleardev;
484 }
43d620c8 485 sis_priv->tx_ring = ring_space;
1da177e4
LT
486 sis_priv->tx_ring_dma = ring_dma;
487
488 ring_space = pci_alloc_consistent(pci_dev, RX_TOTAL_SIZE, &ring_dma);
489 if (!ring_space) {
490 ret = -ENOMEM;
491 goto err_unmap_tx;
492 }
43d620c8 493 sis_priv->rx_ring = ring_space;
1da177e4 494 sis_priv->rx_ring_dma = ring_dma;
6aa20a22 495
1da177e4 496 /* The SiS900-specific entries in the device structure. */
09ab9e7c 497 net_dev->netdev_ops = &sis900_netdev_ops;
1da177e4
LT
498 net_dev->watchdog_timeo = TX_TIMEOUT;
499 net_dev->ethtool_ops = &sis900_ethtool_ops;
500
1da177e4
LT
501 if (sis900_debug > 0)
502 sis_priv->msg_enable = sis900_debug;
503 else
504 sis_priv->msg_enable = SIS900_DEF_MSG;
da369b01
DV
505
506 sis_priv->mii_info.dev = net_dev;
507 sis_priv->mii_info.mdio_read = mdio_read;
508 sis_priv->mii_info.mdio_write = mdio_write;
509 sis_priv->mii_info.phy_id_mask = 0x1f;
510 sis_priv->mii_info.reg_num_mask = 0x1f;
511
1da177e4 512 /* Get Mac address according to the chip revision */
eaaa3a7c 513 sis_priv->chipset_rev = pci_dev->revision;
1da177e4
LT
514 if(netif_msg_probe(sis_priv))
515 printk(KERN_DEBUG "%s: detected revision %2.2x, "
516 "trying to get MAC address...\n",
517 dev_name, sis_priv->chipset_rev);
6aa20a22 518
1da177e4
LT
519 ret = 0;
520 if (sis_priv->chipset_rev == SIS630E_900_REV)
521 ret = sis630e_get_mac_addr(pci_dev, net_dev);
522 else if ((sis_priv->chipset_rev > 0x81) && (sis_priv->chipset_rev <= 0x90) )
523 ret = sis635_get_mac_addr(pci_dev, net_dev);
524 else if (sis_priv->chipset_rev == SIS96x_900_REV)
525 ret = sis96x_get_mac_addr(pci_dev, net_dev);
526 else
527 ret = sis900_get_mac_addr(pci_dev, net_dev);
528
d1d5e6b1
DV
529 if (!ret || !is_valid_ether_addr(net_dev->dev_addr)) {
530 random_ether_addr(net_dev->dev_addr);
531 printk(KERN_WARNING "%s: Unreadable or invalid MAC address,"
532 "using random generated one\n", dev_name);
1da177e4 533 }
6aa20a22 534
1da177e4
LT
535 /* 630ET : set the mii access mode as software-mode */
536 if (sis_priv->chipset_rev == SIS630ET_900_REV)
537 outl(ACCESSMODE | inl(ioaddr + cr), ioaddr + cr);
538
539 /* probe for mii transceiver */
540 if (sis900_mii_probe(net_dev) == 0) {
541 printk(KERN_WARNING "%s: Error probing MII device.\n",
542 dev_name);
543 ret = -ENODEV;
544 goto err_unmap_rx;
545 }
546
547 /* save our host bridge revision */
548 dev = pci_get_device(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_630, NULL);
549 if (dev) {
eaaa3a7c 550 sis_priv->host_bridge_rev = dev->revision;
1da177e4
LT
551 pci_dev_put(dev);
552 }
553
554 ret = register_netdev(net_dev);
555 if (ret)
556 goto err_unmap_rx;
557
558 /* print some information about our NIC */
e174961c 559 printk(KERN_INFO "%s: %s at %#lx, IRQ %d, %pM\n",
0795af57 560 net_dev->name, card_name, ioaddr, net_dev->irq,
e174961c 561 net_dev->dev_addr);
1da177e4 562
ea37ccea 563 /* Detect Wake on Lan support */
7bef4b39 564 ret = (inl(net_dev->base_addr + CFGPMC) & PMESP) >> 27;
ea37ccea
DV
565 if (netif_msg_probe(sis_priv) && (ret & PME_D3C) == 0)
566 printk(KERN_INFO "%s: Wake on LAN only available from suspend to RAM.", net_dev->name);
567
1da177e4
LT
568 return 0;
569
570 err_unmap_rx:
571 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
572 sis_priv->rx_ring_dma);
573 err_unmap_tx:
574 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
575 sis_priv->tx_ring_dma);
576 err_out_cleardev:
577 pci_set_drvdata(pci_dev, NULL);
578 pci_release_regions(pci_dev);
579 err_out:
580 free_netdev(net_dev);
581 return ret;
582}
583
584/**
585 * sis900_mii_probe - Probe MII PHY for sis900
586 * @net_dev: the net device to probe for
6aa20a22 587 *
1da177e4
LT
588 * Search for total of 32 possible mii phy addresses.
589 * Identify and set current phy if found one,
590 * return error if it failed to found.
591 */
592
4e50a8e3 593static int __devinit sis900_mii_probe(struct net_device * net_dev)
1da177e4 594{
8f15ea42 595 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4
LT
596 const char *dev_name = pci_name(sis_priv->pci_dev);
597 u16 poll_bit = MII_STAT_LINK, status = 0;
598 unsigned long timeout = jiffies + 5 * HZ;
599 int phy_addr;
600
601 sis_priv->mii = NULL;
602
603 /* search for total of 32 possible mii phy addresses */
6aa20a22 604 for (phy_addr = 0; phy_addr < 32; phy_addr++) {
1da177e4
LT
605 struct mii_phy * mii_phy = NULL;
606 u16 mii_status;
607 int i;
608
609 mii_phy = NULL;
610 for(i = 0; i < 2; i++)
611 mii_status = mdio_read(net_dev, phy_addr, MII_STATUS);
612
613 if (mii_status == 0xffff || mii_status == 0x0000) {
614 if (netif_msg_probe(sis_priv))
615 printk(KERN_DEBUG "%s: MII at address %d"
616 " not accessible\n",
617 dev_name, phy_addr);
618 continue;
619 }
6aa20a22 620
1da177e4 621 if ((mii_phy = kmalloc(sizeof(struct mii_phy), GFP_KERNEL)) == NULL) {
1da177e4
LT
622 mii_phy = sis_priv->first_mii;
623 while (mii_phy) {
624 struct mii_phy *phy;
625 phy = mii_phy;
626 mii_phy = mii_phy->next;
627 kfree(phy);
628 }
629 return 0;
630 }
6aa20a22 631
1da177e4 632 mii_phy->phy_id0 = mdio_read(net_dev, phy_addr, MII_PHY_ID0);
6aa20a22 633 mii_phy->phy_id1 = mdio_read(net_dev, phy_addr, MII_PHY_ID1);
1da177e4
LT
634 mii_phy->phy_addr = phy_addr;
635 mii_phy->status = mii_status;
636 mii_phy->next = sis_priv->mii;
637 sis_priv->mii = mii_phy;
638 sis_priv->first_mii = mii_phy;
639
640 for (i = 0; mii_chip_table[i].phy_id1; i++)
641 if ((mii_phy->phy_id0 == mii_chip_table[i].phy_id0 ) &&
642 ((mii_phy->phy_id1 & 0xFFF0) == mii_chip_table[i].phy_id1)){
643 mii_phy->phy_types = mii_chip_table[i].phy_types;
644 if (mii_chip_table[i].phy_types == MIX)
645 mii_phy->phy_types =
646 (mii_status & (MII_STAT_CAN_TX_FDX | MII_STAT_CAN_TX)) ? LAN : HOME;
647 printk(KERN_INFO "%s: %s transceiver found "
648 "at address %d.\n",
649 dev_name,
650 mii_chip_table[i].name,
651 phy_addr);
652 break;
653 }
6aa20a22 654
1da177e4
LT
655 if( !mii_chip_table[i].phy_id1 ) {
656 printk(KERN_INFO "%s: Unknown PHY transceiver found at address %d.\n",
657 dev_name, phy_addr);
658 mii_phy->phy_types = UNKNOWN;
659 }
660 }
6aa20a22 661
1da177e4
LT
662 if (sis_priv->mii == NULL) {
663 printk(KERN_INFO "%s: No MII transceivers found!\n", dev_name);
664 return 0;
665 }
666
667 /* select default PHY for mac */
668 sis_priv->mii = NULL;
669 sis900_default_phy( net_dev );
670
671 /* Reset phy if default phy is internal sis900 */
672 if ((sis_priv->mii->phy_id0 == 0x001D) &&
673 ((sis_priv->mii->phy_id1&0xFFF0) == 0x8000))
674 status = sis900_reset_phy(net_dev, sis_priv->cur_phy);
6aa20a22 675
1da177e4
LT
676 /* workaround for ICS1893 PHY */
677 if ((sis_priv->mii->phy_id0 == 0x0015) &&
678 ((sis_priv->mii->phy_id1&0xFFF0) == 0xF440))
679 mdio_write(net_dev, sis_priv->cur_phy, 0x0018, 0xD200);
680
681 if(status & MII_STAT_LINK){
682 while (poll_bit) {
683 yield();
684
685 poll_bit ^= (mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS) & poll_bit);
686 if (time_after_eq(jiffies, timeout)) {
687 printk(KERN_WARNING "%s: reset phy and link down now\n",
688 dev_name);
689 return -ETIME;
690 }
691 }
692 }
693
694 if (sis_priv->chipset_rev == SIS630E_900_REV) {
695 /* SiS 630E has some bugs on default value of PHY registers */
696 mdio_write(net_dev, sis_priv->cur_phy, MII_ANADV, 0x05e1);
697 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG1, 0x22);
698 mdio_write(net_dev, sis_priv->cur_phy, MII_CONFIG2, 0xff00);
699 mdio_write(net_dev, sis_priv->cur_phy, MII_MASK, 0xffc0);
6aa20a22 700 //mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, 0x1000);
1da177e4
LT
701 }
702
703 if (sis_priv->mii->status & MII_STAT_LINK)
704 netif_carrier_on(net_dev);
705 else
706 netif_carrier_off(net_dev);
707
708 return 1;
709}
710
711/**
712 * sis900_default_phy - Select default PHY for sis900 mac.
713 * @net_dev: the net device to probe for
714 *
715 * Select first detected PHY with link as default.
716 * If no one is link on, select PHY whose types is HOME as default.
717 * If HOME doesn't exist, select LAN.
718 */
719
720static u16 sis900_default_phy(struct net_device * net_dev)
721{
8f15ea42 722 struct sis900_private *sis_priv = netdev_priv(net_dev);
6aa20a22 723 struct mii_phy *phy = NULL, *phy_home = NULL,
1da177e4
LT
724 *default_phy = NULL, *phy_lan = NULL;
725 u16 status;
726
727 for (phy=sis_priv->first_mii; phy; phy=phy->next) {
728 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
729 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
730
731 /* Link ON & Not select default PHY & not ghost PHY */
732 if ((status & MII_STAT_LINK) && !default_phy &&
733 (phy->phy_types != UNKNOWN))
734 default_phy = phy;
735 else {
736 status = mdio_read(net_dev, phy->phy_addr, MII_CONTROL);
737 mdio_write(net_dev, phy->phy_addr, MII_CONTROL,
738 status | MII_CNTL_AUTO | MII_CNTL_ISOLATE);
739 if (phy->phy_types == HOME)
740 phy_home = phy;
741 else if(phy->phy_types == LAN)
742 phy_lan = phy;
743 }
744 }
745
746 if (!default_phy && phy_home)
747 default_phy = phy_home;
748 else if (!default_phy && phy_lan)
749 default_phy = phy_lan;
750 else if (!default_phy)
751 default_phy = sis_priv->first_mii;
752
753 if (sis_priv->mii != default_phy) {
754 sis_priv->mii = default_phy;
755 sis_priv->cur_phy = default_phy->phy_addr;
756 printk(KERN_INFO "%s: Using transceiver found at address %d as default\n",
757 pci_name(sis_priv->pci_dev), sis_priv->cur_phy);
758 }
6aa20a22 759
da369b01
DV
760 sis_priv->mii_info.phy_id = sis_priv->cur_phy;
761
1da177e4
LT
762 status = mdio_read(net_dev, sis_priv->cur_phy, MII_CONTROL);
763 status &= (~MII_CNTL_ISOLATE);
764
6aa20a22 765 mdio_write(net_dev, sis_priv->cur_phy, MII_CONTROL, status);
1da177e4
LT
766 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
767 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
768
6aa20a22 769 return status;
1da177e4
LT
770}
771
772
773/**
774 * sis900_set_capability - set the media capability of network adapter.
775 * @net_dev : the net device to probe for
776 * @phy : default PHY
777 *
778 * Set the media capability of network adapter according to
779 * mii status register. It's necessary before auto-negotiate.
780 */
6aa20a22 781
1da177e4
LT
782static void sis900_set_capability(struct net_device *net_dev, struct mii_phy *phy)
783{
784 u16 cap;
785 u16 status;
6aa20a22 786
1da177e4
LT
787 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
788 status = mdio_read(net_dev, phy->phy_addr, MII_STATUS);
6aa20a22 789
1da177e4
LT
790 cap = MII_NWAY_CSMA_CD |
791 ((phy->status & MII_STAT_CAN_TX_FDX)? MII_NWAY_TX_FDX:0) |
792 ((phy->status & MII_STAT_CAN_TX) ? MII_NWAY_TX:0) |
793 ((phy->status & MII_STAT_CAN_T_FDX) ? MII_NWAY_T_FDX:0)|
794 ((phy->status & MII_STAT_CAN_T) ? MII_NWAY_T:0);
795
796 mdio_write(net_dev, phy->phy_addr, MII_ANADV, cap);
797}
798
799
800/* Delay between EEPROM clock transitions. */
801#define eeprom_delay() inl(ee_addr)
802
803/**
804 * read_eeprom - Read Serial EEPROM
805 * @ioaddr: base i/o address
806 * @location: the EEPROM location to read
807 *
808 * Read Serial EEPROM through EEPROM Access Register.
809 * Note that location is in word (16 bits) unit
810 */
811
812static u16 __devinit read_eeprom(long ioaddr, int location)
813{
814 int i;
815 u16 retval = 0;
816 long ee_addr = ioaddr + mear;
817 u32 read_cmd = location | EEread;
818
819 outl(0, ee_addr);
820 eeprom_delay();
821 outl(EECS, ee_addr);
822 eeprom_delay();
823
824 /* Shift the read command (9) bits out. */
825 for (i = 8; i >= 0; i--) {
826 u32 dataval = (read_cmd & (1 << i)) ? EEDI | EECS : EECS;
827 outl(dataval, ee_addr);
828 eeprom_delay();
829 outl(dataval | EECLK, ee_addr);
830 eeprom_delay();
831 }
832 outl(EECS, ee_addr);
833 eeprom_delay();
834
835 /* read the 16-bits data in */
836 for (i = 16; i > 0; i--) {
837 outl(EECS, ee_addr);
838 eeprom_delay();
839 outl(EECS | EECLK, ee_addr);
840 eeprom_delay();
841 retval = (retval << 1) | ((inl(ee_addr) & EEDO) ? 1 : 0);
842 eeprom_delay();
843 }
844
845 /* Terminate the EEPROM access. */
846 outl(0, ee_addr);
847 eeprom_delay();
848
807540ba 849 return retval;
1da177e4
LT
850}
851
852/* Read and write the MII management registers using software-generated
853 serial MDIO protocol. Note that the command bits and data bits are
854 send out separately */
855#define mdio_delay() inl(mdio_addr)
856
857static void mdio_idle(long mdio_addr)
858{
859 outl(MDIO | MDDIR, mdio_addr);
860 mdio_delay();
861 outl(MDIO | MDDIR | MDC, mdio_addr);
862}
863
864/* Syncronize the MII management interface by shifting 32 one bits out. */
865static void mdio_reset(long mdio_addr)
866{
867 int i;
868
869 for (i = 31; i >= 0; i--) {
870 outl(MDDIR | MDIO, mdio_addr);
871 mdio_delay();
872 outl(MDDIR | MDIO | MDC, mdio_addr);
873 mdio_delay();
874 }
1da177e4
LT
875}
876
877/**
878 * mdio_read - read MII PHY register
879 * @net_dev: the net device to read
880 * @phy_id: the phy address to read
881 * @location: the phy regiester id to read
882 *
883 * Read MII registers through MDIO and MDC
884 * using MDIO management frame structure and protocol(defined by ISO/IEC).
885 * Please see SiS7014 or ICS spec
886 */
887
da369b01 888static int mdio_read(struct net_device *net_dev, int phy_id, int location)
1da177e4
LT
889{
890 long mdio_addr = net_dev->base_addr + mear;
891 int mii_cmd = MIIread|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
892 u16 retval = 0;
893 int i;
894
895 mdio_reset(mdio_addr);
896 mdio_idle(mdio_addr);
897
898 for (i = 15; i >= 0; i--) {
899 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
900 outl(dataval, mdio_addr);
901 mdio_delay();
902 outl(dataval | MDC, mdio_addr);
903 mdio_delay();
904 }
905
906 /* Read the 16 data bits. */
907 for (i = 16; i > 0; i--) {
908 outl(0, mdio_addr);
909 mdio_delay();
910 retval = (retval << 1) | ((inl(mdio_addr) & MDIO) ? 1 : 0);
911 outl(MDC, mdio_addr);
912 mdio_delay();
913 }
914 outl(0x00, mdio_addr);
915
916 return retval;
917}
918
919/**
920 * mdio_write - write MII PHY register
921 * @net_dev: the net device to write
922 * @phy_id: the phy address to write
923 * @location: the phy regiester id to write
924 * @value: the register value to write with
925 *
926 * Write MII registers with @value through MDIO and MDC
927 * using MDIO management frame structure and protocol(defined by ISO/IEC)
928 * please see SiS7014 or ICS spec
929 */
930
931static void mdio_write(struct net_device *net_dev, int phy_id, int location,
932 int value)
933{
934 long mdio_addr = net_dev->base_addr + mear;
935 int mii_cmd = MIIwrite|(phy_id<<MIIpmdShift)|(location<<MIIregShift);
936 int i;
937
938 mdio_reset(mdio_addr);
939 mdio_idle(mdio_addr);
940
941 /* Shift the command bits out. */
942 for (i = 15; i >= 0; i--) {
943 int dataval = (mii_cmd & (1 << i)) ? MDDIR | MDIO : MDDIR;
944 outb(dataval, mdio_addr);
945 mdio_delay();
946 outb(dataval | MDC, mdio_addr);
947 mdio_delay();
948 }
949 mdio_delay();
950
951 /* Shift the value bits out. */
952 for (i = 15; i >= 0; i--) {
953 int dataval = (value & (1 << i)) ? MDDIR | MDIO : MDDIR;
954 outl(dataval, mdio_addr);
955 mdio_delay();
956 outl(dataval | MDC, mdio_addr);
957 mdio_delay();
958 }
959 mdio_delay();
960
961 /* Clear out extra bits. */
962 for (i = 2; i > 0; i--) {
963 outb(0, mdio_addr);
964 mdio_delay();
965 outb(MDC, mdio_addr);
966 mdio_delay();
967 }
968 outl(0x00, mdio_addr);
1da177e4
LT
969}
970
971
972/**
973 * sis900_reset_phy - reset sis900 mii phy.
974 * @net_dev: the net device to write
975 * @phy_addr: default phy address
976 *
977 * Some specific phy can't work properly without reset.
978 * This function will be called during initialization and
979 * link status change from ON to DOWN.
980 */
981
982static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
983{
f3be9742 984 int i;
1da177e4
LT
985 u16 status;
986
f3be9742 987 for (i = 0; i < 2; i++)
1da177e4
LT
988 status = mdio_read(net_dev, phy_addr, MII_STATUS);
989
990 mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
6aa20a22 991
1da177e4
LT
992 return status;
993}
994
995#ifdef CONFIG_NET_POLL_CONTROLLER
996/*
997 * Polling 'interrupt' - used by things like netconsole to send skbs
998 * without having to re-enable interrupts. It's not called while
999 * the interrupt routine is executing.
1000*/
1001static void sis900_poll(struct net_device *dev)
1002{
1003 disable_irq(dev->irq);
7d12e780 1004 sis900_interrupt(dev->irq, dev);
1da177e4
LT
1005 enable_irq(dev->irq);
1006}
1007#endif
1008
1009/**
1010 * sis900_open - open sis900 device
1011 * @net_dev: the net device to open
1012 *
1013 * Do some initialization and start net interface.
1014 * enable interrupts and set sis900 timer.
1015 */
1016
1017static int
1018sis900_open(struct net_device *net_dev)
1019{
8f15ea42 1020 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4
LT
1021 long ioaddr = net_dev->base_addr;
1022 int ret;
1023
1024 /* Soft reset the chip. */
1025 sis900_reset(net_dev);
1026
1027 /* Equalizer workaround Rule */
1028 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1029
a0607fd3 1030 ret = request_irq(net_dev->irq, sis900_interrupt, IRQF_SHARED,
1da177e4
LT
1031 net_dev->name, net_dev);
1032 if (ret)
1033 return ret;
1034
1035 sis900_init_rxfilter(net_dev);
1036
1037 sis900_init_tx_ring(net_dev);
1038 sis900_init_rx_ring(net_dev);
1039
1040 set_rx_mode(net_dev);
1041
1042 netif_start_queue(net_dev);
1043
1044 /* Workaround for EDB */
1045 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
1046
1047 /* Enable all known interrupts by setting the interrupt mask. */
1048 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1049 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
1050 outl(IE, ioaddr + ier);
1051
1052 sis900_check_mode(net_dev, sis_priv->mii);
1053
1054 /* Set the timer to switch to check for link beat and perhaps switch
1055 to an alternate media type. */
1056 init_timer(&sis_priv->timer);
1057 sis_priv->timer.expires = jiffies + HZ;
1058 sis_priv->timer.data = (unsigned long)net_dev;
c061b18d 1059 sis_priv->timer.function = sis900_timer;
1da177e4
LT
1060 add_timer(&sis_priv->timer);
1061
1062 return 0;
1063}
1064
1065/**
1066 * sis900_init_rxfilter - Initialize the Rx filter
1067 * @net_dev: the net device to initialize for
1068 *
1069 * Set receive filter address to our MAC address
1070 * and enable packet filtering.
1071 */
1072
1073static void
1074sis900_init_rxfilter (struct net_device * net_dev)
1075{
8f15ea42 1076 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4
LT
1077 long ioaddr = net_dev->base_addr;
1078 u32 rfcrSave;
1079 u32 i;
1080
1081 rfcrSave = inl(rfcr + ioaddr);
1082
1083 /* disable packet filtering before setting filter */
1084 outl(rfcrSave & ~RFEN, rfcr + ioaddr);
1085
1086 /* load MAC addr to filter data register */
1087 for (i = 0 ; i < 3 ; i++) {
1088 u32 w;
1089
1090 w = (u32) *((u16 *)(net_dev->dev_addr)+i);
1091 outl((i << RFADDR_shift), ioaddr + rfcr);
1092 outl(w, ioaddr + rfdr);
1093
1094 if (netif_msg_hw(sis_priv)) {
1095 printk(KERN_DEBUG "%s: Receive Filter Addrss[%d]=%x\n",
1096 net_dev->name, i, inl(ioaddr + rfdr));
1097 }
1098 }
1099
1100 /* enable packet filtering */
1101 outl(rfcrSave | RFEN, rfcr + ioaddr);
1102}
1103
1104/**
1105 * sis900_init_tx_ring - Initialize the Tx descriptor ring
1106 * @net_dev: the net device to initialize for
1107 *
6aa20a22 1108 * Initialize the Tx descriptor ring,
1da177e4
LT
1109 */
1110
1111static void
1112sis900_init_tx_ring(struct net_device *net_dev)
1113{
8f15ea42 1114 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4
LT
1115 long ioaddr = net_dev->base_addr;
1116 int i;
1117
1118 sis_priv->tx_full = 0;
1119 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1120
1121 for (i = 0; i < NUM_TX_DESC; i++) {
1122 sis_priv->tx_skbuff[i] = NULL;
1123
1124 sis_priv->tx_ring[i].link = sis_priv->tx_ring_dma +
1125 ((i+1)%NUM_TX_DESC)*sizeof(BufferDesc);
1126 sis_priv->tx_ring[i].cmdsts = 0;
1127 sis_priv->tx_ring[i].bufptr = 0;
1128 }
1129
1130 /* load Transmit Descriptor Register */
1131 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1132 if (netif_msg_hw(sis_priv))
1133 printk(KERN_DEBUG "%s: TX descriptor register loaded with: %8.8x\n",
1134 net_dev->name, inl(ioaddr + txdp));
1135}
1136
1137/**
1138 * sis900_init_rx_ring - Initialize the Rx descriptor ring
1139 * @net_dev: the net device to initialize for
1140 *
6aa20a22 1141 * Initialize the Rx descriptor ring,
1da177e4
LT
1142 * and pre-allocate recevie buffers (socket buffer)
1143 */
1144
6aa20a22 1145static void
1da177e4
LT
1146sis900_init_rx_ring(struct net_device *net_dev)
1147{
8f15ea42 1148 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4
LT
1149 long ioaddr = net_dev->base_addr;
1150 int i;
1151
1152 sis_priv->cur_rx = 0;
1153 sis_priv->dirty_rx = 0;
1154
1155 /* init RX descriptor */
1156 for (i = 0; i < NUM_RX_DESC; i++) {
1157 sis_priv->rx_skbuff[i] = NULL;
1158
1159 sis_priv->rx_ring[i].link = sis_priv->rx_ring_dma +
1160 ((i+1)%NUM_RX_DESC)*sizeof(BufferDesc);
1161 sis_priv->rx_ring[i].cmdsts = 0;
1162 sis_priv->rx_ring[i].bufptr = 0;
1163 }
1164
1165 /* allocate sock buffers */
1166 for (i = 0; i < NUM_RX_DESC; i++) {
1167 struct sk_buff *skb;
1168
dae2e9f4 1169 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) {
1da177e4
LT
1170 /* not enough memory for skbuff, this makes a "hole"
1171 on the buffer ring, it is not clear how the
1172 hardware will react to this kind of degenerated
1173 buffer */
1174 break;
1175 }
1da177e4
LT
1176 sis_priv->rx_skbuff[i] = skb;
1177 sis_priv->rx_ring[i].cmdsts = RX_BUF_SIZE;
1178 sis_priv->rx_ring[i].bufptr = pci_map_single(sis_priv->pci_dev,
689be439 1179 skb->data, RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1da177e4
LT
1180 }
1181 sis_priv->dirty_rx = (unsigned int) (i - NUM_RX_DESC);
1182
1183 /* load Receive Descriptor Register */
1184 outl(sis_priv->rx_ring_dma, ioaddr + rxdp);
1185 if (netif_msg_hw(sis_priv))
1186 printk(KERN_DEBUG "%s: RX descriptor register loaded with: %8.8x\n",
1187 net_dev->name, inl(ioaddr + rxdp));
1188}
1189
1190/**
1191 * sis630_set_eq - set phy equalizer value for 630 LAN
1192 * @net_dev: the net device to set equalizer value
1193 * @revision: 630 LAN revision number
1194 *
1195 * 630E equalizer workaround rule(Cyrus Huang 08/15)
1196 * PHY register 14h(Test)
25985edc 1197 * Bit 14: 0 -- Automatically detect (default)
1da177e4
LT
1198 * 1 -- Manually set Equalizer filter
1199 * Bit 13: 0 -- (Default)
1200 * 1 -- Speed up convergence of equalizer setting
1201 * Bit 9 : 0 -- (Default)
1202 * 1 -- Disable Baseline Wander
1203 * Bit 3~7 -- Equalizer filter setting
1204 * Link ON: Set Bit 9, 13 to 1, Bit 14 to 0
1205 * Then calculate equalizer value
1206 * Then set equalizer value, and set Bit 14 to 1, Bit 9 to 0
1207 * Link Off:Set Bit 13 to 1, Bit 14 to 0
1208 * Calculate Equalizer value:
25985edc 1209 * When Link is ON and Bit 14 is 0, SIS900PHY will auto-detect proper equalizer value.
1da177e4
LT
1210 * When the equalizer is stable, this value is not a fixed value. It will be within
1211 * a small range(eg. 7~9). Then we get a minimum and a maximum value(eg. min=7, max=9)
1212 * 0 <= max <= 4 --> set equalizer to max
1213 * 5 <= max <= 14 --> set equalizer to max+1 or set equalizer to max+2 if max == min
1214 * max >= 15 --> set equalizer to max+5 or set equalizer to max+6 if max == min
1215 */
1216
1217static void sis630_set_eq(struct net_device *net_dev, u8 revision)
1218{
8f15ea42 1219 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4
LT
1220 u16 reg14h, eq_value=0, max_value=0, min_value=0;
1221 int i, maxcount=10;
1222
1223 if ( !(revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1224 revision == SIS630A_900_REV || revision == SIS630ET_900_REV) )
1225 return;
1226
1227 if (netif_carrier_ok(net_dev)) {
1228 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1229 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1230 (0x2200 | reg14h) & 0xBFFF);
1231 for (i=0; i < maxcount; i++) {
1232 eq_value = (0x00F8 & mdio_read(net_dev,
1233 sis_priv->cur_phy, MII_RESV)) >> 3;
1234 if (i == 0)
1235 max_value=min_value=eq_value;
1236 max_value = (eq_value > max_value) ?
1237 eq_value : max_value;
1238 min_value = (eq_value < min_value) ?
1239 eq_value : min_value;
1240 }
1241 /* 630E rule to determine the equalizer value */
1242 if (revision == SIS630E_900_REV || revision == SIS630EA1_900_REV ||
1243 revision == SIS630ET_900_REV) {
1244 if (max_value < 5)
1245 eq_value = max_value;
1246 else if (max_value >= 5 && max_value < 15)
1247 eq_value = (max_value == min_value) ?
1248 max_value+2 : max_value+1;
1249 else if (max_value >= 15)
1250 eq_value=(max_value == min_value) ?
1251 max_value+6 : max_value+5;
1252 }
1253 /* 630B0&B1 rule to determine the equalizer value */
6aa20a22
JG
1254 if (revision == SIS630A_900_REV &&
1255 (sis_priv->host_bridge_rev == SIS630B0 ||
1da177e4
LT
1256 sis_priv->host_bridge_rev == SIS630B1)) {
1257 if (max_value == 0)
1258 eq_value = 3;
1259 else
1260 eq_value = (max_value + min_value + 1)/2;
1261 }
1262 /* write equalizer value and setting */
1263 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
1264 reg14h = (reg14h & 0xFF07) | ((eq_value << 3) & 0x00F8);
1265 reg14h = (reg14h | 0x6000) & 0xFDFF;
1266 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV, reg14h);
1267 } else {
1268 reg14h = mdio_read(net_dev, sis_priv->cur_phy, MII_RESV);
6aa20a22
JG
1269 if (revision == SIS630A_900_REV &&
1270 (sis_priv->host_bridge_rev == SIS630B0 ||
1271 sis_priv->host_bridge_rev == SIS630B1))
1da177e4
LT
1272 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1273 (reg14h | 0x2200) & 0xBFFF);
1274 else
1275 mdio_write(net_dev, sis_priv->cur_phy, MII_RESV,
1276 (reg14h | 0x2000) & 0xBFFF);
1277 }
1da177e4
LT
1278}
1279
1280/**
1281 * sis900_timer - sis900 timer routine
1282 * @data: pointer to sis900 net device
1283 *
6aa20a22 1284 * On each timer ticks we check two things,
1da177e4
LT
1285 * link status (ON/OFF) and link mode (10/100/Full/Half)
1286 */
1287
1288static void sis900_timer(unsigned long data)
1289{
1290 struct net_device *net_dev = (struct net_device *)data;
8f15ea42 1291 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4 1292 struct mii_phy *mii_phy = sis_priv->mii;
f71e1309 1293 static const int next_tick = 5*HZ;
1da177e4
LT
1294 u16 status;
1295
1296 if (!sis_priv->autong_complete){
ef0cd87e 1297 int uninitialized_var(speed), duplex = 0;
1da177e4
LT
1298
1299 sis900_read_mode(net_dev, &speed, &duplex);
1300 if (duplex){
1301 sis900_set_mode(net_dev->base_addr, speed, duplex);
1302 sis630_set_eq(net_dev, sis_priv->chipset_rev);
1303 netif_start_queue(net_dev);
1304 }
1305
1306 sis_priv->timer.expires = jiffies + HZ;
1307 add_timer(&sis_priv->timer);
1308 return;
1309 }
1310
1311 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1312 status = mdio_read(net_dev, sis_priv->cur_phy, MII_STATUS);
1313
1314 /* Link OFF -> ON */
1315 if (!netif_carrier_ok(net_dev)) {
1316 LookForLink:
1317 /* Search for new PHY */
1318 status = sis900_default_phy(net_dev);
1319 mii_phy = sis_priv->mii;
1320
1321 if (status & MII_STAT_LINK){
1322 sis900_check_mode(net_dev, mii_phy);
1323 netif_carrier_on(net_dev);
1324 }
1325 } else {
1326 /* Link ON -> OFF */
1327 if (!(status & MII_STAT_LINK)){
1328 netif_carrier_off(net_dev);
1329 if(netif_msg_link(sis_priv))
1330 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1331
1332 /* Change mode issue */
6aa20a22 1333 if ((mii_phy->phy_id0 == 0x001D) &&
1da177e4
LT
1334 ((mii_phy->phy_id1 & 0xFFF0) == 0x8000))
1335 sis900_reset_phy(net_dev, sis_priv->cur_phy);
6aa20a22 1336
1da177e4 1337 sis630_set_eq(net_dev, sis_priv->chipset_rev);
6aa20a22 1338
1da177e4
LT
1339 goto LookForLink;
1340 }
1341 }
1342
1343 sis_priv->timer.expires = jiffies + next_tick;
1344 add_timer(&sis_priv->timer);
1345}
1346
1347/**
1348 * sis900_check_mode - check the media mode for sis900
1349 * @net_dev: the net device to be checked
1350 * @mii_phy: the mii phy
1351 *
1352 * Older driver gets the media mode from mii status output
1353 * register. Now we set our media capability and auto-negotiate
1354 * to get the upper bound of speed and duplex between two ends.
1355 * If the types of mii phy is HOME, it doesn't need to auto-negotiate
1356 * and autong_complete should be set to 1.
1357 */
1358
1359static void sis900_check_mode(struct net_device *net_dev, struct mii_phy *mii_phy)
1360{
8f15ea42 1361 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4
LT
1362 long ioaddr = net_dev->base_addr;
1363 int speed, duplex;
1364
1365 if (mii_phy->phy_types == LAN) {
1366 outl(~EXD & inl(ioaddr + cfg), ioaddr + cfg);
1367 sis900_set_capability(net_dev , mii_phy);
1368 sis900_auto_negotiate(net_dev, sis_priv->cur_phy);
1369 } else {
1370 outl(EXD | inl(ioaddr + cfg), ioaddr + cfg);
1371 speed = HW_SPEED_HOME;
1372 duplex = FDX_CAPABLE_HALF_SELECTED;
1373 sis900_set_mode(ioaddr, speed, duplex);
1374 sis_priv->autong_complete = 1;
1375 }
1376}
1377
1378/**
1379 * sis900_set_mode - Set the media mode of mac register.
1380 * @ioaddr: the address of the device
1381 * @speed : the transmit speed to be determined
1382 * @duplex: the duplex mode to be determined
1383 *
1384 * Set the media mode of mac register txcfg/rxcfg according to
1385 * speed and duplex of phy. Bit EDB_MASTER_EN indicates the EDB
1386 * bus is used instead of PCI bus. When this bit is set 1, the
1387 * Max DMA Burst Size for TX/RX DMA should be no larger than 16
1388 * double words.
1389 */
1390
1391static void sis900_set_mode (long ioaddr, int speed, int duplex)
1392{
1393 u32 tx_flags = 0, rx_flags = 0;
1394
1395 if (inl(ioaddr + cfg) & EDB_MASTER_EN) {
1396 tx_flags = TxATP | (DMA_BURST_64 << TxMXDMA_shift) |
1397 (TX_FILL_THRESH << TxFILLT_shift);
1398 rx_flags = DMA_BURST_64 << RxMXDMA_shift;
1399 } else {
1400 tx_flags = TxATP | (DMA_BURST_512 << TxMXDMA_shift) |
1401 (TX_FILL_THRESH << TxFILLT_shift);
1402 rx_flags = DMA_BURST_512 << RxMXDMA_shift;
1403 }
1404
1405 if (speed == HW_SPEED_HOME || speed == HW_SPEED_10_MBPS) {
1406 rx_flags |= (RxDRNT_10 << RxDRNT_shift);
1407 tx_flags |= (TxDRNT_10 << TxDRNT_shift);
1408 } else {
1409 rx_flags |= (RxDRNT_100 << RxDRNT_shift);
1410 tx_flags |= (TxDRNT_100 << TxDRNT_shift);
1411 }
1412
1413 if (duplex == FDX_CAPABLE_FULL_SELECTED) {
1414 tx_flags |= (TxCSI | TxHBI);
1415 rx_flags |= RxATX;
1416 }
1417
d269a69f
DV
1418#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
1419 /* Can accept Jumbo packet */
1420 rx_flags |= RxAJAB;
1421#endif
1422
1da177e4
LT
1423 outl (tx_flags, ioaddr + txcfg);
1424 outl (rx_flags, ioaddr + rxcfg);
1425}
1426
1427/**
1428 * sis900_auto_negotiate - Set the Auto-Negotiation Enable/Reset bit.
1429 * @net_dev: the net device to read mode for
1430 * @phy_addr: mii phy address
1431 *
1432 * If the adapter is link-on, set the auto-negotiate enable/reset bit.
1433 * autong_complete should be set to 0 when starting auto-negotiation.
1434 * autong_complete should be set to 1 if we didn't start auto-negotiation.
1435 * sis900_timer will wait for link on again if autong_complete = 0.
1436 */
1437
1438static void sis900_auto_negotiate(struct net_device *net_dev, int phy_addr)
1439{
8f15ea42 1440 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4
LT
1441 int i = 0;
1442 u32 status;
6aa20a22 1443
f3be9742 1444 for (i = 0; i < 2; i++)
1da177e4
LT
1445 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1446
1447 if (!(status & MII_STAT_LINK)){
1448 if(netif_msg_link(sis_priv))
1449 printk(KERN_INFO "%s: Media Link Off\n", net_dev->name);
1450 sis_priv->autong_complete = 1;
1451 netif_carrier_off(net_dev);
1452 return;
1453 }
1454
1455 /* (Re)start AutoNegotiate */
1456 mdio_write(net_dev, phy_addr, MII_CONTROL,
1457 MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
1458 sis_priv->autong_complete = 0;
1459}
1460
1461
1462/**
1463 * sis900_read_mode - read media mode for sis900 internal phy
1464 * @net_dev: the net device to read mode for
1465 * @speed : the transmit speed to be determined
1466 * @duplex : the duplex mode to be determined
1467 *
1468 * The capability of remote end will be put in mii register autorec
1469 * after auto-negotiation. Use AND operation to get the upper bound
1470 * of speed and duplex between two ends.
1471 */
1472
1473static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex)
1474{
8f15ea42 1475 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4
LT
1476 struct mii_phy *phy = sis_priv->mii;
1477 int phy_addr = sis_priv->cur_phy;
1478 u32 status;
1479 u16 autoadv, autorec;
f3be9742 1480 int i;
1da177e4 1481
f3be9742 1482 for (i = 0; i < 2; i++)
1da177e4
LT
1483 status = mdio_read(net_dev, phy_addr, MII_STATUS);
1484
1485 if (!(status & MII_STAT_LINK))
1486 return;
1487
1488 /* AutoNegotiate completed */
1489 autoadv = mdio_read(net_dev, phy_addr, MII_ANADV);
1490 autorec = mdio_read(net_dev, phy_addr, MII_ANLPAR);
1491 status = autoadv & autorec;
6aa20a22 1492
1da177e4
LT
1493 *speed = HW_SPEED_10_MBPS;
1494 *duplex = FDX_CAPABLE_HALF_SELECTED;
1495
1496 if (status & (MII_NWAY_TX | MII_NWAY_TX_FDX))
1497 *speed = HW_SPEED_100_MBPS;
1498 if (status & ( MII_NWAY_TX_FDX | MII_NWAY_T_FDX))
1499 *duplex = FDX_CAPABLE_FULL_SELECTED;
6aa20a22 1500
1da177e4
LT
1501 sis_priv->autong_complete = 1;
1502
1503 /* Workaround for Realtek RTL8201 PHY issue */
1504 if ((phy->phy_id0 == 0x0000) && ((phy->phy_id1 & 0xFFF0) == 0x8200)) {
1505 if (mdio_read(net_dev, phy_addr, MII_CONTROL) & MII_CNTL_FDX)
1506 *duplex = FDX_CAPABLE_FULL_SELECTED;
1507 if (mdio_read(net_dev, phy_addr, 0x0019) & 0x01)
1508 *speed = HW_SPEED_100_MBPS;
1509 }
1510
1511 if(netif_msg_link(sis_priv))
2381a55c 1512 printk(KERN_INFO "%s: Media Link On %s %s-duplex\n",
1da177e4
LT
1513 net_dev->name,
1514 *speed == HW_SPEED_100_MBPS ?
1515 "100mbps" : "10mbps",
1516 *duplex == FDX_CAPABLE_FULL_SELECTED ?
1517 "full" : "half");
1518}
1519
1520/**
1521 * sis900_tx_timeout - sis900 transmit timeout routine
1522 * @net_dev: the net device to transmit
1523 *
1524 * print transmit timeout status
1525 * disable interrupts and do some tasks
1526 */
1527
1528static void sis900_tx_timeout(struct net_device *net_dev)
1529{
8f15ea42 1530 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4
LT
1531 long ioaddr = net_dev->base_addr;
1532 unsigned long flags;
1533 int i;
1534
1535 if(netif_msg_tx_err(sis_priv))
2381a55c 1536 printk(KERN_INFO "%s: Transmit timeout, status %8.8x %8.8x\n",
1da177e4
LT
1537 net_dev->name, inl(ioaddr + cr), inl(ioaddr + isr));
1538
1539 /* Disable interrupts by clearing the interrupt mask. */
1540 outl(0x0000, ioaddr + imr);
1541
1542 /* use spinlock to prevent interrupt handler accessing buffer ring */
1543 spin_lock_irqsave(&sis_priv->lock, flags);
1544
1545 /* discard unsent packets */
1546 sis_priv->dirty_tx = sis_priv->cur_tx = 0;
1547 for (i = 0; i < NUM_TX_DESC; i++) {
1548 struct sk_buff *skb = sis_priv->tx_skbuff[i];
1549
1550 if (skb) {
6aa20a22 1551 pci_unmap_single(sis_priv->pci_dev,
1da177e4
LT
1552 sis_priv->tx_ring[i].bufptr, skb->len,
1553 PCI_DMA_TODEVICE);
1554 dev_kfree_skb_irq(skb);
1555 sis_priv->tx_skbuff[i] = NULL;
1556 sis_priv->tx_ring[i].cmdsts = 0;
1557 sis_priv->tx_ring[i].bufptr = 0;
09f75cd7 1558 net_dev->stats.tx_dropped++;
1da177e4
LT
1559 }
1560 }
1561 sis_priv->tx_full = 0;
1562 netif_wake_queue(net_dev);
1563
1564 spin_unlock_irqrestore(&sis_priv->lock, flags);
1565
1ae5dc34 1566 net_dev->trans_start = jiffies; /* prevent tx timeout */
1da177e4
LT
1567
1568 /* load Transmit Descriptor Register */
1569 outl(sis_priv->tx_ring_dma, ioaddr + txdp);
1570
1571 /* Enable all known interrupts by setting the interrupt mask. */
1572 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
1da177e4
LT
1573}
1574
1575/**
1576 * sis900_start_xmit - sis900 start transmit routine
1577 * @skb: socket buffer pointer to put the data being transmitted
1578 * @net_dev: the net device to transmit with
1579 *
6aa20a22 1580 * Set the transmit buffer descriptor,
1da177e4
LT
1581 * and write TxENA to enable transmit state machine.
1582 * tell upper layer if the buffer is full
1583 */
1584
61357325 1585static netdev_tx_t
1da177e4
LT
1586sis900_start_xmit(struct sk_buff *skb, struct net_device *net_dev)
1587{
8f15ea42 1588 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4
LT
1589 long ioaddr = net_dev->base_addr;
1590 unsigned int entry;
1591 unsigned long flags;
1592 unsigned int index_cur_tx, index_dirty_tx;
1593 unsigned int count_dirty_tx;
1594
1595 /* Don't transmit data before the complete of auto-negotiation */
1596 if(!sis_priv->autong_complete){
1597 netif_stop_queue(net_dev);
5b548140 1598 return NETDEV_TX_BUSY;
1da177e4
LT
1599 }
1600
1601 spin_lock_irqsave(&sis_priv->lock, flags);
1602
1603 /* Calculate the next Tx descriptor entry. */
1604 entry = sis_priv->cur_tx % NUM_TX_DESC;
1605 sis_priv->tx_skbuff[entry] = skb;
1606
1607 /* set the transmit buffer descriptor and enable Transmit State Machine */
1608 sis_priv->tx_ring[entry].bufptr = pci_map_single(sis_priv->pci_dev,
1609 skb->data, skb->len, PCI_DMA_TODEVICE);
1610 sis_priv->tx_ring[entry].cmdsts = (OWN | skb->len);
1611 outl(TxENA | inl(ioaddr + cr), ioaddr + cr);
1612
1613 sis_priv->cur_tx ++;
1614 index_cur_tx = sis_priv->cur_tx;
1615 index_dirty_tx = sis_priv->dirty_tx;
1616
1617 for (count_dirty_tx = 0; index_cur_tx != index_dirty_tx; index_dirty_tx++)
1618 count_dirty_tx ++;
1619
1620 if (index_cur_tx == index_dirty_tx) {
1621 /* dirty_tx is met in the cycle of cur_tx, buffer full */
1622 sis_priv->tx_full = 1;
1623 netif_stop_queue(net_dev);
6aa20a22 1624 } else if (count_dirty_tx < NUM_TX_DESC) {
1da177e4
LT
1625 /* Typical path, tell upper layer that more transmission is possible */
1626 netif_start_queue(net_dev);
1627 } else {
1628 /* buffer full, tell upper layer no more transmission */
1629 sis_priv->tx_full = 1;
1630 netif_stop_queue(net_dev);
1631 }
1632
1633 spin_unlock_irqrestore(&sis_priv->lock, flags);
1634
1da177e4
LT
1635 if (netif_msg_tx_queued(sis_priv))
1636 printk(KERN_DEBUG "%s: Queued Tx packet at %p size %d "
1637 "to slot %d.\n",
1638 net_dev->name, skb->data, (int)skb->len, entry);
1639
6ed10654 1640 return NETDEV_TX_OK;
1da177e4
LT
1641}
1642
1643/**
1644 * sis900_interrupt - sis900 interrupt handler
1645 * @irq: the irq number
1646 * @dev_instance: the client data object
1da177e4 1647 *
6aa20a22 1648 * The interrupt handler does all of the Rx thread work,
1da177e4
LT
1649 * and cleans up after the Tx thread
1650 */
1651
7d12e780 1652static irqreturn_t sis900_interrupt(int irq, void *dev_instance)
1da177e4
LT
1653{
1654 struct net_device *net_dev = dev_instance;
8f15ea42 1655 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4
LT
1656 int boguscnt = max_interrupt_work;
1657 long ioaddr = net_dev->base_addr;
1658 u32 status;
1659 unsigned int handled = 0;
1660
1661 spin_lock (&sis_priv->lock);
1662
1663 do {
1664 status = inl(ioaddr + isr);
1665
1666 if ((status & (HIBERR|TxURN|TxERR|TxIDLE|RxORN|RxERR|RxOK)) == 0)
1667 /* nothing intresting happened */
1668 break;
1669 handled = 1;
1670
1671 /* why dow't we break after Tx/Rx case ?? keyword: full-duplex */
1672 if (status & (RxORN | RxERR | RxOK))
1673 /* Rx interrupt */
1674 sis900_rx(net_dev);
1675
1676 if (status & (TxURN | TxERR | TxIDLE))
1677 /* Tx interrupt */
1678 sis900_finish_xmit(net_dev);
1679
1680 /* something strange happened !!! */
1681 if (status & HIBERR) {
1682 if(netif_msg_intr(sis_priv))
2450022a 1683 printk(KERN_INFO "%s: Abnormal interrupt, "
1da177e4
LT
1684 "status %#8.8x.\n", net_dev->name, status);
1685 break;
1686 }
1687 if (--boguscnt < 0) {
1688 if(netif_msg_intr(sis_priv))
1689 printk(KERN_INFO "%s: Too much work at interrupt, "
1690 "interrupt status = %#8.8x.\n",
1691 net_dev->name, status);
1692 break;
1693 }
1694 } while (1);
1695
1696 if(netif_msg_intr(sis_priv))
1697 printk(KERN_DEBUG "%s: exiting interrupt, "
1698 "interrupt status = 0x%#8.8x.\n",
1699 net_dev->name, inl(ioaddr + isr));
6aa20a22 1700
1da177e4
LT
1701 spin_unlock (&sis_priv->lock);
1702 return IRQ_RETVAL(handled);
1703}
1704
1705/**
1706 * sis900_rx - sis900 receive routine
1707 * @net_dev: the net device which receives data
1708 *
6aa20a22 1709 * Process receive interrupt events,
1da177e4 1710 * put buffer to higher layer and refill buffer pool
0b28002f 1711 * Note: This function is called by interrupt handler,
1da177e4
LT
1712 * don't do "too much" work here
1713 */
1714
1715static int sis900_rx(struct net_device *net_dev)
1716{
8f15ea42 1717 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4
LT
1718 long ioaddr = net_dev->base_addr;
1719 unsigned int entry = sis_priv->cur_rx % NUM_RX_DESC;
1720 u32 rx_status = sis_priv->rx_ring[entry].cmdsts;
7380a78a 1721 int rx_work_limit;
1da177e4
LT
1722
1723 if (netif_msg_rx_status(sis_priv))
1724 printk(KERN_DEBUG "sis900_rx, cur_rx:%4.4d, dirty_rx:%4.4d "
1725 "status:0x%8.8x\n",
1726 sis_priv->cur_rx, sis_priv->dirty_rx, rx_status);
7380a78a 1727 rx_work_limit = sis_priv->dirty_rx + NUM_RX_DESC - sis_priv->cur_rx;
1da177e4
LT
1728
1729 while (rx_status & OWN) {
1730 unsigned int rx_size;
d269a69f 1731 unsigned int data_size;
1da177e4 1732
7380a78a
VA
1733 if (--rx_work_limit < 0)
1734 break;
1735
d269a69f
DV
1736 data_size = rx_status & DSIZE;
1737 rx_size = data_size - CRC_SIZE;
1738
1739#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
25985edc 1740 /* ``TOOLONG'' flag means jumbo packet received. */
d269a69f
DV
1741 if ((rx_status & TOOLONG) && data_size <= MAX_FRAME_SIZE)
1742 rx_status &= (~ ((unsigned int)TOOLONG));
1743#endif
1da177e4
LT
1744
1745 if (rx_status & (ABORT|OVERRUN|TOOLONG|RUNT|RXISERR|CRCERR|FAERR)) {
1746 /* corrupted packet received */
1747 if (netif_msg_rx_err(sis_priv))
1748 printk(KERN_DEBUG "%s: Corrupted packet "
d269a69f
DV
1749 "received, buffer status = 0x%8.8x/%d.\n",
1750 net_dev->name, rx_status, data_size);
09f75cd7 1751 net_dev->stats.rx_errors++;
1da177e4 1752 if (rx_status & OVERRUN)
09f75cd7 1753 net_dev->stats.rx_over_errors++;
1da177e4 1754 if (rx_status & (TOOLONG|RUNT))
09f75cd7 1755 net_dev->stats.rx_length_errors++;
1da177e4 1756 if (rx_status & (RXISERR | FAERR))
09f75cd7 1757 net_dev->stats.rx_frame_errors++;
6aa20a22 1758 if (rx_status & CRCERR)
09f75cd7 1759 net_dev->stats.rx_crc_errors++;
1da177e4
LT
1760 /* reset buffer descriptor state */
1761 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1762 } else {
1763 struct sk_buff * skb;
dc5a1449 1764 struct sk_buff * rx_skb;
1da177e4 1765
b748d9e3
NH
1766 pci_unmap_single(sis_priv->pci_dev,
1767 sis_priv->rx_ring[entry].bufptr, RX_BUF_SIZE,
1768 PCI_DMA_FROMDEVICE);
1769
af901ca1 1770 /* refill the Rx buffer, what if there is not enough
b748d9e3 1771 * memory for new socket buffer ?? */
dae2e9f4 1772 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) {
b748d9e3
NH
1773 /*
1774 * Not enough memory to refill the buffer
1775 * so we need to recycle the old one so
1776 * as to avoid creating a memory hole
1777 * in the rx ring
1778 */
1779 skb = sis_priv->rx_skbuff[entry];
09f75cd7 1780 net_dev->stats.rx_dropped++;
b748d9e3 1781 goto refill_rx_ring;
7d2e3cb7 1782 }
b748d9e3 1783
1da177e4 1784 /* This situation should never happen, but due to
af901ca1 1785 some unknown bugs, it is possible that
1da177e4
LT
1786 we are working on NULL sk_buff :-( */
1787 if (sis_priv->rx_skbuff[entry] == NULL) {
1788 if (netif_msg_rx_err(sis_priv))
6aa20a22 1789 printk(KERN_WARNING "%s: NULL pointer "
7380a78a
VA
1790 "encountered in Rx ring\n"
1791 "cur_rx:%4.4d, dirty_rx:%4.4d\n",
1792 net_dev->name, sis_priv->cur_rx,
1793 sis_priv->dirty_rx);
bf1f9ae0 1794 dev_kfree_skb(skb);
1da177e4
LT
1795 break;
1796 }
1797
1da177e4 1798 /* give the socket buffer to upper layers */
dc5a1449
NH
1799 rx_skb = sis_priv->rx_skbuff[entry];
1800 skb_put(rx_skb, rx_size);
1801 rx_skb->protocol = eth_type_trans(rx_skb, net_dev);
1802 netif_rx(rx_skb);
1da177e4
LT
1803
1804 /* some network statistics */
1805 if ((rx_status & BCAST) == MCAST)
09f75cd7 1806 net_dev->stats.multicast++;
09f75cd7
JG
1807 net_dev->stats.rx_bytes += rx_size;
1808 net_dev->stats.rx_packets++;
b748d9e3
NH
1809 sis_priv->dirty_rx++;
1810refill_rx_ring:
1da177e4
LT
1811 sis_priv->rx_skbuff[entry] = skb;
1812 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
6aa20a22
JG
1813 sis_priv->rx_ring[entry].bufptr =
1814 pci_map_single(sis_priv->pci_dev, skb->data,
1da177e4 1815 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1da177e4
LT
1816 }
1817 sis_priv->cur_rx++;
1818 entry = sis_priv->cur_rx % NUM_RX_DESC;
1819 rx_status = sis_priv->rx_ring[entry].cmdsts;
1820 } // while
1821
1822 /* refill the Rx buffer, what if the rate of refilling is slower
1823 * than consuming ?? */
7380a78a 1824 for (; sis_priv->cur_rx != sis_priv->dirty_rx; sis_priv->dirty_rx++) {
1da177e4
LT
1825 struct sk_buff *skb;
1826
1827 entry = sis_priv->dirty_rx % NUM_RX_DESC;
1828
1829 if (sis_priv->rx_skbuff[entry] == NULL) {
dae2e9f4 1830 if ((skb = netdev_alloc_skb(net_dev, RX_BUF_SIZE)) == NULL) {
1da177e4
LT
1831 /* not enough memory for skbuff, this makes a
1832 * "hole" on the buffer ring, it is not clear
1833 * how the hardware will react to this kind
1834 * of degenerated buffer */
1835 if (netif_msg_rx_err(sis_priv))
2450022a 1836 printk(KERN_INFO "%s: Memory squeeze, "
1da177e4
LT
1837 "deferring packet.\n",
1838 net_dev->name);
09f75cd7 1839 net_dev->stats.rx_dropped++;
1da177e4
LT
1840 break;
1841 }
1da177e4
LT
1842 sis_priv->rx_skbuff[entry] = skb;
1843 sis_priv->rx_ring[entry].cmdsts = RX_BUF_SIZE;
1844 sis_priv->rx_ring[entry].bufptr =
689be439 1845 pci_map_single(sis_priv->pci_dev, skb->data,
1da177e4
LT
1846 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1847 }
1848 }
1849 /* re-enable the potentially idle receive state matchine */
1850 outl(RxENA | inl(ioaddr + cr), ioaddr + cr );
1851
1852 return 0;
1853}
1854
1855/**
1856 * sis900_finish_xmit - finish up transmission of packets
1857 * @net_dev: the net device to be transmitted on
1858 *
6aa20a22 1859 * Check for error condition and free socket buffer etc
1da177e4 1860 * schedule for more transmission as needed
0b28002f 1861 * Note: This function is called by interrupt handler,
1da177e4
LT
1862 * don't do "too much" work here
1863 */
1864
1865static void sis900_finish_xmit (struct net_device *net_dev)
1866{
8f15ea42 1867 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4
LT
1868
1869 for (; sis_priv->dirty_tx != sis_priv->cur_tx; sis_priv->dirty_tx++) {
1870 struct sk_buff *skb;
1871 unsigned int entry;
1872 u32 tx_status;
1873
1874 entry = sis_priv->dirty_tx % NUM_TX_DESC;
1875 tx_status = sis_priv->tx_ring[entry].cmdsts;
1876
1877 if (tx_status & OWN) {
1878 /* The packet is not transmitted yet (owned by hardware) !
1879 * Note: the interrupt is generated only when Tx Machine
1880 * is idle, so this is an almost impossible case */
1881 break;
1882 }
1883
1884 if (tx_status & (ABORT | UNDERRUN | OWCOLL)) {
1885 /* packet unsuccessfully transmitted */
1886 if (netif_msg_tx_err(sis_priv))
1887 printk(KERN_DEBUG "%s: Transmit "
1888 "error, Tx status %8.8x.\n",
1889 net_dev->name, tx_status);
09f75cd7 1890 net_dev->stats.tx_errors++;
1da177e4 1891 if (tx_status & UNDERRUN)
09f75cd7 1892 net_dev->stats.tx_fifo_errors++;
1da177e4 1893 if (tx_status & ABORT)
09f75cd7 1894 net_dev->stats.tx_aborted_errors++;
1da177e4 1895 if (tx_status & NOCARRIER)
09f75cd7 1896 net_dev->stats.tx_carrier_errors++;
1da177e4 1897 if (tx_status & OWCOLL)
09f75cd7 1898 net_dev->stats.tx_window_errors++;
1da177e4
LT
1899 } else {
1900 /* packet successfully transmitted */
09f75cd7
JG
1901 net_dev->stats.collisions += (tx_status & COLCNT) >> 16;
1902 net_dev->stats.tx_bytes += tx_status & DSIZE;
1903 net_dev->stats.tx_packets++;
1da177e4
LT
1904 }
1905 /* Free the original skb. */
1906 skb = sis_priv->tx_skbuff[entry];
6aa20a22 1907 pci_unmap_single(sis_priv->pci_dev,
1da177e4
LT
1908 sis_priv->tx_ring[entry].bufptr, skb->len,
1909 PCI_DMA_TODEVICE);
1910 dev_kfree_skb_irq(skb);
1911 sis_priv->tx_skbuff[entry] = NULL;
1912 sis_priv->tx_ring[entry].bufptr = 0;
1913 sis_priv->tx_ring[entry].cmdsts = 0;
1914 }
1915
1916 if (sis_priv->tx_full && netif_queue_stopped(net_dev) &&
1917 sis_priv->cur_tx - sis_priv->dirty_tx < NUM_TX_DESC - 4) {
1918 /* The ring is no longer full, clear tx_full and schedule
1919 * more transmission by netif_wake_queue(net_dev) */
1920 sis_priv->tx_full = 0;
1921 netif_wake_queue (net_dev);
1922 }
1923}
1924
1925/**
6aa20a22 1926 * sis900_close - close sis900 device
1da177e4
LT
1927 * @net_dev: the net device to be closed
1928 *
6aa20a22 1929 * Disable interrupts, stop the Tx and Rx Status Machine
1da177e4
LT
1930 * free Tx and RX socket buffer
1931 */
1932
1933static int sis900_close(struct net_device *net_dev)
1934{
1935 long ioaddr = net_dev->base_addr;
8f15ea42 1936 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4
LT
1937 struct sk_buff *skb;
1938 int i;
1939
1940 netif_stop_queue(net_dev);
1941
1942 /* Disable interrupts by clearing the interrupt mask. */
1943 outl(0x0000, ioaddr + imr);
1944 outl(0x0000, ioaddr + ier);
1945
1946 /* Stop the chip's Tx and Rx Status Machine */
1947 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
1948
1949 del_timer(&sis_priv->timer);
1950
1951 free_irq(net_dev->irq, net_dev);
1952
1953 /* Free Tx and RX skbuff */
1954 for (i = 0; i < NUM_RX_DESC; i++) {
1955 skb = sis_priv->rx_skbuff[i];
1956 if (skb) {
6aa20a22 1957 pci_unmap_single(sis_priv->pci_dev,
1da177e4
LT
1958 sis_priv->rx_ring[i].bufptr,
1959 RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
1960 dev_kfree_skb(skb);
1961 sis_priv->rx_skbuff[i] = NULL;
1962 }
1963 }
1964 for (i = 0; i < NUM_TX_DESC; i++) {
1965 skb = sis_priv->tx_skbuff[i];
1966 if (skb) {
6aa20a22 1967 pci_unmap_single(sis_priv->pci_dev,
1da177e4
LT
1968 sis_priv->tx_ring[i].bufptr, skb->len,
1969 PCI_DMA_TODEVICE);
1970 dev_kfree_skb(skb);
1971 sis_priv->tx_skbuff[i] = NULL;
1972 }
1973 }
1974
1975 /* Green! Put the chip in low-power mode. */
1976
1977 return 0;
1978}
1979
1980/**
1981 * sis900_get_drvinfo - Return information about driver
1982 * @net_dev: the net device to probe
1983 * @info: container for info returned
1984 *
1985 * Process ethtool command such as "ehtool -i" to show information
1986 */
6aa20a22 1987
1da177e4
LT
1988static void sis900_get_drvinfo(struct net_device *net_dev,
1989 struct ethtool_drvinfo *info)
1990{
8f15ea42 1991 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4 1992
23020ab3
RJ
1993 strlcpy(info->driver, SIS900_MODULE_NAME, sizeof(info->driver));
1994 strlcpy(info->version, SIS900_DRV_VERSION, sizeof(info->version));
1995 strlcpy(info->bus_info, pci_name(sis_priv->pci_dev),
1996 sizeof(info->bus_info));
1da177e4
LT
1997}
1998
1999static u32 sis900_get_msglevel(struct net_device *net_dev)
2000{
8f15ea42 2001 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4
LT
2002 return sis_priv->msg_enable;
2003}
6aa20a22 2004
1da177e4
LT
2005static void sis900_set_msglevel(struct net_device *net_dev, u32 value)
2006{
8f15ea42 2007 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4
LT
2008 sis_priv->msg_enable = value;
2009}
2010
da369b01
DV
2011static u32 sis900_get_link(struct net_device *net_dev)
2012{
8f15ea42 2013 struct sis900_private *sis_priv = netdev_priv(net_dev);
da369b01
DV
2014 return mii_link_ok(&sis_priv->mii_info);
2015}
2016
2017static int sis900_get_settings(struct net_device *net_dev,
2018 struct ethtool_cmd *cmd)
2019{
8f15ea42 2020 struct sis900_private *sis_priv = netdev_priv(net_dev);
da369b01
DV
2021 spin_lock_irq(&sis_priv->lock);
2022 mii_ethtool_gset(&sis_priv->mii_info, cmd);
2023 spin_unlock_irq(&sis_priv->lock);
2024 return 0;
2025}
2026
2027static int sis900_set_settings(struct net_device *net_dev,
2028 struct ethtool_cmd *cmd)
2029{
8f15ea42 2030 struct sis900_private *sis_priv = netdev_priv(net_dev);
da369b01
DV
2031 int rt;
2032 spin_lock_irq(&sis_priv->lock);
2033 rt = mii_ethtool_sset(&sis_priv->mii_info, cmd);
2034 spin_unlock_irq(&sis_priv->lock);
2035 return rt;
2036}
2037
2038static int sis900_nway_reset(struct net_device *net_dev)
2039{
8f15ea42 2040 struct sis900_private *sis_priv = netdev_priv(net_dev);
da369b01
DV
2041 return mii_nway_restart(&sis_priv->mii_info);
2042}
2043
ea37ccea
DV
2044/**
2045 * sis900_set_wol - Set up Wake on Lan registers
2046 * @net_dev: the net device to probe
2047 * @wol: container for info passed to the driver
2048 *
2049 * Process ethtool command "wol" to setup wake on lan features.
2050 * SiS900 supports sending WoL events if a correct packet is received,
2051 * but there is no simple way to filter them to only a subset (broadcast,
2052 * multicast, unicast or arp).
2053 */
6aa20a22 2054
ea37ccea
DV
2055static int sis900_set_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2056{
8f15ea42 2057 struct sis900_private *sis_priv = netdev_priv(net_dev);
ea37ccea
DV
2058 long pmctrl_addr = net_dev->base_addr + pmctrl;
2059 u32 cfgpmcsr = 0, pmctrl_bits = 0;
2060
2061 if (wol->wolopts == 0) {
2062 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
7bef4b39 2063 cfgpmcsr &= ~PME_EN;
ea37ccea
DV
2064 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2065 outl(pmctrl_bits, pmctrl_addr);
2066 if (netif_msg_wol(sis_priv))
2067 printk(KERN_DEBUG "%s: Wake on LAN disabled\n", net_dev->name);
2068 return 0;
2069 }
2070
2071 if (wol->wolopts & (WAKE_MAGICSECURE | WAKE_UCAST | WAKE_MCAST
2072 | WAKE_BCAST | WAKE_ARP))
2073 return -EINVAL;
2074
2075 if (wol->wolopts & WAKE_MAGIC)
2076 pmctrl_bits |= MAGICPKT;
2077 if (wol->wolopts & WAKE_PHY)
2078 pmctrl_bits |= LINKON;
6aa20a22 2079
ea37ccea
DV
2080 outl(pmctrl_bits, pmctrl_addr);
2081
2082 pci_read_config_dword(sis_priv->pci_dev, CFGPMCSR, &cfgpmcsr);
2083 cfgpmcsr |= PME_EN;
2084 pci_write_config_dword(sis_priv->pci_dev, CFGPMCSR, cfgpmcsr);
2085 if (netif_msg_wol(sis_priv))
2086 printk(KERN_DEBUG "%s: Wake on LAN enabled\n", net_dev->name);
2087
2088 return 0;
2089}
2090
2091static void sis900_get_wol(struct net_device *net_dev, struct ethtool_wolinfo *wol)
2092{
2093 long pmctrl_addr = net_dev->base_addr + pmctrl;
2094 u32 pmctrl_bits;
2095
2096 pmctrl_bits = inl(pmctrl_addr);
2097 if (pmctrl_bits & MAGICPKT)
2098 wol->wolopts |= WAKE_MAGIC;
2099 if (pmctrl_bits & LINKON)
2100 wol->wolopts |= WAKE_PHY;
2101
2102 wol->supported = (WAKE_PHY | WAKE_MAGIC);
2103}
2104
7282d491 2105static const struct ethtool_ops sis900_ethtool_ops = {
1da177e4
LT
2106 .get_drvinfo = sis900_get_drvinfo,
2107 .get_msglevel = sis900_get_msglevel,
2108 .set_msglevel = sis900_set_msglevel,
da369b01
DV
2109 .get_link = sis900_get_link,
2110 .get_settings = sis900_get_settings,
2111 .set_settings = sis900_set_settings,
2112 .nway_reset = sis900_nway_reset,
ea37ccea
DV
2113 .get_wol = sis900_get_wol,
2114 .set_wol = sis900_set_wol
1da177e4
LT
2115};
2116
2117/**
6aa20a22 2118 * mii_ioctl - process MII i/o control command
1da177e4
LT
2119 * @net_dev: the net device to command for
2120 * @rq: parameter for command
2121 * @cmd: the i/o command
2122 *
2123 * Process MII command like read/write MII register
2124 */
2125
2126static int mii_ioctl(struct net_device *net_dev, struct ifreq *rq, int cmd)
2127{
8f15ea42 2128 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4
LT
2129 struct mii_ioctl_data *data = if_mii(rq);
2130
2131 switch(cmd) {
2132 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2133 data->phy_id = sis_priv->mii->phy_addr;
2134 /* Fall Through */
2135
2136 case SIOCGMIIREG: /* Read MII PHY register. */
2137 data->val_out = mdio_read(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f);
2138 return 0;
2139
2140 case SIOCSMIIREG: /* Write MII PHY register. */
1da177e4
LT
2141 mdio_write(net_dev, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in);
2142 return 0;
2143 default:
2144 return -EOPNOTSUPP;
2145 }
2146}
2147
1da177e4 2148/**
6aa20a22 2149 * sis900_set_config - Set media type by net_device.set_config
1da177e4
LT
2150 * @dev: the net device for media type change
2151 * @map: ifmap passed by ifconfig
2152 *
2153 * Set media type to 10baseT, 100baseT or 0(for auto) by ifconfig
2154 * we support only port changes. All other runtime configuration
2155 * changes will be ignored
2156 */
2157
2158static int sis900_set_config(struct net_device *dev, struct ifmap *map)
6aa20a22 2159{
8f15ea42 2160 struct sis900_private *sis_priv = netdev_priv(dev);
1da177e4 2161 struct mii_phy *mii_phy = sis_priv->mii;
6aa20a22 2162
1da177e4
LT
2163 u16 status;
2164
2165 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
2166 /* we switch on the ifmap->port field. I couldn't find anything
2167 * like a definition or standard for the values of that field.
2168 * I think the meaning of those values is device specific. But
2169 * since I would like to change the media type via the ifconfig
6aa20a22 2170 * command I use the definition from linux/netdevice.h
1da177e4
LT
2171 * (which seems to be different from the ifport(pcmcia) definition) */
2172 switch(map->port){
6aa20a22 2173 case IF_PORT_UNKNOWN: /* use auto here */
1da177e4
LT
2174 dev->if_port = map->port;
2175 /* we are going to change the media type, so the Link
2176 * will be temporary down and we need to reflect that
2177 * here. When the Link comes up again, it will be
2178 * sensed by the sis_timer procedure, which also does
2179 * all the rest for us */
2180 netif_carrier_off(dev);
6aa20a22 2181
1da177e4
LT
2182 /* read current state */
2183 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
6aa20a22 2184
1da177e4
LT
2185 /* enable auto negotiation and reset the negotioation
2186 * (I don't really know what the auto negatiotiation
2187 * reset really means, but it sounds for me right to
2188 * do one here) */
2189 mdio_write(dev, mii_phy->phy_addr,
2190 MII_CONTROL, status | MII_CNTL_AUTO | MII_CNTL_RST_AUTO);
2191
2192 break;
6aa20a22
JG
2193
2194 case IF_PORT_10BASET: /* 10BaseT */
1da177e4 2195 dev->if_port = map->port;
6aa20a22 2196
1da177e4
LT
2197 /* we are going to change the media type, so the Link
2198 * will be temporary down and we need to reflect that
2199 * here. When the Link comes up again, it will be
2200 * sensed by the sis_timer procedure, which also does
2201 * all the rest for us */
2202 netif_carrier_off(dev);
6aa20a22 2203
1da177e4
LT
2204 /* set Speed to 10Mbps */
2205 /* read current state */
2206 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
6aa20a22 2207
1da177e4
LT
2208 /* disable auto negotiation and force 10MBit mode*/
2209 mdio_write(dev, mii_phy->phy_addr,
2210 MII_CONTROL, status & ~(MII_CNTL_SPEED |
2211 MII_CNTL_AUTO));
2212 break;
6aa20a22 2213
1da177e4 2214 case IF_PORT_100BASET: /* 100BaseT */
6aa20a22 2215 case IF_PORT_100BASETX: /* 100BaseTx */
1da177e4 2216 dev->if_port = map->port;
6aa20a22 2217
1da177e4
LT
2218 /* we are going to change the media type, so the Link
2219 * will be temporary down and we need to reflect that
2220 * here. When the Link comes up again, it will be
2221 * sensed by the sis_timer procedure, which also does
2222 * all the rest for us */
2223 netif_carrier_off(dev);
6aa20a22 2224
1da177e4
LT
2225 /* set Speed to 100Mbps */
2226 /* disable auto negotiation and enable 100MBit Mode */
2227 status = mdio_read(dev, mii_phy->phy_addr, MII_CONTROL);
2228 mdio_write(dev, mii_phy->phy_addr,
2229 MII_CONTROL, (status & ~MII_CNTL_SPEED) |
2230 MII_CNTL_SPEED);
6aa20a22 2231
1da177e4 2232 break;
6aa20a22 2233
1da177e4
LT
2234 case IF_PORT_10BASE2: /* 10Base2 */
2235 case IF_PORT_AUI: /* AUI */
2236 case IF_PORT_100BASEFX: /* 100BaseFx */
2237 /* These Modes are not supported (are they?)*/
2238 return -EOPNOTSUPP;
2239 break;
6aa20a22 2240
1da177e4
LT
2241 default:
2242 return -EINVAL;
2243 }
2244 }
2245 return 0;
2246}
2247
2248/**
6aa20a22 2249 * sis900_mcast_bitnr - compute hashtable index
1da177e4
LT
2250 * @addr: multicast address
2251 * @revision: revision id of chip
2252 *
2253 * SiS 900 uses the most sigificant 7 bits to index a 128 bits multicast
2254 * hash table, which makes this function a little bit different from other drivers
2255 * SiS 900 B0 & 635 M/B uses the most significat 8 bits to index 256 bits
6aa20a22 2256 * multicast hash table.
1da177e4
LT
2257 */
2258
2259static inline u16 sis900_mcast_bitnr(u8 *addr, u8 revision)
2260{
2261
2262 u32 crc = ether_crc(6, addr);
2263
2264 /* leave 8 or 7 most siginifant bits */
2265 if ((revision >= SIS635A_900_REV) || (revision == SIS900B_900_REV))
807540ba 2266 return (int)(crc >> 24);
1da177e4 2267 else
807540ba 2268 return (int)(crc >> 25);
1da177e4
LT
2269}
2270
2271/**
6aa20a22 2272 * set_rx_mode - Set SiS900 receive mode
1da177e4
LT
2273 * @net_dev: the net device to be set
2274 *
2275 * Set SiS900 receive mode for promiscuous, multicast, or broadcast mode.
2276 * And set the appropriate multicast filter.
2277 * Multicast hash table changes from 128 to 256 bits for 635M/B & 900B0.
2278 */
2279
2280static void set_rx_mode(struct net_device *net_dev)
2281{
2282 long ioaddr = net_dev->base_addr;
8f15ea42 2283 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4
LT
2284 u16 mc_filter[16] = {0}; /* 256/128 bits multicast hash table */
2285 int i, table_entries;
2286 u32 rx_mode;
2287
7f927fcc 2288 /* 635 Hash Table entries = 256(2^16) */
1da177e4
LT
2289 if((sis_priv->chipset_rev >= SIS635A_900_REV) ||
2290 (sis_priv->chipset_rev == SIS900B_900_REV))
2291 table_entries = 16;
2292 else
2293 table_entries = 8;
2294
2295 if (net_dev->flags & IFF_PROMISC) {
2296 /* Accept any kinds of packets */
2297 rx_mode = RFPromiscuous;
2298 for (i = 0; i < table_entries; i++)
2299 mc_filter[i] = 0xffff;
4cd24eaf 2300 } else if ((netdev_mc_count(net_dev) > multicast_filter_limit) ||
1da177e4
LT
2301 (net_dev->flags & IFF_ALLMULTI)) {
2302 /* too many multicast addresses or accept all multicast packet */
2303 rx_mode = RFAAB | RFAAM;
2304 for (i = 0; i < table_entries; i++)
2305 mc_filter[i] = 0xffff;
2306 } else {
2307 /* Accept Broadcast packet, destination address matchs our
2308 * MAC address, use Receive Filter to reject unwanted MCAST
2309 * packets */
22bedad3 2310 struct netdev_hw_addr *ha;
1da177e4 2311 rx_mode = RFAAB;
5508590c 2312
22bedad3
JP
2313 netdev_for_each_mc_addr(ha, net_dev) {
2314 unsigned int bit_nr;
2315
2316 bit_nr = sis900_mcast_bitnr(ha->addr,
2317 sis_priv->chipset_rev);
1da177e4
LT
2318 mc_filter[bit_nr >> 4] |= (1 << (bit_nr & 0xf));
2319 }
2320 }
2321
2322 /* update Multicast Hash Table in Receive Filter */
2323 for (i = 0; i < table_entries; i++) {
2324 /* why plus 0x04 ??, That makes the correct value for hash table. */
2325 outl((u32)(0x00000004+i) << RFADDR_shift, ioaddr + rfcr);
2326 outl(mc_filter[i], ioaddr + rfdr);
2327 }
2328
2329 outl(RFEN | rx_mode, ioaddr + rfcr);
2330
2331 /* sis900 is capable of looping back packets at MAC level for
2332 * debugging purpose */
2333 if (net_dev->flags & IFF_LOOPBACK) {
2334 u32 cr_saved;
2335 /* We must disable Tx/Rx before setting loopback mode */
2336 cr_saved = inl(ioaddr + cr);
2337 outl(cr_saved | TxDIS | RxDIS, ioaddr + cr);
2338 /* enable loopback */
2339 outl(inl(ioaddr + txcfg) | TxMLB, ioaddr + txcfg);
2340 outl(inl(ioaddr + rxcfg) | RxATX, ioaddr + rxcfg);
2341 /* restore cr */
2342 outl(cr_saved, ioaddr + cr);
2343 }
1da177e4
LT
2344}
2345
2346/**
6aa20a22 2347 * sis900_reset - Reset sis900 MAC
1da177e4
LT
2348 * @net_dev: the net device to reset
2349 *
2350 * reset sis900 MAC and wait until finished
2351 * reset through command register
2352 * change backoff algorithm for 900B0 & 635 M/B
2353 */
2354
2355static void sis900_reset(struct net_device *net_dev)
2356{
8f15ea42 2357 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4
LT
2358 long ioaddr = net_dev->base_addr;
2359 int i = 0;
2360 u32 status = TxRCMP | RxRCMP;
2361
2362 outl(0, ioaddr + ier);
2363 outl(0, ioaddr + imr);
2364 outl(0, ioaddr + rfcr);
2365
2366 outl(RxRESET | TxRESET | RESET | inl(ioaddr + cr), ioaddr + cr);
6aa20a22 2367
1da177e4
LT
2368 /* Check that the chip has finished the reset. */
2369 while (status && (i++ < 1000)) {
2370 status ^= (inl(isr + ioaddr) & status);
2371 }
2372
2373 if( (sis_priv->chipset_rev >= SIS635A_900_REV) ||
2374 (sis_priv->chipset_rev == SIS900B_900_REV) )
2375 outl(PESEL | RND_CNT, ioaddr + cfg);
2376 else
2377 outl(PESEL, ioaddr + cfg);
2378}
2379
2380/**
6aa20a22 2381 * sis900_remove - Remove sis900 device
1da177e4
LT
2382 * @pci_dev: the pci device to be removed
2383 *
2384 * remove and release SiS900 net device
2385 */
2386
2387static void __devexit sis900_remove(struct pci_dev *pci_dev)
2388{
2389 struct net_device *net_dev = pci_get_drvdata(pci_dev);
8f15ea42 2390 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4
LT
2391 struct mii_phy *phy = NULL;
2392
2393 while (sis_priv->first_mii) {
2394 phy = sis_priv->first_mii;
2395 sis_priv->first_mii = phy->next;
2396 kfree(phy);
2397 }
2398
2399 pci_free_consistent(pci_dev, RX_TOTAL_SIZE, sis_priv->rx_ring,
2400 sis_priv->rx_ring_dma);
2401 pci_free_consistent(pci_dev, TX_TOTAL_SIZE, sis_priv->tx_ring,
2402 sis_priv->tx_ring_dma);
2403 unregister_netdev(net_dev);
2404 free_netdev(net_dev);
2405 pci_release_regions(pci_dev);
2406 pci_set_drvdata(pci_dev, NULL);
2407}
2408
2409#ifdef CONFIG_PM
2410
2411static int sis900_suspend(struct pci_dev *pci_dev, pm_message_t state)
2412{
2413 struct net_device *net_dev = pci_get_drvdata(pci_dev);
2414 long ioaddr = net_dev->base_addr;
2415
2416 if(!netif_running(net_dev))
2417 return 0;
2418
2419 netif_stop_queue(net_dev);
2420 netif_device_detach(net_dev);
2421
2422 /* Stop the chip's Tx and Rx Status Machine */
2423 outl(RxDIS | TxDIS | inl(ioaddr + cr), ioaddr + cr);
2424
2425 pci_set_power_state(pci_dev, PCI_D3hot);
2426 pci_save_state(pci_dev);
2427
2428 return 0;
2429}
2430
2431static int sis900_resume(struct pci_dev *pci_dev)
2432{
2433 struct net_device *net_dev = pci_get_drvdata(pci_dev);
8f15ea42 2434 struct sis900_private *sis_priv = netdev_priv(net_dev);
1da177e4
LT
2435 long ioaddr = net_dev->base_addr;
2436
2437 if(!netif_running(net_dev))
2438 return 0;
2439 pci_restore_state(pci_dev);
2440 pci_set_power_state(pci_dev, PCI_D0);
2441
2442 sis900_init_rxfilter(net_dev);
2443
2444 sis900_init_tx_ring(net_dev);
2445 sis900_init_rx_ring(net_dev);
2446
2447 set_rx_mode(net_dev);
2448
2449 netif_device_attach(net_dev);
2450 netif_start_queue(net_dev);
2451
2452 /* Workaround for EDB */
2453 sis900_set_mode(ioaddr, HW_SPEED_10_MBPS, FDX_CAPABLE_HALF_SELECTED);
2454
2455 /* Enable all known interrupts by setting the interrupt mask. */
2456 outl((RxSOVR|RxORN|RxERR|RxOK|TxURN|TxERR|TxIDLE), ioaddr + imr);
2457 outl(RxENA | inl(ioaddr + cr), ioaddr + cr);
2458 outl(IE, ioaddr + ier);
2459
2460 sis900_check_mode(net_dev, sis_priv->mii);
2461
2462 return 0;
2463}
2464#endif /* CONFIG_PM */
2465
2466static struct pci_driver sis900_pci_driver = {
2467 .name = SIS900_MODULE_NAME,
2468 .id_table = sis900_pci_tbl,
2469 .probe = sis900_probe,
2470 .remove = __devexit_p(sis900_remove),
2471#ifdef CONFIG_PM
2472 .suspend = sis900_suspend,
2473 .resume = sis900_resume,
2474#endif /* CONFIG_PM */
2475};
2476
2477static int __init sis900_init_module(void)
2478{
2479/* when a module, this is printed whether or not devices are found in probe */
2480#ifdef MODULE
2481 printk(version);
2482#endif
2483
29917620 2484 return pci_register_driver(&sis900_pci_driver);
1da177e4
LT
2485}
2486
2487static void __exit sis900_cleanup_module(void)
2488{
2489 pci_unregister_driver(&sis900_pci_driver);
2490}
2491
2492module_init(sis900_init_module);
2493module_exit(sis900_cleanup_module);
2494