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0a0c72c9 DM |
1 | /* |
2 | * smc911x.c | |
3 | * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices. | |
4 | * | |
5 | * Copyright (C) 2005 Sensoria Corp | |
6 | * Derived from the unified SMC91x driver by Nicolas Pitre | |
d5498bef | 7 | * and the smsc911x.c reference driver by SMSC |
0a0c72c9 DM |
8 | * |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
0ab75ae8 | 20 | * along with this program; if not, see <http://www.gnu.org/licenses/>. |
0a0c72c9 DM |
21 | * |
22 | * Arguments: | |
23 | * watchdog = TX watchdog timeout | |
24 | * tx_fifo_kb = Size of TX FIFO in KB | |
25 | * | |
26 | * History: | |
27 | * 04/16/05 Dustin McIntire Initial version | |
28 | */ | |
29 | static const char version[] = | |
30 | "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n"; | |
31 | ||
32 | /* Debugging options */ | |
33 | #define ENABLE_SMC_DEBUG_RX 0 | |
34 | #define ENABLE_SMC_DEBUG_TX 0 | |
35 | #define ENABLE_SMC_DEBUG_DMA 0 | |
36 | #define ENABLE_SMC_DEBUG_PKTS 0 | |
37 | #define ENABLE_SMC_DEBUG_MISC 0 | |
38 | #define ENABLE_SMC_DEBUG_FUNC 0 | |
39 | ||
40 | #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0) | |
41 | #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1) | |
42 | #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2) | |
43 | #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3) | |
44 | #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4) | |
45 | #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5) | |
46 | ||
47 | #ifndef SMC_DEBUG | |
48 | #define SMC_DEBUG ( SMC_DEBUG_RX | \ | |
49 | SMC_DEBUG_TX | \ | |
50 | SMC_DEBUG_DMA | \ | |
51 | SMC_DEBUG_PKTS | \ | |
52 | SMC_DEBUG_MISC | \ | |
53 | SMC_DEBUG_FUNC \ | |
54 | ) | |
55 | #endif | |
56 | ||
0a0c72c9 DM |
57 | #include <linux/module.h> |
58 | #include <linux/kernel.h> | |
59 | #include <linux/sched.h> | |
0a0c72c9 DM |
60 | #include <linux/delay.h> |
61 | #include <linux/interrupt.h> | |
62 | #include <linux/errno.h> | |
63 | #include <linux/ioport.h> | |
64 | #include <linux/crc32.h> | |
65 | #include <linux/device.h> | |
66 | #include <linux/platform_device.h> | |
67 | #include <linux/spinlock.h> | |
68 | #include <linux/ethtool.h> | |
69 | #include <linux/mii.h> | |
70 | #include <linux/workqueue.h> | |
71 | ||
72 | #include <linux/netdevice.h> | |
73 | #include <linux/etherdevice.h> | |
74 | #include <linux/skbuff.h> | |
75 | ||
79d3b59a | 76 | #include <linux/dmaengine.h> |
79d3b59a | 77 | |
0a0c72c9 | 78 | #include <asm/io.h> |
0a0c72c9 DM |
79 | |
80 | #include "smc911x.h" | |
81 | ||
82 | /* | |
83 | * Transmit timeout, default 5 seconds. | |
84 | */ | |
85 | static int watchdog = 5000; | |
86 | module_param(watchdog, int, 0400); | |
87 | MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds"); | |
88 | ||
89 | static int tx_fifo_kb=8; | |
90 | module_param(tx_fifo_kb, int, 0400); | |
91 | MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)"); | |
92 | ||
93 | MODULE_LICENSE("GPL"); | |
72abb461 | 94 | MODULE_ALIAS("platform:smc911x"); |
0a0c72c9 DM |
95 | |
96 | /* | |
97 | * The internal workings of the driver. If you are changing anything | |
98 | * here with the SMC stuff, you should have the datasheet and know | |
99 | * what you are doing. | |
100 | */ | |
101 | #define CARDNAME "smc911x" | |
102 | ||
103 | /* | |
104 | * Use power-down feature of the chip | |
105 | */ | |
106 | #define POWER_DOWN 1 | |
107 | ||
0a0c72c9 | 108 | #if SMC_DEBUG > 0 |
dcdf8710 | 109 | #define DBG(n, dev, args...) \ |
0a0c72c9 DM |
110 | do { \ |
111 | if (SMC_DEBUG & (n)) \ | |
dcdf8710 | 112 | netdev_dbg(dev, args); \ |
0a0c72c9 DM |
113 | } while (0) |
114 | ||
dcdf8710 | 115 | #define PRINTK(dev, args...) netdev_info(dev, args) |
0a0c72c9 | 116 | #else |
dcdf8710 BB |
117 | #define DBG(n, dev, args...) do { } while (0) |
118 | #define PRINTK(dev, args...) netdev_dbg(dev, args) | |
0a0c72c9 DM |
119 | #endif |
120 | ||
121 | #if SMC_DEBUG_PKTS > 0 | |
122 | static void PRINT_PKT(u_char *buf, int length) | |
123 | { | |
124 | int i; | |
125 | int remainder; | |
126 | int lines; | |
127 | ||
128 | lines = length / 16; | |
129 | remainder = length % 16; | |
130 | ||
131 | for (i = 0; i < lines ; i ++) { | |
132 | int cur; | |
dcdf8710 | 133 | printk(KERN_DEBUG); |
0a0c72c9 DM |
134 | for (cur = 0; cur < 8; cur++) { |
135 | u_char a, b; | |
136 | a = *buf++; | |
137 | b = *buf++; | |
dcdf8710 | 138 | pr_cont("%02x%02x ", a, b); |
0a0c72c9 | 139 | } |
dcdf8710 | 140 | pr_cont("\n"); |
0a0c72c9 | 141 | } |
dcdf8710 | 142 | printk(KERN_DEBUG); |
0a0c72c9 DM |
143 | for (i = 0; i < remainder/2 ; i++) { |
144 | u_char a, b; | |
145 | a = *buf++; | |
146 | b = *buf++; | |
dcdf8710 | 147 | pr_cont("%02x%02x ", a, b); |
0a0c72c9 | 148 | } |
dcdf8710 | 149 | pr_cont("\n"); |
0a0c72c9 DM |
150 | } |
151 | #else | |
152 | #define PRINT_PKT(x...) do { } while (0) | |
153 | #endif | |
154 | ||
155 | ||
156 | /* this enables an interrupt in the interrupt mask register */ | |
699559f8 | 157 | #define SMC_ENABLE_INT(lp, x) do { \ |
0a0c72c9 | 158 | unsigned int __mask; \ |
699559f8 | 159 | __mask = SMC_GET_INT_EN((lp)); \ |
0a0c72c9 | 160 | __mask |= (x); \ |
699559f8 | 161 | SMC_SET_INT_EN((lp), __mask); \ |
0a0c72c9 DM |
162 | } while (0) |
163 | ||
164 | /* this disables an interrupt from the interrupt mask register */ | |
699559f8 | 165 | #define SMC_DISABLE_INT(lp, x) do { \ |
0a0c72c9 | 166 | unsigned int __mask; \ |
699559f8 | 167 | __mask = SMC_GET_INT_EN((lp)); \ |
0a0c72c9 | 168 | __mask &= ~(x); \ |
699559f8 | 169 | SMC_SET_INT_EN((lp), __mask); \ |
0a0c72c9 DM |
170 | } while (0) |
171 | ||
172 | /* | |
173 | * this does a soft reset on the device | |
174 | */ | |
175 | static void smc911x_reset(struct net_device *dev) | |
176 | { | |
0a0c72c9 | 177 | struct smc911x_local *lp = netdev_priv(dev); |
319edafe | 178 | unsigned int reg, timeout=0, resets=1, irq_cfg; |
0a0c72c9 DM |
179 | unsigned long flags; |
180 | ||
dcdf8710 | 181 | DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__); |
0a0c72c9 DM |
182 | |
183 | /* Take out of PM setting first */ | |
699559f8 | 184 | if ((SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_) == 0) { |
0a0c72c9 | 185 | /* Write to the bytetest will take out of powerdown */ |
699559f8 | 186 | SMC_SET_BYTE_TEST(lp, 0); |
0a0c72c9 DM |
187 | timeout=10; |
188 | do { | |
189 | udelay(10); | |
699559f8 | 190 | reg = SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_; |
db2961c5 | 191 | } while (--timeout && !reg); |
0a0c72c9 | 192 | if (timeout == 0) { |
dcdf8710 | 193 | PRINTK(dev, "smc911x_reset timeout waiting for PM restore\n"); |
0a0c72c9 DM |
194 | return; |
195 | } | |
196 | } | |
197 | ||
198 | /* Disable all interrupts */ | |
199 | spin_lock_irqsave(&lp->lock, flags); | |
699559f8 | 200 | SMC_SET_INT_EN(lp, 0); |
0a0c72c9 DM |
201 | spin_unlock_irqrestore(&lp->lock, flags); |
202 | ||
203 | while (resets--) { | |
699559f8 | 204 | SMC_SET_HW_CFG(lp, HW_CFG_SRST_); |
0a0c72c9 DM |
205 | timeout=10; |
206 | do { | |
207 | udelay(10); | |
699559f8 | 208 | reg = SMC_GET_HW_CFG(lp); |
0a0c72c9 DM |
209 | /* If chip indicates reset timeout then try again */ |
210 | if (reg & HW_CFG_SRST_TO_) { | |
dcdf8710 | 211 | PRINTK(dev, "chip reset timeout, retrying...\n"); |
0a0c72c9 DM |
212 | resets++; |
213 | break; | |
214 | } | |
db2961c5 | 215 | } while (--timeout && (reg & HW_CFG_SRST_)); |
0a0c72c9 DM |
216 | } |
217 | if (timeout == 0) { | |
dcdf8710 | 218 | PRINTK(dev, "smc911x_reset timeout waiting for reset\n"); |
0a0c72c9 DM |
219 | return; |
220 | } | |
221 | ||
222 | /* make sure EEPROM has finished loading before setting GPIO_CFG */ | |
223 | timeout=1000; | |
46578a69 | 224 | while (--timeout && (SMC_GET_E2P_CMD(lp) & E2P_CMD_EPC_BUSY_)) |
0a0c72c9 | 225 | udelay(10); |
46578a69 | 226 | |
0a0c72c9 | 227 | if (timeout == 0){ |
dcdf8710 | 228 | PRINTK(dev, "smc911x_reset timeout waiting for EEPROM busy\n"); |
0a0c72c9 DM |
229 | return; |
230 | } | |
231 | ||
232 | /* Initialize interrupts */ | |
699559f8 MD |
233 | SMC_SET_INT_EN(lp, 0); |
234 | SMC_ACK_INT(lp, -1); | |
0a0c72c9 DM |
235 | |
236 | /* Reset the FIFO level and flow control settings */ | |
699559f8 | 237 | SMC_SET_HW_CFG(lp, (lp->tx_fifo_kb & 0xF) << 16); |
0a0c72c9 | 238 | //TODO: Figure out what appropriate pause time is |
699559f8 MD |
239 | SMC_SET_FLOW(lp, FLOW_FCPT_ | FLOW_FCEN_); |
240 | SMC_SET_AFC_CFG(lp, lp->afc_cfg); | |
0a0c72c9 DM |
241 | |
242 | ||
243 | /* Set to LED outputs */ | |
699559f8 | 244 | SMC_SET_GPIO_CFG(lp, 0x70070000); |
0a0c72c9 | 245 | |
d5498bef | 246 | /* |
0a0c72c9 | 247 | * Deassert IRQ for 1*10us for edge type interrupts |
d5498bef | 248 | * and drive IRQ pin push-pull |
0a0c72c9 | 249 | */ |
319edafe CM |
250 | irq_cfg = (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_; |
251 | #ifdef SMC_DYNAMIC_BUS_CONFIG | |
252 | if (lp->cfg.irq_polarity) | |
253 | irq_cfg |= INT_CFG_IRQ_POL_; | |
254 | #endif | |
255 | SMC_SET_IRQ_CFG(lp, irq_cfg); | |
0a0c72c9 DM |
256 | |
257 | /* clear anything saved */ | |
258 | if (lp->pending_tx_skb != NULL) { | |
259 | dev_kfree_skb (lp->pending_tx_skb); | |
260 | lp->pending_tx_skb = NULL; | |
09f75cd7 JG |
261 | dev->stats.tx_errors++; |
262 | dev->stats.tx_aborted_errors++; | |
0a0c72c9 DM |
263 | } |
264 | } | |
265 | ||
266 | /* | |
267 | * Enable Interrupts, Receive, and Transmit | |
268 | */ | |
269 | static void smc911x_enable(struct net_device *dev) | |
270 | { | |
0a0c72c9 DM |
271 | struct smc911x_local *lp = netdev_priv(dev); |
272 | unsigned mask, cfg, cr; | |
273 | unsigned long flags; | |
274 | ||
dcdf8710 | 275 | DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__); |
0a0c72c9 | 276 | |
b891a902 CM |
277 | spin_lock_irqsave(&lp->lock, flags); |
278 | ||
699559f8 | 279 | SMC_SET_MAC_ADDR(lp, dev->dev_addr); |
0a0c72c9 DM |
280 | |
281 | /* Enable TX */ | |
699559f8 | 282 | cfg = SMC_GET_HW_CFG(lp); |
0a0c72c9 DM |
283 | cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF; |
284 | cfg |= HW_CFG_SF_; | |
699559f8 MD |
285 | SMC_SET_HW_CFG(lp, cfg); |
286 | SMC_SET_FIFO_TDA(lp, 0xFF); | |
0a0c72c9 | 287 | /* Update TX stats on every 64 packets received or every 1 sec */ |
699559f8 MD |
288 | SMC_SET_FIFO_TSL(lp, 64); |
289 | SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000); | |
0a0c72c9 | 290 | |
699559f8 | 291 | SMC_GET_MAC_CR(lp, cr); |
0a0c72c9 | 292 | cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_; |
699559f8 MD |
293 | SMC_SET_MAC_CR(lp, cr); |
294 | SMC_SET_TX_CFG(lp, TX_CFG_TX_ON_); | |
0a0c72c9 DM |
295 | |
296 | /* Add 2 byte padding to start of packets */ | |
699559f8 | 297 | SMC_SET_RX_CFG(lp, (2<<8) & RX_CFG_RXDOFF_); |
0a0c72c9 DM |
298 | |
299 | /* Turn on receiver and enable RX */ | |
300 | if (cr & MAC_CR_RXEN_) | |
dcdf8710 | 301 | DBG(SMC_DEBUG_RX, dev, "Receiver already enabled\n"); |
0a0c72c9 | 302 | |
699559f8 | 303 | SMC_SET_MAC_CR(lp, cr | MAC_CR_RXEN_); |
0a0c72c9 DM |
304 | |
305 | /* Interrupt on every received packet */ | |
699559f8 MD |
306 | SMC_SET_FIFO_RSA(lp, 0x01); |
307 | SMC_SET_FIFO_RSL(lp, 0x00); | |
0a0c72c9 DM |
308 | |
309 | /* now, enable interrupts */ | |
d5498bef JG |
310 | mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ | |
311 | INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ | | |
0a0c72c9 DM |
312 | INT_EN_PHY_INT_EN_; |
313 | if (IS_REV_A(lp->revision)) | |
314 | mask|=INT_EN_RDFL_EN_; | |
315 | else { | |
316 | mask|=INT_EN_RDFO_EN_; | |
317 | } | |
699559f8 | 318 | SMC_ENABLE_INT(lp, mask); |
b891a902 CM |
319 | |
320 | spin_unlock_irqrestore(&lp->lock, flags); | |
0a0c72c9 DM |
321 | } |
322 | ||
323 | /* | |
324 | * this puts the device in an inactive state | |
325 | */ | |
326 | static void smc911x_shutdown(struct net_device *dev) | |
327 | { | |
0a0c72c9 DM |
328 | struct smc911x_local *lp = netdev_priv(dev); |
329 | unsigned cr; | |
330 | unsigned long flags; | |
331 | ||
dcdf8710 | 332 | DBG(SMC_DEBUG_FUNC, dev, "%s: --> %s\n", CARDNAME, __func__); |
0a0c72c9 DM |
333 | |
334 | /* Disable IRQ's */ | |
699559f8 | 335 | SMC_SET_INT_EN(lp, 0); |
0a0c72c9 DM |
336 | |
337 | /* Turn of Rx and TX */ | |
338 | spin_lock_irqsave(&lp->lock, flags); | |
699559f8 | 339 | SMC_GET_MAC_CR(lp, cr); |
0a0c72c9 | 340 | cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_); |
699559f8 MD |
341 | SMC_SET_MAC_CR(lp, cr); |
342 | SMC_SET_TX_CFG(lp, TX_CFG_STOP_TX_); | |
0a0c72c9 DM |
343 | spin_unlock_irqrestore(&lp->lock, flags); |
344 | } | |
345 | ||
346 | static inline void smc911x_drop_pkt(struct net_device *dev) | |
d5498bef | 347 | { |
699559f8 | 348 | struct smc911x_local *lp = netdev_priv(dev); |
0a0c72c9 DM |
349 | unsigned int fifo_count, timeout, reg; |
350 | ||
dcdf8710 BB |
351 | DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, dev, "%s: --> %s\n", |
352 | CARDNAME, __func__); | |
699559f8 | 353 | fifo_count = SMC_GET_RX_FIFO_INF(lp) & 0xFFFF; |
0a0c72c9 DM |
354 | if (fifo_count <= 4) { |
355 | /* Manually dump the packet data */ | |
356 | while (fifo_count--) | |
699559f8 | 357 | SMC_GET_RX_FIFO(lp); |
0a0c72c9 DM |
358 | } else { |
359 | /* Fast forward through the bad packet */ | |
699559f8 | 360 | SMC_SET_RX_DP_CTRL(lp, RX_DP_CTRL_FFWD_BUSY_); |
0a0c72c9 DM |
361 | timeout=50; |
362 | do { | |
363 | udelay(10); | |
699559f8 | 364 | reg = SMC_GET_RX_DP_CTRL(lp) & RX_DP_CTRL_FFWD_BUSY_; |
db2961c5 | 365 | } while (--timeout && reg); |
0a0c72c9 | 366 | if (timeout == 0) { |
dcdf8710 | 367 | PRINTK(dev, "timeout waiting for RX fast forward\n"); |
0a0c72c9 DM |
368 | } |
369 | } | |
370 | } | |
371 | ||
372 | /* | |
373 | * This is the procedure to handle the receipt of a packet. | |
374 | * It should be called after checking for packet presence in | |
d5498bef | 375 | * the RX status FIFO. It must be called with the spin lock |
0a0c72c9 DM |
376 | * already held. |
377 | */ | |
378 | static inline void smc911x_rcv(struct net_device *dev) | |
379 | { | |
699559f8 | 380 | struct smc911x_local *lp = netdev_priv(dev); |
0a0c72c9 DM |
381 | unsigned int pkt_len, status; |
382 | struct sk_buff *skb; | |
383 | unsigned char *data; | |
384 | ||
dcdf8710 BB |
385 | DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, dev, "--> %s\n", |
386 | __func__); | |
699559f8 | 387 | status = SMC_GET_RX_STS_FIFO(lp); |
dcdf8710 BB |
388 | DBG(SMC_DEBUG_RX, dev, "Rx pkt len %d status 0x%08x\n", |
389 | (status & 0x3fff0000) >> 16, status & 0xc000ffff); | |
0a0c72c9 | 390 | pkt_len = (status & RX_STS_PKT_LEN_) >> 16; |
d5498bef | 391 | if (status & RX_STS_ES_) { |
0a0c72c9 | 392 | /* Deal with a bad packet */ |
09f75cd7 | 393 | dev->stats.rx_errors++; |
d5498bef | 394 | if (status & RX_STS_CRC_ERR_) |
09f75cd7 | 395 | dev->stats.rx_crc_errors++; |
0a0c72c9 DM |
396 | else { |
397 | if (status & RX_STS_LEN_ERR_) | |
09f75cd7 | 398 | dev->stats.rx_length_errors++; |
d5498bef | 399 | if (status & RX_STS_MCAST_) |
09f75cd7 | 400 | dev->stats.multicast++; |
0a0c72c9 DM |
401 | } |
402 | /* Remove the bad packet data from the RX FIFO */ | |
403 | smc911x_drop_pkt(dev); | |
404 | } else { | |
405 | /* Receive a valid packet */ | |
406 | /* Alloc a buffer with extra room for DMA alignment */ | |
dae2e9f4 | 407 | skb = netdev_alloc_skb(dev, pkt_len+32); |
0a0c72c9 | 408 | if (unlikely(skb == NULL)) { |
dcdf8710 | 409 | PRINTK(dev, "Low memory, rcvd packet dropped.\n"); |
09f75cd7 | 410 | dev->stats.rx_dropped++; |
0a0c72c9 DM |
411 | smc911x_drop_pkt(dev); |
412 | return; | |
413 | } | |
d5498bef | 414 | /* Align IP header to 32 bits |
0a0c72c9 | 415 | * Note that the device is configured to add a 2 |
d5498bef | 416 | * byte padding to the packet start, so we really |
0a0c72c9 DM |
417 | * want to write to the orignal data pointer */ |
418 | data = skb->data; | |
419 | skb_reserve(skb, 2); | |
420 | skb_put(skb,pkt_len-4); | |
421 | #ifdef SMC_USE_DMA | |
422 | { | |
423 | unsigned int fifo; | |
424 | /* Lower the FIFO threshold if possible */ | |
699559f8 | 425 | fifo = SMC_GET_FIFO_INT(lp); |
0a0c72c9 | 426 | if (fifo & 0xFF) fifo--; |
dcdf8710 BB |
427 | DBG(SMC_DEBUG_RX, dev, "Setting RX stat FIFO threshold to %d\n", |
428 | fifo & 0xff); | |
699559f8 | 429 | SMC_SET_FIFO_INT(lp, fifo); |
0a0c72c9 | 430 | /* Setup RX DMA */ |
699559f8 | 431 | SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_)); |
0a0c72c9 DM |
432 | lp->rxdma_active = 1; |
433 | lp->current_rx_skb = skb; | |
699559f8 | 434 | SMC_PULL_DATA(lp, data, (pkt_len+2+15) & ~15); |
0a0c72c9 DM |
435 | /* Packet processing deferred to DMA RX interrupt */ |
436 | } | |
437 | #else | |
699559f8 MD |
438 | SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_)); |
439 | SMC_PULL_DATA(lp, data, pkt_len+2+3); | |
0a0c72c9 | 440 | |
dcdf8710 | 441 | DBG(SMC_DEBUG_PKTS, dev, "Received packet\n"); |
0a0c72c9 | 442 | PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64); |
0a0c72c9 DM |
443 | skb->protocol = eth_type_trans(skb, dev); |
444 | netif_rx(skb); | |
09f75cd7 JG |
445 | dev->stats.rx_packets++; |
446 | dev->stats.rx_bytes += pkt_len-4; | |
0a0c72c9 DM |
447 | #endif |
448 | } | |
449 | } | |
450 | ||
451 | /* | |
452 | * This is called to actually send a packet to the chip. | |
453 | */ | |
454 | static void smc911x_hardware_send_pkt(struct net_device *dev) | |
455 | { | |
456 | struct smc911x_local *lp = netdev_priv(dev); | |
0a0c72c9 DM |
457 | struct sk_buff *skb; |
458 | unsigned int cmdA, cmdB, len; | |
459 | unsigned char *buf; | |
0a0c72c9 | 460 | |
dcdf8710 | 461 | DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n", __func__); |
0a0c72c9 DM |
462 | BUG_ON(lp->pending_tx_skb == NULL); |
463 | ||
464 | skb = lp->pending_tx_skb; | |
465 | lp->pending_tx_skb = NULL; | |
466 | ||
d5498bef JG |
467 | /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */ |
468 | /* cmdB {31:16] pkt tag [10:0] length */ | |
0a0c72c9 DM |
469 | #ifdef SMC_USE_DMA |
470 | /* 16 byte buffer alignment mode */ | |
471 | buf = (char*)((u32)(skb->data) & ~0xF); | |
d5498bef | 472 | len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF; |
0a0c72c9 DM |
473 | cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) | |
474 | TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ | | |
475 | skb->len; | |
476 | #else | |
477 | buf = (char*)((u32)skb->data & ~0x3); | |
d5498bef | 478 | len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3; |
0a0c72c9 DM |
479 | cmdA = (((u32)skb->data & 0x3) << 16) | |
480 | TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ | | |
481 | skb->len; | |
482 | #endif | |
d5498bef | 483 | /* tag is packet length so we can use this in stats update later */ |
0a0c72c9 | 484 | cmdB = (skb->len << 16) | (skb->len & 0x7FF); |
d5498bef | 485 | |
dcdf8710 BB |
486 | DBG(SMC_DEBUG_TX, dev, "TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n", |
487 | len, len, buf, cmdA, cmdB); | |
699559f8 MD |
488 | SMC_SET_TX_FIFO(lp, cmdA); |
489 | SMC_SET_TX_FIFO(lp, cmdB); | |
0a0c72c9 | 490 | |
dcdf8710 | 491 | DBG(SMC_DEBUG_PKTS, dev, "Transmitted packet\n"); |
0a0c72c9 DM |
492 | PRINT_PKT(buf, len <= 64 ? len : 64); |
493 | ||
494 | /* Send pkt via PIO or DMA */ | |
495 | #ifdef SMC_USE_DMA | |
496 | lp->current_tx_skb = skb; | |
699559f8 | 497 | SMC_PUSH_DATA(lp, buf, len); |
0a0c72c9 DM |
498 | /* DMA complete IRQ will free buffer and set jiffies */ |
499 | #else | |
699559f8 | 500 | SMC_PUSH_DATA(lp, buf, len); |
860e9538 | 501 | netif_trans_update(dev); |
70d9d158 | 502 | dev_kfree_skb_irq(skb); |
0a0c72c9 | 503 | #endif |
0a0c72c9 DM |
504 | if (!lp->tx_throttle) { |
505 | netif_wake_queue(dev); | |
506 | } | |
699559f8 | 507 | SMC_ENABLE_INT(lp, INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_); |
0a0c72c9 DM |
508 | } |
509 | ||
510 | /* | |
511 | * Since I am not sure if I will have enough room in the chip's ram | |
512 | * to store the packet, I call this routine which either sends it | |
513 | * now, or set the card to generates an interrupt when ready | |
514 | * for the packet. | |
515 | */ | |
6323d57f Y |
516 | static netdev_tx_t |
517 | smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev) | |
0a0c72c9 DM |
518 | { |
519 | struct smc911x_local *lp = netdev_priv(dev); | |
0a0c72c9 DM |
520 | unsigned int free; |
521 | unsigned long flags; | |
522 | ||
dcdf8710 BB |
523 | DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n", |
524 | __func__); | |
0a0c72c9 | 525 | |
b891a902 CM |
526 | spin_lock_irqsave(&lp->lock, flags); |
527 | ||
0a0c72c9 DM |
528 | BUG_ON(lp->pending_tx_skb != NULL); |
529 | ||
699559f8 | 530 | free = SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TDFREE_; |
dcdf8710 | 531 | DBG(SMC_DEBUG_TX, dev, "TX free space %d\n", free); |
0a0c72c9 DM |
532 | |
533 | /* Turn off the flow when running out of space in FIFO */ | |
534 | if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) { | |
dcdf8710 BB |
535 | DBG(SMC_DEBUG_TX, dev, "Disabling data flow due to low FIFO space (%d)\n", |
536 | free); | |
0a0c72c9 | 537 | /* Reenable when at least 1 packet of size MTU present */ |
699559f8 | 538 | SMC_SET_FIFO_TDA(lp, (SMC911X_TX_FIFO_LOW_THRESHOLD)/64); |
0a0c72c9 DM |
539 | lp->tx_throttle = 1; |
540 | netif_stop_queue(dev); | |
0a0c72c9 DM |
541 | } |
542 | ||
d5498bef | 543 | /* Drop packets when we run out of space in TX FIFO |
0a0c72c9 | 544 | * Account for overhead required for: |
d5498bef JG |
545 | * |
546 | * Tx command words 8 bytes | |
0a0c72c9 DM |
547 | * Start offset 15 bytes |
548 | * End padding 15 bytes | |
d5498bef | 549 | */ |
0a0c72c9 | 550 | if (unlikely(free < (skb->len + 8 + 15 + 15))) { |
dcdf8710 BB |
551 | netdev_warn(dev, "No Tx free space %d < %d\n", |
552 | free, skb->len); | |
0a0c72c9 | 553 | lp->pending_tx_skb = NULL; |
09f75cd7 JG |
554 | dev->stats.tx_errors++; |
555 | dev->stats.tx_dropped++; | |
b891a902 | 556 | spin_unlock_irqrestore(&lp->lock, flags); |
d27ab53c | 557 | dev_kfree_skb_any(skb); |
6ed10654 | 558 | return NETDEV_TX_OK; |
0a0c72c9 | 559 | } |
d5498bef | 560 | |
0a0c72c9 DM |
561 | #ifdef SMC_USE_DMA |
562 | { | |
563 | /* If the DMA is already running then defer this packet Tx until | |
d5498bef | 564 | * the DMA IRQ starts it |
0a0c72c9 | 565 | */ |
0a0c72c9 | 566 | if (lp->txdma_active) { |
dcdf8710 | 567 | DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "Tx DMA running, deferring packet\n"); |
0a0c72c9 DM |
568 | lp->pending_tx_skb = skb; |
569 | netif_stop_queue(dev); | |
570 | spin_unlock_irqrestore(&lp->lock, flags); | |
6ed10654 | 571 | return NETDEV_TX_OK; |
0a0c72c9 | 572 | } else { |
dcdf8710 | 573 | DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "Activating Tx DMA\n"); |
0a0c72c9 DM |
574 | lp->txdma_active = 1; |
575 | } | |
0a0c72c9 DM |
576 | } |
577 | #endif | |
578 | lp->pending_tx_skb = skb; | |
579 | smc911x_hardware_send_pkt(dev); | |
b891a902 | 580 | spin_unlock_irqrestore(&lp->lock, flags); |
0a0c72c9 | 581 | |
6ed10654 | 582 | return NETDEV_TX_OK; |
0a0c72c9 DM |
583 | } |
584 | ||
585 | /* | |
586 | * This handles a TX status interrupt, which is only called when: | |
587 | * - a TX error occurred, or | |
588 | * - TX of a packet completed. | |
589 | */ | |
590 | static void smc911x_tx(struct net_device *dev) | |
591 | { | |
0a0c72c9 DM |
592 | struct smc911x_local *lp = netdev_priv(dev); |
593 | unsigned int tx_status; | |
594 | ||
dcdf8710 BB |
595 | DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, dev, "--> %s\n", |
596 | __func__); | |
0a0c72c9 DM |
597 | |
598 | /* Collect the TX status */ | |
699559f8 | 599 | while (((SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16) != 0) { |
dcdf8710 BB |
600 | DBG(SMC_DEBUG_TX, dev, "Tx stat FIFO used 0x%04x\n", |
601 | (SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16); | |
699559f8 | 602 | tx_status = SMC_GET_TX_STS_FIFO(lp); |
09f75cd7 JG |
603 | dev->stats.tx_packets++; |
604 | dev->stats.tx_bytes+=tx_status>>16; | |
dcdf8710 BB |
605 | DBG(SMC_DEBUG_TX, dev, "Tx FIFO tag 0x%04x status 0x%04x\n", |
606 | (tx_status & 0xffff0000) >> 16, | |
607 | tx_status & 0x0000ffff); | |
d5498bef | 608 | /* count Tx errors, but ignore lost carrier errors when in |
0a0c72c9 | 609 | * full-duplex mode */ |
d5498bef | 610 | if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx && |
0a0c72c9 | 611 | !(tx_status & 0x00000306))) { |
09f75cd7 | 612 | dev->stats.tx_errors++; |
0a0c72c9 DM |
613 | } |
614 | if (tx_status & TX_STS_MANY_COLL_) { | |
09f75cd7 JG |
615 | dev->stats.collisions+=16; |
616 | dev->stats.tx_aborted_errors++; | |
0a0c72c9 | 617 | } else { |
09f75cd7 | 618 | dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3; |
0a0c72c9 DM |
619 | } |
620 | /* carrier error only has meaning for half-duplex communication */ | |
d5498bef | 621 | if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) && |
0a0c72c9 | 622 | !lp->ctl_rfduplx) { |
09f75cd7 | 623 | dev->stats.tx_carrier_errors++; |
d5498bef | 624 | } |
0a0c72c9 | 625 | if (tx_status & TX_STS_LATE_COLL_) { |
09f75cd7 JG |
626 | dev->stats.collisions++; |
627 | dev->stats.tx_aborted_errors++; | |
0a0c72c9 DM |
628 | } |
629 | } | |
630 | } | |
631 | ||
632 | ||
633 | /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/ | |
634 | /* | |
635 | * Reads a register from the MII Management serial interface | |
636 | */ | |
637 | ||
638 | static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg) | |
639 | { | |
699559f8 | 640 | struct smc911x_local *lp = netdev_priv(dev); |
0a0c72c9 DM |
641 | unsigned int phydata; |
642 | ||
699559f8 | 643 | SMC_GET_MII(lp, phyreg, phyaddr, phydata); |
0a0c72c9 | 644 | |
dcdf8710 BB |
645 | DBG(SMC_DEBUG_MISC, dev, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n", |
646 | __func__, phyaddr, phyreg, phydata); | |
0a0c72c9 DM |
647 | return phydata; |
648 | } | |
649 | ||
650 | ||
651 | /* | |
652 | * Writes a register to the MII Management serial interface | |
653 | */ | |
654 | static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg, | |
655 | int phydata) | |
656 | { | |
699559f8 | 657 | struct smc911x_local *lp = netdev_priv(dev); |
0a0c72c9 | 658 | |
dcdf8710 BB |
659 | DBG(SMC_DEBUG_MISC, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n", |
660 | __func__, phyaddr, phyreg, phydata); | |
0a0c72c9 | 661 | |
699559f8 | 662 | SMC_SET_MII(lp, phyreg, phyaddr, phydata); |
0a0c72c9 DM |
663 | } |
664 | ||
665 | /* | |
666 | * Finds and reports the PHY address (115 and 117 have external | |
667 | * PHY interface 118 has internal only | |
668 | */ | |
669 | static void smc911x_phy_detect(struct net_device *dev) | |
670 | { | |
0a0c72c9 DM |
671 | struct smc911x_local *lp = netdev_priv(dev); |
672 | int phyaddr; | |
673 | unsigned int cfg, id1, id2; | |
674 | ||
dcdf8710 | 675 | DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__); |
0a0c72c9 DM |
676 | |
677 | lp->phy_type = 0; | |
678 | ||
679 | /* | |
680 | * Scan all 32 PHY addresses if necessary, starting at | |
681 | * PHY#1 to PHY#31, and then PHY#0 last. | |
682 | */ | |
683 | switch(lp->version) { | |
c6dcb827 GL |
684 | case CHIP_9115: |
685 | case CHIP_9117: | |
686 | case CHIP_9215: | |
687 | case CHIP_9217: | |
699559f8 | 688 | cfg = SMC_GET_HW_CFG(lp); |
0a0c72c9 DM |
689 | if (cfg & HW_CFG_EXT_PHY_DET_) { |
690 | cfg &= ~HW_CFG_PHY_CLK_SEL_; | |
691 | cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_; | |
699559f8 | 692 | SMC_SET_HW_CFG(lp, cfg); |
0a0c72c9 DM |
693 | udelay(10); /* Wait for clocks to stop */ |
694 | ||
695 | cfg |= HW_CFG_EXT_PHY_EN_; | |
699559f8 | 696 | SMC_SET_HW_CFG(lp, cfg); |
0a0c72c9 DM |
697 | udelay(10); /* Wait for clocks to stop */ |
698 | ||
699 | cfg &= ~HW_CFG_PHY_CLK_SEL_; | |
700 | cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_; | |
699559f8 | 701 | SMC_SET_HW_CFG(lp, cfg); |
0a0c72c9 DM |
702 | udelay(10); /* Wait for clocks to stop */ |
703 | ||
704 | cfg |= HW_CFG_SMI_SEL_; | |
699559f8 | 705 | SMC_SET_HW_CFG(lp, cfg); |
0a0c72c9 DM |
706 | |
707 | for (phyaddr = 1; phyaddr < 32; ++phyaddr) { | |
708 | ||
709 | /* Read the PHY identifiers */ | |
699559f8 MD |
710 | SMC_GET_PHY_ID1(lp, phyaddr & 31, id1); |
711 | SMC_GET_PHY_ID2(lp, phyaddr & 31, id2); | |
0a0c72c9 DM |
712 | |
713 | /* Make sure it is a valid identifier */ | |
d5498bef JG |
714 | if (id1 != 0x0000 && id1 != 0xffff && |
715 | id1 != 0x8000 && id2 != 0x0000 && | |
0a0c72c9 DM |
716 | id2 != 0xffff && id2 != 0x8000) { |
717 | /* Save the PHY's address */ | |
718 | lp->mii.phy_id = phyaddr & 31; | |
719 | lp->phy_type = id1 << 16 | id2; | |
720 | break; | |
721 | } | |
722 | } | |
f3073ac7 GL |
723 | if (phyaddr < 32) |
724 | /* Found an external PHY */ | |
725 | break; | |
0a0c72c9 DM |
726 | } |
727 | default: | |
728 | /* Internal media only */ | |
699559f8 MD |
729 | SMC_GET_PHY_ID1(lp, 1, id1); |
730 | SMC_GET_PHY_ID2(lp, 1, id2); | |
0a0c72c9 DM |
731 | /* Save the PHY's address */ |
732 | lp->mii.phy_id = 1; | |
733 | lp->phy_type = id1 << 16 | id2; | |
734 | } | |
735 | ||
45dfab68 | 736 | DBG(SMC_DEBUG_MISC, dev, "phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%x\n", |
dcdf8710 | 737 | id1, id2, lp->mii.phy_id); |
0a0c72c9 DM |
738 | } |
739 | ||
740 | /* | |
741 | * Sets the PHY to a configuration as determined by the user. | |
742 | * Called with spin_lock held. | |
743 | */ | |
744 | static int smc911x_phy_fixed(struct net_device *dev) | |
745 | { | |
746 | struct smc911x_local *lp = netdev_priv(dev); | |
0a0c72c9 DM |
747 | int phyaddr = lp->mii.phy_id; |
748 | int bmcr; | |
749 | ||
dcdf8710 | 750 | DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__); |
0a0c72c9 DM |
751 | |
752 | /* Enter Link Disable state */ | |
699559f8 | 753 | SMC_GET_PHY_BMCR(lp, phyaddr, bmcr); |
0a0c72c9 | 754 | bmcr |= BMCR_PDOWN; |
699559f8 | 755 | SMC_SET_PHY_BMCR(lp, phyaddr, bmcr); |
0a0c72c9 DM |
756 | |
757 | /* | |
758 | * Set our fixed capabilities | |
759 | * Disable auto-negotiation | |
760 | */ | |
761 | bmcr &= ~BMCR_ANENABLE; | |
762 | if (lp->ctl_rfduplx) | |
763 | bmcr |= BMCR_FULLDPLX; | |
764 | ||
765 | if (lp->ctl_rspeed == 100) | |
766 | bmcr |= BMCR_SPEED100; | |
767 | ||
768 | /* Write our capabilities to the phy control register */ | |
699559f8 | 769 | SMC_SET_PHY_BMCR(lp, phyaddr, bmcr); |
0a0c72c9 DM |
770 | |
771 | /* Re-Configure the Receive/Phy Control register */ | |
772 | bmcr &= ~BMCR_PDOWN; | |
699559f8 | 773 | SMC_SET_PHY_BMCR(lp, phyaddr, bmcr); |
0a0c72c9 DM |
774 | |
775 | return 1; | |
776 | } | |
777 | ||
49ce9c2c | 778 | /** |
0a0c72c9 DM |
779 | * smc911x_phy_reset - reset the phy |
780 | * @dev: net device | |
781 | * @phy: phy address | |
782 | * | |
783 | * Issue a software reset for the specified PHY and | |
784 | * wait up to 100ms for the reset to complete. We should | |
785 | * not access the PHY for 50ms after issuing the reset. | |
786 | * | |
787 | * The time to wait appears to be dependent on the PHY. | |
788 | * | |
789 | */ | |
790 | static int smc911x_phy_reset(struct net_device *dev, int phy) | |
791 | { | |
792 | struct smc911x_local *lp = netdev_priv(dev); | |
0a0c72c9 DM |
793 | int timeout; |
794 | unsigned long flags; | |
795 | unsigned int reg; | |
796 | ||
dcdf8710 | 797 | DBG(SMC_DEBUG_FUNC, dev, "--> %s()\n", __func__); |
0a0c72c9 DM |
798 | |
799 | spin_lock_irqsave(&lp->lock, flags); | |
699559f8 | 800 | reg = SMC_GET_PMT_CTRL(lp); |
0a0c72c9 DM |
801 | reg &= ~0xfffff030; |
802 | reg |= PMT_CTRL_PHY_RST_; | |
699559f8 | 803 | SMC_SET_PMT_CTRL(lp, reg); |
0a0c72c9 DM |
804 | spin_unlock_irqrestore(&lp->lock, flags); |
805 | for (timeout = 2; timeout; timeout--) { | |
806 | msleep(50); | |
807 | spin_lock_irqsave(&lp->lock, flags); | |
699559f8 | 808 | reg = SMC_GET_PMT_CTRL(lp); |
0a0c72c9 DM |
809 | spin_unlock_irqrestore(&lp->lock, flags); |
810 | if (!(reg & PMT_CTRL_PHY_RST_)) { | |
d5498bef | 811 | /* extra delay required because the phy may |
0a0c72c9 | 812 | * not be completed with its reset |
d5498bef | 813 | * when PHY_BCR_RESET_ is cleared. 256us |
0a0c72c9 DM |
814 | * should suffice, but use 500us to be safe |
815 | */ | |
816 | udelay(500); | |
817 | break; | |
818 | } | |
819 | } | |
820 | ||
821 | return reg & PMT_CTRL_PHY_RST_; | |
822 | } | |
823 | ||
49ce9c2c | 824 | /** |
0a0c72c9 DM |
825 | * smc911x_phy_powerdown - powerdown phy |
826 | * @dev: net device | |
827 | * @phy: phy address | |
828 | * | |
829 | * Power down the specified PHY | |
830 | */ | |
831 | static void smc911x_phy_powerdown(struct net_device *dev, int phy) | |
832 | { | |
699559f8 | 833 | struct smc911x_local *lp = netdev_priv(dev); |
0a0c72c9 DM |
834 | unsigned int bmcr; |
835 | ||
836 | /* Enter Link Disable state */ | |
699559f8 | 837 | SMC_GET_PHY_BMCR(lp, phy, bmcr); |
0a0c72c9 | 838 | bmcr |= BMCR_PDOWN; |
699559f8 | 839 | SMC_SET_PHY_BMCR(lp, phy, bmcr); |
0a0c72c9 DM |
840 | } |
841 | ||
49ce9c2c | 842 | /** |
0a0c72c9 DM |
843 | * smc911x_phy_check_media - check the media status and adjust BMCR |
844 | * @dev: net device | |
845 | * @init: set true for initialisation | |
846 | * | |
847 | * Select duplex mode depending on negotiation state. This | |
848 | * also updates our carrier state. | |
849 | */ | |
850 | static void smc911x_phy_check_media(struct net_device *dev, int init) | |
851 | { | |
852 | struct smc911x_local *lp = netdev_priv(dev); | |
0a0c72c9 DM |
853 | int phyaddr = lp->mii.phy_id; |
854 | unsigned int bmcr, cr; | |
855 | ||
dcdf8710 | 856 | DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__); |
0a0c72c9 DM |
857 | |
858 | if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) { | |
859 | /* duplex state has changed */ | |
699559f8 MD |
860 | SMC_GET_PHY_BMCR(lp, phyaddr, bmcr); |
861 | SMC_GET_MAC_CR(lp, cr); | |
0a0c72c9 | 862 | if (lp->mii.full_duplex) { |
dcdf8710 | 863 | DBG(SMC_DEBUG_MISC, dev, "Configuring for full-duplex mode\n"); |
0a0c72c9 DM |
864 | bmcr |= BMCR_FULLDPLX; |
865 | cr |= MAC_CR_RCVOWN_; | |
866 | } else { | |
dcdf8710 | 867 | DBG(SMC_DEBUG_MISC, dev, "Configuring for half-duplex mode\n"); |
0a0c72c9 DM |
868 | bmcr &= ~BMCR_FULLDPLX; |
869 | cr &= ~MAC_CR_RCVOWN_; | |
870 | } | |
699559f8 MD |
871 | SMC_SET_PHY_BMCR(lp, phyaddr, bmcr); |
872 | SMC_SET_MAC_CR(lp, cr); | |
0a0c72c9 DM |
873 | } |
874 | } | |
875 | ||
876 | /* | |
877 | * Configures the specified PHY through the MII management interface | |
878 | * using Autonegotiation. | |
879 | * Calls smc911x_phy_fixed() if the user has requested a certain config. | |
880 | * If RPC ANEG bit is set, the media selection is dependent purely on | |
881 | * the selection by the MII (either in the MII BMCR reg or the result | |
882 | * of autonegotiation.) If the RPC ANEG bit is cleared, the selection | |
883 | * is controlled by the RPC SPEED and RPC DPLX bits. | |
884 | */ | |
ef8142a5 | 885 | static void smc911x_phy_configure(struct work_struct *work) |
0a0c72c9 | 886 | { |
ef8142a5 AM |
887 | struct smc911x_local *lp = container_of(work, struct smc911x_local, |
888 | phy_configure); | |
889 | struct net_device *dev = lp->netdev; | |
0a0c72c9 DM |
890 | int phyaddr = lp->mii.phy_id; |
891 | int my_phy_caps; /* My PHY capabilities */ | |
892 | int my_ad_caps; /* My Advertised capabilities */ | |
893 | int status; | |
894 | unsigned long flags; | |
895 | ||
dcdf8710 | 896 | DBG(SMC_DEBUG_FUNC, dev, "--> %s()\n", __func__); |
0a0c72c9 DM |
897 | |
898 | /* | |
899 | * We should not be called if phy_type is zero. | |
900 | */ | |
901 | if (lp->phy_type == 0) | |
4bb073c0 | 902 | return; |
0a0c72c9 DM |
903 | |
904 | if (smc911x_phy_reset(dev, phyaddr)) { | |
dcdf8710 | 905 | netdev_info(dev, "PHY reset timed out\n"); |
4bb073c0 | 906 | return; |
0a0c72c9 DM |
907 | } |
908 | spin_lock_irqsave(&lp->lock, flags); | |
909 | ||
910 | /* | |
911 | * Enable PHY Interrupts (for register 18) | |
912 | * Interrupts listed here are enabled | |
913 | */ | |
699559f8 | 914 | SMC_SET_PHY_INT_MASK(lp, phyaddr, PHY_INT_MASK_ENERGY_ON_ | |
0a0c72c9 DM |
915 | PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ | |
916 | PHY_INT_MASK_LINK_DOWN_); | |
917 | ||
918 | /* If the user requested no auto neg, then go set his request */ | |
919 | if (lp->mii.force_media) { | |
920 | smc911x_phy_fixed(dev); | |
921 | goto smc911x_phy_configure_exit; | |
922 | } | |
923 | ||
924 | /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */ | |
699559f8 | 925 | SMC_GET_PHY_BMSR(lp, phyaddr, my_phy_caps); |
0a0c72c9 | 926 | if (!(my_phy_caps & BMSR_ANEGCAPABLE)) { |
dcdf8710 | 927 | netdev_info(dev, "Auto negotiation NOT supported\n"); |
0a0c72c9 DM |
928 | smc911x_phy_fixed(dev); |
929 | goto smc911x_phy_configure_exit; | |
930 | } | |
931 | ||
932 | /* CSMA capable w/ both pauses */ | |
933 | my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; | |
934 | ||
935 | if (my_phy_caps & BMSR_100BASE4) | |
936 | my_ad_caps |= ADVERTISE_100BASE4; | |
937 | if (my_phy_caps & BMSR_100FULL) | |
938 | my_ad_caps |= ADVERTISE_100FULL; | |
939 | if (my_phy_caps & BMSR_100HALF) | |
940 | my_ad_caps |= ADVERTISE_100HALF; | |
941 | if (my_phy_caps & BMSR_10FULL) | |
942 | my_ad_caps |= ADVERTISE_10FULL; | |
943 | if (my_phy_caps & BMSR_10HALF) | |
944 | my_ad_caps |= ADVERTISE_10HALF; | |
945 | ||
946 | /* Disable capabilities not selected by our user */ | |
947 | if (lp->ctl_rspeed != 100) | |
948 | my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF); | |
949 | ||
950 | if (!lp->ctl_rfduplx) | |
951 | my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL); | |
952 | ||
953 | /* Update our Auto-Neg Advertisement Register */ | |
699559f8 | 954 | SMC_SET_PHY_MII_ADV(lp, phyaddr, my_ad_caps); |
0a0c72c9 DM |
955 | lp->mii.advertising = my_ad_caps; |
956 | ||
957 | /* | |
958 | * Read the register back. Without this, it appears that when | |
959 | * auto-negotiation is restarted, sometimes it isn't ready and | |
960 | * the link does not come up. | |
961 | */ | |
962 | udelay(10); | |
699559f8 | 963 | SMC_GET_PHY_MII_ADV(lp, phyaddr, status); |
0a0c72c9 | 964 | |
dcdf8710 BB |
965 | DBG(SMC_DEBUG_MISC, dev, "phy caps=0x%04x\n", my_phy_caps); |
966 | DBG(SMC_DEBUG_MISC, dev, "phy advertised caps=0x%04x\n", my_ad_caps); | |
0a0c72c9 DM |
967 | |
968 | /* Restart auto-negotiation process in order to advertise my caps */ | |
699559f8 | 969 | SMC_SET_PHY_BMCR(lp, phyaddr, BMCR_ANENABLE | BMCR_ANRESTART); |
0a0c72c9 DM |
970 | |
971 | smc911x_phy_check_media(dev, 1); | |
972 | ||
973 | smc911x_phy_configure_exit: | |
974 | spin_unlock_irqrestore(&lp->lock, flags); | |
0a0c72c9 DM |
975 | } |
976 | ||
977 | /* | |
978 | * smc911x_phy_interrupt | |
979 | * | |
980 | * Purpose: Handle interrupts relating to PHY register 18. This is | |
981 | * called from the "hard" interrupt handler under our private spinlock. | |
982 | */ | |
983 | static void smc911x_phy_interrupt(struct net_device *dev) | |
984 | { | |
985 | struct smc911x_local *lp = netdev_priv(dev); | |
0a0c72c9 DM |
986 | int phyaddr = lp->mii.phy_id; |
987 | int status; | |
988 | ||
dcdf8710 | 989 | DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__); |
0a0c72c9 DM |
990 | |
991 | if (lp->phy_type == 0) | |
992 | return; | |
993 | ||
994 | smc911x_phy_check_media(dev, 0); | |
995 | /* read to clear status bits */ | |
699559f8 | 996 | SMC_GET_PHY_INT_SRC(lp, phyaddr,status); |
dcdf8710 BB |
997 | DBG(SMC_DEBUG_MISC, dev, "PHY interrupt status 0x%04x\n", |
998 | status & 0xffff); | |
999 | DBG(SMC_DEBUG_MISC, dev, "AFC_CFG 0x%08x\n", | |
1000 | SMC_GET_AFC_CFG(lp)); | |
0a0c72c9 DM |
1001 | } |
1002 | ||
1003 | /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/ | |
1004 | ||
1005 | /* | |
1006 | * This is the main routine of the driver, to handle the device when | |
1007 | * it needs some attention. | |
1008 | */ | |
7d12e780 | 1009 | static irqreturn_t smc911x_interrupt(int irq, void *dev_id) |
0a0c72c9 DM |
1010 | { |
1011 | struct net_device *dev = dev_id; | |
0a0c72c9 DM |
1012 | struct smc911x_local *lp = netdev_priv(dev); |
1013 | unsigned int status, mask, timeout; | |
1014 | unsigned int rx_overrun=0, cr, pkts; | |
1015 | unsigned long flags; | |
1016 | ||
dcdf8710 | 1017 | DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__); |
0a0c72c9 DM |
1018 | |
1019 | spin_lock_irqsave(&lp->lock, flags); | |
1020 | ||
1021 | /* Spurious interrupt check */ | |
699559f8 | 1022 | if ((SMC_GET_IRQ_CFG(lp) & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) != |
0a0c72c9 | 1023 | (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) { |
a4d09272 | 1024 | spin_unlock_irqrestore(&lp->lock, flags); |
0a0c72c9 DM |
1025 | return IRQ_NONE; |
1026 | } | |
1027 | ||
699559f8 MD |
1028 | mask = SMC_GET_INT_EN(lp); |
1029 | SMC_SET_INT_EN(lp, 0); | |
0a0c72c9 DM |
1030 | |
1031 | /* set a timeout value, so I don't stay here forever */ | |
1032 | timeout = 8; | |
1033 | ||
1034 | ||
1035 | do { | |
699559f8 | 1036 | status = SMC_GET_INT(lp); |
0a0c72c9 | 1037 | |
dcdf8710 BB |
1038 | DBG(SMC_DEBUG_MISC, dev, "INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n", |
1039 | status, mask, status & ~mask); | |
0a0c72c9 DM |
1040 | |
1041 | status &= mask; | |
1042 | if (!status) | |
1043 | break; | |
1044 | ||
1045 | /* Handle SW interrupt condition */ | |
1046 | if (status & INT_STS_SW_INT_) { | |
699559f8 | 1047 | SMC_ACK_INT(lp, INT_STS_SW_INT_); |
0a0c72c9 DM |
1048 | mask &= ~INT_EN_SW_INT_EN_; |
1049 | } | |
1050 | /* Handle various error conditions */ | |
1051 | if (status & INT_STS_RXE_) { | |
699559f8 | 1052 | SMC_ACK_INT(lp, INT_STS_RXE_); |
09f75cd7 | 1053 | dev->stats.rx_errors++; |
d5498bef | 1054 | } |
0a0c72c9 | 1055 | if (status & INT_STS_RXDFH_INT_) { |
699559f8 MD |
1056 | SMC_ACK_INT(lp, INT_STS_RXDFH_INT_); |
1057 | dev->stats.rx_dropped+=SMC_GET_RX_DROP(lp); | |
0a0c72c9 DM |
1058 | } |
1059 | /* Undocumented interrupt-what is the right thing to do here? */ | |
1060 | if (status & INT_STS_RXDF_INT_) { | |
699559f8 | 1061 | SMC_ACK_INT(lp, INT_STS_RXDF_INT_); |
0a0c72c9 DM |
1062 | } |
1063 | ||
1064 | /* Rx Data FIFO exceeds set level */ | |
1065 | if (status & INT_STS_RDFL_) { | |
1066 | if (IS_REV_A(lp->revision)) { | |
1067 | rx_overrun=1; | |
699559f8 | 1068 | SMC_GET_MAC_CR(lp, cr); |
0a0c72c9 | 1069 | cr &= ~MAC_CR_RXEN_; |
699559f8 | 1070 | SMC_SET_MAC_CR(lp, cr); |
dcdf8710 | 1071 | DBG(SMC_DEBUG_RX, dev, "RX overrun\n"); |
09f75cd7 JG |
1072 | dev->stats.rx_errors++; |
1073 | dev->stats.rx_fifo_errors++; | |
0a0c72c9 | 1074 | } |
699559f8 | 1075 | SMC_ACK_INT(lp, INT_STS_RDFL_); |
0a0c72c9 DM |
1076 | } |
1077 | if (status & INT_STS_RDFO_) { | |
1078 | if (!IS_REV_A(lp->revision)) { | |
699559f8 | 1079 | SMC_GET_MAC_CR(lp, cr); |
0a0c72c9 | 1080 | cr &= ~MAC_CR_RXEN_; |
699559f8 | 1081 | SMC_SET_MAC_CR(lp, cr); |
0a0c72c9 | 1082 | rx_overrun=1; |
dcdf8710 | 1083 | DBG(SMC_DEBUG_RX, dev, "RX overrun\n"); |
09f75cd7 JG |
1084 | dev->stats.rx_errors++; |
1085 | dev->stats.rx_fifo_errors++; | |
0a0c72c9 | 1086 | } |
699559f8 | 1087 | SMC_ACK_INT(lp, INT_STS_RDFO_); |
0a0c72c9 DM |
1088 | } |
1089 | /* Handle receive condition */ | |
1090 | if ((status & INT_STS_RSFL_) || rx_overrun) { | |
1091 | unsigned int fifo; | |
dcdf8710 | 1092 | DBG(SMC_DEBUG_RX, dev, "RX irq\n"); |
699559f8 | 1093 | fifo = SMC_GET_RX_FIFO_INF(lp); |
d5498bef | 1094 | pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16; |
dcdf8710 BB |
1095 | DBG(SMC_DEBUG_RX, dev, "Rx FIFO pkts %d, bytes %d\n", |
1096 | pkts, fifo & 0xFFFF); | |
0a0c72c9 DM |
1097 | if (pkts != 0) { |
1098 | #ifdef SMC_USE_DMA | |
1099 | unsigned int fifo; | |
1100 | if (lp->rxdma_active){ | |
dcdf8710 BB |
1101 | DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev, |
1102 | "RX DMA active\n"); | |
0a0c72c9 | 1103 | /* The DMA is already running so up the IRQ threshold */ |
699559f8 | 1104 | fifo = SMC_GET_FIFO_INT(lp) & ~0xFF; |
0a0c72c9 | 1105 | fifo |= pkts & 0xFF; |
dcdf8710 BB |
1106 | DBG(SMC_DEBUG_RX, dev, |
1107 | "Setting RX stat FIFO threshold to %d\n", | |
1108 | fifo & 0xff); | |
699559f8 | 1109 | SMC_SET_FIFO_INT(lp, fifo); |
0a0c72c9 DM |
1110 | } else |
1111 | #endif | |
1112 | smc911x_rcv(dev); | |
1113 | } | |
699559f8 | 1114 | SMC_ACK_INT(lp, INT_STS_RSFL_); |
0a0c72c9 DM |
1115 | } |
1116 | /* Handle transmit FIFO available */ | |
1117 | if (status & INT_STS_TDFA_) { | |
dcdf8710 | 1118 | DBG(SMC_DEBUG_TX, dev, "TX data FIFO space available irq\n"); |
699559f8 | 1119 | SMC_SET_FIFO_TDA(lp, 0xFF); |
0a0c72c9 DM |
1120 | lp->tx_throttle = 0; |
1121 | #ifdef SMC_USE_DMA | |
1122 | if (!lp->txdma_active) | |
1123 | #endif | |
1124 | netif_wake_queue(dev); | |
699559f8 | 1125 | SMC_ACK_INT(lp, INT_STS_TDFA_); |
0a0c72c9 DM |
1126 | } |
1127 | /* Handle transmit done condition */ | |
1128 | #if 1 | |
1129 | if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) { | |
dcdf8710 BB |
1130 | DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC, dev, |
1131 | "Tx stat FIFO limit (%d) /GPT irq\n", | |
1132 | (SMC_GET_FIFO_INT(lp) & 0x00ff0000) >> 16); | |
0a0c72c9 | 1133 | smc911x_tx(dev); |
699559f8 MD |
1134 | SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000); |
1135 | SMC_ACK_INT(lp, INT_STS_TSFL_); | |
1136 | SMC_ACK_INT(lp, INT_STS_TSFL_ | INT_STS_GPT_INT_); | |
0a0c72c9 DM |
1137 | } |
1138 | #else | |
1139 | if (status & INT_STS_TSFL_) { | |
dcdf8710 | 1140 | DBG(SMC_DEBUG_TX, dev, "TX status FIFO limit (%d) irq\n", ?); |
0a0c72c9 | 1141 | smc911x_tx(dev); |
699559f8 | 1142 | SMC_ACK_INT(lp, INT_STS_TSFL_); |
0a0c72c9 DM |
1143 | } |
1144 | ||
1145 | if (status & INT_STS_GPT_INT_) { | |
dcdf8710 BB |
1146 | DBG(SMC_DEBUG_RX, dev, "IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n", |
1147 | SMC_GET_IRQ_CFG(lp), | |
1148 | SMC_GET_FIFO_INT(lp), | |
1149 | SMC_GET_RX_CFG(lp)); | |
1150 | DBG(SMC_DEBUG_RX, dev, "Rx Stat FIFO Used 0x%02x Data FIFO Used 0x%04x Stat FIFO 0x%08x\n", | |
1151 | (SMC_GET_RX_FIFO_INF(lp) & 0x00ff0000) >> 16, | |
1152 | SMC_GET_RX_FIFO_INF(lp) & 0xffff, | |
1153 | SMC_GET_RX_STS_FIFO_PEEK(lp)); | |
699559f8 MD |
1154 | SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000); |
1155 | SMC_ACK_INT(lp, INT_STS_GPT_INT_); | |
0a0c72c9 DM |
1156 | } |
1157 | #endif | |
1158 | ||
3a4fa0a2 | 1159 | /* Handle PHY interrupt condition */ |
0a0c72c9 | 1160 | if (status & INT_STS_PHY_INT_) { |
dcdf8710 | 1161 | DBG(SMC_DEBUG_MISC, dev, "PHY irq\n"); |
0a0c72c9 | 1162 | smc911x_phy_interrupt(dev); |
699559f8 | 1163 | SMC_ACK_INT(lp, INT_STS_PHY_INT_); |
0a0c72c9 DM |
1164 | } |
1165 | } while (--timeout); | |
1166 | ||
1167 | /* restore mask state */ | |
699559f8 | 1168 | SMC_SET_INT_EN(lp, mask); |
0a0c72c9 | 1169 | |
dcdf8710 BB |
1170 | DBG(SMC_DEBUG_MISC, dev, "Interrupt done (%d loops)\n", |
1171 | 8-timeout); | |
0a0c72c9 DM |
1172 | |
1173 | spin_unlock_irqrestore(&lp->lock, flags); | |
1174 | ||
0a0c72c9 DM |
1175 | return IRQ_HANDLED; |
1176 | } | |
1177 | ||
1178 | #ifdef SMC_USE_DMA | |
1179 | static void | |
79d3b59a | 1180 | smc911x_tx_dma_irq(void *data) |
0a0c72c9 | 1181 | { |
79d3b59a RJ |
1182 | struct smc911x_local *lp = data; |
1183 | struct net_device *dev = lp->netdev; | |
0a0c72c9 DM |
1184 | struct sk_buff *skb = lp->current_tx_skb; |
1185 | unsigned long flags; | |
1186 | ||
dcdf8710 | 1187 | DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__); |
0a0c72c9 | 1188 | |
dcdf8710 | 1189 | DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, "TX DMA irq handler\n"); |
0a0c72c9 | 1190 | BUG_ON(skb == NULL); |
0eb1645a | 1191 | dma_unmap_single(lp->dev, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE); |
860e9538 | 1192 | netif_trans_update(dev); |
0a0c72c9 DM |
1193 | dev_kfree_skb_irq(skb); |
1194 | lp->current_tx_skb = NULL; | |
1195 | if (lp->pending_tx_skb != NULL) | |
1196 | smc911x_hardware_send_pkt(dev); | |
1197 | else { | |
dcdf8710 BB |
1198 | DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, |
1199 | "No pending Tx packets. DMA disabled\n"); | |
0a0c72c9 DM |
1200 | spin_lock_irqsave(&lp->lock, flags); |
1201 | lp->txdma_active = 0; | |
1202 | if (!lp->tx_throttle) { | |
1203 | netif_wake_queue(dev); | |
1204 | } | |
1205 | spin_unlock_irqrestore(&lp->lock, flags); | |
1206 | } | |
1207 | ||
dcdf8710 BB |
1208 | DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, dev, |
1209 | "TX DMA irq completed\n"); | |
0a0c72c9 DM |
1210 | } |
1211 | static void | |
79d3b59a | 1212 | smc911x_rx_dma_irq(void *data) |
0a0c72c9 | 1213 | { |
79d3b59a RJ |
1214 | struct smc911x_local *lp = data; |
1215 | struct net_device *dev = lp->netdev; | |
0a0c72c9 DM |
1216 | struct sk_buff *skb = lp->current_rx_skb; |
1217 | unsigned long flags; | |
1218 | unsigned int pkts; | |
1219 | ||
dcdf8710 BB |
1220 | DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__); |
1221 | DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev, "RX DMA irq handler\n"); | |
0eb1645a | 1222 | dma_unmap_single(lp->dev, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE); |
0a0c72c9 DM |
1223 | BUG_ON(skb == NULL); |
1224 | lp->current_rx_skb = NULL; | |
1225 | PRINT_PKT(skb->data, skb->len); | |
0a0c72c9 | 1226 | skb->protocol = eth_type_trans(skb, dev); |
09f75cd7 JG |
1227 | dev->stats.rx_packets++; |
1228 | dev->stats.rx_bytes += skb->len; | |
d30f53ae | 1229 | netif_rx(skb); |
0a0c72c9 DM |
1230 | |
1231 | spin_lock_irqsave(&lp->lock, flags); | |
d766a4ed | 1232 | pkts = (SMC_GET_RX_FIFO_INF(lp) & RX_FIFO_INF_RXSUSED_) >> 16; |
0a0c72c9 DM |
1233 | if (pkts != 0) { |
1234 | smc911x_rcv(dev); | |
1235 | }else { | |
1236 | lp->rxdma_active = 0; | |
1237 | } | |
1238 | spin_unlock_irqrestore(&lp->lock, flags); | |
dcdf8710 BB |
1239 | DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, dev, |
1240 | "RX DMA irq completed. DMA RX FIFO PKTS %d\n", | |
1241 | pkts); | |
0a0c72c9 DM |
1242 | } |
1243 | #endif /* SMC_USE_DMA */ | |
1244 | ||
1245 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
1246 | /* | |
1247 | * Polling receive - used by netconsole and other diagnostic tools | |
1248 | * to allow network i/o with interrupts disabled. | |
1249 | */ | |
1250 | static void smc911x_poll_controller(struct net_device *dev) | |
1251 | { | |
1252 | disable_irq(dev->irq); | |
9b6d2efe | 1253 | smc911x_interrupt(dev->irq, dev); |
0a0c72c9 DM |
1254 | enable_irq(dev->irq); |
1255 | } | |
1256 | #endif | |
1257 | ||
1258 | /* Our watchdog timed out. Called by the networking layer */ | |
1259 | static void smc911x_timeout(struct net_device *dev) | |
1260 | { | |
1261 | struct smc911x_local *lp = netdev_priv(dev); | |
0a0c72c9 DM |
1262 | int status, mask; |
1263 | unsigned long flags; | |
1264 | ||
dcdf8710 | 1265 | DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__); |
0a0c72c9 DM |
1266 | |
1267 | spin_lock_irqsave(&lp->lock, flags); | |
699559f8 MD |
1268 | status = SMC_GET_INT(lp); |
1269 | mask = SMC_GET_INT_EN(lp); | |
0a0c72c9 | 1270 | spin_unlock_irqrestore(&lp->lock, flags); |
dcdf8710 BB |
1271 | DBG(SMC_DEBUG_MISC, dev, "INT 0x%02x MASK 0x%02x\n", |
1272 | status, mask); | |
0a0c72c9 DM |
1273 | |
1274 | /* Dump the current TX FIFO contents and restart */ | |
699559f8 MD |
1275 | mask = SMC_GET_TX_CFG(lp); |
1276 | SMC_SET_TX_CFG(lp, mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_); | |
0a0c72c9 DM |
1277 | /* |
1278 | * Reconfiguring the PHY doesn't seem like a bad idea here, but | |
1279 | * smc911x_phy_configure() calls msleep() which calls schedule_timeout() | |
1280 | * which calls schedule(). Hence we use a work queue. | |
1281 | */ | |
4bb073c0 DM |
1282 | if (lp->phy_type != 0) |
1283 | schedule_work(&lp->phy_configure); | |
0a0c72c9 DM |
1284 | |
1285 | /* We can accept TX packets again */ | |
860e9538 | 1286 | netif_trans_update(dev); /* prevent tx timeout */ |
0a0c72c9 DM |
1287 | netif_wake_queue(dev); |
1288 | } | |
1289 | ||
1290 | /* | |
1291 | * This routine will, depending on the values passed to it, | |
1292 | * either make it accept multicast packets, go into | |
1293 | * promiscuous mode (for TCPDUMP and cousins) or accept | |
1294 | * a select set of multicast packets | |
1295 | */ | |
1296 | static void smc911x_set_multicast_list(struct net_device *dev) | |
1297 | { | |
1298 | struct smc911x_local *lp = netdev_priv(dev); | |
0a0c72c9 DM |
1299 | unsigned int multicast_table[2]; |
1300 | unsigned int mcr, update_multicast = 0; | |
1301 | unsigned long flags; | |
0a0c72c9 | 1302 | |
dcdf8710 | 1303 | DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__); |
0a0c72c9 DM |
1304 | |
1305 | spin_lock_irqsave(&lp->lock, flags); | |
699559f8 | 1306 | SMC_GET_MAC_CR(lp, mcr); |
0a0c72c9 DM |
1307 | spin_unlock_irqrestore(&lp->lock, flags); |
1308 | ||
1309 | if (dev->flags & IFF_PROMISC) { | |
1310 | ||
dcdf8710 | 1311 | DBG(SMC_DEBUG_MISC, dev, "RCR_PRMS\n"); |
0a0c72c9 DM |
1312 | mcr |= MAC_CR_PRMS_; |
1313 | } | |
1314 | /* | |
1315 | * Here, I am setting this to accept all multicast packets. | |
1316 | * I don't need to zero the multicast table, because the flag is | |
1317 | * checked before the table is | |
1318 | */ | |
4cd24eaf | 1319 | else if (dev->flags & IFF_ALLMULTI || netdev_mc_count(dev) > 16) { |
dcdf8710 | 1320 | DBG(SMC_DEBUG_MISC, dev, "RCR_ALMUL\n"); |
0a0c72c9 DM |
1321 | mcr |= MAC_CR_MCPAS_; |
1322 | } | |
1323 | ||
1324 | /* | |
1325 | * This sets the internal hardware table to filter out unwanted | |
1326 | * multicast packets before they take up memory. | |
1327 | * | |
1328 | * The SMC chip uses a hash table where the high 6 bits of the CRC of | |
1329 | * address are the offset into the table. If that bit is 1, then the | |
1330 | * multicast packet is accepted. Otherwise, it's dropped silently. | |
1331 | * | |
1332 | * To use the 6 bits as an offset into the table, the high 1 bit is | |
1333 | * the number of the 32 bit register, while the low 5 bits are the bit | |
1334 | * within that register. | |
1335 | */ | |
4cd24eaf | 1336 | else if (!netdev_mc_empty(dev)) { |
22bedad3 | 1337 | struct netdev_hw_addr *ha; |
0a0c72c9 DM |
1338 | |
1339 | /* Set the Hash perfec mode */ | |
1340 | mcr |= MAC_CR_HPFILT_; | |
1341 | ||
1342 | /* start with a table of all zeros: reject all */ | |
1343 | memset(multicast_table, 0, sizeof(multicast_table)); | |
1344 | ||
22bedad3 | 1345 | netdev_for_each_mc_addr(ha, dev) { |
7b31f7ff | 1346 | u32 position; |
0a0c72c9 | 1347 | |
7b31f7ff | 1348 | /* upper 6 bits are used as hash index */ |
22bedad3 | 1349 | position = ether_crc(ETH_ALEN, ha->addr)>>26; |
0a0c72c9 | 1350 | |
7b31f7ff | 1351 | multicast_table[position>>5] |= 1 << (position&0x1f); |
0a0c72c9 DM |
1352 | } |
1353 | ||
1354 | /* be sure I get rid of flags I might have set */ | |
1355 | mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_); | |
1356 | ||
1357 | /* now, the table can be loaded into the chipset */ | |
1358 | update_multicast = 1; | |
1359 | } else { | |
dcdf8710 | 1360 | DBG(SMC_DEBUG_MISC, dev, "~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n"); |
0a0c72c9 DM |
1361 | mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_); |
1362 | ||
1363 | /* | |
1364 | * since I'm disabling all multicast entirely, I need to | |
1365 | * clear the multicast list | |
1366 | */ | |
1367 | memset(multicast_table, 0, sizeof(multicast_table)); | |
1368 | update_multicast = 1; | |
1369 | } | |
1370 | ||
1371 | spin_lock_irqsave(&lp->lock, flags); | |
699559f8 | 1372 | SMC_SET_MAC_CR(lp, mcr); |
0a0c72c9 | 1373 | if (update_multicast) { |
dcdf8710 BB |
1374 | DBG(SMC_DEBUG_MISC, dev, |
1375 | "update mcast hash table 0x%08x 0x%08x\n", | |
1376 | multicast_table[0], multicast_table[1]); | |
699559f8 MD |
1377 | SMC_SET_HASHL(lp, multicast_table[0]); |
1378 | SMC_SET_HASHH(lp, multicast_table[1]); | |
0a0c72c9 DM |
1379 | } |
1380 | spin_unlock_irqrestore(&lp->lock, flags); | |
1381 | } | |
1382 | ||
1383 | ||
1384 | /* | |
1385 | * Open and Initialize the board | |
1386 | * | |
1387 | * Set up everything, reset the card, etc.. | |
1388 | */ | |
1389 | static int | |
1390 | smc911x_open(struct net_device *dev) | |
1391 | { | |
ef8142a5 AM |
1392 | struct smc911x_local *lp = netdev_priv(dev); |
1393 | ||
dcdf8710 | 1394 | DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__); |
0a0c72c9 | 1395 | |
0a0c72c9 DM |
1396 | /* reset the hardware */ |
1397 | smc911x_reset(dev); | |
1398 | ||
1399 | /* Configure the PHY, initialize the link state */ | |
ef8142a5 | 1400 | smc911x_phy_configure(&lp->phy_configure); |
0a0c72c9 DM |
1401 | |
1402 | /* Turn on Tx + Rx */ | |
1403 | smc911x_enable(dev); | |
1404 | ||
1405 | netif_start_queue(dev); | |
1406 | ||
1407 | return 0; | |
1408 | } | |
1409 | ||
1410 | /* | |
1411 | * smc911x_close | |
1412 | * | |
1413 | * this makes the board clean up everything that it can | |
1414 | * and not talk to the outside world. Caused by | |
1415 | * an 'ifconfig ethX down' | |
1416 | */ | |
1417 | static int smc911x_close(struct net_device *dev) | |
1418 | { | |
1419 | struct smc911x_local *lp = netdev_priv(dev); | |
1420 | ||
dcdf8710 | 1421 | DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__); |
0a0c72c9 DM |
1422 | |
1423 | netif_stop_queue(dev); | |
1424 | netif_carrier_off(dev); | |
1425 | ||
1426 | /* clear everything */ | |
1427 | smc911x_shutdown(dev); | |
1428 | ||
1429 | if (lp->phy_type != 0) { | |
1430 | /* We need to ensure that no calls to | |
1431 | * smc911x_phy_configure are pending. | |
0a0c72c9 | 1432 | */ |
4bb073c0 | 1433 | cancel_work_sync(&lp->phy_configure); |
0a0c72c9 DM |
1434 | smc911x_phy_powerdown(dev, lp->mii.phy_id); |
1435 | } | |
1436 | ||
1437 | if (lp->pending_tx_skb) { | |
1438 | dev_kfree_skb(lp->pending_tx_skb); | |
1439 | lp->pending_tx_skb = NULL; | |
1440 | } | |
1441 | ||
1442 | return 0; | |
1443 | } | |
1444 | ||
0a0c72c9 DM |
1445 | /* |
1446 | * Ethtool support | |
1447 | */ | |
1448 | static int | |
9e0b516a PR |
1449 | smc911x_ethtool_get_link_ksettings(struct net_device *dev, |
1450 | struct ethtool_link_ksettings *cmd) | |
0a0c72c9 DM |
1451 | { |
1452 | struct smc911x_local *lp = netdev_priv(dev); | |
82c01a84 | 1453 | int status; |
0a0c72c9 | 1454 | unsigned long flags; |
9e0b516a | 1455 | u32 supported; |
0a0c72c9 | 1456 | |
dcdf8710 | 1457 | DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__); |
0a0c72c9 DM |
1458 | |
1459 | if (lp->phy_type != 0) { | |
1460 | spin_lock_irqsave(&lp->lock, flags); | |
82c01a84 | 1461 | mii_ethtool_get_link_ksettings(&lp->mii, cmd); |
0a0c72c9 DM |
1462 | spin_unlock_irqrestore(&lp->lock, flags); |
1463 | } else { | |
9e0b516a | 1464 | supported = SUPPORTED_10baseT_Half | |
0a0c72c9 DM |
1465 | SUPPORTED_10baseT_Full | |
1466 | SUPPORTED_TP | SUPPORTED_AUI; | |
1467 | ||
1468 | if (lp->ctl_rspeed == 10) | |
9e0b516a | 1469 | cmd->base.speed = SPEED_10; |
0a0c72c9 | 1470 | else if (lp->ctl_rspeed == 100) |
9e0b516a PR |
1471 | cmd->base.speed = SPEED_100; |
1472 | ||
1473 | cmd->base.autoneg = AUTONEG_DISABLE; | |
1474 | cmd->base.port = 0; | |
699559f8 | 1475 | SMC_GET_PHY_SPECIAL(lp, lp->mii.phy_id, status); |
9e0b516a | 1476 | cmd->base.duplex = |
d5498bef | 1477 | (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ? |
0a0c72c9 | 1478 | DUPLEX_FULL : DUPLEX_HALF; |
9e0b516a PR |
1479 | |
1480 | ethtool_convert_legacy_u32_to_link_mode( | |
1481 | cmd->link_modes.supported, supported); | |
1482 | ||
0a0c72c9 DM |
1483 | } |
1484 | ||
82c01a84 | 1485 | return 0; |
0a0c72c9 DM |
1486 | } |
1487 | ||
1488 | static int | |
9e0b516a PR |
1489 | smc911x_ethtool_set_link_ksettings(struct net_device *dev, |
1490 | const struct ethtool_link_ksettings *cmd) | |
0a0c72c9 DM |
1491 | { |
1492 | struct smc911x_local *lp = netdev_priv(dev); | |
1493 | int ret; | |
1494 | unsigned long flags; | |
1495 | ||
1496 | if (lp->phy_type != 0) { | |
1497 | spin_lock_irqsave(&lp->lock, flags); | |
9e0b516a | 1498 | ret = mii_ethtool_set_link_ksettings(&lp->mii, cmd); |
0a0c72c9 DM |
1499 | spin_unlock_irqrestore(&lp->lock, flags); |
1500 | } else { | |
9e0b516a PR |
1501 | if (cmd->base.autoneg != AUTONEG_DISABLE || |
1502 | cmd->base.speed != SPEED_10 || | |
1503 | (cmd->base.duplex != DUPLEX_HALF && | |
1504 | cmd->base.duplex != DUPLEX_FULL) || | |
1505 | (cmd->base.port != PORT_TP && | |
1506 | cmd->base.port != PORT_AUI)) | |
0a0c72c9 DM |
1507 | return -EINVAL; |
1508 | ||
9e0b516a | 1509 | lp->ctl_rfduplx = cmd->base.duplex == DUPLEX_FULL; |
0a0c72c9 DM |
1510 | |
1511 | ret = 0; | |
1512 | } | |
1513 | ||
1514 | return ret; | |
1515 | } | |
1516 | ||
1517 | static void | |
1518 | smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info) | |
1519 | { | |
7826d43f JP |
1520 | strlcpy(info->driver, CARDNAME, sizeof(info->driver)); |
1521 | strlcpy(info->version, version, sizeof(info->version)); | |
1522 | strlcpy(info->bus_info, dev_name(dev->dev.parent), | |
1523 | sizeof(info->bus_info)); | |
0a0c72c9 DM |
1524 | } |
1525 | ||
1526 | static int smc911x_ethtool_nwayreset(struct net_device *dev) | |
1527 | { | |
1528 | struct smc911x_local *lp = netdev_priv(dev); | |
1529 | int ret = -EINVAL; | |
1530 | unsigned long flags; | |
1531 | ||
1532 | if (lp->phy_type != 0) { | |
1533 | spin_lock_irqsave(&lp->lock, flags); | |
1534 | ret = mii_nway_restart(&lp->mii); | |
1535 | spin_unlock_irqrestore(&lp->lock, flags); | |
1536 | } | |
1537 | ||
1538 | return ret; | |
1539 | } | |
1540 | ||
1541 | static u32 smc911x_ethtool_getmsglevel(struct net_device *dev) | |
1542 | { | |
1543 | struct smc911x_local *lp = netdev_priv(dev); | |
1544 | return lp->msg_enable; | |
1545 | } | |
1546 | ||
1547 | static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level) | |
1548 | { | |
1549 | struct smc911x_local *lp = netdev_priv(dev); | |
1550 | lp->msg_enable = level; | |
1551 | } | |
1552 | ||
1553 | static int smc911x_ethtool_getregslen(struct net_device *dev) | |
1554 | { | |
1555 | /* System regs + MAC regs + PHY regs */ | |
d5498bef JG |
1556 | return (((E2P_CMD - ID_REV)/4 + 1) + |
1557 | (WUCSR - MAC_CR)+1 + 32) * sizeof(u32); | |
0a0c72c9 DM |
1558 | } |
1559 | ||
d5498bef | 1560 | static void smc911x_ethtool_getregs(struct net_device *dev, |
0a0c72c9 DM |
1561 | struct ethtool_regs* regs, void *buf) |
1562 | { | |
0a0c72c9 DM |
1563 | struct smc911x_local *lp = netdev_priv(dev); |
1564 | unsigned long flags; | |
1565 | u32 reg,i,j=0; | |
1566 | u32 *data = (u32*)buf; | |
1567 | ||
1568 | regs->version = lp->version; | |
1569 | for(i=ID_REV;i<=E2P_CMD;i+=4) { | |
699559f8 | 1570 | data[j++] = SMC_inl(lp, i); |
0a0c72c9 DM |
1571 | } |
1572 | for(i=MAC_CR;i<=WUCSR;i++) { | |
1573 | spin_lock_irqsave(&lp->lock, flags); | |
699559f8 | 1574 | SMC_GET_MAC_CSR(lp, i, reg); |
0a0c72c9 | 1575 | spin_unlock_irqrestore(&lp->lock, flags); |
d5498bef | 1576 | data[j++] = reg; |
0a0c72c9 DM |
1577 | } |
1578 | for(i=0;i<=31;i++) { | |
1579 | spin_lock_irqsave(&lp->lock, flags); | |
699559f8 | 1580 | SMC_GET_MII(lp, i, lp->mii.phy_id, reg); |
0a0c72c9 | 1581 | spin_unlock_irqrestore(&lp->lock, flags); |
d5498bef | 1582 | data[j++] = reg & 0xFFFF; |
0a0c72c9 DM |
1583 | } |
1584 | } | |
1585 | ||
1586 | static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev) | |
1587 | { | |
699559f8 | 1588 | struct smc911x_local *lp = netdev_priv(dev); |
0a0c72c9 DM |
1589 | unsigned int timeout; |
1590 | int e2p_cmd; | |
1591 | ||
699559f8 | 1592 | e2p_cmd = SMC_GET_E2P_CMD(lp); |
0a0c72c9 DM |
1593 | for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) { |
1594 | if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) { | |
dcdf8710 BB |
1595 | PRINTK(dev, "%s timeout waiting for EEPROM to respond\n", |
1596 | __func__); | |
0a0c72c9 | 1597 | return -EFAULT; |
d5498bef | 1598 | } |
0a0c72c9 | 1599 | mdelay(1); |
699559f8 | 1600 | e2p_cmd = SMC_GET_E2P_CMD(lp); |
0a0c72c9 DM |
1601 | } |
1602 | if (timeout == 0) { | |
dcdf8710 BB |
1603 | PRINTK(dev, "%s timeout waiting for EEPROM CMD not busy\n", |
1604 | __func__); | |
0a0c72c9 DM |
1605 | return -ETIMEDOUT; |
1606 | } | |
1607 | return 0; | |
1608 | } | |
1609 | ||
d5498bef | 1610 | static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev, |
0a0c72c9 DM |
1611 | int cmd, int addr) |
1612 | { | |
699559f8 | 1613 | struct smc911x_local *lp = netdev_priv(dev); |
0a0c72c9 DM |
1614 | int ret; |
1615 | ||
d5498bef | 1616 | if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0) |
0a0c72c9 | 1617 | return ret; |
699559f8 | 1618 | SMC_SET_E2P_CMD(lp, E2P_CMD_EPC_BUSY_ | |
d5498bef | 1619 | ((cmd) & (0x7<<28)) | |
0a0c72c9 DM |
1620 | ((addr) & 0xFF)); |
1621 | return 0; | |
1622 | } | |
1623 | ||
d5498bef | 1624 | static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev, |
0a0c72c9 DM |
1625 | u8 *data) |
1626 | { | |
699559f8 | 1627 | struct smc911x_local *lp = netdev_priv(dev); |
0a0c72c9 DM |
1628 | int ret; |
1629 | ||
d5498bef | 1630 | if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0) |
0a0c72c9 | 1631 | return ret; |
699559f8 | 1632 | *data = SMC_GET_E2P_DATA(lp); |
0a0c72c9 DM |
1633 | return 0; |
1634 | } | |
1635 | ||
d5498bef | 1636 | static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev, |
0a0c72c9 DM |
1637 | u8 data) |
1638 | { | |
699559f8 | 1639 | struct smc911x_local *lp = netdev_priv(dev); |
0a0c72c9 DM |
1640 | int ret; |
1641 | ||
d5498bef | 1642 | if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0) |
0a0c72c9 | 1643 | return ret; |
699559f8 | 1644 | SMC_SET_E2P_DATA(lp, data); |
0a0c72c9 DM |
1645 | return 0; |
1646 | } | |
1647 | ||
d5498bef | 1648 | static int smc911x_ethtool_geteeprom(struct net_device *dev, |
0a0c72c9 DM |
1649 | struct ethtool_eeprom *eeprom, u8 *data) |
1650 | { | |
1651 | u8 eebuf[SMC911X_EEPROM_LEN]; | |
1652 | int i, ret; | |
1653 | ||
1654 | for(i=0;i<SMC911X_EEPROM_LEN;i++) { | |
1655 | if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0) | |
1656 | return ret; | |
1657 | if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0) | |
1658 | return ret; | |
1659 | } | |
1660 | memcpy(data, eebuf+eeprom->offset, eeprom->len); | |
d5498bef | 1661 | return 0; |
0a0c72c9 DM |
1662 | } |
1663 | ||
d5498bef | 1664 | static int smc911x_ethtool_seteeprom(struct net_device *dev, |
0a0c72c9 DM |
1665 | struct ethtool_eeprom *eeprom, u8 *data) |
1666 | { | |
1667 | int i, ret; | |
1668 | ||
1669 | /* Enable erase */ | |
1670 | if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0) | |
1671 | return ret; | |
1672 | for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) { | |
1673 | /* erase byte */ | |
1674 | if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0) | |
1675 | return ret; | |
1676 | /* write byte */ | |
1677 | if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0) | |
1678 | return ret; | |
1679 | if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0) | |
1680 | return ret; | |
1681 | } | |
1682 | return 0; | |
1683 | } | |
1684 | ||
1685 | static int smc911x_ethtool_geteeprom_len(struct net_device *dev) | |
1686 | { | |
1687 | return SMC911X_EEPROM_LEN; | |
1688 | } | |
1689 | ||
7282d491 | 1690 | static const struct ethtool_ops smc911x_ethtool_ops = { |
0a0c72c9 DM |
1691 | .get_drvinfo = smc911x_ethtool_getdrvinfo, |
1692 | .get_msglevel = smc911x_ethtool_getmsglevel, | |
1693 | .set_msglevel = smc911x_ethtool_setmsglevel, | |
1694 | .nway_reset = smc911x_ethtool_nwayreset, | |
1695 | .get_link = ethtool_op_get_link, | |
1696 | .get_regs_len = smc911x_ethtool_getregslen, | |
1697 | .get_regs = smc911x_ethtool_getregs, | |
1698 | .get_eeprom_len = smc911x_ethtool_geteeprom_len, | |
1699 | .get_eeprom = smc911x_ethtool_geteeprom, | |
1700 | .set_eeprom = smc911x_ethtool_seteeprom, | |
9e0b516a PR |
1701 | .get_link_ksettings = smc911x_ethtool_get_link_ksettings, |
1702 | .set_link_ksettings = smc911x_ethtool_set_link_ksettings, | |
0a0c72c9 DM |
1703 | }; |
1704 | ||
1705 | /* | |
1706 | * smc911x_findirq | |
1707 | * | |
1708 | * This routine has a simple purpose -- make the SMC chip generate an | |
1709 | * interrupt, so an auto-detect routine can detect it, and find the IRQ, | |
1710 | */ | |
9f1e13db | 1711 | static int smc911x_findirq(struct net_device *dev) |
0a0c72c9 | 1712 | { |
699559f8 | 1713 | struct smc911x_local *lp = netdev_priv(dev); |
0a0c72c9 DM |
1714 | int timeout = 20; |
1715 | unsigned long cookie; | |
1716 | ||
dcdf8710 | 1717 | DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__); |
0a0c72c9 DM |
1718 | |
1719 | cookie = probe_irq_on(); | |
1720 | ||
1721 | /* | |
1722 | * Force a SW interrupt | |
1723 | */ | |
1724 | ||
699559f8 | 1725 | SMC_SET_INT_EN(lp, INT_EN_SW_INT_EN_); |
0a0c72c9 DM |
1726 | |
1727 | /* | |
1728 | * Wait until positive that the interrupt has been generated | |
1729 | */ | |
1730 | do { | |
1731 | int int_status; | |
1732 | udelay(10); | |
699559f8 | 1733 | int_status = SMC_GET_INT_EN(lp); |
0a0c72c9 DM |
1734 | if (int_status & INT_EN_SW_INT_EN_) |
1735 | break; /* got the interrupt */ | |
1736 | } while (--timeout); | |
1737 | ||
1738 | /* | |
1739 | * there is really nothing that I can do here if timeout fails, | |
1740 | * as autoirq_report will return a 0 anyway, which is what I | |
1741 | * want in this case. Plus, the clean up is needed in both | |
1742 | * cases. | |
1743 | */ | |
1744 | ||
1745 | /* and disable all interrupts again */ | |
699559f8 | 1746 | SMC_SET_INT_EN(lp, 0); |
0a0c72c9 DM |
1747 | |
1748 | /* and return what I found */ | |
1749 | return probe_irq_off(cookie); | |
1750 | } | |
1751 | ||
ec4e0cff AB |
1752 | static const struct net_device_ops smc911x_netdev_ops = { |
1753 | .ndo_open = smc911x_open, | |
1754 | .ndo_stop = smc911x_close, | |
1755 | .ndo_start_xmit = smc911x_hard_start_xmit, | |
1756 | .ndo_tx_timeout = smc911x_timeout, | |
afc4b13d | 1757 | .ndo_set_rx_mode = smc911x_set_multicast_list, |
ec4e0cff AB |
1758 | .ndo_validate_addr = eth_validate_addr, |
1759 | .ndo_set_mac_address = eth_mac_addr, | |
1760 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
1761 | .ndo_poll_controller = smc911x_poll_controller, | |
1762 | #endif | |
1763 | }; | |
1764 | ||
0a0c72c9 DM |
1765 | /* |
1766 | * Function: smc911x_probe(unsigned long ioaddr) | |
1767 | * | |
1768 | * Purpose: | |
1769 | * Tests to see if a given ioaddr points to an SMC911x chip. | |
1770 | * Returns a 0 on success | |
1771 | * | |
1772 | * Algorithm: | |
1773 | * (1) see if the endian word is OK | |
1774 | * (1) see if I recognize the chip ID in the appropriate register | |
1775 | * | |
1776 | * Here I do typical initialization tasks. | |
1777 | * | |
1778 | * o Initialize the structure if needed | |
1779 | * o print out my vanity message if not done so already | |
1780 | * o print out what type of hardware is detected | |
1781 | * o print out the ethernet address | |
1782 | * o find the IRQ | |
1783 | * o set up my private data | |
1784 | * o configure the dev structure with my subroutines | |
1785 | * o actually GRAB the irq. | |
1786 | * o GRAB the region | |
1787 | */ | |
9f1e13db | 1788 | static int smc911x_probe(struct net_device *dev) |
0a0c72c9 DM |
1789 | { |
1790 | struct smc911x_local *lp = netdev_priv(dev); | |
1791 | int i, retval; | |
1792 | unsigned int val, chip_id, revision; | |
1793 | const char *version_string; | |
12c03f59 | 1794 | unsigned long irq_flags; |
abc34d75 | 1795 | #ifdef SMC_USE_DMA |
79d3b59a RJ |
1796 | struct dma_slave_config config; |
1797 | dma_cap_mask_t mask; | |
abc34d75 | 1798 | #endif |
0a0c72c9 | 1799 | |
dcdf8710 | 1800 | DBG(SMC_DEBUG_FUNC, dev, "--> %s\n", __func__); |
0a0c72c9 DM |
1801 | |
1802 | /* First, see if the endian word is recognized */ | |
699559f8 | 1803 | val = SMC_GET_BYTE_TEST(lp); |
dcdf8710 BB |
1804 | DBG(SMC_DEBUG_MISC, dev, "%s: endian probe returned 0x%04x\n", |
1805 | CARDNAME, val); | |
0a0c72c9 | 1806 | if (val != 0x87654321) { |
dcdf8710 | 1807 | netdev_err(dev, "Invalid chip endian 0x%08x\n", val); |
0a0c72c9 DM |
1808 | retval = -ENODEV; |
1809 | goto err_out; | |
1810 | } | |
1811 | ||
1812 | /* | |
1813 | * check if the revision register is something that I | |
1814 | * recognize. These might need to be added to later, | |
1815 | * as future revisions could be added. | |
1816 | */ | |
699559f8 | 1817 | chip_id = SMC_GET_PN(lp); |
dcdf8710 BB |
1818 | DBG(SMC_DEBUG_MISC, dev, "%s: id probe returned 0x%04x\n", |
1819 | CARDNAME, chip_id); | |
0a0c72c9 DM |
1820 | for(i=0;chip_ids[i].id != 0; i++) { |
1821 | if (chip_ids[i].id == chip_id) break; | |
1822 | } | |
1823 | if (!chip_ids[i].id) { | |
dcdf8710 | 1824 | netdev_err(dev, "Unknown chip ID %04x\n", chip_id); |
0a0c72c9 DM |
1825 | retval = -ENODEV; |
1826 | goto err_out; | |
1827 | } | |
1828 | version_string = chip_ids[i].name; | |
1829 | ||
699559f8 | 1830 | revision = SMC_GET_REV(lp); |
dcdf8710 | 1831 | DBG(SMC_DEBUG_MISC, dev, "%s: revision = 0x%04x\n", CARDNAME, revision); |
0a0c72c9 DM |
1832 | |
1833 | /* At this point I'll assume that the chip is an SMC911x. */ | |
dcdf8710 BB |
1834 | DBG(SMC_DEBUG_MISC, dev, "%s: Found a %s\n", |
1835 | CARDNAME, chip_ids[i].name); | |
0a0c72c9 DM |
1836 | |
1837 | /* Validate the TX FIFO size requested */ | |
1838 | if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) { | |
dcdf8710 BB |
1839 | netdev_err(dev, "Invalid TX FIFO size requested %d\n", |
1840 | tx_fifo_kb); | |
0a0c72c9 DM |
1841 | retval = -EINVAL; |
1842 | goto err_out; | |
1843 | } | |
d5498bef | 1844 | |
0a0c72c9 | 1845 | /* fill in some of the fields */ |
0a0c72c9 DM |
1846 | lp->version = chip_ids[i].id; |
1847 | lp->revision = revision; | |
1848 | lp->tx_fifo_kb = tx_fifo_kb; | |
1849 | /* Reverse calculate the RX FIFO size from the TX */ | |
1850 | lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512; | |
1851 | lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15; | |
1852 | ||
1853 | /* Set the automatic flow control values */ | |
1854 | switch(lp->tx_fifo_kb) { | |
d5498bef | 1855 | /* |
0a0c72c9 DM |
1856 | * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64 |
1857 | * AFC_LO is AFC_HI/2 | |
1858 | * BACK_DUR is about 5uS*(AFC_LO) rounded down | |
1859 | */ | |
1860 | case 2:/* 13440 Rx Data Fifo Size */ | |
1861 | lp->afc_cfg=0x008C46AF;break; | |
1862 | case 3:/* 12480 Rx Data Fifo Size */ | |
1863 | lp->afc_cfg=0x0082419F;break; | |
1864 | case 4:/* 11520 Rx Data Fifo Size */ | |
1865 | lp->afc_cfg=0x00783C9F;break; | |
1866 | case 5:/* 10560 Rx Data Fifo Size */ | |
1867 | lp->afc_cfg=0x006E374F;break; | |
1868 | case 6:/* 9600 Rx Data Fifo Size */ | |
1869 | lp->afc_cfg=0x0064328F;break; | |
1870 | case 7:/* 8640 Rx Data Fifo Size */ | |
1871 | lp->afc_cfg=0x005A2D7F;break; | |
1872 | case 8:/* 7680 Rx Data Fifo Size */ | |
1873 | lp->afc_cfg=0x0050287F;break; | |
1874 | case 9:/* 6720 Rx Data Fifo Size */ | |
1875 | lp->afc_cfg=0x0046236F;break; | |
1876 | case 10:/* 5760 Rx Data Fifo Size */ | |
1877 | lp->afc_cfg=0x003C1E6F;break; | |
1878 | case 11:/* 4800 Rx Data Fifo Size */ | |
1879 | lp->afc_cfg=0x0032195F;break; | |
d5498bef | 1880 | /* |
0a0c72c9 DM |
1881 | * AFC_HI is ~1520 bytes less than RX Data Fifo Size |
1882 | * AFC_LO is AFC_HI/2 | |
1883 | * BACK_DUR is about 5uS*(AFC_LO) rounded down | |
1884 | */ | |
1885 | case 12:/* 3840 Rx Data Fifo Size */ | |
1886 | lp->afc_cfg=0x0024124F;break; | |
1887 | case 13:/* 2880 Rx Data Fifo Size */ | |
1888 | lp->afc_cfg=0x0015073F;break; | |
1889 | case 14:/* 1920 Rx Data Fifo Size */ | |
1890 | lp->afc_cfg=0x0006032F;break; | |
1891 | default: | |
dcdf8710 | 1892 | PRINTK(dev, "ERROR -- no AFC_CFG setting found"); |
0a0c72c9 DM |
1893 | break; |
1894 | } | |
1895 | ||
dcdf8710 BB |
1896 | DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX, dev, |
1897 | "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME, | |
1898 | lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg); | |
0a0c72c9 DM |
1899 | |
1900 | spin_lock_init(&lp->lock); | |
1901 | ||
1902 | /* Get the MAC address */ | |
699559f8 | 1903 | SMC_GET_MAC_ADDR(lp, dev->dev_addr); |
0a0c72c9 DM |
1904 | |
1905 | /* now, reset the chip, and put it into a known state */ | |
1906 | smc911x_reset(dev); | |
1907 | ||
1908 | /* | |
1909 | * If dev->irq is 0, then the device has to be banged on to see | |
1910 | * what the IRQ is. | |
1911 | * | |
1912 | * Specifying an IRQ is done with the assumption that the user knows | |
1913 | * what (s)he is doing. No checking is done!!!! | |
1914 | */ | |
1915 | if (dev->irq < 1) { | |
1916 | int trials; | |
1917 | ||
1918 | trials = 3; | |
1919 | while (trials--) { | |
699559f8 | 1920 | dev->irq = smc911x_findirq(dev); |
0a0c72c9 DM |
1921 | if (dev->irq) |
1922 | break; | |
1923 | /* kick the card and try again */ | |
1924 | smc911x_reset(dev); | |
1925 | } | |
1926 | } | |
1927 | if (dev->irq == 0) { | |
dcdf8710 | 1928 | netdev_warn(dev, "Couldn't autodetect your IRQ. Use irq=xx.\n"); |
0a0c72c9 DM |
1929 | retval = -ENODEV; |
1930 | goto err_out; | |
1931 | } | |
1932 | dev->irq = irq_canonicalize(dev->irq); | |
1933 | ||
ec4e0cff | 1934 | dev->netdev_ops = &smc911x_netdev_ops; |
0a0c72c9 | 1935 | dev->watchdog_timeo = msecs_to_jiffies(watchdog); |
0a0c72c9 | 1936 | dev->ethtool_ops = &smc911x_ethtool_ops; |
0a0c72c9 | 1937 | |
ef8142a5 | 1938 | INIT_WORK(&lp->phy_configure, smc911x_phy_configure); |
0a0c72c9 DM |
1939 | lp->mii.phy_id_mask = 0x1f; |
1940 | lp->mii.reg_num_mask = 0x1f; | |
1941 | lp->mii.force_media = 0; | |
1942 | lp->mii.full_duplex = 0; | |
1943 | lp->mii.dev = dev; | |
1944 | lp->mii.mdio_read = smc911x_phy_read; | |
1945 | lp->mii.mdio_write = smc911x_phy_write; | |
1946 | ||
1947 | /* | |
1948 | * Locate the phy, if any. | |
1949 | */ | |
1950 | smc911x_phy_detect(dev); | |
1951 | ||
1952 | /* Set default parameters */ | |
1953 | lp->msg_enable = NETIF_MSG_LINK; | |
1954 | lp->ctl_rfduplx = 1; | |
1955 | lp->ctl_rspeed = 100; | |
1956 | ||
12c03f59 MD |
1957 | #ifdef SMC_DYNAMIC_BUS_CONFIG |
1958 | irq_flags = lp->cfg.irq_flags; | |
1959 | #else | |
1960 | irq_flags = IRQF_SHARED | SMC_IRQ_SENSE; | |
1961 | #endif | |
1962 | ||
0a0c72c9 | 1963 | /* Grab the IRQ */ |
a0607fd3 | 1964 | retval = request_irq(dev->irq, smc911x_interrupt, |
12c03f59 | 1965 | irq_flags, dev->name, dev); |
0a0c72c9 DM |
1966 | if (retval) |
1967 | goto err_out; | |
1968 | ||
0a0c72c9 | 1969 | #ifdef SMC_USE_DMA |
79d3b59a RJ |
1970 | |
1971 | dma_cap_zero(mask); | |
1972 | dma_cap_set(DMA_SLAVE, mask); | |
9d7bc29c RJ |
1973 | lp->rxdma = dma_request_channel(mask, NULL, NULL); |
1974 | lp->txdma = dma_request_channel(mask, NULL, NULL); | |
0a0c72c9 DM |
1975 | lp->rxdma_active = 0; |
1976 | lp->txdma_active = 0; | |
79d3b59a RJ |
1977 | |
1978 | memset(&config, 0, sizeof(config)); | |
1979 | config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; | |
1980 | config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; | |
1981 | config.src_addr = lp->physaddr + RX_DATA_FIFO; | |
1982 | config.dst_addr = lp->physaddr + TX_DATA_FIFO; | |
1983 | config.src_maxburst = 32; | |
1984 | config.dst_maxburst = 32; | |
1985 | retval = dmaengine_slave_config(lp->rxdma, &config); | |
1986 | if (retval) { | |
1987 | dev_err(lp->dev, "dma rx channel configuration failed: %d\n", | |
1988 | retval); | |
1989 | goto err_out; | |
1990 | } | |
1991 | retval = dmaengine_slave_config(lp->txdma, &config); | |
1992 | if (retval) { | |
1993 | dev_err(lp->dev, "dma tx channel configuration failed: %d\n", | |
1994 | retval); | |
1995 | goto err_out; | |
1996 | } | |
0a0c72c9 DM |
1997 | #endif |
1998 | ||
1999 | retval = register_netdev(dev); | |
2000 | if (retval == 0) { | |
2001 | /* now, print out the card info, in a short format.. */ | |
dcdf8710 BB |
2002 | netdev_info(dev, "%s (rev %d) at %#lx IRQ %d", |
2003 | version_string, lp->revision, | |
2004 | dev->base_addr, dev->irq); | |
0a0c72c9 DM |
2005 | |
2006 | #ifdef SMC_USE_DMA | |
79d3b59a RJ |
2007 | if (lp->rxdma) |
2008 | pr_cont(" RXDMA %p", lp->rxdma); | |
0a0c72c9 | 2009 | |
79d3b59a RJ |
2010 | if (lp->txdma) |
2011 | pr_cont(" TXDMA %p", lp->txdma); | |
0a0c72c9 | 2012 | #endif |
dcdf8710 | 2013 | pr_cont("\n"); |
0a0c72c9 | 2014 | if (!is_valid_ether_addr(dev->dev_addr)) { |
dcdf8710 | 2015 | netdev_warn(dev, "Invalid ethernet MAC address. Please set using ifconfig\n"); |
0a0c72c9 DM |
2016 | } else { |
2017 | /* Print the Ethernet address */ | |
dcdf8710 BB |
2018 | netdev_info(dev, "Ethernet addr: %pM\n", |
2019 | dev->dev_addr); | |
0a0c72c9 DM |
2020 | } |
2021 | ||
2022 | if (lp->phy_type == 0) { | |
dcdf8710 | 2023 | PRINTK(dev, "No PHY found\n"); |
0a0c72c9 | 2024 | } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) { |
dcdf8710 | 2025 | PRINTK(dev, "LAN911x Internal PHY\n"); |
0a0c72c9 | 2026 | } else { |
dcdf8710 | 2027 | PRINTK(dev, "External PHY 0x%08x\n", lp->phy_type); |
0a0c72c9 DM |
2028 | } |
2029 | } | |
d5498bef | 2030 | |
0a0c72c9 DM |
2031 | err_out: |
2032 | #ifdef SMC_USE_DMA | |
2033 | if (retval) { | |
79d3b59a RJ |
2034 | if (lp->rxdma) |
2035 | dma_release_channel(lp->rxdma); | |
2036 | if (lp->txdma) | |
2037 | dma_release_channel(lp->txdma); | |
0a0c72c9 DM |
2038 | } |
2039 | #endif | |
2040 | return retval; | |
2041 | } | |
2042 | ||
2043 | /* | |
dcdf8710 | 2044 | * smc911x_drv_probe(void) |
0a0c72c9 DM |
2045 | * |
2046 | * Output: | |
2047 | * 0 --> there is a device | |
2048 | * anything else, error | |
2049 | */ | |
9f1e13db | 2050 | static int smc911x_drv_probe(struct platform_device *pdev) |
0a0c72c9 DM |
2051 | { |
2052 | struct net_device *ndev; | |
2053 | struct resource *res; | |
ef8142a5 | 2054 | struct smc911x_local *lp; |
6b80778d | 2055 | void __iomem *addr; |
0a0c72c9 DM |
2056 | int ret; |
2057 | ||
dcdf8710 | 2058 | /* ndev is not valid yet, so avoid passing it in. */ |
b39d66a8 | 2059 | DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__); |
0a0c72c9 DM |
2060 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
2061 | if (!res) { | |
2062 | ret = -ENODEV; | |
2063 | goto out; | |
2064 | } | |
2065 | ||
2066 | /* | |
2067 | * Request the regions. | |
2068 | */ | |
2069 | if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) { | |
2070 | ret = -EBUSY; | |
2071 | goto out; | |
2072 | } | |
2073 | ||
2074 | ndev = alloc_etherdev(sizeof(struct smc911x_local)); | |
2075 | if (!ndev) { | |
0a0c72c9 DM |
2076 | ret = -ENOMEM; |
2077 | goto release_1; | |
2078 | } | |
0a0c72c9 DM |
2079 | SET_NETDEV_DEV(ndev, &pdev->dev); |
2080 | ||
2081 | ndev->dma = (unsigned char)-1; | |
2082 | ndev->irq = platform_get_irq(pdev, 0); | |
ef8142a5 AM |
2083 | lp = netdev_priv(ndev); |
2084 | lp->netdev = ndev; | |
12c03f59 | 2085 | #ifdef SMC_DYNAMIC_BUS_CONFIG |
a316084c | 2086 | { |
c82e5e57 | 2087 | struct smc911x_platdata *pd = dev_get_platdata(&pdev->dev); |
a316084c AM |
2088 | if (!pd) { |
2089 | ret = -EINVAL; | |
2090 | goto release_both; | |
2091 | } | |
2092 | memcpy(&lp->cfg, pd, sizeof(lp->cfg)); | |
12c03f59 | 2093 | } |
12c03f59 | 2094 | #endif |
0a0c72c9 DM |
2095 | |
2096 | addr = ioremap(res->start, SMC911X_IO_EXTENT); | |
2097 | if (!addr) { | |
2098 | ret = -ENOMEM; | |
2099 | goto release_both; | |
2100 | } | |
2101 | ||
2102 | platform_set_drvdata(pdev, ndev); | |
699559f8 MD |
2103 | lp->base = addr; |
2104 | ndev->base_addr = res->start; | |
2105 | ret = smc911x_probe(ndev); | |
0a0c72c9 | 2106 | if (ret != 0) { |
0a0c72c9 DM |
2107 | iounmap(addr); |
2108 | release_both: | |
2109 | free_netdev(ndev); | |
2110 | release_1: | |
2111 | release_mem_region(res->start, SMC911X_IO_EXTENT); | |
2112 | out: | |
dcdf8710 | 2113 | pr_info("%s: not found (%d).\n", CARDNAME, ret); |
0a0c72c9 DM |
2114 | } |
2115 | #ifdef SMC_USE_DMA | |
2116 | else { | |
0a0c72c9 DM |
2117 | lp->physaddr = res->start; |
2118 | lp->dev = &pdev->dev; | |
2119 | } | |
2120 | #endif | |
2121 | ||
2122 | return ret; | |
2123 | } | |
2124 | ||
9f1e13db | 2125 | static int smc911x_drv_remove(struct platform_device *pdev) |
0a0c72c9 DM |
2126 | { |
2127 | struct net_device *ndev = platform_get_drvdata(pdev); | |
699559f8 | 2128 | struct smc911x_local *lp = netdev_priv(ndev); |
0a0c72c9 DM |
2129 | struct resource *res; |
2130 | ||
dcdf8710 | 2131 | DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__); |
0a0c72c9 DM |
2132 | |
2133 | unregister_netdev(ndev); | |
2134 | ||
2135 | free_irq(ndev->irq, ndev); | |
2136 | ||
2137 | #ifdef SMC_USE_DMA | |
2138 | { | |
79d3b59a RJ |
2139 | if (lp->rxdma) |
2140 | dma_release_channel(lp->rxdma); | |
2141 | if (lp->txdma) | |
2142 | dma_release_channel(lp->txdma); | |
0a0c72c9 DM |
2143 | } |
2144 | #endif | |
699559f8 | 2145 | iounmap(lp->base); |
0a0c72c9 DM |
2146 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
2147 | release_mem_region(res->start, SMC911X_IO_EXTENT); | |
2148 | ||
2149 | free_netdev(ndev); | |
2150 | return 0; | |
2151 | } | |
2152 | ||
2153 | static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state) | |
2154 | { | |
2155 | struct net_device *ndev = platform_get_drvdata(dev); | |
699559f8 | 2156 | struct smc911x_local *lp = netdev_priv(ndev); |
0a0c72c9 | 2157 | |
dcdf8710 | 2158 | DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__); |
0a0c72c9 DM |
2159 | if (ndev) { |
2160 | if (netif_running(ndev)) { | |
2161 | netif_device_detach(ndev); | |
2162 | smc911x_shutdown(ndev); | |
2163 | #if POWER_DOWN | |
2164 | /* Set D2 - Energy detect only setting */ | |
699559f8 | 2165 | SMC_SET_PMT_CTRL(lp, 2<<12); |
0a0c72c9 DM |
2166 | #endif |
2167 | } | |
2168 | } | |
2169 | return 0; | |
2170 | } | |
2171 | ||
2172 | static int smc911x_drv_resume(struct platform_device *dev) | |
2173 | { | |
2174 | struct net_device *ndev = platform_get_drvdata(dev); | |
2175 | ||
dcdf8710 | 2176 | DBG(SMC_DEBUG_FUNC, ndev, "--> %s\n", __func__); |
0a0c72c9 DM |
2177 | if (ndev) { |
2178 | struct smc911x_local *lp = netdev_priv(ndev); | |
2179 | ||
2180 | if (netif_running(ndev)) { | |
2181 | smc911x_reset(ndev); | |
0a0c72c9 | 2182 | if (lp->phy_type != 0) |
ef8142a5 | 2183 | smc911x_phy_configure(&lp->phy_configure); |
347c8d83 | 2184 | smc911x_enable(ndev); |
0a0c72c9 DM |
2185 | netif_device_attach(ndev); |
2186 | } | |
2187 | } | |
2188 | return 0; | |
2189 | } | |
2190 | ||
2191 | static struct platform_driver smc911x_driver = { | |
2192 | .probe = smc911x_drv_probe, | |
9f1e13db | 2193 | .remove = smc911x_drv_remove, |
0a0c72c9 DM |
2194 | .suspend = smc911x_drv_suspend, |
2195 | .resume = smc911x_drv_resume, | |
2196 | .driver = { | |
2197 | .name = CARDNAME, | |
2198 | }, | |
2199 | }; | |
d5498bef | 2200 | |
db62f684 | 2201 | module_platform_driver(smc911x_driver); |