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[mirror_ubuntu-focal-kernel.git] / drivers / net / ethernet / smsc / smc91c92_cs.c
CommitLineData
1da177e4
LT		 1/*======================================================================
2
3 A PCMCIA ethernet driver for SMC91c92-based cards.
4
5 This driver supports Megahertz PCMCIA ethernet cards; and
6 Megahertz, Motorola, Ositech, and Psion Dacom ethernet/modem
7 multifunction cards.
8
9 Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net
10
11 smc91c92_cs.c 1.122 2002/10/25 06:26:39
12
13 This driver contains code written by Donald Becker
14 (becker@scyld.com), Rowan Hughes (x-csrdh@jcu.edu.au),
15 David Hinds (dahinds@users.sourceforge.net), and Erik Stahlman
16 (erik@vt.edu). Donald wrote the SMC 91c92 code using parts of
17 Erik's SMC 91c94 driver. Rowan wrote a similar driver, and I've
18 incorporated some parts of his driver here. I (Dave) wrote most
19 of the PCMCIA glue code, and the Ositech support code. Kelly
20 Stephens (kstephen@holli.com) added support for the Motorola
21 Mariner, with help from Allen Brost.
22
23 This software may be used and distributed according to the terms of
24 the GNU General Public License, incorporated herein by reference.
25
26======================================================================*/
27
636b8116
JP		 28#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29
1da177e4
LT		 30#include <linux/module.h>
31#include <linux/kernel.h>
1da177e4
LT		 32#include <linux/slab.h>
33#include <linux/string.h>
34#include <linux/timer.h>
35#include <linux/interrupt.h>
36#include <linux/delay.h>
37#include <linux/crc32.h>
38#include <linux/netdevice.h>
39#include <linux/etherdevice.h>
40#include <linux/skbuff.h>
41#include <linux/if_arp.h>
42#include <linux/ioport.h>
43#include <linux/ethtool.h>
44#include <linux/mii.h>
4851d3aa 45#include <linux/jiffies.h>
75bf758f 46#include <linux/firmware.h>
1da177e4 47
1da177e4
LT		 48#include <pcmcia/cistpl.h>
49#include <pcmcia/cisreg.h>
50#include <pcmcia/ciscode.h>
51#include <pcmcia/ds.h>
50db3fdb 52#include <pcmcia/ss.h>
1da177e4
LT		 53
54#include <asm/io.h>
7c0f6ba6 55#include <linux/uaccess.h>
1da177e4 56
1da177e4
LT		 57/*====================================================================*/
58
f71e1309 59static const char *if_names[] = { "auto", "10baseT", "10base2"};
1da177e4 60
75bf758f
JSR		 61/* Firmware name */
62#define FIRMWARE_NAME "ositech/Xilinx7OD.bin"
63
1da177e4
LT		 64/* Module parameters */
65
66MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver");
67MODULE_LICENSE("GPL");
75bf758f 68MODULE_FIRMWARE(FIRMWARE_NAME);
1da177e4
LT		 69
70#define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
71
72/*
73 Transceiver/media type.
74 0 = auto
75 1 = 10baseT (and autoselect if #define AUTOSELECT),
76 2 = AUI/10base2,
77*/
78INT_MODULE_PARM(if_port, 0);
79
1da177e4
LT		 80
81#define DRV_NAME "smc91c92_cs"
d5b20697 82#define DRV_VERSION "1.123"
1da177e4
LT		 83
84/*====================================================================*/
85
86/* Operational parameter that usually are not changed. */
87
88/* Time in jiffies before concluding Tx hung */
89#define TX_TIMEOUT ((400*HZ)/1000)
90
91/* Maximum events (Rx packets, etc.) to handle at each interrupt. */
92#define INTR_WORK 4
93
94/* Times to check the check the chip before concluding that it doesn't
95 currently have room for another Tx packet. */
96#define MEMORY_WAIT_TIME 8
97
1da177e4 98struct smc_private {
fd238232 99 struct pcmcia_device *p_dev;
1da177e4
LT		 100 spinlock_t lock;
101 u_short manfid;
102 u_short cardid;
6fb7298c 103
1da177e4
LT		 104 struct sk_buff *saved_skb;
105 int packets_waiting;
106 void __iomem *base;
107 u_short cfg;
108 struct timer_list media;
109 int watchdog, tx_err;
110 u_short media_status;
111 u_short fast_poll;
112 u_short link_status;
113 struct mii_if_info mii_if;
114 int duplex;
115 int rx_ovrn;
116};
117
118/* Special definitions for Megahertz multifunction cards */
119#define MEGAHERTZ_ISR 0x0380
120
121/* Special function registers for Motorola Mariner */
122#define MOT_LAN 0x0000
123#define MOT_UART 0x0020
124#define MOT_EEPROM 0x20
125
126#define MOT_NORMAL \
127(COR_LEVEL_REQ | COR_FUNC_ENA | COR_ADDR_DECODE | COR_IREQ_ENA)
128
129/* Special function registers for Ositech cards */
130#define OSITECH_AUI_CTL 0x0c
131#define OSITECH_PWRDOWN 0x0d
132#define OSITECH_RESET 0x0e
133#define OSITECH_ISR 0x0f
134#define OSITECH_AUI_PWR 0x0c
135#define OSITECH_RESET_ISR 0x0e
136
137#define OSI_AUI_PWR 0x40
138#define OSI_LAN_PWRDOWN 0x02
139#define OSI_MODEM_PWRDOWN 0x01
140#define OSI_LAN_RESET 0x02
141#define OSI_MODEM_RESET 0x01
142
143/* Symbolic constants for the SMC91c9* series chips, from Erik Stahlman. */
144#define BANK_SELECT 14 /* Window select register. */
145#define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); }
146
147/* Bank 0 registers. */
148#define TCR 0 /* transmit control register */
149#define TCR_CLEAR 0 /* do NOTHING */
150#define TCR_ENABLE 0x0001 /* if this is 1, we can transmit */
151#define TCR_PAD_EN 0x0080 /* pads short packets to 64 bytes */
152#define TCR_MONCSN 0x0400 /* Monitor Carrier. */
153#define TCR_FDUPLX 0x0800 /* Full duplex mode. */
154#define TCR_NORMAL TCR_ENABLE | TCR_PAD_EN
155
156#define EPH 2 /* Ethernet Protocol Handler report. */
157#define EPH_TX_SUC 0x0001
158#define EPH_SNGLCOL 0x0002
159#define EPH_MULCOL 0x0004
160#define EPH_LTX_MULT 0x0008
161#define EPH_16COL 0x0010
162#define EPH_SQET 0x0020
163#define EPH_LTX_BRD 0x0040
164#define EPH_TX_DEFR 0x0080
165#define EPH_LAT_COL 0x0200
166#define EPH_LOST_CAR 0x0400
167#define EPH_EXC_DEF 0x0800
168#define EPH_CTR_ROL 0x1000
169#define EPH_RX_OVRN 0x2000
170#define EPH_LINK_OK 0x4000
171#define EPH_TX_UNRN 0x8000
172#define MEMINFO 8 /* Memory Information Register */
173#define MEMCFG 10 /* Memory Configuration Register */
174
175/* Bank 1 registers. */
176#define CONFIG 0
177#define CFG_MII_SELECT 0x8000 /* 91C100 only */
178#define CFG_NO_WAIT 0x1000
179#define CFG_FULL_STEP 0x0400
180#define CFG_SET_SQLCH 0x0200
181#define CFG_AUI_SELECT 0x0100
182#define CFG_16BIT 0x0080
183#define CFG_DIS_LINK 0x0040
184#define CFG_STATIC 0x0030
185#define CFG_IRQ_SEL_1 0x0004
186#define CFG_IRQ_SEL_0 0x0002
187#define BASE_ADDR 2
188#define ADDR0 4
189#define GENERAL 10
190#define CONTROL 12
191#define CTL_STORE 0x0001
192#define CTL_RELOAD 0x0002
193#define CTL_EE_SELECT 0x0004
194#define CTL_TE_ENABLE 0x0020
195#define CTL_CR_ENABLE 0x0040
196#define CTL_LE_ENABLE 0x0080
197#define CTL_AUTO_RELEASE 0x0800
198#define CTL_POWERDOWN 0x2000
199
200/* Bank 2 registers. */
201#define MMU_CMD 0
202#define MC_ALLOC 0x20 /* or with number of 256 byte packets */
203#define MC_RESET 0x40
204#define MC_RELEASE 0x80 /* remove and release the current rx packet */
205#define MC_FREEPKT 0xA0 /* Release packet in PNR register */
206#define MC_ENQUEUE 0xC0 /* Enqueue the packet for transmit */
207#define PNR_ARR 2
208#define FIFO_PORTS 4
209#define FP_RXEMPTY 0x8000
210#define POINTER 6
211#define PTR_AUTO_INC 0x0040
212#define PTR_READ 0x2000
213#define PTR_AUTOINC 0x4000
214#define PTR_RCV 0x8000
215#define DATA_1 8
216#define INTERRUPT 12
217#define IM_RCV_INT 0x1
218#define IM_TX_INT 0x2
219#define IM_TX_EMPTY_INT 0x4
220#define IM_ALLOC_INT 0x8
221#define IM_RX_OVRN_INT 0x10
222#define IM_EPH_INT 0x20
223
224#define RCR 4
225enum RxCfg { RxAllMulti = 0x0004, RxPromisc = 0x0002,
226 RxEnable = 0x0100, RxStripCRC = 0x0200};
227#define RCR_SOFTRESET 0x8000 /* resets the chip */
228#define RCR_STRIP_CRC 0x200 /* strips CRC */
229#define RCR_ENABLE 0x100 /* IFF this is set, we can receive packets */
230#define RCR_ALMUL 0x4 /* receive all multicast packets */
231#define RCR_PROMISC 0x2 /* enable promiscuous mode */
232
233/* the normal settings for the RCR register : */
234#define RCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE)
235#define RCR_CLEAR 0x0 /* set it to a base state */
236#define COUNTER 6
237
238/* BANK 3 -- not the same values as in smc9194! */
239#define MULTICAST0 0
240#define MULTICAST2 2
241#define MULTICAST4 4
242#define MULTICAST6 6
243#define MGMT 8
244#define REVISION 0x0a
245
246/* Transmit status bits. */
247#define TS_SUCCESS 0x0001
248#define TS_16COL 0x0010
249#define TS_LATCOL 0x0200
250#define TS_LOSTCAR 0x0400
251
252/* Receive status bits. */
253#define RS_ALGNERR 0x8000
254#define RS_BADCRC 0x2000
255#define RS_ODDFRAME 0x1000
256#define RS_TOOLONG 0x0800
257#define RS_TOOSHORT 0x0400
258#define RS_MULTICAST 0x0001
259#define RS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT)
260
261#define set_bits(v, p) outw(inw(p)|(v), (p))
262#define mask_bits(v, p) outw(inw(p)&(v), (p))
263
264/*====================================================================*/
265
cc3b4866 266static void smc91c92_detach(struct pcmcia_device *p_dev);
15b99ac1 267static int smc91c92_config(struct pcmcia_device *link);
fba395ee 268static void smc91c92_release(struct pcmcia_device *link);
1da177e4
LT		 269
270static int smc_open(struct net_device *dev);
271static int smc_close(struct net_device *dev);
272static int smc_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
273static void smc_tx_timeout(struct net_device *dev);
dbf02fae
SH		 274static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
275 struct net_device *dev);
7d12e780 276static irqreturn_t smc_interrupt(int irq, void *dev_id);
1da177e4 277static void smc_rx(struct net_device *dev);
1da177e4
LT		 278static void set_rx_mode(struct net_device *dev);
279static int s9k_config(struct net_device *dev, struct ifmap *map);
280static void smc_set_xcvr(struct net_device *dev, int if_port);
281static void smc_reset(struct net_device *dev);
282static void media_check(u_long arg);
906da809 283static void mdio_sync(unsigned int addr);
1da177e4
LT		 284static int mdio_read(struct net_device *dev, int phy_id, int loc);
285static void mdio_write(struct net_device *dev, int phy_id, int loc, int value);
286static int smc_link_ok(struct net_device *dev);
7282d491 287static const struct ethtool_ops ethtool_ops;
1da177e4 288
9b31b697
SH		 289static const struct net_device_ops smc_netdev_ops = {
290 .ndo_open = smc_open,
291 .ndo_stop = smc_close,
292 .ndo_start_xmit = smc_start_xmit,
293 .ndo_tx_timeout = smc_tx_timeout,
294 .ndo_set_config = s9k_config,
afc4b13d 295 .ndo_set_rx_mode = set_rx_mode,
c061b18d 296 .ndo_do_ioctl = smc_ioctl,
9b31b697
SH		 297 .ndo_set_mac_address = eth_mac_addr,
298 .ndo_validate_addr = eth_validate_addr,
299};
300
15b99ac1 301static int smc91c92_probe(struct pcmcia_device *link)
1da177e4 302{
1da177e4 303 struct smc_private *smc;
1da177e4 304 struct net_device *dev;
1da177e4 305
dd0fab5b 306 dev_dbg(&link->dev, "smc91c92_attach()\n");
1da177e4
LT		 307
308 /* Create new ethernet device */
309 dev = alloc_etherdev(sizeof(struct smc_private));
310 if (!dev)
f8cfa618 311 return -ENOMEM;
1da177e4 312 smc = netdev_priv(dev);
fba395ee 313 smc->p_dev = link;
44b496f6 314 link->priv = dev;
1da177e4
LT		 315
316 spin_lock_init(&smc->lock);
1da177e4
LT		 317
318 /* The SMC91c92-specific entries in the device structure. */
9b31b697 319 dev->netdev_ops = &smc_netdev_ops;
7ad24ea4 320 dev->ethtool_ops = &ethtool_ops;
1da177e4 321 dev->watchdog_timeo = TX_TIMEOUT;
1da177e4
LT		 322
323 smc->mii_if.dev = dev;
324 smc->mii_if.mdio_read = mdio_read;
325 smc->mii_if.mdio_write = mdio_write;
326 smc->mii_if.phy_id_mask = 0x1f;
327 smc->mii_if.reg_num_mask = 0x1f;
328
15b99ac1 329 return smc91c92_config(link);
1da177e4
LT		 330} /* smc91c92_attach */
331
fba395ee 332static void smc91c92_detach(struct pcmcia_device *link)
1da177e4
LT		 333{
334 struct net_device *dev = link->priv;
1da177e4 335
dd0fab5b 336 dev_dbg(&link->dev, "smc91c92_detach\n");
1da177e4 337
c7c2fa07 338 unregister_netdev(dev);
1da177e4 339
e2d40963 340 smc91c92_release(link);
1da177e4 341
1da177e4
LT		 342 free_netdev(dev);
343} /* smc91c92_detach */
344
345/*====================================================================*/
346
347static int cvt_ascii_address(struct net_device *dev, char *s)
348{
349 int i, j, da, c;
350
351 if (strlen(s) != 12)
352 return -1;
353 for (i = 0; i < 6; i++) {
354 da = 0;
355 for (j = 0; j < 2; j++) {
356 c = *s++;
357 da <<= 4;
358 da += ((c >= '0') && (c <= '9')) ?
359 (c - '0') : ((c & 0x0f) + 9);
360 }
361 dev->dev_addr[i] = da;
362 }
363 return 0;
364}
365
dddfbd82 366/*====================================================================
1da177e4
LT		 367
368 Configuration stuff for Megahertz cards
369
370 mhz_3288_power() is used to power up a 3288's ethernet chip.
371 mhz_mfc_config() handles socket setup for multifunction (1144
372 and 3288) cards. mhz_setup() gets a card's hardware ethernet
373 address.
374
375======================================================================*/
376
fba395ee 377static int mhz_3288_power(struct pcmcia_device *link)
1da177e4
LT		 378{
379 struct net_device *dev = link->priv;
380 struct smc_private *smc = netdev_priv(dev);
381 u_char tmp;
382
383 /* Read the ISR twice... */
384 readb(smc->base+MEGAHERTZ_ISR);
385 udelay(5);
386 readb(smc->base+MEGAHERTZ_ISR);
387
388 /* Pause 200ms... */
389 mdelay(200);
390
391 /* Now read and write the COR... */
7feabb64 392 tmp = readb(smc->base + link->config_base + CISREG_COR);
1da177e4 393 udelay(5);
7feabb64 394 writeb(tmp, smc->base + link->config_base + CISREG_COR);
1da177e4
LT		 395
396 return 0;
397}
398
00990e7c 399static int mhz_mfc_config_check(struct pcmcia_device *p_dev, void *priv_data)
b54bf94b
DB		 400{
401 int k;
00990e7c
DB		 402 p_dev->io_lines = 16;
403 p_dev->resource[1]->start = p_dev->resource[0]->start;
404 p_dev->resource[1]->end = 8;
405 p_dev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH;
406 p_dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
407 p_dev->resource[0]->end = 16;
408 p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
409 p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
b54bf94b
DB		 410 for (k = 0; k < 0x400; k += 0x10) {
411 if (k & 0x80)
412 continue;
90abdc3b 413 p_dev->resource[0]->start = k ^ 0x300;
90abdc3b 414 if (!pcmcia_request_io(p_dev))
b54bf94b
DB		 415 return 0;
416 }
417 return -ENODEV;
418}
419
fba395ee 420static int mhz_mfc_config(struct pcmcia_device *link)
1da177e4
LT		 421{
422 struct net_device *dev = link->priv;
423 struct smc_private *smc = netdev_priv(dev);
b5cb259e 424 unsigned int offset;
b54bf94b 425 int i;
1da177e4 426
00990e7c
DB		 427 link->config_flags |= CONF_ENABLE_SPKR | CONF_ENABLE_IRQ |
428 CONF_AUTO_SET_IO;
1da177e4 429
1da177e4
LT		 430 /* The Megahertz combo cards have modem-like CIS entries, so
431 we have to explicitly try a bunch of port combinations. */
b54bf94b 432 if (pcmcia_loop_config(link, mhz_mfc_config_check, NULL))
dddfbd82
DB		 433 return -ENODEV;
434
9a017a91 435 dev->base_addr = link->resource[0]->start;
1da177e4
LT		 436
437 /* Allocate a memory window, for accessing the ISR */
cdb13808
DB		 438 link->resource[2]->flags = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
439 link->resource[2]->start = link->resource[2]->end = 0;
440 i = pcmcia_request_window(link, link->resource[2], 0);
4c89e88b 441 if (i != 0)
dddfbd82
DB		 442 return -ENODEV;
443
cdb13808
DB		 444 smc->base = ioremap(link->resource[2]->start,
445 resource_size(link->resource[2]));
7feabb64 446 offset = (smc->manfid == MANFID_MOTOROLA) ? link->config_base : 0;
cdb13808 447 i = pcmcia_map_mem_page(link, link->resource[2], offset);
8e95a202
JP		 448 if ((i == 0) &&
449 (smc->manfid == MANFID_MEGAHERTZ) &&
450 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
451 mhz_3288_power(link);
1da177e4 452
dddfbd82 453 return 0;
1da177e4
LT		 454}
455
dddfbd82
DB		 456static int pcmcia_get_versmac(struct pcmcia_device *p_dev,
457 tuple_t *tuple,
458 void *priv)
1da177e4 459{
dddfbd82
DB		 460 struct net_device *dev = priv;
461 cisparse_t parse;
fb9e2d88 462 u8 *buf;
4638aef4 463
dddfbd82
DB		 464 if (pcmcia_parse_tuple(tuple, &parse))
465 return -EINVAL;
1da177e4 466
fb9e2d88
KK		 467 buf = parse.version_1.str + parse.version_1.ofs[3];
468
469 if ((parse.version_1.ns > 3) && (cvt_ascii_address(dev, buf) == 0))
dddfbd82 470 return 0;
4638aef4 471
dddfbd82
DB		 472 return -EINVAL;
473};
474
fba395ee 475static int mhz_setup(struct pcmcia_device *link)
1da177e4 476{
1da177e4 477 struct net_device *dev = link->priv;
dddfbd82
DB		 478 size_t len;
479 u8 *buf;
4638aef4 480 int rc;
1da177e4
LT		 481
482 /* Read the station address from the CIS. It is stored as the last
483 (fourth) string in the Version 1 Version/ID tuple. */
7d2e8d00
DB		 484 if ((link->prod_id[3]) &&
485 (cvt_ascii_address(dev, link->prod_id[3]) == 0))
486 return 0;
487
488 /* Workarounds for broken cards start here. */
a1a98b72 489 /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */
dddfbd82
DB		 490 if (!pcmcia_loop_tuple(link, CISTPL_VERS_1, pcmcia_get_versmac, dev))
491 return 0;
1da177e4
LT		 492
493 /* Another possibility: for the EM3288, in a special tuple */
4638aef4 494 rc = -1;
dddfbd82
DB		 495 len = pcmcia_get_tuple(link, 0x81, &buf);
496 if (buf && len >= 13) {
497 buf[12] = '\0';
fb9e2d88 498 if (cvt_ascii_address(dev, buf) == 0)
dddfbd82
DB		 499 rc = 0;
500 }
501 kfree(buf);
502
503 return rc;
504};
1da177e4
LT		 505
506/*======================================================================
507
508 Configuration stuff for the Motorola Mariner
509
510 mot_config() writes directly to the Mariner configuration
511 registers because the CIS is just bogus.
512
513======================================================================*/
514
fba395ee 515static void mot_config(struct pcmcia_device *link)
1da177e4
LT		 516{
517 struct net_device *dev = link->priv;
518 struct smc_private *smc = netdev_priv(dev);
906da809 519 unsigned int ioaddr = dev->base_addr;
9a017a91 520 unsigned int iouart = link->resource[1]->start;
1da177e4
LT		 521
522 /* Set UART base address and force map with COR bit 1 */
523 writeb(iouart & 0xff, smc->base + MOT_UART + CISREG_IOBASE_0);
524 writeb((iouart >> 8) & 0xff, smc->base + MOT_UART + CISREG_IOBASE_1);
525 writeb(MOT_NORMAL, smc->base + MOT_UART + CISREG_COR);
526
527 /* Set SMC base address and force map with COR bit 1 */
528 writeb(ioaddr & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_0);
529 writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1);
530 writeb(MOT_NORMAL, smc->base + MOT_LAN + CISREG_COR);
531
532 /* Wait for things to settle down */
533 mdelay(100);
534}
535
fba395ee 536static int mot_setup(struct pcmcia_device *link)
1da177e4
LT		 537{
538 struct net_device *dev = link->priv;
906da809 539 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 540 int i, wait, loop;
541 u_int addr;
542
543 /* Read Ethernet address from Serial EEPROM */
544
545 for (i = 0; i < 3; i++) {
546 SMC_SELECT_BANK(2);
547 outw(MOT_EEPROM + i, ioaddr + POINTER);
548 SMC_SELECT_BANK(1);
549 outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL);
550
551 for (loop = wait = 0; loop < 200; loop++) {
552 udelay(10);
553 wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL));
554 if (wait == 0) break;
555 }
556
557 if (wait)
558 return -1;
559
560 addr = inw(ioaddr + GENERAL);
561 dev->dev_addr[2*i] = addr & 0xff;
562 dev->dev_addr[2*i+1] = (addr >> 8) & 0xff;
563 }
564
565 return 0;
566}
567
568/*====================================================================*/
569
00990e7c 570static int smc_configcheck(struct pcmcia_device *p_dev, void *priv_data)
b54bf94b 571{
00990e7c
DB		 572 p_dev->resource[0]->end = 16;
573 p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
574 p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
575
90abdc3b 576 return pcmcia_request_io(p_dev);
b54bf94b
DB		 577}
578
fba395ee 579static int smc_config(struct pcmcia_device *link)
1da177e4
LT		 580{
581 struct net_device *dev = link->priv;
1da177e4
LT		 582 int i;
583
00990e7c
DB		 584 link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
585
b54bf94b
DB		 586 i = pcmcia_loop_config(link, smc_configcheck, NULL);
587 if (!i)
9a017a91 588 dev->base_addr = link->resource[0]->start;
4638aef4 589
1da177e4
LT		 590 return i;
591}
592
dddfbd82 593
fba395ee 594static int smc_setup(struct pcmcia_device *link)
1da177e4 595{
1da177e4 596 struct net_device *dev = link->priv;
1da177e4
LT		 597
598 /* Check for a LAN function extension tuple */
dddfbd82
DB		 599 if (!pcmcia_get_mac_from_cis(link, dev))
600 return 0;
601
1da177e4 602 /* Try the third string in the Version 1 Version/ID tuple. */
a9606fd3 603 if (link->prod_id[2]) {
dddfbd82
DB		 604 if (cvt_ascii_address(dev, link->prod_id[2]) == 0)
605 return 0;
4638aef4 606 }
dddfbd82 607 return -1;
1da177e4
LT		 608}
609
610/*====================================================================*/
611
fba395ee 612static int osi_config(struct pcmcia_device *link)
1da177e4
LT		 613{
614 struct net_device *dev = link->priv;
906da809 615 static const unsigned int com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
1da177e4
LT		 616 int i, j;
617
00990e7c 618 link->config_flags |= CONF_ENABLE_SPKR | CONF_ENABLE_IRQ;
90abdc3b
DB		 619 link->resource[0]->end = 64;
620 link->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
621 link->resource[1]->end = 8;
1da177e4
LT		 622
623 /* Enable Hard Decode, LAN, Modem */
90abdc3b 624 link->io_lines = 16;
7feabb64 625 link->config_index = 0x23;
1da177e4
LT		 626
627 for (i = j = 0; j < 4; j++) {
90abdc3b
DB		 628 link->resource[1]->start = com[j];
629 i = pcmcia_request_io(link);
4c89e88b
DB		 630 if (i == 0)
631 break;
1da177e4 632 }
4c89e88b 633 if (i != 0) {
1da177e4 634 /* Fallback: turn off hard decode */
7feabb64 635 link->config_index = 0x03;
90abdc3b
DB		 636 link->resource[1]->end = 0;
637 i = pcmcia_request_io(link);
1da177e4 638 }
9a017a91 639 dev->base_addr = link->resource[0]->start + 0x10;
1da177e4
LT		 640 return i;
641}
642
75bf758f
JSR		 643static int osi_load_firmware(struct pcmcia_device *link)
644{
645 const struct firmware *fw;
646 int i, err;
647
648 err = request_firmware(&fw, FIRMWARE_NAME, &link->dev);
649 if (err) {
650 pr_err("Failed to load firmware \"%s\"\n", FIRMWARE_NAME);
651 return err;
652 }
653
654 /* Download the Seven of Diamonds firmware */
655 for (i = 0; i < fw->size; i++) {
9a017a91 656 outb(fw->data[i], link->resource[0]->start + 2);
75bf758f
JSR		 657 udelay(50);
658 }
659 release_firmware(fw);
660 return err;
661}
662
dddfbd82
DB		 663static int pcmcia_osi_mac(struct pcmcia_device *p_dev,
664 tuple_t *tuple,
665 void *priv)
1da177e4 666{
dddfbd82
DB		 667 struct net_device *dev = priv;
668 int i;
1da177e4 669
dddfbd82
DB		 670 if (tuple->TupleDataLen < 8)
671 return -EINVAL;
672 if (tuple->TupleData[0] != 0x04)
673 return -EINVAL;
674 for (i = 0; i < 6; i++)
675 dev->dev_addr[i] = tuple->TupleData[i+2];
676 return 0;
677};
4638aef4 678
4638aef4 679
dddfbd82
DB		 680static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid)
681{
682 struct net_device *dev = link->priv;
683 int rc;
1da177e4
LT		 684
685 /* Read the station address from tuple 0x90, subtuple 0x04 */
dddfbd82
DB		 686 if (pcmcia_loop_tuple(link, 0x90, pcmcia_osi_mac, dev))
687 return -1;
1da177e4
LT		 688
689 if (((manfid == MANFID_OSITECH) &&
690 (cardid == PRODID_OSITECH_SEVEN)) ||
691 ((manfid == MANFID_PSION) &&
692 (cardid == PRODID_PSION_NET100))) {
75bf758f
JSR		 693 rc = osi_load_firmware(link);
694 if (rc)
dddfbd82 695 return rc;
1da177e4
LT		 696 } else if (manfid == MANFID_OSITECH) {
697 /* Make sure both functions are powered up */
9a017a91 698 set_bits(0x300, link->resource[0]->start + OSITECH_AUI_PWR);
1da177e4 699 /* Now, turn on the interrupt for both card functions */
9a017a91 700 set_bits(0x300, link->resource[0]->start + OSITECH_RESET_ISR);
dd0fab5b 701 dev_dbg(&link->dev, "AUI/PWR: %4.4x RESET/ISR: %4.4x\n",
9a017a91
DB		 702 inw(link->resource[0]->start + OSITECH_AUI_PWR),
703 inw(link->resource[0]->start + OSITECH_RESET_ISR));
1da177e4 704 }
dddfbd82 705 return 0;
1da177e4
LT		 706}
707
fba395ee 708static int smc91c92_suspend(struct pcmcia_device *link)
98e4c28b 709{
98e4c28b
DB		 710 struct net_device *dev = link->priv;
711
e2d40963 712 if (link->open)
4bbed523 713 netif_device_detach(dev);
98e4c28b
DB		 714
715 return 0;
716}
717
fba395ee 718static int smc91c92_resume(struct pcmcia_device *link)
98e4c28b 719{
98e4c28b
DB		 720 struct net_device *dev = link->priv;
721 struct smc_private *smc = netdev_priv(dev);
722 int i;
723
e2d40963
DB		 724 if ((smc->manfid == MANFID_MEGAHERTZ) &&
725 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
726 mhz_3288_power(link);
727 if (smc->manfid == MANFID_MOTOROLA)
728 mot_config(link);
729 if ((smc->manfid == MANFID_OSITECH) &&
730 (smc->cardid != PRODID_OSITECH_SEVEN)) {
731 /* Power up the card and enable interrupts */
732 set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR);
733 set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR);
734 }
735 if (((smc->manfid == MANFID_OSITECH) &&
736 (smc->cardid == PRODID_OSITECH_SEVEN)) ||
737 ((smc->manfid == MANFID_PSION) &&
738 (smc->cardid == PRODID_PSION_NET100))) {
75bf758f
JSR		 739 i = osi_load_firmware(link);
740 if (i) {
c501b1f5 741 netdev_err(dev, "Failed to load firmware\n");
75bf758f 742 return i;
98e4c28b
DB		 743 }
744 }
e2d40963
DB		 745 if (link->open) {
746 smc_reset(dev);
747 netif_device_attach(dev);
748 }
98e4c28b
DB		 749
750 return 0;
751}
752
753
1da177e4
LT		 754/*======================================================================
755
756 This verifies that the chip is some SMC91cXX variant, and returns
757 the revision code if successful. Otherwise, it returns -ENODEV.
758
759======================================================================*/
760
fba395ee 761static int check_sig(struct pcmcia_device *link)
1da177e4
LT		 762{
763 struct net_device *dev = link->priv;
906da809 764 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 765 int width;
766 u_short s;
767
768 SMC_SELECT_BANK(1);
769 if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) {
770 /* Try powering up the chip */
771 outw(0, ioaddr + CONTROL);
772 mdelay(55);
773 }
774
775 /* Try setting bus width */
90abdc3b 776 width = (link->resource[0]->flags == IO_DATA_PATH_WIDTH_AUTO);
1da177e4
LT		 777 s = inb(ioaddr + CONFIG);
778 if (width)
779 s |= CFG_16BIT;
780 else
781 s &= ~CFG_16BIT;
782 outb(s, ioaddr + CONFIG);
783
784 /* Check Base Address Register to make sure bus width is OK */
785 s = inw(ioaddr + BASE_ADDR);
786 if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) &&
787 ((s >> 8) != (s & 0xff))) {
788 SMC_SELECT_BANK(3);
789 s = inw(ioaddr + REVISION);
807540ba 790 return s & 0xff;
1da177e4
LT		 791 }
792
793 if (width) {
c501b1f5 794 netdev_info(dev, "using 8-bit IO window\n");
4bbed523 795
fba395ee 796 smc91c92_suspend(link);
fb49fa53 797 pcmcia_fixup_iowidth(link);
fba395ee 798 smc91c92_resume(link);
4bbed523 799 return check_sig(link);
1da177e4
LT		 800 }
801 return -ENODEV;
802}
803
15b99ac1 804static int smc91c92_config(struct pcmcia_device *link)
1da177e4 805{
1da177e4
LT		 806 struct net_device *dev = link->priv;
807 struct smc_private *smc = netdev_priv(dev);
1da177e4 808 char *name;
74411c04 809 int i, rev, j = 0;
906da809 810 unsigned int ioaddr;
1da177e4
LT		 811 u_long mir;
812
dd0fab5b 813 dev_dbg(&link->dev, "smc91c92_config\n");
1da177e4 814
efd50585
DB		 815 smc->manfid = link->manf_id;
816 smc->cardid = link->card_id;
1da177e4 817
1da177e4
LT		 818 if ((smc->manfid == MANFID_OSITECH) &&
819 (smc->cardid != PRODID_OSITECH_SEVEN)) {
820 i = osi_config(link);
821 } else if ((smc->manfid == MANFID_MOTOROLA) ||
822 ((smc->manfid == MANFID_MEGAHERTZ) &&
823 ((smc->cardid == PRODID_MEGAHERTZ_VARIOUS) ||
824 (smc->cardid == PRODID_MEGAHERTZ_EM3288)))) {
825 i = mhz_mfc_config(link);
826 } else {
827 i = smc_config(link);
828 }
dd0fab5b
DB		 829 if (i)
830 goto config_failed;
1da177e4 831
eb14120f 832 i = pcmcia_request_irq(link, smc_interrupt);
dd0fab5b
DB		 833 if (i)
834 goto config_failed;
1ac71e5a 835 i = pcmcia_enable_device(link);
dd0fab5b
DB		 836 if (i)
837 goto config_failed;
1da177e4
LT		 838
839 if (smc->manfid == MANFID_MOTOROLA)
840 mot_config(link);
841
eb14120f 842 dev->irq = link->irq;
1da177e4
LT		 843
844 if ((if_port >= 0) && (if_port <= 2))
845 dev->if_port = if_port;
846 else
636b8116 847 dev_notice(&link->dev, "invalid if_port requested\n");
1da177e4
LT		 848
849 switch (smc->manfid) {
850 case MANFID_OSITECH:
851 case MANFID_PSION:
852 i = osi_setup(link, smc->manfid, smc->cardid); break;
853 case MANFID_SMC:
854 case MANFID_NEW_MEDIA:
855 i = smc_setup(link); break;
856 case 0x128: /* For broken Megahertz cards */
857 case MANFID_MEGAHERTZ:
858 i = mhz_setup(link); break;
859 case MANFID_MOTOROLA:
860 default: /* get the hw address from EEPROM */
861 i = mot_setup(link); break;
862 }
863
864 if (i != 0) {
636b8116 865 dev_notice(&link->dev, "Unable to find hardware address.\n");
fb9e2d88 866 goto config_failed;
1da177e4
LT		 867 }
868
869 smc->duplex = 0;
870 smc->rx_ovrn = 0;
871
872 rev = check_sig(link);
873 name = "???";
874 if (rev > 0)
875 switch (rev >> 4) {
876 case 3: name = "92"; break;
877 case 4: name = ((rev & 15) >= 6) ? "96" : "94"; break;
878 case 5: name = "95"; break;
879 case 7: name = "100"; break;
880 case 8: name = "100-FD"; break;
881 case 9: name = "110"; break;
882 }
883
884 ioaddr = dev->base_addr;
885 if (rev > 0) {
886 u_long mcr;
887 SMC_SELECT_BANK(0);
888 mir = inw(ioaddr + MEMINFO) & 0xff;
889 if (mir == 0xff) mir++;
890 /* Get scale factor for memory size */
891 mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200;
892 mir *= 128 * (1<<((mcr >> 9) & 7));
893 SMC_SELECT_BANK(1);
894 smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT;
895 smc->cfg |= CFG_NO_WAIT | CFG_16BIT | CFG_STATIC;
896 if (smc->manfid == MANFID_OSITECH)
897 smc->cfg |= CFG_IRQ_SEL_1 | CFG_IRQ_SEL_0;
898 if ((rev >> 4) >= 7)
899 smc->cfg |= CFG_MII_SELECT;
900 } else
901 mir = 0;
902
903 if (smc->cfg & CFG_MII_SELECT) {
904 SMC_SELECT_BANK(3);
905
906 for (i = 0; i < 32; i++) {
907 j = mdio_read(dev, i, 1);
908 if ((j != 0) && (j != 0xffff)) break;
909 }
910 smc->mii_if.phy_id = (i < 32) ? i : -1;
911
912 SMC_SELECT_BANK(0);
913 }
914
dd2e5a15 915 SET_NETDEV_DEV(dev, &link->dev);
1da177e4
LT		 916
917 if (register_netdev(dev) != 0) {
636b8116 918 dev_err(&link->dev, "register_netdev() failed\n");
1da177e4
LT		 919 goto config_undo;
920 }
921
636b8116
JP		 922 netdev_info(dev, "smc91c%s rev %d: io %#3lx, irq %d, hw_addr %pM\n",
923 name, (rev & 0x0f), dev->base_addr, dev->irq, dev->dev_addr);
1da177e4
LT		 924
925 if (rev > 0) {
926 if (mir & 0x3ff)
636b8116 927 netdev_info(dev, " %lu byte", mir);
1da177e4 928 else
636b8116
JP		 929 netdev_info(dev, " %lu kb", mir>>10);
930 pr_cont(" buffer, %s xcvr\n",
931 (smc->cfg & CFG_MII_SELECT) ? "MII" : if_names[dev->if_port]);
1da177e4
LT		 932 }
933
934 if (smc->cfg & CFG_MII_SELECT) {
935 if (smc->mii_if.phy_id != -1) {
636b8116
JP		 936 netdev_dbg(dev, " MII transceiver at index %d, status %x\n",
937 smc->mii_if.phy_id, j);
1da177e4 938 } else {
636b8116 939 netdev_notice(dev, " No MII transceivers found!\n");
1da177e4
LT		 940 }
941 }
15b99ac1 942 return 0;
1da177e4
LT		 943
944config_undo:
945 unregister_netdev(dev);
dd0fab5b 946config_failed:
1da177e4 947 smc91c92_release(link);
fb9e2d88 948 free_netdev(dev);
15b99ac1 949 return -ENODEV;
1da177e4
LT		 950} /* smc91c92_config */
951
fba395ee 952static void smc91c92_release(struct pcmcia_device *link)
1da177e4 953{
dd0fab5b 954 dev_dbg(&link->dev, "smc91c92_release\n");
cdb13808 955 if (link->resource[2]->end) {
5f2a71fc
DB		 956 struct net_device *dev = link->priv;
957 struct smc_private *smc = netdev_priv(dev);
958 iounmap(smc->base);
959 }
fba395ee 960 pcmcia_disable_device(link);
1da177e4
LT		 961}
962
1da177e4
LT		 963/*======================================================================
964
965 MII interface support for SMC91cXX based cards
966======================================================================*/
967
968#define MDIO_SHIFT_CLK 0x04
969#define MDIO_DATA_OUT 0x01
970#define MDIO_DIR_WRITE 0x08
971#define MDIO_DATA_WRITE0 (MDIO_DIR_WRITE)
972#define MDIO_DATA_WRITE1 (MDIO_DIR_WRITE | MDIO_DATA_OUT)
973#define MDIO_DATA_READ 0x02
974
906da809 975static void mdio_sync(unsigned int addr)
1da177e4
LT		 976{
977 int bits;
978 for (bits = 0; bits < 32; bits++) {
979 outb(MDIO_DATA_WRITE1, addr);
980 outb(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr);
981 }
982}
983
984static int mdio_read(struct net_device *dev, int phy_id, int loc)
985{
906da809 986 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT		 987 u_int cmd = (0x06<<10)|(phy_id<<5)|loc;
988 int i, retval = 0;
989
990 mdio_sync(addr);
991 for (i = 13; i >= 0; i--) {
992 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
993 outb(dat, addr);
994 outb(dat | MDIO_SHIFT_CLK, addr);
995 }
996 for (i = 19; i > 0; i--) {
997 outb(0, addr);
998 retval = (retval << 1) | ((inb(addr) & MDIO_DATA_READ) != 0);
999 outb(MDIO_SHIFT_CLK, addr);
1000 }
1001 return (retval>>1) & 0xffff;
1002}
1003
1004static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
1005{
906da809 1006 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT		 1007 u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value;
1008 int i;
1009
1010 mdio_sync(addr);
1011 for (i = 31; i >= 0; i--) {
1012 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1013 outb(dat, addr);
1014 outb(dat | MDIO_SHIFT_CLK, addr);
1015 }
1016 for (i = 1; i >= 0; i--) {
1017 outb(0, addr);
1018 outb(MDIO_SHIFT_CLK, addr);
1019 }
1020}
1021
1022/*======================================================================
1023
1024 The driver core code, most of which should be common with a
1025 non-PCMCIA implementation.
1026
1027======================================================================*/
1028
1029#ifdef PCMCIA_DEBUG
1030static void smc_dump(struct net_device *dev)
1031{
906da809 1032 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1033 u_short i, w, save;
1034 save = inw(ioaddr + BANK_SELECT);
1035 for (w = 0; w < 4; w++) {
1036 SMC_SELECT_BANK(w);
c501b1f5 1037 netdev_dbg(dev, "bank %d: ", w);
1da177e4 1038 for (i = 0; i < 14; i += 2)
636b8116
JP		 1039 pr_cont(" %04x", inw(ioaddr + i));
1040 pr_cont("\n");
1da177e4
LT		 1041 }
1042 outw(save, ioaddr + BANK_SELECT);
1043}
1044#endif
1045
1046static int smc_open(struct net_device *dev)
1047{
1048 struct smc_private *smc = netdev_priv(dev);
fba395ee 1049 struct pcmcia_device *link = smc->p_dev;
1da177e4 1050
dd0fab5b 1051 dev_dbg(&link->dev, "%s: smc_open(%p), ID/Window %4.4x.\n",
1da177e4 1052 dev->name, dev, inw(dev->base_addr + BANK_SELECT));
dd0fab5b
DB		 1053#ifdef PCMCIA_DEBUG
1054 smc_dump(dev);
1da177e4
LT		 1055#endif
1056
1057 /* Check that the PCMCIA card is still here. */
9940ec36 1058 if (!pcmcia_dev_present(link))
1da177e4
LT		 1059 return -ENODEV;
1060 /* Physical device present signature. */
1061 if (check_sig(link) < 0) {
636b8116 1062 netdev_info(dev, "Yikes! Bad chip signature!\n");
1da177e4
LT		 1063 return -ENODEV;
1064 }
1065 link->open++;
1066
1067 netif_start_queue(dev);
1068 smc->saved_skb = NULL;
1069 smc->packets_waiting = 0;
1070
1071 smc_reset(dev);
b8b01344
VT		 1072 setup_timer(&smc->media, media_check, (u_long)dev);
1073 mod_timer(&smc->media, jiffies + HZ);
1da177e4
LT		 1074
1075 return 0;
1076} /* smc_open */
1077
1078/*====================================================================*/
1079
1080static int smc_close(struct net_device *dev)
1081{
1082 struct smc_private *smc = netdev_priv(dev);
fba395ee 1083 struct pcmcia_device *link = smc->p_dev;
906da809 1084 unsigned int ioaddr = dev->base_addr;
1da177e4 1085
dd0fab5b 1086 dev_dbg(&link->dev, "%s: smc_close(), status %4.4x.\n",
1da177e4
LT		 1087 dev->name, inw(ioaddr + BANK_SELECT));
1088
1089 netif_stop_queue(dev);
1090
1091 /* Shut off all interrupts, and turn off the Tx and Rx sections.
1092 Don't bother to check for chip present. */
1093 SMC_SELECT_BANK(2); /* Nominally paranoia, but do no assume... */
1094 outw(0, ioaddr + INTERRUPT);
1095 SMC_SELECT_BANK(0);
1096 mask_bits(0xff00, ioaddr + RCR);
1097 mask_bits(0xff00, ioaddr + TCR);
1098
1099 /* Put the chip into power-down mode. */
1100 SMC_SELECT_BANK(1);
1101 outw(CTL_POWERDOWN, ioaddr + CONTROL );
1102
1103 link->open--;
1104 del_timer_sync(&smc->media);
1105
1106 return 0;
1107} /* smc_close */
1108
1109/*======================================================================
1110
1111 Transfer a packet to the hardware and trigger the packet send.
1112 This may be called at either from either the Tx queue code
1113 or the interrupt handler.
1114
1115======================================================================*/
1116
1117static void smc_hardware_send_packet(struct net_device * dev)
1118{
1119 struct smc_private *smc = netdev_priv(dev);
1120 struct sk_buff *skb = smc->saved_skb;
906da809 1121 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1122 u_char packet_no;
1123
1124 if (!skb) {
636b8116 1125 netdev_err(dev, "In XMIT with no packet to send\n");
1da177e4
LT		 1126 return;
1127 }
1128
1129 /* There should be a packet slot waiting. */
1130 packet_no = inw(ioaddr + PNR_ARR) >> 8;
1131 if (packet_no & 0x80) {
1132 /* If not, there is a hardware problem! Likely an ejected card. */
636b8116
JP		 1133 netdev_warn(dev, "hardware Tx buffer allocation failed, status %#2.2x\n",
1134 packet_no);
1da177e4
LT		 1135 dev_kfree_skb_irq(skb);
1136 smc->saved_skb = NULL;
1137 netif_start_queue(dev);
1138 return;
1139 }
1140
6fb7298c 1141 dev->stats.tx_bytes += skb->len;
1da177e4
LT		 1142 /* The card should use the just-allocated buffer. */
1143 outw(packet_no, ioaddr + PNR_ARR);
1144 /* point to the beginning of the packet */
1145 outw(PTR_AUTOINC , ioaddr + POINTER);
1146
1147 /* Send the packet length (+6 for status, length and ctl byte)
1148 and the status word (set to zeros). */
1149 {
1150 u_char *buf = skb->data;
1151 u_int length = skb->len; /* The chip will pad to ethernet min. */
1152
636b8116 1153 netdev_dbg(dev, "Trying to xmit packet of length %d\n", length);
1da177e4
LT		 1154
1155 /* send the packet length: +6 for status word, length, and ctl */
1156 outw(0, ioaddr + DATA_1);
1157 outw(length + 6, ioaddr + DATA_1);
1158 outsw(ioaddr + DATA_1, buf, length >> 1);
1159
1160 /* The odd last byte, if there is one, goes in the control word. */
1161 outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1);
1162 }
1163
1164 /* Enable the Tx interrupts, both Tx (TxErr) and TxEmpty. */
1165 outw(((IM_TX_INT|IM_TX_EMPTY_INT)<<8) |
1166 (inw(ioaddr + INTERRUPT) & 0xff00),
1167 ioaddr + INTERRUPT);
1168
1169 /* The chip does the rest of the work. */
1170 outw(MC_ENQUEUE , ioaddr + MMU_CMD);
1171
1172 smc->saved_skb = NULL;
1173 dev_kfree_skb_irq(skb);
860e9538 1174 netif_trans_update(dev);
1da177e4 1175 netif_start_queue(dev);
1da177e4
LT		 1176}
1177
1178/*====================================================================*/
1179
1180static void smc_tx_timeout(struct net_device *dev)
1181{
1182 struct smc_private *smc = netdev_priv(dev);
906da809 1183 unsigned int ioaddr = dev->base_addr;
1da177e4 1184
636b8116
JP		 1185 netdev_notice(dev, "transmit timed out, Tx_status %2.2x status %4.4x.\n",
1186 inw(ioaddr)&0xff, inw(ioaddr + 2));
6fb7298c 1187 dev->stats.tx_errors++;
1da177e4 1188 smc_reset(dev);
860e9538 1189 netif_trans_update(dev); /* prevent tx timeout */
1da177e4
LT		 1190 smc->saved_skb = NULL;
1191 netif_wake_queue(dev);
1192}
1193
dbf02fae
SH		 1194static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
1195 struct net_device *dev)
1da177e4
LT		 1196{
1197 struct smc_private *smc = netdev_priv(dev);
906da809 1198 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1199 u_short num_pages;
1200 short time_out, ir;
85e27831 1201 unsigned long flags;
1da177e4
LT		 1202
1203 netif_stop_queue(dev);
1204
636b8116
JP		 1205 netdev_dbg(dev, "smc_start_xmit(length = %d) called, status %04x\n",
1206 skb->len, inw(ioaddr + 2));
1da177e4
LT		 1207
1208 if (smc->saved_skb) {
1209 /* THIS SHOULD NEVER HAPPEN. */
6fb7298c 1210 dev->stats.tx_aborted_errors++;
c501b1f5 1211 netdev_dbg(dev, "Internal error -- sent packet while busy\n");
5b548140 1212 return NETDEV_TX_BUSY;
1da177e4
LT		 1213 }
1214 smc->saved_skb = skb;
1215
1216 num_pages = skb->len >> 8;
1217
1218 if (num_pages > 7) {
636b8116 1219 netdev_err(dev, "Far too big packet error: %d pages\n", num_pages);
1da177e4
LT		 1220 dev_kfree_skb (skb);
1221 smc->saved_skb = NULL;
6fb7298c 1222 dev->stats.tx_dropped++;
6ed10654 1223 return NETDEV_TX_OK; /* Do not re-queue this packet. */
1da177e4
LT		 1224 }
1225 /* A packet is now waiting. */
1226 smc->packets_waiting++;
1227
85e27831 1228 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT		 1229 SMC_SELECT_BANK(2); /* Paranoia, we should always be in window 2 */
1230
1231 /* need MC_RESET to keep the memory consistent. errata? */
1232 if (smc->rx_ovrn) {
1233 outw(MC_RESET, ioaddr + MMU_CMD);
1234 smc->rx_ovrn = 0;
1235 }
1236
1237 /* Allocate the memory; send the packet now if we win. */
1238 outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD);
1239 for (time_out = MEMORY_WAIT_TIME; time_out >= 0; time_out--) {
1240 ir = inw(ioaddr+INTERRUPT);
1241 if (ir & IM_ALLOC_INT) {
1242 /* Acknowledge the interrupt, send the packet. */
1243 outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT);
1244 smc_hardware_send_packet(dev); /* Send the packet now.. */
85e27831 1245 spin_unlock_irqrestore(&smc->lock, flags);
6ed10654 1246 return NETDEV_TX_OK;
1da177e4
LT		 1247 }
1248 }
1249
1250 /* Otherwise defer until the Tx-space-allocated interrupt. */
c501b1f5 1251 netdev_dbg(dev, "memory allocation deferred.\n");
1da177e4 1252 outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT);
85e27831 1253 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4 1254
6ed10654 1255 return NETDEV_TX_OK;
1da177e4
LT		 1256}
1257
1258/*======================================================================
1259
25985edc 1260 Handle a Tx anomalous event. Entered while in Window 2.
1da177e4
LT		 1261
1262======================================================================*/
1263
1264static void smc_tx_err(struct net_device * dev)
1265{
1266 struct smc_private *smc = netdev_priv(dev);
906da809 1267 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1268 int saved_packet = inw(ioaddr + PNR_ARR) & 0xff;
1269 int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f;
1270 int tx_status;
1271
1272 /* select this as the packet to read from */
1273 outw(packet_no, ioaddr + PNR_ARR);
1274
1275 /* read the first word from this packet */
1276 outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER);
1277
1278 tx_status = inw(ioaddr + DATA_1);
1279
6fb7298c
SH		 1280 dev->stats.tx_errors++;
1281 if (tx_status & TS_LOSTCAR) dev->stats.tx_carrier_errors++;
1282 if (tx_status & TS_LATCOL) dev->stats.tx_window_errors++;
1da177e4 1283 if (tx_status & TS_16COL) {
6fb7298c 1284 dev->stats.tx_aborted_errors++;
1da177e4
LT		 1285 smc->tx_err++;
1286 }
1287
1288 if (tx_status & TS_SUCCESS) {
636b8116 1289 netdev_notice(dev, "Successful packet caused error interrupt?\n");
1da177e4
LT		 1290 }
1291 /* re-enable transmit */
1292 SMC_SELECT_BANK(0);
1293 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1294 SMC_SELECT_BANK(2);
1295
1296 outw(MC_FREEPKT, ioaddr + MMU_CMD); /* Free the packet memory. */
1297
1298 /* one less packet waiting for me */
1299 smc->packets_waiting--;
1300
1301 outw(saved_packet, ioaddr + PNR_ARR);
1da177e4
LT		 1302}
1303
1304/*====================================================================*/
1305
1306static void smc_eph_irq(struct net_device *dev)
1307{
1308 struct smc_private *smc = netdev_priv(dev);
906da809 1309 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1310 u_short card_stats, ephs;
1311
1312 SMC_SELECT_BANK(0);
1313 ephs = inw(ioaddr + EPH);
c501b1f5
BB		 1314 netdev_dbg(dev, "Ethernet protocol handler interrupt, status %4.4x.\n",
1315 ephs);
1da177e4
LT		 1316 /* Could be a counter roll-over warning: update stats. */
1317 card_stats = inw(ioaddr + COUNTER);
1318 /* single collisions */
6fb7298c 1319 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT		 1320 card_stats >>= 4;
1321 /* multiple collisions */
6fb7298c 1322 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT		 1323#if 0 /* These are for when linux supports these statistics */
1324 card_stats >>= 4; /* deferred */
1325 card_stats >>= 4; /* excess deferred */
1326#endif
1327 /* If we had a transmit error we must re-enable the transmitter. */
1328 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1329
1330 /* Clear a link error interrupt. */
1331 SMC_SELECT_BANK(1);
1332 outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL);
1333 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1334 ioaddr + CONTROL);
1335 SMC_SELECT_BANK(2);
1336}
1337
1338/*====================================================================*/
1339
7d12e780 1340static irqreturn_t smc_interrupt(int irq, void *dev_id)
1da177e4
LT		 1341{
1342 struct net_device *dev = dev_id;
1343 struct smc_private *smc = netdev_priv(dev);
906da809 1344 unsigned int ioaddr;
1da177e4
LT		 1345 u_short saved_bank, saved_pointer, mask, status;
1346 unsigned int handled = 1;
1347 char bogus_cnt = INTR_WORK; /* Work we are willing to do. */
1348
1349 if (!netif_device_present(dev))
1350 return IRQ_NONE;
1351
1352 ioaddr = dev->base_addr;
1353
c501b1f5
BB		 1354 netdev_dbg(dev, "SMC91c92 interrupt %d at %#x.\n",
1355 irq, ioaddr);
1da177e4 1356
85e27831 1357 spin_lock(&smc->lock);
1da177e4
LT		 1358 smc->watchdog = 0;
1359 saved_bank = inw(ioaddr + BANK_SELECT);
1360 if ((saved_bank & 0xff00) != 0x3300) {
1361 /* The device does not exist -- the card could be off-line, or
1362 maybe it has been ejected. */
c501b1f5
BB		 1363 netdev_dbg(dev, "SMC91c92 interrupt %d for non-existent/ejected device.\n",
1364 irq);
1da177e4
LT		 1365 handled = 0;
1366 goto irq_done;
1367 }
1368
1369 SMC_SELECT_BANK(2);
1370 saved_pointer = inw(ioaddr + POINTER);
1371 mask = inw(ioaddr + INTERRUPT) >> 8;
1372 /* clear all interrupts */
1373 outw(0, ioaddr + INTERRUPT);
1374
1375 do { /* read the status flag, and mask it */
1376 status = inw(ioaddr + INTERRUPT) & 0xff;
c501b1f5
BB		 1377 netdev_dbg(dev, "Status is %#2.2x (mask %#2.2x).\n",
1378 status, mask);
1da177e4
LT		 1379 if ((status & mask) == 0) {
1380 if (bogus_cnt == INTR_WORK)
1381 handled = 0;
1382 break;
1383 }
1384 if (status & IM_RCV_INT) {
1385 /* Got a packet(s). */
1386 smc_rx(dev);
1387 }
1388 if (status & IM_TX_INT) {
1389 smc_tx_err(dev);
1390 outw(IM_TX_INT, ioaddr + INTERRUPT);
1391 }
1392 status &= mask;
1393 if (status & IM_TX_EMPTY_INT) {
1394 outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT);
1395 mask &= ~IM_TX_EMPTY_INT;
6fb7298c 1396 dev->stats.tx_packets += smc->packets_waiting;
1da177e4
LT		 1397 smc->packets_waiting = 0;
1398 }
1399 if (status & IM_ALLOC_INT) {
1400 /* Clear this interrupt so it doesn't happen again */
1401 mask &= ~IM_ALLOC_INT;
1402
1403 smc_hardware_send_packet(dev);
1404
1405 /* enable xmit interrupts based on this */
1406 mask |= (IM_TX_EMPTY_INT | IM_TX_INT);
1407
1408 /* and let the card send more packets to me */
1409 netif_wake_queue(dev);
1410 }
1411 if (status & IM_RX_OVRN_INT) {
6fb7298c
SH		 1412 dev->stats.rx_errors++;
1413 dev->stats.rx_fifo_errors++;
1da177e4
LT		 1414 if (smc->duplex)
1415 smc->rx_ovrn = 1; /* need MC_RESET outside smc_interrupt */
1416 outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT);
1417 }
1418 if (status & IM_EPH_INT)
1419 smc_eph_irq(dev);
1420 } while (--bogus_cnt);
1421
c501b1f5
BB		 1422 netdev_dbg(dev, " Restoring saved registers mask %2.2x bank %4.4x pointer %4.4x.\n",
1423 mask, saved_bank, saved_pointer);
1da177e4
LT		 1424
1425 /* restore state register */
1426 outw((mask<<8), ioaddr + INTERRUPT);
1427 outw(saved_pointer, ioaddr + POINTER);
1428 SMC_SELECT_BANK(saved_bank);
1429
c501b1f5 1430 netdev_dbg(dev, "Exiting interrupt IRQ%d.\n", irq);
1da177e4
LT		 1431
1432irq_done:
1433
1434 if ((smc->manfid == MANFID_OSITECH) &&
1435 (smc->cardid != PRODID_OSITECH_SEVEN)) {
1436 /* Retrigger interrupt if needed */
1437 mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR);
1438 set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR);
1439 }
1440 if (smc->manfid == MANFID_MOTOROLA) {
1441 u_char cor;
1442 cor = readb(smc->base + MOT_UART + CISREG_COR);
1443 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR);
1444 writeb(cor, smc->base + MOT_UART + CISREG_COR);
1445 cor = readb(smc->base + MOT_LAN + CISREG_COR);
1446 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR);
1447 writeb(cor, smc->base + MOT_LAN + CISREG_COR);
1448 }
9735b7ef
KK		 1449
1450 if ((smc->base != NULL) && /* Megahertz MFC's */
1451 (smc->manfid == MANFID_MEGAHERTZ) &&
1452 (smc->cardid == PRODID_MEGAHERTZ_EM3288)) {
1453
1454 u_char tmp;
1455 tmp = readb(smc->base+MEGAHERTZ_ISR);
1456 tmp = readb(smc->base+MEGAHERTZ_ISR);
1457
1458 /* Retrigger interrupt if needed */
1459 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1460 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1da177e4 1461 }
9735b7ef 1462
85e27831 1463 spin_unlock(&smc->lock);
1da177e4
LT		 1464 return IRQ_RETVAL(handled);
1465}
1466
1467/*====================================================================*/
1468
1469static void smc_rx(struct net_device *dev)
1470{
906da809 1471 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1472 int rx_status;
1473 int packet_length; /* Caution: not frame length, rather words
1474 to transfer from the chip. */
1475
1476 /* Assertion: we are in Window 2. */
1477
1478 if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) {
636b8116 1479 netdev_err(dev, "smc_rx() with nothing on Rx FIFO\n");
1da177e4
LT		 1480 return;
1481 }
1482
1483 /* Reset the read pointer, and read the status and packet length. */
1484 outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER);
1485 rx_status = inw(ioaddr + DATA_1);
1486 packet_length = inw(ioaddr + DATA_1) & 0x07ff;
1487
c501b1f5
BB		 1488 netdev_dbg(dev, "Receive status %4.4x length %d.\n",
1489 rx_status, packet_length);
1da177e4 1490
c501b1f5 1491 if (!(rx_status & RS_ERRORS)) {
1da177e4
LT		 1492 /* do stuff to make a new packet */
1493 struct sk_buff *skb;
1494
1495 /* Note: packet_length adds 5 or 6 extra bytes here! */
dae2e9f4 1496 skb = netdev_alloc_skb(dev, packet_length+2);
1da177e4
LT		 1497
1498 if (skb == NULL) {
c501b1f5 1499 netdev_dbg(dev, "Low memory, packet dropped.\n");
6fb7298c 1500 dev->stats.rx_dropped++;
1da177e4
LT		 1501 outw(MC_RELEASE, ioaddr + MMU_CMD);
1502 return;
1503 }
1504
1505 packet_length -= (rx_status & RS_ODDFRAME ? 5 : 6);
1506 skb_reserve(skb, 2);
1507 insw(ioaddr+DATA_1, skb_put(skb, packet_length),
1508 (packet_length+1)>>1);
1509 skb->protocol = eth_type_trans(skb, dev);
1510
1da177e4
LT		 1511 netif_rx(skb);
1512 dev->last_rx = jiffies;
6fb7298c
SH		 1513 dev->stats.rx_packets++;
1514 dev->stats.rx_bytes += packet_length;
1da177e4 1515 if (rx_status & RS_MULTICAST)
6fb7298c 1516 dev->stats.multicast++;
1da177e4
LT		 1517 } else {
1518 /* error ... */
6fb7298c 1519 dev->stats.rx_errors++;
1da177e4 1520
6fb7298c 1521 if (rx_status & RS_ALGNERR) dev->stats.rx_frame_errors++;
1da177e4 1522 if (rx_status & (RS_TOOSHORT | RS_TOOLONG))
6fb7298c
SH		 1523 dev->stats.rx_length_errors++;
1524 if (rx_status & RS_BADCRC) dev->stats.rx_crc_errors++;
1da177e4
LT		 1525 }
1526 /* Let the MMU free the memory of this packet. */
1527 outw(MC_RELEASE, ioaddr + MMU_CMD);
1da177e4
LT		 1528}
1529
1da177e4
LT		 1530/*======================================================================
1531
1532 Set the receive mode.
1533
1534 This routine is used by both the protocol level to notify us of
1535 promiscuous/multicast mode changes, and by the open/reset code to
1536 initialize the Rx registers. We always set the multicast list and
1537 leave the receiver running.
1538
1539======================================================================*/
1540
1541static void set_rx_mode(struct net_device *dev)
1542{
906da809 1543 unsigned int ioaddr = dev->base_addr;
1da177e4 1544 struct smc_private *smc = netdev_priv(dev);
a6d37024 1545 unsigned char multicast_table[8];
1da177e4
LT		 1546 unsigned long flags;
1547 u_short rx_cfg_setting;
a6d37024
KK		 1548 int i;
1549
1550 memset(multicast_table, 0, sizeof(multicast_table));
1da177e4
LT		 1551
1552 if (dev->flags & IFF_PROMISC) {
1da177e4
LT		 1553 rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti;
1554 } else if (dev->flags & IFF_ALLMULTI)
1555 rx_cfg_setting = RxStripCRC | RxEnable | RxAllMulti;
1556 else {
4cd24eaf 1557 if (!netdev_mc_empty(dev)) {
22bedad3 1558 struct netdev_hw_addr *ha;
91fea585 1559
22bedad3
JP		 1560 netdev_for_each_mc_addr(ha, dev) {
1561 u_int position = ether_crc(6, ha->addr);
91fea585
JP		 1562 multicast_table[position >> 29] |= 1 << ((position >> 26) & 7);
1563 }
1da177e4
LT		 1564 }
1565 rx_cfg_setting = RxStripCRC | RxEnable;
1566 }
1567
1568 /* Load MC table and Rx setting into the chip without interrupts. */
1569 spin_lock_irqsave(&smc->lock, flags);
1570 SMC_SELECT_BANK(3);
a6d37024
KK		 1571 for (i = 0; i < 8; i++)
1572 outb(multicast_table[i], ioaddr + MULTICAST0 + i);
1da177e4
LT		 1573 SMC_SELECT_BANK(0);
1574 outw(rx_cfg_setting, ioaddr + RCR);
1575 SMC_SELECT_BANK(2);
1576 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1577}
1578
1579/*======================================================================
1580
1581 Senses when a card's config changes. Here, it's coax or TP.
1582
1583======================================================================*/
1584
1585static int s9k_config(struct net_device *dev, struct ifmap *map)
1586{
1587 struct smc_private *smc = netdev_priv(dev);
1588 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
1589 if (smc->cfg & CFG_MII_SELECT)
1590 return -EOPNOTSUPP;
1591 else if (map->port > 2)
1592 return -EINVAL;
1593 dev->if_port = map->port;
636b8116 1594 netdev_info(dev, "switched to %s port\n", if_names[dev->if_port]);
1da177e4
LT		 1595 smc_reset(dev);
1596 }
1597 return 0;
1598}
1599
1600/*======================================================================
1601
1602 Reset the chip, reloading every register that might be corrupted.
1603
1604======================================================================*/
1605
1606/*
1607 Set transceiver type, perhaps to something other than what the user
1608 specified in dev->if_port.
1609*/
1610static void smc_set_xcvr(struct net_device *dev, int if_port)
1611{
1612 struct smc_private *smc = netdev_priv(dev);
906da809 1613 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1614 u_short saved_bank;
1615
1616 saved_bank = inw(ioaddr + BANK_SELECT);
1617 SMC_SELECT_BANK(1);
1618 if (if_port == 2) {
1619 outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG);
1620 if ((smc->manfid == MANFID_OSITECH) &&
1621 (smc->cardid != PRODID_OSITECH_SEVEN))
1622 set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1623 smc->media_status = ((dev->if_port == 0) ? 0x0001 : 0x0002);
1624 } else {
1625 outw(smc->cfg, ioaddr + CONFIG);
1626 if ((smc->manfid == MANFID_OSITECH) &&
1627 (smc->cardid != PRODID_OSITECH_SEVEN))
1628 mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1629 smc->media_status = ((dev->if_port == 0) ? 0x0012 : 0x4001);
1630 }
1631 SMC_SELECT_BANK(saved_bank);
1632}
1633
1634static void smc_reset(struct net_device *dev)
1635{
906da809 1636 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1637 struct smc_private *smc = netdev_priv(dev);
1638 int i;
1639
c501b1f5 1640 netdev_dbg(dev, "smc91c92 reset called.\n");
1da177e4
LT		 1641
1642 /* The first interaction must be a write to bring the chip out
1643 of sleep mode. */
1644 SMC_SELECT_BANK(0);
1645 /* Reset the chip. */
1646 outw(RCR_SOFTRESET, ioaddr + RCR);
1647 udelay(10);
1648
1649 /* Clear the transmit and receive configuration registers. */
1650 outw(RCR_CLEAR, ioaddr + RCR);
1651 outw(TCR_CLEAR, ioaddr + TCR);
1652
1653 /* Set the Window 1 control, configuration and station addr registers.
1654 No point in writing the I/O base register ;-> */
1655 SMC_SELECT_BANK(1);
d6e05edc 1656 /* Automatically release successfully transmitted packets,
1da177e4
LT		 1657 Accept link errors, counter and Tx error interrupts. */
1658 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1659 ioaddr + CONTROL);
1660 smc_set_xcvr(dev, dev->if_port);
1661 if ((smc->manfid == MANFID_OSITECH) &&
1662 (smc->cardid != PRODID_OSITECH_SEVEN))
1663 outw((dev->if_port == 2 ? OSI_AUI_PWR : 0) |
1664 (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00),
1665 ioaddr - 0x10 + OSITECH_AUI_PWR);
1666
1667 /* Fill in the physical address. The databook is wrong about the order! */
1668 for (i = 0; i < 6; i += 2)
1669 outw((dev->dev_addr[i+1]<<8)+dev->dev_addr[i],
1670 ioaddr + ADDR0 + i);
1671
1672 /* Reset the MMU */
1673 SMC_SELECT_BANK(2);
1674 outw(MC_RESET, ioaddr + MMU_CMD);
1675 outw(0, ioaddr + INTERRUPT);
1676
1677 /* Re-enable the chip. */
1678 SMC_SELECT_BANK(0);
1679 outw(((smc->cfg & CFG_MII_SELECT) ? 0 : TCR_MONCSN) |
1680 TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR);
1681 set_rx_mode(dev);
1682
1683 if (smc->cfg & CFG_MII_SELECT) {
1684 SMC_SELECT_BANK(3);
1685
1686 /* Reset MII */
1687 mdio_write(dev, smc->mii_if.phy_id, 0, 0x8000);
1688
1689 /* Advertise 100F, 100H, 10F, 10H */
1690 mdio_write(dev, smc->mii_if.phy_id, 4, 0x01e1);
1691
1692 /* Restart MII autonegotiation */
1693 mdio_write(dev, smc->mii_if.phy_id, 0, 0x0000);
1694 mdio_write(dev, smc->mii_if.phy_id, 0, 0x1200);
1695 }
1696
1697 /* Enable interrupts. */
1698 SMC_SELECT_BANK(2);
1699 outw((IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT) << 8,
1700 ioaddr + INTERRUPT);
1701}
1702
1703/*======================================================================
1704
1705 Media selection timer routine
1706
1707======================================================================*/
1708
1709static void media_check(u_long arg)
1710{
1711 struct net_device *dev = (struct net_device *) arg;
1712 struct smc_private *smc = netdev_priv(dev);
906da809 1713 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1714 u_short i, media, saved_bank;
1715 u_short link;
85e27831
K		 1716 unsigned long flags;
1717
1718 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT		 1719
1720 saved_bank = inw(ioaddr + BANK_SELECT);
1721
1722 if (!netif_device_present(dev))
1723 goto reschedule;
1724
1725 SMC_SELECT_BANK(2);
1726
1727 /* need MC_RESET to keep the memory consistent. errata? */
1728 if (smc->rx_ovrn) {
1729 outw(MC_RESET, ioaddr + MMU_CMD);
1730 smc->rx_ovrn = 0;
1731 }
1732 i = inw(ioaddr + INTERRUPT);
1733 SMC_SELECT_BANK(0);
1734 media = inw(ioaddr + EPH) & EPH_LINK_OK;
1735 SMC_SELECT_BANK(1);
1736 media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1;
1737
2a915157
KK		 1738 SMC_SELECT_BANK(saved_bank);
1739 spin_unlock_irqrestore(&smc->lock, flags);
1740
1da177e4
LT		 1741 /* Check for pending interrupt with watchdog flag set: with
1742 this, we can limp along even if the interrupt is blocked */
1743 if (smc->watchdog++ && ((i>>8) & i)) {
1744 if (!smc->fast_poll)
636b8116 1745 netdev_info(dev, "interrupt(s) dropped!\n");
2a915157 1746 local_irq_save(flags);
e363d138 1747 smc_interrupt(dev->irq, dev);
2a915157 1748 local_irq_restore(flags);
1da177e4
LT		 1749 smc->fast_poll = HZ;
1750 }
1751 if (smc->fast_poll) {
1752 smc->fast_poll--;
1753 smc->media.expires = jiffies + HZ/100;
1754 add_timer(&smc->media);
1da177e4
LT		 1755 return;
1756 }
1757
2a915157
KK		 1758 spin_lock_irqsave(&smc->lock, flags);
1759
1760 saved_bank = inw(ioaddr + BANK_SELECT);
1761
1da177e4
LT		 1762 if (smc->cfg & CFG_MII_SELECT) {
1763 if (smc->mii_if.phy_id < 0)
1764 goto reschedule;
1765
1766 SMC_SELECT_BANK(3);
1767 link = mdio_read(dev, smc->mii_if.phy_id, 1);
1768 if (!link || (link == 0xffff)) {
636b8116 1769 netdev_info(dev, "MII is missing!\n");
1da177e4
LT		 1770 smc->mii_if.phy_id = -1;
1771 goto reschedule;
1772 }
1773
1774 link &= 0x0004;
1775 if (link != smc->link_status) {
1776 u_short p = mdio_read(dev, smc->mii_if.phy_id, 5);
636b8116 1777 netdev_info(dev, "%s link beat\n", link ? "found" : "lost");
1da177e4
LT		 1778 smc->duplex = (((p & 0x0100) || ((p & 0x1c0) == 0x40))
1779 ? TCR_FDUPLX : 0);
1780 if (link) {
636b8116
JP		 1781 netdev_info(dev, "autonegotiation complete: "
1782 "%dbaseT-%cD selected\n",
1783 (p & 0x0180) ? 100 : 10, smc->duplex ? 'F' : 'H');
1da177e4
LT		 1784 }
1785 SMC_SELECT_BANK(0);
1786 outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR);
1787 smc->link_status = link;
1788 }
1789 goto reschedule;
1790 }
1791
1792 /* Ignore collisions unless we've had no rx's recently */
4851d3aa 1793 if (time_after(jiffies, dev->last_rx + HZ)) {
1da177e4
LT		 1794 if (smc->tx_err || (smc->media_status & EPH_16COL))
1795 media |= EPH_16COL;
1796 }
1797 smc->tx_err = 0;
1798
1799 if (media != smc->media_status) {
1800 if ((media & smc->media_status & 1) &&
1801 ((smc->media_status ^ media) & EPH_LINK_OK))
636b8116
JP		 1802 netdev_info(dev, "%s link beat\n",
1803 smc->media_status & EPH_LINK_OK ? "lost" : "found");
1da177e4
LT		 1804 else if ((media & smc->media_status & 2) &&
1805 ((smc->media_status ^ media) & EPH_16COL))
636b8116
JP		 1806 netdev_info(dev, "coax cable %s\n",
1807 media & EPH_16COL ? "problem" : "ok");
1da177e4
LT		 1808 if (dev->if_port == 0) {
1809 if (media & 1) {
1810 if (media & EPH_LINK_OK)
636b8116 1811 netdev_info(dev, "flipped to 10baseT\n");
1da177e4
LT		 1812 else
1813 smc_set_xcvr(dev, 2);
1814 } else {
1815 if (media & EPH_16COL)
1816 smc_set_xcvr(dev, 1);
1817 else
636b8116 1818 netdev_info(dev, "flipped to 10base2\n");
1da177e4
LT		 1819 }
1820 }
1821 smc->media_status = media;
1822 }
1823
1824reschedule:
1825 smc->media.expires = jiffies + HZ;
1826 add_timer(&smc->media);
1827 SMC_SELECT_BANK(saved_bank);
85e27831 1828 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1829}
1830
1831static int smc_link_ok(struct net_device *dev)
1832{
906da809 1833 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1834 struct smc_private *smc = netdev_priv(dev);
1835
1836 if (smc->cfg & CFG_MII_SELECT) {
1837 return mii_link_ok(&smc->mii_if);
1838 } else {
1839 SMC_SELECT_BANK(0);
1840 return inw(ioaddr + EPH) & EPH_LINK_OK;
1841 }
1842}
1843
1844static int smc_netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1845{
1846 u16 tmp;
906da809 1847 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1848
1849 ecmd->supported = (SUPPORTED_TP | SUPPORTED_AUI |
1850 SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full);
1851
1852 SMC_SELECT_BANK(1);
1853 tmp = inw(ioaddr + CONFIG);
1854 ecmd->port = (tmp & CFG_AUI_SELECT) ? PORT_AUI : PORT_TP;
1855 ecmd->transceiver = XCVR_INTERNAL;
70739497 1856 ethtool_cmd_speed_set(ecmd, SPEED_10);
1da177e4
LT		 1857 ecmd->phy_address = ioaddr + MGMT;
1858
1859 SMC_SELECT_BANK(0);
1860 tmp = inw(ioaddr + TCR);
1861 ecmd->duplex = (tmp & TCR_FDUPLX) ? DUPLEX_FULL : DUPLEX_HALF;
1862
1863 return 0;
1864}
1865
1866static int smc_netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1867{
1868 u16 tmp;
906da809 1869 unsigned int ioaddr = dev->base_addr;
1da177e4 1870
25db0338
DD		 1871 if (ethtool_cmd_speed(ecmd) != SPEED_10)
1872 return -EINVAL;
1da177e4
LT		 1873 if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
1874 return -EINVAL;
1875 if (ecmd->port != PORT_TP && ecmd->port != PORT_AUI)
1876 return -EINVAL;
1877 if (ecmd->transceiver != XCVR_INTERNAL)
1878 return -EINVAL;
1879
1880 if (ecmd->port == PORT_AUI)
1881 smc_set_xcvr(dev, 1);
1882 else
1883 smc_set_xcvr(dev, 0);
1884
1885 SMC_SELECT_BANK(0);
1886 tmp = inw(ioaddr + TCR);
1887 if (ecmd->duplex == DUPLEX_FULL)
1888 tmp |= TCR_FDUPLX;
1889 else
1890 tmp &= ~TCR_FDUPLX;
1891 outw(tmp, ioaddr + TCR);
1892
1893 return 0;
1894}
1895
1896static int check_if_running(struct net_device *dev)
1897{
1898 if (!netif_running(dev))
1899 return -EINVAL;
1900 return 0;
1901}
1902
1903static void smc_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1904{
33a5ba14
RJ		 1905 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
1906 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
1da177e4
LT		 1907}
1908
1909static int smc_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1910{
1911 struct smc_private *smc = netdev_priv(dev);
906da809 1912 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1913 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1914 int ret;
2a915157 1915 unsigned long flags;
1da177e4 1916
2a915157 1917 spin_lock_irqsave(&smc->lock, flags);
85e27831 1918 SMC_SELECT_BANK(3);
1da177e4
LT		 1919 if (smc->cfg & CFG_MII_SELECT)
1920 ret = mii_ethtool_gset(&smc->mii_if, ecmd);
1921 else
1922 ret = smc_netdev_get_ecmd(dev, ecmd);
1da177e4 1923 SMC_SELECT_BANK(saved_bank);
2a915157 1924 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1925 return ret;
1926}
1927
1928static int smc_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1929{
1930 struct smc_private *smc = netdev_priv(dev);
906da809 1931 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1932 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1933 int ret;
2a915157 1934 unsigned long flags;
1da177e4 1935
2a915157 1936 spin_lock_irqsave(&smc->lock, flags);
85e27831 1937 SMC_SELECT_BANK(3);
1da177e4
LT		 1938 if (smc->cfg & CFG_MII_SELECT)
1939 ret = mii_ethtool_sset(&smc->mii_if, ecmd);
1940 else
1941 ret = smc_netdev_set_ecmd(dev, ecmd);
1da177e4 1942 SMC_SELECT_BANK(saved_bank);
2a915157 1943 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1944 return ret;
1945}
1946
1947static u32 smc_get_link(struct net_device *dev)
1948{
1949 struct smc_private *smc = netdev_priv(dev);
906da809 1950 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1951 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1952 u32 ret;
2a915157 1953 unsigned long flags;
1da177e4 1954
2a915157 1955 spin_lock_irqsave(&smc->lock, flags);
85e27831 1956 SMC_SELECT_BANK(3);
1da177e4 1957 ret = smc_link_ok(dev);
1da177e4 1958 SMC_SELECT_BANK(saved_bank);
2a915157 1959 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1960 return ret;
1961}
1962
1da177e4
LT		 1963static int smc_nway_reset(struct net_device *dev)
1964{
1965 struct smc_private *smc = netdev_priv(dev);
1966 if (smc->cfg & CFG_MII_SELECT) {
906da809 1967 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1968 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1969 int res;
1970
1971 SMC_SELECT_BANK(3);
1972 res = mii_nway_restart(&smc->mii_if);
1973 SMC_SELECT_BANK(saved_bank);
1974
1975 return res;
1976 } else
1977 return -EOPNOTSUPP;
1978}
1979
7282d491 1980static const struct ethtool_ops ethtool_ops = {
1da177e4
LT		 1981 .begin = check_if_running,
1982 .get_drvinfo = smc_get_drvinfo,
1983 .get_settings = smc_get_settings,
1984 .set_settings = smc_set_settings,
1985 .get_link = smc_get_link,
1da177e4
LT		 1986 .nway_reset = smc_nway_reset,
1987};
1988
1989static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
1990{
1991 struct smc_private *smc = netdev_priv(dev);
1992 struct mii_ioctl_data *mii = if_mii(rq);
1993 int rc = 0;
1994 u16 saved_bank;
906da809 1995 unsigned int ioaddr = dev->base_addr;
2a915157 1996 unsigned long flags;
1da177e4
LT		 1997
1998 if (!netif_running(dev))
1999 return -EINVAL;
2000
2a915157 2001 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT		 2002 saved_bank = inw(ioaddr + BANK_SELECT);
2003 SMC_SELECT_BANK(3);
2004 rc = generic_mii_ioctl(&smc->mii_if, mii, cmd, NULL);
2005 SMC_SELECT_BANK(saved_bank);
2a915157 2006 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 2007 return rc;
2008}
2009
25f8f54f 2010static const struct pcmcia_device_id smc91c92_ids[] = {
5c672220
DB		 2011 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0109, 0x0501),
2012 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0140, 0x000a),
2013 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3288", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x04cd2988, 0x46a52d63),
2014 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3336", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x0143b773, 0x46a52d63),
2015 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "EM1144T", "PCMCIA MODEM", 0xf510db04, 0x856d66c8, 0xbd6c43ef),
2016 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "XJEM1144/CCEM1144", "PCMCIA MODEM", 0xf510db04, 0x52d21e1e, 0xbd6c43ef),
2017 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c),
2018 PCMCIA_PFC_DEVICE_PROD_ID12(0, "MEGAHERTZ", "XJEM1144/CCEM1144", 0xf510db04, 0x52d21e1e),
d277ad0e
K		 2019 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Diamonds Modem+Ethernet", 0xc2f80cd, 0x656947b9),
2020 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Hearts Modem+Ethernet", 0xc2f80cd, 0xdc9ba5ed),
5c672220
DB		 2021 PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x016c, 0x0020),
2022 PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0023),
2023 PCMCIA_DEVICE_PROD_ID123("BASICS by New Media Corporation", "Ethernet", "SMC91C94", 0x23c78a9d, 0x00b2e941, 0xcef397fb),
2024 PCMCIA_DEVICE_PROD_ID12("ARGOSY", "Fast Ethernet PCCard", 0x78f308dc, 0xdcea68bc),
2025 PCMCIA_DEVICE_PROD_ID12("dit Co., Ltd.", "PC Card-10/100BTX", 0xe59365c8, 0x6a2161d1),
2026 PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L100C", 0x6a26d1cf, 0xc16ce9c5),
2027 PCMCIA_DEVICE_PROD_ID12("Farallon", "Farallon Enet", 0x58d93fc4, 0x244734e9),
2028 PCMCIA_DEVICE_PROD_ID12("Megahertz", "CC10BT/2", 0x33234748, 0x3c95b953),
2029 PCMCIA_DEVICE_PROD_ID12("MELCO/SMC", "LPC-TX", 0xa2cd8e6d, 0x42da662a),
d277ad0e
K		 2030 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Four of Diamonds Ethernet", 0xc2f80cd, 0xb3466314),
2031 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Seven of Diamonds Ethernet", 0xc2f80cd, 0x194b650a),
5c672220
DB		 2032 PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast Ethernet PCCard", 0x281f1c5d, 0xdcea68bc),
2033 PCMCIA_DEVICE_PROD_ID12("Psion", "10Mb Ethernet", 0x4ef00b21, 0x844be9e9),
2034 PCMCIA_DEVICE_PROD_ID12("SMC", "EtherEZ Ethernet 8020", 0xc4f8b18b, 0x4a0eeb2d),
2035 /* These conflict with other cards! */
2036 /* PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0100), */
2037 /* PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), */
2038 PCMCIA_DEVICE_NULL,
2039};
2040MODULE_DEVICE_TABLE(pcmcia, smc91c92_ids);
2041
1da177e4
LT		 2042static struct pcmcia_driver smc91c92_cs_driver = {
2043 .owner = THIS_MODULE,
2e9b981a 2044 .name = "smc91c92_cs",
15b99ac1 2045 .probe = smc91c92_probe,
cc3b4866 2046 .remove = smc91c92_detach,
5c672220 2047 .id_table = smc91c92_ids,
98e4c28b
DB		 2048 .suspend = smc91c92_suspend,
2049 .resume = smc91c92_resume,
1da177e4 2050};
fdd3f29e 2051module_pcmcia_driver(smc91c92_cs_driver);
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