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[mirror_ubuntu-artful-kernel.git] / drivers / net / ethernet / smsc / smc91c92_cs.c
CommitLineData
1da177e4
LT		 1/*======================================================================
2
3 A PCMCIA ethernet driver for SMC91c92-based cards.
4
5 This driver supports Megahertz PCMCIA ethernet cards; and
6 Megahertz, Motorola, Ositech, and Psion Dacom ethernet/modem
7 multifunction cards.
8
9 Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net
10
11 smc91c92_cs.c 1.122 2002/10/25 06:26:39
12
13 This driver contains code written by Donald Becker
14 (becker@scyld.com), Rowan Hughes (x-csrdh@jcu.edu.au),
15 David Hinds (dahinds@users.sourceforge.net), and Erik Stahlman
16 (erik@vt.edu). Donald wrote the SMC 91c92 code using parts of
17 Erik's SMC 91c94 driver. Rowan wrote a similar driver, and I've
18 incorporated some parts of his driver here. I (Dave) wrote most
19 of the PCMCIA glue code, and the Ositech support code. Kelly
20 Stephens (kstephen@holli.com) added support for the Motorola
21 Mariner, with help from Allen Brost.
22
23 This software may be used and distributed according to the terms of
24 the GNU General Public License, incorporated herein by reference.
25
26======================================================================*/
27
636b8116
JP		 28#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29
1da177e4
LT		 30#include <linux/module.h>
31#include <linux/kernel.h>
1da177e4
LT		 32#include <linux/slab.h>
33#include <linux/string.h>
34#include <linux/timer.h>
35#include <linux/interrupt.h>
36#include <linux/delay.h>
37#include <linux/crc32.h>
38#include <linux/netdevice.h>
39#include <linux/etherdevice.h>
40#include <linux/skbuff.h>
41#include <linux/if_arp.h>
42#include <linux/ioport.h>
43#include <linux/ethtool.h>
44#include <linux/mii.h>
4851d3aa 45#include <linux/jiffies.h>
75bf758f 46#include <linux/firmware.h>
1da177e4 47
1da177e4
LT		 48#include <pcmcia/cistpl.h>
49#include <pcmcia/cisreg.h>
50#include <pcmcia/ciscode.h>
51#include <pcmcia/ds.h>
50db3fdb 52#include <pcmcia/ss.h>
1da177e4
LT		 53
54#include <asm/io.h>
1da177e4
LT		 55#include <asm/uaccess.h>
56
1da177e4
LT		 57/*====================================================================*/
58
f71e1309 59static const char *if_names[] = { "auto", "10baseT", "10base2"};
1da177e4 60
75bf758f
JSR		 61/* Firmware name */
62#define FIRMWARE_NAME "ositech/Xilinx7OD.bin"
63
1da177e4
LT		 64/* Module parameters */
65
66MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver");
67MODULE_LICENSE("GPL");
75bf758f 68MODULE_FIRMWARE(FIRMWARE_NAME);
1da177e4
LT		 69
70#define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
71
72/*
73 Transceiver/media type.
74 0 = auto
75 1 = 10baseT (and autoselect if #define AUTOSELECT),
76 2 = AUI/10base2,
77*/
78INT_MODULE_PARM(if_port, 0);
79
1da177e4
LT		 80
81#define DRV_NAME "smc91c92_cs"
d5b20697 82#define DRV_VERSION "1.123"
1da177e4
LT		 83
84/*====================================================================*/
85
86/* Operational parameter that usually are not changed. */
87
88/* Time in jiffies before concluding Tx hung */
89#define TX_TIMEOUT ((400*HZ)/1000)
90
91/* Maximum events (Rx packets, etc.) to handle at each interrupt. */
92#define INTR_WORK 4
93
94/* Times to check the check the chip before concluding that it doesn't
95 currently have room for another Tx packet. */
96#define MEMORY_WAIT_TIME 8
97
1da177e4 98struct smc_private {
fd238232 99 struct pcmcia_device *p_dev;
1da177e4
LT		 100 spinlock_t lock;
101 u_short manfid;
102 u_short cardid;
6fb7298c 103
1da177e4
LT		 104 struct sk_buff *saved_skb;
105 int packets_waiting;
106 void __iomem *base;
107 u_short cfg;
108 struct timer_list media;
109 int watchdog, tx_err;
110 u_short media_status;
111 u_short fast_poll;
112 u_short link_status;
113 struct mii_if_info mii_if;
114 int duplex;
115 int rx_ovrn;
116};
117
118/* Special definitions for Megahertz multifunction cards */
119#define MEGAHERTZ_ISR 0x0380
120
121/* Special function registers for Motorola Mariner */
122#define MOT_LAN 0x0000
123#define MOT_UART 0x0020
124#define MOT_EEPROM 0x20
125
126#define MOT_NORMAL \
127(COR_LEVEL_REQ | COR_FUNC_ENA | COR_ADDR_DECODE | COR_IREQ_ENA)
128
129/* Special function registers for Ositech cards */
130#define OSITECH_AUI_CTL 0x0c
131#define OSITECH_PWRDOWN 0x0d
132#define OSITECH_RESET 0x0e
133#define OSITECH_ISR 0x0f
134#define OSITECH_AUI_PWR 0x0c
135#define OSITECH_RESET_ISR 0x0e
136
137#define OSI_AUI_PWR 0x40
138#define OSI_LAN_PWRDOWN 0x02
139#define OSI_MODEM_PWRDOWN 0x01
140#define OSI_LAN_RESET 0x02
141#define OSI_MODEM_RESET 0x01
142
143/* Symbolic constants for the SMC91c9* series chips, from Erik Stahlman. */
144#define BANK_SELECT 14 /* Window select register. */
145#define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); }
146
147/* Bank 0 registers. */
148#define TCR 0 /* transmit control register */
149#define TCR_CLEAR 0 /* do NOTHING */
150#define TCR_ENABLE 0x0001 /* if this is 1, we can transmit */
151#define TCR_PAD_EN 0x0080 /* pads short packets to 64 bytes */
152#define TCR_MONCSN 0x0400 /* Monitor Carrier. */
153#define TCR_FDUPLX 0x0800 /* Full duplex mode. */
154#define TCR_NORMAL TCR_ENABLE | TCR_PAD_EN
155
156#define EPH 2 /* Ethernet Protocol Handler report. */
157#define EPH_TX_SUC 0x0001
158#define EPH_SNGLCOL 0x0002
159#define EPH_MULCOL 0x0004
160#define EPH_LTX_MULT 0x0008
161#define EPH_16COL 0x0010
162#define EPH_SQET 0x0020
163#define EPH_LTX_BRD 0x0040
164#define EPH_TX_DEFR 0x0080
165#define EPH_LAT_COL 0x0200
166#define EPH_LOST_CAR 0x0400
167#define EPH_EXC_DEF 0x0800
168#define EPH_CTR_ROL 0x1000
169#define EPH_RX_OVRN 0x2000
170#define EPH_LINK_OK 0x4000
171#define EPH_TX_UNRN 0x8000
172#define MEMINFO 8 /* Memory Information Register */
173#define MEMCFG 10 /* Memory Configuration Register */
174
175/* Bank 1 registers. */
176#define CONFIG 0
177#define CFG_MII_SELECT 0x8000 /* 91C100 only */
178#define CFG_NO_WAIT 0x1000
179#define CFG_FULL_STEP 0x0400
180#define CFG_SET_SQLCH 0x0200
181#define CFG_AUI_SELECT 0x0100
182#define CFG_16BIT 0x0080
183#define CFG_DIS_LINK 0x0040
184#define CFG_STATIC 0x0030
185#define CFG_IRQ_SEL_1 0x0004
186#define CFG_IRQ_SEL_0 0x0002
187#define BASE_ADDR 2
188#define ADDR0 4
189#define GENERAL 10
190#define CONTROL 12
191#define CTL_STORE 0x0001
192#define CTL_RELOAD 0x0002
193#define CTL_EE_SELECT 0x0004
194#define CTL_TE_ENABLE 0x0020
195#define CTL_CR_ENABLE 0x0040
196#define CTL_LE_ENABLE 0x0080
197#define CTL_AUTO_RELEASE 0x0800
198#define CTL_POWERDOWN 0x2000
199
200/* Bank 2 registers. */
201#define MMU_CMD 0
202#define MC_ALLOC 0x20 /* or with number of 256 byte packets */
203#define MC_RESET 0x40
204#define MC_RELEASE 0x80 /* remove and release the current rx packet */
205#define MC_FREEPKT 0xA0 /* Release packet in PNR register */
206#define MC_ENQUEUE 0xC0 /* Enqueue the packet for transmit */
207#define PNR_ARR 2
208#define FIFO_PORTS 4
209#define FP_RXEMPTY 0x8000
210#define POINTER 6
211#define PTR_AUTO_INC 0x0040
212#define PTR_READ 0x2000
213#define PTR_AUTOINC 0x4000
214#define PTR_RCV 0x8000
215#define DATA_1 8
216#define INTERRUPT 12
217#define IM_RCV_INT 0x1
218#define IM_TX_INT 0x2
219#define IM_TX_EMPTY_INT 0x4
220#define IM_ALLOC_INT 0x8
221#define IM_RX_OVRN_INT 0x10
222#define IM_EPH_INT 0x20
223
224#define RCR 4
225enum RxCfg { RxAllMulti = 0x0004, RxPromisc = 0x0002,
226 RxEnable = 0x0100, RxStripCRC = 0x0200};
227#define RCR_SOFTRESET 0x8000 /* resets the chip */
228#define RCR_STRIP_CRC 0x200 /* strips CRC */
229#define RCR_ENABLE 0x100 /* IFF this is set, we can receive packets */
230#define RCR_ALMUL 0x4 /* receive all multicast packets */
231#define RCR_PROMISC 0x2 /* enable promiscuous mode */
232
233/* the normal settings for the RCR register : */
234#define RCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE)
235#define RCR_CLEAR 0x0 /* set it to a base state */
236#define COUNTER 6
237
238/* BANK 3 -- not the same values as in smc9194! */
239#define MULTICAST0 0
240#define MULTICAST2 2
241#define MULTICAST4 4
242#define MULTICAST6 6
243#define MGMT 8
244#define REVISION 0x0a
245
246/* Transmit status bits. */
247#define TS_SUCCESS 0x0001
248#define TS_16COL 0x0010
249#define TS_LATCOL 0x0200
250#define TS_LOSTCAR 0x0400
251
252/* Receive status bits. */
253#define RS_ALGNERR 0x8000
254#define RS_BADCRC 0x2000
255#define RS_ODDFRAME 0x1000
256#define RS_TOOLONG 0x0800
257#define RS_TOOSHORT 0x0400
258#define RS_MULTICAST 0x0001
259#define RS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT)
260
261#define set_bits(v, p) outw(inw(p)|(v), (p))
262#define mask_bits(v, p) outw(inw(p)&(v), (p))
263
264/*====================================================================*/
265
cc3b4866 266static void smc91c92_detach(struct pcmcia_device *p_dev);
15b99ac1 267static int smc91c92_config(struct pcmcia_device *link);
fba395ee 268static void smc91c92_release(struct pcmcia_device *link);
1da177e4
LT		 269
270static int smc_open(struct net_device *dev);
271static int smc_close(struct net_device *dev);
272static int smc_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
273static void smc_tx_timeout(struct net_device *dev);
dbf02fae
SH		 274static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
275 struct net_device *dev);
7d12e780 276static irqreturn_t smc_interrupt(int irq, void *dev_id);
1da177e4 277static void smc_rx(struct net_device *dev);
1da177e4
LT		 278static void set_rx_mode(struct net_device *dev);
279static int s9k_config(struct net_device *dev, struct ifmap *map);
280static void smc_set_xcvr(struct net_device *dev, int if_port);
281static void smc_reset(struct net_device *dev);
282static void media_check(u_long arg);
906da809 283static void mdio_sync(unsigned int addr);
1da177e4
LT		 284static int mdio_read(struct net_device *dev, int phy_id, int loc);
285static void mdio_write(struct net_device *dev, int phy_id, int loc, int value);
286static int smc_link_ok(struct net_device *dev);
7282d491 287static const struct ethtool_ops ethtool_ops;
1da177e4 288
9b31b697
SH		 289static const struct net_device_ops smc_netdev_ops = {
290 .ndo_open = smc_open,
291 .ndo_stop = smc_close,
292 .ndo_start_xmit = smc_start_xmit,
293 .ndo_tx_timeout = smc_tx_timeout,
294 .ndo_set_config = s9k_config,
afc4b13d 295 .ndo_set_rx_mode = set_rx_mode,
c061b18d 296 .ndo_do_ioctl = smc_ioctl,
9b31b697
SH		 297 .ndo_change_mtu = eth_change_mtu,
298 .ndo_set_mac_address = eth_mac_addr,
299 .ndo_validate_addr = eth_validate_addr,
300};
301
15b99ac1 302static int smc91c92_probe(struct pcmcia_device *link)
1da177e4 303{
1da177e4 304 struct smc_private *smc;
1da177e4 305 struct net_device *dev;
1da177e4 306
dd0fab5b 307 dev_dbg(&link->dev, "smc91c92_attach()\n");
1da177e4
LT		 308
309 /* Create new ethernet device */
310 dev = alloc_etherdev(sizeof(struct smc_private));
311 if (!dev)
f8cfa618 312 return -ENOMEM;
1da177e4 313 smc = netdev_priv(dev);
fba395ee 314 smc->p_dev = link;
44b496f6 315 link->priv = dev;
1da177e4
LT		 316
317 spin_lock_init(&smc->lock);
1da177e4
LT		 318
319 /* The SMC91c92-specific entries in the device structure. */
9b31b697 320 dev->netdev_ops = &smc_netdev_ops;
7ad24ea4 321 dev->ethtool_ops = &ethtool_ops;
1da177e4 322 dev->watchdog_timeo = TX_TIMEOUT;
1da177e4
LT		 323
324 smc->mii_if.dev = dev;
325 smc->mii_if.mdio_read = mdio_read;
326 smc->mii_if.mdio_write = mdio_write;
327 smc->mii_if.phy_id_mask = 0x1f;
328 smc->mii_if.reg_num_mask = 0x1f;
329
15b99ac1 330 return smc91c92_config(link);
1da177e4
LT		 331} /* smc91c92_attach */
332
fba395ee 333static void smc91c92_detach(struct pcmcia_device *link)
1da177e4
LT		 334{
335 struct net_device *dev = link->priv;
1da177e4 336
dd0fab5b 337 dev_dbg(&link->dev, "smc91c92_detach\n");
1da177e4 338
c7c2fa07 339 unregister_netdev(dev);
1da177e4 340
e2d40963 341 smc91c92_release(link);
1da177e4 342
1da177e4
LT		 343 free_netdev(dev);
344} /* smc91c92_detach */
345
346/*====================================================================*/
347
348static int cvt_ascii_address(struct net_device *dev, char *s)
349{
350 int i, j, da, c;
351
352 if (strlen(s) != 12)
353 return -1;
354 for (i = 0; i < 6; i++) {
355 da = 0;
356 for (j = 0; j < 2; j++) {
357 c = *s++;
358 da <<= 4;
359 da += ((c >= '0') && (c <= '9')) ?
360 (c - '0') : ((c & 0x0f) + 9);
361 }
362 dev->dev_addr[i] = da;
363 }
364 return 0;
365}
366
dddfbd82 367/*====================================================================
1da177e4
LT		 368
369 Configuration stuff for Megahertz cards
370
371 mhz_3288_power() is used to power up a 3288's ethernet chip.
372 mhz_mfc_config() handles socket setup for multifunction (1144
373 and 3288) cards. mhz_setup() gets a card's hardware ethernet
374 address.
375
376======================================================================*/
377
fba395ee 378static int mhz_3288_power(struct pcmcia_device *link)
1da177e4
LT		 379{
380 struct net_device *dev = link->priv;
381 struct smc_private *smc = netdev_priv(dev);
382 u_char tmp;
383
384 /* Read the ISR twice... */
385 readb(smc->base+MEGAHERTZ_ISR);
386 udelay(5);
387 readb(smc->base+MEGAHERTZ_ISR);
388
389 /* Pause 200ms... */
390 mdelay(200);
391
392 /* Now read and write the COR... */
7feabb64 393 tmp = readb(smc->base + link->config_base + CISREG_COR);
1da177e4 394 udelay(5);
7feabb64 395 writeb(tmp, smc->base + link->config_base + CISREG_COR);
1da177e4
LT		 396
397 return 0;
398}
399
00990e7c 400static int mhz_mfc_config_check(struct pcmcia_device *p_dev, void *priv_data)
b54bf94b
DB		 401{
402 int k;
00990e7c
DB		 403 p_dev->io_lines = 16;
404 p_dev->resource[1]->start = p_dev->resource[0]->start;
405 p_dev->resource[1]->end = 8;
406 p_dev->resource[1]->flags &= ~IO_DATA_PATH_WIDTH;
407 p_dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
408 p_dev->resource[0]->end = 16;
409 p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
410 p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
b54bf94b
DB		 411 for (k = 0; k < 0x400; k += 0x10) {
412 if (k & 0x80)
413 continue;
90abdc3b 414 p_dev->resource[0]->start = k ^ 0x300;
90abdc3b 415 if (!pcmcia_request_io(p_dev))
b54bf94b
DB		 416 return 0;
417 }
418 return -ENODEV;
419}
420
fba395ee 421static int mhz_mfc_config(struct pcmcia_device *link)
1da177e4
LT		 422{
423 struct net_device *dev = link->priv;
424 struct smc_private *smc = netdev_priv(dev);
b5cb259e 425 unsigned int offset;
b54bf94b 426 int i;
1da177e4 427
00990e7c
DB		 428 link->config_flags |= CONF_ENABLE_SPKR | CONF_ENABLE_IRQ |
429 CONF_AUTO_SET_IO;
1da177e4 430
1da177e4
LT		 431 /* The Megahertz combo cards have modem-like CIS entries, so
432 we have to explicitly try a bunch of port combinations. */
b54bf94b 433 if (pcmcia_loop_config(link, mhz_mfc_config_check, NULL))
dddfbd82
DB		 434 return -ENODEV;
435
9a017a91 436 dev->base_addr = link->resource[0]->start;
1da177e4
LT		 437
438 /* Allocate a memory window, for accessing the ISR */
cdb13808
DB		 439 link->resource[2]->flags = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
440 link->resource[2]->start = link->resource[2]->end = 0;
441 i = pcmcia_request_window(link, link->resource[2], 0);
4c89e88b 442 if (i != 0)
dddfbd82
DB		 443 return -ENODEV;
444
cdb13808
DB		 445 smc->base = ioremap(link->resource[2]->start,
446 resource_size(link->resource[2]));
7feabb64 447 offset = (smc->manfid == MANFID_MOTOROLA) ? link->config_base : 0;
cdb13808 448 i = pcmcia_map_mem_page(link, link->resource[2], offset);
8e95a202
JP		 449 if ((i == 0) &&
450 (smc->manfid == MANFID_MEGAHERTZ) &&
451 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
452 mhz_3288_power(link);
1da177e4 453
dddfbd82 454 return 0;
1da177e4
LT		 455}
456
dddfbd82
DB		 457static int pcmcia_get_versmac(struct pcmcia_device *p_dev,
458 tuple_t *tuple,
459 void *priv)
1da177e4 460{
dddfbd82
DB		 461 struct net_device *dev = priv;
462 cisparse_t parse;
fb9e2d88 463 u8 *buf;
4638aef4 464
dddfbd82
DB		 465 if (pcmcia_parse_tuple(tuple, &parse))
466 return -EINVAL;
1da177e4 467
fb9e2d88
KK		 468 buf = parse.version_1.str + parse.version_1.ofs[3];
469
470 if ((parse.version_1.ns > 3) && (cvt_ascii_address(dev, buf) == 0))
dddfbd82 471 return 0;
4638aef4 472
dddfbd82
DB		 473 return -EINVAL;
474};
475
fba395ee 476static int mhz_setup(struct pcmcia_device *link)
1da177e4 477{
1da177e4 478 struct net_device *dev = link->priv;
dddfbd82
DB		 479 size_t len;
480 u8 *buf;
4638aef4 481 int rc;
1da177e4
LT		 482
483 /* Read the station address from the CIS. It is stored as the last
484 (fourth) string in the Version 1 Version/ID tuple. */
7d2e8d00
DB		 485 if ((link->prod_id[3]) &&
486 (cvt_ascii_address(dev, link->prod_id[3]) == 0))
487 return 0;
488
489 /* Workarounds for broken cards start here. */
a1a98b72 490 /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */
dddfbd82
DB		 491 if (!pcmcia_loop_tuple(link, CISTPL_VERS_1, pcmcia_get_versmac, dev))
492 return 0;
1da177e4
LT		 493
494 /* Another possibility: for the EM3288, in a special tuple */
4638aef4 495 rc = -1;
dddfbd82
DB		 496 len = pcmcia_get_tuple(link, 0x81, &buf);
497 if (buf && len >= 13) {
498 buf[12] = '\0';
fb9e2d88 499 if (cvt_ascii_address(dev, buf) == 0)
dddfbd82
DB		 500 rc = 0;
501 }
502 kfree(buf);
503
504 return rc;
505};
1da177e4
LT		 506
507/*======================================================================
508
509 Configuration stuff for the Motorola Mariner
510
511 mot_config() writes directly to the Mariner configuration
512 registers because the CIS is just bogus.
513
514======================================================================*/
515
fba395ee 516static void mot_config(struct pcmcia_device *link)
1da177e4
LT		 517{
518 struct net_device *dev = link->priv;
519 struct smc_private *smc = netdev_priv(dev);
906da809 520 unsigned int ioaddr = dev->base_addr;
9a017a91 521 unsigned int iouart = link->resource[1]->start;
1da177e4
LT		 522
523 /* Set UART base address and force map with COR bit 1 */
524 writeb(iouart & 0xff, smc->base + MOT_UART + CISREG_IOBASE_0);
525 writeb((iouart >> 8) & 0xff, smc->base + MOT_UART + CISREG_IOBASE_1);
526 writeb(MOT_NORMAL, smc->base + MOT_UART + CISREG_COR);
527
528 /* Set SMC base address and force map with COR bit 1 */
529 writeb(ioaddr & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_0);
530 writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1);
531 writeb(MOT_NORMAL, smc->base + MOT_LAN + CISREG_COR);
532
533 /* Wait for things to settle down */
534 mdelay(100);
535}
536
fba395ee 537static int mot_setup(struct pcmcia_device *link)
1da177e4
LT		 538{
539 struct net_device *dev = link->priv;
906da809 540 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 541 int i, wait, loop;
542 u_int addr;
543
544 /* Read Ethernet address from Serial EEPROM */
545
546 for (i = 0; i < 3; i++) {
547 SMC_SELECT_BANK(2);
548 outw(MOT_EEPROM + i, ioaddr + POINTER);
549 SMC_SELECT_BANK(1);
550 outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL);
551
552 for (loop = wait = 0; loop < 200; loop++) {
553 udelay(10);
554 wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL));
555 if (wait == 0) break;
556 }
557
558 if (wait)
559 return -1;
560
561 addr = inw(ioaddr + GENERAL);
562 dev->dev_addr[2*i] = addr & 0xff;
563 dev->dev_addr[2*i+1] = (addr >> 8) & 0xff;
564 }
565
566 return 0;
567}
568
569/*====================================================================*/
570
00990e7c 571static int smc_configcheck(struct pcmcia_device *p_dev, void *priv_data)
b54bf94b 572{
00990e7c
DB		 573 p_dev->resource[0]->end = 16;
574 p_dev->resource[0]->flags &= ~IO_DATA_PATH_WIDTH;
575 p_dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_AUTO;
576
90abdc3b 577 return pcmcia_request_io(p_dev);
b54bf94b
DB		 578}
579
fba395ee 580static int smc_config(struct pcmcia_device *link)
1da177e4
LT		 581{
582 struct net_device *dev = link->priv;
1da177e4
LT		 583 int i;
584
00990e7c
DB		 585 link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
586
b54bf94b
DB		 587 i = pcmcia_loop_config(link, smc_configcheck, NULL);
588 if (!i)
9a017a91 589 dev->base_addr = link->resource[0]->start;
4638aef4 590
1da177e4
LT		 591 return i;
592}
593
dddfbd82 594
fba395ee 595static int smc_setup(struct pcmcia_device *link)
1da177e4 596{
1da177e4 597 struct net_device *dev = link->priv;
1da177e4
LT		 598
599 /* Check for a LAN function extension tuple */
dddfbd82
DB		 600 if (!pcmcia_get_mac_from_cis(link, dev))
601 return 0;
602
1da177e4 603 /* Try the third string in the Version 1 Version/ID tuple. */
a9606fd3 604 if (link->prod_id[2]) {
dddfbd82
DB		 605 if (cvt_ascii_address(dev, link->prod_id[2]) == 0)
606 return 0;
4638aef4 607 }
dddfbd82 608 return -1;
1da177e4
LT		 609}
610
611/*====================================================================*/
612
fba395ee 613static int osi_config(struct pcmcia_device *link)
1da177e4
LT		 614{
615 struct net_device *dev = link->priv;
906da809 616 static const unsigned int com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
1da177e4
LT		 617 int i, j;
618
00990e7c 619 link->config_flags |= CONF_ENABLE_SPKR | CONF_ENABLE_IRQ;
90abdc3b
DB		 620 link->resource[0]->end = 64;
621 link->resource[1]->flags |= IO_DATA_PATH_WIDTH_8;
622 link->resource[1]->end = 8;
1da177e4
LT		 623
624 /* Enable Hard Decode, LAN, Modem */
90abdc3b 625 link->io_lines = 16;
7feabb64 626 link->config_index = 0x23;
1da177e4
LT		 627
628 for (i = j = 0; j < 4; j++) {
90abdc3b
DB		 629 link->resource[1]->start = com[j];
630 i = pcmcia_request_io(link);
4c89e88b
DB		 631 if (i == 0)
632 break;
1da177e4 633 }
4c89e88b 634 if (i != 0) {
1da177e4 635 /* Fallback: turn off hard decode */
7feabb64 636 link->config_index = 0x03;
90abdc3b
DB		 637 link->resource[1]->end = 0;
638 i = pcmcia_request_io(link);
1da177e4 639 }
9a017a91 640 dev->base_addr = link->resource[0]->start + 0x10;
1da177e4
LT		 641 return i;
642}
643
75bf758f
JSR		 644static int osi_load_firmware(struct pcmcia_device *link)
645{
646 const struct firmware *fw;
647 int i, err;
648
649 err = request_firmware(&fw, FIRMWARE_NAME, &link->dev);
650 if (err) {
651 pr_err("Failed to load firmware \"%s\"\n", FIRMWARE_NAME);
652 return err;
653 }
654
655 /* Download the Seven of Diamonds firmware */
656 for (i = 0; i < fw->size; i++) {
9a017a91 657 outb(fw->data[i], link->resource[0]->start + 2);
75bf758f
JSR		 658 udelay(50);
659 }
660 release_firmware(fw);
661 return err;
662}
663
dddfbd82
DB		 664static int pcmcia_osi_mac(struct pcmcia_device *p_dev,
665 tuple_t *tuple,
666 void *priv)
1da177e4 667{
dddfbd82
DB		 668 struct net_device *dev = priv;
669 int i;
1da177e4 670
dddfbd82
DB		 671 if (tuple->TupleDataLen < 8)
672 return -EINVAL;
673 if (tuple->TupleData[0] != 0x04)
674 return -EINVAL;
675 for (i = 0; i < 6; i++)
676 dev->dev_addr[i] = tuple->TupleData[i+2];
677 return 0;
678};
4638aef4 679
4638aef4 680
dddfbd82
DB		 681static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid)
682{
683 struct net_device *dev = link->priv;
684 int rc;
1da177e4
LT		 685
686 /* Read the station address from tuple 0x90, subtuple 0x04 */
dddfbd82
DB		 687 if (pcmcia_loop_tuple(link, 0x90, pcmcia_osi_mac, dev))
688 return -1;
1da177e4
LT		 689
690 if (((manfid == MANFID_OSITECH) &&
691 (cardid == PRODID_OSITECH_SEVEN)) ||
692 ((manfid == MANFID_PSION) &&
693 (cardid == PRODID_PSION_NET100))) {
75bf758f
JSR		 694 rc = osi_load_firmware(link);
695 if (rc)
dddfbd82 696 return rc;
1da177e4
LT		 697 } else if (manfid == MANFID_OSITECH) {
698 /* Make sure both functions are powered up */
9a017a91 699 set_bits(0x300, link->resource[0]->start + OSITECH_AUI_PWR);
1da177e4 700 /* Now, turn on the interrupt for both card functions */
9a017a91 701 set_bits(0x300, link->resource[0]->start + OSITECH_RESET_ISR);
dd0fab5b 702 dev_dbg(&link->dev, "AUI/PWR: %4.4x RESET/ISR: %4.4x\n",
9a017a91
DB		 703 inw(link->resource[0]->start + OSITECH_AUI_PWR),
704 inw(link->resource[0]->start + OSITECH_RESET_ISR));
1da177e4 705 }
dddfbd82 706 return 0;
1da177e4
LT		 707}
708
fba395ee 709static int smc91c92_suspend(struct pcmcia_device *link)
98e4c28b 710{
98e4c28b
DB		 711 struct net_device *dev = link->priv;
712
e2d40963 713 if (link->open)
4bbed523 714 netif_device_detach(dev);
98e4c28b
DB		 715
716 return 0;
717}
718
fba395ee 719static int smc91c92_resume(struct pcmcia_device *link)
98e4c28b 720{
98e4c28b
DB		 721 struct net_device *dev = link->priv;
722 struct smc_private *smc = netdev_priv(dev);
723 int i;
724
e2d40963
DB		 725 if ((smc->manfid == MANFID_MEGAHERTZ) &&
726 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
727 mhz_3288_power(link);
728 if (smc->manfid == MANFID_MOTOROLA)
729 mot_config(link);
730 if ((smc->manfid == MANFID_OSITECH) &&
731 (smc->cardid != PRODID_OSITECH_SEVEN)) {
732 /* Power up the card and enable interrupts */
733 set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR);
734 set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR);
735 }
736 if (((smc->manfid == MANFID_OSITECH) &&
737 (smc->cardid == PRODID_OSITECH_SEVEN)) ||
738 ((smc->manfid == MANFID_PSION) &&
739 (smc->cardid == PRODID_PSION_NET100))) {
75bf758f
JSR		 740 i = osi_load_firmware(link);
741 if (i) {
c501b1f5 742 netdev_err(dev, "Failed to load firmware\n");
75bf758f 743 return i;
98e4c28b
DB		 744 }
745 }
e2d40963
DB		 746 if (link->open) {
747 smc_reset(dev);
748 netif_device_attach(dev);
749 }
98e4c28b
DB		 750
751 return 0;
752}
753
754
1da177e4
LT		 755/*======================================================================
756
757 This verifies that the chip is some SMC91cXX variant, and returns
758 the revision code if successful. Otherwise, it returns -ENODEV.
759
760======================================================================*/
761
fba395ee 762static int check_sig(struct pcmcia_device *link)
1da177e4
LT		 763{
764 struct net_device *dev = link->priv;
906da809 765 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 766 int width;
767 u_short s;
768
769 SMC_SELECT_BANK(1);
770 if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) {
771 /* Try powering up the chip */
772 outw(0, ioaddr + CONTROL);
773 mdelay(55);
774 }
775
776 /* Try setting bus width */
90abdc3b 777 width = (link->resource[0]->flags == IO_DATA_PATH_WIDTH_AUTO);
1da177e4
LT		 778 s = inb(ioaddr + CONFIG);
779 if (width)
780 s |= CFG_16BIT;
781 else
782 s &= ~CFG_16BIT;
783 outb(s, ioaddr + CONFIG);
784
785 /* Check Base Address Register to make sure bus width is OK */
786 s = inw(ioaddr + BASE_ADDR);
787 if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) &&
788 ((s >> 8) != (s & 0xff))) {
789 SMC_SELECT_BANK(3);
790 s = inw(ioaddr + REVISION);
807540ba 791 return s & 0xff;
1da177e4
LT		 792 }
793
794 if (width) {
c501b1f5 795 netdev_info(dev, "using 8-bit IO window\n");
4bbed523 796
fba395ee 797 smc91c92_suspend(link);
fb49fa53 798 pcmcia_fixup_iowidth(link);
fba395ee 799 smc91c92_resume(link);
4bbed523 800 return check_sig(link);
1da177e4
LT		 801 }
802 return -ENODEV;
803}
804
15b99ac1 805static int smc91c92_config(struct pcmcia_device *link)
1da177e4 806{
1da177e4
LT		 807 struct net_device *dev = link->priv;
808 struct smc_private *smc = netdev_priv(dev);
1da177e4 809 char *name;
74411c04 810 int i, rev, j = 0;
906da809 811 unsigned int ioaddr;
1da177e4
LT		 812 u_long mir;
813
dd0fab5b 814 dev_dbg(&link->dev, "smc91c92_config\n");
1da177e4 815
efd50585
DB		 816 smc->manfid = link->manf_id;
817 smc->cardid = link->card_id;
1da177e4 818
1da177e4
LT		 819 if ((smc->manfid == MANFID_OSITECH) &&
820 (smc->cardid != PRODID_OSITECH_SEVEN)) {
821 i = osi_config(link);
822 } else if ((smc->manfid == MANFID_MOTOROLA) ||
823 ((smc->manfid == MANFID_MEGAHERTZ) &&
824 ((smc->cardid == PRODID_MEGAHERTZ_VARIOUS) ||
825 (smc->cardid == PRODID_MEGAHERTZ_EM3288)))) {
826 i = mhz_mfc_config(link);
827 } else {
828 i = smc_config(link);
829 }
dd0fab5b
DB		 830 if (i)
831 goto config_failed;
1da177e4 832
eb14120f 833 i = pcmcia_request_irq(link, smc_interrupt);
dd0fab5b
DB		 834 if (i)
835 goto config_failed;
1ac71e5a 836 i = pcmcia_enable_device(link);
dd0fab5b
DB		 837 if (i)
838 goto config_failed;
1da177e4
LT		 839
840 if (smc->manfid == MANFID_MOTOROLA)
841 mot_config(link);
842
eb14120f 843 dev->irq = link->irq;
1da177e4
LT		 844
845 if ((if_port >= 0) && (if_port <= 2))
846 dev->if_port = if_port;
847 else
636b8116 848 dev_notice(&link->dev, "invalid if_port requested\n");
1da177e4
LT		 849
850 switch (smc->manfid) {
851 case MANFID_OSITECH:
852 case MANFID_PSION:
853 i = osi_setup(link, smc->manfid, smc->cardid); break;
854 case MANFID_SMC:
855 case MANFID_NEW_MEDIA:
856 i = smc_setup(link); break;
857 case 0x128: /* For broken Megahertz cards */
858 case MANFID_MEGAHERTZ:
859 i = mhz_setup(link); break;
860 case MANFID_MOTOROLA:
861 default: /* get the hw address from EEPROM */
862 i = mot_setup(link); break;
863 }
864
865 if (i != 0) {
636b8116 866 dev_notice(&link->dev, "Unable to find hardware address.\n");
fb9e2d88 867 goto config_failed;
1da177e4
LT		 868 }
869
870 smc->duplex = 0;
871 smc->rx_ovrn = 0;
872
873 rev = check_sig(link);
874 name = "???";
875 if (rev > 0)
876 switch (rev >> 4) {
877 case 3: name = "92"; break;
878 case 4: name = ((rev & 15) >= 6) ? "96" : "94"; break;
879 case 5: name = "95"; break;
880 case 7: name = "100"; break;
881 case 8: name = "100-FD"; break;
882 case 9: name = "110"; break;
883 }
884
885 ioaddr = dev->base_addr;
886 if (rev > 0) {
887 u_long mcr;
888 SMC_SELECT_BANK(0);
889 mir = inw(ioaddr + MEMINFO) & 0xff;
890 if (mir == 0xff) mir++;
891 /* Get scale factor for memory size */
892 mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200;
893 mir *= 128 * (1<<((mcr >> 9) & 7));
894 SMC_SELECT_BANK(1);
895 smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT;
896 smc->cfg |= CFG_NO_WAIT | CFG_16BIT | CFG_STATIC;
897 if (smc->manfid == MANFID_OSITECH)
898 smc->cfg |= CFG_IRQ_SEL_1 | CFG_IRQ_SEL_0;
899 if ((rev >> 4) >= 7)
900 smc->cfg |= CFG_MII_SELECT;
901 } else
902 mir = 0;
903
904 if (smc->cfg & CFG_MII_SELECT) {
905 SMC_SELECT_BANK(3);
906
907 for (i = 0; i < 32; i++) {
908 j = mdio_read(dev, i, 1);
909 if ((j != 0) && (j != 0xffff)) break;
910 }
911 smc->mii_if.phy_id = (i < 32) ? i : -1;
912
913 SMC_SELECT_BANK(0);
914 }
915
dd2e5a15 916 SET_NETDEV_DEV(dev, &link->dev);
1da177e4
LT		 917
918 if (register_netdev(dev) != 0) {
636b8116 919 dev_err(&link->dev, "register_netdev() failed\n");
1da177e4
LT		 920 goto config_undo;
921 }
922
636b8116
JP		 923 netdev_info(dev, "smc91c%s rev %d: io %#3lx, irq %d, hw_addr %pM\n",
924 name, (rev & 0x0f), dev->base_addr, dev->irq, dev->dev_addr);
1da177e4
LT		 925
926 if (rev > 0) {
927 if (mir & 0x3ff)
636b8116 928 netdev_info(dev, " %lu byte", mir);
1da177e4 929 else
636b8116
JP		 930 netdev_info(dev, " %lu kb", mir>>10);
931 pr_cont(" buffer, %s xcvr\n",
932 (smc->cfg & CFG_MII_SELECT) ? "MII" : if_names[dev->if_port]);
1da177e4
LT		 933 }
934
935 if (smc->cfg & CFG_MII_SELECT) {
936 if (smc->mii_if.phy_id != -1) {
636b8116
JP		 937 netdev_dbg(dev, " MII transceiver at index %d, status %x\n",
938 smc->mii_if.phy_id, j);
1da177e4 939 } else {
636b8116 940 netdev_notice(dev, " No MII transceivers found!\n");
1da177e4
LT		 941 }
942 }
15b99ac1 943 return 0;
1da177e4
LT		 944
945config_undo:
946 unregister_netdev(dev);
dd0fab5b 947config_failed:
1da177e4 948 smc91c92_release(link);
fb9e2d88 949 free_netdev(dev);
15b99ac1 950 return -ENODEV;
1da177e4
LT		 951} /* smc91c92_config */
952
fba395ee 953static void smc91c92_release(struct pcmcia_device *link)
1da177e4 954{
dd0fab5b 955 dev_dbg(&link->dev, "smc91c92_release\n");
cdb13808 956 if (link->resource[2]->end) {
5f2a71fc
DB		 957 struct net_device *dev = link->priv;
958 struct smc_private *smc = netdev_priv(dev);
959 iounmap(smc->base);
960 }
fba395ee 961 pcmcia_disable_device(link);
1da177e4
LT		 962}
963
1da177e4
LT		 964/*======================================================================
965
966 MII interface support for SMC91cXX based cards
967======================================================================*/
968
969#define MDIO_SHIFT_CLK 0x04
970#define MDIO_DATA_OUT 0x01
971#define MDIO_DIR_WRITE 0x08
972#define MDIO_DATA_WRITE0 (MDIO_DIR_WRITE)
973#define MDIO_DATA_WRITE1 (MDIO_DIR_WRITE | MDIO_DATA_OUT)
974#define MDIO_DATA_READ 0x02
975
906da809 976static void mdio_sync(unsigned int addr)
1da177e4
LT		 977{
978 int bits;
979 for (bits = 0; bits < 32; bits++) {
980 outb(MDIO_DATA_WRITE1, addr);
981 outb(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr);
982 }
983}
984
985static int mdio_read(struct net_device *dev, int phy_id, int loc)
986{
906da809 987 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT		 988 u_int cmd = (0x06<<10)|(phy_id<<5)|loc;
989 int i, retval = 0;
990
991 mdio_sync(addr);
992 for (i = 13; i >= 0; i--) {
993 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
994 outb(dat, addr);
995 outb(dat | MDIO_SHIFT_CLK, addr);
996 }
997 for (i = 19; i > 0; i--) {
998 outb(0, addr);
999 retval = (retval << 1) | ((inb(addr) & MDIO_DATA_READ) != 0);
1000 outb(MDIO_SHIFT_CLK, addr);
1001 }
1002 return (retval>>1) & 0xffff;
1003}
1004
1005static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
1006{
906da809 1007 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT		 1008 u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value;
1009 int i;
1010
1011 mdio_sync(addr);
1012 for (i = 31; i >= 0; i--) {
1013 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1014 outb(dat, addr);
1015 outb(dat | MDIO_SHIFT_CLK, addr);
1016 }
1017 for (i = 1; i >= 0; i--) {
1018 outb(0, addr);
1019 outb(MDIO_SHIFT_CLK, addr);
1020 }
1021}
1022
1023/*======================================================================
1024
1025 The driver core code, most of which should be common with a
1026 non-PCMCIA implementation.
1027
1028======================================================================*/
1029
1030#ifdef PCMCIA_DEBUG
1031static void smc_dump(struct net_device *dev)
1032{
906da809 1033 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1034 u_short i, w, save;
1035 save = inw(ioaddr + BANK_SELECT);
1036 for (w = 0; w < 4; w++) {
1037 SMC_SELECT_BANK(w);
c501b1f5 1038 netdev_dbg(dev, "bank %d: ", w);
1da177e4 1039 for (i = 0; i < 14; i += 2)
636b8116
JP		 1040 pr_cont(" %04x", inw(ioaddr + i));
1041 pr_cont("\n");
1da177e4
LT		 1042 }
1043 outw(save, ioaddr + BANK_SELECT);
1044}
1045#endif
1046
1047static int smc_open(struct net_device *dev)
1048{
1049 struct smc_private *smc = netdev_priv(dev);
fba395ee 1050 struct pcmcia_device *link = smc->p_dev;
1da177e4 1051
dd0fab5b 1052 dev_dbg(&link->dev, "%s: smc_open(%p), ID/Window %4.4x.\n",
1da177e4 1053 dev->name, dev, inw(dev->base_addr + BANK_SELECT));
dd0fab5b
DB		 1054#ifdef PCMCIA_DEBUG
1055 smc_dump(dev);
1da177e4
LT		 1056#endif
1057
1058 /* Check that the PCMCIA card is still here. */
9940ec36 1059 if (!pcmcia_dev_present(link))
1da177e4
LT		 1060 return -ENODEV;
1061 /* Physical device present signature. */
1062 if (check_sig(link) < 0) {
636b8116 1063 netdev_info(dev, "Yikes! Bad chip signature!\n");
1da177e4
LT		 1064 return -ENODEV;
1065 }
1066 link->open++;
1067
1068 netif_start_queue(dev);
1069 smc->saved_skb = NULL;
1070 smc->packets_waiting = 0;
1071
1072 smc_reset(dev);
b8b01344
VT		 1073 setup_timer(&smc->media, media_check, (u_long)dev);
1074 mod_timer(&smc->media, jiffies + HZ);
1da177e4
LT		 1075
1076 return 0;
1077} /* smc_open */
1078
1079/*====================================================================*/
1080
1081static int smc_close(struct net_device *dev)
1082{
1083 struct smc_private *smc = netdev_priv(dev);
fba395ee 1084 struct pcmcia_device *link = smc->p_dev;
906da809 1085 unsigned int ioaddr = dev->base_addr;
1da177e4 1086
dd0fab5b 1087 dev_dbg(&link->dev, "%s: smc_close(), status %4.4x.\n",
1da177e4
LT		 1088 dev->name, inw(ioaddr + BANK_SELECT));
1089
1090 netif_stop_queue(dev);
1091
1092 /* Shut off all interrupts, and turn off the Tx and Rx sections.
1093 Don't bother to check for chip present. */
1094 SMC_SELECT_BANK(2); /* Nominally paranoia, but do no assume... */
1095 outw(0, ioaddr + INTERRUPT);
1096 SMC_SELECT_BANK(0);
1097 mask_bits(0xff00, ioaddr + RCR);
1098 mask_bits(0xff00, ioaddr + TCR);
1099
1100 /* Put the chip into power-down mode. */
1101 SMC_SELECT_BANK(1);
1102 outw(CTL_POWERDOWN, ioaddr + CONTROL );
1103
1104 link->open--;
1105 del_timer_sync(&smc->media);
1106
1107 return 0;
1108} /* smc_close */
1109
1110/*======================================================================
1111
1112 Transfer a packet to the hardware and trigger the packet send.
1113 This may be called at either from either the Tx queue code
1114 or the interrupt handler.
1115
1116======================================================================*/
1117
1118static void smc_hardware_send_packet(struct net_device * dev)
1119{
1120 struct smc_private *smc = netdev_priv(dev);
1121 struct sk_buff *skb = smc->saved_skb;
906da809 1122 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1123 u_char packet_no;
1124
1125 if (!skb) {
636b8116 1126 netdev_err(dev, "In XMIT with no packet to send\n");
1da177e4
LT		 1127 return;
1128 }
1129
1130 /* There should be a packet slot waiting. */
1131 packet_no = inw(ioaddr + PNR_ARR) >> 8;
1132 if (packet_no & 0x80) {
1133 /* If not, there is a hardware problem! Likely an ejected card. */
636b8116
JP		 1134 netdev_warn(dev, "hardware Tx buffer allocation failed, status %#2.2x\n",
1135 packet_no);
1da177e4
LT		 1136 dev_kfree_skb_irq(skb);
1137 smc->saved_skb = NULL;
1138 netif_start_queue(dev);
1139 return;
1140 }
1141
6fb7298c 1142 dev->stats.tx_bytes += skb->len;
1da177e4
LT		 1143 /* The card should use the just-allocated buffer. */
1144 outw(packet_no, ioaddr + PNR_ARR);
1145 /* point to the beginning of the packet */
1146 outw(PTR_AUTOINC , ioaddr + POINTER);
1147
1148 /* Send the packet length (+6 for status, length and ctl byte)
1149 and the status word (set to zeros). */
1150 {
1151 u_char *buf = skb->data;
1152 u_int length = skb->len; /* The chip will pad to ethernet min. */
1153
636b8116 1154 netdev_dbg(dev, "Trying to xmit packet of length %d\n", length);
1da177e4
LT		 1155
1156 /* send the packet length: +6 for status word, length, and ctl */
1157 outw(0, ioaddr + DATA_1);
1158 outw(length + 6, ioaddr + DATA_1);
1159 outsw(ioaddr + DATA_1, buf, length >> 1);
1160
1161 /* The odd last byte, if there is one, goes in the control word. */
1162 outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1);
1163 }
1164
1165 /* Enable the Tx interrupts, both Tx (TxErr) and TxEmpty. */
1166 outw(((IM_TX_INT|IM_TX_EMPTY_INT)<<8) |
1167 (inw(ioaddr + INTERRUPT) & 0xff00),
1168 ioaddr + INTERRUPT);
1169
1170 /* The chip does the rest of the work. */
1171 outw(MC_ENQUEUE , ioaddr + MMU_CMD);
1172
1173 smc->saved_skb = NULL;
1174 dev_kfree_skb_irq(skb);
860e9538 1175 netif_trans_update(dev);
1da177e4 1176 netif_start_queue(dev);
1da177e4
LT		 1177}
1178
1179/*====================================================================*/
1180
1181static void smc_tx_timeout(struct net_device *dev)
1182{
1183 struct smc_private *smc = netdev_priv(dev);
906da809 1184 unsigned int ioaddr = dev->base_addr;
1da177e4 1185
636b8116
JP		 1186 netdev_notice(dev, "transmit timed out, Tx_status %2.2x status %4.4x.\n",
1187 inw(ioaddr)&0xff, inw(ioaddr + 2));
6fb7298c 1188 dev->stats.tx_errors++;
1da177e4 1189 smc_reset(dev);
860e9538 1190 netif_trans_update(dev); /* prevent tx timeout */
1da177e4
LT		 1191 smc->saved_skb = NULL;
1192 netif_wake_queue(dev);
1193}
1194
dbf02fae
SH		 1195static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
1196 struct net_device *dev)
1da177e4
LT		 1197{
1198 struct smc_private *smc = netdev_priv(dev);
906da809 1199 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1200 u_short num_pages;
1201 short time_out, ir;
85e27831 1202 unsigned long flags;
1da177e4
LT		 1203
1204 netif_stop_queue(dev);
1205
636b8116
JP		 1206 netdev_dbg(dev, "smc_start_xmit(length = %d) called, status %04x\n",
1207 skb->len, inw(ioaddr + 2));
1da177e4
LT		 1208
1209 if (smc->saved_skb) {
1210 /* THIS SHOULD NEVER HAPPEN. */
6fb7298c 1211 dev->stats.tx_aborted_errors++;
c501b1f5 1212 netdev_dbg(dev, "Internal error -- sent packet while busy\n");
5b548140 1213 return NETDEV_TX_BUSY;
1da177e4
LT		 1214 }
1215 smc->saved_skb = skb;
1216
1217 num_pages = skb->len >> 8;
1218
1219 if (num_pages > 7) {
636b8116 1220 netdev_err(dev, "Far too big packet error: %d pages\n", num_pages);
1da177e4
LT		 1221 dev_kfree_skb (skb);
1222 smc->saved_skb = NULL;
6fb7298c 1223 dev->stats.tx_dropped++;
6ed10654 1224 return NETDEV_TX_OK; /* Do not re-queue this packet. */
1da177e4
LT		 1225 }
1226 /* A packet is now waiting. */
1227 smc->packets_waiting++;
1228
85e27831 1229 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT		 1230 SMC_SELECT_BANK(2); /* Paranoia, we should always be in window 2 */
1231
1232 /* need MC_RESET to keep the memory consistent. errata? */
1233 if (smc->rx_ovrn) {
1234 outw(MC_RESET, ioaddr + MMU_CMD);
1235 smc->rx_ovrn = 0;
1236 }
1237
1238 /* Allocate the memory; send the packet now if we win. */
1239 outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD);
1240 for (time_out = MEMORY_WAIT_TIME; time_out >= 0; time_out--) {
1241 ir = inw(ioaddr+INTERRUPT);
1242 if (ir & IM_ALLOC_INT) {
1243 /* Acknowledge the interrupt, send the packet. */
1244 outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT);
1245 smc_hardware_send_packet(dev); /* Send the packet now.. */
85e27831 1246 spin_unlock_irqrestore(&smc->lock, flags);
6ed10654 1247 return NETDEV_TX_OK;
1da177e4
LT		 1248 }
1249 }
1250
1251 /* Otherwise defer until the Tx-space-allocated interrupt. */
c501b1f5 1252 netdev_dbg(dev, "memory allocation deferred.\n");
1da177e4 1253 outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT);
85e27831 1254 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4 1255
6ed10654 1256 return NETDEV_TX_OK;
1da177e4
LT		 1257}
1258
1259/*======================================================================
1260
25985edc 1261 Handle a Tx anomalous event. Entered while in Window 2.
1da177e4
LT		 1262
1263======================================================================*/
1264
1265static void smc_tx_err(struct net_device * dev)
1266{
1267 struct smc_private *smc = netdev_priv(dev);
906da809 1268 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1269 int saved_packet = inw(ioaddr + PNR_ARR) & 0xff;
1270 int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f;
1271 int tx_status;
1272
1273 /* select this as the packet to read from */
1274 outw(packet_no, ioaddr + PNR_ARR);
1275
1276 /* read the first word from this packet */
1277 outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER);
1278
1279 tx_status = inw(ioaddr + DATA_1);
1280
6fb7298c
SH		 1281 dev->stats.tx_errors++;
1282 if (tx_status & TS_LOSTCAR) dev->stats.tx_carrier_errors++;
1283 if (tx_status & TS_LATCOL) dev->stats.tx_window_errors++;
1da177e4 1284 if (tx_status & TS_16COL) {
6fb7298c 1285 dev->stats.tx_aborted_errors++;
1da177e4
LT		 1286 smc->tx_err++;
1287 }
1288
1289 if (tx_status & TS_SUCCESS) {
636b8116 1290 netdev_notice(dev, "Successful packet caused error interrupt?\n");
1da177e4
LT		 1291 }
1292 /* re-enable transmit */
1293 SMC_SELECT_BANK(0);
1294 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1295 SMC_SELECT_BANK(2);
1296
1297 outw(MC_FREEPKT, ioaddr + MMU_CMD); /* Free the packet memory. */
1298
1299 /* one less packet waiting for me */
1300 smc->packets_waiting--;
1301
1302 outw(saved_packet, ioaddr + PNR_ARR);
1da177e4
LT		 1303}
1304
1305/*====================================================================*/
1306
1307static void smc_eph_irq(struct net_device *dev)
1308{
1309 struct smc_private *smc = netdev_priv(dev);
906da809 1310 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1311 u_short card_stats, ephs;
1312
1313 SMC_SELECT_BANK(0);
1314 ephs = inw(ioaddr + EPH);
c501b1f5
BB		 1315 netdev_dbg(dev, "Ethernet protocol handler interrupt, status %4.4x.\n",
1316 ephs);
1da177e4
LT		 1317 /* Could be a counter roll-over warning: update stats. */
1318 card_stats = inw(ioaddr + COUNTER);
1319 /* single collisions */
6fb7298c 1320 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT		 1321 card_stats >>= 4;
1322 /* multiple collisions */
6fb7298c 1323 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT		 1324#if 0 /* These are for when linux supports these statistics */
1325 card_stats >>= 4; /* deferred */
1326 card_stats >>= 4; /* excess deferred */
1327#endif
1328 /* If we had a transmit error we must re-enable the transmitter. */
1329 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1330
1331 /* Clear a link error interrupt. */
1332 SMC_SELECT_BANK(1);
1333 outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL);
1334 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1335 ioaddr + CONTROL);
1336 SMC_SELECT_BANK(2);
1337}
1338
1339/*====================================================================*/
1340
7d12e780 1341static irqreturn_t smc_interrupt(int irq, void *dev_id)
1da177e4
LT		 1342{
1343 struct net_device *dev = dev_id;
1344 struct smc_private *smc = netdev_priv(dev);
906da809 1345 unsigned int ioaddr;
1da177e4
LT		 1346 u_short saved_bank, saved_pointer, mask, status;
1347 unsigned int handled = 1;
1348 char bogus_cnt = INTR_WORK; /* Work we are willing to do. */
1349
1350 if (!netif_device_present(dev))
1351 return IRQ_NONE;
1352
1353 ioaddr = dev->base_addr;
1354
c501b1f5
BB		 1355 netdev_dbg(dev, "SMC91c92 interrupt %d at %#x.\n",
1356 irq, ioaddr);
1da177e4 1357
85e27831 1358 spin_lock(&smc->lock);
1da177e4
LT		 1359 smc->watchdog = 0;
1360 saved_bank = inw(ioaddr + BANK_SELECT);
1361 if ((saved_bank & 0xff00) != 0x3300) {
1362 /* The device does not exist -- the card could be off-line, or
1363 maybe it has been ejected. */
c501b1f5
BB		 1364 netdev_dbg(dev, "SMC91c92 interrupt %d for non-existent/ejected device.\n",
1365 irq);
1da177e4
LT		 1366 handled = 0;
1367 goto irq_done;
1368 }
1369
1370 SMC_SELECT_BANK(2);
1371 saved_pointer = inw(ioaddr + POINTER);
1372 mask = inw(ioaddr + INTERRUPT) >> 8;
1373 /* clear all interrupts */
1374 outw(0, ioaddr + INTERRUPT);
1375
1376 do { /* read the status flag, and mask it */
1377 status = inw(ioaddr + INTERRUPT) & 0xff;
c501b1f5
BB		 1378 netdev_dbg(dev, "Status is %#2.2x (mask %#2.2x).\n",
1379 status, mask);
1da177e4
LT		 1380 if ((status & mask) == 0) {
1381 if (bogus_cnt == INTR_WORK)
1382 handled = 0;
1383 break;
1384 }
1385 if (status & IM_RCV_INT) {
1386 /* Got a packet(s). */
1387 smc_rx(dev);
1388 }
1389 if (status & IM_TX_INT) {
1390 smc_tx_err(dev);
1391 outw(IM_TX_INT, ioaddr + INTERRUPT);
1392 }
1393 status &= mask;
1394 if (status & IM_TX_EMPTY_INT) {
1395 outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT);
1396 mask &= ~IM_TX_EMPTY_INT;
6fb7298c 1397 dev->stats.tx_packets += smc->packets_waiting;
1da177e4
LT		 1398 smc->packets_waiting = 0;
1399 }
1400 if (status & IM_ALLOC_INT) {
1401 /* Clear this interrupt so it doesn't happen again */
1402 mask &= ~IM_ALLOC_INT;
1403
1404 smc_hardware_send_packet(dev);
1405
1406 /* enable xmit interrupts based on this */
1407 mask |= (IM_TX_EMPTY_INT | IM_TX_INT);
1408
1409 /* and let the card send more packets to me */
1410 netif_wake_queue(dev);
1411 }
1412 if (status & IM_RX_OVRN_INT) {
6fb7298c
SH		 1413 dev->stats.rx_errors++;
1414 dev->stats.rx_fifo_errors++;
1da177e4
LT		 1415 if (smc->duplex)
1416 smc->rx_ovrn = 1; /* need MC_RESET outside smc_interrupt */
1417 outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT);
1418 }
1419 if (status & IM_EPH_INT)
1420 smc_eph_irq(dev);
1421 } while (--bogus_cnt);
1422
c501b1f5
BB		 1423 netdev_dbg(dev, " Restoring saved registers mask %2.2x bank %4.4x pointer %4.4x.\n",
1424 mask, saved_bank, saved_pointer);
1da177e4
LT		 1425
1426 /* restore state register */
1427 outw((mask<<8), ioaddr + INTERRUPT);
1428 outw(saved_pointer, ioaddr + POINTER);
1429 SMC_SELECT_BANK(saved_bank);
1430
c501b1f5 1431 netdev_dbg(dev, "Exiting interrupt IRQ%d.\n", irq);
1da177e4
LT		 1432
1433irq_done:
1434
1435 if ((smc->manfid == MANFID_OSITECH) &&
1436 (smc->cardid != PRODID_OSITECH_SEVEN)) {
1437 /* Retrigger interrupt if needed */
1438 mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR);
1439 set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR);
1440 }
1441 if (smc->manfid == MANFID_MOTOROLA) {
1442 u_char cor;
1443 cor = readb(smc->base + MOT_UART + CISREG_COR);
1444 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR);
1445 writeb(cor, smc->base + MOT_UART + CISREG_COR);
1446 cor = readb(smc->base + MOT_LAN + CISREG_COR);
1447 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR);
1448 writeb(cor, smc->base + MOT_LAN + CISREG_COR);
1449 }
9735b7ef
KK		 1450
1451 if ((smc->base != NULL) && /* Megahertz MFC's */
1452 (smc->manfid == MANFID_MEGAHERTZ) &&
1453 (smc->cardid == PRODID_MEGAHERTZ_EM3288)) {
1454
1455 u_char tmp;
1456 tmp = readb(smc->base+MEGAHERTZ_ISR);
1457 tmp = readb(smc->base+MEGAHERTZ_ISR);
1458
1459 /* Retrigger interrupt if needed */
1460 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1461 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1da177e4 1462 }
9735b7ef 1463
85e27831 1464 spin_unlock(&smc->lock);
1da177e4
LT		 1465 return IRQ_RETVAL(handled);
1466}
1467
1468/*====================================================================*/
1469
1470static void smc_rx(struct net_device *dev)
1471{
906da809 1472 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1473 int rx_status;
1474 int packet_length; /* Caution: not frame length, rather words
1475 to transfer from the chip. */
1476
1477 /* Assertion: we are in Window 2. */
1478
1479 if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) {
636b8116 1480 netdev_err(dev, "smc_rx() with nothing on Rx FIFO\n");
1da177e4
LT		 1481 return;
1482 }
1483
1484 /* Reset the read pointer, and read the status and packet length. */
1485 outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER);
1486 rx_status = inw(ioaddr + DATA_1);
1487 packet_length = inw(ioaddr + DATA_1) & 0x07ff;
1488
c501b1f5
BB		 1489 netdev_dbg(dev, "Receive status %4.4x length %d.\n",
1490 rx_status, packet_length);
1da177e4 1491
c501b1f5 1492 if (!(rx_status & RS_ERRORS)) {
1da177e4
LT		 1493 /* do stuff to make a new packet */
1494 struct sk_buff *skb;
1495
1496 /* Note: packet_length adds 5 or 6 extra bytes here! */
dae2e9f4 1497 skb = netdev_alloc_skb(dev, packet_length+2);
1da177e4
LT		 1498
1499 if (skb == NULL) {
c501b1f5 1500 netdev_dbg(dev, "Low memory, packet dropped.\n");
6fb7298c 1501 dev->stats.rx_dropped++;
1da177e4
LT		 1502 outw(MC_RELEASE, ioaddr + MMU_CMD);
1503 return;
1504 }
1505
1506 packet_length -= (rx_status & RS_ODDFRAME ? 5 : 6);
1507 skb_reserve(skb, 2);
1508 insw(ioaddr+DATA_1, skb_put(skb, packet_length),
1509 (packet_length+1)>>1);
1510 skb->protocol = eth_type_trans(skb, dev);
1511
1da177e4
LT		 1512 netif_rx(skb);
1513 dev->last_rx = jiffies;
6fb7298c
SH		 1514 dev->stats.rx_packets++;
1515 dev->stats.rx_bytes += packet_length;
1da177e4 1516 if (rx_status & RS_MULTICAST)
6fb7298c 1517 dev->stats.multicast++;
1da177e4
LT		 1518 } else {
1519 /* error ... */
6fb7298c 1520 dev->stats.rx_errors++;
1da177e4 1521
6fb7298c 1522 if (rx_status & RS_ALGNERR) dev->stats.rx_frame_errors++;
1da177e4 1523 if (rx_status & (RS_TOOSHORT | RS_TOOLONG))
6fb7298c
SH		 1524 dev->stats.rx_length_errors++;
1525 if (rx_status & RS_BADCRC) dev->stats.rx_crc_errors++;
1da177e4
LT		 1526 }
1527 /* Let the MMU free the memory of this packet. */
1528 outw(MC_RELEASE, ioaddr + MMU_CMD);
1da177e4
LT		 1529}
1530
1da177e4
LT		 1531/*======================================================================
1532
1533 Set the receive mode.
1534
1535 This routine is used by both the protocol level to notify us of
1536 promiscuous/multicast mode changes, and by the open/reset code to
1537 initialize the Rx registers. We always set the multicast list and
1538 leave the receiver running.
1539
1540======================================================================*/
1541
1542static void set_rx_mode(struct net_device *dev)
1543{
906da809 1544 unsigned int ioaddr = dev->base_addr;
1da177e4 1545 struct smc_private *smc = netdev_priv(dev);
a6d37024 1546 unsigned char multicast_table[8];
1da177e4
LT		 1547 unsigned long flags;
1548 u_short rx_cfg_setting;
a6d37024
KK		 1549 int i;
1550
1551 memset(multicast_table, 0, sizeof(multicast_table));
1da177e4
LT		 1552
1553 if (dev->flags & IFF_PROMISC) {
1da177e4
LT		 1554 rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti;
1555 } else if (dev->flags & IFF_ALLMULTI)
1556 rx_cfg_setting = RxStripCRC | RxEnable | RxAllMulti;
1557 else {
4cd24eaf 1558 if (!netdev_mc_empty(dev)) {
22bedad3 1559 struct netdev_hw_addr *ha;
91fea585 1560
22bedad3
JP		 1561 netdev_for_each_mc_addr(ha, dev) {
1562 u_int position = ether_crc(6, ha->addr);
91fea585
JP		 1563 multicast_table[position >> 29] |= 1 << ((position >> 26) & 7);
1564 }
1da177e4
LT		 1565 }
1566 rx_cfg_setting = RxStripCRC | RxEnable;
1567 }
1568
1569 /* Load MC table and Rx setting into the chip without interrupts. */
1570 spin_lock_irqsave(&smc->lock, flags);
1571 SMC_SELECT_BANK(3);
a6d37024
KK		 1572 for (i = 0; i < 8; i++)
1573 outb(multicast_table[i], ioaddr + MULTICAST0 + i);
1da177e4
LT		 1574 SMC_SELECT_BANK(0);
1575 outw(rx_cfg_setting, ioaddr + RCR);
1576 SMC_SELECT_BANK(2);
1577 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1578}
1579
1580/*======================================================================
1581
1582 Senses when a card's config changes. Here, it's coax or TP.
1583
1584======================================================================*/
1585
1586static int s9k_config(struct net_device *dev, struct ifmap *map)
1587{
1588 struct smc_private *smc = netdev_priv(dev);
1589 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
1590 if (smc->cfg & CFG_MII_SELECT)
1591 return -EOPNOTSUPP;
1592 else if (map->port > 2)
1593 return -EINVAL;
1594 dev->if_port = map->port;
636b8116 1595 netdev_info(dev, "switched to %s port\n", if_names[dev->if_port]);
1da177e4
LT		 1596 smc_reset(dev);
1597 }
1598 return 0;
1599}
1600
1601/*======================================================================
1602
1603 Reset the chip, reloading every register that might be corrupted.
1604
1605======================================================================*/
1606
1607/*
1608 Set transceiver type, perhaps to something other than what the user
1609 specified in dev->if_port.
1610*/
1611static void smc_set_xcvr(struct net_device *dev, int if_port)
1612{
1613 struct smc_private *smc = netdev_priv(dev);
906da809 1614 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1615 u_short saved_bank;
1616
1617 saved_bank = inw(ioaddr + BANK_SELECT);
1618 SMC_SELECT_BANK(1);
1619 if (if_port == 2) {
1620 outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG);
1621 if ((smc->manfid == MANFID_OSITECH) &&
1622 (smc->cardid != PRODID_OSITECH_SEVEN))
1623 set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1624 smc->media_status = ((dev->if_port == 0) ? 0x0001 : 0x0002);
1625 } else {
1626 outw(smc->cfg, ioaddr + CONFIG);
1627 if ((smc->manfid == MANFID_OSITECH) &&
1628 (smc->cardid != PRODID_OSITECH_SEVEN))
1629 mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1630 smc->media_status = ((dev->if_port == 0) ? 0x0012 : 0x4001);
1631 }
1632 SMC_SELECT_BANK(saved_bank);
1633}
1634
1635static void smc_reset(struct net_device *dev)
1636{
906da809 1637 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1638 struct smc_private *smc = netdev_priv(dev);
1639 int i;
1640
c501b1f5 1641 netdev_dbg(dev, "smc91c92 reset called.\n");
1da177e4
LT		 1642
1643 /* The first interaction must be a write to bring the chip out
1644 of sleep mode. */
1645 SMC_SELECT_BANK(0);
1646 /* Reset the chip. */
1647 outw(RCR_SOFTRESET, ioaddr + RCR);
1648 udelay(10);
1649
1650 /* Clear the transmit and receive configuration registers. */
1651 outw(RCR_CLEAR, ioaddr + RCR);
1652 outw(TCR_CLEAR, ioaddr + TCR);
1653
1654 /* Set the Window 1 control, configuration and station addr registers.
1655 No point in writing the I/O base register ;-> */
1656 SMC_SELECT_BANK(1);
d6e05edc 1657 /* Automatically release successfully transmitted packets,
1da177e4
LT		 1658 Accept link errors, counter and Tx error interrupts. */
1659 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1660 ioaddr + CONTROL);
1661 smc_set_xcvr(dev, dev->if_port);
1662 if ((smc->manfid == MANFID_OSITECH) &&
1663 (smc->cardid != PRODID_OSITECH_SEVEN))
1664 outw((dev->if_port == 2 ? OSI_AUI_PWR : 0) |
1665 (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00),
1666 ioaddr - 0x10 + OSITECH_AUI_PWR);
1667
1668 /* Fill in the physical address. The databook is wrong about the order! */
1669 for (i = 0; i < 6; i += 2)
1670 outw((dev->dev_addr[i+1]<<8)+dev->dev_addr[i],
1671 ioaddr + ADDR0 + i);
1672
1673 /* Reset the MMU */
1674 SMC_SELECT_BANK(2);
1675 outw(MC_RESET, ioaddr + MMU_CMD);
1676 outw(0, ioaddr + INTERRUPT);
1677
1678 /* Re-enable the chip. */
1679 SMC_SELECT_BANK(0);
1680 outw(((smc->cfg & CFG_MII_SELECT) ? 0 : TCR_MONCSN) |
1681 TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR);
1682 set_rx_mode(dev);
1683
1684 if (smc->cfg & CFG_MII_SELECT) {
1685 SMC_SELECT_BANK(3);
1686
1687 /* Reset MII */
1688 mdio_write(dev, smc->mii_if.phy_id, 0, 0x8000);
1689
1690 /* Advertise 100F, 100H, 10F, 10H */
1691 mdio_write(dev, smc->mii_if.phy_id, 4, 0x01e1);
1692
1693 /* Restart MII autonegotiation */
1694 mdio_write(dev, smc->mii_if.phy_id, 0, 0x0000);
1695 mdio_write(dev, smc->mii_if.phy_id, 0, 0x1200);
1696 }
1697
1698 /* Enable interrupts. */
1699 SMC_SELECT_BANK(2);
1700 outw((IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT) << 8,
1701 ioaddr + INTERRUPT);
1702}
1703
1704/*======================================================================
1705
1706 Media selection timer routine
1707
1708======================================================================*/
1709
1710static void media_check(u_long arg)
1711{
1712 struct net_device *dev = (struct net_device *) arg;
1713 struct smc_private *smc = netdev_priv(dev);
906da809 1714 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1715 u_short i, media, saved_bank;
1716 u_short link;
85e27831
K		 1717 unsigned long flags;
1718
1719 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT		 1720
1721 saved_bank = inw(ioaddr + BANK_SELECT);
1722
1723 if (!netif_device_present(dev))
1724 goto reschedule;
1725
1726 SMC_SELECT_BANK(2);
1727
1728 /* need MC_RESET to keep the memory consistent. errata? */
1729 if (smc->rx_ovrn) {
1730 outw(MC_RESET, ioaddr + MMU_CMD);
1731 smc->rx_ovrn = 0;
1732 }
1733 i = inw(ioaddr + INTERRUPT);
1734 SMC_SELECT_BANK(0);
1735 media = inw(ioaddr + EPH) & EPH_LINK_OK;
1736 SMC_SELECT_BANK(1);
1737 media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1;
1738
2a915157
KK		 1739 SMC_SELECT_BANK(saved_bank);
1740 spin_unlock_irqrestore(&smc->lock, flags);
1741
1da177e4
LT		 1742 /* Check for pending interrupt with watchdog flag set: with
1743 this, we can limp along even if the interrupt is blocked */
1744 if (smc->watchdog++ && ((i>>8) & i)) {
1745 if (!smc->fast_poll)
636b8116 1746 netdev_info(dev, "interrupt(s) dropped!\n");
2a915157 1747 local_irq_save(flags);
e363d138 1748 smc_interrupt(dev->irq, dev);
2a915157 1749 local_irq_restore(flags);
1da177e4
LT		 1750 smc->fast_poll = HZ;
1751 }
1752 if (smc->fast_poll) {
1753 smc->fast_poll--;
1754 smc->media.expires = jiffies + HZ/100;
1755 add_timer(&smc->media);
1da177e4
LT		 1756 return;
1757 }
1758
2a915157
KK		 1759 spin_lock_irqsave(&smc->lock, flags);
1760
1761 saved_bank = inw(ioaddr + BANK_SELECT);
1762
1da177e4
LT		 1763 if (smc->cfg & CFG_MII_SELECT) {
1764 if (smc->mii_if.phy_id < 0)
1765 goto reschedule;
1766
1767 SMC_SELECT_BANK(3);
1768 link = mdio_read(dev, smc->mii_if.phy_id, 1);
1769 if (!link || (link == 0xffff)) {
636b8116 1770 netdev_info(dev, "MII is missing!\n");
1da177e4
LT		 1771 smc->mii_if.phy_id = -1;
1772 goto reschedule;
1773 }
1774
1775 link &= 0x0004;
1776 if (link != smc->link_status) {
1777 u_short p = mdio_read(dev, smc->mii_if.phy_id, 5);
636b8116 1778 netdev_info(dev, "%s link beat\n", link ? "found" : "lost");
1da177e4
LT		 1779 smc->duplex = (((p & 0x0100) || ((p & 0x1c0) == 0x40))
1780 ? TCR_FDUPLX : 0);
1781 if (link) {
636b8116
JP		 1782 netdev_info(dev, "autonegotiation complete: "
1783 "%dbaseT-%cD selected\n",
1784 (p & 0x0180) ? 100 : 10, smc->duplex ? 'F' : 'H');
1da177e4
LT		 1785 }
1786 SMC_SELECT_BANK(0);
1787 outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR);
1788 smc->link_status = link;
1789 }
1790 goto reschedule;
1791 }
1792
1793 /* Ignore collisions unless we've had no rx's recently */
4851d3aa 1794 if (time_after(jiffies, dev->last_rx + HZ)) {
1da177e4
LT		 1795 if (smc->tx_err || (smc->media_status & EPH_16COL))
1796 media |= EPH_16COL;
1797 }
1798 smc->tx_err = 0;
1799
1800 if (media != smc->media_status) {
1801 if ((media & smc->media_status & 1) &&
1802 ((smc->media_status ^ media) & EPH_LINK_OK))
636b8116
JP		 1803 netdev_info(dev, "%s link beat\n",
1804 smc->media_status & EPH_LINK_OK ? "lost" : "found");
1da177e4
LT		 1805 else if ((media & smc->media_status & 2) &&
1806 ((smc->media_status ^ media) & EPH_16COL))
636b8116
JP		 1807 netdev_info(dev, "coax cable %s\n",
1808 media & EPH_16COL ? "problem" : "ok");
1da177e4
LT		 1809 if (dev->if_port == 0) {
1810 if (media & 1) {
1811 if (media & EPH_LINK_OK)
636b8116 1812 netdev_info(dev, "flipped to 10baseT\n");
1da177e4
LT		 1813 else
1814 smc_set_xcvr(dev, 2);
1815 } else {
1816 if (media & EPH_16COL)
1817 smc_set_xcvr(dev, 1);
1818 else
636b8116 1819 netdev_info(dev, "flipped to 10base2\n");
1da177e4
LT		 1820 }
1821 }
1822 smc->media_status = media;
1823 }
1824
1825reschedule:
1826 smc->media.expires = jiffies + HZ;
1827 add_timer(&smc->media);
1828 SMC_SELECT_BANK(saved_bank);
85e27831 1829 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1830}
1831
1832static int smc_link_ok(struct net_device *dev)
1833{
906da809 1834 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1835 struct smc_private *smc = netdev_priv(dev);
1836
1837 if (smc->cfg & CFG_MII_SELECT) {
1838 return mii_link_ok(&smc->mii_if);
1839 } else {
1840 SMC_SELECT_BANK(0);
1841 return inw(ioaddr + EPH) & EPH_LINK_OK;
1842 }
1843}
1844
1845static int smc_netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1846{
1847 u16 tmp;
906da809 1848 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1849
1850 ecmd->supported = (SUPPORTED_TP | SUPPORTED_AUI |
1851 SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full);
1852
1853 SMC_SELECT_BANK(1);
1854 tmp = inw(ioaddr + CONFIG);
1855 ecmd->port = (tmp & CFG_AUI_SELECT) ? PORT_AUI : PORT_TP;
1856 ecmd->transceiver = XCVR_INTERNAL;
70739497 1857 ethtool_cmd_speed_set(ecmd, SPEED_10);
1da177e4
LT		 1858 ecmd->phy_address = ioaddr + MGMT;
1859
1860 SMC_SELECT_BANK(0);
1861 tmp = inw(ioaddr + TCR);
1862 ecmd->duplex = (tmp & TCR_FDUPLX) ? DUPLEX_FULL : DUPLEX_HALF;
1863
1864 return 0;
1865}
1866
1867static int smc_netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1868{
1869 u16 tmp;
906da809 1870 unsigned int ioaddr = dev->base_addr;
1da177e4 1871
25db0338
DD		 1872 if (ethtool_cmd_speed(ecmd) != SPEED_10)
1873 return -EINVAL;
1da177e4
LT		 1874 if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
1875 return -EINVAL;
1876 if (ecmd->port != PORT_TP && ecmd->port != PORT_AUI)
1877 return -EINVAL;
1878 if (ecmd->transceiver != XCVR_INTERNAL)
1879 return -EINVAL;
1880
1881 if (ecmd->port == PORT_AUI)
1882 smc_set_xcvr(dev, 1);
1883 else
1884 smc_set_xcvr(dev, 0);
1885
1886 SMC_SELECT_BANK(0);
1887 tmp = inw(ioaddr + TCR);
1888 if (ecmd->duplex == DUPLEX_FULL)
1889 tmp |= TCR_FDUPLX;
1890 else
1891 tmp &= ~TCR_FDUPLX;
1892 outw(tmp, ioaddr + TCR);
1893
1894 return 0;
1895}
1896
1897static int check_if_running(struct net_device *dev)
1898{
1899 if (!netif_running(dev))
1900 return -EINVAL;
1901 return 0;
1902}
1903
1904static void smc_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1905{
33a5ba14
RJ		 1906 strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
1907 strlcpy(info->version, DRV_VERSION, sizeof(info->version));
1da177e4
LT		 1908}
1909
1910static int smc_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1911{
1912 struct smc_private *smc = netdev_priv(dev);
906da809 1913 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1914 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1915 int ret;
2a915157 1916 unsigned long flags;
1da177e4 1917
2a915157 1918 spin_lock_irqsave(&smc->lock, flags);
85e27831 1919 SMC_SELECT_BANK(3);
1da177e4
LT		 1920 if (smc->cfg & CFG_MII_SELECT)
1921 ret = mii_ethtool_gset(&smc->mii_if, ecmd);
1922 else
1923 ret = smc_netdev_get_ecmd(dev, ecmd);
1da177e4 1924 SMC_SELECT_BANK(saved_bank);
2a915157 1925 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1926 return ret;
1927}
1928
1929static int smc_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1930{
1931 struct smc_private *smc = netdev_priv(dev);
906da809 1932 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1933 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1934 int ret;
2a915157 1935 unsigned long flags;
1da177e4 1936
2a915157 1937 spin_lock_irqsave(&smc->lock, flags);
85e27831 1938 SMC_SELECT_BANK(3);
1da177e4
LT		 1939 if (smc->cfg & CFG_MII_SELECT)
1940 ret = mii_ethtool_sset(&smc->mii_if, ecmd);
1941 else
1942 ret = smc_netdev_set_ecmd(dev, ecmd);
1da177e4 1943 SMC_SELECT_BANK(saved_bank);
2a915157 1944 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1945 return ret;
1946}
1947
1948static u32 smc_get_link(struct net_device *dev)
1949{
1950 struct smc_private *smc = netdev_priv(dev);
906da809 1951 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1952 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1953 u32 ret;
2a915157 1954 unsigned long flags;
1da177e4 1955
2a915157 1956 spin_lock_irqsave(&smc->lock, flags);
85e27831 1957 SMC_SELECT_BANK(3);
1da177e4 1958 ret = smc_link_ok(dev);
1da177e4 1959 SMC_SELECT_BANK(saved_bank);
2a915157 1960 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1961 return ret;
1962}
1963
1da177e4
LT		 1964static int smc_nway_reset(struct net_device *dev)
1965{
1966 struct smc_private *smc = netdev_priv(dev);
1967 if (smc->cfg & CFG_MII_SELECT) {
906da809 1968 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1969 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1970 int res;
1971
1972 SMC_SELECT_BANK(3);
1973 res = mii_nway_restart(&smc->mii_if);
1974 SMC_SELECT_BANK(saved_bank);
1975
1976 return res;
1977 } else
1978 return -EOPNOTSUPP;
1979}
1980
7282d491 1981static const struct ethtool_ops ethtool_ops = {
1da177e4
LT		 1982 .begin = check_if_running,
1983 .get_drvinfo = smc_get_drvinfo,
1984 .get_settings = smc_get_settings,
1985 .set_settings = smc_set_settings,
1986 .get_link = smc_get_link,
1da177e4
LT		 1987 .nway_reset = smc_nway_reset,
1988};
1989
1990static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
1991{
1992 struct smc_private *smc = netdev_priv(dev);
1993 struct mii_ioctl_data *mii = if_mii(rq);
1994 int rc = 0;
1995 u16 saved_bank;
906da809 1996 unsigned int ioaddr = dev->base_addr;
2a915157 1997 unsigned long flags;
1da177e4
LT		 1998
1999 if (!netif_running(dev))
2000 return -EINVAL;
2001
2a915157 2002 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT		 2003 saved_bank = inw(ioaddr + BANK_SELECT);
2004 SMC_SELECT_BANK(3);
2005 rc = generic_mii_ioctl(&smc->mii_if, mii, cmd, NULL);
2006 SMC_SELECT_BANK(saved_bank);
2a915157 2007 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 2008 return rc;
2009}
2010
25f8f54f 2011static const struct pcmcia_device_id smc91c92_ids[] = {
5c672220
DB		 2012 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0109, 0x0501),
2013 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0140, 0x000a),
2014 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3288", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x04cd2988, 0x46a52d63),
2015 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3336", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x0143b773, 0x46a52d63),
2016 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "EM1144T", "PCMCIA MODEM", 0xf510db04, 0x856d66c8, 0xbd6c43ef),
2017 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "XJEM1144/CCEM1144", "PCMCIA MODEM", 0xf510db04, 0x52d21e1e, 0xbd6c43ef),
2018 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c),
2019 PCMCIA_PFC_DEVICE_PROD_ID12(0, "MEGAHERTZ", "XJEM1144/CCEM1144", 0xf510db04, 0x52d21e1e),
d277ad0e
K		 2020 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Diamonds Modem+Ethernet", 0xc2f80cd, 0x656947b9),
2021 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Hearts Modem+Ethernet", 0xc2f80cd, 0xdc9ba5ed),
5c672220
DB		 2022 PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x016c, 0x0020),
2023 PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0023),
2024 PCMCIA_DEVICE_PROD_ID123("BASICS by New Media Corporation", "Ethernet", "SMC91C94", 0x23c78a9d, 0x00b2e941, 0xcef397fb),
2025 PCMCIA_DEVICE_PROD_ID12("ARGOSY", "Fast Ethernet PCCard", 0x78f308dc, 0xdcea68bc),
2026 PCMCIA_DEVICE_PROD_ID12("dit Co., Ltd.", "PC Card-10/100BTX", 0xe59365c8, 0x6a2161d1),
2027 PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L100C", 0x6a26d1cf, 0xc16ce9c5),
2028 PCMCIA_DEVICE_PROD_ID12("Farallon", "Farallon Enet", 0x58d93fc4, 0x244734e9),
2029 PCMCIA_DEVICE_PROD_ID12("Megahertz", "CC10BT/2", 0x33234748, 0x3c95b953),
2030 PCMCIA_DEVICE_PROD_ID12("MELCO/SMC", "LPC-TX", 0xa2cd8e6d, 0x42da662a),
d277ad0e
K		 2031 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Four of Diamonds Ethernet", 0xc2f80cd, 0xb3466314),
2032 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Seven of Diamonds Ethernet", 0xc2f80cd, 0x194b650a),
5c672220
DB		 2033 PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast Ethernet PCCard", 0x281f1c5d, 0xdcea68bc),
2034 PCMCIA_DEVICE_PROD_ID12("Psion", "10Mb Ethernet", 0x4ef00b21, 0x844be9e9),
2035 PCMCIA_DEVICE_PROD_ID12("SMC", "EtherEZ Ethernet 8020", 0xc4f8b18b, 0x4a0eeb2d),
2036 /* These conflict with other cards! */
2037 /* PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0100), */
2038 /* PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), */
2039 PCMCIA_DEVICE_NULL,
2040};
2041MODULE_DEVICE_TABLE(pcmcia, smc91c92_ids);
2042
1da177e4
LT		 2043static struct pcmcia_driver smc91c92_cs_driver = {
2044 .owner = THIS_MODULE,
2e9b981a 2045 .name = "smc91c92_cs",
15b99ac1 2046 .probe = smc91c92_probe,
cc3b4866 2047 .remove = smc91c92_detach,
5c672220 2048 .id_table = smc91c92_ids,
98e4c28b
DB		 2049 .suspend = smc91c92_suspend,
2050 .resume = smc91c92_resume,
1da177e4 2051};
fdd3f29e 2052module_pcmcia_driver(smc91c92_cs_driver);
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