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47dd7a54 GC |
1 | /******************************************************************************* |
2 | Copyright (C) 2007-2009 STMicroelectronics Ltd | |
3 | ||
4 | This program is free software; you can redistribute it and/or modify it | |
5 | under the terms and conditions of the GNU General Public License, | |
6 | version 2, as published by the Free Software Foundation. | |
7 | ||
8 | This program is distributed in the hope it will be useful, but WITHOUT | |
9 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | more details. | |
12 | ||
13 | You should have received a copy of the GNU General Public License along with | |
14 | this program; if not, write to the Free Software Foundation, Inc., | |
15 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
16 | ||
17 | The full GNU General Public License is included in this distribution in | |
18 | the file called "COPYING". | |
19 | ||
20 | Author: Giuseppe Cavallaro <peppe.cavallaro@st.com> | |
21 | *******************************************************************************/ | |
22 | ||
bd4242df RK |
23 | #ifndef __STMMAC_H__ |
24 | #define __STMMAC_H__ | |
25 | ||
bfab27a1 | 26 | #define STMMAC_RESOURCE_NAME "stmmaceth" |
94fbbbf8 | 27 | #define DRV_MODULE_VERSION "March_2013" |
ba1377ff GC |
28 | |
29 | #include <linux/clk.h> | |
ee7946a7 | 30 | #include <linux/stmmac.h> |
286a8372 | 31 | #include <linux/phy.h> |
33d5e332 | 32 | #include <linux/pci.h> |
47dd7a54 | 33 | #include "common.h" |
92ba6888 | 34 | #include <linux/ptp_clock_kernel.h> |
c5e4ddbd | 35 | #include <linux/reset.h> |
47dd7a54 | 36 | |
362b37be GC |
37 | struct stmmac_tx_info { |
38 | dma_addr_t buf; | |
39 | bool map_as_page; | |
40 | }; | |
41 | ||
47dd7a54 GC |
42 | struct stmmac_priv { |
43 | /* Frequently used values are kept adjacent for cache effect */ | |
1bb6dea8 GC |
44 | struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp; |
45 | struct dma_desc *dma_tx; | |
47dd7a54 GC |
46 | struct sk_buff **tx_skbuff; |
47 | unsigned int cur_tx; | |
48 | unsigned int dirty_tx; | |
49 | unsigned int dma_tx_size; | |
1bb6dea8 GC |
50 | u32 tx_count_frames; |
51 | u32 tx_coal_frames; | |
52 | u32 tx_coal_timer; | |
362b37be | 53 | struct stmmac_tx_info *tx_skbuff_dma; |
1bb6dea8 | 54 | dma_addr_t dma_tx_phy; |
47dd7a54 | 55 | int tx_coalesce; |
1bb6dea8 GC |
56 | int hwts_tx_en; |
57 | spinlock_t tx_lock; | |
58 | bool tx_path_in_lpi_mode; | |
59 | struct timer_list txtimer; | |
47dd7a54 | 60 | |
1bb6dea8 GC |
61 | struct dma_desc *dma_rx ____cacheline_aligned_in_smp; |
62 | struct dma_extended_desc *dma_erx; | |
63 | struct sk_buff **rx_skbuff; | |
47dd7a54 GC |
64 | unsigned int cur_rx; |
65 | unsigned int dirty_rx; | |
1bb6dea8 GC |
66 | unsigned int dma_rx_size; |
67 | unsigned int dma_buf_sz; | |
68 | u32 rx_riwt; | |
69 | int hwts_rx_en; | |
47dd7a54 | 70 | dma_addr_t *rx_skbuff_dma; |
1bb6dea8 | 71 | dma_addr_t dma_rx_phy; |
47dd7a54 | 72 | |
1bb6dea8 GC |
73 | struct napi_struct napi ____cacheline_aligned_in_smp; |
74 | ||
75 | void __iomem *ioaddr; | |
47dd7a54 | 76 | struct net_device *dev; |
47dd7a54 | 77 | struct device *device; |
db98a0b0 | 78 | struct mac_device_info *hw; |
1bb6dea8 | 79 | spinlock_t lock; |
47dd7a54 | 80 | |
1bb6dea8 | 81 | struct phy_device *phydev ____cacheline_aligned_in_smp; |
47dd7a54 GC |
82 | int oldlink; |
83 | int speed; | |
84 | int oldduplex; | |
85 | unsigned int flow_ctrl; | |
86 | unsigned int pause; | |
87 | struct mii_bus *mii; | |
36bcfe7d | 88 | int mii_irq[PHY_MAX_ADDR]; |
47dd7a54 | 89 | |
1bb6dea8 | 90 | struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp; |
9dfeb4d9 | 91 | struct plat_stmmacenet_data *plat; |
e7434821 | 92 | struct dma_features dma_cap; |
1bb6dea8 | 93 | struct stmmac_counters mmc; |
19e30c14 | 94 | int hw_cap_support; |
1bb6dea8 GC |
95 | int synopsys_id; |
96 | u32 msg_enable; | |
97 | int wolopts; | |
98 | int wol_irq; | |
ba1377ff | 99 | struct clk *stmmac_clk; |
5f9755d2 | 100 | struct clk *pclk; |
c5e4ddbd | 101 | struct reset_control *stmmac_rst; |
cd7201f4 | 102 | int clk_csr; |
d765955d | 103 | struct timer_list eee_ctrl_timer; |
d765955d GC |
104 | int lpi_irq; |
105 | int eee_enabled; | |
106 | int eee_active; | |
107 | int tx_lpi_timer; | |
1bb6dea8 | 108 | int pcs; |
4a7d666a | 109 | unsigned int mode; |
c24602ef | 110 | int extend_desc; |
92ba6888 RK |
111 | struct ptp_clock *ptp_clock; |
112 | struct ptp_clock_info ptp_clock_ops; | |
1bb6dea8 | 113 | unsigned int default_addend; |
5566401f GC |
114 | struct clk *clk_ptp_ref; |
115 | unsigned int clk_ptp_rate; | |
1bb6dea8 GC |
116 | u32 adv_ts; |
117 | int use_riwt; | |
89f7f2cf | 118 | int irq_wake; |
92ba6888 | 119 | spinlock_t ptp_lock; |
466c5ac8 MO |
120 | |
121 | #ifdef CONFIG_DEBUG_FS | |
122 | struct dentry *dbgfs_dir; | |
123 | struct dentry *dbgfs_rings_status; | |
124 | struct dentry *dbgfs_dma_cap; | |
125 | #endif | |
47dd7a54 GC |
126 | }; |
127 | ||
d6cc64ef JP |
128 | int stmmac_mdio_unregister(struct net_device *ndev); |
129 | int stmmac_mdio_register(struct net_device *ndev); | |
073752aa | 130 | int stmmac_mdio_reset(struct mii_bus *mii); |
d6cc64ef | 131 | void stmmac_set_ethtool_ops(struct net_device *netdev); |
915af656 | 132 | |
d6cc64ef JP |
133 | int stmmac_ptp_register(struct stmmac_priv *priv); |
134 | void stmmac_ptp_unregister(struct stmmac_priv *priv); | |
bfab27a1 GC |
135 | int stmmac_resume(struct net_device *ndev); |
136 | int stmmac_suspend(struct net_device *ndev); | |
137 | int stmmac_dvr_remove(struct net_device *ndev); | |
138 | struct stmmac_priv *stmmac_dvr_probe(struct device *device, | |
cf3f047b GC |
139 | struct plat_stmmacenet_data *plat_dat, |
140 | void __iomem *addr); | |
d765955d GC |
141 | void stmmac_disable_eee_mode(struct stmmac_priv *priv); |
142 | bool stmmac_eee_init(struct stmmac_priv *priv); | |
ba1377ff | 143 | |
bd4242df | 144 | #endif /* __STMMAC_H__ */ |