[mirror_ubuntu-bionic-kernel.git] / drivers / net / ethernet / stmicro / stmmac / stmmac.h

/*******************************************************************************
  Copyright (C) 2007-2009  STMicroelectronics Ltd

  This program is free software; you can redistribute it and/or modify it
  under the terms and conditions of the GNU General Public License,
  version 2, as published by the Free Software Foundation.

  This program is distributed in the hope it will be useful, but WITHOUT
  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  more details.

  You should have received a copy of the GNU General Public License along with
  this program; if not, write to the Free Software Foundation, Inc.,
  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.

  The full GNU General Public License is included in this distribution in
  the file called "COPYING".

  Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
*******************************************************************************/

#ifndef __STMMAC_H__
#define __STMMAC_H__

#define STMMAC_RESOURCE_NAME   "stmmaceth"
#define DRV_MODULE_VERSION	"Jan_2016"

#include <linux/clk.h>
#include <linux/stmmac.h>
#include <linux/phy.h>
#include <linux/pci.h>
#include "common.h"
#include <linux/ptp_clock_kernel.h>
#include <linux/reset.h>

struct stmmac_resources {
	void __iomem *addr;
	const char *mac;
	int wol_irq;
	int lpi_irq;
	int irq;
};

struct stmmac_tx_info {
	dma_addr_t buf;
	bool map_as_page;
	unsigned len;
	bool last_segment;
	bool is_jumbo;
};

struct stmmac_priv {
	/* Frequently used values are kept adjacent for cache effect */
	struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp;
	struct dma_desc *dma_tx;
	struct sk_buff **tx_skbuff;
	unsigned int cur_tx;
	unsigned int dirty_tx;
	u32 tx_count_frames;
	u32 tx_coal_frames;
	u32 tx_coal_timer;
	struct stmmac_tx_info *tx_skbuff_dma;
	dma_addr_t dma_tx_phy;
	int tx_coalesce;
	int hwts_tx_en;
	spinlock_t tx_lock;
	bool tx_path_in_lpi_mode;
	struct timer_list txtimer;
	bool tso;

	struct dma_desc *dma_rx	____cacheline_aligned_in_smp;
	struct dma_extended_desc *dma_erx;
	struct sk_buff **rx_skbuff;
	unsigned int cur_rx;
	unsigned int dirty_rx;
	unsigned int dma_buf_sz;
	unsigned int rx_copybreak;
	unsigned int rx_zeroc_thresh;
	u32 rx_riwt;
	int hwts_rx_en;
	dma_addr_t *rx_skbuff_dma;
	dma_addr_t dma_rx_phy;

	struct napi_struct napi ____cacheline_aligned_in_smp;

	void __iomem *ioaddr;
	struct net_device *dev;
	struct device *device;
	struct mac_device_info *hw;
	spinlock_t lock;

	struct phy_device *phydev ____cacheline_aligned_in_smp;
	int oldlink;
	int speed;
	int oldduplex;
	unsigned int flow_ctrl;
	unsigned int pause;
	struct mii_bus *mii;
	int mii_irq[PHY_MAX_ADDR];

	struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp;
	struct plat_stmmacenet_data *plat;
	struct dma_features dma_cap;
	struct stmmac_counters mmc;
	int hw_cap_support;
	int synopsys_id;
	u32 msg_enable;
	int wolopts;
	int wol_irq;
	struct clk *stmmac_clk;
	struct clk *pclk;
	struct reset_control *stmmac_rst;
	int clk_csr;
	struct timer_list eee_ctrl_timer;
	int lpi_irq;
	int eee_enabled;
	int eee_active;
	int tx_lpi_timer;
	unsigned int mode;
	int extend_desc;
	struct ptp_clock *ptp_clock;
	struct ptp_clock_info ptp_clock_ops;
	unsigned int default_addend;
	struct clk *clk_ptp_ref;
	unsigned int clk_ptp_rate;
	u32 adv_ts;
	int use_riwt;
	int irq_wake;
	spinlock_t ptp_lock;
	void __iomem *mmcaddr;
	void __iomem *ptpaddr;
	u32 rx_tail_addr;
	u32 tx_tail_addr;
	u32 mss;

#ifdef CONFIG_DEBUG_FS
	struct dentry *dbgfs_dir;
	struct dentry *dbgfs_rings_status;
	struct dentry *dbgfs_dma_cap;
#endif
};

int stmmac_mdio_unregister(struct net_device *ndev);
int stmmac_mdio_register(struct net_device *ndev);
int stmmac_mdio_reset(struct mii_bus *mii);
void stmmac_set_ethtool_ops(struct net_device *netdev);

void stmmac_ptp_register(struct stmmac_priv *priv);
void stmmac_ptp_unregister(struct stmmac_priv *priv);
int stmmac_resume(struct device *dev);
int stmmac_suspend(struct device *dev);
int stmmac_dvr_remove(struct device *dev);
int stmmac_dvr_probe(struct device *device,
		     struct plat_stmmacenet_data *plat_dat,
		     struct stmmac_resources *res);
void stmmac_disable_eee_mode(struct stmmac_priv *priv);
bool stmmac_eee_init(struct stmmac_priv *priv);

#endif /* __STMMAC_H__ */
Commit	Line	Data
47dd7a54 GC	1	/*******************************************************************************
	2	Copyright (C) 2007-2009 STMicroelectronics Ltd
	3
	4	This program is free software; you can redistribute it and/or modify it
	5	under the terms and conditions of the GNU General Public License,
	6	version 2, as published by the Free Software Foundation.
	7
	8	This program is distributed in the hope it will be useful, but WITHOUT
	9	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	10	FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	11	more details.
	12
	13	You should have received a copy of the GNU General Public License along with
	14	this program; if not, write to the Free Software Foundation, Inc.,
	15	51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
	16
	17	The full GNU General Public License is included in this distribution in
	18	the file called "COPYING".
	19
	20	Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
	21	*******************************************************************************/
	22
bd4242df RK	23	#ifndef __STMMAC_H__
	24	#define __STMMAC_H__
	25
bfab27a1	26	#define STMMAC_RESOURCE_NAME "stmmaceth"
06bce7dd	27	#define DRV_MODULE_VERSION "Jan_2016"
ba1377ff GC	28
ba1377ff GC	29	#include <linux/clk.h>
ee7946a7	30	#include <linux/stmmac.h>
286a8372	31	#include <linux/phy.h>
33d5e332	32	#include <linux/pci.h>
47dd7a54	33	#include "common.h"
92ba6888	34	#include <linux/ptp_clock_kernel.h>
c5e4ddbd	35	#include <linux/reset.h>
47dd7a54	36
e56788cf JE	37	struct stmmac_resources {
	38	void __iomem *addr;
	39	const char *mac;
	40	int wol_irq;
	41	int lpi_irq;
	42	int irq;
	43	};
	44
362b37be GC	45	struct stmmac_tx_info {
	46	dma_addr_t buf;
	47	bool map_as_page;
553e2ab3	48	unsigned len;
2a6d8e17	49	bool last_segment;
96951366	50	bool is_jumbo;
362b37be GC	51	};
362b37be GC	52
47dd7a54 GC	53	struct stmmac_priv {
47dd7a54 GC	54	/* Frequently used values are kept adjacent for cache effect */
1bb6dea8 GC	55	struct dma_extended_desc *dma_etx ____cacheline_aligned_in_smp;
1bb6dea8 GC	56	struct dma_desc *dma_tx;
47dd7a54 GC	57	struct sk_buff **tx_skbuff;
	58	unsigned int cur_tx;
	59	unsigned int dirty_tx;
1bb6dea8 GC	60	u32 tx_count_frames;
	61	u32 tx_coal_frames;
	62	u32 tx_coal_timer;
362b37be	63	struct stmmac_tx_info *tx_skbuff_dma;
1bb6dea8	64	dma_addr_t dma_tx_phy;
47dd7a54	65	int tx_coalesce;
1bb6dea8 GC	66	int hwts_tx_en;
	67	spinlock_t tx_lock;
	68	bool tx_path_in_lpi_mode;
	69	struct timer_list txtimer;
f748be53	70	bool tso;
47dd7a54	71
1bb6dea8 GC	72	struct dma_desc *dma_rx ____cacheline_aligned_in_smp;
	73	struct dma_extended_desc *dma_erx;
	74	struct sk_buff **rx_skbuff;
47dd7a54 GC	75	unsigned int cur_rx;
47dd7a54 GC	76	unsigned int dirty_rx;
1bb6dea8	77	unsigned int dma_buf_sz;
22ad3838	78	unsigned int rx_copybreak;
120e87f9	79	unsigned int rx_zeroc_thresh;
1bb6dea8 GC	80	u32 rx_riwt;
1bb6dea8 GC	81	int hwts_rx_en;
47dd7a54	82	dma_addr_t *rx_skbuff_dma;
1bb6dea8	83	dma_addr_t dma_rx_phy;
47dd7a54	84
1bb6dea8 GC	85	struct napi_struct napi ____cacheline_aligned_in_smp;
	86
	87	void __iomem *ioaddr;
47dd7a54	88	struct net_device *dev;
47dd7a54	89	struct device *device;
db98a0b0	90	struct mac_device_info *hw;
1bb6dea8	91	spinlock_t lock;
47dd7a54	92
1bb6dea8	93	struct phy_device *phydev ____cacheline_aligned_in_smp;
47dd7a54 GC	94	int oldlink;
	95	int speed;
	96	int oldduplex;
	97	unsigned int flow_ctrl;
	98	unsigned int pause;
	99	struct mii_bus *mii;
36bcfe7d	100	int mii_irq[PHY_MAX_ADDR];
47dd7a54	101
1bb6dea8	102	struct stmmac_extra_stats xstats ____cacheline_aligned_in_smp;
9dfeb4d9	103	struct plat_stmmacenet_data *plat;
e7434821	104	struct dma_features dma_cap;
1bb6dea8	105	struct stmmac_counters mmc;
19e30c14	106	int hw_cap_support;
1bb6dea8 GC	107	int synopsys_id;
	108	u32 msg_enable;
	109	int wolopts;
	110	int wol_irq;
ba1377ff	111	struct clk *stmmac_clk;
5f9755d2	112	struct clk *pclk;
c5e4ddbd	113	struct reset_control *stmmac_rst;
cd7201f4	114	int clk_csr;
d765955d	115	struct timer_list eee_ctrl_timer;
d765955d GC	116	int lpi_irq;
	117	int eee_enabled;
	118	int eee_active;
	119	int tx_lpi_timer;
4a7d666a	120	unsigned int mode;
c24602ef	121	int extend_desc;
92ba6888 RK	122	struct ptp_clock *ptp_clock;
92ba6888 RK	123	struct ptp_clock_info ptp_clock_ops;
1bb6dea8	124	unsigned int default_addend;
5566401f GC	125	struct clk *clk_ptp_ref;
5566401f GC	126	unsigned int clk_ptp_rate;
1bb6dea8 GC	127	u32 adv_ts;
1bb6dea8 GC	128	int use_riwt;
89f7f2cf	129	int irq_wake;
92ba6888	130	spinlock_t ptp_lock;
36ff7c1e	131	void __iomem *mmcaddr;
ba1ffd74	132	void __iomem *ptpaddr;
f748be53 AT	133	u32 rx_tail_addr;
	134	u32 tx_tail_addr;
	135	u32 mss;
466c5ac8 MO	136
	137	#ifdef CONFIG_DEBUG_FS
	138	struct dentry *dbgfs_dir;
	139	struct dentry *dbgfs_rings_status;
	140	struct dentry *dbgfs_dma_cap;
	141	#endif
47dd7a54 GC	142	};
47dd7a54 GC	143
d6cc64ef JP	144	int stmmac_mdio_unregister(struct net_device *ndev);
d6cc64ef JP	145	int stmmac_mdio_register(struct net_device *ndev);
073752aa	146	int stmmac_mdio_reset(struct mii_bus *mii);
d6cc64ef	147	void stmmac_set_ethtool_ops(struct net_device *netdev);
915af656	148
c30a70d3	149	void stmmac_ptp_register(struct stmmac_priv *priv);
d6cc64ef	150	void stmmac_ptp_unregister(struct stmmac_priv *priv);
f4e7bd81 JE	151	int stmmac_resume(struct device *dev);
	152	int stmmac_suspend(struct device *dev);
	153	int stmmac_dvr_remove(struct device *dev);
15ffac73 JE	154	int stmmac_dvr_probe(struct device *device,
	155	struct plat_stmmacenet_data *plat_dat,
	156	struct stmmac_resources *res);
d765955d GC	157	void stmmac_disable_eee_mode(struct stmmac_priv *priv);
d765955d GC	158	bool stmmac_eee_init(struct stmmac_priv *priv);
ba1377ff	159
bd4242df	160	#endif /* __STMMAC_H__ */