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891434b1 RK |
1 | /****************************************************************************** |
2 | PTP Header file | |
3 | ||
4 | Copyright (C) 2013 Vayavya Labs Pvt Ltd | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms and conditions of the GNU General Public License, | |
8 | version 2, as published by the Free Software Foundation. | |
9 | ||
10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | more details. | |
14 | ||
891434b1 RK |
15 | The full GNU General Public License is included in this distribution in |
16 | the file called "COPYING". | |
17 | ||
18 | Author: Rayagond Kokatanur <rayagond@vayavyalabs.com> | |
19 | ******************************************************************************/ | |
20 | ||
d2042052 GC |
21 | #ifndef __STMMAC_PTP_H__ |
22 | #define __STMMAC_PTP_H__ | |
891434b1 | 23 | |
d2042052 GC |
24 | #define PTP_GMAC4_OFFSET 0xb00 |
25 | #define PTP_GMAC3_X_OFFSET 0x700 | |
891434b1 | 26 | |
d2042052 GC |
27 | /* IEEE 1588 PTP register offsets */ |
28 | #define PTP_TCR 0x00 /* Timestamp Control Reg */ | |
29 | #define PTP_SSIR 0x04 /* Sub-Second Increment Reg */ | |
30 | #define PTP_STSR 0x08 /* System Time – Seconds Regr */ | |
31 | #define PTP_STNSR 0x0c /* System Time – Nanoseconds Reg */ | |
32 | #define PTP_STSUR 0x10 /* System Time – Seconds Update Reg */ | |
33 | #define PTP_STNSUR 0x14 /* System Time – Nanoseconds Update Reg */ | |
34 | #define PTP_TAR 0x18 /* Timestamp Addend Reg */ | |
891434b1 | 35 | |
d2042052 GC |
36 | #define PTP_STNSUR_ADDSUB_SHIFT 31 |
37 | #define PTP_DIGITAL_ROLLOVER_MODE 0x3B9ACA00 /* 10e9-1 ns */ | |
38 | #define PTP_BINARY_ROLLOVER_MODE 0x80000000 /* ~0.466 ns */ | |
891434b1 | 39 | |
d2042052 GC |
40 | /* PTP Timestamp control register defines */ |
41 | #define PTP_TCR_TSENA BIT(0) /* Timestamp Enable */ | |
42 | #define PTP_TCR_TSCFUPDT BIT(1) /* Timestamp Fine/Coarse Update */ | |
43 | #define PTP_TCR_TSINIT BIT(2) /* Timestamp Initialize */ | |
44 | #define PTP_TCR_TSUPDT BIT(3) /* Timestamp Update */ | |
45 | #define PTP_TCR_TSTRIG BIT(4) /* Timestamp Interrupt Trigger Enable */ | |
46 | #define PTP_TCR_TSADDREG BIT(5) /* Addend Reg Update */ | |
47 | #define PTP_TCR_TSENALL BIT(8) /* Enable Timestamp for All Frames */ | |
48 | #define PTP_TCR_TSCTRLSSR BIT(9) /* Digital or Binary Rollover Control */ | |
891434b1 | 49 | /* Enable PTP packet Processing for Version 2 Format */ |
d2042052 | 50 | #define PTP_TCR_TSVER2ENA BIT(10) |
891434b1 | 51 | /* Enable Processing of PTP over Ethernet Frames */ |
d2042052 | 52 | #define PTP_TCR_TSIPENA BIT(11) |
891434b1 | 53 | /* Enable Processing of PTP Frames Sent over IPv6-UDP */ |
d2042052 | 54 | #define PTP_TCR_TSIPV6ENA BIT(12) |
891434b1 | 55 | /* Enable Processing of PTP Frames Sent over IPv4-UDP */ |
d2042052 | 56 | #define PTP_TCR_TSIPV4ENA BIT(13) |
891434b1 | 57 | /* Enable Timestamp Snapshot for Event Messages */ |
d2042052 | 58 | #define PTP_TCR_TSEVNTENA BIT(14) |
891434b1 | 59 | /* Enable Snapshot for Messages Relevant to Master */ |
d2042052 | 60 | #define PTP_TCR_TSMSTRENA BIT(15) |
891434b1 | 61 | /* Select PTP packets for Taking Snapshots */ |
fd6720ae MM |
62 | #define PTP_TCR_SNAPTYPSEL_1 BIT(16) |
63 | #define PTP_GMAC4_TCR_SNAPTYPSEL_1 GENMASK(17, 16) | |
891434b1 | 64 | /* Enable MAC address for PTP Frame Filtering */ |
d2042052 GC |
65 | #define PTP_TCR_TSENMACADDR BIT(18) |
66 | ||
67 | /* SSIR defines */ | |
68 | #define PTP_SSIR_SSINC_MASK 0xff | |
69 | #define GMAC4_PTP_SSIR_SSINC_SHIFT 16 | |
891434b1 | 70 | |
d2042052 | 71 | #endif /* __STMMAC_PTP_H__ */ |