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1da177e4
LT		 1/* ewrk3.c: A DIGITAL EtherWORKS 3 ethernet driver for Linux.
2
3 Written 1994 by David C. Davies.
4
5 Copyright 1994 Digital Equipment Corporation.
6
7 This software may be used and distributed according to the terms of
8 the GNU General Public License, incorporated herein by reference.
9
10 This driver is written for the Digital Equipment Corporation series
11 of EtherWORKS ethernet cards:
12
13 DE203 Turbo (BNC)
14 DE204 Turbo (TP)
15 DE205 Turbo (TP BNC)
16
17 The driver has been tested on a relatively busy network using the DE205
18 card and benchmarked with 'ttcp': it transferred 16M of data at 975kB/s
19 (7.8Mb/s) to a DECstation 5000/200.
20
21 The author may be reached at davies@maniac.ultranet.com.
22
23 =========================================================================
24 This driver has been written substantially from scratch, although its
25 inheritance of style and stack interface from 'depca.c' and in turn from
26 Donald Becker's 'lance.c' should be obvious.
27
28 The DE203/4/5 boards all use a new proprietary chip in place of the
29 LANCE chip used in prior cards (DEPCA, DE100, DE200/1/2, DE210, DE422).
30 Use the depca.c driver in the standard distribution for the LANCE based
31 cards from DIGITAL; this driver will not work with them.
32
33 The DE203/4/5 cards have 2 main modes: shared memory and I/O only. I/O
34 only makes all the card accesses through I/O transactions and no high
35 (shared) memory is used. This mode provides a >48% performance penalty
36 and is deprecated in this driver, although allowed to provide initial
37 setup when hardstrapped.
38
39 The shared memory mode comes in 3 flavours: 2kB, 32kB and 64kB. There is
40 no point in using any mode other than the 2kB mode - their performances
41 are virtually identical, although the driver has been tested in the 2kB
42 and 32kB modes. I would suggest you uncomment the line:
43
44 FORCE_2K_MODE;
45
46 to allow the driver to configure the card as a 2kB card at your current
47 base address, thus leaving more room to clutter your system box with
48 other memory hungry boards.
49
50 As many ISA and EISA cards can be supported under this driver as you
51 wish, limited primarily by the available IRQ lines, rather than by the
52 available I/O addresses (24 ISA, 16 EISA). I have checked different
53 configurations of multiple depca cards and ewrk3 cards and have not
54 found a problem yet (provided you have at least depca.c v0.38) ...
55
56 The board IRQ setting must be at an unused IRQ which is auto-probed
57 using Donald Becker's autoprobe routines. All these cards are at
58 {5,10,11,15}.
59
60 No 16MB memory limitation should exist with this driver as DMA is not
61 used and the common memory area is in low memory on the network card (my
62 current system has 20MB and I've not had problems yet).
63
64 The ability to load this driver as a loadable module has been included
65 and used extensively during the driver development (to save those long
66 reboot sequences). To utilise this ability, you have to do 8 things:
67
68 0) have a copy of the loadable modules code installed on your system.
69 1) copy ewrk3.c from the /linux/drivers/net directory to your favourite
70 temporary directory.
71 2) edit the source code near line 1898 to reflect the I/O address and
72 IRQ you're using.
73 3) compile ewrk3.c, but include -DMODULE in the command line to ensure
74 that the correct bits are compiled (see end of source code).
75 4) if you are wanting to add a new card, goto 5. Otherwise, recompile a
76 kernel with the ewrk3 configuration turned off and reboot.
77 5) insmod ewrk3.o
78 [Alan Cox: Changed this so you can insmod ewrk3.o irq=x io=y]
79 [Adam Kropelin: now accepts irq=x1,x2 io=y1,y2 for multiple cards]
80 6) run the net startup bits for your new eth?? interface manually
81 (usually /etc/rc.inet[12] at boot time).
82 7) enjoy!
83
84 Note that autoprobing is not allowed in loadable modules - the system is
85 already up and running and you're messing with interrupts.
86
87 To unload a module, turn off the associated interface
88 'ifconfig eth?? down' then 'rmmod ewrk3'.
89
90 Promiscuous mode has been turned off in this driver, but all the
91 multicast address bits have been turned on. This improved the send
92 performance on a busy network by about 13%.
93
94 Ioctl's have now been provided (primarily because I wanted to grab some
95 packet size statistics). They are patterned after 'plipconfig.c' from a
96 suggestion by Alan Cox. Using these ioctls, you can enable promiscuous
97 mode, add/delete multicast addresses, change the hardware address, get
98 packet size distribution statistics and muck around with the control and
99 status register. I'll add others if and when the need arises.
100
101 TO DO:
102 ------
103
104
105 Revision History
106 ----------------
107
108 Version Date Description
109
110 0.1 26-aug-94 Initial writing. ALPHA code release.
111 0.11 31-aug-94 Fixed: 2k mode memory base calc.,
112 LeMAC version calc.,
113 IRQ vector assignments during autoprobe.
114 0.12 31-aug-94 Tested working on LeMAC2 (DE20[345]-AC) card.
115 Fixed up MCA hash table algorithm.
116 0.20 4-sep-94 Added IOCTL functionality.
117 0.21 14-sep-94 Added I/O mode.
118 0.21axp 15-sep-94 Special version for ALPHA AXP Linux V1.0.
119 0.22 16-sep-94 Added more IOCTLs & tidied up.
120 0.23 21-sep-94 Added transmit cut through.
121 0.24 31-oct-94 Added uid checks in some ioctls.
122 0.30 1-nov-94 BETA code release.
123 0.31 5-dec-94 Added check/allocate region code.
124 0.32 16-jan-95 Broadcast packet fix.
125 0.33 10-Feb-95 Fix recognition bug reported by <bkm@star.rl.ac.uk>.
126 0.40 27-Dec-95 Rationalise MODULE and autoprobe code.
127 Rewrite for portability & updated.
128 ALPHA support from <jestabro@amt.tay1.dec.com>
129 Added verify_area() calls in ewrk3_ioctl() from
130 suggestion by <heiko@colossus.escape.de>.
131 Add new multicasting code.
132 0.41 20-Jan-96 Fix IRQ set up problem reported by
133 <kenneth@bbs.sas.ntu.ac.sg>.
134 0.42 22-Apr-96 Fix alloc_device() bug <jari@markkus2.fimr.fi>
135 0.43 16-Aug-96 Update alloc_device() to conform to de4x5.c
136 0.44 08-Nov-01 use library crc32 functions <Matt_Domsch@dell.com>
137 0.45 19-Jul-02 fix unaligned access on alpha <martin@bruli.net>
138 0.46 10-Oct-02 Multiple NIC support when module <akropel1@rochester.rr.com>
139 0.47 18-Oct-02 ethtool support <akropel1@rochester.rr.com>
140 0.48 18-Oct-02 cli/sti removal for 2.5 <vda@port.imtp.ilyichevsk.odessa.ua>
141 ioctl locking, signature search cleanup <akropel1@rochester.rr.com>
142
143 =========================================================================
144 */
145
146#include <linux/module.h>
147#include <linux/kernel.h>
148#include <linux/string.h>
149#include <linux/errno.h>
150#include <linux/ioport.h>
151#include <linux/slab.h>
152#include <linux/interrupt.h>
153#include <linux/delay.h>
154#include <linux/init.h>
155#include <linux/crc32.h>
156#include <linux/netdevice.h>
157#include <linux/etherdevice.h>
158#include <linux/skbuff.h>
159#include <linux/ethtool.h>
160#include <linux/time.h>
161#include <linux/types.h>
162#include <linux/unistd.h>
163#include <linux/ctype.h>
164#include <linux/bitops.h>
165
166#include <asm/io.h>
167#include <asm/dma.h>
168#include <asm/uaccess.h>
169
170#include "ewrk3.h"
171
172#define DRV_NAME "ewrk3"
173#define DRV_VERSION "0.48"
174
175static char version[] __initdata =
176DRV_NAME ":v" DRV_VERSION " 2002/10/18 davies@maniac.ultranet.com\n";
177
178#ifdef EWRK3_DEBUG
179static int ewrk3_debug = EWRK3_DEBUG;
180#else
181static int ewrk3_debug = 1;
182#endif
183
184#define EWRK3_NDA 0xffe0 /* No Device Address */
185
186#define PROBE_LENGTH 32
187#define ETH_PROM_SIG 0xAA5500FFUL
188
189#ifndef EWRK3_SIGNATURE
190#define EWRK3_SIGNATURE {"DE203","DE204","DE205",""}
191#define EWRK3_STRLEN 8
192#endif
193
194#ifndef EWRK3_RAM_BASE_ADDRESSES
195#define EWRK3_RAM_BASE_ADDRESSES {0xc0000,0xd0000,0x00000}
196#endif
197
198/*
199 ** Sets up the I/O area for the autoprobe.
200 */
201#define EWRK3_IO_BASE 0x100 /* Start address for probe search */
202#define EWRK3_IOP_INC 0x20 /* I/O address increment */
203#define EWRK3_TOTAL_SIZE 0x20 /* required I/O address length */
204
205#ifndef MAX_NUM_EWRK3S
206#define MAX_NUM_EWRK3S 21
207#endif
208
209#ifndef EWRK3_EISA_IO_PORTS
210#define EWRK3_EISA_IO_PORTS 0x0c00 /* I/O port base address, slot 0 */
211#endif
212
213#ifndef MAX_EISA_SLOTS
214#define MAX_EISA_SLOTS 16
215#define EISA_SLOT_INC 0x1000
216#endif
217
218#define QUEUE_PKT_TIMEOUT (1*HZ) /* Jiffies */
219
220/*
221 ** EtherWORKS 3 shared memory window sizes
222 */
223#define IO_ONLY 0x00
224#define SHMEM_2K 0x800
225#define SHMEM_32K 0x8000
226#define SHMEM_64K 0x10000
227
228/*
229 ** EtherWORKS 3 IRQ ENABLE/DISABLE
230 */
231#define ENABLE_IRQs { \
232 icr |= lp->irq_mask;\
233 outb(icr, EWRK3_ICR); /* Enable the IRQs */\
234}
235
236#define DISABLE_IRQs { \
237 icr = inb(EWRK3_ICR);\
238 icr &= ~lp->irq_mask;\
239 outb(icr, EWRK3_ICR); /* Disable the IRQs */\
240}
241
242/*
243 ** EtherWORKS 3 START/STOP
244 */
245#define START_EWRK3 { \
246 csr = inb(EWRK3_CSR);\
247 csr &= ~(CSR_TXD|CSR_RXD);\
248 outb(csr, EWRK3_CSR); /* Enable the TX and/or RX */\
249}
250
251#define STOP_EWRK3 { \
252 csr = (CSR_TXD|CSR_RXD);\
253 outb(csr, EWRK3_CSR); /* Disable the TX and/or RX */\
254}
255
256/*
257 ** The EtherWORKS 3 private structure
258 */
259#define EWRK3_PKT_STAT_SZ 16
260#define EWRK3_PKT_BIN_SZ 128 /* Should be >=100 unless you
261 increase EWRK3_PKT_STAT_SZ */
262
263struct ewrk3_stats {
264 u32 bins[EWRK3_PKT_STAT_SZ];
265 u32 unicast;
266 u32 multicast;
267 u32 broadcast;
268 u32 excessive_collisions;
269 u32 tx_underruns;
270 u32 excessive_underruns;
271};
272
273struct ewrk3_private {
274 char adapter_name[80]; /* Name exported to /proc/ioports */
275 u_long shmem_base; /* Shared memory start address */
276 void __iomem *shmem;
277 u_long shmem_length; /* Shared memory window length */
278 struct net_device_stats stats; /* Public stats */
279 struct ewrk3_stats pktStats; /* Private stats counters */
280 u_char irq_mask; /* Adapter IRQ mask bits */
281 u_char mPage; /* Maximum 2kB Page number */
282 u_char lemac; /* Chip rev. level */
283 u_char hard_strapped; /* Don't allow a full open */
284 u_char txc; /* Transmit cut through */
285 void __iomem *mctbl; /* Pointer to the multicast table */
286 u_char led_mask; /* Used to reserve LED access for ethtool */
287 spinlock_t hw_lock;
288};
289
290/*
291 ** Force the EtherWORKS 3 card to be in 2kB MODE
292 */
293#define FORCE_2K_MODE { \
294 shmem_length = SHMEM_2K;\
295 outb(((mem_start - 0x80000) >> 11), EWRK3_MBR);\
296}
297
298/*
299 ** Public Functions
300 */
301static int ewrk3_open(struct net_device *dev);
302static int ewrk3_queue_pkt(struct sk_buff *skb, struct net_device *dev);
7d12e780 303static irqreturn_t ewrk3_interrupt(int irq, void *dev_id);
1da177e4
LT		 304static int ewrk3_close(struct net_device *dev);
305static struct net_device_stats *ewrk3_get_stats(struct net_device *dev);
306static void set_multicast_list(struct net_device *dev);
307static int ewrk3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
7282d491
JG		 308static const struct ethtool_ops ethtool_ops_203;
309static const struct ethtool_ops ethtool_ops;
1da177e4
LT		 310
311/*
312 ** Private functions
313 */
314static int ewrk3_hw_init(struct net_device *dev, u_long iobase);
315static void ewrk3_init(struct net_device *dev);
316static int ewrk3_rx(struct net_device *dev);
317static int ewrk3_tx(struct net_device *dev);
318static void ewrk3_timeout(struct net_device *dev);
319
320static void EthwrkSignature(char *name, char *eeprom_image);
321static int DevicePresent(u_long iobase);
322static void SetMulticastFilter(struct net_device *dev);
323static int EISA_signature(char *name, s32 eisa_id);
324
325static int Read_EEPROM(u_long iobase, u_char eaddr);
326static int Write_EEPROM(short data, u_long iobase, u_char eaddr);
327static u_char get_hw_addr(struct net_device *dev, u_char * eeprom_image, char chipType);
328
329static int ewrk3_probe1(struct net_device *dev, u_long iobase, int irq);
330static int isa_probe(struct net_device *dev, u_long iobase);
331static int eisa_probe(struct net_device *dev, u_long iobase);
332
333static u_char irq[MAX_NUM_EWRK3S+1] = {5, 0, 10, 3, 11, 9, 15, 12};
334
335static char name[EWRK3_STRLEN + 1];
336static int num_ewrks3s;
337
338/*
339 ** Miscellaneous defines...
340 */
341#define INIT_EWRK3 {\
342 outb(EEPROM_INIT, EWRK3_IOPR);\
343 mdelay(1);\
344}
345
346#ifndef MODULE
347struct net_device * __init ewrk3_probe(int unit)
348{
349 struct net_device *dev = alloc_etherdev(sizeof(struct ewrk3_private));
350 int err;
351
352 if (!dev)
353 return ERR_PTR(-ENOMEM);
354
355 if (unit >= 0) {
356 sprintf(dev->name, "eth%d", unit);
357 netdev_boot_setup_check(dev);
358 }
1da177e4
LT		 359
360 err = ewrk3_probe1(dev, dev->base_addr, dev->irq);
6aa20a22 361 if (err)
1da177e4
LT		 362 goto out;
363 return dev;
364out:
365 free_netdev(dev);
366 return ERR_PTR(err);
6aa20a22 367
1da177e4
LT		 368}
369#endif
370
371static int __init ewrk3_probe1(struct net_device *dev, u_long iobase, int irq)
372{
373 int err;
374
375 dev->base_addr = iobase;
376 dev->irq = irq;
377
378 /* Address PROM pattern */
379 err = isa_probe(dev, iobase);
6aa20a22 380 if (err != 0)
1da177e4
LT		 381 err = eisa_probe(dev, iobase);
382
383 if (err)
384 return err;
385
386 err = register_netdev(dev);
387 if (err)
388 release_region(dev->base_addr, EWRK3_TOTAL_SIZE);
389
390 return err;
391}
392
6aa20a22 393static int __init
1da177e4
LT		 394ewrk3_hw_init(struct net_device *dev, u_long iobase)
395{
396 struct ewrk3_private *lp;
397 int i, status = 0;
398 u_long mem_start, shmem_length;
399 u_char cr, cmr, icr, nicsr, lemac, hard_strapped = 0;
400 u_char eeprom_image[EEPROM_MAX], chksum, eisa_cr = 0;
401
402 /*
403 ** Stop the EWRK3. Enable the DBR ROM. Disable interrupts and remote boot.
404 ** This also disables the EISA_ENABLE bit in the EISA Control Register.
405 */
406 if (iobase > 0x400)
407 eisa_cr = inb(EISA_CR);
408 INIT_EWRK3;
409
410 nicsr = inb(EWRK3_CSR);
411
412 icr = inb(EWRK3_ICR);
413 icr &= 0x70;
414 outb(icr, EWRK3_ICR); /* Disable all the IRQs */
415
991b5557 416 if (nicsr != (CSR_TXD | CSR_RXD))
1da177e4
LT		 417 return -ENXIO;
418
1da177e4
LT		 419 /* Check that the EEPROM is alive and well and not living on Pluto... */
420 for (chksum = 0, i = 0; i < EEPROM_MAX; i += 2) {
421 union {
422 short val;
423 char c[2];
424 } tmp;
425
426 tmp.val = (short) Read_EEPROM(iobase, (i >> 1));
427 eeprom_image[i] = tmp.c[0];
428 eeprom_image[i + 1] = tmp.c[1];
429 chksum += eeprom_image[i] + eeprom_image[i + 1];
430 }
431
432 if (chksum != 0) { /* Bad EEPROM Data! */
433 printk("%s: Device has a bad on-board EEPROM.\n", dev->name);
434 return -ENXIO;
435 }
6aa20a22 436
1da177e4 437 EthwrkSignature(name, eeprom_image);
6aa20a22 438 if (*name == '\0')
1da177e4
LT		 439 return -ENXIO;
440
441 dev->base_addr = iobase;
6aa20a22 442
1da177e4
LT		 443 if (iobase > 0x400) {
444 outb(eisa_cr, EISA_CR); /* Rewrite the EISA CR */
445 }
446 lemac = eeprom_image[EEPROM_CHIPVER];
447 cmr = inb(EWRK3_CMR);
6aa20a22 448
1da177e4
LT		 449 if (((lemac == LeMAC) && ((cmr & CMR_NO_EEPROM) != CMR_NO_EEPROM)) ||
450 ((lemac == LeMAC2) && !(cmr & CMR_HS))) {
451 printk("%s: %s at %#4lx", dev->name, name, iobase);
452 hard_strapped = 1;
453 } else if ((iobase & 0x0fff) == EWRK3_EISA_IO_PORTS) {
454 /* EISA slot address */
455 printk("%s: %s at %#4lx (EISA slot %ld)",
456 dev->name, name, iobase, ((iobase >> 12) & 0x0f));
457 } else { /* ISA port address */
458 printk("%s: %s at %#4lx", dev->name, name, iobase);
459 }
460
461 printk(", h/w address ");
462 if (lemac != LeMAC2)
463 DevicePresent(iobase); /* need after EWRK3_INIT */
464 status = get_hw_addr(dev, eeprom_image, lemac);
465 for (i = 0; i < ETH_ALEN - 1; i++) { /* get the ethernet addr. */
466 printk("%2.2x:", dev->dev_addr[i]);
467 }
468 printk("%2.2x,\n", dev->dev_addr[i]);
6aa20a22 469
1da177e4
LT		 470 if (status) {
471 printk(" which has an EEPROM CRC error.\n");
472 return -ENXIO;
473 }
474
475 if (lemac == LeMAC2) { /* Special LeMAC2 CMR things */
476 cmr &= ~(CMR_RA | CMR_WB | CMR_LINK | CMR_POLARITY | CMR_0WS);
477 if (eeprom_image[EEPROM_MISC0] & READ_AHEAD)
478 cmr |= CMR_RA;
479 if (eeprom_image[EEPROM_MISC0] & WRITE_BEHIND)
480 cmr |= CMR_WB;
481 if (eeprom_image[EEPROM_NETMAN0] & NETMAN_POL)
482 cmr |= CMR_POLARITY;
483 if (eeprom_image[EEPROM_NETMAN0] & NETMAN_LINK)
484 cmr |= CMR_LINK;
485 if (eeprom_image[EEPROM_MISC0] & _0WS_ENA)
486 cmr |= CMR_0WS;
487 }
488 if (eeprom_image[EEPROM_SETUP] & SETUP_DRAM)
489 cmr |= CMR_DRAM;
490 outb(cmr, EWRK3_CMR);
6aa20a22 491
1da177e4
LT		 492 cr = inb(EWRK3_CR); /* Set up the Control Register */
493 cr |= eeprom_image[EEPROM_SETUP] & SETUP_APD;
494 if (cr & SETUP_APD)
495 cr |= eeprom_image[EEPROM_SETUP] & SETUP_PS;
496 cr |= eeprom_image[EEPROM_MISC0] & FAST_BUS;
497 cr |= eeprom_image[EEPROM_MISC0] & ENA_16;
498 outb(cr, EWRK3_CR);
499
500 /*
501 ** Determine the base address and window length for the EWRK3
502 ** RAM from the memory base register.
503 */
504 mem_start = inb(EWRK3_MBR);
505 shmem_length = 0;
506 if (mem_start != 0) {
507 if ((mem_start >= 0x0a) && (mem_start <= 0x0f)) {
508 mem_start *= SHMEM_64K;
509 shmem_length = SHMEM_64K;
510 } else if ((mem_start >= 0x14) && (mem_start <= 0x1f)) {
511 mem_start *= SHMEM_32K;
512 shmem_length = SHMEM_32K;
513 } else if ((mem_start >= 0x40) && (mem_start <= 0xff)) {
514 mem_start = mem_start * SHMEM_2K + 0x80000;
515 shmem_length = SHMEM_2K;
516 } else {
517 return -ENXIO;
518 }
519 }
520 /*
521 ** See the top of this source code for comments about
522 ** uncommenting this line.
523 */
524/* FORCE_2K_MODE; */
6aa20a22 525
1da177e4
LT		 526 if (hard_strapped) {
527 printk(" is hard strapped.\n");
528 } else if (mem_start) {
529 printk(" has a %dk RAM window", (int) (shmem_length >> 10));
530 printk(" at 0x%.5lx", mem_start);
531 } else {
532 printk(" is in I/O only mode");
533 }
534
535 lp = netdev_priv(dev);
536 lp->shmem_base = mem_start;
537 lp->shmem = ioremap(mem_start, shmem_length);
538 if (!lp->shmem)
539 return -ENOMEM;
540 lp->shmem_length = shmem_length;
541 lp->lemac = lemac;
542 lp->hard_strapped = hard_strapped;
543 lp->led_mask = CR_LED;
544 spin_lock_init(&lp->hw_lock);
6aa20a22 545
1da177e4
LT		 546 lp->mPage = 64;
547 if (cmr & CMR_DRAM)
548 lp->mPage <<= 1; /* 2 DRAMS on module */
6aa20a22 549
1da177e4 550 sprintf(lp->adapter_name, "%s (%s)", name, dev->name);
6aa20a22 551
1da177e4 552 lp->irq_mask = ICR_TNEM | ICR_TXDM | ICR_RNEM | ICR_RXDM;
6aa20a22 553
1da177e4
LT		 554 if (!hard_strapped) {
555 /*
556 ** Enable EWRK3 board interrupts for autoprobing
557 */
558 icr |= ICR_IE; /* Enable interrupts */
559 outb(icr, EWRK3_ICR);
6aa20a22 560
1da177e4
LT		 561 /* The DMA channel may be passed in on this parameter. */
562 dev->dma = 0;
6aa20a22 563
1da177e4
LT		 564 /* To auto-IRQ we enable the initialization-done and DMA err,
565 interrupts. For now we will always get a DMA error. */
566 if (dev->irq < 2) {
567#ifndef MODULE
568 u_char irqnum;
569 unsigned long irq_mask;
6aa20a22 570
1da177e4
LT		 571
572 irq_mask = probe_irq_on();
6aa20a22 573
1da177e4
LT		 574 /*
575 ** Trigger a TNE interrupt.
576 */
577 icr |= ICR_TNEM;
578 outb(1, EWRK3_TDQ); /* Write to the TX done queue */
579 outb(icr, EWRK3_ICR); /* Unmask the TXD interrupt */
6aa20a22 580
1da177e4 581 irqnum = irq[((icr & IRQ_SEL) >> 4)];
6aa20a22 582
1da177e4
LT		 583 mdelay(20);
584 dev->irq = probe_irq_off(irq_mask);
585 if ((dev->irq) && (irqnum == dev->irq)) {
586 printk(" and uses IRQ%d.\n", dev->irq);
587 } else {
588 if (!dev->irq) {
589 printk(" and failed to detect IRQ line.\n");
590 } else if ((irqnum == 1) && (lemac == LeMAC2)) {
591 printk(" and an illegal IRQ line detected.\n");
592 } else {
593 printk(", but incorrect IRQ line detected.\n");
594 }
595 iounmap(lp->shmem);
596 return -ENXIO;
597 }
598
599 DISABLE_IRQs; /* Mask all interrupts */
600
601#endif /* MODULE */
602 } else {
603 printk(" and requires IRQ%d.\n", dev->irq);
604 }
605 }
606
607 if (ewrk3_debug > 1) {
608 printk(version);
609 }
610 /* The EWRK3-specific entries in the device structure. */
611 dev->open = ewrk3_open;
612 dev->hard_start_xmit = ewrk3_queue_pkt;
613 dev->stop = ewrk3_close;
614 dev->get_stats = ewrk3_get_stats;
615 dev->set_multicast_list = set_multicast_list;
616 dev->do_ioctl = ewrk3_ioctl;
617 if (lp->adapter_name[4] == '3')
618 SET_ETHTOOL_OPS(dev, &ethtool_ops_203);
619 else
620 SET_ETHTOOL_OPS(dev, &ethtool_ops);
621 dev->tx_timeout = ewrk3_timeout;
622 dev->watchdog_timeo = QUEUE_PKT_TIMEOUT;
6aa20a22 623
1da177e4
LT		 624 dev->mem_start = 0;
625
626 return 0;
627}
6aa20a22 628
1da177e4
LT		 629
630static int ewrk3_open(struct net_device *dev)
631{
632 struct ewrk3_private *lp = netdev_priv(dev);
633 u_long iobase = dev->base_addr;
634 int i, status = 0;
635 u_char icr, csr;
636
637 /*
638 ** Stop the TX and RX...
639 */
640 STOP_EWRK3;
641
642 if (!lp->hard_strapped) {
643 if (request_irq(dev->irq, (void *) ewrk3_interrupt, 0, "ewrk3", dev)) {
644 printk("ewrk3_open(): Requested IRQ%d is busy\n", dev->irq);
645 status = -EAGAIN;
646 } else {
647
648 /*
649 ** Re-initialize the EWRK3...
650 */
651 ewrk3_init(dev);
652
653 if (ewrk3_debug > 1) {
654 printk("%s: ewrk3 open with irq %d\n", dev->name, dev->irq);
655 printk(" physical address: ");
656 for (i = 0; i < 5; i++) {
657 printk("%2.2x:", (u_char) dev->dev_addr[i]);
658 }
659 printk("%2.2x\n", (u_char) dev->dev_addr[i]);
660 if (lp->shmem_length == 0) {
661 printk(" no shared memory, I/O only mode\n");
662 } else {
663 printk(" start of shared memory: 0x%08lx\n", lp->shmem_base);
664 printk(" window length: 0x%04lx\n", lp->shmem_length);
665 }
666 printk(" # of DRAMS: %d\n", ((inb(EWRK3_CMR) & 0x02) ? 2 : 1));
667 printk(" csr: 0x%02x\n", inb(EWRK3_CSR));
668 printk(" cr: 0x%02x\n", inb(EWRK3_CR));
669 printk(" icr: 0x%02x\n", inb(EWRK3_ICR));
670 printk(" cmr: 0x%02x\n", inb(EWRK3_CMR));
671 printk(" fmqc: 0x%02x\n", inb(EWRK3_FMQC));
672 }
673 netif_start_queue(dev);
674 /*
675 ** Unmask EWRK3 board interrupts
676 */
677 icr = inb(EWRK3_ICR);
678 ENABLE_IRQs;
679
680 }
681 } else {
682 printk(KERN_ERR "%s: ewrk3 available for hard strapped set up only.\n", dev->name);
683 printk(KERN_ERR " Run the 'ewrk3setup' utility or remove the hard straps.\n");
684 return -EINVAL;
685 }
686
687 return status;
688}
689
690/*
691 ** Initialize the EtherWORKS 3 operating conditions
692 */
693static void ewrk3_init(struct net_device *dev)
694{
695 struct ewrk3_private *lp = netdev_priv(dev);
696 u_char csr, page;
697 u_long iobase = dev->base_addr;
698 int i;
699
700 /*
701 ** Enable any multicasts
702 */
703 set_multicast_list(dev);
704
705 /*
706 ** Set hardware MAC address. Address is initialized from the EEPROM
707 ** during startup but may have since been changed by the user.
708 */
709 for (i=0; i<ETH_ALEN; i++)
710 outb(dev->dev_addr[i], EWRK3_PAR0 + i);
711
712 /*
713 ** Clean out any remaining entries in all the queues here
714 */
715 while (inb(EWRK3_TQ));
716 while (inb(EWRK3_TDQ));
717 while (inb(EWRK3_RQ));
718 while (inb(EWRK3_FMQ));
719
720 /*
721 ** Write a clean free memory queue
722 */
723 for (page = 1; page < lp->mPage; page++) { /* Write the free page numbers */
724 outb(page, EWRK3_FMQ); /* to the Free Memory Queue */
725 }
726
727 START_EWRK3; /* Enable the TX and/or RX */
728}
729
730/*
731 * Transmit timeout
732 */
6aa20a22 733
1da177e4
LT		 734static void ewrk3_timeout(struct net_device *dev)
735{
736 struct ewrk3_private *lp = netdev_priv(dev);
737 u_char icr, csr;
738 u_long iobase = dev->base_addr;
6aa20a22
JG		 739
740 if (!lp->hard_strapped)
1da177e4
LT		 741 {
742 printk(KERN_WARNING"%s: transmit timed/locked out, status %04x, resetting.\n",
743 dev->name, inb(EWRK3_CSR));
744
745 /*
746 ** Mask all board interrupts
747 */
748 DISABLE_IRQs;
749
750 /*
751 ** Stop the TX and RX...
752 */
753 STOP_EWRK3;
754
755 ewrk3_init(dev);
756
757 /*
758 ** Unmask EWRK3 board interrupts
759 */
760 ENABLE_IRQs;
761
762 dev->trans_start = jiffies;
763 netif_wake_queue(dev);
764 }
765}
766
767/*
768 ** Writes a socket buffer to the free page queue
769 */
770static int ewrk3_queue_pkt (struct sk_buff *skb, struct net_device *dev)
771{
772 struct ewrk3_private *lp = netdev_priv(dev);
773 u_long iobase = dev->base_addr;
774 void __iomem *buf = NULL;
775 u_char icr;
776 u_char page;
777
778 spin_lock_irq (&lp->hw_lock);
779 DISABLE_IRQs;
780
781 /* if no resources available, exit, request packet be queued */
782 if (inb (EWRK3_FMQC) == 0) {
783 printk (KERN_WARNING "%s: ewrk3_queue_pkt(): No free resources...\n",
784 dev->name);
785 printk (KERN_WARNING "%s: ewrk3_queue_pkt(): CSR: %02x ICR: %02x FMQC: %02x\n",
786 dev->name, inb (EWRK3_CSR), inb (EWRK3_ICR),
787 inb (EWRK3_FMQC));
788 goto err_out;
789 }
790
791 /*
792 ** Get a free page from the FMQ
793 */
794 if ((page = inb (EWRK3_FMQ)) >= lp->mPage) {
795 printk ("ewrk3_queue_pkt(): Invalid free memory page (%d).\n",
796 (u_char) page);
797 goto err_out;
798 }
799
800
801 /*
802 ** Set up shared memory window and pointer into the window
803 */
804 if (lp->shmem_length == IO_ONLY) {
805 outb (page, EWRK3_IOPR);
806 } else if (lp->shmem_length == SHMEM_2K) {
807 buf = lp->shmem;
808 outb (page, EWRK3_MPR);
809 } else if (lp->shmem_length == SHMEM_32K) {
810 buf = (((short) page << 11) & 0x7800) + lp->shmem;
811 outb ((page >> 4), EWRK3_MPR);
812 } else if (lp->shmem_length == SHMEM_64K) {
813 buf = (((short) page << 11) & 0xf800) + lp->shmem;
814 outb ((page >> 5), EWRK3_MPR);
815 } else {
816 printk (KERN_ERR "%s: Oops - your private data area is hosed!\n",
817 dev->name);
818 BUG ();
819 }
820
821 /*
822 ** Set up the buffer control structures and copy the data from
823 ** the socket buffer to the shared memory .
824 */
825 if (lp->shmem_length == IO_ONLY) {
826 int i;
827 u_char *p = skb->data;
828 outb ((char) (TCR_QMODE | TCR_PAD | TCR_IFC), EWRK3_DATA);
829 outb ((char) (skb->len & 0xff), EWRK3_DATA);
830 outb ((char) ((skb->len >> 8) & 0xff), EWRK3_DATA);
831 outb ((char) 0x04, EWRK3_DATA);
832 for (i = 0; i < skb->len; i++) {
833 outb (*p++, EWRK3_DATA);
834 }
835 outb (page, EWRK3_TQ); /* Start sending pkt */
836 } else {
837 writeb ((char) (TCR_QMODE | TCR_PAD | TCR_IFC), buf); /* ctrl byte */
838 buf += 1;
839 writeb ((char) (skb->len & 0xff), buf); /* length (16 bit xfer) */
840 buf += 1;
841 if (lp->txc) {
842 writeb(((skb->len >> 8) & 0xff) | XCT, buf);
843 buf += 1;
844 writeb (0x04, buf); /* index byte */
845 buf += 1;
846 writeb (0x00, (buf + skb->len)); /* Write the XCT flag */
847 memcpy_toio (buf, skb->data, PRELOAD); /* Write PRELOAD bytes */
848 outb (page, EWRK3_TQ); /* Start sending pkt */
849 memcpy_toio (buf + PRELOAD,
850 skb->data + PRELOAD,
851 skb->len - PRELOAD);
852 writeb (0xff, (buf + skb->len)); /* Write the XCT flag */
853 } else {
854 writeb ((skb->len >> 8) & 0xff, buf);
855 buf += 1;
856 writeb (0x04, buf); /* index byte */
857 buf += 1;
858 memcpy_toio (buf, skb->data, skb->len); /* Write data bytes */
859 outb (page, EWRK3_TQ); /* Start sending pkt */
860 }
861 }
862
863 ENABLE_IRQs;
864 spin_unlock_irq (&lp->hw_lock);
865
866 lp->stats.tx_bytes += skb->len;
867 dev->trans_start = jiffies;
868 dev_kfree_skb (skb);
869
870 /* Check for free resources: stop Tx queue if there are none */
871 if (inb (EWRK3_FMQC) == 0)
872 netif_stop_queue (dev);
873
874 return 0;
875
876err_out:
877 ENABLE_IRQs;
878 spin_unlock_irq (&lp->hw_lock);
879 return 1;
880}
881
882/*
883 ** The EWRK3 interrupt handler.
884 */
7d12e780 885static irqreturn_t ewrk3_interrupt(int irq, void *dev_id)
1da177e4
LT		 886{
887 struct net_device *dev = dev_id;
888 struct ewrk3_private *lp;
889 u_long iobase;
890 u_char icr, cr, csr;
891
892 lp = netdev_priv(dev);
893 iobase = dev->base_addr;
894
895 /* get the interrupt information */
896 csr = inb(EWRK3_CSR);
897
898 /*
899 ** Mask the EWRK3 board interrupts and turn on the LED
900 */
901 spin_lock(&lp->hw_lock);
902 DISABLE_IRQs;
903
904 cr = inb(EWRK3_CR);
905 cr |= lp->led_mask;
906 outb(cr, EWRK3_CR);
907
908 if (csr & CSR_RNE) /* Rx interrupt (packet[s] arrived) */
909 ewrk3_rx(dev);
910
911 if (csr & CSR_TNE) /* Tx interrupt (packet sent) */
912 ewrk3_tx(dev);
913
914 /*
915 ** Now deal with the TX/RX disable flags. These are set when there
916 ** are no more resources. If resources free up then enable these
917 ** interrupts, otherwise mask them - failure to do this will result
918 ** in the system hanging in an interrupt loop.
919 */
920 if (inb(EWRK3_FMQC)) { /* any resources available? */
921 lp->irq_mask |= ICR_TXDM | ICR_RXDM; /* enable the interrupt source */
922 csr &= ~(CSR_TXD | CSR_RXD); /* ensure restart of a stalled TX or RX */
923 outb(csr, EWRK3_CSR);
924 netif_wake_queue(dev);
925 } else {
926 lp->irq_mask &= ~(ICR_TXDM | ICR_RXDM); /* disable the interrupt source */
927 }
928
929 /* Unmask the EWRK3 board interrupts and turn off the LED */
930 cr &= ~(lp->led_mask);
931 outb(cr, EWRK3_CR);
932 ENABLE_IRQs;
933 spin_unlock(&lp->hw_lock);
934 return IRQ_HANDLED;
935}
936
937/* Called with lp->hw_lock held */
938static int ewrk3_rx(struct net_device *dev)
939{
940 struct ewrk3_private *lp = netdev_priv(dev);
941 u_long iobase = dev->base_addr;
942 int i, status = 0;
943 u_char page;
944 void __iomem *buf = NULL;
945
946 while (inb(EWRK3_RQC) && !status) { /* Whilst there's incoming data */
947 if ((page = inb(EWRK3_RQ)) < lp->mPage) { /* Get next entry's buffer page */
948 /*
949 ** Set up shared memory window and pointer into the window
950 */
951 if (lp->shmem_length == IO_ONLY) {
952 outb(page, EWRK3_IOPR);
953 } else if (lp->shmem_length == SHMEM_2K) {
954 buf = lp->shmem;
955 outb(page, EWRK3_MPR);
956 } else if (lp->shmem_length == SHMEM_32K) {
957 buf = (((short) page << 11) & 0x7800) + lp->shmem;
958 outb((page >> 4), EWRK3_MPR);
959 } else if (lp->shmem_length == SHMEM_64K) {
960 buf = (((short) page << 11) & 0xf800) + lp->shmem;
961 outb((page >> 5), EWRK3_MPR);
962 } else {
963 status = -1;
964 printk("%s: Oops - your private data area is hosed!\n", dev->name);
965 }
966
967 if (!status) {
968 char rx_status;
969 int pkt_len;
970
971 if (lp->shmem_length == IO_ONLY) {
972 rx_status = inb(EWRK3_DATA);
973 pkt_len = inb(EWRK3_DATA);
974 pkt_len |= ((u_short) inb(EWRK3_DATA) << 8);
975 } else {
976 rx_status = readb(buf);
977 buf += 1;
978 pkt_len = readw(buf);
979 buf += 3;
980 }
981
982 if (!(rx_status & R_ROK)) { /* There was an error. */
983 lp->stats.rx_errors++; /* Update the error stats. */
984 if (rx_status & R_DBE)
985 lp->stats.rx_frame_errors++;
986 if (rx_status & R_CRC)
987 lp->stats.rx_crc_errors++;
988 if (rx_status & R_PLL)
989 lp->stats.rx_fifo_errors++;
990 } else {
991 struct sk_buff *skb;
992
993 if ((skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
994 unsigned char *p;
1da177e4
LT		 995 skb_reserve(skb, 2); /* Align to 16 bytes */
996 p = skb_put(skb, pkt_len);
997
998 if (lp->shmem_length == IO_ONLY) {
999 *p = inb(EWRK3_DATA); /* dummy read */
1000 for (i = 0; i < pkt_len; i++) {
1001 *p++ = inb(EWRK3_DATA);
1002 }
1003 } else {
1004 memcpy_fromio(p, buf, pkt_len);
1005 }
1006
1007 for (i = 1; i < EWRK3_PKT_STAT_SZ - 1; i++) {
1008 if (pkt_len < i * EWRK3_PKT_BIN_SZ) {
1009 lp->pktStats.bins[i]++;
1010 i = EWRK3_PKT_STAT_SZ;
1011 }
1012 }
1013 p = skb->data; /* Look at the dest addr */
1014 if (p[0] & 0x01) { /* Multicast/Broadcast */
1015 if ((*(s16 *) & p[0] == -1) && (*(s16 *) & p[2] == -1) && (*(s16 *) & p[4] == -1)) {
1016 lp->pktStats.broadcast++;
1017 } else {
1018 lp->pktStats.multicast++;
1019 }
1020 } else if ((*(s16 *) & p[0] == *(s16 *) & dev->dev_addr[0]) &&
1021 (*(s16 *) & p[2] == *(s16 *) & dev->dev_addr[2]) &&
1022 (*(s16 *) & p[4] == *(s16 *) & dev->dev_addr[4])) {
1023 lp->pktStats.unicast++;
1024 }
1025 lp->pktStats.bins[0]++; /* Duplicates stats.rx_packets */
1026 if (lp->pktStats.bins[0] == 0) { /* Reset counters */
1027 memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1028 }
1029 /*
1030 ** Notify the upper protocol layers that there is another
1031 ** packet to handle
1032 */
1033 skb->protocol = eth_type_trans(skb, dev);
1034 netif_rx(skb);
1035
1036 /*
1037 ** Update stats
1038 */
1039 dev->last_rx = jiffies;
1040 lp->stats.rx_packets++;
1041 lp->stats.rx_bytes += pkt_len;
1042 } else {
1043 printk("%s: Insufficient memory; nuking packet.\n", dev->name);
1044 lp->stats.rx_dropped++; /* Really, deferred. */
1045 break;
1046 }
1047 }
1048 }
1049 /*
1050 ** Return the received buffer to the free memory queue
1051 */
1052 outb(page, EWRK3_FMQ);
1053 } else {
1054 printk("ewrk3_rx(): Illegal page number, page %d\n", page);
1055 printk("ewrk3_rx(): CSR: %02x ICR: %02x FMQC: %02x\n", inb(EWRK3_CSR), inb(EWRK3_ICR), inb(EWRK3_FMQC));
1056 }
1057 }
1058 return status;
1059}
1060
1061/*
1062** Buffer sent - check for TX buffer errors.
1063** Called with lp->hw_lock held
1064*/
1065static int ewrk3_tx(struct net_device *dev)
1066{
1067 struct ewrk3_private *lp = netdev_priv(dev);
1068 u_long iobase = dev->base_addr;
1069 u_char tx_status;
1070
1071 while ((tx_status = inb(EWRK3_TDQ)) > 0) { /* Whilst there's old buffers */
1072 if (tx_status & T_VSTS) { /* The status is valid */
1073 if (tx_status & T_TXE) {
1074 lp->stats.tx_errors++;
1075 if (tx_status & T_NCL)
1076 lp->stats.tx_carrier_errors++;
1077 if (tx_status & T_LCL)
1078 lp->stats.tx_window_errors++;
1079 if (tx_status & T_CTU) {
1080 if ((tx_status & T_COLL) ^ T_XUR) {
1081 lp->pktStats.tx_underruns++;
1082 } else {
1083 lp->pktStats.excessive_underruns++;
1084 }
1085 } else if (tx_status & T_COLL) {
1086 if ((tx_status & T_COLL) ^ T_XCOLL) {
1087 lp->stats.collisions++;
1088 } else {
1089 lp->pktStats.excessive_collisions++;
1090 }
1091 }
1092 } else {
1093 lp->stats.tx_packets++;
1094 }
1095 }
1096 }
1097
1098 return 0;
1099}
1100
1101static int ewrk3_close(struct net_device *dev)
1102{
1103 struct ewrk3_private *lp = netdev_priv(dev);
1104 u_long iobase = dev->base_addr;
1105 u_char icr, csr;
1106
1107 netif_stop_queue(dev);
6aa20a22 1108
1da177e4
LT		 1109 if (ewrk3_debug > 1) {
1110 printk("%s: Shutting down ethercard, status was %2.2x.\n",
1111 dev->name, inb(EWRK3_CSR));
1112 }
1113 /*
1114 ** We stop the EWRK3 here... mask interrupts and stop TX & RX
1115 */
1116 DISABLE_IRQs;
1117
1118 STOP_EWRK3;
1119
1120 /*
1121 ** Clean out the TX and RX queues here (note that one entry
1122 ** may get added to either the TXD or RX queues if the TX or RX
1123 ** just starts processing a packet before the STOP_EWRK3 command
1124 ** is received. This will be flushed in the ewrk3_open() call).
1125 */
1126 while (inb(EWRK3_TQ));
1127 while (inb(EWRK3_TDQ));
1128 while (inb(EWRK3_RQ));
1129
1130 if (!lp->hard_strapped) {
1131 free_irq(dev->irq, dev);
1132 }
1133 return 0;
1134}
1135
1136static struct net_device_stats *ewrk3_get_stats(struct net_device *dev)
1137{
1138 struct ewrk3_private *lp = netdev_priv(dev);
1139
1140 /* Null body since there is no framing error counter */
1141 return &lp->stats;
1142}
1143
1144/*
1145 ** Set or clear the multicast filter for this adapter.
1146 */
1147static void set_multicast_list(struct net_device *dev)
1148{
1149 struct ewrk3_private *lp = netdev_priv(dev);
1150 u_long iobase = dev->base_addr;
1151 u_char csr;
1152
1153 csr = inb(EWRK3_CSR);
1154
1155 if (lp->shmem_length == IO_ONLY) {
1156 lp->mctbl = NULL;
1157 } else {
1158 lp->mctbl = lp->shmem + PAGE0_HTE;
1159 }
1160
1161 csr &= ~(CSR_PME | CSR_MCE);
1162 if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */
1163 csr |= CSR_PME;
1164 outb(csr, EWRK3_CSR);
1165 } else {
1166 SetMulticastFilter(dev);
1167 csr |= CSR_MCE;
1168 outb(csr, EWRK3_CSR);
1169 }
1170}
1171
1172/*
1173 ** Calculate the hash code and update the logical address filter
1174 ** from a list of ethernet multicast addresses.
1175 ** Little endian crc one liner from Matt Thomas, DEC.
1176 **
1177 ** Note that when clearing the table, the broadcast bit must remain asserted
1178 ** to receive broadcast messages.
1179 */
1180static void SetMulticastFilter(struct net_device *dev)
1181{
1182 struct ewrk3_private *lp = netdev_priv(dev);
1183 struct dev_mc_list *dmi = dev->mc_list;
1184 u_long iobase = dev->base_addr;
1185 int i;
1186 char *addrs, bit, byte;
1187 short __iomem *p = lp->mctbl;
1188 u16 hashcode;
1189 u32 crc;
1190
1191 spin_lock_irq(&lp->hw_lock);
1192
1193 if (lp->shmem_length == IO_ONLY) {
1194 outb(0, EWRK3_IOPR);
1195 outw(PAGE0_HTE, EWRK3_PIR1);
1196 } else {
1197 outb(0, EWRK3_MPR);
1198 }
1199
1200 if (dev->flags & IFF_ALLMULTI) {
1201 for (i = 0; i < (HASH_TABLE_LEN >> 3); i++) {
1202 if (lp->shmem_length == IO_ONLY) {
1203 outb(0xff, EWRK3_DATA);
1204 } else { /* memset didn't work here */
1205 writew(0xffff, p);
1206 p++;
1207 i++;
1208 }
1209 }
1210 } else {
1211 /* Clear table except for broadcast bit */
1212 if (lp->shmem_length == IO_ONLY) {
1213 for (i = 0; i < (HASH_TABLE_LEN >> 4) - 1; i++) {
1214 outb(0x00, EWRK3_DATA);
1215 }
1216 outb(0x80, EWRK3_DATA);
1217 i++; /* insert the broadcast bit */
1218 for (; i < (HASH_TABLE_LEN >> 3); i++) {
1219 outb(0x00, EWRK3_DATA);
1220 }
1221 } else {
1222 memset_io(lp->mctbl, 0, HASH_TABLE_LEN >> 3);
1223 writeb(0x80, lp->mctbl + (HASH_TABLE_LEN >> 4) - 1);
1224 }
1225
1226 /* Update table */
1227 for (i = 0; i < dev->mc_count; i++) { /* for each address in the list */
1228 addrs = dmi->dmi_addr;
1229 dmi = dmi->next;
1230 if ((*addrs & 0x01) == 1) { /* multicast address? */
1231 crc = ether_crc_le(ETH_ALEN, addrs);
1232 hashcode = crc & ((1 << 9) - 1); /* hashcode is 9 LSb of CRC */
1233
1234 byte = hashcode >> 3; /* bit[3-8] -> byte in filter */
1235 bit = 1 << (hashcode & 0x07); /* bit[0-2] -> bit in byte */
1236
1237 if (lp->shmem_length == IO_ONLY) {
1238 u_char tmp;
1239
1240 outw(PAGE0_HTE + byte, EWRK3_PIR1);
1241 tmp = inb(EWRK3_DATA);
1242 tmp |= bit;
1243 outw(PAGE0_HTE + byte, EWRK3_PIR1);
1244 outb(tmp, EWRK3_DATA);
1245 } else {
1246 writeb(readb(lp->mctbl + byte) | bit, lp->mctbl + byte);
1247 }
1248 }
1249 }
1250 }
1251
1252 spin_unlock_irq(&lp->hw_lock);
1253}
1254
1255/*
1256 ** ISA bus I/O device probe
1257 */
1258static int __init isa_probe(struct net_device *dev, u_long ioaddr)
1259{
1260 int i = num_ewrks3s, maxSlots;
1261 int ret = -ENODEV;
1262
1263 u_long iobase;
1264
1265 if (ioaddr >= 0x400)
1266 goto out;
1267
1268 if (ioaddr == 0) { /* Autoprobing */
1269 iobase = EWRK3_IO_BASE; /* Get the first slot address */
1270 maxSlots = 24;
1271 } else { /* Probe a specific location */
1272 iobase = ioaddr;
1273 maxSlots = i + 1;
1274 }
1275
1276 for (; (i < maxSlots) && (dev != NULL);
1277 iobase += EWRK3_IOP_INC, i++)
1278 {
1279 if (request_region(iobase, EWRK3_TOTAL_SIZE, DRV_NAME)) {
1280 if (DevicePresent(iobase) == 0) {
1281 int irq = dev->irq;
1282 ret = ewrk3_hw_init(dev, iobase);
1283 if (!ret)
1284 break;
1285 dev->irq = irq;
1286 }
1287 release_region(iobase, EWRK3_TOTAL_SIZE);
1288 }
1289 }
1290 out:
1291
1292 return ret;
1293}
1294
1295/*
1296 ** EISA bus I/O device probe. Probe from slot 1 since slot 0 is usually
1297 ** the motherboard.
1298 */
1299static int __init eisa_probe(struct net_device *dev, u_long ioaddr)
1300{
1301 int i, maxSlots;
1302 u_long iobase;
1303 int ret = -ENODEV;
1304
1305 if (ioaddr < 0x1000)
1306 goto out;
1307
6835d09a
AB		 1308 iobase = ioaddr;
1309 i = (ioaddr >> 12);
1310 maxSlots = i + 1;
1da177e4
LT		 1311
1312 for (i = 1; (i < maxSlots) && (dev != NULL); i++, iobase += EISA_SLOT_INC) {
1313 if (EISA_signature(name, EISA_ID) == 0) {
1314 if (request_region(iobase, EWRK3_TOTAL_SIZE, DRV_NAME) &&
1315 DevicePresent(iobase) == 0) {
1316 int irq = dev->irq;
1317 ret = ewrk3_hw_init(dev, iobase);
1318 if (!ret)
1319 break;
1320 dev->irq = irq;
1321 }
1322 release_region(iobase, EWRK3_TOTAL_SIZE);
1323 }
1324 }
1325
1326 out:
1327 return ret;
1328}
1329
1330
1331/*
1332 ** Read the EWRK3 EEPROM using this routine
1333 */
1334static int Read_EEPROM(u_long iobase, u_char eaddr)
1335{
1336 int i;
1337
1338 outb((eaddr & 0x3f), EWRK3_PIR1); /* set up 6 bits of address info */
1339 outb(EEPROM_RD, EWRK3_IOPR); /* issue read command */
1340 for (i = 0; i < 5000; i++)
1341 inb(EWRK3_CSR); /* wait 1msec */
1342
1343 return inw(EWRK3_EPROM1); /* 16 bits data return */
1344}
1345
1346/*
1347 ** Write the EWRK3 EEPROM using this routine
1348 */
1349static int Write_EEPROM(short data, u_long iobase, u_char eaddr)
1350{
1351 int i;
1352
1353 outb(EEPROM_WR_EN, EWRK3_IOPR); /* issue write enable command */
1354 for (i = 0; i < 5000; i++)
1355 inb(EWRK3_CSR); /* wait 1msec */
1356 outw(data, EWRK3_EPROM1); /* write data to register */
1357 outb((eaddr & 0x3f), EWRK3_PIR1); /* set up 6 bits of address info */
1358 outb(EEPROM_WR, EWRK3_IOPR); /* issue write command */
1359 for (i = 0; i < 75000; i++)
1360 inb(EWRK3_CSR); /* wait 15msec */
1361 outb(EEPROM_WR_DIS, EWRK3_IOPR); /* issue write disable command */
1362 for (i = 0; i < 5000; i++)
1363 inb(EWRK3_CSR); /* wait 1msec */
1364
1365 return 0;
1366}
1367
1368/*
1369 ** Look for a particular board name in the on-board EEPROM.
1370 */
1371static void __init EthwrkSignature(char *name, char *eeprom_image)
1372{
1373 int i;
1374 char *signatures[] = EWRK3_SIGNATURE;
1375
1376 for (i=0; *signatures[i] != '\0'; i++)
1377 if( !strncmp(eeprom_image+EEPROM_PNAME7, signatures[i], strlen(signatures[i])) )
1378 break;
1379
1380 if (*signatures[i] != '\0') {
1381 memcpy(name, eeprom_image+EEPROM_PNAME7, EWRK3_STRLEN);
1382 name[EWRK3_STRLEN] = '\0';
1383 } else
1384 name[0] = '\0';
1385
1386 return;
1387}
1388
1389/*
1390 ** Look for a special sequence in the Ethernet station address PROM that
1391 ** is common across all EWRK3 products.
1392 **
1393 ** Search the Ethernet address ROM for the signature. Since the ROM address
1394 ** counter can start at an arbitrary point, the search must include the entire
1395 ** probe sequence length plus the (length_of_the_signature - 1).
1396 ** Stop the search IMMEDIATELY after the signature is found so that the
1397 ** PROM address counter is correctly positioned at the start of the
1398 ** ethernet address for later read out.
1399 */
1400
1401static int __init DevicePresent(u_long iobase)
1402{
1403 union {
1404 struct {
1405 u32 a;
1406 u32 b;
1407 } llsig;
1408 char Sig[sizeof(u32) << 1];
1409 }
1410 dev;
1411 short sigLength;
1412 char data;
1413 int i, j, status = 0;
1414
1415 dev.llsig.a = ETH_PROM_SIG;
1416 dev.llsig.b = ETH_PROM_SIG;
1417 sigLength = sizeof(u32) << 1;
1418
1419 for (i = 0, j = 0; j < sigLength && i < PROBE_LENGTH + sigLength - 1; i++) {
1420 data = inb(EWRK3_APROM);
1421 if (dev.Sig[j] == data) { /* track signature */
1422 j++;
1423 } else { /* lost signature; begin search again */
1424 if (data == dev.Sig[0]) {
1425 j = 1;
1426 } else {
1427 j = 0;
1428 }
1429 }
1430 }
1431
1432 if (j != sigLength) {
1433 status = -ENODEV; /* search failed */
1434 }
1435 return status;
1436}
1437
1438static u_char __init get_hw_addr(struct net_device *dev, u_char * eeprom_image, char chipType)
1439{
1440 int i, j, k;
1441 u_short chksum;
1442 u_char crc, lfsr, sd, status = 0;
1443 u_long iobase = dev->base_addr;
1444 u16 tmp;
1445
1446 if (chipType == LeMAC2) {
1447 for (crc = 0x6a, j = 0; j < ETH_ALEN; j++) {
1448 sd = dev->dev_addr[j] = eeprom_image[EEPROM_PADDR0 + j];
1449 outb(dev->dev_addr[j], EWRK3_PAR0 + j);
1450 for (k = 0; k < 8; k++, sd >>= 1) {
1451 lfsr = ((((crc & 0x02) >> 1) ^ (crc & 0x01)) ^ (sd & 0x01)) << 7;
1452 crc = (crc >> 1) + lfsr;
1453 }
1454 }
1455 if (crc != eeprom_image[EEPROM_PA_CRC])
1456 status = -1;
1457 } else {
1458 for (i = 0, k = 0; i < ETH_ALEN;) {
1459 k <<= 1;
1460 if (k > 0xffff)
1461 k -= 0xffff;
1462
1463 k += (u_char) (tmp = inb(EWRK3_APROM));
1464 dev->dev_addr[i] = (u_char) tmp;
1465 outb(dev->dev_addr[i], EWRK3_PAR0 + i);
1466 i++;
1467 k += (u_short) ((tmp = inb(EWRK3_APROM)) << 8);
1468 dev->dev_addr[i] = (u_char) tmp;
1469 outb(dev->dev_addr[i], EWRK3_PAR0 + i);
1470 i++;
1471
1472 if (k > 0xffff)
1473 k -= 0xffff;
1474 }
1475 if (k == 0xffff)
1476 k = 0;
1477 chksum = inb(EWRK3_APROM);
1478 chksum |= (inb(EWRK3_APROM) << 8);
1479 if (k != chksum)
1480 status = -1;
1481 }
1482
1483 return status;
1484}
1485
1486/*
1487 ** Look for a particular board name in the EISA configuration space
1488 */
1489static int __init EISA_signature(char *name, s32 eisa_id)
1490{
1491 u_long i;
1492 char *signatures[] = EWRK3_SIGNATURE;
1493 char ManCode[EWRK3_STRLEN];
1494 union {
1495 s32 ID;
1496 char Id[4];
1497 } Eisa;
1498 int status = 0;
1499
1500 *name = '\0';
1501 for (i = 0; i < 4; i++) {
1502 Eisa.Id[i] = inb(eisa_id + i);
1503 }
1504
1505 ManCode[0] = (((Eisa.Id[0] >> 2) & 0x1f) + 0x40);
1506 ManCode[1] = (((Eisa.Id[1] & 0xe0) >> 5) + ((Eisa.Id[0] & 0x03) << 3) + 0x40);
1507 ManCode[2] = (((Eisa.Id[2] >> 4) & 0x0f) + 0x30);
1508 ManCode[3] = ((Eisa.Id[2] & 0x0f) + 0x30);
1509 ManCode[4] = (((Eisa.Id[3] >> 4) & 0x0f) + 0x30);
1510 ManCode[5] = '\0';
1511
1512 for (i = 0; (*signatures[i] != '\0') && (*name == '\0'); i++) {
1513 if (strstr(ManCode, signatures[i]) != NULL) {
1514 strcpy(name, ManCode);
1515 status = 1;
1516 }
1517 }
1518
1519 return status; /* return the device name string */
1520}
1521
1522static void ewrk3_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1523{
1524 int fwrev = Read_EEPROM(dev->base_addr, EEPROM_REVLVL);
1525
1526 strcpy(info->driver, DRV_NAME);
1527 strcpy(info->version, DRV_VERSION);
1528 sprintf(info->fw_version, "%d", fwrev);
1529 strcpy(info->bus_info, "N/A");
1530 info->eedump_len = EEPROM_MAX;
1531}
1532
1533static int ewrk3_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1534{
1535 struct ewrk3_private *lp = netdev_priv(dev);
1536 unsigned long iobase = dev->base_addr;
1537 u8 cr = inb(EWRK3_CR);
1538
1539 switch (lp->adapter_name[4]) {
1540 case '3': /* DE203 */
1541 ecmd->supported = SUPPORTED_BNC;
1542 ecmd->port = PORT_BNC;
1543 break;
1544
1545 case '4': /* DE204 */
1546 ecmd->supported = SUPPORTED_TP;
1547 ecmd->port = PORT_TP;
1548 break;
1549
1550 case '5': /* DE205 */
1551 ecmd->supported = SUPPORTED_TP | SUPPORTED_BNC | SUPPORTED_AUI;
1552 ecmd->autoneg = !(cr & CR_APD);
1553 /*
1554 ** Port is only valid if autoneg is disabled
1555 ** and even then we don't know if AUI is jumpered.
1556 */
1557 if (!ecmd->autoneg)
1558 ecmd->port = (cr & CR_PSEL) ? PORT_BNC : PORT_TP;
1559 break;
1560 }
1561
1562 ecmd->supported |= SUPPORTED_10baseT_Half;
1563 ecmd->speed = SPEED_10;
1564 ecmd->duplex = DUPLEX_HALF;
1565 return 0;
1566}
1567
1568static int ewrk3_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1569{
1570 struct ewrk3_private *lp = netdev_priv(dev);
1571 unsigned long iobase = dev->base_addr;
1572 unsigned long flags;
1573 u8 cr;
1574
1575 /* DE205 is the only card with anything to set */
1576 if (lp->adapter_name[4] != '5')
1577 return -EOPNOTSUPP;
1578
1579 /* Sanity-check parameters */
1580 if (ecmd->speed != SPEED_10)
1581 return -EINVAL;
1582 if (ecmd->port != PORT_TP && ecmd->port != PORT_BNC)
1583 return -EINVAL; /* AUI is not software-selectable */
1584 if (ecmd->transceiver != XCVR_INTERNAL)
1585 return -EINVAL;
1586 if (ecmd->duplex != DUPLEX_HALF)
1587 return -EINVAL;
1588 if (ecmd->phy_address != 0)
1589 return -EINVAL;
1590
1591 spin_lock_irqsave(&lp->hw_lock, flags);
1592 cr = inb(EWRK3_CR);
1593
1594 /* If Autoneg is set, change to Auto Port mode */
1595 /* Otherwise, disable Auto Port and set port explicitly */
1596 if (ecmd->autoneg) {
1597 cr &= ~CR_APD;
1598 } else {
1599 cr |= CR_APD;
1600 if (ecmd->port == PORT_TP)
1601 cr &= ~CR_PSEL; /* Force TP */
1602 else
1603 cr |= CR_PSEL; /* Force BNC */
1604 }
1605
1606 /* Commit the changes */
1607 outb(cr, EWRK3_CR);
1608 spin_unlock_irqrestore(&lp->hw_lock, flags);
1609 return 0;
1610}
1611
1612static u32 ewrk3_get_link(struct net_device *dev)
1613{
1614 unsigned long iobase = dev->base_addr;
1615 u8 cmr = inb(EWRK3_CMR);
1616 /* DE203 has BNC only and link status does not apply */
1617 /* On DE204 this is always valid since TP is the only port. */
1618 /* On DE205 this reflects TP status even if BNC or AUI is selected. */
1619 return !(cmr & CMR_LINK);
1620}
1621
1622static int ewrk3_phys_id(struct net_device *dev, u32 data)
1623{
1624 struct ewrk3_private *lp = netdev_priv(dev);
1625 unsigned long iobase = dev->base_addr;
1626 unsigned long flags;
1627 u8 cr;
1628 int count;
1629
1630 /* Toggle LED 4x per second */
1631 count = data << 2;
1632
1633 spin_lock_irqsave(&lp->hw_lock, flags);
1634
1635 /* Bail if a PHYS_ID is already in progress */
1636 if (lp->led_mask == 0) {
1637 spin_unlock_irqrestore(&lp->hw_lock, flags);
1638 return -EBUSY;
1639 }
1640
1641 /* Prevent ISR from twiddling the LED */
1642 lp->led_mask = 0;
1643
1644 while (count--) {
1645 /* Toggle the LED */
1646 cr = inb(EWRK3_CR);
1647 outb(cr ^ CR_LED, EWRK3_CR);
1648
1649 /* Wait a little while */
1650 spin_unlock_irqrestore(&lp->hw_lock, flags);
1651 msleep(250);
1652 spin_lock_irqsave(&lp->hw_lock, flags);
1653
1654 /* Exit if we got a signal */
1655 if (signal_pending(current))
1656 break;
1657 }
1658
1659 lp->led_mask = CR_LED;
1660 cr = inb(EWRK3_CR);
1661 outb(cr & ~CR_LED, EWRK3_CR);
1662 spin_unlock_irqrestore(&lp->hw_lock, flags);
1663 return signal_pending(current) ? -ERESTARTSYS : 0;
1664}
1665
7282d491 1666static const struct ethtool_ops ethtool_ops_203 = {
1da177e4
LT		 1667 .get_drvinfo = ewrk3_get_drvinfo,
1668 .get_settings = ewrk3_get_settings,
1669 .set_settings = ewrk3_set_settings,
1670 .phys_id = ewrk3_phys_id,
1671};
1672
7282d491 1673static const struct ethtool_ops ethtool_ops = {
1da177e4
LT		 1674 .get_drvinfo = ewrk3_get_drvinfo,
1675 .get_settings = ewrk3_get_settings,
1676 .set_settings = ewrk3_set_settings,
1677 .get_link = ewrk3_get_link,
1678 .phys_id = ewrk3_phys_id,
1679};
1680
1681/*
1682 ** Perform IOCTL call functions here. Some are privileged operations and the
1683 ** effective uid is checked in those cases.
1684 */
1685static int ewrk3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1686{
1687 struct ewrk3_private *lp = netdev_priv(dev);
1688 struct ewrk3_ioctl *ioc = (struct ewrk3_ioctl *) &rq->ifr_ifru;
1689 u_long iobase = dev->base_addr;
1690 int i, j, status = 0;
1691 u_char csr;
1692 unsigned long flags;
1693 union ewrk3_addr {
1694 u_char addr[HASH_TABLE_LEN * ETH_ALEN];
1695 u_short val[(HASH_TABLE_LEN * ETH_ALEN) >> 1];
1696 };
6aa20a22 1697
1da177e4
LT		 1698 union ewrk3_addr *tmp;
1699
1700 /* All we handle are private IOCTLs */
1701 if (cmd != EWRK3IOCTL)
1702 return -EOPNOTSUPP;
1703
1704 tmp = kmalloc(sizeof(union ewrk3_addr), GFP_KERNEL);
1705 if(tmp==NULL)
1706 return -ENOMEM;
1707
1708 switch (ioc->cmd) {
1709 case EWRK3_GET_HWADDR: /* Get the hardware address */
1710 for (i = 0; i < ETH_ALEN; i++) {
1711 tmp->addr[i] = dev->dev_addr[i];
1712 }
1713 ioc->len = ETH_ALEN;
1714 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1715 status = -EFAULT;
1716 break;
6aa20a22 1717
1da177e4
LT		 1718 case EWRK3_SET_HWADDR: /* Set the hardware address */
1719 if (capable(CAP_NET_ADMIN)) {
1720 spin_lock_irqsave(&lp->hw_lock, flags);
1721 csr = inb(EWRK3_CSR);
1722 csr |= (CSR_TXD | CSR_RXD);
1723 outb(csr, EWRK3_CSR); /* Disable the TX and RX */
1724 spin_unlock_irqrestore(&lp->hw_lock, flags);
1725
1726 if (copy_from_user(tmp->addr, ioc->data, ETH_ALEN)) {
1727 status = -EFAULT;
1728 break;
1729 }
1730 spin_lock_irqsave(&lp->hw_lock, flags);
1731 for (i = 0; i < ETH_ALEN; i++) {
1732 dev->dev_addr[i] = tmp->addr[i];
1733 outb(tmp->addr[i], EWRK3_PAR0 + i);
1734 }
1735
1736 csr = inb(EWRK3_CSR);
1737 csr &= ~(CSR_TXD | CSR_RXD); /* Enable the TX and RX */
1738 outb(csr, EWRK3_CSR);
1739 spin_unlock_irqrestore(&lp->hw_lock, flags);
1740 } else {
1741 status = -EPERM;
1742 }
1743
1744 break;
1745 case EWRK3_SET_PROM: /* Set Promiscuous Mode */
1746 if (capable(CAP_NET_ADMIN)) {
1747 spin_lock_irqsave(&lp->hw_lock, flags);
1748 csr = inb(EWRK3_CSR);
1749 csr |= CSR_PME;
1750 csr &= ~CSR_MCE;
1751 outb(csr, EWRK3_CSR);
1752 spin_unlock_irqrestore(&lp->hw_lock, flags);
1753 } else {
1754 status = -EPERM;
1755 }
1756
1757 break;
1758 case EWRK3_CLR_PROM: /* Clear Promiscuous Mode */
1759 if (capable(CAP_NET_ADMIN)) {
1760 spin_lock_irqsave(&lp->hw_lock, flags);
1761 csr = inb(EWRK3_CSR);
1762 csr &= ~CSR_PME;
1763 outb(csr, EWRK3_CSR);
1764 spin_unlock_irqrestore(&lp->hw_lock, flags);
1765 } else {
1766 status = -EPERM;
1767 }
1768
1769 break;
1770 case EWRK3_GET_MCA: /* Get the multicast address table */
1771 spin_lock_irqsave(&lp->hw_lock, flags);
1772 if (lp->shmem_length == IO_ONLY) {
1773 outb(0, EWRK3_IOPR);
1774 outw(PAGE0_HTE, EWRK3_PIR1);
1775 for (i = 0; i < (HASH_TABLE_LEN >> 3); i++) {
1776 tmp->addr[i] = inb(EWRK3_DATA);
1777 }
1778 } else {
1779 outb(0, EWRK3_MPR);
1780 memcpy_fromio(tmp->addr, lp->shmem + PAGE0_HTE, (HASH_TABLE_LEN >> 3));
1781 }
1782 spin_unlock_irqrestore(&lp->hw_lock, flags);
1783
1784 ioc->len = (HASH_TABLE_LEN >> 3);
1785 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1786 status = -EFAULT;
1787
1788 break;
1789 case EWRK3_SET_MCA: /* Set a multicast address */
1790 if (capable(CAP_NET_ADMIN)) {
1791 if (ioc->len > 1024)
1792 {
1793 status = -EINVAL;
1794 break;
1795 }
1796 if (copy_from_user(tmp->addr, ioc->data, ETH_ALEN * ioc->len)) {
1797 status = -EFAULT;
1798 break;
1799 }
1800 set_multicast_list(dev);
1801 } else {
1802 status = -EPERM;
1803 }
1804
1805 break;
1806 case EWRK3_CLR_MCA: /* Clear all multicast addresses */
1807 if (capable(CAP_NET_ADMIN)) {
1808 set_multicast_list(dev);
1809 } else {
1810 status = -EPERM;
1811 }
1812
1813 break;
1814 case EWRK3_MCA_EN: /* Enable multicast addressing */
1815 if (capable(CAP_NET_ADMIN)) {
1816 spin_lock_irqsave(&lp->hw_lock, flags);
1817 csr = inb(EWRK3_CSR);
1818 csr |= CSR_MCE;
1819 csr &= ~CSR_PME;
1820 outb(csr, EWRK3_CSR);
1821 spin_unlock_irqrestore(&lp->hw_lock, flags);
1822 } else {
1823 status = -EPERM;
1824 }
1825
1826 break;
1827 case EWRK3_GET_STATS: { /* Get the driver statistics */
1828 struct ewrk3_stats *tmp_stats =
1829 kmalloc(sizeof(lp->pktStats), GFP_KERNEL);
1830 if (!tmp_stats) {
1831 status = -ENOMEM;
1832 break;
1833 }
1834
1835 spin_lock_irqsave(&lp->hw_lock, flags);
1836 memcpy(tmp_stats, &lp->pktStats, sizeof(lp->pktStats));
1837 spin_unlock_irqrestore(&lp->hw_lock, flags);
1838
1839 ioc->len = sizeof(lp->pktStats);
1840 if (copy_to_user(ioc->data, tmp_stats, sizeof(lp->pktStats)))
1841 status = -EFAULT;
1842 kfree(tmp_stats);
1843 break;
1844 }
1845 case EWRK3_CLR_STATS: /* Zero out the driver statistics */
1846 if (capable(CAP_NET_ADMIN)) {
1847 spin_lock_irqsave(&lp->hw_lock, flags);
1848 memset(&lp->pktStats, 0, sizeof(lp->pktStats));
1849 spin_unlock_irqrestore(&lp->hw_lock,flags);
1850 } else {
1851 status = -EPERM;
1852 }
1853
1854 break;
1855 case EWRK3_GET_CSR: /* Get the CSR Register contents */
1856 tmp->addr[0] = inb(EWRK3_CSR);
1857 ioc->len = 1;
1858 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1859 status = -EFAULT;
1860 break;
1861 case EWRK3_SET_CSR: /* Set the CSR Register contents */
1862 if (capable(CAP_NET_ADMIN)) {
1863 if (copy_from_user(tmp->addr, ioc->data, 1)) {
1864 status = -EFAULT;
1865 break;
1866 }
1867 outb(tmp->addr[0], EWRK3_CSR);
1868 } else {
1869 status = -EPERM;
1870 }
1871
1872 break;
1873 case EWRK3_GET_EEPROM: /* Get the EEPROM contents */
1874 if (capable(CAP_NET_ADMIN)) {
1875 for (i = 0; i < (EEPROM_MAX >> 1); i++) {
1876 tmp->val[i] = (short) Read_EEPROM(iobase, i);
1877 }
1878 i = EEPROM_MAX;
1879 tmp->addr[i++] = inb(EWRK3_CMR); /* Config/Management Reg. */
1880 for (j = 0; j < ETH_ALEN; j++) {
1881 tmp->addr[i++] = inb(EWRK3_PAR0 + j);
1882 }
1883 ioc->len = EEPROM_MAX + 1 + ETH_ALEN;
1884 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1885 status = -EFAULT;
1886 } else {
1887 status = -EPERM;
1888 }
1889
1890 break;
1891 case EWRK3_SET_EEPROM: /* Set the EEPROM contents */
1892 if (capable(CAP_NET_ADMIN)) {
1893 if (copy_from_user(tmp->addr, ioc->data, EEPROM_MAX)) {
1894 status = -EFAULT;
1895 break;
1896 }
1897 for (i = 0; i < (EEPROM_MAX >> 1); i++) {
1898 Write_EEPROM(tmp->val[i], iobase, i);
1899 }
1900 } else {
1901 status = -EPERM;
1902 }
1903
1904 break;
1905 case EWRK3_GET_CMR: /* Get the CMR Register contents */
1906 tmp->addr[0] = inb(EWRK3_CMR);
1907 ioc->len = 1;
1908 if (copy_to_user(ioc->data, tmp->addr, ioc->len))
1909 status = -EFAULT;
1910 break;
1911 case EWRK3_SET_TX_CUT_THRU: /* Set TX cut through mode */
1912 if (capable(CAP_NET_ADMIN)) {
1913 lp->txc = 1;
1914 } else {
1915 status = -EPERM;
1916 }
1917
1918 break;
1919 case EWRK3_CLR_TX_CUT_THRU: /* Clear TX cut through mode */
1920 if (capable(CAP_NET_ADMIN)) {
1921 lp->txc = 0;
1922 } else {
1923 status = -EPERM;
1924 }
1925
1926 break;
1927 default:
1928 status = -EOPNOTSUPP;
1929 }
1930 kfree(tmp);
1931 return status;
1932}
1933
1934#ifdef MODULE
1935static struct net_device *ewrk3_devs[MAX_NUM_EWRK3S];
1936static int ndevs;
1937static int io[MAX_NUM_EWRK3S+1] = { 0x300, 0, };
1938
1939/* '21' below should really be 'MAX_NUM_EWRK3S' */
1940module_param_array(io, int, NULL, 0);
1941module_param_array(irq, int, NULL, 0);
1942MODULE_PARM_DESC(io, "EtherWORKS 3 I/O base address(es)");
1943MODULE_PARM_DESC(irq, "EtherWORKS 3 IRQ number(s)");
1944
1945static __exit void ewrk3_exit_module(void)
1946{
1947 int i;
1948
1949 for( i=0; i<ndevs; i++ ) {
1950 struct net_device *dev = ewrk3_devs[i];
1951 struct ewrk3_private *lp = netdev_priv(dev);
1952 ewrk3_devs[i] = NULL;
1953 unregister_netdev(dev);
1954 release_region(dev->base_addr, EWRK3_TOTAL_SIZE);
1955 iounmap(lp->shmem);
1956 free_netdev(dev);
1957 }
1958}
1959
1960static __init int ewrk3_init_module(void)
1961{
1962 int i=0;
1963
1964 while( io[i] && irq[i] ) {
1965 struct net_device *dev
1966 = alloc_etherdev(sizeof(struct ewrk3_private));
1967
1968 if (!dev)
1969 break;
1970
1971 if (ewrk3_probe1(dev, io[i], irq[i]) != 0) {
1972 free_netdev(dev);
1973 break;
1974 }
1975
1976 ewrk3_devs[ndevs++] = dev;
1977 i++;
1978 }
1979
1980 return ndevs ? 0 : -EIO;
1981}
1982
1983
1984/* Hack for breakage in new module stuff */
1985module_exit(ewrk3_exit_module);
1986module_init(ewrk3_init_module);
1987#endif /* MODULE */
1988MODULE_LICENSE("GPL");
1989
6aa20a22 1990
1da177e4
LT		 1991
1992/*
1993 * Local variables:
1994 * compile-command: "gcc -D__KERNEL__ -I/linux/include -Wall -Wstrict-prototypes -fomit-frame-pointer -fno-strength-reduce -malign-loops=2 -malign-jumps=2 -malign-functions=2 -O2 -m486 -c ewrk3.c"
1995 *
1996 * compile-command: "gcc -D__KERNEL__ -DMODULE -I/linux/include -Wall -Wstrict-prototypes -fomit-frame-pointer -fno-strength-reduce -malign-loops=2 -malign-jumps=2 -malign-functions=2 -O2 -m486 -c ewrk3.c"
1997 * End:
1998 */
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