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Commit | Line | Data |
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5d031e9e DP |
1 | /* |
2 | * Driver for the MPC5200 Fast Ethernet Controller | |
3 | * | |
4 | * Originally written by Dale Farnsworth <dfarnsworth@mvista.com> and | |
5 | * now maintained by Sylvain Munaut <tnt@246tNt.com> | |
6 | * | |
7 | * Copyright (C) 2007 Domen Puncer, Telargo, Inc. | |
8 | * Copyright (C) 2007 Sylvain Munaut <tnt@246tNt.com> | |
9 | * Copyright (C) 2003-2004 MontaVista, Software, Inc. | |
10 | * | |
11 | * This file is licensed under the terms of the GNU General Public License | |
12 | * version 2. This program is licensed "as is" without any warranty of any | |
13 | * kind, whether express or implied. | |
14 | * | |
15 | */ | |
16 | ||
17 | #include <linux/module.h> | |
18 | ||
19 | #include <linux/kernel.h> | |
20 | #include <linux/types.h> | |
21 | #include <linux/spinlock.h> | |
5a0e3ad6 | 22 | #include <linux/slab.h> |
5d031e9e DP |
23 | #include <linux/errno.h> |
24 | #include <linux/init.h> | |
25 | #include <linux/crc32.h> | |
26 | #include <linux/hardirq.h> | |
27 | #include <linux/delay.h> | |
28 | #include <linux/of_device.h> | |
ca816d98 | 29 | #include <linux/of_mdio.h> |
5d031e9e DP |
30 | #include <linux/of_platform.h> |
31 | ||
32 | #include <linux/netdevice.h> | |
33 | #include <linux/etherdevice.h> | |
34 | #include <linux/ethtool.h> | |
35 | #include <linux/skbuff.h> | |
36 | ||
37 | #include <asm/io.h> | |
38 | #include <asm/delay.h> | |
39 | #include <asm/mpc52xx.h> | |
40 | ||
41 | #include <sysdev/bestcomm/bestcomm.h> | |
42 | #include <sysdev/bestcomm/fec.h> | |
43 | ||
44 | #include "fec_mpc52xx.h" | |
45 | ||
46 | #define DRIVER_NAME "mpc52xx-fec" | |
47 | ||
80791be1 GL |
48 | /* Private driver data structure */ |
49 | struct mpc52xx_fec_priv { | |
ca816d98 | 50 | struct net_device *ndev; |
80791be1 GL |
51 | int duplex; |
52 | int speed; | |
53 | int r_irq; | |
54 | int t_irq; | |
55 | struct mpc52xx_fec __iomem *fec; | |
56 | struct bcom_task *rx_dmatsk; | |
57 | struct bcom_task *tx_dmatsk; | |
58 | spinlock_t lock; | |
59 | int msg_enable; | |
60 | ||
61 | /* MDIO link details */ | |
ca816d98 GL |
62 | unsigned int mdio_speed; |
63 | struct device_node *phy_node; | |
80791be1 GL |
64 | struct phy_device *phydev; |
65 | enum phy_state link; | |
ca816d98 | 66 | int seven_wire_mode; |
80791be1 GL |
67 | }; |
68 | ||
69 | ||
5d031e9e DP |
70 | static irqreturn_t mpc52xx_fec_interrupt(int, void *); |
71 | static irqreturn_t mpc52xx_fec_rx_interrupt(int, void *); | |
72 | static irqreturn_t mpc52xx_fec_tx_interrupt(int, void *); | |
73 | static void mpc52xx_fec_stop(struct net_device *dev); | |
74 | static void mpc52xx_fec_start(struct net_device *dev); | |
75 | static void mpc52xx_fec_reset(struct net_device *dev); | |
76 | ||
77 | static u8 mpc52xx_fec_mac_addr[6]; | |
78 | module_param_array_named(mac, mpc52xx_fec_mac_addr, byte, NULL, 0); | |
79 | MODULE_PARM_DESC(mac, "six hex digits, ie. 0x1,0x2,0xc0,0x01,0xba,0xbe"); | |
80 | ||
81 | #define MPC52xx_MESSAGES_DEFAULT ( NETIF_MSG_DRV | NETIF_MSG_PROBE | \ | |
8b983510 | 82 | NETIF_MSG_LINK | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP) |
5d031e9e DP |
83 | static int debug = -1; /* the above default */ |
84 | module_param(debug, int, 0); | |
85 | MODULE_PARM_DESC(debug, "debugging messages level"); | |
86 | ||
87 | static void mpc52xx_fec_tx_timeout(struct net_device *dev) | |
88 | { | |
1e4e0767 AL |
89 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); |
90 | unsigned long flags; | |
91 | ||
5d031e9e DP |
92 | dev_warn(&dev->dev, "transmit timed out\n"); |
93 | ||
1e4e0767 | 94 | spin_lock_irqsave(&priv->lock, flags); |
5d031e9e | 95 | mpc52xx_fec_reset(dev); |
5d031e9e | 96 | dev->stats.tx_errors++; |
1e4e0767 | 97 | spin_unlock_irqrestore(&priv->lock, flags); |
5d031e9e DP |
98 | |
99 | netif_wake_queue(dev); | |
100 | } | |
101 | ||
102 | static void mpc52xx_fec_set_paddr(struct net_device *dev, u8 *mac) | |
103 | { | |
104 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
105 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
106 | ||
107 | out_be32(&fec->paddr1, *(u32 *)(&mac[0])); | |
108 | out_be32(&fec->paddr2, (*(u16 *)(&mac[4]) << 16) | FEC_PADDR2_TYPE); | |
109 | } | |
110 | ||
111 | static void mpc52xx_fec_get_paddr(struct net_device *dev, u8 *mac) | |
112 | { | |
113 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
114 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
115 | ||
116 | *(u32 *)(&mac[0]) = in_be32(&fec->paddr1); | |
117 | *(u16 *)(&mac[4]) = in_be32(&fec->paddr2) >> 16; | |
118 | } | |
119 | ||
120 | static int mpc52xx_fec_set_mac_address(struct net_device *dev, void *addr) | |
121 | { | |
122 | struct sockaddr *sock = addr; | |
123 | ||
124 | memcpy(dev->dev_addr, sock->sa_data, dev->addr_len); | |
125 | ||
126 | mpc52xx_fec_set_paddr(dev, sock->sa_data); | |
127 | return 0; | |
128 | } | |
129 | ||
130 | static void mpc52xx_fec_free_rx_buffers(struct net_device *dev, struct bcom_task *s) | |
131 | { | |
132 | while (!bcom_queue_empty(s)) { | |
133 | struct bcom_fec_bd *bd; | |
134 | struct sk_buff *skb; | |
135 | ||
136 | skb = bcom_retrieve_buffer(s, NULL, (struct bcom_bd **)&bd); | |
461cadbc GL |
137 | dma_unmap_single(dev->dev.parent, bd->skb_pa, skb->len, |
138 | DMA_FROM_DEVICE); | |
5d031e9e DP |
139 | kfree_skb(skb); |
140 | } | |
141 | } | |
142 | ||
1e4e0767 AL |
143 | static void |
144 | mpc52xx_fec_rx_submit(struct net_device *dev, struct sk_buff *rskb) | |
145 | { | |
146 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
147 | struct bcom_fec_bd *bd; | |
148 | ||
149 | bd = (struct bcom_fec_bd *) bcom_prepare_next_buffer(priv->rx_dmatsk); | |
150 | bd->status = FEC_RX_BUFFER_SIZE; | |
151 | bd->skb_pa = dma_map_single(dev->dev.parent, rskb->data, | |
152 | FEC_RX_BUFFER_SIZE, DMA_FROM_DEVICE); | |
153 | bcom_submit_next_buffer(priv->rx_dmatsk, rskb); | |
154 | } | |
155 | ||
5d031e9e DP |
156 | static int mpc52xx_fec_alloc_rx_buffers(struct net_device *dev, struct bcom_task *rxtsk) |
157 | { | |
1e4e0767 | 158 | struct sk_buff *skb; |
5d031e9e | 159 | |
1e4e0767 | 160 | while (!bcom_queue_full(rxtsk)) { |
5d031e9e | 161 | skb = dev_alloc_skb(FEC_RX_BUFFER_SIZE); |
1e4e0767 | 162 | if (!skb) |
5d031e9e DP |
163 | return -EAGAIN; |
164 | ||
165 | /* zero out the initial receive buffers to aid debugging */ | |
166 | memset(skb->data, 0, FEC_RX_BUFFER_SIZE); | |
1e4e0767 | 167 | mpc52xx_fec_rx_submit(dev, skb); |
5d031e9e | 168 | } |
5d031e9e DP |
169 | return 0; |
170 | } | |
171 | ||
172 | /* based on generic_adjust_link from fs_enet-main.c */ | |
173 | static void mpc52xx_fec_adjust_link(struct net_device *dev) | |
174 | { | |
175 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
176 | struct phy_device *phydev = priv->phydev; | |
177 | int new_state = 0; | |
178 | ||
179 | if (phydev->link != PHY_DOWN) { | |
180 | if (phydev->duplex != priv->duplex) { | |
181 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
182 | u32 rcntrl; | |
183 | u32 tcntrl; | |
184 | ||
185 | new_state = 1; | |
186 | priv->duplex = phydev->duplex; | |
187 | ||
188 | rcntrl = in_be32(&fec->r_cntrl); | |
189 | tcntrl = in_be32(&fec->x_cntrl); | |
190 | ||
191 | rcntrl &= ~FEC_RCNTRL_DRT; | |
192 | tcntrl &= ~FEC_TCNTRL_FDEN; | |
193 | if (phydev->duplex == DUPLEX_FULL) | |
194 | tcntrl |= FEC_TCNTRL_FDEN; /* FD enable */ | |
195 | else | |
196 | rcntrl |= FEC_RCNTRL_DRT; /* disable Rx on Tx (HD) */ | |
197 | ||
198 | out_be32(&fec->r_cntrl, rcntrl); | |
199 | out_be32(&fec->x_cntrl, tcntrl); | |
200 | } | |
201 | ||
202 | if (phydev->speed != priv->speed) { | |
203 | new_state = 1; | |
204 | priv->speed = phydev->speed; | |
205 | } | |
206 | ||
207 | if (priv->link == PHY_DOWN) { | |
208 | new_state = 1; | |
209 | priv->link = phydev->link; | |
5d031e9e DP |
210 | } |
211 | ||
212 | } else if (priv->link) { | |
213 | new_state = 1; | |
214 | priv->link = PHY_DOWN; | |
215 | priv->speed = 0; | |
216 | priv->duplex = -1; | |
5d031e9e DP |
217 | } |
218 | ||
219 | if (new_state && netif_msg_link(priv)) | |
220 | phy_print_status(phydev); | |
221 | } | |
222 | ||
5d031e9e DP |
223 | static int mpc52xx_fec_open(struct net_device *dev) |
224 | { | |
225 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
226 | int err = -EBUSY; | |
227 | ||
ca816d98 GL |
228 | if (priv->phy_node) { |
229 | priv->phydev = of_phy_connect(priv->ndev, priv->phy_node, | |
230 | mpc52xx_fec_adjust_link, 0, 0); | |
231 | if (!priv->phydev) { | |
232 | dev_err(&dev->dev, "of_phy_connect failed\n"); | |
233 | return -ENODEV; | |
234 | } | |
235 | phy_start(priv->phydev); | |
236 | } | |
237 | ||
a0607fd3 | 238 | if (request_irq(dev->irq, mpc52xx_fec_interrupt, IRQF_SHARED, |
5d031e9e DP |
239 | DRIVER_NAME "_ctrl", dev)) { |
240 | dev_err(&dev->dev, "ctrl interrupt request failed\n"); | |
ca816d98 | 241 | goto free_phy; |
5d031e9e | 242 | } |
a0607fd3 | 243 | if (request_irq(priv->r_irq, mpc52xx_fec_rx_interrupt, 0, |
5d031e9e DP |
244 | DRIVER_NAME "_rx", dev)) { |
245 | dev_err(&dev->dev, "rx interrupt request failed\n"); | |
246 | goto free_ctrl_irq; | |
247 | } | |
a0607fd3 | 248 | if (request_irq(priv->t_irq, mpc52xx_fec_tx_interrupt, 0, |
5d031e9e DP |
249 | DRIVER_NAME "_tx", dev)) { |
250 | dev_err(&dev->dev, "tx interrupt request failed\n"); | |
251 | goto free_2irqs; | |
252 | } | |
253 | ||
254 | bcom_fec_rx_reset(priv->rx_dmatsk); | |
255 | bcom_fec_tx_reset(priv->tx_dmatsk); | |
256 | ||
257 | err = mpc52xx_fec_alloc_rx_buffers(dev, priv->rx_dmatsk); | |
258 | if (err) { | |
259 | dev_err(&dev->dev, "mpc52xx_fec_alloc_rx_buffers failed\n"); | |
260 | goto free_irqs; | |
261 | } | |
262 | ||
5d031e9e DP |
263 | bcom_enable(priv->rx_dmatsk); |
264 | bcom_enable(priv->tx_dmatsk); | |
265 | ||
266 | mpc52xx_fec_start(dev); | |
267 | ||
268 | netif_start_queue(dev); | |
269 | ||
270 | return 0; | |
271 | ||
5d031e9e DP |
272 | free_irqs: |
273 | free_irq(priv->t_irq, dev); | |
274 | free_2irqs: | |
275 | free_irq(priv->r_irq, dev); | |
276 | free_ctrl_irq: | |
277 | free_irq(dev->irq, dev); | |
ca816d98 GL |
278 | free_phy: |
279 | if (priv->phydev) { | |
280 | phy_stop(priv->phydev); | |
281 | phy_disconnect(priv->phydev); | |
282 | priv->phydev = NULL; | |
283 | } | |
5d031e9e DP |
284 | |
285 | return err; | |
286 | } | |
287 | ||
288 | static int mpc52xx_fec_close(struct net_device *dev) | |
289 | { | |
290 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
291 | ||
292 | netif_stop_queue(dev); | |
293 | ||
294 | mpc52xx_fec_stop(dev); | |
295 | ||
296 | mpc52xx_fec_free_rx_buffers(dev, priv->rx_dmatsk); | |
297 | ||
298 | free_irq(dev->irq, dev); | |
299 | free_irq(priv->r_irq, dev); | |
300 | free_irq(priv->t_irq, dev); | |
301 | ||
ca816d98 GL |
302 | if (priv->phydev) { |
303 | /* power down phy */ | |
304 | phy_stop(priv->phydev); | |
305 | phy_disconnect(priv->phydev); | |
306 | priv->phydev = NULL; | |
307 | } | |
5d031e9e DP |
308 | |
309 | return 0; | |
310 | } | |
311 | ||
312 | /* This will only be invoked if your driver is _not_ in XOFF state. | |
313 | * What this means is that you need not check it, and that this | |
314 | * invariant will hold if you make sure that the netif_*_queue() | |
315 | * calls are done at the proper times. | |
316 | */ | |
d360009c | 317 | static int mpc52xx_fec_start_xmit(struct sk_buff *skb, struct net_device *dev) |
5d031e9e DP |
318 | { |
319 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
320 | struct bcom_fec_bd *bd; | |
4871953c | 321 | unsigned long flags; |
5d031e9e DP |
322 | |
323 | if (bcom_queue_full(priv->tx_dmatsk)) { | |
324 | if (net_ratelimit()) | |
325 | dev_err(&dev->dev, "transmit queue overrun\n"); | |
d360009c | 326 | return NETDEV_TX_BUSY; |
5d031e9e DP |
327 | } |
328 | ||
4871953c | 329 | spin_lock_irqsave(&priv->lock, flags); |
5d031e9e DP |
330 | dev->trans_start = jiffies; |
331 | ||
332 | bd = (struct bcom_fec_bd *) | |
333 | bcom_prepare_next_buffer(priv->tx_dmatsk); | |
334 | ||
335 | bd->status = skb->len | BCOM_FEC_TX_BD_TFD | BCOM_FEC_TX_BD_TC; | |
461cadbc GL |
336 | bd->skb_pa = dma_map_single(dev->dev.parent, skb->data, skb->len, |
337 | DMA_TO_DEVICE); | |
5d031e9e DP |
338 | |
339 | bcom_submit_next_buffer(priv->tx_dmatsk, skb); | |
1e4e0767 | 340 | spin_unlock_irqrestore(&priv->lock, flags); |
5d031e9e DP |
341 | |
342 | if (bcom_queue_full(priv->tx_dmatsk)) { | |
343 | netif_stop_queue(dev); | |
344 | } | |
345 | ||
d360009c | 346 | return NETDEV_TX_OK; |
5d031e9e DP |
347 | } |
348 | ||
bd28bdb1 JS |
349 | #ifdef CONFIG_NET_POLL_CONTROLLER |
350 | static void mpc52xx_fec_poll_controller(struct net_device *dev) | |
351 | { | |
352 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
353 | ||
354 | disable_irq(priv->t_irq); | |
355 | mpc52xx_fec_tx_interrupt(priv->t_irq, dev); | |
356 | enable_irq(priv->t_irq); | |
357 | disable_irq(priv->r_irq); | |
358 | mpc52xx_fec_rx_interrupt(priv->r_irq, dev); | |
359 | enable_irq(priv->r_irq); | |
360 | } | |
361 | #endif | |
362 | ||
363 | ||
5d031e9e DP |
364 | /* This handles BestComm transmit task interrupts |
365 | */ | |
366 | static irqreturn_t mpc52xx_fec_tx_interrupt(int irq, void *dev_id) | |
367 | { | |
368 | struct net_device *dev = dev_id; | |
369 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
1e4e0767 | 370 | unsigned long flags; |
5d031e9e | 371 | |
1e4e0767 | 372 | spin_lock_irqsave(&priv->lock, flags); |
5d031e9e DP |
373 | while (bcom_buffer_done(priv->tx_dmatsk)) { |
374 | struct sk_buff *skb; | |
375 | struct bcom_fec_bd *bd; | |
376 | skb = bcom_retrieve_buffer(priv->tx_dmatsk, NULL, | |
377 | (struct bcom_bd **)&bd); | |
461cadbc GL |
378 | dma_unmap_single(dev->dev.parent, bd->skb_pa, skb->len, |
379 | DMA_TO_DEVICE); | |
5d031e9e DP |
380 | |
381 | dev_kfree_skb_irq(skb); | |
382 | } | |
1e4e0767 | 383 | spin_unlock_irqrestore(&priv->lock, flags); |
5d031e9e DP |
384 | |
385 | netif_wake_queue(dev); | |
386 | ||
5d031e9e DP |
387 | return IRQ_HANDLED; |
388 | } | |
389 | ||
390 | static irqreturn_t mpc52xx_fec_rx_interrupt(int irq, void *dev_id) | |
391 | { | |
392 | struct net_device *dev = dev_id; | |
393 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
1e4e0767 AL |
394 | struct sk_buff *rskb; /* received sk_buff */ |
395 | struct sk_buff *skb; /* new sk_buff to enqueue in its place */ | |
396 | struct bcom_fec_bd *bd; | |
397 | u32 status, physaddr; | |
398 | int length; | |
399 | unsigned long flags; | |
400 | ||
401 | spin_lock_irqsave(&priv->lock, flags); | |
5d031e9e DP |
402 | |
403 | while (bcom_buffer_done(priv->rx_dmatsk)) { | |
5d031e9e DP |
404 | |
405 | rskb = bcom_retrieve_buffer(priv->rx_dmatsk, &status, | |
1e4e0767 AL |
406 | (struct bcom_bd **)&bd); |
407 | physaddr = bd->skb_pa; | |
5d031e9e DP |
408 | |
409 | /* Test for errors in received frame */ | |
410 | if (status & BCOM_FEC_RX_BD_ERRORS) { | |
411 | /* Drop packet and reuse the buffer */ | |
1e4e0767 | 412 | mpc52xx_fec_rx_submit(dev, rskb); |
5d031e9e | 413 | dev->stats.rx_dropped++; |
5d031e9e DP |
414 | continue; |
415 | } | |
416 | ||
417 | /* skbs are allocated on open, so now we allocate a new one, | |
418 | * and remove the old (with the packet) */ | |
419 | skb = dev_alloc_skb(FEC_RX_BUFFER_SIZE); | |
1e4e0767 | 420 | if (!skb) { |
5d031e9e | 421 | /* Can't get a new one : reuse the same & drop pkt */ |
1e4e0767 AL |
422 | dev_notice(&dev->dev, "Low memory - dropped packet.\n"); |
423 | mpc52xx_fec_rx_submit(dev, rskb); | |
5d031e9e | 424 | dev->stats.rx_dropped++; |
1e4e0767 | 425 | continue; |
5d031e9e DP |
426 | } |
427 | ||
1e4e0767 AL |
428 | /* Enqueue the new sk_buff back on the hardware */ |
429 | mpc52xx_fec_rx_submit(dev, skb); | |
5d031e9e | 430 | |
1e4e0767 AL |
431 | /* Process the received skb - Drop the spin lock while |
432 | * calling into the network stack */ | |
433 | spin_unlock_irqrestore(&priv->lock, flags); | |
5d031e9e | 434 | |
1e4e0767 AL |
435 | dma_unmap_single(dev->dev.parent, physaddr, rskb->len, |
436 | DMA_FROM_DEVICE); | |
437 | length = status & BCOM_FEC_RX_BD_LEN_MASK; | |
438 | skb_put(rskb, length - 4); /* length without CRC32 */ | |
439 | rskb->dev = dev; | |
440 | rskb->protocol = eth_type_trans(rskb, dev); | |
441 | netif_rx(rskb); | |
442 | ||
443 | spin_lock_irqsave(&priv->lock, flags); | |
5d031e9e DP |
444 | } |
445 | ||
1e4e0767 AL |
446 | spin_unlock_irqrestore(&priv->lock, flags); |
447 | ||
5d031e9e DP |
448 | return IRQ_HANDLED; |
449 | } | |
450 | ||
451 | static irqreturn_t mpc52xx_fec_interrupt(int irq, void *dev_id) | |
452 | { | |
453 | struct net_device *dev = dev_id; | |
454 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
455 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
456 | u32 ievent; | |
1e4e0767 | 457 | unsigned long flags; |
5d031e9e DP |
458 | |
459 | ievent = in_be32(&fec->ievent); | |
460 | ||
461 | ievent &= ~FEC_IEVENT_MII; /* mii is handled separately */ | |
462 | if (!ievent) | |
463 | return IRQ_NONE; | |
464 | ||
465 | out_be32(&fec->ievent, ievent); /* clear pending events */ | |
466 | ||
8f3ba2dc SH |
467 | /* on fifo error, soft-reset fec */ |
468 | if (ievent & (FEC_IEVENT_RFIFO_ERROR | FEC_IEVENT_XFIFO_ERROR)) { | |
469 | ||
470 | if (net_ratelimit() && (ievent & FEC_IEVENT_RFIFO_ERROR)) | |
471 | dev_warn(&dev->dev, "FEC_IEVENT_RFIFO_ERROR\n"); | |
472 | if (net_ratelimit() && (ievent & FEC_IEVENT_XFIFO_ERROR)) | |
473 | dev_warn(&dev->dev, "FEC_IEVENT_XFIFO_ERROR\n"); | |
474 | ||
1e4e0767 | 475 | spin_lock_irqsave(&priv->lock, flags); |
8f3ba2dc | 476 | mpc52xx_fec_reset(dev); |
1e4e0767 | 477 | spin_unlock_irqrestore(&priv->lock, flags); |
8f3ba2dc | 478 | |
5d031e9e DP |
479 | return IRQ_HANDLED; |
480 | } | |
481 | ||
8f3ba2dc SH |
482 | if (ievent & ~FEC_IEVENT_TFINT) |
483 | dev_dbg(&dev->dev, "ievent: %08x\n", ievent); | |
5d031e9e | 484 | |
5d031e9e DP |
485 | return IRQ_HANDLED; |
486 | } | |
487 | ||
488 | /* | |
489 | * Get the current statistics. | |
490 | * This may be called with the card open or closed. | |
491 | */ | |
492 | static struct net_device_stats *mpc52xx_fec_get_stats(struct net_device *dev) | |
493 | { | |
494 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
495 | struct net_device_stats *stats = &dev->stats; | |
496 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
497 | ||
498 | stats->rx_bytes = in_be32(&fec->rmon_r_octets); | |
499 | stats->rx_packets = in_be32(&fec->rmon_r_packets); | |
500 | stats->rx_errors = in_be32(&fec->rmon_r_crc_align) + | |
501 | in_be32(&fec->rmon_r_undersize) + | |
502 | in_be32(&fec->rmon_r_oversize) + | |
503 | in_be32(&fec->rmon_r_frag) + | |
504 | in_be32(&fec->rmon_r_jab); | |
505 | ||
506 | stats->tx_bytes = in_be32(&fec->rmon_t_octets); | |
507 | stats->tx_packets = in_be32(&fec->rmon_t_packets); | |
508 | stats->tx_errors = in_be32(&fec->rmon_t_crc_align) + | |
509 | in_be32(&fec->rmon_t_undersize) + | |
510 | in_be32(&fec->rmon_t_oversize) + | |
511 | in_be32(&fec->rmon_t_frag) + | |
512 | in_be32(&fec->rmon_t_jab); | |
513 | ||
514 | stats->multicast = in_be32(&fec->rmon_r_mc_pkt); | |
515 | stats->collisions = in_be32(&fec->rmon_t_col); | |
516 | ||
517 | /* detailed rx_errors: */ | |
518 | stats->rx_length_errors = in_be32(&fec->rmon_r_undersize) | |
519 | + in_be32(&fec->rmon_r_oversize) | |
520 | + in_be32(&fec->rmon_r_frag) | |
521 | + in_be32(&fec->rmon_r_jab); | |
522 | stats->rx_over_errors = in_be32(&fec->r_macerr); | |
523 | stats->rx_crc_errors = in_be32(&fec->ieee_r_crc); | |
524 | stats->rx_frame_errors = in_be32(&fec->ieee_r_align); | |
525 | stats->rx_fifo_errors = in_be32(&fec->rmon_r_drop); | |
526 | stats->rx_missed_errors = in_be32(&fec->rmon_r_drop); | |
527 | ||
528 | /* detailed tx_errors: */ | |
529 | stats->tx_aborted_errors = 0; | |
530 | stats->tx_carrier_errors = in_be32(&fec->ieee_t_cserr); | |
531 | stats->tx_fifo_errors = in_be32(&fec->rmon_t_drop); | |
532 | stats->tx_heartbeat_errors = in_be32(&fec->ieee_t_sqe); | |
533 | stats->tx_window_errors = in_be32(&fec->ieee_t_lcol); | |
534 | ||
535 | return stats; | |
536 | } | |
537 | ||
538 | /* | |
539 | * Read MIB counters in order to reset them, | |
540 | * then zero all the stats fields in memory | |
541 | */ | |
542 | static void mpc52xx_fec_reset_stats(struct net_device *dev) | |
543 | { | |
544 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
545 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
546 | ||
547 | out_be32(&fec->mib_control, FEC_MIB_DISABLE); | |
cc154ac6 AV |
548 | memset_io(&fec->rmon_t_drop, 0, |
549 | offsetof(struct mpc52xx_fec, reserved10) - | |
550 | offsetof(struct mpc52xx_fec, rmon_t_drop)); | |
5d031e9e DP |
551 | out_be32(&fec->mib_control, 0); |
552 | ||
553 | memset(&dev->stats, 0, sizeof(dev->stats)); | |
554 | } | |
555 | ||
556 | /* | |
557 | * Set or clear the multicast filter for this adaptor. | |
558 | */ | |
559 | static void mpc52xx_fec_set_multicast_list(struct net_device *dev) | |
560 | { | |
561 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
562 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
563 | u32 rx_control; | |
564 | ||
565 | rx_control = in_be32(&fec->r_cntrl); | |
566 | ||
567 | if (dev->flags & IFF_PROMISC) { | |
568 | rx_control |= FEC_RCNTRL_PROM; | |
569 | out_be32(&fec->r_cntrl, rx_control); | |
570 | } else { | |
571 | rx_control &= ~FEC_RCNTRL_PROM; | |
572 | out_be32(&fec->r_cntrl, rx_control); | |
573 | ||
574 | if (dev->flags & IFF_ALLMULTI) { | |
575 | out_be32(&fec->gaddr1, 0xffffffff); | |
576 | out_be32(&fec->gaddr2, 0xffffffff); | |
577 | } else { | |
578 | u32 crc; | |
5d031e9e DP |
579 | struct dev_mc_list *dmi; |
580 | u32 gaddr1 = 0x00000000; | |
581 | u32 gaddr2 = 0x00000000; | |
582 | ||
48e2f183 | 583 | netdev_for_each_mc_addr(dmi, dev) { |
5d031e9e DP |
584 | crc = ether_crc_le(6, dmi->dmi_addr) >> 26; |
585 | if (crc >= 32) | |
586 | gaddr1 |= 1 << (crc-32); | |
587 | else | |
588 | gaddr2 |= 1 << crc; | |
5d031e9e DP |
589 | } |
590 | out_be32(&fec->gaddr1, gaddr1); | |
591 | out_be32(&fec->gaddr2, gaddr2); | |
592 | } | |
593 | } | |
594 | } | |
595 | ||
596 | /** | |
597 | * mpc52xx_fec_hw_init | |
598 | * @dev: network device | |
599 | * | |
600 | * Setup various hardware setting, only needed once on start | |
601 | */ | |
602 | static void mpc52xx_fec_hw_init(struct net_device *dev) | |
603 | { | |
604 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
605 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
606 | int i; | |
607 | ||
608 | /* Whack a reset. We should wait for this. */ | |
609 | out_be32(&fec->ecntrl, FEC_ECNTRL_RESET); | |
610 | for (i = 0; i < FEC_RESET_DELAY; ++i) { | |
611 | if ((in_be32(&fec->ecntrl) & FEC_ECNTRL_RESET) == 0) | |
612 | break; | |
613 | udelay(1); | |
614 | } | |
615 | if (i == FEC_RESET_DELAY) | |
616 | dev_err(&dev->dev, "FEC Reset timeout!\n"); | |
617 | ||
618 | /* set pause to 0x20 frames */ | |
619 | out_be32(&fec->op_pause, FEC_OP_PAUSE_OPCODE | 0x20); | |
620 | ||
621 | /* high service request will be deasserted when there's < 7 bytes in fifo | |
622 | * low service request will be deasserted when there's < 4*7 bytes in fifo | |
623 | */ | |
624 | out_be32(&fec->rfifo_cntrl, FEC_FIFO_CNTRL_FRAME | FEC_FIFO_CNTRL_LTG_7); | |
625 | out_be32(&fec->tfifo_cntrl, FEC_FIFO_CNTRL_FRAME | FEC_FIFO_CNTRL_LTG_7); | |
626 | ||
627 | /* alarm when <= x bytes in FIFO */ | |
628 | out_be32(&fec->rfifo_alarm, 0x0000030c); | |
629 | out_be32(&fec->tfifo_alarm, 0x00000100); | |
630 | ||
631 | /* begin transmittion when 256 bytes are in FIFO (or EOF or FIFO full) */ | |
632 | out_be32(&fec->x_wmrk, FEC_FIFO_WMRK_256B); | |
633 | ||
634 | /* enable crc generation */ | |
635 | out_be32(&fec->xmit_fsm, FEC_XMIT_FSM_APPEND_CRC | FEC_XMIT_FSM_ENABLE_CRC); | |
636 | out_be32(&fec->iaddr1, 0x00000000); /* No individual filter */ | |
637 | out_be32(&fec->iaddr2, 0x00000000); /* No individual filter */ | |
638 | ||
639 | /* set phy speed. | |
640 | * this can't be done in phy driver, since it needs to be called | |
641 | * before fec stuff (even on resume) */ | |
ca816d98 | 642 | out_be32(&fec->mii_speed, priv->mdio_speed); |
5d031e9e DP |
643 | } |
644 | ||
645 | /** | |
646 | * mpc52xx_fec_start | |
647 | * @dev: network device | |
648 | * | |
649 | * This function is called to start or restart the FEC during a link | |
650 | * change. This happens on fifo errors or when switching between half | |
651 | * and full duplex. | |
652 | */ | |
653 | static void mpc52xx_fec_start(struct net_device *dev) | |
654 | { | |
655 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
656 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
657 | u32 rcntrl; | |
658 | u32 tcntrl; | |
659 | u32 tmp; | |
660 | ||
661 | /* clear sticky error bits */ | |
662 | tmp = FEC_FIFO_STATUS_ERR | FEC_FIFO_STATUS_UF | FEC_FIFO_STATUS_OF; | |
663 | out_be32(&fec->rfifo_status, in_be32(&fec->rfifo_status) & tmp); | |
664 | out_be32(&fec->tfifo_status, in_be32(&fec->tfifo_status) & tmp); | |
665 | ||
666 | /* FIFOs will reset on mpc52xx_fec_enable */ | |
667 | out_be32(&fec->reset_cntrl, FEC_RESET_CNTRL_ENABLE_IS_RESET); | |
668 | ||
669 | /* Set station address. */ | |
670 | mpc52xx_fec_set_paddr(dev, dev->dev_addr); | |
671 | ||
672 | mpc52xx_fec_set_multicast_list(dev); | |
673 | ||
674 | /* set max frame len, enable flow control, select mii mode */ | |
675 | rcntrl = FEC_RX_BUFFER_SIZE << 16; /* max frame length */ | |
676 | rcntrl |= FEC_RCNTRL_FCE; | |
677 | ||
ca816d98 | 678 | if (!priv->seven_wire_mode) |
5d031e9e DP |
679 | rcntrl |= FEC_RCNTRL_MII_MODE; |
680 | ||
681 | if (priv->duplex == DUPLEX_FULL) | |
682 | tcntrl = FEC_TCNTRL_FDEN; /* FD enable */ | |
683 | else { | |
684 | rcntrl |= FEC_RCNTRL_DRT; /* disable Rx on Tx (HD) */ | |
685 | tcntrl = 0; | |
686 | } | |
687 | out_be32(&fec->r_cntrl, rcntrl); | |
688 | out_be32(&fec->x_cntrl, tcntrl); | |
689 | ||
690 | /* Clear any outstanding interrupt. */ | |
691 | out_be32(&fec->ievent, 0xffffffff); | |
692 | ||
693 | /* Enable interrupts we wish to service. */ | |
694 | out_be32(&fec->imask, FEC_IMASK_ENABLE); | |
695 | ||
696 | /* And last, enable the transmit and receive processing. */ | |
697 | out_be32(&fec->ecntrl, FEC_ECNTRL_ETHER_EN); | |
698 | out_be32(&fec->r_des_active, 0x01000000); | |
699 | } | |
700 | ||
701 | /** | |
702 | * mpc52xx_fec_stop | |
703 | * @dev: network device | |
704 | * | |
705 | * stop all activity on fec and empty dma buffers | |
706 | */ | |
707 | static void mpc52xx_fec_stop(struct net_device *dev) | |
708 | { | |
709 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
710 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
711 | unsigned long timeout; | |
712 | ||
713 | /* disable all interrupts */ | |
714 | out_be32(&fec->imask, 0); | |
715 | ||
716 | /* Disable the rx task. */ | |
717 | bcom_disable(priv->rx_dmatsk); | |
718 | ||
719 | /* Wait for tx queue to drain, but only if we're in process context */ | |
720 | if (!in_interrupt()) { | |
721 | timeout = jiffies + msecs_to_jiffies(2000); | |
722 | while (time_before(jiffies, timeout) && | |
723 | !bcom_queue_empty(priv->tx_dmatsk)) | |
724 | msleep(100); | |
725 | ||
726 | if (time_after_eq(jiffies, timeout)) | |
727 | dev_err(&dev->dev, "queues didn't drain\n"); | |
728 | #if 1 | |
729 | if (time_after_eq(jiffies, timeout)) { | |
730 | dev_err(&dev->dev, " tx: index: %i, outdex: %i\n", | |
731 | priv->tx_dmatsk->index, | |
732 | priv->tx_dmatsk->outdex); | |
733 | dev_err(&dev->dev, " rx: index: %i, outdex: %i\n", | |
734 | priv->rx_dmatsk->index, | |
735 | priv->rx_dmatsk->outdex); | |
736 | } | |
737 | #endif | |
738 | } | |
739 | ||
740 | bcom_disable(priv->tx_dmatsk); | |
741 | ||
742 | /* Stop FEC */ | |
743 | out_be32(&fec->ecntrl, in_be32(&fec->ecntrl) & ~FEC_ECNTRL_ETHER_EN); | |
5d031e9e DP |
744 | } |
745 | ||
746 | /* reset fec and bestcomm tasks */ | |
747 | static void mpc52xx_fec_reset(struct net_device *dev) | |
748 | { | |
749 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
750 | struct mpc52xx_fec __iomem *fec = priv->fec; | |
751 | ||
752 | mpc52xx_fec_stop(dev); | |
753 | ||
754 | out_be32(&fec->rfifo_status, in_be32(&fec->rfifo_status)); | |
755 | out_be32(&fec->reset_cntrl, FEC_RESET_CNTRL_RESET_FIFO); | |
756 | ||
757 | mpc52xx_fec_free_rx_buffers(dev, priv->rx_dmatsk); | |
758 | ||
759 | mpc52xx_fec_hw_init(dev); | |
760 | ||
5d031e9e DP |
761 | bcom_fec_rx_reset(priv->rx_dmatsk); |
762 | bcom_fec_tx_reset(priv->tx_dmatsk); | |
763 | ||
764 | mpc52xx_fec_alloc_rx_buffers(dev, priv->rx_dmatsk); | |
765 | ||
766 | bcom_enable(priv->rx_dmatsk); | |
767 | bcom_enable(priv->tx_dmatsk); | |
768 | ||
769 | mpc52xx_fec_start(dev); | |
1e4e0767 AL |
770 | |
771 | netif_wake_queue(dev); | |
5d031e9e DP |
772 | } |
773 | ||
774 | ||
775 | /* ethtool interface */ | |
776 | static void mpc52xx_fec_get_drvinfo(struct net_device *dev, | |
777 | struct ethtool_drvinfo *info) | |
778 | { | |
779 | strcpy(info->driver, DRIVER_NAME); | |
780 | } | |
781 | ||
782 | static int mpc52xx_fec_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
783 | { | |
784 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
9404c82b GL |
785 | |
786 | if (!priv->phydev) | |
787 | return -ENODEV; | |
788 | ||
5d031e9e DP |
789 | return phy_ethtool_gset(priv->phydev, cmd); |
790 | } | |
791 | ||
792 | static int mpc52xx_fec_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
793 | { | |
794 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
9404c82b GL |
795 | |
796 | if (!priv->phydev) | |
797 | return -ENODEV; | |
798 | ||
5d031e9e DP |
799 | return phy_ethtool_sset(priv->phydev, cmd); |
800 | } | |
801 | ||
802 | static u32 mpc52xx_fec_get_msglevel(struct net_device *dev) | |
803 | { | |
804 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
805 | return priv->msg_enable; | |
806 | } | |
807 | ||
808 | static void mpc52xx_fec_set_msglevel(struct net_device *dev, u32 level) | |
809 | { | |
810 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
811 | priv->msg_enable = level; | |
812 | } | |
813 | ||
814 | static const struct ethtool_ops mpc52xx_fec_ethtool_ops = { | |
815 | .get_drvinfo = mpc52xx_fec_get_drvinfo, | |
816 | .get_settings = mpc52xx_fec_get_settings, | |
817 | .set_settings = mpc52xx_fec_set_settings, | |
818 | .get_link = ethtool_op_get_link, | |
819 | .get_msglevel = mpc52xx_fec_get_msglevel, | |
820 | .set_msglevel = mpc52xx_fec_set_msglevel, | |
821 | }; | |
822 | ||
823 | ||
824 | static int mpc52xx_fec_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |
825 | { | |
826 | struct mpc52xx_fec_priv *priv = netdev_priv(dev); | |
827 | ||
9404c82b GL |
828 | if (!priv->phydev) |
829 | return -ENOTSUPP; | |
830 | ||
831 | return phy_mii_ioctl(priv->phydev, if_mii(rq), cmd); | |
5d031e9e DP |
832 | } |
833 | ||
d360009c HS |
834 | static const struct net_device_ops mpc52xx_fec_netdev_ops = { |
835 | .ndo_open = mpc52xx_fec_open, | |
836 | .ndo_stop = mpc52xx_fec_close, | |
837 | .ndo_start_xmit = mpc52xx_fec_start_xmit, | |
838 | .ndo_set_multicast_list = mpc52xx_fec_set_multicast_list, | |
839 | .ndo_set_mac_address = mpc52xx_fec_set_mac_address, | |
840 | .ndo_validate_addr = eth_validate_addr, | |
841 | .ndo_do_ioctl = mpc52xx_fec_ioctl, | |
842 | .ndo_change_mtu = eth_change_mtu, | |
843 | .ndo_tx_timeout = mpc52xx_fec_tx_timeout, | |
844 | .ndo_get_stats = mpc52xx_fec_get_stats, | |
845 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
846 | .ndo_poll_controller = mpc52xx_fec_poll_controller, | |
847 | #endif | |
848 | }; | |
849 | ||
5d031e9e DP |
850 | /* ======================================================================== */ |
851 | /* OF Driver */ | |
852 | /* ======================================================================== */ | |
853 | ||
854 | static int __devinit | |
855 | mpc52xx_fec_probe(struct of_device *op, const struct of_device_id *match) | |
856 | { | |
857 | int rv; | |
858 | struct net_device *ndev; | |
859 | struct mpc52xx_fec_priv *priv = NULL; | |
860 | struct resource mem; | |
80791be1 GL |
861 | const u32 *prop; |
862 | int prop_size; | |
5d031e9e DP |
863 | |
864 | phys_addr_t rx_fifo; | |
865 | phys_addr_t tx_fifo; | |
866 | ||
867 | /* Get the ether ndev & it's private zone */ | |
868 | ndev = alloc_etherdev(sizeof(struct mpc52xx_fec_priv)); | |
869 | if (!ndev) | |
870 | return -ENOMEM; | |
871 | ||
872 | priv = netdev_priv(ndev); | |
ca816d98 | 873 | priv->ndev = ndev; |
5d031e9e DP |
874 | |
875 | /* Reserve FEC control zone */ | |
876 | rv = of_address_to_resource(op->node, 0, &mem); | |
877 | if (rv) { | |
878 | printk(KERN_ERR DRIVER_NAME ": " | |
879 | "Error while parsing device node resource\n" ); | |
880 | return rv; | |
881 | } | |
48d58459 | 882 | if ((mem.end - mem.start + 1) < sizeof(struct mpc52xx_fec)) { |
5d031e9e | 883 | printk(KERN_ERR DRIVER_NAME |
48d58459 | 884 | " - invalid resource size (%lx < %x), check mpc52xx_devices.c\n", |
5d031e9e DP |
885 | (unsigned long)(mem.end - mem.start + 1), sizeof(struct mpc52xx_fec)); |
886 | return -EINVAL; | |
887 | } | |
888 | ||
889 | if (!request_mem_region(mem.start, sizeof(struct mpc52xx_fec), DRIVER_NAME)) | |
890 | return -EBUSY; | |
891 | ||
892 | /* Init ether ndev with what we have */ | |
d360009c | 893 | ndev->netdev_ops = &mpc52xx_fec_netdev_ops; |
5d031e9e | 894 | ndev->ethtool_ops = &mpc52xx_fec_ethtool_ops; |
5d031e9e DP |
895 | ndev->watchdog_timeo = FEC_WATCHDOG_TIMEOUT; |
896 | ndev->base_addr = mem.start; | |
ca816d98 | 897 | SET_NETDEV_DEV(ndev, &op->dev); |
5d031e9e DP |
898 | |
899 | spin_lock_init(&priv->lock); | |
900 | ||
901 | /* ioremap the zones */ | |
902 | priv->fec = ioremap(mem.start, sizeof(struct mpc52xx_fec)); | |
903 | ||
904 | if (!priv->fec) { | |
905 | rv = -ENOMEM; | |
906 | goto probe_error; | |
907 | } | |
908 | ||
909 | /* Bestcomm init */ | |
910 | rx_fifo = ndev->base_addr + offsetof(struct mpc52xx_fec, rfifo_data); | |
911 | tx_fifo = ndev->base_addr + offsetof(struct mpc52xx_fec, tfifo_data); | |
912 | ||
913 | priv->rx_dmatsk = bcom_fec_rx_init(FEC_RX_NUM_BD, rx_fifo, FEC_RX_BUFFER_SIZE); | |
914 | priv->tx_dmatsk = bcom_fec_tx_init(FEC_TX_NUM_BD, tx_fifo); | |
915 | ||
916 | if (!priv->rx_dmatsk || !priv->tx_dmatsk) { | |
917 | printk(KERN_ERR DRIVER_NAME ": Can not init SDMA tasks\n" ); | |
918 | rv = -ENOMEM; | |
919 | goto probe_error; | |
920 | } | |
921 | ||
922 | /* Get the IRQ we need one by one */ | |
923 | /* Control */ | |
924 | ndev->irq = irq_of_parse_and_map(op->node, 0); | |
925 | ||
926 | /* RX */ | |
927 | priv->r_irq = bcom_get_task_irq(priv->rx_dmatsk); | |
928 | ||
929 | /* TX */ | |
930 | priv->t_irq = bcom_get_task_irq(priv->tx_dmatsk); | |
931 | ||
932 | /* MAC address init */ | |
933 | if (!is_zero_ether_addr(mpc52xx_fec_mac_addr)) | |
934 | memcpy(ndev->dev_addr, mpc52xx_fec_mac_addr, 6); | |
935 | else | |
936 | mpc52xx_fec_get_paddr(ndev, ndev->dev_addr); | |
937 | ||
938 | priv->msg_enable = netif_msg_init(debug, MPC52xx_MESSAGES_DEFAULT); | |
5d031e9e | 939 | |
80791be1 GL |
940 | /* |
941 | * Link mode configuration | |
942 | */ | |
5d031e9e | 943 | |
80791be1 | 944 | /* Start with safe defaults for link connection */ |
80791be1 GL |
945 | priv->speed = 100; |
946 | priv->duplex = DUPLEX_HALF; | |
b71a107c | 947 | priv->mdio_speed = ((mpc5xxx_get_bus_frequency(op->node) >> 20) / 5) << 1; |
80791be1 GL |
948 | |
949 | /* The current speed preconfigures the speed of the MII link */ | |
950 | prop = of_get_property(op->node, "current-speed", &prop_size); | |
951 | if (prop && (prop_size >= sizeof(u32) * 2)) { | |
952 | priv->speed = prop[0]; | |
953 | priv->duplex = prop[1] ? DUPLEX_FULL : DUPLEX_HALF; | |
954 | } | |
5d031e9e | 955 | |
ca816d98 GL |
956 | /* If there is a phy handle, then get the PHY node */ |
957 | priv->phy_node = of_parse_phandle(op->node, "phy-handle", 0); | |
958 | ||
959 | /* the 7-wire property means don't use MII mode */ | |
960 | if (of_find_property(op->node, "fsl,7-wire-mode", NULL)) { | |
961 | priv->seven_wire_mode = 1; | |
962 | dev_info(&ndev->dev, "using 7-wire PHY mode\n"); | |
5d031e9e DP |
963 | } |
964 | ||
965 | /* Hardware init */ | |
966 | mpc52xx_fec_hw_init(ndev); | |
5d031e9e DP |
967 | mpc52xx_fec_reset_stats(ndev); |
968 | ||
5d031e9e DP |
969 | rv = register_netdev(ndev); |
970 | if (rv < 0) | |
971 | goto probe_error; | |
972 | ||
973 | /* We're done ! */ | |
974 | dev_set_drvdata(&op->dev, ndev); | |
975 | ||
976 | return 0; | |
977 | ||
978 | ||
979 | /* Error handling - free everything that might be allocated */ | |
980 | probe_error: | |
981 | ||
ca816d98 GL |
982 | if (priv->phy_node) |
983 | of_node_put(priv->phy_node); | |
984 | priv->phy_node = NULL; | |
985 | ||
5d031e9e DP |
986 | irq_dispose_mapping(ndev->irq); |
987 | ||
988 | if (priv->rx_dmatsk) | |
989 | bcom_fec_rx_release(priv->rx_dmatsk); | |
990 | if (priv->tx_dmatsk) | |
991 | bcom_fec_tx_release(priv->tx_dmatsk); | |
992 | ||
993 | if (priv->fec) | |
994 | iounmap(priv->fec); | |
995 | ||
996 | release_mem_region(mem.start, sizeof(struct mpc52xx_fec)); | |
997 | ||
998 | free_netdev(ndev); | |
999 | ||
1000 | return rv; | |
1001 | } | |
1002 | ||
1003 | static int | |
1004 | mpc52xx_fec_remove(struct of_device *op) | |
1005 | { | |
1006 | struct net_device *ndev; | |
1007 | struct mpc52xx_fec_priv *priv; | |
1008 | ||
1009 | ndev = dev_get_drvdata(&op->dev); | |
1010 | priv = netdev_priv(ndev); | |
1011 | ||
1012 | unregister_netdev(ndev); | |
1013 | ||
ca816d98 GL |
1014 | if (priv->phy_node) |
1015 | of_node_put(priv->phy_node); | |
1016 | priv->phy_node = NULL; | |
1017 | ||
5d031e9e DP |
1018 | irq_dispose_mapping(ndev->irq); |
1019 | ||
1020 | bcom_fec_rx_release(priv->rx_dmatsk); | |
1021 | bcom_fec_tx_release(priv->tx_dmatsk); | |
1022 | ||
1023 | iounmap(priv->fec); | |
1024 | ||
1025 | release_mem_region(ndev->base_addr, sizeof(struct mpc52xx_fec)); | |
1026 | ||
1027 | free_netdev(ndev); | |
1028 | ||
1029 | dev_set_drvdata(&op->dev, NULL); | |
1030 | return 0; | |
1031 | } | |
1032 | ||
1033 | #ifdef CONFIG_PM | |
1034 | static int mpc52xx_fec_of_suspend(struct of_device *op, pm_message_t state) | |
1035 | { | |
1036 | struct net_device *dev = dev_get_drvdata(&op->dev); | |
1037 | ||
1038 | if (netif_running(dev)) | |
1039 | mpc52xx_fec_close(dev); | |
1040 | ||
1041 | return 0; | |
1042 | } | |
1043 | ||
1044 | static int mpc52xx_fec_of_resume(struct of_device *op) | |
1045 | { | |
1046 | struct net_device *dev = dev_get_drvdata(&op->dev); | |
1047 | ||
1048 | mpc52xx_fec_hw_init(dev); | |
1049 | mpc52xx_fec_reset_stats(dev); | |
1050 | ||
1051 | if (netif_running(dev)) | |
1052 | mpc52xx_fec_open(dev); | |
1053 | ||
1054 | return 0; | |
1055 | } | |
1056 | #endif | |
1057 | ||
1058 | static struct of_device_id mpc52xx_fec_match[] = { | |
3b5ebf8e GL |
1059 | { .compatible = "fsl,mpc5200b-fec", }, |
1060 | { .compatible = "fsl,mpc5200-fec", }, | |
1061 | { .compatible = "mpc5200-fec", }, | |
5d031e9e DP |
1062 | { } |
1063 | }; | |
1064 | ||
1065 | MODULE_DEVICE_TABLE(of, mpc52xx_fec_match); | |
1066 | ||
1067 | static struct of_platform_driver mpc52xx_fec_driver = { | |
1068 | .owner = THIS_MODULE, | |
1069 | .name = DRIVER_NAME, | |
1070 | .match_table = mpc52xx_fec_match, | |
1071 | .probe = mpc52xx_fec_probe, | |
1072 | .remove = mpc52xx_fec_remove, | |
1073 | #ifdef CONFIG_PM | |
1074 | .suspend = mpc52xx_fec_of_suspend, | |
1075 | .resume = mpc52xx_fec_of_resume, | |
1076 | #endif | |
1077 | }; | |
1078 | ||
1079 | ||
1080 | /* ======================================================================== */ | |
1081 | /* Module */ | |
1082 | /* ======================================================================== */ | |
1083 | ||
1084 | static int __init | |
1085 | mpc52xx_fec_init(void) | |
1086 | { | |
1087 | #ifdef CONFIG_FEC_MPC52xx_MDIO | |
1088 | int ret; | |
1089 | ret = of_register_platform_driver(&mpc52xx_fec_mdio_driver); | |
1090 | if (ret) { | |
1091 | printk(KERN_ERR DRIVER_NAME ": failed to register mdio driver\n"); | |
1092 | return ret; | |
1093 | } | |
1094 | #endif | |
1095 | return of_register_platform_driver(&mpc52xx_fec_driver); | |
1096 | } | |
1097 | ||
1098 | static void __exit | |
1099 | mpc52xx_fec_exit(void) | |
1100 | { | |
1101 | of_unregister_platform_driver(&mpc52xx_fec_driver); | |
1102 | #ifdef CONFIG_FEC_MPC52xx_MDIO | |
1103 | of_unregister_platform_driver(&mpc52xx_fec_mdio_driver); | |
1104 | #endif | |
1105 | } | |
1106 | ||
1107 | ||
1108 | module_init(mpc52xx_fec_init); | |
1109 | module_exit(mpc52xx_fec_exit); | |
1110 | ||
1111 | MODULE_LICENSE("GPL"); | |
1112 | MODULE_AUTHOR("Dale Farnsworth"); | |
1113 | MODULE_DESCRIPTION("Ethernet driver for the Freescale MPC52xx FEC"); |