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48257c4f PA |
1 | #ifndef FS_ENET_H |
2 | #define FS_ENET_H | |
3 | ||
4 | #include <linux/mii.h> | |
5 | #include <linux/netdevice.h> | |
6 | #include <linux/types.h> | |
48257c4f | 7 | #include <linux/list.h> |
5b4b8454 | 8 | #include <linux/phy.h> |
d6bd3a39 | 9 | #include <linux/dma-mapping.h> |
48257c4f PA |
10 | |
11 | #include <linux/fs_enet_pd.h> | |
5427828e | 12 | #include <asm/fs_pd.h> |
48257c4f | 13 | |
48257c4f PA |
14 | #ifdef CONFIG_CPM1 |
15 | #include <asm/commproc.h> | |
5b4b8454 VB |
16 | |
17 | struct fec_info { | |
18 | fec_t* fecp; | |
19 | u32 mii_speed; | |
20 | }; | |
48257c4f PA |
21 | #endif |
22 | ||
23 | #ifdef CONFIG_CPM2 | |
24 | #include <asm/cpm2.h> | |
25 | #endif | |
26 | ||
5b4b8454 VB |
27 | /* This is used to operate with pins. |
28 | Note that the actual port size may | |
29 | be different; cpm(s) handle it OK */ | |
30 | struct bb_info { | |
31 | u8 mdio_dat_msk; | |
32 | u8 mdio_dir_msk; | |
33 | u8 *mdio_dir; | |
34 | u8 *mdio_dat; | |
35 | u8 mdc_msk; | |
36 | u8 *mdc_dat; | |
37 | int delay; | |
38 | }; | |
39 | ||
48257c4f PA |
40 | /* hw driver ops */ |
41 | struct fs_ops { | |
42 | int (*setup_data)(struct net_device *dev); | |
43 | int (*allocate_bd)(struct net_device *dev); | |
44 | void (*free_bd)(struct net_device *dev); | |
45 | void (*cleanup_data)(struct net_device *dev); | |
46 | void (*set_multicast_list)(struct net_device *dev); | |
5b4b8454 | 47 | void (*adjust_link)(struct net_device *dev); |
48257c4f PA |
48 | void (*restart)(struct net_device *dev); |
49 | void (*stop)(struct net_device *dev); | |
50 | void (*pre_request_irq)(struct net_device *dev, int irq); | |
51 | void (*post_free_irq)(struct net_device *dev, int irq); | |
52 | void (*napi_clear_rx_event)(struct net_device *dev); | |
53 | void (*napi_enable_rx)(struct net_device *dev); | |
54 | void (*napi_disable_rx)(struct net_device *dev); | |
55 | void (*rx_bd_done)(struct net_device *dev); | |
56 | void (*tx_kickstart)(struct net_device *dev); | |
57 | u32 (*get_int_events)(struct net_device *dev); | |
58 | void (*clear_int_events)(struct net_device *dev, u32 int_events); | |
59 | void (*ev_error)(struct net_device *dev, u32 int_events); | |
60 | int (*get_regs)(struct net_device *dev, void *p, int *sizep); | |
61 | int (*get_regs_len)(struct net_device *dev); | |
62 | void (*tx_restart)(struct net_device *dev); | |
63 | }; | |
64 | ||
65 | struct phy_info { | |
66 | unsigned int id; | |
67 | const char *name; | |
68 | void (*startup) (struct net_device * dev); | |
69 | void (*shutdown) (struct net_device * dev); | |
70 | void (*ack_int) (struct net_device * dev); | |
71 | }; | |
72 | ||
73 | /* The FEC stores dest/src/type, data, and checksum for receive packets. | |
74 | */ | |
75 | #define MAX_MTU 1508 /* Allow fullsized pppoe packets over VLAN */ | |
76 | #define MIN_MTU 46 /* this is data size */ | |
77 | #define CRC_LEN 4 | |
78 | ||
79 | #define PKT_MAXBUF_SIZE (MAX_MTU+ETH_HLEN+CRC_LEN) | |
80 | #define PKT_MINBUF_SIZE (MIN_MTU+ETH_HLEN+CRC_LEN) | |
81 | ||
82 | /* Must be a multiple of 32 (to cover both FEC & FCC) */ | |
83 | #define PKT_MAXBLR_SIZE ((PKT_MAXBUF_SIZE + 31) & ~31) | |
84 | /* This is needed so that invalidate_xxx wont invalidate too much */ | |
85 | #define ENET_RX_FRSIZE L1_CACHE_ALIGN(PKT_MAXBUF_SIZE) | |
86 | ||
87 | struct fs_enet_mii_bus { | |
88 | struct list_head list; | |
89 | spinlock_t mii_lock; | |
90 | const struct fs_mii_bus_info *bus_info; | |
91 | int refs; | |
92 | u32 usage_map; | |
93 | ||
94 | int (*mii_read)(struct fs_enet_mii_bus *bus, | |
95 | int phy_id, int location); | |
96 | ||
97 | void (*mii_write)(struct fs_enet_mii_bus *bus, | |
98 | int phy_id, int location, int value); | |
99 | ||
100 | union { | |
101 | struct { | |
102 | unsigned int mii_speed; | |
103 | void *fecp; | |
104 | } fec; | |
105 | ||
106 | struct { | |
107 | /* note that the actual port size may */ | |
108 | /* be different; cpm(s) handle it OK */ | |
109 | u8 mdio_msk; | |
110 | u8 *mdio_dir; | |
111 | u8 *mdio_dat; | |
112 | u8 mdc_msk; | |
113 | u8 *mdc_dir; | |
114 | u8 *mdc_dat; | |
115 | } bitbang; | |
116 | ||
117 | struct { | |
118 | u16 lpa; | |
119 | } fixed; | |
120 | }; | |
121 | }; | |
122 | ||
48257c4f | 123 | struct fs_enet_private { |
bea3348e | 124 | struct napi_struct napi; |
48257c4f PA |
125 | struct device *dev; /* pointer back to the device (must be initialized first) */ |
126 | spinlock_t lock; /* during all ops except TX pckt processing */ | |
127 | spinlock_t tx_lock; /* during fs_start_xmit and fs_tx */ | |
128 | const struct fs_platform_info *fpi; | |
129 | const struct fs_ops *ops; | |
130 | int rx_ring, tx_ring; | |
131 | dma_addr_t ring_mem_addr; | |
132 | void *ring_base; | |
133 | struct sk_buff **rx_skbuff; | |
134 | struct sk_buff **tx_skbuff; | |
135 | cbd_t *rx_bd_base; /* Address of Rx and Tx buffers. */ | |
136 | cbd_t *tx_bd_base; | |
137 | cbd_t *dirty_tx; /* ring entries to be free()ed. */ | |
138 | cbd_t *cur_rx; | |
139 | cbd_t *cur_tx; | |
140 | int tx_free; | |
141 | struct net_device_stats stats; | |
142 | struct timer_list phy_timer_list; | |
143 | const struct phy_info *phy; | |
144 | u32 msg_enable; | |
145 | struct mii_if_info mii_if; | |
146 | unsigned int last_mii_status; | |
147 | struct fs_enet_mii_bus *mii_bus; | |
148 | int interrupt; | |
149 | ||
5b4b8454 VB |
150 | struct phy_device *phydev; |
151 | int oldduplex, oldspeed, oldlink; /* current settings */ | |
48257c4f PA |
152 | |
153 | /* event masks */ | |
154 | u32 ev_napi_rx; /* mask of NAPI rx events */ | |
155 | u32 ev_rx; /* rx event mask */ | |
156 | u32 ev_tx; /* tx event mask */ | |
157 | u32 ev_err; /* error event mask */ | |
158 | ||
159 | u16 bd_rx_empty; /* mask of BD rx empty */ | |
160 | u16 bd_rx_err; /* mask of BD rx errors */ | |
161 | ||
162 | union { | |
163 | struct { | |
164 | int idx; /* FEC1 = 0, FEC2 = 1 */ | |
165 | void *fecp; /* hw registers */ | |
166 | u32 hthi, htlo; /* state for multicast */ | |
167 | } fec; | |
168 | ||
169 | struct { | |
170 | int idx; /* FCC1-3 = 0-2 */ | |
171 | void *fccp; /* hw registers */ | |
172 | void *ep; /* parameter ram */ | |
173 | void *fcccp; /* hw registers cont. */ | |
174 | void *mem; /* FCC DPRAM */ | |
175 | u32 gaddrh, gaddrl; /* group address */ | |
176 | } fcc; | |
177 | ||
178 | struct { | |
179 | int idx; /* FEC1 = 0, FEC2 = 1 */ | |
180 | void *sccp; /* hw registers */ | |
181 | void *ep; /* parameter ram */ | |
182 | u32 hthi, htlo; /* state for multicast */ | |
183 | } scc; | |
184 | ||
185 | }; | |
186 | }; | |
187 | ||
188 | /***************************************************************************/ | |
5b4b8454 VB |
189 | int fs_enet_mdio_bb_init(void); |
190 | int fs_mii_fixed_init(struct fs_enet_mii_bus *bus); | |
191 | int fs_enet_mdio_fec_init(void); | |
48257c4f PA |
192 | |
193 | void fs_init_bds(struct net_device *dev); | |
194 | void fs_cleanup_bds(struct net_device *dev); | |
195 | ||
196 | /***************************************************************************/ | |
197 | ||
198 | #define DRV_MODULE_NAME "fs_enet" | |
199 | #define PFX DRV_MODULE_NAME ": " | |
200 | #define DRV_MODULE_VERSION "1.0" | |
201 | #define DRV_MODULE_RELDATE "Aug 8, 2005" | |
202 | ||
203 | /***************************************************************************/ | |
204 | ||
205 | int fs_enet_platform_init(void); | |
206 | void fs_enet_platform_cleanup(void); | |
207 | ||
208 | /***************************************************************************/ | |
48257c4f PA |
209 | /* buffer descriptor access macros */ |
210 | ||
211 | /* access macros */ | |
212 | #if defined(CONFIG_CPM1) | |
213 | /* for a a CPM1 __raw_xxx's are sufficient */ | |
214 | #define __cbd_out32(addr, x) __raw_writel(x, addr) | |
215 | #define __cbd_out16(addr, x) __raw_writew(x, addr) | |
216 | #define __cbd_in32(addr) __raw_readl(addr) | |
217 | #define __cbd_in16(addr) __raw_readw(addr) | |
218 | #else | |
219 | /* for others play it safe */ | |
220 | #define __cbd_out32(addr, x) out_be32(addr, x) | |
221 | #define __cbd_out16(addr, x) out_be16(addr, x) | |
222 | #define __cbd_in32(addr) in_be32(addr) | |
223 | #define __cbd_in16(addr) in_be16(addr) | |
224 | #endif | |
225 | ||
226 | /* write */ | |
227 | #define CBDW_SC(_cbd, _sc) __cbd_out16(&(_cbd)->cbd_sc, (_sc)) | |
228 | #define CBDW_DATLEN(_cbd, _datlen) __cbd_out16(&(_cbd)->cbd_datlen, (_datlen)) | |
229 | #define CBDW_BUFADDR(_cbd, _bufaddr) __cbd_out32(&(_cbd)->cbd_bufaddr, (_bufaddr)) | |
230 | ||
231 | /* read */ | |
232 | #define CBDR_SC(_cbd) __cbd_in16(&(_cbd)->cbd_sc) | |
233 | #define CBDR_DATLEN(_cbd) __cbd_in16(&(_cbd)->cbd_datlen) | |
234 | #define CBDR_BUFADDR(_cbd) __cbd_in32(&(_cbd)->cbd_bufaddr) | |
235 | ||
236 | /* set bits */ | |
237 | #define CBDS_SC(_cbd, _sc) CBDW_SC(_cbd, CBDR_SC(_cbd) | (_sc)) | |
238 | ||
239 | /* clear bits */ | |
240 | #define CBDC_SC(_cbd, _sc) CBDW_SC(_cbd, CBDR_SC(_cbd) & ~(_sc)) | |
241 | ||
242 | /*******************************************************************/ | |
243 | ||
244 | extern const struct fs_ops fs_fec_ops; | |
245 | extern const struct fs_ops fs_fcc_ops; | |
246 | extern const struct fs_ops fs_scc_ops; | |
247 | ||
248 | /*******************************************************************/ | |
249 | ||
250 | /* handy pointer to the immap */ | |
251 | extern void *fs_enet_immap; | |
252 | ||
253 | /*******************************************************************/ | |
254 | ||
255 | #endif |