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1 | /******************************************************************************* |
2 | ||
3 | Intel(R) Gigabit Ethernet Linux driver | |
4 | Copyright(c) 2007 Intel Corporation. | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify it | |
7 | under the terms and conditions of the GNU General Public License, | |
8 | version 2, as published by the Free Software Foundation. | |
9 | ||
10 | This program is distributed in the hope it will be useful, but WITHOUT | |
11 | ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
12 | FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
13 | more details. | |
14 | ||
15 | You should have received a copy of the GNU General Public License along with | |
16 | this program; if not, write to the Free Software Foundation, Inc., | |
17 | 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
18 | ||
19 | The full GNU General Public License is included in this distribution in | |
20 | the file called "COPYING". | |
21 | ||
22 | Contact Information: | |
23 | e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
24 | Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
25 | ||
26 | *******************************************************************************/ | |
27 | ||
28 | #include <linux/module.h> | |
29 | #include <linux/types.h> | |
30 | #include <linux/init.h> | |
31 | #include <linux/vmalloc.h> | |
32 | #include <linux/pagemap.h> | |
33 | #include <linux/netdevice.h> | |
9d5c8243 AK |
34 | #include <linux/ipv6.h> |
35 | #include <net/checksum.h> | |
36 | #include <net/ip6_checksum.h> | |
37 | #include <linux/mii.h> | |
38 | #include <linux/ethtool.h> | |
39 | #include <linux/if_vlan.h> | |
40 | #include <linux/pci.h> | |
41 | #include <linux/delay.h> | |
42 | #include <linux/interrupt.h> | |
43 | #include <linux/if_ether.h> | |
44 | ||
45 | #include "igb.h" | |
46 | ||
47 | #define DRV_VERSION "1.0.8-k2" | |
48 | char igb_driver_name[] = "igb"; | |
49 | char igb_driver_version[] = DRV_VERSION; | |
50 | static const char igb_driver_string[] = | |
51 | "Intel(R) Gigabit Ethernet Network Driver"; | |
52 | static const char igb_copyright[] = "Copyright (c) 2007 Intel Corporation."; | |
53 | ||
54 | ||
55 | static const struct e1000_info *igb_info_tbl[] = { | |
56 | [board_82575] = &e1000_82575_info, | |
57 | }; | |
58 | ||
59 | static struct pci_device_id igb_pci_tbl[] = { | |
60 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER), board_82575 }, | |
61 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES), board_82575 }, | |
62 | { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER), board_82575 }, | |
63 | /* required last entry */ | |
64 | {0, } | |
65 | }; | |
66 | ||
67 | MODULE_DEVICE_TABLE(pci, igb_pci_tbl); | |
68 | ||
69 | void igb_reset(struct igb_adapter *); | |
70 | static int igb_setup_all_tx_resources(struct igb_adapter *); | |
71 | static int igb_setup_all_rx_resources(struct igb_adapter *); | |
72 | static void igb_free_all_tx_resources(struct igb_adapter *); | |
73 | static void igb_free_all_rx_resources(struct igb_adapter *); | |
74 | static void igb_free_tx_resources(struct igb_adapter *, struct igb_ring *); | |
75 | static void igb_free_rx_resources(struct igb_adapter *, struct igb_ring *); | |
76 | void igb_update_stats(struct igb_adapter *); | |
77 | static int igb_probe(struct pci_dev *, const struct pci_device_id *); | |
78 | static void __devexit igb_remove(struct pci_dev *pdev); | |
79 | static int igb_sw_init(struct igb_adapter *); | |
80 | static int igb_open(struct net_device *); | |
81 | static int igb_close(struct net_device *); | |
82 | static void igb_configure_tx(struct igb_adapter *); | |
83 | static void igb_configure_rx(struct igb_adapter *); | |
84 | static void igb_setup_rctl(struct igb_adapter *); | |
85 | static void igb_clean_all_tx_rings(struct igb_adapter *); | |
86 | static void igb_clean_all_rx_rings(struct igb_adapter *); | |
87 | static void igb_clean_tx_ring(struct igb_adapter *, struct igb_ring *); | |
88 | static void igb_clean_rx_ring(struct igb_adapter *, struct igb_ring *); | |
89 | static void igb_set_multi(struct net_device *); | |
90 | static void igb_update_phy_info(unsigned long); | |
91 | static void igb_watchdog(unsigned long); | |
92 | static void igb_watchdog_task(struct work_struct *); | |
93 | static int igb_xmit_frame_ring_adv(struct sk_buff *, struct net_device *, | |
94 | struct igb_ring *); | |
95 | static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *); | |
96 | static struct net_device_stats *igb_get_stats(struct net_device *); | |
97 | static int igb_change_mtu(struct net_device *, int); | |
98 | static int igb_set_mac(struct net_device *, void *); | |
99 | static irqreturn_t igb_intr(int irq, void *); | |
100 | static irqreturn_t igb_intr_msi(int irq, void *); | |
101 | static irqreturn_t igb_msix_other(int irq, void *); | |
102 | static irqreturn_t igb_msix_rx(int irq, void *); | |
103 | static irqreturn_t igb_msix_tx(int irq, void *); | |
104 | static int igb_clean_rx_ring_msix(struct napi_struct *, int); | |
105 | static bool igb_clean_tx_irq(struct igb_adapter *, struct igb_ring *); | |
106 | static int igb_clean(struct napi_struct *, int); | |
107 | static bool igb_clean_rx_irq_adv(struct igb_adapter *, | |
108 | struct igb_ring *, int *, int); | |
109 | static void igb_alloc_rx_buffers_adv(struct igb_adapter *, | |
110 | struct igb_ring *, int); | |
111 | static int igb_ioctl(struct net_device *, struct ifreq *, int cmd); | |
112 | static void igb_tx_timeout(struct net_device *); | |
113 | static void igb_reset_task(struct work_struct *); | |
114 | static void igb_vlan_rx_register(struct net_device *, struct vlan_group *); | |
115 | static void igb_vlan_rx_add_vid(struct net_device *, u16); | |
116 | static void igb_vlan_rx_kill_vid(struct net_device *, u16); | |
117 | static void igb_restore_vlan(struct igb_adapter *); | |
118 | ||
119 | static int igb_suspend(struct pci_dev *, pm_message_t); | |
120 | #ifdef CONFIG_PM | |
121 | static int igb_resume(struct pci_dev *); | |
122 | #endif | |
123 | static void igb_shutdown(struct pci_dev *); | |
124 | ||
125 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
126 | /* for netdump / net console */ | |
127 | static void igb_netpoll(struct net_device *); | |
128 | #endif | |
129 | ||
130 | static pci_ers_result_t igb_io_error_detected(struct pci_dev *, | |
131 | pci_channel_state_t); | |
132 | static pci_ers_result_t igb_io_slot_reset(struct pci_dev *); | |
133 | static void igb_io_resume(struct pci_dev *); | |
134 | ||
135 | static struct pci_error_handlers igb_err_handler = { | |
136 | .error_detected = igb_io_error_detected, | |
137 | .slot_reset = igb_io_slot_reset, | |
138 | .resume = igb_io_resume, | |
139 | }; | |
140 | ||
141 | ||
142 | static struct pci_driver igb_driver = { | |
143 | .name = igb_driver_name, | |
144 | .id_table = igb_pci_tbl, | |
145 | .probe = igb_probe, | |
146 | .remove = __devexit_p(igb_remove), | |
147 | #ifdef CONFIG_PM | |
148 | /* Power Managment Hooks */ | |
149 | .suspend = igb_suspend, | |
150 | .resume = igb_resume, | |
151 | #endif | |
152 | .shutdown = igb_shutdown, | |
153 | .err_handler = &igb_err_handler | |
154 | }; | |
155 | ||
156 | MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>"); | |
157 | MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver"); | |
158 | MODULE_LICENSE("GPL"); | |
159 | MODULE_VERSION(DRV_VERSION); | |
160 | ||
161 | #ifdef DEBUG | |
162 | /** | |
163 | * igb_get_hw_dev_name - return device name string | |
164 | * used by hardware layer to print debugging information | |
165 | **/ | |
166 | char *igb_get_hw_dev_name(struct e1000_hw *hw) | |
167 | { | |
168 | struct igb_adapter *adapter = hw->back; | |
169 | return adapter->netdev->name; | |
170 | } | |
171 | #endif | |
172 | ||
173 | /** | |
174 | * igb_init_module - Driver Registration Routine | |
175 | * | |
176 | * igb_init_module is the first routine called when the driver is | |
177 | * loaded. All it does is register with the PCI subsystem. | |
178 | **/ | |
179 | static int __init igb_init_module(void) | |
180 | { | |
181 | int ret; | |
182 | printk(KERN_INFO "%s - version %s\n", | |
183 | igb_driver_string, igb_driver_version); | |
184 | ||
185 | printk(KERN_INFO "%s\n", igb_copyright); | |
186 | ||
187 | ret = pci_register_driver(&igb_driver); | |
188 | return ret; | |
189 | } | |
190 | ||
191 | module_init(igb_init_module); | |
192 | ||
193 | /** | |
194 | * igb_exit_module - Driver Exit Cleanup Routine | |
195 | * | |
196 | * igb_exit_module is called just before the driver is removed | |
197 | * from memory. | |
198 | **/ | |
199 | static void __exit igb_exit_module(void) | |
200 | { | |
201 | pci_unregister_driver(&igb_driver); | |
202 | } | |
203 | ||
204 | module_exit(igb_exit_module); | |
205 | ||
206 | /** | |
207 | * igb_alloc_queues - Allocate memory for all rings | |
208 | * @adapter: board private structure to initialize | |
209 | * | |
210 | * We allocate one ring per queue at run-time since we don't know the | |
211 | * number of queues at compile-time. | |
212 | **/ | |
213 | static int igb_alloc_queues(struct igb_adapter *adapter) | |
214 | { | |
215 | int i; | |
216 | ||
217 | adapter->tx_ring = kcalloc(adapter->num_tx_queues, | |
218 | sizeof(struct igb_ring), GFP_KERNEL); | |
219 | if (!adapter->tx_ring) | |
220 | return -ENOMEM; | |
221 | ||
222 | adapter->rx_ring = kcalloc(adapter->num_rx_queues, | |
223 | sizeof(struct igb_ring), GFP_KERNEL); | |
224 | if (!adapter->rx_ring) { | |
225 | kfree(adapter->tx_ring); | |
226 | return -ENOMEM; | |
227 | } | |
228 | ||
229 | for (i = 0; i < adapter->num_rx_queues; i++) { | |
230 | struct igb_ring *ring = &(adapter->rx_ring[i]); | |
231 | ring->adapter = adapter; | |
232 | ring->itr_register = E1000_ITR; | |
233 | ||
234 | if (!ring->napi.poll) | |
235 | netif_napi_add(adapter->netdev, &ring->napi, igb_clean, | |
236 | adapter->napi.weight / | |
237 | adapter->num_rx_queues); | |
238 | } | |
239 | return 0; | |
240 | } | |
241 | ||
242 | #define IGB_N0_QUEUE -1 | |
243 | static void igb_assign_vector(struct igb_adapter *adapter, int rx_queue, | |
244 | int tx_queue, int msix_vector) | |
245 | { | |
246 | u32 msixbm = 0; | |
247 | struct e1000_hw *hw = &adapter->hw; | |
248 | /* The 82575 assigns vectors using a bitmask, which matches the | |
249 | bitmask for the EICR/EIMS/EIMC registers. To assign one | |
250 | or more queues to a vector, we write the appropriate bits | |
251 | into the MSIXBM register for that vector. */ | |
252 | if (rx_queue > IGB_N0_QUEUE) { | |
253 | msixbm = E1000_EICR_RX_QUEUE0 << rx_queue; | |
254 | adapter->rx_ring[rx_queue].eims_value = msixbm; | |
255 | } | |
256 | if (tx_queue > IGB_N0_QUEUE) { | |
257 | msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue; | |
258 | adapter->tx_ring[tx_queue].eims_value = | |
259 | E1000_EICR_TX_QUEUE0 << tx_queue; | |
260 | } | |
261 | array_wr32(E1000_MSIXBM(0), msix_vector, msixbm); | |
262 | } | |
263 | ||
264 | /** | |
265 | * igb_configure_msix - Configure MSI-X hardware | |
266 | * | |
267 | * igb_configure_msix sets up the hardware to properly | |
268 | * generate MSI-X interrupts. | |
269 | **/ | |
270 | static void igb_configure_msix(struct igb_adapter *adapter) | |
271 | { | |
272 | u32 tmp; | |
273 | int i, vector = 0; | |
274 | struct e1000_hw *hw = &adapter->hw; | |
275 | ||
276 | adapter->eims_enable_mask = 0; | |
277 | ||
278 | for (i = 0; i < adapter->num_tx_queues; i++) { | |
279 | struct igb_ring *tx_ring = &adapter->tx_ring[i]; | |
280 | igb_assign_vector(adapter, IGB_N0_QUEUE, i, vector++); | |
281 | adapter->eims_enable_mask |= tx_ring->eims_value; | |
282 | if (tx_ring->itr_val) | |
283 | writel(1000000000 / (tx_ring->itr_val * 256), | |
284 | hw->hw_addr + tx_ring->itr_register); | |
285 | else | |
286 | writel(1, hw->hw_addr + tx_ring->itr_register); | |
287 | } | |
288 | ||
289 | for (i = 0; i < adapter->num_rx_queues; i++) { | |
290 | struct igb_ring *rx_ring = &adapter->rx_ring[i]; | |
291 | igb_assign_vector(adapter, i, IGB_N0_QUEUE, vector++); | |
292 | adapter->eims_enable_mask |= rx_ring->eims_value; | |
293 | if (rx_ring->itr_val) | |
294 | writel(1000000000 / (rx_ring->itr_val * 256), | |
295 | hw->hw_addr + rx_ring->itr_register); | |
296 | else | |
297 | writel(1, hw->hw_addr + rx_ring->itr_register); | |
298 | } | |
299 | ||
300 | ||
301 | /* set vector for other causes, i.e. link changes */ | |
302 | array_wr32(E1000_MSIXBM(0), vector++, | |
303 | E1000_EIMS_OTHER); | |
304 | ||
305 | /* disable IAM for ICR interrupt bits */ | |
306 | wr32(E1000_IAM, 0); | |
307 | ||
308 | tmp = rd32(E1000_CTRL_EXT); | |
309 | /* enable MSI-X PBA support*/ | |
310 | tmp |= E1000_CTRL_EXT_PBA_CLR; | |
311 | ||
312 | /* Auto-Mask interrupts upon ICR read. */ | |
313 | tmp |= E1000_CTRL_EXT_EIAME; | |
314 | tmp |= E1000_CTRL_EXT_IRCA; | |
315 | ||
316 | wr32(E1000_CTRL_EXT, tmp); | |
317 | adapter->eims_enable_mask |= E1000_EIMS_OTHER; | |
318 | ||
319 | wrfl(); | |
320 | } | |
321 | ||
322 | /** | |
323 | * igb_request_msix - Initialize MSI-X interrupts | |
324 | * | |
325 | * igb_request_msix allocates MSI-X vectors and requests interrupts from the | |
326 | * kernel. | |
327 | **/ | |
328 | static int igb_request_msix(struct igb_adapter *adapter) | |
329 | { | |
330 | struct net_device *netdev = adapter->netdev; | |
331 | int i, err = 0, vector = 0; | |
332 | ||
333 | vector = 0; | |
334 | ||
335 | for (i = 0; i < adapter->num_tx_queues; i++) { | |
336 | struct igb_ring *ring = &(adapter->tx_ring[i]); | |
337 | sprintf(ring->name, "%s-tx%d", netdev->name, i); | |
338 | err = request_irq(adapter->msix_entries[vector].vector, | |
339 | &igb_msix_tx, 0, ring->name, | |
340 | &(adapter->tx_ring[i])); | |
341 | if (err) | |
342 | goto out; | |
343 | ring->itr_register = E1000_EITR(0) + (vector << 2); | |
344 | ring->itr_val = adapter->itr; | |
345 | vector++; | |
346 | } | |
347 | for (i = 0; i < adapter->num_rx_queues; i++) { | |
348 | struct igb_ring *ring = &(adapter->rx_ring[i]); | |
349 | if (strlen(netdev->name) < (IFNAMSIZ - 5)) | |
350 | sprintf(ring->name, "%s-rx%d", netdev->name, i); | |
351 | else | |
352 | memcpy(ring->name, netdev->name, IFNAMSIZ); | |
353 | err = request_irq(adapter->msix_entries[vector].vector, | |
354 | &igb_msix_rx, 0, ring->name, | |
355 | &(adapter->rx_ring[i])); | |
356 | if (err) | |
357 | goto out; | |
358 | ring->itr_register = E1000_EITR(0) + (vector << 2); | |
359 | ring->itr_val = adapter->itr; | |
360 | vector++; | |
361 | } | |
362 | ||
363 | err = request_irq(adapter->msix_entries[vector].vector, | |
364 | &igb_msix_other, 0, netdev->name, netdev); | |
365 | if (err) | |
366 | goto out; | |
367 | ||
368 | adapter->napi.poll = igb_clean_rx_ring_msix; | |
369 | for (i = 0; i < adapter->num_rx_queues; i++) | |
370 | adapter->rx_ring[i].napi.poll = adapter->napi.poll; | |
371 | igb_configure_msix(adapter); | |
372 | return 0; | |
373 | out: | |
374 | return err; | |
375 | } | |
376 | ||
377 | static void igb_reset_interrupt_capability(struct igb_adapter *adapter) | |
378 | { | |
379 | if (adapter->msix_entries) { | |
380 | pci_disable_msix(adapter->pdev); | |
381 | kfree(adapter->msix_entries); | |
382 | adapter->msix_entries = NULL; | |
383 | } else if (adapter->msi_enabled) | |
384 | pci_disable_msi(adapter->pdev); | |
385 | return; | |
386 | } | |
387 | ||
388 | ||
389 | /** | |
390 | * igb_set_interrupt_capability - set MSI or MSI-X if supported | |
391 | * | |
392 | * Attempt to configure interrupts using the best available | |
393 | * capabilities of the hardware and kernel. | |
394 | **/ | |
395 | static void igb_set_interrupt_capability(struct igb_adapter *adapter) | |
396 | { | |
397 | int err; | |
398 | int numvecs, i; | |
399 | ||
400 | numvecs = adapter->num_tx_queues + adapter->num_rx_queues + 1; | |
401 | adapter->msix_entries = kcalloc(numvecs, sizeof(struct msix_entry), | |
402 | GFP_KERNEL); | |
403 | if (!adapter->msix_entries) | |
404 | goto msi_only; | |
405 | ||
406 | for (i = 0; i < numvecs; i++) | |
407 | adapter->msix_entries[i].entry = i; | |
408 | ||
409 | err = pci_enable_msix(adapter->pdev, | |
410 | adapter->msix_entries, | |
411 | numvecs); | |
412 | if (err == 0) | |
413 | return; | |
414 | ||
415 | igb_reset_interrupt_capability(adapter); | |
416 | ||
417 | /* If we can't do MSI-X, try MSI */ | |
418 | msi_only: | |
419 | adapter->num_rx_queues = 1; | |
420 | if (!pci_enable_msi(adapter->pdev)) | |
421 | adapter->msi_enabled = 1; | |
422 | return; | |
423 | } | |
424 | ||
425 | /** | |
426 | * igb_request_irq - initialize interrupts | |
427 | * | |
428 | * Attempts to configure interrupts using the best available | |
429 | * capabilities of the hardware and kernel. | |
430 | **/ | |
431 | static int igb_request_irq(struct igb_adapter *adapter) | |
432 | { | |
433 | struct net_device *netdev = adapter->netdev; | |
434 | struct e1000_hw *hw = &adapter->hw; | |
435 | int err = 0; | |
436 | ||
437 | if (adapter->msix_entries) { | |
438 | err = igb_request_msix(adapter); | |
439 | if (!err) { | |
9d5c8243 | 440 | /* enable IAM, auto-mask, |
6cb5e577 | 441 | * DO NOT USE EIAM or IAM in legacy mode */ |
9d5c8243 AK |
442 | wr32(E1000_IAM, IMS_ENABLE_MASK); |
443 | goto request_done; | |
444 | } | |
445 | /* fall back to MSI */ | |
446 | igb_reset_interrupt_capability(adapter); | |
447 | if (!pci_enable_msi(adapter->pdev)) | |
448 | adapter->msi_enabled = 1; | |
449 | igb_free_all_tx_resources(adapter); | |
450 | igb_free_all_rx_resources(adapter); | |
451 | adapter->num_rx_queues = 1; | |
452 | igb_alloc_queues(adapter); | |
453 | } | |
454 | if (adapter->msi_enabled) { | |
455 | err = request_irq(adapter->pdev->irq, &igb_intr_msi, 0, | |
456 | netdev->name, netdev); | |
457 | if (!err) | |
458 | goto request_done; | |
459 | /* fall back to legacy interrupts */ | |
460 | igb_reset_interrupt_capability(adapter); | |
461 | adapter->msi_enabled = 0; | |
462 | } | |
463 | ||
464 | err = request_irq(adapter->pdev->irq, &igb_intr, IRQF_SHARED, | |
465 | netdev->name, netdev); | |
466 | ||
6cb5e577 | 467 | if (err) |
9d5c8243 AK |
468 | dev_err(&adapter->pdev->dev, "Error %d getting interrupt\n", |
469 | err); | |
9d5c8243 AK |
470 | |
471 | request_done: | |
472 | return err; | |
473 | } | |
474 | ||
475 | static void igb_free_irq(struct igb_adapter *adapter) | |
476 | { | |
477 | struct net_device *netdev = adapter->netdev; | |
478 | ||
479 | if (adapter->msix_entries) { | |
480 | int vector = 0, i; | |
481 | ||
482 | for (i = 0; i < adapter->num_tx_queues; i++) | |
483 | free_irq(adapter->msix_entries[vector++].vector, | |
484 | &(adapter->tx_ring[i])); | |
485 | for (i = 0; i < adapter->num_rx_queues; i++) | |
486 | free_irq(adapter->msix_entries[vector++].vector, | |
487 | &(adapter->rx_ring[i])); | |
488 | ||
489 | free_irq(adapter->msix_entries[vector++].vector, netdev); | |
490 | return; | |
491 | } | |
492 | ||
493 | free_irq(adapter->pdev->irq, netdev); | |
494 | } | |
495 | ||
496 | /** | |
497 | * igb_irq_disable - Mask off interrupt generation on the NIC | |
498 | * @adapter: board private structure | |
499 | **/ | |
500 | static void igb_irq_disable(struct igb_adapter *adapter) | |
501 | { | |
502 | struct e1000_hw *hw = &adapter->hw; | |
503 | ||
504 | if (adapter->msix_entries) { | |
505 | wr32(E1000_EIMC, ~0); | |
506 | wr32(E1000_EIAC, 0); | |
507 | } | |
508 | wr32(E1000_IMC, ~0); | |
509 | wrfl(); | |
510 | synchronize_irq(adapter->pdev->irq); | |
511 | } | |
512 | ||
513 | /** | |
514 | * igb_irq_enable - Enable default interrupt generation settings | |
515 | * @adapter: board private structure | |
516 | **/ | |
517 | static void igb_irq_enable(struct igb_adapter *adapter) | |
518 | { | |
519 | struct e1000_hw *hw = &adapter->hw; | |
520 | ||
521 | if (adapter->msix_entries) { | |
522 | wr32(E1000_EIMS, | |
523 | adapter->eims_enable_mask); | |
524 | wr32(E1000_EIAC, | |
525 | adapter->eims_enable_mask); | |
526 | wr32(E1000_IMS, E1000_IMS_LSC); | |
527 | } else | |
528 | wr32(E1000_IMS, IMS_ENABLE_MASK); | |
529 | } | |
530 | ||
531 | static void igb_update_mng_vlan(struct igb_adapter *adapter) | |
532 | { | |
533 | struct net_device *netdev = adapter->netdev; | |
534 | u16 vid = adapter->hw.mng_cookie.vlan_id; | |
535 | u16 old_vid = adapter->mng_vlan_id; | |
536 | if (adapter->vlgrp) { | |
537 | if (!vlan_group_get_device(adapter->vlgrp, vid)) { | |
538 | if (adapter->hw.mng_cookie.status & | |
539 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN) { | |
540 | igb_vlan_rx_add_vid(netdev, vid); | |
541 | adapter->mng_vlan_id = vid; | |
542 | } else | |
543 | adapter->mng_vlan_id = IGB_MNG_VLAN_NONE; | |
544 | ||
545 | if ((old_vid != (u16)IGB_MNG_VLAN_NONE) && | |
546 | (vid != old_vid) && | |
547 | !vlan_group_get_device(adapter->vlgrp, old_vid)) | |
548 | igb_vlan_rx_kill_vid(netdev, old_vid); | |
549 | } else | |
550 | adapter->mng_vlan_id = vid; | |
551 | } | |
552 | } | |
553 | ||
554 | /** | |
555 | * igb_release_hw_control - release control of the h/w to f/w | |
556 | * @adapter: address of board private structure | |
557 | * | |
558 | * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit. | |
559 | * For ASF and Pass Through versions of f/w this means that the | |
560 | * driver is no longer loaded. | |
561 | * | |
562 | **/ | |
563 | static void igb_release_hw_control(struct igb_adapter *adapter) | |
564 | { | |
565 | struct e1000_hw *hw = &adapter->hw; | |
566 | u32 ctrl_ext; | |
567 | ||
568 | /* Let firmware take over control of h/w */ | |
569 | ctrl_ext = rd32(E1000_CTRL_EXT); | |
570 | wr32(E1000_CTRL_EXT, | |
571 | ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD); | |
572 | } | |
573 | ||
574 | ||
575 | /** | |
576 | * igb_get_hw_control - get control of the h/w from f/w | |
577 | * @adapter: address of board private structure | |
578 | * | |
579 | * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit. | |
580 | * For ASF and Pass Through versions of f/w this means that | |
581 | * the driver is loaded. | |
582 | * | |
583 | **/ | |
584 | static void igb_get_hw_control(struct igb_adapter *adapter) | |
585 | { | |
586 | struct e1000_hw *hw = &adapter->hw; | |
587 | u32 ctrl_ext; | |
588 | ||
589 | /* Let firmware know the driver has taken over */ | |
590 | ctrl_ext = rd32(E1000_CTRL_EXT); | |
591 | wr32(E1000_CTRL_EXT, | |
592 | ctrl_ext | E1000_CTRL_EXT_DRV_LOAD); | |
593 | } | |
594 | ||
595 | static void igb_init_manageability(struct igb_adapter *adapter) | |
596 | { | |
597 | struct e1000_hw *hw = &adapter->hw; | |
598 | ||
599 | if (adapter->en_mng_pt) { | |
600 | u32 manc2h = rd32(E1000_MANC2H); | |
601 | u32 manc = rd32(E1000_MANC); | |
602 | ||
9d5c8243 AK |
603 | /* enable receiving management packets to the host */ |
604 | /* this will probably generate destination unreachable messages | |
605 | * from the host OS, but the packets will be handled on SMBUS */ | |
606 | manc |= E1000_MANC_EN_MNG2HOST; | |
607 | #define E1000_MNG2HOST_PORT_623 (1 << 5) | |
608 | #define E1000_MNG2HOST_PORT_664 (1 << 6) | |
609 | manc2h |= E1000_MNG2HOST_PORT_623; | |
610 | manc2h |= E1000_MNG2HOST_PORT_664; | |
611 | wr32(E1000_MANC2H, manc2h); | |
612 | ||
613 | wr32(E1000_MANC, manc); | |
614 | } | |
615 | } | |
616 | ||
9d5c8243 AK |
617 | /** |
618 | * igb_configure - configure the hardware for RX and TX | |
619 | * @adapter: private board structure | |
620 | **/ | |
621 | static void igb_configure(struct igb_adapter *adapter) | |
622 | { | |
623 | struct net_device *netdev = adapter->netdev; | |
624 | int i; | |
625 | ||
626 | igb_get_hw_control(adapter); | |
627 | igb_set_multi(netdev); | |
628 | ||
629 | igb_restore_vlan(adapter); | |
630 | igb_init_manageability(adapter); | |
631 | ||
632 | igb_configure_tx(adapter); | |
633 | igb_setup_rctl(adapter); | |
634 | igb_configure_rx(adapter); | |
635 | /* call IGB_DESC_UNUSED which always leaves | |
636 | * at least 1 descriptor unused to make sure | |
637 | * next_to_use != next_to_clean */ | |
638 | for (i = 0; i < adapter->num_rx_queues; i++) { | |
639 | struct igb_ring *ring = &adapter->rx_ring[i]; | |
640 | igb_alloc_rx_buffers_adv(adapter, ring, IGB_DESC_UNUSED(ring)); | |
641 | } | |
642 | ||
643 | ||
644 | adapter->tx_queue_len = netdev->tx_queue_len; | |
645 | } | |
646 | ||
647 | ||
648 | /** | |
649 | * igb_up - Open the interface and prepare it to handle traffic | |
650 | * @adapter: board private structure | |
651 | **/ | |
652 | ||
653 | int igb_up(struct igb_adapter *adapter) | |
654 | { | |
655 | struct e1000_hw *hw = &adapter->hw; | |
656 | int i; | |
657 | ||
658 | /* hardware has been reset, we need to reload some things */ | |
659 | igb_configure(adapter); | |
660 | ||
661 | clear_bit(__IGB_DOWN, &adapter->state); | |
662 | ||
663 | napi_enable(&adapter->napi); | |
664 | ||
665 | if (adapter->msix_entries) { | |
666 | for (i = 0; i < adapter->num_rx_queues; i++) | |
667 | napi_enable(&adapter->rx_ring[i].napi); | |
668 | igb_configure_msix(adapter); | |
669 | } | |
670 | ||
671 | /* Clear any pending interrupts. */ | |
672 | rd32(E1000_ICR); | |
673 | igb_irq_enable(adapter); | |
674 | ||
675 | /* Fire a link change interrupt to start the watchdog. */ | |
676 | wr32(E1000_ICS, E1000_ICS_LSC); | |
677 | return 0; | |
678 | } | |
679 | ||
680 | void igb_down(struct igb_adapter *adapter) | |
681 | { | |
682 | struct e1000_hw *hw = &adapter->hw; | |
683 | struct net_device *netdev = adapter->netdev; | |
684 | u32 tctl, rctl; | |
685 | int i; | |
686 | ||
687 | /* signal that we're down so the interrupt handler does not | |
688 | * reschedule our watchdog timer */ | |
689 | set_bit(__IGB_DOWN, &adapter->state); | |
690 | ||
691 | /* disable receives in the hardware */ | |
692 | rctl = rd32(E1000_RCTL); | |
693 | wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN); | |
694 | /* flush and sleep below */ | |
695 | ||
696 | netif_stop_queue(netdev); | |
697 | ||
698 | /* disable transmits in the hardware */ | |
699 | tctl = rd32(E1000_TCTL); | |
700 | tctl &= ~E1000_TCTL_EN; | |
701 | wr32(E1000_TCTL, tctl); | |
702 | /* flush both disables and wait for them to finish */ | |
703 | wrfl(); | |
704 | msleep(10); | |
705 | ||
706 | napi_disable(&adapter->napi); | |
707 | ||
708 | if (adapter->msix_entries) | |
709 | for (i = 0; i < adapter->num_rx_queues; i++) | |
710 | napi_disable(&adapter->rx_ring[i].napi); | |
711 | igb_irq_disable(adapter); | |
712 | ||
713 | del_timer_sync(&adapter->watchdog_timer); | |
714 | del_timer_sync(&adapter->phy_info_timer); | |
715 | ||
716 | netdev->tx_queue_len = adapter->tx_queue_len; | |
717 | netif_carrier_off(netdev); | |
718 | adapter->link_speed = 0; | |
719 | adapter->link_duplex = 0; | |
720 | ||
3023682e JK |
721 | if (!pci_channel_offline(adapter->pdev)) |
722 | igb_reset(adapter); | |
9d5c8243 AK |
723 | igb_clean_all_tx_rings(adapter); |
724 | igb_clean_all_rx_rings(adapter); | |
725 | } | |
726 | ||
727 | void igb_reinit_locked(struct igb_adapter *adapter) | |
728 | { | |
729 | WARN_ON(in_interrupt()); | |
730 | while (test_and_set_bit(__IGB_RESETTING, &adapter->state)) | |
731 | msleep(1); | |
732 | igb_down(adapter); | |
733 | igb_up(adapter); | |
734 | clear_bit(__IGB_RESETTING, &adapter->state); | |
735 | } | |
736 | ||
737 | void igb_reset(struct igb_adapter *adapter) | |
738 | { | |
739 | struct e1000_hw *hw = &adapter->hw; | |
740 | struct e1000_fc_info *fc = &adapter->hw.fc; | |
741 | u32 pba = 0, tx_space, min_tx_space, min_rx_space; | |
742 | u16 hwm; | |
743 | ||
744 | /* Repartition Pba for greater than 9k mtu | |
745 | * To take effect CTRL.RST is required. | |
746 | */ | |
747 | pba = E1000_PBA_34K; | |
748 | ||
749 | if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) { | |
750 | /* adjust PBA for jumbo frames */ | |
751 | wr32(E1000_PBA, pba); | |
752 | ||
753 | /* To maintain wire speed transmits, the Tx FIFO should be | |
754 | * large enough to accommodate two full transmit packets, | |
755 | * rounded up to the next 1KB and expressed in KB. Likewise, | |
756 | * the Rx FIFO should be large enough to accommodate at least | |
757 | * one full receive packet and is similarly rounded up and | |
758 | * expressed in KB. */ | |
759 | pba = rd32(E1000_PBA); | |
760 | /* upper 16 bits has Tx packet buffer allocation size in KB */ | |
761 | tx_space = pba >> 16; | |
762 | /* lower 16 bits has Rx packet buffer allocation size in KB */ | |
763 | pba &= 0xffff; | |
764 | /* the tx fifo also stores 16 bytes of information about the tx | |
765 | * but don't include ethernet FCS because hardware appends it */ | |
766 | min_tx_space = (adapter->max_frame_size + | |
767 | sizeof(struct e1000_tx_desc) - | |
768 | ETH_FCS_LEN) * 2; | |
769 | min_tx_space = ALIGN(min_tx_space, 1024); | |
770 | min_tx_space >>= 10; | |
771 | /* software strips receive CRC, so leave room for it */ | |
772 | min_rx_space = adapter->max_frame_size; | |
773 | min_rx_space = ALIGN(min_rx_space, 1024); | |
774 | min_rx_space >>= 10; | |
775 | ||
776 | /* If current Tx allocation is less than the min Tx FIFO size, | |
777 | * and the min Tx FIFO size is less than the current Rx FIFO | |
778 | * allocation, take space away from current Rx allocation */ | |
779 | if (tx_space < min_tx_space && | |
780 | ((min_tx_space - tx_space) < pba)) { | |
781 | pba = pba - (min_tx_space - tx_space); | |
782 | ||
783 | /* if short on rx space, rx wins and must trump tx | |
784 | * adjustment */ | |
785 | if (pba < min_rx_space) | |
786 | pba = min_rx_space; | |
787 | } | |
788 | } | |
789 | wr32(E1000_PBA, pba); | |
790 | ||
791 | /* flow control settings */ | |
792 | /* The high water mark must be low enough to fit one full frame | |
793 | * (or the size used for early receive) above it in the Rx FIFO. | |
794 | * Set it to the lower of: | |
795 | * - 90% of the Rx FIFO size, or | |
796 | * - the full Rx FIFO size minus one full frame */ | |
797 | hwm = min(((pba << 10) * 9 / 10), | |
798 | ((pba << 10) - adapter->max_frame_size)); | |
799 | ||
800 | fc->high_water = hwm & 0xFFF8; /* 8-byte granularity */ | |
801 | fc->low_water = fc->high_water - 8; | |
802 | fc->pause_time = 0xFFFF; | |
803 | fc->send_xon = 1; | |
804 | fc->type = fc->original_type; | |
805 | ||
806 | /* Allow time for pending master requests to run */ | |
807 | adapter->hw.mac.ops.reset_hw(&adapter->hw); | |
808 | wr32(E1000_WUC, 0); | |
809 | ||
810 | if (adapter->hw.mac.ops.init_hw(&adapter->hw)) | |
811 | dev_err(&adapter->pdev->dev, "Hardware Error\n"); | |
812 | ||
813 | igb_update_mng_vlan(adapter); | |
814 | ||
815 | /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */ | |
816 | wr32(E1000_VET, ETHERNET_IEEE_VLAN_TYPE); | |
817 | ||
818 | igb_reset_adaptive(&adapter->hw); | |
68707acb BH |
819 | if (adapter->hw.phy.ops.get_phy_info) |
820 | adapter->hw.phy.ops.get_phy_info(&adapter->hw); | |
9d5c8243 AK |
821 | } |
822 | ||
823 | /** | |
824 | * igb_probe - Device Initialization Routine | |
825 | * @pdev: PCI device information struct | |
826 | * @ent: entry in igb_pci_tbl | |
827 | * | |
828 | * Returns 0 on success, negative on failure | |
829 | * | |
830 | * igb_probe initializes an adapter identified by a pci_dev structure. | |
831 | * The OS initialization, configuring of the adapter private structure, | |
832 | * and a hardware reset occur. | |
833 | **/ | |
834 | static int __devinit igb_probe(struct pci_dev *pdev, | |
835 | const struct pci_device_id *ent) | |
836 | { | |
837 | struct net_device *netdev; | |
838 | struct igb_adapter *adapter; | |
839 | struct e1000_hw *hw; | |
840 | const struct e1000_info *ei = igb_info_tbl[ent->driver_data]; | |
841 | unsigned long mmio_start, mmio_len; | |
842 | static int cards_found; | |
843 | int i, err, pci_using_dac; | |
844 | u16 eeprom_data = 0; | |
845 | u16 eeprom_apme_mask = IGB_EEPROM_APME; | |
846 | u32 part_num; | |
847 | ||
848 | err = pci_enable_device(pdev); | |
849 | if (err) | |
850 | return err; | |
851 | ||
852 | pci_using_dac = 0; | |
853 | err = pci_set_dma_mask(pdev, DMA_64BIT_MASK); | |
854 | if (!err) { | |
855 | err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK); | |
856 | if (!err) | |
857 | pci_using_dac = 1; | |
858 | } else { | |
859 | err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | |
860 | if (err) { | |
861 | err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); | |
862 | if (err) { | |
863 | dev_err(&pdev->dev, "No usable DMA " | |
864 | "configuration, aborting\n"); | |
865 | goto err_dma; | |
866 | } | |
867 | } | |
868 | } | |
869 | ||
870 | err = pci_request_regions(pdev, igb_driver_name); | |
871 | if (err) | |
872 | goto err_pci_reg; | |
873 | ||
874 | pci_set_master(pdev); | |
c682fc23 | 875 | pci_save_state(pdev); |
9d5c8243 AK |
876 | |
877 | err = -ENOMEM; | |
878 | netdev = alloc_etherdev(sizeof(struct igb_adapter)); | |
879 | if (!netdev) | |
880 | goto err_alloc_etherdev; | |
881 | ||
882 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
883 | ||
884 | pci_set_drvdata(pdev, netdev); | |
885 | adapter = netdev_priv(netdev); | |
886 | adapter->netdev = netdev; | |
887 | adapter->pdev = pdev; | |
888 | hw = &adapter->hw; | |
889 | hw->back = adapter; | |
890 | adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE; | |
891 | ||
892 | mmio_start = pci_resource_start(pdev, 0); | |
893 | mmio_len = pci_resource_len(pdev, 0); | |
894 | ||
895 | err = -EIO; | |
896 | adapter->hw.hw_addr = ioremap(mmio_start, mmio_len); | |
897 | if (!adapter->hw.hw_addr) | |
898 | goto err_ioremap; | |
899 | ||
900 | netdev->open = &igb_open; | |
901 | netdev->stop = &igb_close; | |
902 | netdev->get_stats = &igb_get_stats; | |
903 | netdev->set_multicast_list = &igb_set_multi; | |
904 | netdev->set_mac_address = &igb_set_mac; | |
905 | netdev->change_mtu = &igb_change_mtu; | |
906 | netdev->do_ioctl = &igb_ioctl; | |
907 | igb_set_ethtool_ops(netdev); | |
908 | netdev->tx_timeout = &igb_tx_timeout; | |
909 | netdev->watchdog_timeo = 5 * HZ; | |
910 | netif_napi_add(netdev, &adapter->napi, igb_clean, 64); | |
911 | netdev->vlan_rx_register = igb_vlan_rx_register; | |
912 | netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid; | |
913 | netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid; | |
914 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
915 | netdev->poll_controller = igb_netpoll; | |
916 | #endif | |
917 | netdev->hard_start_xmit = &igb_xmit_frame_adv; | |
918 | ||
919 | strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1); | |
920 | ||
921 | netdev->mem_start = mmio_start; | |
922 | netdev->mem_end = mmio_start + mmio_len; | |
923 | ||
924 | adapter->bd_number = cards_found; | |
925 | ||
926 | /* PCI config space info */ | |
927 | hw->vendor_id = pdev->vendor; | |
928 | hw->device_id = pdev->device; | |
929 | hw->revision_id = pdev->revision; | |
930 | hw->subsystem_vendor_id = pdev->subsystem_vendor; | |
931 | hw->subsystem_device_id = pdev->subsystem_device; | |
932 | ||
933 | /* setup the private structure */ | |
934 | hw->back = adapter; | |
935 | /* Copy the default MAC, PHY and NVM function pointers */ | |
936 | memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops)); | |
937 | memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops)); | |
938 | memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops)); | |
939 | /* Initialize skew-specific constants */ | |
940 | err = ei->get_invariants(hw); | |
941 | if (err) | |
942 | goto err_hw_init; | |
943 | ||
944 | err = igb_sw_init(adapter); | |
945 | if (err) | |
946 | goto err_sw_init; | |
947 | ||
948 | igb_get_bus_info_pcie(hw); | |
949 | ||
950 | hw->phy.autoneg_wait_to_complete = false; | |
951 | hw->mac.adaptive_ifs = true; | |
952 | ||
953 | /* Copper options */ | |
954 | if (hw->phy.media_type == e1000_media_type_copper) { | |
955 | hw->phy.mdix = AUTO_ALL_MODES; | |
956 | hw->phy.disable_polarity_correction = false; | |
957 | hw->phy.ms_type = e1000_ms_hw_default; | |
958 | } | |
959 | ||
960 | if (igb_check_reset_block(hw)) | |
961 | dev_info(&pdev->dev, | |
962 | "PHY reset is blocked due to SOL/IDER session.\n"); | |
963 | ||
964 | netdev->features = NETIF_F_SG | | |
965 | NETIF_F_HW_CSUM | | |
966 | NETIF_F_HW_VLAN_TX | | |
967 | NETIF_F_HW_VLAN_RX | | |
968 | NETIF_F_HW_VLAN_FILTER; | |
969 | ||
970 | netdev->features |= NETIF_F_TSO; | |
971 | ||
972 | netdev->features |= NETIF_F_TSO6; | |
973 | if (pci_using_dac) | |
974 | netdev->features |= NETIF_F_HIGHDMA; | |
975 | ||
976 | netdev->features |= NETIF_F_LLTX; | |
977 | adapter->en_mng_pt = igb_enable_mng_pass_thru(&adapter->hw); | |
978 | ||
979 | /* before reading the NVM, reset the controller to put the device in a | |
980 | * known good starting state */ | |
981 | hw->mac.ops.reset_hw(hw); | |
982 | ||
983 | /* make sure the NVM is good */ | |
984 | if (igb_validate_nvm_checksum(hw) < 0) { | |
985 | dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n"); | |
986 | err = -EIO; | |
987 | goto err_eeprom; | |
988 | } | |
989 | ||
990 | /* copy the MAC address out of the NVM */ | |
991 | if (hw->mac.ops.read_mac_addr(hw)) | |
992 | dev_err(&pdev->dev, "NVM Read Error\n"); | |
993 | ||
994 | memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len); | |
995 | memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len); | |
996 | ||
997 | if (!is_valid_ether_addr(netdev->perm_addr)) { | |
998 | dev_err(&pdev->dev, "Invalid MAC Address\n"); | |
999 | err = -EIO; | |
1000 | goto err_eeprom; | |
1001 | } | |
1002 | ||
1003 | init_timer(&adapter->watchdog_timer); | |
1004 | adapter->watchdog_timer.function = &igb_watchdog; | |
1005 | adapter->watchdog_timer.data = (unsigned long) adapter; | |
1006 | ||
1007 | init_timer(&adapter->phy_info_timer); | |
1008 | adapter->phy_info_timer.function = &igb_update_phy_info; | |
1009 | adapter->phy_info_timer.data = (unsigned long) adapter; | |
1010 | ||
1011 | INIT_WORK(&adapter->reset_task, igb_reset_task); | |
1012 | INIT_WORK(&adapter->watchdog_task, igb_watchdog_task); | |
1013 | ||
1014 | /* Initialize link & ring properties that are user-changeable */ | |
1015 | adapter->tx_ring->count = 256; | |
1016 | for (i = 0; i < adapter->num_tx_queues; i++) | |
1017 | adapter->tx_ring[i].count = adapter->tx_ring->count; | |
1018 | adapter->rx_ring->count = 256; | |
1019 | for (i = 0; i < adapter->num_rx_queues; i++) | |
1020 | adapter->rx_ring[i].count = adapter->rx_ring->count; | |
1021 | ||
1022 | adapter->fc_autoneg = true; | |
1023 | hw->mac.autoneg = true; | |
1024 | hw->phy.autoneg_advertised = 0x2f; | |
1025 | ||
1026 | hw->fc.original_type = e1000_fc_default; | |
1027 | hw->fc.type = e1000_fc_default; | |
1028 | ||
1029 | adapter->itr_setting = 3; | |
1030 | adapter->itr = IGB_START_ITR; | |
1031 | ||
1032 | igb_validate_mdi_setting(hw); | |
1033 | ||
1034 | adapter->rx_csum = 1; | |
1035 | ||
1036 | /* Initial Wake on LAN setting If APM wake is enabled in the EEPROM, | |
1037 | * enable the ACPI Magic Packet filter | |
1038 | */ | |
1039 | ||
1040 | if (hw->bus.func == 0 || | |
1041 | hw->device_id == E1000_DEV_ID_82575EB_COPPER) | |
1042 | hw->nvm.ops.read_nvm(hw, NVM_INIT_CONTROL3_PORT_A, 1, | |
1043 | &eeprom_data); | |
1044 | ||
1045 | if (eeprom_data & eeprom_apme_mask) | |
1046 | adapter->eeprom_wol |= E1000_WUFC_MAG; | |
1047 | ||
1048 | /* now that we have the eeprom settings, apply the special cases where | |
1049 | * the eeprom may be wrong or the board simply won't support wake on | |
1050 | * lan on a particular port */ | |
1051 | switch (pdev->device) { | |
1052 | case E1000_DEV_ID_82575GB_QUAD_COPPER: | |
1053 | adapter->eeprom_wol = 0; | |
1054 | break; | |
1055 | case E1000_DEV_ID_82575EB_FIBER_SERDES: | |
1056 | /* Wake events only supported on port A for dual fiber | |
1057 | * regardless of eeprom setting */ | |
1058 | if (rd32(E1000_STATUS) & E1000_STATUS_FUNC_1) | |
1059 | adapter->eeprom_wol = 0; | |
1060 | break; | |
1061 | } | |
1062 | ||
1063 | /* initialize the wol settings based on the eeprom settings */ | |
1064 | adapter->wol = adapter->eeprom_wol; | |
1065 | ||
1066 | /* reset the hardware with the new settings */ | |
1067 | igb_reset(adapter); | |
1068 | ||
1069 | /* let the f/w know that the h/w is now under the control of the | |
1070 | * driver. */ | |
1071 | igb_get_hw_control(adapter); | |
1072 | ||
1073 | /* tell the stack to leave us alone until igb_open() is called */ | |
1074 | netif_carrier_off(netdev); | |
1075 | netif_stop_queue(netdev); | |
1076 | ||
1077 | strcpy(netdev->name, "eth%d"); | |
1078 | err = register_netdev(netdev); | |
1079 | if (err) | |
1080 | goto err_register; | |
1081 | ||
1082 | dev_info(&pdev->dev, "Intel(R) Gigabit Ethernet Network Connection\n"); | |
1083 | /* print bus type/speed/width info */ | |
1084 | dev_info(&pdev->dev, | |
1085 | "%s: (PCIe:%s:%s) %02x:%02x:%02x:%02x:%02x:%02x\n", | |
1086 | netdev->name, | |
1087 | ((hw->bus.speed == e1000_bus_speed_2500) | |
1088 | ? "2.5Gb/s" : "unknown"), | |
1089 | ((hw->bus.width == e1000_bus_width_pcie_x4) | |
1090 | ? "Width x4" : (hw->bus.width == e1000_bus_width_pcie_x1) | |
1091 | ? "Width x1" : "unknown"), | |
1092 | netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2], | |
1093 | netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]); | |
1094 | ||
1095 | igb_read_part_num(hw, &part_num); | |
1096 | dev_info(&pdev->dev, "%s: PBA No: %06x-%03x\n", netdev->name, | |
1097 | (part_num >> 8), (part_num & 0xff)); | |
1098 | ||
1099 | dev_info(&pdev->dev, | |
1100 | "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n", | |
1101 | adapter->msix_entries ? "MSI-X" : | |
1102 | adapter->msi_enabled ? "MSI" : "legacy", | |
1103 | adapter->num_rx_queues, adapter->num_tx_queues); | |
1104 | ||
1105 | cards_found++; | |
1106 | return 0; | |
1107 | ||
1108 | err_register: | |
1109 | igb_release_hw_control(adapter); | |
1110 | err_eeprom: | |
1111 | if (!igb_check_reset_block(hw)) | |
1112 | hw->phy.ops.reset_phy(hw); | |
1113 | ||
1114 | if (hw->flash_address) | |
1115 | iounmap(hw->flash_address); | |
1116 | ||
1117 | igb_remove_device(hw); | |
1118 | kfree(adapter->tx_ring); | |
1119 | kfree(adapter->rx_ring); | |
1120 | err_sw_init: | |
1121 | err_hw_init: | |
1122 | iounmap(hw->hw_addr); | |
1123 | err_ioremap: | |
1124 | free_netdev(netdev); | |
1125 | err_alloc_etherdev: | |
1126 | pci_release_regions(pdev); | |
1127 | err_pci_reg: | |
1128 | err_dma: | |
1129 | pci_disable_device(pdev); | |
1130 | return err; | |
1131 | } | |
1132 | ||
1133 | /** | |
1134 | * igb_remove - Device Removal Routine | |
1135 | * @pdev: PCI device information struct | |
1136 | * | |
1137 | * igb_remove is called by the PCI subsystem to alert the driver | |
1138 | * that it should release a PCI device. The could be caused by a | |
1139 | * Hot-Plug event, or because the driver is going to be removed from | |
1140 | * memory. | |
1141 | **/ | |
1142 | static void __devexit igb_remove(struct pci_dev *pdev) | |
1143 | { | |
1144 | struct net_device *netdev = pci_get_drvdata(pdev); | |
1145 | struct igb_adapter *adapter = netdev_priv(netdev); | |
1146 | ||
1147 | /* flush_scheduled work may reschedule our watchdog task, so | |
1148 | * explicitly disable watchdog tasks from being rescheduled */ | |
1149 | set_bit(__IGB_DOWN, &adapter->state); | |
1150 | del_timer_sync(&adapter->watchdog_timer); | |
1151 | del_timer_sync(&adapter->phy_info_timer); | |
1152 | ||
1153 | flush_scheduled_work(); | |
1154 | ||
9d5c8243 AK |
1155 | /* Release control of h/w to f/w. If f/w is AMT enabled, this |
1156 | * would have already happened in close and is redundant. */ | |
1157 | igb_release_hw_control(adapter); | |
1158 | ||
1159 | unregister_netdev(netdev); | |
1160 | ||
1161 | if (!igb_check_reset_block(&adapter->hw)) | |
1162 | adapter->hw.phy.ops.reset_phy(&adapter->hw); | |
1163 | ||
1164 | igb_remove_device(&adapter->hw); | |
1165 | igb_reset_interrupt_capability(adapter); | |
1166 | ||
1167 | kfree(adapter->tx_ring); | |
1168 | kfree(adapter->rx_ring); | |
1169 | ||
1170 | iounmap(adapter->hw.hw_addr); | |
1171 | if (adapter->hw.flash_address) | |
1172 | iounmap(adapter->hw.flash_address); | |
1173 | pci_release_regions(pdev); | |
1174 | ||
1175 | free_netdev(netdev); | |
1176 | ||
1177 | pci_disable_device(pdev); | |
1178 | } | |
1179 | ||
1180 | /** | |
1181 | * igb_sw_init - Initialize general software structures (struct igb_adapter) | |
1182 | * @adapter: board private structure to initialize | |
1183 | * | |
1184 | * igb_sw_init initializes the Adapter private data structure. | |
1185 | * Fields are initialized based on PCI device information and | |
1186 | * OS network device settings (MTU size). | |
1187 | **/ | |
1188 | static int __devinit igb_sw_init(struct igb_adapter *adapter) | |
1189 | { | |
1190 | struct e1000_hw *hw = &adapter->hw; | |
1191 | struct net_device *netdev = adapter->netdev; | |
1192 | struct pci_dev *pdev = adapter->pdev; | |
1193 | ||
1194 | pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word); | |
1195 | ||
1196 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; | |
1197 | adapter->rx_ps_hdr_size = 0; /* disable packet split */ | |
1198 | adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; | |
1199 | adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN; | |
1200 | ||
1201 | /* Number of supported queues. */ | |
1202 | /* Having more queues than CPUs doesn't make sense. */ | |
1203 | adapter->num_tx_queues = 1; | |
1204 | adapter->num_rx_queues = min(IGB_MAX_RX_QUEUES, num_online_cpus()); | |
1205 | ||
1206 | igb_set_interrupt_capability(adapter); | |
1207 | ||
1208 | if (igb_alloc_queues(adapter)) { | |
1209 | dev_err(&pdev->dev, "Unable to allocate memory for queues\n"); | |
1210 | return -ENOMEM; | |
1211 | } | |
1212 | ||
1213 | /* Explicitly disable IRQ since the NIC can be in any state. */ | |
1214 | igb_irq_disable(adapter); | |
1215 | ||
1216 | set_bit(__IGB_DOWN, &adapter->state); | |
1217 | return 0; | |
1218 | } | |
1219 | ||
1220 | /** | |
1221 | * igb_open - Called when a network interface is made active | |
1222 | * @netdev: network interface device structure | |
1223 | * | |
1224 | * Returns 0 on success, negative value on failure | |
1225 | * | |
1226 | * The open entry point is called when a network interface is made | |
1227 | * active by the system (IFF_UP). At this point all resources needed | |
1228 | * for transmit and receive operations are allocated, the interrupt | |
1229 | * handler is registered with the OS, the watchdog timer is started, | |
1230 | * and the stack is notified that the interface is ready. | |
1231 | **/ | |
1232 | static int igb_open(struct net_device *netdev) | |
1233 | { | |
1234 | struct igb_adapter *adapter = netdev_priv(netdev); | |
1235 | struct e1000_hw *hw = &adapter->hw; | |
1236 | int err; | |
1237 | int i; | |
1238 | ||
1239 | /* disallow open during test */ | |
1240 | if (test_bit(__IGB_TESTING, &adapter->state)) | |
1241 | return -EBUSY; | |
1242 | ||
1243 | /* allocate transmit descriptors */ | |
1244 | err = igb_setup_all_tx_resources(adapter); | |
1245 | if (err) | |
1246 | goto err_setup_tx; | |
1247 | ||
1248 | /* allocate receive descriptors */ | |
1249 | err = igb_setup_all_rx_resources(adapter); | |
1250 | if (err) | |
1251 | goto err_setup_rx; | |
1252 | ||
1253 | /* e1000_power_up_phy(adapter); */ | |
1254 | ||
1255 | adapter->mng_vlan_id = IGB_MNG_VLAN_NONE; | |
1256 | if ((adapter->hw.mng_cookie.status & | |
1257 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN)) | |
1258 | igb_update_mng_vlan(adapter); | |
1259 | ||
1260 | /* before we allocate an interrupt, we must be ready to handle it. | |
1261 | * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt | |
1262 | * as soon as we call pci_request_irq, so we have to setup our | |
1263 | * clean_rx handler before we do so. */ | |
1264 | igb_configure(adapter); | |
1265 | ||
1266 | err = igb_request_irq(adapter); | |
1267 | if (err) | |
1268 | goto err_req_irq; | |
1269 | ||
1270 | /* From here on the code is the same as igb_up() */ | |
1271 | clear_bit(__IGB_DOWN, &adapter->state); | |
1272 | ||
1273 | napi_enable(&adapter->napi); | |
1274 | if (adapter->msix_entries) | |
1275 | for (i = 0; i < adapter->num_rx_queues; i++) | |
1276 | napi_enable(&adapter->rx_ring[i].napi); | |
1277 | ||
1278 | igb_irq_enable(adapter); | |
1279 | ||
1280 | /* Clear any pending interrupts. */ | |
1281 | rd32(E1000_ICR); | |
1282 | /* Fire a link status change interrupt to start the watchdog. */ | |
1283 | wr32(E1000_ICS, E1000_ICS_LSC); | |
1284 | ||
1285 | return 0; | |
1286 | ||
1287 | err_req_irq: | |
1288 | igb_release_hw_control(adapter); | |
1289 | /* e1000_power_down_phy(adapter); */ | |
1290 | igb_free_all_rx_resources(adapter); | |
1291 | err_setup_rx: | |
1292 | igb_free_all_tx_resources(adapter); | |
1293 | err_setup_tx: | |
1294 | igb_reset(adapter); | |
1295 | ||
1296 | return err; | |
1297 | } | |
1298 | ||
1299 | /** | |
1300 | * igb_close - Disables a network interface | |
1301 | * @netdev: network interface device structure | |
1302 | * | |
1303 | * Returns 0, this is not allowed to fail | |
1304 | * | |
1305 | * The close entry point is called when an interface is de-activated | |
1306 | * by the OS. The hardware is still under the driver's control, but | |
1307 | * needs to be disabled. A global MAC reset is issued to stop the | |
1308 | * hardware, and all transmit and receive resources are freed. | |
1309 | **/ | |
1310 | static int igb_close(struct net_device *netdev) | |
1311 | { | |
1312 | struct igb_adapter *adapter = netdev_priv(netdev); | |
1313 | ||
1314 | WARN_ON(test_bit(__IGB_RESETTING, &adapter->state)); | |
1315 | igb_down(adapter); | |
1316 | ||
1317 | igb_free_irq(adapter); | |
1318 | ||
1319 | igb_free_all_tx_resources(adapter); | |
1320 | igb_free_all_rx_resources(adapter); | |
1321 | ||
1322 | /* kill manageability vlan ID if supported, but not if a vlan with | |
1323 | * the same ID is registered on the host OS (let 8021q kill it) */ | |
1324 | if ((adapter->hw.mng_cookie.status & | |
1325 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && | |
1326 | !(adapter->vlgrp && | |
1327 | vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) | |
1328 | igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); | |
1329 | ||
1330 | return 0; | |
1331 | } | |
1332 | ||
1333 | /** | |
1334 | * igb_setup_tx_resources - allocate Tx resources (Descriptors) | |
1335 | * @adapter: board private structure | |
1336 | * @tx_ring: tx descriptor ring (for a specific queue) to setup | |
1337 | * | |
1338 | * Return 0 on success, negative on failure | |
1339 | **/ | |
1340 | ||
1341 | int igb_setup_tx_resources(struct igb_adapter *adapter, | |
1342 | struct igb_ring *tx_ring) | |
1343 | { | |
1344 | struct pci_dev *pdev = adapter->pdev; | |
1345 | int size; | |
1346 | ||
1347 | size = sizeof(struct igb_buffer) * tx_ring->count; | |
1348 | tx_ring->buffer_info = vmalloc(size); | |
1349 | if (!tx_ring->buffer_info) | |
1350 | goto err; | |
1351 | memset(tx_ring->buffer_info, 0, size); | |
1352 | ||
1353 | /* round up to nearest 4K */ | |
1354 | tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc) | |
1355 | + sizeof(u32); | |
1356 | tx_ring->size = ALIGN(tx_ring->size, 4096); | |
1357 | ||
1358 | tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size, | |
1359 | &tx_ring->dma); | |
1360 | ||
1361 | if (!tx_ring->desc) | |
1362 | goto err; | |
1363 | ||
1364 | tx_ring->adapter = adapter; | |
1365 | tx_ring->next_to_use = 0; | |
1366 | tx_ring->next_to_clean = 0; | |
1367 | spin_lock_init(&tx_ring->tx_clean_lock); | |
1368 | spin_lock_init(&tx_ring->tx_lock); | |
1369 | return 0; | |
1370 | ||
1371 | err: | |
1372 | vfree(tx_ring->buffer_info); | |
1373 | dev_err(&adapter->pdev->dev, | |
1374 | "Unable to allocate memory for the transmit descriptor ring\n"); | |
1375 | return -ENOMEM; | |
1376 | } | |
1377 | ||
1378 | /** | |
1379 | * igb_setup_all_tx_resources - wrapper to allocate Tx resources | |
1380 | * (Descriptors) for all queues | |
1381 | * @adapter: board private structure | |
1382 | * | |
1383 | * Return 0 on success, negative on failure | |
1384 | **/ | |
1385 | static int igb_setup_all_tx_resources(struct igb_adapter *adapter) | |
1386 | { | |
1387 | int i, err = 0; | |
1388 | ||
1389 | for (i = 0; i < adapter->num_tx_queues; i++) { | |
1390 | err = igb_setup_tx_resources(adapter, &adapter->tx_ring[i]); | |
1391 | if (err) { | |
1392 | dev_err(&adapter->pdev->dev, | |
1393 | "Allocation for Tx Queue %u failed\n", i); | |
1394 | for (i--; i >= 0; i--) | |
1395 | igb_free_tx_resources(adapter, | |
1396 | &adapter->tx_ring[i]); | |
1397 | break; | |
1398 | } | |
1399 | } | |
1400 | ||
1401 | return err; | |
1402 | } | |
1403 | ||
1404 | /** | |
1405 | * igb_configure_tx - Configure transmit Unit after Reset | |
1406 | * @adapter: board private structure | |
1407 | * | |
1408 | * Configure the Tx unit of the MAC after a reset. | |
1409 | **/ | |
1410 | static void igb_configure_tx(struct igb_adapter *adapter) | |
1411 | { | |
1412 | u64 tdba, tdwba; | |
1413 | struct e1000_hw *hw = &adapter->hw; | |
1414 | u32 tctl; | |
1415 | u32 txdctl, txctrl; | |
1416 | int i; | |
1417 | ||
1418 | for (i = 0; i < adapter->num_tx_queues; i++) { | |
1419 | struct igb_ring *ring = &(adapter->tx_ring[i]); | |
1420 | ||
1421 | wr32(E1000_TDLEN(i), | |
1422 | ring->count * sizeof(struct e1000_tx_desc)); | |
1423 | tdba = ring->dma; | |
1424 | wr32(E1000_TDBAL(i), | |
1425 | tdba & 0x00000000ffffffffULL); | |
1426 | wr32(E1000_TDBAH(i), tdba >> 32); | |
1427 | ||
1428 | tdwba = ring->dma + ring->count * sizeof(struct e1000_tx_desc); | |
1429 | tdwba |= 1; /* enable head wb */ | |
1430 | wr32(E1000_TDWBAL(i), | |
1431 | tdwba & 0x00000000ffffffffULL); | |
1432 | wr32(E1000_TDWBAH(i), tdwba >> 32); | |
1433 | ||
1434 | ring->head = E1000_TDH(i); | |
1435 | ring->tail = E1000_TDT(i); | |
1436 | writel(0, hw->hw_addr + ring->tail); | |
1437 | writel(0, hw->hw_addr + ring->head); | |
1438 | txdctl = rd32(E1000_TXDCTL(i)); | |
1439 | txdctl |= E1000_TXDCTL_QUEUE_ENABLE; | |
1440 | wr32(E1000_TXDCTL(i), txdctl); | |
1441 | ||
1442 | /* Turn off Relaxed Ordering on head write-backs. The | |
1443 | * writebacks MUST be delivered in order or it will | |
1444 | * completely screw up our bookeeping. | |
1445 | */ | |
1446 | txctrl = rd32(E1000_DCA_TXCTRL(i)); | |
1447 | txctrl &= ~E1000_DCA_TXCTRL_TX_WB_RO_EN; | |
1448 | wr32(E1000_DCA_TXCTRL(i), txctrl); | |
1449 | } | |
1450 | ||
1451 | ||
1452 | ||
1453 | /* Use the default values for the Tx Inter Packet Gap (IPG) timer */ | |
1454 | ||
1455 | /* Program the Transmit Control Register */ | |
1456 | ||
1457 | tctl = rd32(E1000_TCTL); | |
1458 | tctl &= ~E1000_TCTL_CT; | |
1459 | tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC | | |
1460 | (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); | |
1461 | ||
1462 | igb_config_collision_dist(hw); | |
1463 | ||
1464 | /* Setup Transmit Descriptor Settings for eop descriptor */ | |
1465 | adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_RS; | |
1466 | ||
1467 | /* Enable transmits */ | |
1468 | tctl |= E1000_TCTL_EN; | |
1469 | ||
1470 | wr32(E1000_TCTL, tctl); | |
1471 | } | |
1472 | ||
1473 | /** | |
1474 | * igb_setup_rx_resources - allocate Rx resources (Descriptors) | |
1475 | * @adapter: board private structure | |
1476 | * @rx_ring: rx descriptor ring (for a specific queue) to setup | |
1477 | * | |
1478 | * Returns 0 on success, negative on failure | |
1479 | **/ | |
1480 | ||
1481 | int igb_setup_rx_resources(struct igb_adapter *adapter, | |
1482 | struct igb_ring *rx_ring) | |
1483 | { | |
1484 | struct pci_dev *pdev = adapter->pdev; | |
1485 | int size, desc_len; | |
1486 | ||
1487 | size = sizeof(struct igb_buffer) * rx_ring->count; | |
1488 | rx_ring->buffer_info = vmalloc(size); | |
1489 | if (!rx_ring->buffer_info) | |
1490 | goto err; | |
1491 | memset(rx_ring->buffer_info, 0, size); | |
1492 | ||
1493 | desc_len = sizeof(union e1000_adv_rx_desc); | |
1494 | ||
1495 | /* Round up to nearest 4K */ | |
1496 | rx_ring->size = rx_ring->count * desc_len; | |
1497 | rx_ring->size = ALIGN(rx_ring->size, 4096); | |
1498 | ||
1499 | rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size, | |
1500 | &rx_ring->dma); | |
1501 | ||
1502 | if (!rx_ring->desc) | |
1503 | goto err; | |
1504 | ||
1505 | rx_ring->next_to_clean = 0; | |
1506 | rx_ring->next_to_use = 0; | |
1507 | rx_ring->pending_skb = NULL; | |
1508 | ||
1509 | rx_ring->adapter = adapter; | |
1510 | /* FIXME: do we want to setup ring->napi->poll here? */ | |
1511 | rx_ring->napi.poll = adapter->napi.poll; | |
1512 | ||
1513 | return 0; | |
1514 | ||
1515 | err: | |
1516 | vfree(rx_ring->buffer_info); | |
1517 | dev_err(&adapter->pdev->dev, "Unable to allocate memory for " | |
1518 | "the receive descriptor ring\n"); | |
1519 | return -ENOMEM; | |
1520 | } | |
1521 | ||
1522 | /** | |
1523 | * igb_setup_all_rx_resources - wrapper to allocate Rx resources | |
1524 | * (Descriptors) for all queues | |
1525 | * @adapter: board private structure | |
1526 | * | |
1527 | * Return 0 on success, negative on failure | |
1528 | **/ | |
1529 | static int igb_setup_all_rx_resources(struct igb_adapter *adapter) | |
1530 | { | |
1531 | int i, err = 0; | |
1532 | ||
1533 | for (i = 0; i < adapter->num_rx_queues; i++) { | |
1534 | err = igb_setup_rx_resources(adapter, &adapter->rx_ring[i]); | |
1535 | if (err) { | |
1536 | dev_err(&adapter->pdev->dev, | |
1537 | "Allocation for Rx Queue %u failed\n", i); | |
1538 | for (i--; i >= 0; i--) | |
1539 | igb_free_rx_resources(adapter, | |
1540 | &adapter->rx_ring[i]); | |
1541 | break; | |
1542 | } | |
1543 | } | |
1544 | ||
1545 | return err; | |
1546 | } | |
1547 | ||
1548 | /** | |
1549 | * igb_setup_rctl - configure the receive control registers | |
1550 | * @adapter: Board private structure | |
1551 | **/ | |
1552 | static void igb_setup_rctl(struct igb_adapter *adapter) | |
1553 | { | |
1554 | struct e1000_hw *hw = &adapter->hw; | |
1555 | u32 rctl; | |
1556 | u32 srrctl = 0; | |
1557 | int i; | |
1558 | ||
1559 | rctl = rd32(E1000_RCTL); | |
1560 | ||
1561 | rctl &= ~(3 << E1000_RCTL_MO_SHIFT); | |
1562 | ||
1563 | rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | | |
1564 | E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF | | |
1565 | (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT); | |
1566 | ||
1567 | /* disable the stripping of CRC because it breaks | |
1568 | * BMC firmware connected over SMBUS | |
1569 | rctl |= E1000_RCTL_SECRC; | |
1570 | */ | |
1571 | ||
1572 | rctl &= ~E1000_RCTL_SBP; | |
1573 | ||
1574 | if (adapter->netdev->mtu <= ETH_DATA_LEN) | |
1575 | rctl &= ~E1000_RCTL_LPE; | |
1576 | else | |
1577 | rctl |= E1000_RCTL_LPE; | |
1578 | if (adapter->rx_buffer_len <= IGB_RXBUFFER_2048) { | |
1579 | /* Setup buffer sizes */ | |
1580 | rctl &= ~E1000_RCTL_SZ_4096; | |
1581 | rctl |= E1000_RCTL_BSEX; | |
1582 | switch (adapter->rx_buffer_len) { | |
1583 | case IGB_RXBUFFER_256: | |
1584 | rctl |= E1000_RCTL_SZ_256; | |
1585 | rctl &= ~E1000_RCTL_BSEX; | |
1586 | break; | |
1587 | case IGB_RXBUFFER_512: | |
1588 | rctl |= E1000_RCTL_SZ_512; | |
1589 | rctl &= ~E1000_RCTL_BSEX; | |
1590 | break; | |
1591 | case IGB_RXBUFFER_1024: | |
1592 | rctl |= E1000_RCTL_SZ_1024; | |
1593 | rctl &= ~E1000_RCTL_BSEX; | |
1594 | break; | |
1595 | case IGB_RXBUFFER_2048: | |
1596 | default: | |
1597 | rctl |= E1000_RCTL_SZ_2048; | |
1598 | rctl &= ~E1000_RCTL_BSEX; | |
1599 | break; | |
1600 | case IGB_RXBUFFER_4096: | |
1601 | rctl |= E1000_RCTL_SZ_4096; | |
1602 | break; | |
1603 | case IGB_RXBUFFER_8192: | |
1604 | rctl |= E1000_RCTL_SZ_8192; | |
1605 | break; | |
1606 | case IGB_RXBUFFER_16384: | |
1607 | rctl |= E1000_RCTL_SZ_16384; | |
1608 | break; | |
1609 | } | |
1610 | } else { | |
1611 | rctl &= ~E1000_RCTL_BSEX; | |
1612 | srrctl = adapter->rx_buffer_len >> E1000_SRRCTL_BSIZEPKT_SHIFT; | |
1613 | } | |
1614 | ||
1615 | /* 82575 and greater support packet-split where the protocol | |
1616 | * header is placed in skb->data and the packet data is | |
1617 | * placed in pages hanging off of skb_shinfo(skb)->nr_frags. | |
1618 | * In the case of a non-split, skb->data is linearly filled, | |
1619 | * followed by the page buffers. Therefore, skb->data is | |
1620 | * sized to hold the largest protocol header. | |
1621 | */ | |
1622 | /* allocations using alloc_page take too long for regular MTU | |
1623 | * so only enable packet split for jumbo frames */ | |
1624 | if (rctl & E1000_RCTL_LPE) { | |
1625 | adapter->rx_ps_hdr_size = IGB_RXBUFFER_128; | |
1626 | srrctl = adapter->rx_ps_hdr_size << | |
1627 | E1000_SRRCTL_BSIZEHDRSIZE_SHIFT; | |
1628 | /* buffer size is ALWAYS one page */ | |
1629 | srrctl |= PAGE_SIZE >> E1000_SRRCTL_BSIZEPKT_SHIFT; | |
1630 | srrctl |= E1000_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS; | |
1631 | } else { | |
1632 | adapter->rx_ps_hdr_size = 0; | |
1633 | srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF; | |
1634 | } | |
1635 | ||
1636 | for (i = 0; i < adapter->num_rx_queues; i++) | |
1637 | wr32(E1000_SRRCTL(i), srrctl); | |
1638 | ||
1639 | wr32(E1000_RCTL, rctl); | |
1640 | } | |
1641 | ||
1642 | /** | |
1643 | * igb_configure_rx - Configure receive Unit after Reset | |
1644 | * @adapter: board private structure | |
1645 | * | |
1646 | * Configure the Rx unit of the MAC after a reset. | |
1647 | **/ | |
1648 | static void igb_configure_rx(struct igb_adapter *adapter) | |
1649 | { | |
1650 | u64 rdba; | |
1651 | struct e1000_hw *hw = &adapter->hw; | |
1652 | u32 rctl, rxcsum; | |
1653 | u32 rxdctl; | |
1654 | int i; | |
1655 | ||
1656 | /* disable receives while setting up the descriptors */ | |
1657 | rctl = rd32(E1000_RCTL); | |
1658 | wr32(E1000_RCTL, rctl & ~E1000_RCTL_EN); | |
1659 | wrfl(); | |
1660 | mdelay(10); | |
1661 | ||
1662 | if (adapter->itr_setting > 3) | |
1663 | wr32(E1000_ITR, | |
1664 | 1000000000 / (adapter->itr * 256)); | |
1665 | ||
1666 | /* Setup the HW Rx Head and Tail Descriptor Pointers and | |
1667 | * the Base and Length of the Rx Descriptor Ring */ | |
1668 | for (i = 0; i < adapter->num_rx_queues; i++) { | |
1669 | struct igb_ring *ring = &(adapter->rx_ring[i]); | |
1670 | rdba = ring->dma; | |
1671 | wr32(E1000_RDBAL(i), | |
1672 | rdba & 0x00000000ffffffffULL); | |
1673 | wr32(E1000_RDBAH(i), rdba >> 32); | |
1674 | wr32(E1000_RDLEN(i), | |
1675 | ring->count * sizeof(union e1000_adv_rx_desc)); | |
1676 | ||
1677 | ring->head = E1000_RDH(i); | |
1678 | ring->tail = E1000_RDT(i); | |
1679 | writel(0, hw->hw_addr + ring->tail); | |
1680 | writel(0, hw->hw_addr + ring->head); | |
1681 | ||
1682 | rxdctl = rd32(E1000_RXDCTL(i)); | |
1683 | rxdctl |= E1000_RXDCTL_QUEUE_ENABLE; | |
1684 | rxdctl &= 0xFFF00000; | |
1685 | rxdctl |= IGB_RX_PTHRESH; | |
1686 | rxdctl |= IGB_RX_HTHRESH << 8; | |
1687 | rxdctl |= IGB_RX_WTHRESH << 16; | |
1688 | wr32(E1000_RXDCTL(i), rxdctl); | |
1689 | } | |
1690 | ||
1691 | if (adapter->num_rx_queues > 1) { | |
1692 | u32 random[10]; | |
1693 | u32 mrqc; | |
1694 | u32 j, shift; | |
1695 | union e1000_reta { | |
1696 | u32 dword; | |
1697 | u8 bytes[4]; | |
1698 | } reta; | |
1699 | ||
1700 | get_random_bytes(&random[0], 40); | |
1701 | ||
1702 | shift = 6; | |
1703 | for (j = 0; j < (32 * 4); j++) { | |
1704 | reta.bytes[j & 3] = | |
1705 | (j % adapter->num_rx_queues) << shift; | |
1706 | if ((j & 3) == 3) | |
1707 | writel(reta.dword, | |
1708 | hw->hw_addr + E1000_RETA(0) + (j & ~3)); | |
1709 | } | |
1710 | mrqc = E1000_MRQC_ENABLE_RSS_4Q; | |
1711 | ||
1712 | /* Fill out hash function seeds */ | |
1713 | for (j = 0; j < 10; j++) | |
1714 | array_wr32(E1000_RSSRK(0), j, random[j]); | |
1715 | ||
1716 | mrqc |= (E1000_MRQC_RSS_FIELD_IPV4 | | |
1717 | E1000_MRQC_RSS_FIELD_IPV4_TCP); | |
1718 | mrqc |= (E1000_MRQC_RSS_FIELD_IPV6 | | |
1719 | E1000_MRQC_RSS_FIELD_IPV6_TCP); | |
1720 | mrqc |= (E1000_MRQC_RSS_FIELD_IPV4_UDP | | |
1721 | E1000_MRQC_RSS_FIELD_IPV6_UDP); | |
1722 | mrqc |= (E1000_MRQC_RSS_FIELD_IPV6_UDP_EX | | |
1723 | E1000_MRQC_RSS_FIELD_IPV6_TCP_EX); | |
1724 | ||
1725 | ||
1726 | wr32(E1000_MRQC, mrqc); | |
1727 | ||
1728 | /* Multiqueue and raw packet checksumming are mutually | |
1729 | * exclusive. Note that this not the same as TCP/IP | |
1730 | * checksumming, which works fine. */ | |
1731 | rxcsum = rd32(E1000_RXCSUM); | |
1732 | rxcsum |= E1000_RXCSUM_PCSD; | |
1733 | wr32(E1000_RXCSUM, rxcsum); | |
1734 | } else { | |
1735 | /* Enable Receive Checksum Offload for TCP and UDP */ | |
1736 | rxcsum = rd32(E1000_RXCSUM); | |
1737 | if (adapter->rx_csum) { | |
1738 | rxcsum |= E1000_RXCSUM_TUOFL; | |
1739 | ||
1740 | /* Enable IPv4 payload checksum for UDP fragments | |
1741 | * Must be used in conjunction with packet-split. */ | |
1742 | if (adapter->rx_ps_hdr_size) | |
1743 | rxcsum |= E1000_RXCSUM_IPPCSE; | |
1744 | } else { | |
1745 | rxcsum &= ~E1000_RXCSUM_TUOFL; | |
1746 | /* don't need to clear IPPCSE as it defaults to 0 */ | |
1747 | } | |
1748 | wr32(E1000_RXCSUM, rxcsum); | |
1749 | } | |
1750 | ||
1751 | if (adapter->vlgrp) | |
1752 | wr32(E1000_RLPML, | |
1753 | adapter->max_frame_size + VLAN_TAG_SIZE); | |
1754 | else | |
1755 | wr32(E1000_RLPML, adapter->max_frame_size); | |
1756 | ||
1757 | /* Enable Receives */ | |
1758 | wr32(E1000_RCTL, rctl); | |
1759 | } | |
1760 | ||
1761 | /** | |
1762 | * igb_free_tx_resources - Free Tx Resources per Queue | |
1763 | * @adapter: board private structure | |
1764 | * @tx_ring: Tx descriptor ring for a specific queue | |
1765 | * | |
1766 | * Free all transmit software resources | |
1767 | **/ | |
1768 | static void igb_free_tx_resources(struct igb_adapter *adapter, | |
1769 | struct igb_ring *tx_ring) | |
1770 | { | |
1771 | struct pci_dev *pdev = adapter->pdev; | |
1772 | ||
1773 | igb_clean_tx_ring(adapter, tx_ring); | |
1774 | ||
1775 | vfree(tx_ring->buffer_info); | |
1776 | tx_ring->buffer_info = NULL; | |
1777 | ||
1778 | pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma); | |
1779 | ||
1780 | tx_ring->desc = NULL; | |
1781 | } | |
1782 | ||
1783 | /** | |
1784 | * igb_free_all_tx_resources - Free Tx Resources for All Queues | |
1785 | * @adapter: board private structure | |
1786 | * | |
1787 | * Free all transmit software resources | |
1788 | **/ | |
1789 | static void igb_free_all_tx_resources(struct igb_adapter *adapter) | |
1790 | { | |
1791 | int i; | |
1792 | ||
1793 | for (i = 0; i < adapter->num_tx_queues; i++) | |
1794 | igb_free_tx_resources(adapter, &adapter->tx_ring[i]); | |
1795 | } | |
1796 | ||
1797 | static void igb_unmap_and_free_tx_resource(struct igb_adapter *adapter, | |
1798 | struct igb_buffer *buffer_info) | |
1799 | { | |
1800 | if (buffer_info->dma) { | |
1801 | pci_unmap_page(adapter->pdev, | |
1802 | buffer_info->dma, | |
1803 | buffer_info->length, | |
1804 | PCI_DMA_TODEVICE); | |
1805 | buffer_info->dma = 0; | |
1806 | } | |
1807 | if (buffer_info->skb) { | |
1808 | dev_kfree_skb_any(buffer_info->skb); | |
1809 | buffer_info->skb = NULL; | |
1810 | } | |
1811 | buffer_info->time_stamp = 0; | |
1812 | /* buffer_info must be completely set up in the transmit path */ | |
1813 | } | |
1814 | ||
1815 | /** | |
1816 | * igb_clean_tx_ring - Free Tx Buffers | |
1817 | * @adapter: board private structure | |
1818 | * @tx_ring: ring to be cleaned | |
1819 | **/ | |
1820 | static void igb_clean_tx_ring(struct igb_adapter *adapter, | |
1821 | struct igb_ring *tx_ring) | |
1822 | { | |
1823 | struct igb_buffer *buffer_info; | |
1824 | unsigned long size; | |
1825 | unsigned int i; | |
1826 | ||
1827 | if (!tx_ring->buffer_info) | |
1828 | return; | |
1829 | /* Free all the Tx ring sk_buffs */ | |
1830 | ||
1831 | for (i = 0; i < tx_ring->count; i++) { | |
1832 | buffer_info = &tx_ring->buffer_info[i]; | |
1833 | igb_unmap_and_free_tx_resource(adapter, buffer_info); | |
1834 | } | |
1835 | ||
1836 | size = sizeof(struct igb_buffer) * tx_ring->count; | |
1837 | memset(tx_ring->buffer_info, 0, size); | |
1838 | ||
1839 | /* Zero out the descriptor ring */ | |
1840 | ||
1841 | memset(tx_ring->desc, 0, tx_ring->size); | |
1842 | ||
1843 | tx_ring->next_to_use = 0; | |
1844 | tx_ring->next_to_clean = 0; | |
1845 | ||
1846 | writel(0, adapter->hw.hw_addr + tx_ring->head); | |
1847 | writel(0, adapter->hw.hw_addr + tx_ring->tail); | |
1848 | } | |
1849 | ||
1850 | /** | |
1851 | * igb_clean_all_tx_rings - Free Tx Buffers for all queues | |
1852 | * @adapter: board private structure | |
1853 | **/ | |
1854 | static void igb_clean_all_tx_rings(struct igb_adapter *adapter) | |
1855 | { | |
1856 | int i; | |
1857 | ||
1858 | for (i = 0; i < adapter->num_tx_queues; i++) | |
1859 | igb_clean_tx_ring(adapter, &adapter->tx_ring[i]); | |
1860 | } | |
1861 | ||
1862 | /** | |
1863 | * igb_free_rx_resources - Free Rx Resources | |
1864 | * @adapter: board private structure | |
1865 | * @rx_ring: ring to clean the resources from | |
1866 | * | |
1867 | * Free all receive software resources | |
1868 | **/ | |
1869 | static void igb_free_rx_resources(struct igb_adapter *adapter, | |
1870 | struct igb_ring *rx_ring) | |
1871 | { | |
1872 | struct pci_dev *pdev = adapter->pdev; | |
1873 | ||
1874 | igb_clean_rx_ring(adapter, rx_ring); | |
1875 | ||
1876 | vfree(rx_ring->buffer_info); | |
1877 | rx_ring->buffer_info = NULL; | |
1878 | ||
1879 | pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma); | |
1880 | ||
1881 | rx_ring->desc = NULL; | |
1882 | } | |
1883 | ||
1884 | /** | |
1885 | * igb_free_all_rx_resources - Free Rx Resources for All Queues | |
1886 | * @adapter: board private structure | |
1887 | * | |
1888 | * Free all receive software resources | |
1889 | **/ | |
1890 | static void igb_free_all_rx_resources(struct igb_adapter *adapter) | |
1891 | { | |
1892 | int i; | |
1893 | ||
1894 | for (i = 0; i < adapter->num_rx_queues; i++) | |
1895 | igb_free_rx_resources(adapter, &adapter->rx_ring[i]); | |
1896 | } | |
1897 | ||
1898 | /** | |
1899 | * igb_clean_rx_ring - Free Rx Buffers per Queue | |
1900 | * @adapter: board private structure | |
1901 | * @rx_ring: ring to free buffers from | |
1902 | **/ | |
1903 | static void igb_clean_rx_ring(struct igb_adapter *adapter, | |
1904 | struct igb_ring *rx_ring) | |
1905 | { | |
1906 | struct igb_buffer *buffer_info; | |
1907 | struct pci_dev *pdev = adapter->pdev; | |
1908 | unsigned long size; | |
1909 | unsigned int i; | |
1910 | ||
1911 | if (!rx_ring->buffer_info) | |
1912 | return; | |
1913 | /* Free all the Rx ring sk_buffs */ | |
1914 | for (i = 0; i < rx_ring->count; i++) { | |
1915 | buffer_info = &rx_ring->buffer_info[i]; | |
1916 | if (buffer_info->dma) { | |
1917 | if (adapter->rx_ps_hdr_size) | |
1918 | pci_unmap_single(pdev, buffer_info->dma, | |
1919 | adapter->rx_ps_hdr_size, | |
1920 | PCI_DMA_FROMDEVICE); | |
1921 | else | |
1922 | pci_unmap_single(pdev, buffer_info->dma, | |
1923 | adapter->rx_buffer_len, | |
1924 | PCI_DMA_FROMDEVICE); | |
1925 | buffer_info->dma = 0; | |
1926 | } | |
1927 | ||
1928 | if (buffer_info->skb) { | |
1929 | dev_kfree_skb(buffer_info->skb); | |
1930 | buffer_info->skb = NULL; | |
1931 | } | |
1932 | if (buffer_info->page) { | |
1933 | pci_unmap_page(pdev, buffer_info->page_dma, | |
1934 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
1935 | put_page(buffer_info->page); | |
1936 | buffer_info->page = NULL; | |
1937 | buffer_info->page_dma = 0; | |
1938 | } | |
1939 | } | |
1940 | ||
1941 | /* there also may be some cached data from a chained receive */ | |
1942 | if (rx_ring->pending_skb) { | |
1943 | dev_kfree_skb(rx_ring->pending_skb); | |
1944 | rx_ring->pending_skb = NULL; | |
1945 | } | |
1946 | ||
1947 | size = sizeof(struct igb_buffer) * rx_ring->count; | |
1948 | memset(rx_ring->buffer_info, 0, size); | |
1949 | ||
1950 | /* Zero out the descriptor ring */ | |
1951 | memset(rx_ring->desc, 0, rx_ring->size); | |
1952 | ||
1953 | rx_ring->next_to_clean = 0; | |
1954 | rx_ring->next_to_use = 0; | |
1955 | ||
1956 | writel(0, adapter->hw.hw_addr + rx_ring->head); | |
1957 | writel(0, adapter->hw.hw_addr + rx_ring->tail); | |
1958 | } | |
1959 | ||
1960 | /** | |
1961 | * igb_clean_all_rx_rings - Free Rx Buffers for all queues | |
1962 | * @adapter: board private structure | |
1963 | **/ | |
1964 | static void igb_clean_all_rx_rings(struct igb_adapter *adapter) | |
1965 | { | |
1966 | int i; | |
1967 | ||
1968 | for (i = 0; i < adapter->num_rx_queues; i++) | |
1969 | igb_clean_rx_ring(adapter, &adapter->rx_ring[i]); | |
1970 | } | |
1971 | ||
1972 | /** | |
1973 | * igb_set_mac - Change the Ethernet Address of the NIC | |
1974 | * @netdev: network interface device structure | |
1975 | * @p: pointer to an address structure | |
1976 | * | |
1977 | * Returns 0 on success, negative on failure | |
1978 | **/ | |
1979 | static int igb_set_mac(struct net_device *netdev, void *p) | |
1980 | { | |
1981 | struct igb_adapter *adapter = netdev_priv(netdev); | |
1982 | struct sockaddr *addr = p; | |
1983 | ||
1984 | if (!is_valid_ether_addr(addr->sa_data)) | |
1985 | return -EADDRNOTAVAIL; | |
1986 | ||
1987 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
1988 | memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len); | |
1989 | ||
1990 | adapter->hw.mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0); | |
1991 | ||
1992 | return 0; | |
1993 | } | |
1994 | ||
1995 | /** | |
1996 | * igb_set_multi - Multicast and Promiscuous mode set | |
1997 | * @netdev: network interface device structure | |
1998 | * | |
1999 | * The set_multi entry point is called whenever the multicast address | |
2000 | * list or the network interface flags are updated. This routine is | |
2001 | * responsible for configuring the hardware for proper multicast, | |
2002 | * promiscuous mode, and all-multi behavior. | |
2003 | **/ | |
2004 | static void igb_set_multi(struct net_device *netdev) | |
2005 | { | |
2006 | struct igb_adapter *adapter = netdev_priv(netdev); | |
2007 | struct e1000_hw *hw = &adapter->hw; | |
2008 | struct e1000_mac_info *mac = &hw->mac; | |
2009 | struct dev_mc_list *mc_ptr; | |
2010 | u8 *mta_list; | |
2011 | u32 rctl; | |
2012 | int i; | |
2013 | ||
2014 | /* Check for Promiscuous and All Multicast modes */ | |
2015 | ||
2016 | rctl = rd32(E1000_RCTL); | |
2017 | ||
2018 | if (netdev->flags & IFF_PROMISC) | |
2019 | rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE); | |
2020 | else if (netdev->flags & IFF_ALLMULTI) { | |
2021 | rctl |= E1000_RCTL_MPE; | |
2022 | rctl &= ~E1000_RCTL_UPE; | |
2023 | } else | |
2024 | rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE); | |
2025 | ||
2026 | wr32(E1000_RCTL, rctl); | |
2027 | ||
2028 | if (!netdev->mc_count) { | |
2029 | /* nothing to program, so clear mc list */ | |
2030 | igb_update_mc_addr_list(hw, NULL, 0, 1, | |
2031 | mac->rar_entry_count); | |
2032 | return; | |
2033 | } | |
2034 | ||
2035 | mta_list = kzalloc(netdev->mc_count * 6, GFP_ATOMIC); | |
2036 | if (!mta_list) | |
2037 | return; | |
2038 | ||
2039 | /* The shared function expects a packed array of only addresses. */ | |
2040 | mc_ptr = netdev->mc_list; | |
2041 | ||
2042 | for (i = 0; i < netdev->mc_count; i++) { | |
2043 | if (!mc_ptr) | |
2044 | break; | |
2045 | memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr, ETH_ALEN); | |
2046 | mc_ptr = mc_ptr->next; | |
2047 | } | |
2048 | igb_update_mc_addr_list(hw, mta_list, i, 1, mac->rar_entry_count); | |
2049 | kfree(mta_list); | |
2050 | } | |
2051 | ||
2052 | /* Need to wait a few seconds after link up to get diagnostic information from | |
2053 | * the phy */ | |
2054 | static void igb_update_phy_info(unsigned long data) | |
2055 | { | |
2056 | struct igb_adapter *adapter = (struct igb_adapter *) data; | |
68707acb BH |
2057 | if (adapter->hw.phy.ops.get_phy_info) |
2058 | adapter->hw.phy.ops.get_phy_info(&adapter->hw); | |
9d5c8243 AK |
2059 | } |
2060 | ||
2061 | /** | |
2062 | * igb_watchdog - Timer Call-back | |
2063 | * @data: pointer to adapter cast into an unsigned long | |
2064 | **/ | |
2065 | static void igb_watchdog(unsigned long data) | |
2066 | { | |
2067 | struct igb_adapter *adapter = (struct igb_adapter *)data; | |
2068 | /* Do the rest outside of interrupt context */ | |
2069 | schedule_work(&adapter->watchdog_task); | |
2070 | } | |
2071 | ||
2072 | static void igb_watchdog_task(struct work_struct *work) | |
2073 | { | |
2074 | struct igb_adapter *adapter = container_of(work, | |
2075 | struct igb_adapter, watchdog_task); | |
2076 | struct e1000_hw *hw = &adapter->hw; | |
2077 | ||
2078 | struct net_device *netdev = adapter->netdev; | |
2079 | struct igb_ring *tx_ring = adapter->tx_ring; | |
2080 | struct e1000_mac_info *mac = &adapter->hw.mac; | |
2081 | u32 link; | |
2082 | s32 ret_val; | |
2083 | ||
2084 | if ((netif_carrier_ok(netdev)) && | |
2085 | (rd32(E1000_STATUS) & E1000_STATUS_LU)) | |
2086 | goto link_up; | |
2087 | ||
2088 | ret_val = hw->mac.ops.check_for_link(&adapter->hw); | |
2089 | if ((ret_val == E1000_ERR_PHY) && | |
2090 | (hw->phy.type == e1000_phy_igp_3) && | |
2091 | (rd32(E1000_CTRL) & | |
2092 | E1000_PHY_CTRL_GBE_DISABLE)) | |
2093 | dev_info(&adapter->pdev->dev, | |
2094 | "Gigabit has been disabled, downgrading speed\n"); | |
2095 | ||
2096 | if ((hw->phy.media_type == e1000_media_type_internal_serdes) && | |
2097 | !(rd32(E1000_TXCW) & E1000_TXCW_ANE)) | |
2098 | link = mac->serdes_has_link; | |
2099 | else | |
2100 | link = rd32(E1000_STATUS) & | |
2101 | E1000_STATUS_LU; | |
2102 | ||
2103 | if (link) { | |
2104 | if (!netif_carrier_ok(netdev)) { | |
2105 | u32 ctrl; | |
2106 | hw->mac.ops.get_speed_and_duplex(&adapter->hw, | |
2107 | &adapter->link_speed, | |
2108 | &adapter->link_duplex); | |
2109 | ||
2110 | ctrl = rd32(E1000_CTRL); | |
2111 | dev_info(&adapter->pdev->dev, | |
2112 | "NIC Link is Up %d Mbps %s, " | |
2113 | "Flow Control: %s\n", | |
2114 | adapter->link_speed, | |
2115 | adapter->link_duplex == FULL_DUPLEX ? | |
2116 | "Full Duplex" : "Half Duplex", | |
2117 | ((ctrl & E1000_CTRL_TFCE) && (ctrl & | |
2118 | E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl & | |
2119 | E1000_CTRL_RFCE) ? "RX" : ((ctrl & | |
2120 | E1000_CTRL_TFCE) ? "TX" : "None"))); | |
2121 | ||
2122 | /* tweak tx_queue_len according to speed/duplex and | |
2123 | * adjust the timeout factor */ | |
2124 | netdev->tx_queue_len = adapter->tx_queue_len; | |
2125 | adapter->tx_timeout_factor = 1; | |
2126 | switch (adapter->link_speed) { | |
2127 | case SPEED_10: | |
2128 | netdev->tx_queue_len = 10; | |
2129 | adapter->tx_timeout_factor = 14; | |
2130 | break; | |
2131 | case SPEED_100: | |
2132 | netdev->tx_queue_len = 100; | |
2133 | /* maybe add some timeout factor ? */ | |
2134 | break; | |
2135 | } | |
2136 | ||
2137 | netif_carrier_on(netdev); | |
2138 | netif_wake_queue(netdev); | |
2139 | ||
2140 | if (!test_bit(__IGB_DOWN, &adapter->state)) | |
2141 | mod_timer(&adapter->phy_info_timer, | |
2142 | round_jiffies(jiffies + 2 * HZ)); | |
2143 | } | |
2144 | } else { | |
2145 | if (netif_carrier_ok(netdev)) { | |
2146 | adapter->link_speed = 0; | |
2147 | adapter->link_duplex = 0; | |
2148 | dev_info(&adapter->pdev->dev, "NIC Link is Down\n"); | |
2149 | netif_carrier_off(netdev); | |
2150 | netif_stop_queue(netdev); | |
2151 | if (!test_bit(__IGB_DOWN, &adapter->state)) | |
2152 | mod_timer(&adapter->phy_info_timer, | |
2153 | round_jiffies(jiffies + 2 * HZ)); | |
2154 | } | |
2155 | } | |
2156 | ||
2157 | link_up: | |
2158 | igb_update_stats(adapter); | |
2159 | ||
2160 | mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; | |
2161 | adapter->tpt_old = adapter->stats.tpt; | |
2162 | mac->collision_delta = adapter->stats.colc - adapter->colc_old; | |
2163 | adapter->colc_old = adapter->stats.colc; | |
2164 | ||
2165 | adapter->gorc = adapter->stats.gorc - adapter->gorc_old; | |
2166 | adapter->gorc_old = adapter->stats.gorc; | |
2167 | adapter->gotc = adapter->stats.gotc - adapter->gotc_old; | |
2168 | adapter->gotc_old = adapter->stats.gotc; | |
2169 | ||
2170 | igb_update_adaptive(&adapter->hw); | |
2171 | ||
2172 | if (!netif_carrier_ok(netdev)) { | |
2173 | if (IGB_DESC_UNUSED(tx_ring) + 1 < tx_ring->count) { | |
2174 | /* We've lost link, so the controller stops DMA, | |
2175 | * but we've got queued Tx work that's never going | |
2176 | * to get done, so reset controller to flush Tx. | |
2177 | * (Do the reset outside of interrupt context). */ | |
2178 | adapter->tx_timeout_count++; | |
2179 | schedule_work(&adapter->reset_task); | |
2180 | } | |
2181 | } | |
2182 | ||
2183 | /* Cause software interrupt to ensure rx ring is cleaned */ | |
2184 | wr32(E1000_ICS, E1000_ICS_RXDMT0); | |
2185 | ||
2186 | /* Force detection of hung controller every watchdog period */ | |
2187 | tx_ring->detect_tx_hung = true; | |
2188 | ||
2189 | /* Reset the timer */ | |
2190 | if (!test_bit(__IGB_DOWN, &adapter->state)) | |
2191 | mod_timer(&adapter->watchdog_timer, | |
2192 | round_jiffies(jiffies + 2 * HZ)); | |
2193 | } | |
2194 | ||
2195 | enum latency_range { | |
2196 | lowest_latency = 0, | |
2197 | low_latency = 1, | |
2198 | bulk_latency = 2, | |
2199 | latency_invalid = 255 | |
2200 | }; | |
2201 | ||
2202 | ||
2203 | static void igb_lower_rx_eitr(struct igb_adapter *adapter, | |
2204 | struct igb_ring *rx_ring) | |
2205 | { | |
2206 | struct e1000_hw *hw = &adapter->hw; | |
2207 | int new_val; | |
2208 | ||
2209 | new_val = rx_ring->itr_val / 2; | |
2210 | if (new_val < IGB_MIN_DYN_ITR) | |
2211 | new_val = IGB_MIN_DYN_ITR; | |
2212 | ||
2213 | if (new_val != rx_ring->itr_val) { | |
2214 | rx_ring->itr_val = new_val; | |
2215 | wr32(rx_ring->itr_register, | |
2216 | 1000000000 / (new_val * 256)); | |
2217 | } | |
2218 | } | |
2219 | ||
2220 | static void igb_raise_rx_eitr(struct igb_adapter *adapter, | |
2221 | struct igb_ring *rx_ring) | |
2222 | { | |
2223 | struct e1000_hw *hw = &adapter->hw; | |
2224 | int new_val; | |
2225 | ||
2226 | new_val = rx_ring->itr_val * 2; | |
2227 | if (new_val > IGB_MAX_DYN_ITR) | |
2228 | new_val = IGB_MAX_DYN_ITR; | |
2229 | ||
2230 | if (new_val != rx_ring->itr_val) { | |
2231 | rx_ring->itr_val = new_val; | |
2232 | wr32(rx_ring->itr_register, | |
2233 | 1000000000 / (new_val * 256)); | |
2234 | } | |
2235 | } | |
2236 | ||
2237 | /** | |
2238 | * igb_update_itr - update the dynamic ITR value based on statistics | |
2239 | * Stores a new ITR value based on packets and byte | |
2240 | * counts during the last interrupt. The advantage of per interrupt | |
2241 | * computation is faster updates and more accurate ITR for the current | |
2242 | * traffic pattern. Constants in this function were computed | |
2243 | * based on theoretical maximum wire speed and thresholds were set based | |
2244 | * on testing data as well as attempting to minimize response time | |
2245 | * while increasing bulk throughput. | |
2246 | * this functionality is controlled by the InterruptThrottleRate module | |
2247 | * parameter (see igb_param.c) | |
2248 | * NOTE: These calculations are only valid when operating in a single- | |
2249 | * queue environment. | |
2250 | * @adapter: pointer to adapter | |
2251 | * @itr_setting: current adapter->itr | |
2252 | * @packets: the number of packets during this measurement interval | |
2253 | * @bytes: the number of bytes during this measurement interval | |
2254 | **/ | |
2255 | static unsigned int igb_update_itr(struct igb_adapter *adapter, u16 itr_setting, | |
2256 | int packets, int bytes) | |
2257 | { | |
2258 | unsigned int retval = itr_setting; | |
2259 | ||
2260 | if (packets == 0) | |
2261 | goto update_itr_done; | |
2262 | ||
2263 | switch (itr_setting) { | |
2264 | case lowest_latency: | |
2265 | /* handle TSO and jumbo frames */ | |
2266 | if (bytes/packets > 8000) | |
2267 | retval = bulk_latency; | |
2268 | else if ((packets < 5) && (bytes > 512)) | |
2269 | retval = low_latency; | |
2270 | break; | |
2271 | case low_latency: /* 50 usec aka 20000 ints/s */ | |
2272 | if (bytes > 10000) { | |
2273 | /* this if handles the TSO accounting */ | |
2274 | if (bytes/packets > 8000) { | |
2275 | retval = bulk_latency; | |
2276 | } else if ((packets < 10) || ((bytes/packets) > 1200)) { | |
2277 | retval = bulk_latency; | |
2278 | } else if ((packets > 35)) { | |
2279 | retval = lowest_latency; | |
2280 | } | |
2281 | } else if (bytes/packets > 2000) { | |
2282 | retval = bulk_latency; | |
2283 | } else if (packets <= 2 && bytes < 512) { | |
2284 | retval = lowest_latency; | |
2285 | } | |
2286 | break; | |
2287 | case bulk_latency: /* 250 usec aka 4000 ints/s */ | |
2288 | if (bytes > 25000) { | |
2289 | if (packets > 35) | |
2290 | retval = low_latency; | |
2291 | } else if (bytes < 6000) { | |
2292 | retval = low_latency; | |
2293 | } | |
2294 | break; | |
2295 | } | |
2296 | ||
2297 | update_itr_done: | |
2298 | return retval; | |
2299 | } | |
2300 | ||
2301 | static void igb_set_itr(struct igb_adapter *adapter, u16 itr_register, | |
2302 | int rx_only) | |
2303 | { | |
2304 | u16 current_itr; | |
2305 | u32 new_itr = adapter->itr; | |
2306 | ||
2307 | /* for non-gigabit speeds, just fix the interrupt rate at 4000 */ | |
2308 | if (adapter->link_speed != SPEED_1000) { | |
2309 | current_itr = 0; | |
2310 | new_itr = 4000; | |
2311 | goto set_itr_now; | |
2312 | } | |
2313 | ||
2314 | adapter->rx_itr = igb_update_itr(adapter, | |
2315 | adapter->rx_itr, | |
2316 | adapter->rx_ring->total_packets, | |
2317 | adapter->rx_ring->total_bytes); | |
2318 | /* conservative mode (itr 3) eliminates the lowest_latency setting */ | |
2319 | if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency) | |
2320 | adapter->rx_itr = low_latency; | |
2321 | ||
2322 | if (!rx_only) { | |
2323 | adapter->tx_itr = igb_update_itr(adapter, | |
2324 | adapter->tx_itr, | |
2325 | adapter->tx_ring->total_packets, | |
2326 | adapter->tx_ring->total_bytes); | |
2327 | /* conservative mode (itr 3) eliminates the | |
2328 | * lowest_latency setting */ | |
2329 | if (adapter->itr_setting == 3 && | |
2330 | adapter->tx_itr == lowest_latency) | |
2331 | adapter->tx_itr = low_latency; | |
2332 | ||
2333 | current_itr = max(adapter->rx_itr, adapter->tx_itr); | |
2334 | } else { | |
2335 | current_itr = adapter->rx_itr; | |
2336 | } | |
2337 | ||
2338 | switch (current_itr) { | |
2339 | /* counts and packets in update_itr are dependent on these numbers */ | |
2340 | case lowest_latency: | |
2341 | new_itr = 70000; | |
2342 | break; | |
2343 | case low_latency: | |
2344 | new_itr = 20000; /* aka hwitr = ~200 */ | |
2345 | break; | |
2346 | case bulk_latency: | |
2347 | new_itr = 4000; | |
2348 | break; | |
2349 | default: | |
2350 | break; | |
2351 | } | |
2352 | ||
2353 | set_itr_now: | |
2354 | if (new_itr != adapter->itr) { | |
2355 | /* this attempts to bias the interrupt rate towards Bulk | |
2356 | * by adding intermediate steps when interrupt rate is | |
2357 | * increasing */ | |
2358 | new_itr = new_itr > adapter->itr ? | |
2359 | min(adapter->itr + (new_itr >> 2), new_itr) : | |
2360 | new_itr; | |
2361 | /* Don't write the value here; it resets the adapter's | |
2362 | * internal timer, and causes us to delay far longer than | |
2363 | * we should between interrupts. Instead, we write the ITR | |
2364 | * value at the beginning of the next interrupt so the timing | |
2365 | * ends up being correct. | |
2366 | */ | |
2367 | adapter->itr = new_itr; | |
2368 | adapter->set_itr = 1; | |
2369 | } | |
2370 | ||
2371 | return; | |
2372 | } | |
2373 | ||
2374 | ||
2375 | #define IGB_TX_FLAGS_CSUM 0x00000001 | |
2376 | #define IGB_TX_FLAGS_VLAN 0x00000002 | |
2377 | #define IGB_TX_FLAGS_TSO 0x00000004 | |
2378 | #define IGB_TX_FLAGS_IPV4 0x00000008 | |
2379 | #define IGB_TX_FLAGS_VLAN_MASK 0xffff0000 | |
2380 | #define IGB_TX_FLAGS_VLAN_SHIFT 16 | |
2381 | ||
2382 | static inline int igb_tso_adv(struct igb_adapter *adapter, | |
2383 | struct igb_ring *tx_ring, | |
2384 | struct sk_buff *skb, u32 tx_flags, u8 *hdr_len) | |
2385 | { | |
2386 | struct e1000_adv_tx_context_desc *context_desc; | |
2387 | unsigned int i; | |
2388 | int err; | |
2389 | struct igb_buffer *buffer_info; | |
2390 | u32 info = 0, tu_cmd = 0; | |
2391 | u32 mss_l4len_idx, l4len; | |
2392 | *hdr_len = 0; | |
2393 | ||
2394 | if (skb_header_cloned(skb)) { | |
2395 | err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); | |
2396 | if (err) | |
2397 | return err; | |
2398 | } | |
2399 | ||
2400 | l4len = tcp_hdrlen(skb); | |
2401 | *hdr_len += l4len; | |
2402 | ||
2403 | if (skb->protocol == htons(ETH_P_IP)) { | |
2404 | struct iphdr *iph = ip_hdr(skb); | |
2405 | iph->tot_len = 0; | |
2406 | iph->check = 0; | |
2407 | tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, | |
2408 | iph->daddr, 0, | |
2409 | IPPROTO_TCP, | |
2410 | 0); | |
2411 | } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) { | |
2412 | ipv6_hdr(skb)->payload_len = 0; | |
2413 | tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr, | |
2414 | &ipv6_hdr(skb)->daddr, | |
2415 | 0, IPPROTO_TCP, 0); | |
2416 | } | |
2417 | ||
2418 | i = tx_ring->next_to_use; | |
2419 | ||
2420 | buffer_info = &tx_ring->buffer_info[i]; | |
2421 | context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i); | |
2422 | /* VLAN MACLEN IPLEN */ | |
2423 | if (tx_flags & IGB_TX_FLAGS_VLAN) | |
2424 | info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK); | |
2425 | info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT); | |
2426 | *hdr_len += skb_network_offset(skb); | |
2427 | info |= skb_network_header_len(skb); | |
2428 | *hdr_len += skb_network_header_len(skb); | |
2429 | context_desc->vlan_macip_lens = cpu_to_le32(info); | |
2430 | ||
2431 | /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */ | |
2432 | tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT); | |
2433 | ||
2434 | if (skb->protocol == htons(ETH_P_IP)) | |
2435 | tu_cmd |= E1000_ADVTXD_TUCMD_IPV4; | |
2436 | tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP; | |
2437 | ||
2438 | context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd); | |
2439 | ||
2440 | /* MSS L4LEN IDX */ | |
2441 | mss_l4len_idx = (skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT); | |
2442 | mss_l4len_idx |= (l4len << E1000_ADVTXD_L4LEN_SHIFT); | |
2443 | ||
2444 | /* Context index must be unique per ring. Luckily, so is the interrupt | |
2445 | * mask value. */ | |
2446 | mss_l4len_idx |= tx_ring->eims_value >> 4; | |
2447 | ||
2448 | context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx); | |
2449 | context_desc->seqnum_seed = 0; | |
2450 | ||
2451 | buffer_info->time_stamp = jiffies; | |
2452 | buffer_info->dma = 0; | |
2453 | i++; | |
2454 | if (i == tx_ring->count) | |
2455 | i = 0; | |
2456 | ||
2457 | tx_ring->next_to_use = i; | |
2458 | ||
2459 | return true; | |
2460 | } | |
2461 | ||
2462 | static inline bool igb_tx_csum_adv(struct igb_adapter *adapter, | |
2463 | struct igb_ring *tx_ring, | |
2464 | struct sk_buff *skb, u32 tx_flags) | |
2465 | { | |
2466 | struct e1000_adv_tx_context_desc *context_desc; | |
2467 | unsigned int i; | |
2468 | struct igb_buffer *buffer_info; | |
2469 | u32 info = 0, tu_cmd = 0; | |
2470 | ||
2471 | if ((skb->ip_summed == CHECKSUM_PARTIAL) || | |
2472 | (tx_flags & IGB_TX_FLAGS_VLAN)) { | |
2473 | i = tx_ring->next_to_use; | |
2474 | buffer_info = &tx_ring->buffer_info[i]; | |
2475 | context_desc = E1000_TX_CTXTDESC_ADV(*tx_ring, i); | |
2476 | ||
2477 | if (tx_flags & IGB_TX_FLAGS_VLAN) | |
2478 | info |= (tx_flags & IGB_TX_FLAGS_VLAN_MASK); | |
2479 | info |= (skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT); | |
2480 | if (skb->ip_summed == CHECKSUM_PARTIAL) | |
2481 | info |= skb_network_header_len(skb); | |
2482 | ||
2483 | context_desc->vlan_macip_lens = cpu_to_le32(info); | |
2484 | ||
2485 | tu_cmd |= (E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT); | |
2486 | ||
2487 | if (skb->ip_summed == CHECKSUM_PARTIAL) { | |
44b0cda3 MW |
2488 | switch (skb->protocol) { |
2489 | case __constant_htons(ETH_P_IP): | |
9d5c8243 | 2490 | tu_cmd |= E1000_ADVTXD_TUCMD_IPV4; |
44b0cda3 MW |
2491 | if (ip_hdr(skb)->protocol == IPPROTO_TCP) |
2492 | tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP; | |
2493 | break; | |
2494 | case __constant_htons(ETH_P_IPV6): | |
2495 | /* XXX what about other V6 headers?? */ | |
2496 | if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP) | |
2497 | tu_cmd |= E1000_ADVTXD_TUCMD_L4T_TCP; | |
2498 | break; | |
2499 | default: | |
2500 | if (unlikely(net_ratelimit())) | |
2501 | dev_warn(&adapter->pdev->dev, | |
2502 | "partial checksum but proto=%x!\n", | |
2503 | skb->protocol); | |
2504 | break; | |
2505 | } | |
9d5c8243 AK |
2506 | } |
2507 | ||
2508 | context_desc->type_tucmd_mlhl = cpu_to_le32(tu_cmd); | |
2509 | context_desc->seqnum_seed = 0; | |
2510 | context_desc->mss_l4len_idx = | |
2511 | cpu_to_le32(tx_ring->eims_value >> 4); | |
2512 | ||
2513 | buffer_info->time_stamp = jiffies; | |
2514 | buffer_info->dma = 0; | |
2515 | ||
2516 | i++; | |
2517 | if (i == tx_ring->count) | |
2518 | i = 0; | |
2519 | tx_ring->next_to_use = i; | |
2520 | ||
2521 | return true; | |
2522 | } | |
2523 | ||
2524 | ||
2525 | return false; | |
2526 | } | |
2527 | ||
2528 | #define IGB_MAX_TXD_PWR 16 | |
2529 | #define IGB_MAX_DATA_PER_TXD (1<<IGB_MAX_TXD_PWR) | |
2530 | ||
2531 | static inline int igb_tx_map_adv(struct igb_adapter *adapter, | |
2532 | struct igb_ring *tx_ring, | |
2533 | struct sk_buff *skb) | |
2534 | { | |
2535 | struct igb_buffer *buffer_info; | |
2536 | unsigned int len = skb_headlen(skb); | |
2537 | unsigned int count = 0, i; | |
2538 | unsigned int f; | |
2539 | ||
2540 | i = tx_ring->next_to_use; | |
2541 | ||
2542 | buffer_info = &tx_ring->buffer_info[i]; | |
2543 | BUG_ON(len >= IGB_MAX_DATA_PER_TXD); | |
2544 | buffer_info->length = len; | |
2545 | /* set time_stamp *before* dma to help avoid a possible race */ | |
2546 | buffer_info->time_stamp = jiffies; | |
2547 | buffer_info->dma = pci_map_single(adapter->pdev, skb->data, len, | |
2548 | PCI_DMA_TODEVICE); | |
2549 | count++; | |
2550 | i++; | |
2551 | if (i == tx_ring->count) | |
2552 | i = 0; | |
2553 | ||
2554 | for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) { | |
2555 | struct skb_frag_struct *frag; | |
2556 | ||
2557 | frag = &skb_shinfo(skb)->frags[f]; | |
2558 | len = frag->size; | |
2559 | ||
2560 | buffer_info = &tx_ring->buffer_info[i]; | |
2561 | BUG_ON(len >= IGB_MAX_DATA_PER_TXD); | |
2562 | buffer_info->length = len; | |
2563 | buffer_info->time_stamp = jiffies; | |
2564 | buffer_info->dma = pci_map_page(adapter->pdev, | |
2565 | frag->page, | |
2566 | frag->page_offset, | |
2567 | len, | |
2568 | PCI_DMA_TODEVICE); | |
2569 | ||
2570 | count++; | |
2571 | i++; | |
2572 | if (i == tx_ring->count) | |
2573 | i = 0; | |
2574 | } | |
2575 | ||
2576 | i = (i == 0) ? tx_ring->count - 1 : i - 1; | |
2577 | tx_ring->buffer_info[i].skb = skb; | |
2578 | ||
2579 | return count; | |
2580 | } | |
2581 | ||
2582 | static inline void igb_tx_queue_adv(struct igb_adapter *adapter, | |
2583 | struct igb_ring *tx_ring, | |
2584 | int tx_flags, int count, u32 paylen, | |
2585 | u8 hdr_len) | |
2586 | { | |
2587 | union e1000_adv_tx_desc *tx_desc = NULL; | |
2588 | struct igb_buffer *buffer_info; | |
2589 | u32 olinfo_status = 0, cmd_type_len; | |
2590 | unsigned int i; | |
2591 | ||
2592 | cmd_type_len = (E1000_ADVTXD_DTYP_DATA | E1000_ADVTXD_DCMD_IFCS | | |
2593 | E1000_ADVTXD_DCMD_DEXT); | |
2594 | ||
2595 | if (tx_flags & IGB_TX_FLAGS_VLAN) | |
2596 | cmd_type_len |= E1000_ADVTXD_DCMD_VLE; | |
2597 | ||
2598 | if (tx_flags & IGB_TX_FLAGS_TSO) { | |
2599 | cmd_type_len |= E1000_ADVTXD_DCMD_TSE; | |
2600 | ||
2601 | /* insert tcp checksum */ | |
2602 | olinfo_status |= E1000_TXD_POPTS_TXSM << 8; | |
2603 | ||
2604 | /* insert ip checksum */ | |
2605 | if (tx_flags & IGB_TX_FLAGS_IPV4) | |
2606 | olinfo_status |= E1000_TXD_POPTS_IXSM << 8; | |
2607 | ||
2608 | } else if (tx_flags & IGB_TX_FLAGS_CSUM) { | |
2609 | olinfo_status |= E1000_TXD_POPTS_TXSM << 8; | |
2610 | } | |
2611 | ||
2612 | if (tx_flags & (IGB_TX_FLAGS_CSUM | IGB_TX_FLAGS_TSO | | |
2613 | IGB_TX_FLAGS_VLAN)) | |
2614 | olinfo_status |= tx_ring->eims_value >> 4; | |
2615 | ||
2616 | olinfo_status |= ((paylen - hdr_len) << E1000_ADVTXD_PAYLEN_SHIFT); | |
2617 | ||
2618 | i = tx_ring->next_to_use; | |
2619 | while (count--) { | |
2620 | buffer_info = &tx_ring->buffer_info[i]; | |
2621 | tx_desc = E1000_TX_DESC_ADV(*tx_ring, i); | |
2622 | tx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma); | |
2623 | tx_desc->read.cmd_type_len = | |
2624 | cpu_to_le32(cmd_type_len | buffer_info->length); | |
2625 | tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status); | |
2626 | i++; | |
2627 | if (i == tx_ring->count) | |
2628 | i = 0; | |
2629 | } | |
2630 | ||
2631 | tx_desc->read.cmd_type_len |= cpu_to_le32(adapter->txd_cmd); | |
2632 | /* Force memory writes to complete before letting h/w | |
2633 | * know there are new descriptors to fetch. (Only | |
2634 | * applicable for weak-ordered memory model archs, | |
2635 | * such as IA-64). */ | |
2636 | wmb(); | |
2637 | ||
2638 | tx_ring->next_to_use = i; | |
2639 | writel(i, adapter->hw.hw_addr + tx_ring->tail); | |
2640 | /* we need this if more than one processor can write to our tail | |
2641 | * at a time, it syncronizes IO on IA64/Altix systems */ | |
2642 | mmiowb(); | |
2643 | } | |
2644 | ||
2645 | static int __igb_maybe_stop_tx(struct net_device *netdev, | |
2646 | struct igb_ring *tx_ring, int size) | |
2647 | { | |
2648 | struct igb_adapter *adapter = netdev_priv(netdev); | |
2649 | ||
2650 | netif_stop_queue(netdev); | |
2651 | /* Herbert's original patch had: | |
2652 | * smp_mb__after_netif_stop_queue(); | |
2653 | * but since that doesn't exist yet, just open code it. */ | |
2654 | smp_mb(); | |
2655 | ||
2656 | /* We need to check again in a case another CPU has just | |
2657 | * made room available. */ | |
2658 | if (IGB_DESC_UNUSED(tx_ring) < size) | |
2659 | return -EBUSY; | |
2660 | ||
2661 | /* A reprieve! */ | |
2662 | netif_start_queue(netdev); | |
2663 | ++adapter->restart_queue; | |
2664 | return 0; | |
2665 | } | |
2666 | ||
2667 | static int igb_maybe_stop_tx(struct net_device *netdev, | |
2668 | struct igb_ring *tx_ring, int size) | |
2669 | { | |
2670 | if (IGB_DESC_UNUSED(tx_ring) >= size) | |
2671 | return 0; | |
2672 | return __igb_maybe_stop_tx(netdev, tx_ring, size); | |
2673 | } | |
2674 | ||
2675 | #define TXD_USE_COUNT(S) (((S) >> (IGB_MAX_TXD_PWR)) + 1) | |
2676 | ||
2677 | static int igb_xmit_frame_ring_adv(struct sk_buff *skb, | |
2678 | struct net_device *netdev, | |
2679 | struct igb_ring *tx_ring) | |
2680 | { | |
2681 | struct igb_adapter *adapter = netdev_priv(netdev); | |
2682 | unsigned int tx_flags = 0; | |
2683 | unsigned int len; | |
2684 | unsigned long irq_flags; | |
2685 | u8 hdr_len = 0; | |
2686 | int tso = 0; | |
2687 | ||
2688 | len = skb_headlen(skb); | |
2689 | ||
2690 | if (test_bit(__IGB_DOWN, &adapter->state)) { | |
2691 | dev_kfree_skb_any(skb); | |
2692 | return NETDEV_TX_OK; | |
2693 | } | |
2694 | ||
2695 | if (skb->len <= 0) { | |
2696 | dev_kfree_skb_any(skb); | |
2697 | return NETDEV_TX_OK; | |
2698 | } | |
2699 | ||
2700 | if (!spin_trylock_irqsave(&tx_ring->tx_lock, irq_flags)) | |
2701 | /* Collision - tell upper layer to requeue */ | |
2702 | return NETDEV_TX_LOCKED; | |
2703 | ||
2704 | /* need: 1 descriptor per page, | |
2705 | * + 2 desc gap to keep tail from touching head, | |
2706 | * + 1 desc for skb->data, | |
2707 | * + 1 desc for context descriptor, | |
2708 | * otherwise try next time */ | |
2709 | if (igb_maybe_stop_tx(netdev, tx_ring, skb_shinfo(skb)->nr_frags + 4)) { | |
2710 | /* this is a hard error */ | |
2711 | spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags); | |
2712 | return NETDEV_TX_BUSY; | |
2713 | } | |
2714 | ||
2715 | if (adapter->vlgrp && vlan_tx_tag_present(skb)) { | |
2716 | tx_flags |= IGB_TX_FLAGS_VLAN; | |
2717 | tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT); | |
2718 | } | |
2719 | ||
2720 | tso = skb_is_gso(skb) ? igb_tso_adv(adapter, tx_ring, skb, tx_flags, | |
2721 | &hdr_len) : 0; | |
2722 | ||
2723 | if (tso < 0) { | |
2724 | dev_kfree_skb_any(skb); | |
2725 | spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags); | |
2726 | return NETDEV_TX_OK; | |
2727 | } | |
2728 | ||
2729 | if (tso) | |
2730 | tx_flags |= IGB_TX_FLAGS_TSO; | |
2731 | else if (igb_tx_csum_adv(adapter, tx_ring, skb, tx_flags)) | |
2732 | if (skb->ip_summed == CHECKSUM_PARTIAL) | |
2733 | tx_flags |= IGB_TX_FLAGS_CSUM; | |
2734 | ||
2735 | if (skb->protocol == htons(ETH_P_IP)) | |
2736 | tx_flags |= IGB_TX_FLAGS_IPV4; | |
2737 | ||
2738 | igb_tx_queue_adv(adapter, tx_ring, tx_flags, | |
2739 | igb_tx_map_adv(adapter, tx_ring, skb), | |
2740 | skb->len, hdr_len); | |
2741 | ||
2742 | netdev->trans_start = jiffies; | |
2743 | ||
2744 | /* Make sure there is space in the ring for the next send. */ | |
2745 | igb_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 4); | |
2746 | ||
2747 | spin_unlock_irqrestore(&tx_ring->tx_lock, irq_flags); | |
2748 | return NETDEV_TX_OK; | |
2749 | } | |
2750 | ||
2751 | static int igb_xmit_frame_adv(struct sk_buff *skb, struct net_device *netdev) | |
2752 | { | |
2753 | struct igb_adapter *adapter = netdev_priv(netdev); | |
2754 | struct igb_ring *tx_ring = &adapter->tx_ring[0]; | |
2755 | ||
2756 | /* This goes back to the question of how to logically map a tx queue | |
2757 | * to a flow. Right now, performance is impacted slightly negatively | |
2758 | * if using multiple tx queues. If the stack breaks away from a | |
2759 | * single qdisc implementation, we can look at this again. */ | |
2760 | return (igb_xmit_frame_ring_adv(skb, netdev, tx_ring)); | |
2761 | } | |
2762 | ||
2763 | /** | |
2764 | * igb_tx_timeout - Respond to a Tx Hang | |
2765 | * @netdev: network interface device structure | |
2766 | **/ | |
2767 | static void igb_tx_timeout(struct net_device *netdev) | |
2768 | { | |
2769 | struct igb_adapter *adapter = netdev_priv(netdev); | |
2770 | struct e1000_hw *hw = &adapter->hw; | |
2771 | ||
2772 | /* Do the reset outside of interrupt context */ | |
2773 | adapter->tx_timeout_count++; | |
2774 | schedule_work(&adapter->reset_task); | |
2775 | wr32(E1000_EICS, adapter->eims_enable_mask & | |
2776 | ~(E1000_EIMS_TCP_TIMER | E1000_EIMS_OTHER)); | |
2777 | } | |
2778 | ||
2779 | static void igb_reset_task(struct work_struct *work) | |
2780 | { | |
2781 | struct igb_adapter *adapter; | |
2782 | adapter = container_of(work, struct igb_adapter, reset_task); | |
2783 | ||
2784 | igb_reinit_locked(adapter); | |
2785 | } | |
2786 | ||
2787 | /** | |
2788 | * igb_get_stats - Get System Network Statistics | |
2789 | * @netdev: network interface device structure | |
2790 | * | |
2791 | * Returns the address of the device statistics structure. | |
2792 | * The statistics are actually updated from the timer callback. | |
2793 | **/ | |
2794 | static struct net_device_stats * | |
2795 | igb_get_stats(struct net_device *netdev) | |
2796 | { | |
2797 | struct igb_adapter *adapter = netdev_priv(netdev); | |
2798 | ||
2799 | /* only return the current stats */ | |
2800 | return &adapter->net_stats; | |
2801 | } | |
2802 | ||
2803 | /** | |
2804 | * igb_change_mtu - Change the Maximum Transfer Unit | |
2805 | * @netdev: network interface device structure | |
2806 | * @new_mtu: new value for maximum frame size | |
2807 | * | |
2808 | * Returns 0 on success, negative on failure | |
2809 | **/ | |
2810 | static int igb_change_mtu(struct net_device *netdev, int new_mtu) | |
2811 | { | |
2812 | struct igb_adapter *adapter = netdev_priv(netdev); | |
2813 | int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN; | |
2814 | ||
2815 | if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) || | |
2816 | (max_frame > MAX_JUMBO_FRAME_SIZE)) { | |
2817 | dev_err(&adapter->pdev->dev, "Invalid MTU setting\n"); | |
2818 | return -EINVAL; | |
2819 | } | |
2820 | ||
2821 | #define MAX_STD_JUMBO_FRAME_SIZE 9234 | |
2822 | if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) { | |
2823 | dev_err(&adapter->pdev->dev, "MTU > 9216 not supported.\n"); | |
2824 | return -EINVAL; | |
2825 | } | |
2826 | ||
2827 | while (test_and_set_bit(__IGB_RESETTING, &adapter->state)) | |
2828 | msleep(1); | |
2829 | /* igb_down has a dependency on max_frame_size */ | |
2830 | adapter->max_frame_size = max_frame; | |
2831 | if (netif_running(netdev)) | |
2832 | igb_down(adapter); | |
2833 | ||
2834 | /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN | |
2835 | * means we reserve 2 more, this pushes us to allocate from the next | |
2836 | * larger slab size. | |
2837 | * i.e. RXBUFFER_2048 --> size-4096 slab | |
2838 | */ | |
2839 | ||
2840 | if (max_frame <= IGB_RXBUFFER_256) | |
2841 | adapter->rx_buffer_len = IGB_RXBUFFER_256; | |
2842 | else if (max_frame <= IGB_RXBUFFER_512) | |
2843 | adapter->rx_buffer_len = IGB_RXBUFFER_512; | |
2844 | else if (max_frame <= IGB_RXBUFFER_1024) | |
2845 | adapter->rx_buffer_len = IGB_RXBUFFER_1024; | |
2846 | else if (max_frame <= IGB_RXBUFFER_2048) | |
2847 | adapter->rx_buffer_len = IGB_RXBUFFER_2048; | |
2848 | else | |
2849 | adapter->rx_buffer_len = IGB_RXBUFFER_4096; | |
2850 | /* adjust allocation if LPE protects us, and we aren't using SBP */ | |
2851 | if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) || | |
2852 | (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)) | |
2853 | adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE; | |
2854 | ||
2855 | dev_info(&adapter->pdev->dev, "changing MTU from %d to %d\n", | |
2856 | netdev->mtu, new_mtu); | |
2857 | netdev->mtu = new_mtu; | |
2858 | ||
2859 | if (netif_running(netdev)) | |
2860 | igb_up(adapter); | |
2861 | else | |
2862 | igb_reset(adapter); | |
2863 | ||
2864 | clear_bit(__IGB_RESETTING, &adapter->state); | |
2865 | ||
2866 | return 0; | |
2867 | } | |
2868 | ||
2869 | /** | |
2870 | * igb_update_stats - Update the board statistics counters | |
2871 | * @adapter: board private structure | |
2872 | **/ | |
2873 | ||
2874 | void igb_update_stats(struct igb_adapter *adapter) | |
2875 | { | |
2876 | struct e1000_hw *hw = &adapter->hw; | |
2877 | struct pci_dev *pdev = adapter->pdev; | |
2878 | u16 phy_tmp; | |
2879 | ||
2880 | #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF | |
2881 | ||
2882 | /* | |
2883 | * Prevent stats update while adapter is being reset, or if the pci | |
2884 | * connection is down. | |
2885 | */ | |
2886 | if (adapter->link_speed == 0) | |
2887 | return; | |
2888 | if (pci_channel_offline(pdev)) | |
2889 | return; | |
2890 | ||
2891 | adapter->stats.crcerrs += rd32(E1000_CRCERRS); | |
2892 | adapter->stats.gprc += rd32(E1000_GPRC); | |
2893 | adapter->stats.gorc += rd32(E1000_GORCL); | |
2894 | rd32(E1000_GORCH); /* clear GORCL */ | |
2895 | adapter->stats.bprc += rd32(E1000_BPRC); | |
2896 | adapter->stats.mprc += rd32(E1000_MPRC); | |
2897 | adapter->stats.roc += rd32(E1000_ROC); | |
2898 | ||
2899 | adapter->stats.prc64 += rd32(E1000_PRC64); | |
2900 | adapter->stats.prc127 += rd32(E1000_PRC127); | |
2901 | adapter->stats.prc255 += rd32(E1000_PRC255); | |
2902 | adapter->stats.prc511 += rd32(E1000_PRC511); | |
2903 | adapter->stats.prc1023 += rd32(E1000_PRC1023); | |
2904 | adapter->stats.prc1522 += rd32(E1000_PRC1522); | |
2905 | adapter->stats.symerrs += rd32(E1000_SYMERRS); | |
2906 | adapter->stats.sec += rd32(E1000_SEC); | |
2907 | ||
2908 | adapter->stats.mpc += rd32(E1000_MPC); | |
2909 | adapter->stats.scc += rd32(E1000_SCC); | |
2910 | adapter->stats.ecol += rd32(E1000_ECOL); | |
2911 | adapter->stats.mcc += rd32(E1000_MCC); | |
2912 | adapter->stats.latecol += rd32(E1000_LATECOL); | |
2913 | adapter->stats.dc += rd32(E1000_DC); | |
2914 | adapter->stats.rlec += rd32(E1000_RLEC); | |
2915 | adapter->stats.xonrxc += rd32(E1000_XONRXC); | |
2916 | adapter->stats.xontxc += rd32(E1000_XONTXC); | |
2917 | adapter->stats.xoffrxc += rd32(E1000_XOFFRXC); | |
2918 | adapter->stats.xofftxc += rd32(E1000_XOFFTXC); | |
2919 | adapter->stats.fcruc += rd32(E1000_FCRUC); | |
2920 | adapter->stats.gptc += rd32(E1000_GPTC); | |
2921 | adapter->stats.gotc += rd32(E1000_GOTCL); | |
2922 | rd32(E1000_GOTCH); /* clear GOTCL */ | |
2923 | adapter->stats.rnbc += rd32(E1000_RNBC); | |
2924 | adapter->stats.ruc += rd32(E1000_RUC); | |
2925 | adapter->stats.rfc += rd32(E1000_RFC); | |
2926 | adapter->stats.rjc += rd32(E1000_RJC); | |
2927 | adapter->stats.tor += rd32(E1000_TORH); | |
2928 | adapter->stats.tot += rd32(E1000_TOTH); | |
2929 | adapter->stats.tpr += rd32(E1000_TPR); | |
2930 | ||
2931 | adapter->stats.ptc64 += rd32(E1000_PTC64); | |
2932 | adapter->stats.ptc127 += rd32(E1000_PTC127); | |
2933 | adapter->stats.ptc255 += rd32(E1000_PTC255); | |
2934 | adapter->stats.ptc511 += rd32(E1000_PTC511); | |
2935 | adapter->stats.ptc1023 += rd32(E1000_PTC1023); | |
2936 | adapter->stats.ptc1522 += rd32(E1000_PTC1522); | |
2937 | ||
2938 | adapter->stats.mptc += rd32(E1000_MPTC); | |
2939 | adapter->stats.bptc += rd32(E1000_BPTC); | |
2940 | ||
2941 | /* used for adaptive IFS */ | |
2942 | ||
2943 | hw->mac.tx_packet_delta = rd32(E1000_TPT); | |
2944 | adapter->stats.tpt += hw->mac.tx_packet_delta; | |
2945 | hw->mac.collision_delta = rd32(E1000_COLC); | |
2946 | adapter->stats.colc += hw->mac.collision_delta; | |
2947 | ||
2948 | adapter->stats.algnerrc += rd32(E1000_ALGNERRC); | |
2949 | adapter->stats.rxerrc += rd32(E1000_RXERRC); | |
2950 | adapter->stats.tncrs += rd32(E1000_TNCRS); | |
2951 | adapter->stats.tsctc += rd32(E1000_TSCTC); | |
2952 | adapter->stats.tsctfc += rd32(E1000_TSCTFC); | |
2953 | ||
2954 | adapter->stats.iac += rd32(E1000_IAC); | |
2955 | adapter->stats.icrxoc += rd32(E1000_ICRXOC); | |
2956 | adapter->stats.icrxptc += rd32(E1000_ICRXPTC); | |
2957 | adapter->stats.icrxatc += rd32(E1000_ICRXATC); | |
2958 | adapter->stats.ictxptc += rd32(E1000_ICTXPTC); | |
2959 | adapter->stats.ictxatc += rd32(E1000_ICTXATC); | |
2960 | adapter->stats.ictxqec += rd32(E1000_ICTXQEC); | |
2961 | adapter->stats.ictxqmtc += rd32(E1000_ICTXQMTC); | |
2962 | adapter->stats.icrxdmtc += rd32(E1000_ICRXDMTC); | |
2963 | ||
2964 | /* Fill out the OS statistics structure */ | |
2965 | adapter->net_stats.multicast = adapter->stats.mprc; | |
2966 | adapter->net_stats.collisions = adapter->stats.colc; | |
2967 | ||
2968 | /* Rx Errors */ | |
2969 | ||
2970 | /* RLEC on some newer hardware can be incorrect so build | |
2971 | * our own version based on RUC and ROC */ | |
2972 | adapter->net_stats.rx_errors = adapter->stats.rxerrc + | |
2973 | adapter->stats.crcerrs + adapter->stats.algnerrc + | |
2974 | adapter->stats.ruc + adapter->stats.roc + | |
2975 | adapter->stats.cexterr; | |
2976 | adapter->net_stats.rx_length_errors = adapter->stats.ruc + | |
2977 | adapter->stats.roc; | |
2978 | adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs; | |
2979 | adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc; | |
2980 | adapter->net_stats.rx_missed_errors = adapter->stats.mpc; | |
2981 | ||
2982 | /* Tx Errors */ | |
2983 | adapter->net_stats.tx_errors = adapter->stats.ecol + | |
2984 | adapter->stats.latecol; | |
2985 | adapter->net_stats.tx_aborted_errors = adapter->stats.ecol; | |
2986 | adapter->net_stats.tx_window_errors = adapter->stats.latecol; | |
2987 | adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs; | |
2988 | ||
2989 | /* Tx Dropped needs to be maintained elsewhere */ | |
2990 | ||
2991 | /* Phy Stats */ | |
2992 | if (hw->phy.media_type == e1000_media_type_copper) { | |
2993 | if ((adapter->link_speed == SPEED_1000) && | |
2994 | (!hw->phy.ops.read_phy_reg(hw, PHY_1000T_STATUS, | |
2995 | &phy_tmp))) { | |
2996 | phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK; | |
2997 | adapter->phy_stats.idle_errors += phy_tmp; | |
2998 | } | |
2999 | } | |
3000 | ||
3001 | /* Management Stats */ | |
3002 | adapter->stats.mgptc += rd32(E1000_MGTPTC); | |
3003 | adapter->stats.mgprc += rd32(E1000_MGTPRC); | |
3004 | adapter->stats.mgpdc += rd32(E1000_MGTPDC); | |
3005 | } | |
3006 | ||
3007 | ||
3008 | static irqreturn_t igb_msix_other(int irq, void *data) | |
3009 | { | |
3010 | struct net_device *netdev = data; | |
3011 | struct igb_adapter *adapter = netdev_priv(netdev); | |
3012 | struct e1000_hw *hw = &adapter->hw; | |
3013 | u32 eicr; | |
3014 | /* disable interrupts from the "other" bit, avoid re-entry */ | |
3015 | wr32(E1000_EIMC, E1000_EIMS_OTHER); | |
3016 | ||
3017 | eicr = rd32(E1000_EICR); | |
3018 | ||
3019 | if (eicr & E1000_EIMS_OTHER) { | |
3020 | u32 icr = rd32(E1000_ICR); | |
3021 | /* reading ICR causes bit 31 of EICR to be cleared */ | |
3022 | if (!(icr & E1000_ICR_LSC)) | |
3023 | goto no_link_interrupt; | |
3024 | hw->mac.get_link_status = 1; | |
3025 | /* guard against interrupt when we're going down */ | |
3026 | if (!test_bit(__IGB_DOWN, &adapter->state)) | |
3027 | mod_timer(&adapter->watchdog_timer, jiffies + 1); | |
3028 | } | |
3029 | ||
3030 | no_link_interrupt: | |
3031 | wr32(E1000_IMS, E1000_IMS_LSC); | |
3032 | wr32(E1000_EIMS, E1000_EIMS_OTHER); | |
3033 | ||
3034 | return IRQ_HANDLED; | |
3035 | } | |
3036 | ||
3037 | static irqreturn_t igb_msix_tx(int irq, void *data) | |
3038 | { | |
3039 | struct igb_ring *tx_ring = data; | |
3040 | struct igb_adapter *adapter = tx_ring->adapter; | |
3041 | struct e1000_hw *hw = &adapter->hw; | |
3042 | ||
3043 | if (!tx_ring->itr_val) | |
3044 | wr32(E1000_EIMC, tx_ring->eims_value); | |
3045 | ||
3046 | tx_ring->total_bytes = 0; | |
3047 | tx_ring->total_packets = 0; | |
3048 | if (!igb_clean_tx_irq(adapter, tx_ring)) | |
3049 | /* Ring was not completely cleaned, so fire another interrupt */ | |
3050 | wr32(E1000_EICS, tx_ring->eims_value); | |
3051 | ||
3052 | if (!tx_ring->itr_val) | |
3053 | wr32(E1000_EIMS, tx_ring->eims_value); | |
3054 | return IRQ_HANDLED; | |
3055 | } | |
3056 | ||
3057 | static irqreturn_t igb_msix_rx(int irq, void *data) | |
3058 | { | |
3059 | struct igb_ring *rx_ring = data; | |
3060 | struct igb_adapter *adapter = rx_ring->adapter; | |
3061 | struct e1000_hw *hw = &adapter->hw; | |
3062 | ||
3063 | if (!rx_ring->itr_val) | |
3064 | wr32(E1000_EIMC, rx_ring->eims_value); | |
3065 | ||
3066 | if (netif_rx_schedule_prep(adapter->netdev, &rx_ring->napi)) { | |
3067 | rx_ring->total_bytes = 0; | |
3068 | rx_ring->total_packets = 0; | |
3069 | rx_ring->no_itr_adjust = 0; | |
3070 | __netif_rx_schedule(adapter->netdev, &rx_ring->napi); | |
3071 | } else { | |
3072 | if (!rx_ring->no_itr_adjust) { | |
3073 | igb_lower_rx_eitr(adapter, rx_ring); | |
3074 | rx_ring->no_itr_adjust = 1; | |
3075 | } | |
3076 | } | |
3077 | ||
3078 | return IRQ_HANDLED; | |
3079 | } | |
3080 | ||
3081 | ||
3082 | /** | |
3083 | * igb_intr_msi - Interrupt Handler | |
3084 | * @irq: interrupt number | |
3085 | * @data: pointer to a network interface device structure | |
3086 | **/ | |
3087 | static irqreturn_t igb_intr_msi(int irq, void *data) | |
3088 | { | |
3089 | struct net_device *netdev = data; | |
3090 | struct igb_adapter *adapter = netdev_priv(netdev); | |
3091 | struct napi_struct *napi = &adapter->napi; | |
3092 | struct e1000_hw *hw = &adapter->hw; | |
3093 | /* read ICR disables interrupts using IAM */ | |
3094 | u32 icr = rd32(E1000_ICR); | |
3095 | ||
3096 | /* Write the ITR value calculated at the end of the | |
3097 | * previous interrupt. | |
3098 | */ | |
3099 | if (adapter->set_itr) { | |
3100 | wr32(E1000_ITR, | |
3101 | 1000000000 / (adapter->itr * 256)); | |
3102 | adapter->set_itr = 0; | |
3103 | } | |
3104 | ||
3105 | /* read ICR disables interrupts using IAM */ | |
3106 | if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { | |
3107 | hw->mac.get_link_status = 1; | |
3108 | if (!test_bit(__IGB_DOWN, &adapter->state)) | |
3109 | mod_timer(&adapter->watchdog_timer, jiffies + 1); | |
3110 | } | |
3111 | ||
3112 | if (netif_rx_schedule_prep(netdev, napi)) { | |
3113 | adapter->tx_ring->total_bytes = 0; | |
3114 | adapter->tx_ring->total_packets = 0; | |
3115 | adapter->rx_ring->total_bytes = 0; | |
3116 | adapter->rx_ring->total_packets = 0; | |
3117 | __netif_rx_schedule(netdev, napi); | |
3118 | } | |
3119 | ||
3120 | return IRQ_HANDLED; | |
3121 | } | |
3122 | ||
3123 | /** | |
3124 | * igb_intr - Interrupt Handler | |
3125 | * @irq: interrupt number | |
3126 | * @data: pointer to a network interface device structure | |
3127 | **/ | |
3128 | static irqreturn_t igb_intr(int irq, void *data) | |
3129 | { | |
3130 | struct net_device *netdev = data; | |
3131 | struct igb_adapter *adapter = netdev_priv(netdev); | |
3132 | struct napi_struct *napi = &adapter->napi; | |
3133 | struct e1000_hw *hw = &adapter->hw; | |
3134 | /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No | |
3135 | * need for the IMC write */ | |
3136 | u32 icr = rd32(E1000_ICR); | |
3137 | u32 eicr = 0; | |
3138 | if (!icr) | |
3139 | return IRQ_NONE; /* Not our interrupt */ | |
3140 | ||
3141 | /* Write the ITR value calculated at the end of the | |
3142 | * previous interrupt. | |
3143 | */ | |
3144 | if (adapter->set_itr) { | |
3145 | wr32(E1000_ITR, | |
3146 | 1000000000 / (adapter->itr * 256)); | |
3147 | adapter->set_itr = 0; | |
3148 | } | |
3149 | ||
3150 | /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is | |
3151 | * not set, then the adapter didn't send an interrupt */ | |
3152 | if (!(icr & E1000_ICR_INT_ASSERTED)) | |
3153 | return IRQ_NONE; | |
3154 | ||
3155 | eicr = rd32(E1000_EICR); | |
3156 | ||
3157 | if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) { | |
3158 | hw->mac.get_link_status = 1; | |
3159 | /* guard against interrupt when we're going down */ | |
3160 | if (!test_bit(__IGB_DOWN, &adapter->state)) | |
3161 | mod_timer(&adapter->watchdog_timer, jiffies + 1); | |
3162 | } | |
3163 | ||
3164 | if (netif_rx_schedule_prep(netdev, napi)) { | |
3165 | adapter->tx_ring->total_bytes = 0; | |
3166 | adapter->rx_ring->total_bytes = 0; | |
3167 | adapter->tx_ring->total_packets = 0; | |
3168 | adapter->rx_ring->total_packets = 0; | |
3169 | __netif_rx_schedule(netdev, napi); | |
3170 | } | |
3171 | ||
3172 | return IRQ_HANDLED; | |
3173 | } | |
3174 | ||
3175 | /** | |
3176 | * igb_clean - NAPI Rx polling callback | |
3177 | * @adapter: board private structure | |
3178 | **/ | |
3179 | static int igb_clean(struct napi_struct *napi, int budget) | |
3180 | { | |
3181 | struct igb_adapter *adapter = container_of(napi, struct igb_adapter, | |
3182 | napi); | |
3183 | struct net_device *netdev = adapter->netdev; | |
3184 | int tx_clean_complete = 1, work_done = 0; | |
3185 | int i; | |
3186 | ||
3187 | /* Must NOT use netdev_priv macro here. */ | |
3188 | adapter = netdev->priv; | |
3189 | ||
3190 | /* Keep link state information with original netdev */ | |
3191 | if (!netif_carrier_ok(netdev)) | |
3192 | goto quit_polling; | |
3193 | ||
3194 | /* igb_clean is called per-cpu. This lock protects tx_ring[i] from | |
3195 | * being cleaned by multiple cpus simultaneously. A failure obtaining | |
3196 | * the lock means tx_ring[i] is currently being cleaned anyway. */ | |
3197 | for (i = 0; i < adapter->num_tx_queues; i++) { | |
3198 | if (spin_trylock(&adapter->tx_ring[i].tx_clean_lock)) { | |
3199 | tx_clean_complete &= igb_clean_tx_irq(adapter, | |
3200 | &adapter->tx_ring[i]); | |
3201 | spin_unlock(&adapter->tx_ring[i].tx_clean_lock); | |
3202 | } | |
3203 | } | |
3204 | ||
3205 | for (i = 0; i < adapter->num_rx_queues; i++) | |
3206 | igb_clean_rx_irq_adv(adapter, &adapter->rx_ring[i], &work_done, | |
3207 | adapter->rx_ring[i].napi.weight); | |
3208 | ||
3209 | /* If no Tx and not enough Rx work done, exit the polling mode */ | |
3210 | if ((tx_clean_complete && (work_done < budget)) || | |
3211 | !netif_running(netdev)) { | |
3212 | quit_polling: | |
3213 | if (adapter->itr_setting & 3) | |
3214 | igb_set_itr(adapter, E1000_ITR, false); | |
3215 | netif_rx_complete(netdev, napi); | |
3216 | if (!test_bit(__IGB_DOWN, &adapter->state)) | |
3217 | igb_irq_enable(adapter); | |
3218 | return 0; | |
3219 | } | |
3220 | ||
3221 | return 1; | |
3222 | } | |
3223 | ||
3224 | static int igb_clean_rx_ring_msix(struct napi_struct *napi, int budget) | |
3225 | { | |
3226 | struct igb_ring *rx_ring = container_of(napi, struct igb_ring, napi); | |
3227 | struct igb_adapter *adapter = rx_ring->adapter; | |
3228 | struct e1000_hw *hw = &adapter->hw; | |
3229 | struct net_device *netdev = adapter->netdev; | |
3230 | int work_done = 0; | |
3231 | ||
3232 | /* Keep link state information with original netdev */ | |
3233 | if (!netif_carrier_ok(netdev)) | |
3234 | goto quit_polling; | |
3235 | ||
3236 | igb_clean_rx_irq_adv(adapter, rx_ring, &work_done, budget); | |
3237 | ||
3238 | ||
3239 | /* If not enough Rx work done, exit the polling mode */ | |
3240 | if ((work_done == 0) || !netif_running(netdev)) { | |
3241 | quit_polling: | |
3242 | netif_rx_complete(netdev, napi); | |
3243 | ||
3244 | wr32(E1000_EIMS, rx_ring->eims_value); | |
3245 | if ((adapter->itr_setting & 3) && !rx_ring->no_itr_adjust && | |
3246 | (rx_ring->total_packets > IGB_DYN_ITR_PACKET_THRESHOLD)) { | |
3247 | int mean_size = rx_ring->total_bytes / | |
3248 | rx_ring->total_packets; | |
3249 | if (mean_size < IGB_DYN_ITR_LENGTH_LOW) | |
3250 | igb_raise_rx_eitr(adapter, rx_ring); | |
3251 | else if (mean_size > IGB_DYN_ITR_LENGTH_HIGH) | |
3252 | igb_lower_rx_eitr(adapter, rx_ring); | |
3253 | } | |
3254 | return 0; | |
3255 | } | |
3256 | ||
3257 | return 1; | |
3258 | } | |
6d8126f9 AV |
3259 | |
3260 | static inline u32 get_head(struct igb_ring *tx_ring) | |
3261 | { | |
3262 | void *end = (struct e1000_tx_desc *)tx_ring->desc + tx_ring->count; | |
3263 | return le32_to_cpu(*(volatile __le32 *)end); | |
3264 | } | |
3265 | ||
9d5c8243 AK |
3266 | /** |
3267 | * igb_clean_tx_irq - Reclaim resources after transmit completes | |
3268 | * @adapter: board private structure | |
3269 | * returns true if ring is completely cleaned | |
3270 | **/ | |
3271 | static bool igb_clean_tx_irq(struct igb_adapter *adapter, | |
3272 | struct igb_ring *tx_ring) | |
3273 | { | |
3274 | struct net_device *netdev = adapter->netdev; | |
3275 | struct e1000_hw *hw = &adapter->hw; | |
3276 | struct e1000_tx_desc *tx_desc; | |
3277 | struct igb_buffer *buffer_info; | |
3278 | struct sk_buff *skb; | |
3279 | unsigned int i; | |
3280 | u32 head, oldhead; | |
3281 | unsigned int count = 0; | |
3282 | bool cleaned = false; | |
3283 | bool retval = true; | |
3284 | unsigned int total_bytes = 0, total_packets = 0; | |
3285 | ||
3286 | rmb(); | |
6d8126f9 | 3287 | head = get_head(tx_ring); |
9d5c8243 AK |
3288 | i = tx_ring->next_to_clean; |
3289 | while (1) { | |
3290 | while (i != head) { | |
3291 | cleaned = true; | |
3292 | tx_desc = E1000_TX_DESC(*tx_ring, i); | |
3293 | buffer_info = &tx_ring->buffer_info[i]; | |
3294 | skb = buffer_info->skb; | |
3295 | ||
3296 | if (skb) { | |
3297 | unsigned int segs, bytecount; | |
3298 | /* gso_segs is currently only valid for tcp */ | |
3299 | segs = skb_shinfo(skb)->gso_segs ?: 1; | |
3300 | /* multiply data chunks by size of headers */ | |
3301 | bytecount = ((segs - 1) * skb_headlen(skb)) + | |
3302 | skb->len; | |
3303 | total_packets += segs; | |
3304 | total_bytes += bytecount; | |
3305 | } | |
3306 | ||
3307 | igb_unmap_and_free_tx_resource(adapter, buffer_info); | |
3308 | tx_desc->upper.data = 0; | |
3309 | ||
3310 | i++; | |
3311 | if (i == tx_ring->count) | |
3312 | i = 0; | |
3313 | ||
3314 | count++; | |
3315 | if (count == IGB_MAX_TX_CLEAN) { | |
3316 | retval = false; | |
3317 | goto done_cleaning; | |
3318 | } | |
3319 | } | |
3320 | oldhead = head; | |
3321 | rmb(); | |
6d8126f9 | 3322 | head = get_head(tx_ring); |
9d5c8243 AK |
3323 | if (head == oldhead) |
3324 | goto done_cleaning; | |
3325 | } /* while (1) */ | |
3326 | ||
3327 | done_cleaning: | |
3328 | tx_ring->next_to_clean = i; | |
3329 | ||
3330 | if (unlikely(cleaned && | |
3331 | netif_carrier_ok(netdev) && | |
3332 | IGB_DESC_UNUSED(tx_ring) >= IGB_TX_QUEUE_WAKE)) { | |
3333 | /* Make sure that anybody stopping the queue after this | |
3334 | * sees the new next_to_clean. | |
3335 | */ | |
3336 | smp_mb(); | |
3337 | if (netif_queue_stopped(netdev) && | |
3338 | !(test_bit(__IGB_DOWN, &adapter->state))) { | |
3339 | netif_wake_queue(netdev); | |
3340 | ++adapter->restart_queue; | |
3341 | } | |
3342 | } | |
3343 | ||
3344 | if (tx_ring->detect_tx_hung) { | |
3345 | /* Detect a transmit hang in hardware, this serializes the | |
3346 | * check with the clearing of time_stamp and movement of i */ | |
3347 | tx_ring->detect_tx_hung = false; | |
3348 | if (tx_ring->buffer_info[i].time_stamp && | |
3349 | time_after(jiffies, tx_ring->buffer_info[i].time_stamp + | |
3350 | (adapter->tx_timeout_factor * HZ)) | |
3351 | && !(rd32(E1000_STATUS) & | |
3352 | E1000_STATUS_TXOFF)) { | |
3353 | ||
3354 | tx_desc = E1000_TX_DESC(*tx_ring, i); | |
3355 | /* detected Tx unit hang */ | |
3356 | dev_err(&adapter->pdev->dev, | |
3357 | "Detected Tx Unit Hang\n" | |
3358 | " Tx Queue <%lu>\n" | |
3359 | " TDH <%x>\n" | |
3360 | " TDT <%x>\n" | |
3361 | " next_to_use <%x>\n" | |
3362 | " next_to_clean <%x>\n" | |
3363 | " head (WB) <%x>\n" | |
3364 | "buffer_info[next_to_clean]\n" | |
3365 | " time_stamp <%lx>\n" | |
3366 | " jiffies <%lx>\n" | |
3367 | " desc.status <%x>\n", | |
3368 | (unsigned long)((tx_ring - adapter->tx_ring) / | |
3369 | sizeof(struct igb_ring)), | |
3370 | readl(adapter->hw.hw_addr + tx_ring->head), | |
3371 | readl(adapter->hw.hw_addr + tx_ring->tail), | |
3372 | tx_ring->next_to_use, | |
3373 | tx_ring->next_to_clean, | |
3374 | head, | |
3375 | tx_ring->buffer_info[i].time_stamp, | |
3376 | jiffies, | |
3377 | tx_desc->upper.fields.status); | |
3378 | netif_stop_queue(netdev); | |
3379 | } | |
3380 | } | |
3381 | tx_ring->total_bytes += total_bytes; | |
3382 | tx_ring->total_packets += total_packets; | |
3383 | adapter->net_stats.tx_bytes += total_bytes; | |
3384 | adapter->net_stats.tx_packets += total_packets; | |
3385 | return retval; | |
3386 | } | |
3387 | ||
3388 | ||
3389 | /** | |
3390 | * igb_receive_skb - helper function to handle rx indications | |
3391 | * @adapter: board private structure | |
3392 | * @status: descriptor status field as written by hardware | |
3393 | * @vlan: descriptor vlan field as written by hardware (no le/be conversion) | |
3394 | * @skb: pointer to sk_buff to be indicated to stack | |
3395 | **/ | |
6d8126f9 | 3396 | static void igb_receive_skb(struct igb_adapter *adapter, u8 status, __le16 vlan, |
9d5c8243 AK |
3397 | struct sk_buff *skb) |
3398 | { | |
3399 | if (adapter->vlgrp && (status & E1000_RXD_STAT_VP)) | |
3400 | vlan_hwaccel_receive_skb(skb, adapter->vlgrp, | |
3401 | le16_to_cpu(vlan) & | |
3402 | E1000_RXD_SPC_VLAN_MASK); | |
3403 | else | |
3404 | netif_receive_skb(skb); | |
3405 | } | |
3406 | ||
3407 | ||
3408 | static inline void igb_rx_checksum_adv(struct igb_adapter *adapter, | |
3409 | u32 status_err, struct sk_buff *skb) | |
3410 | { | |
3411 | skb->ip_summed = CHECKSUM_NONE; | |
3412 | ||
3413 | /* Ignore Checksum bit is set or checksum is disabled through ethtool */ | |
3414 | if ((status_err & E1000_RXD_STAT_IXSM) || !adapter->rx_csum) | |
3415 | return; | |
3416 | /* TCP/UDP checksum error bit is set */ | |
3417 | if (status_err & | |
3418 | (E1000_RXDEXT_STATERR_TCPE | E1000_RXDEXT_STATERR_IPE)) { | |
3419 | /* let the stack verify checksum errors */ | |
3420 | adapter->hw_csum_err++; | |
3421 | return; | |
3422 | } | |
3423 | /* It must be a TCP or UDP packet with a valid checksum */ | |
3424 | if (status_err & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)) | |
3425 | skb->ip_summed = CHECKSUM_UNNECESSARY; | |
3426 | ||
3427 | adapter->hw_csum_good++; | |
3428 | } | |
3429 | ||
3430 | static bool igb_clean_rx_irq_adv(struct igb_adapter *adapter, | |
3431 | struct igb_ring *rx_ring, | |
3432 | int *work_done, int budget) | |
3433 | { | |
3434 | struct net_device *netdev = adapter->netdev; | |
3435 | struct pci_dev *pdev = adapter->pdev; | |
3436 | union e1000_adv_rx_desc *rx_desc , *next_rxd; | |
3437 | struct igb_buffer *buffer_info , *next_buffer; | |
3438 | struct sk_buff *skb; | |
3439 | unsigned int i, j; | |
3440 | u32 length, hlen, staterr; | |
3441 | bool cleaned = false; | |
3442 | int cleaned_count = 0; | |
3443 | unsigned int total_bytes = 0, total_packets = 0; | |
3444 | ||
3445 | i = rx_ring->next_to_clean; | |
3446 | rx_desc = E1000_RX_DESC_ADV(*rx_ring, i); | |
3447 | staterr = le32_to_cpu(rx_desc->wb.upper.status_error); | |
3448 | ||
3449 | while (staterr & E1000_RXD_STAT_DD) { | |
3450 | if (*work_done >= budget) | |
3451 | break; | |
3452 | (*work_done)++; | |
3453 | buffer_info = &rx_ring->buffer_info[i]; | |
3454 | ||
3455 | /* HW will not DMA in data larger than the given buffer, even | |
3456 | * if it parses the (NFS, of course) header to be larger. In | |
3457 | * that case, it fills the header buffer and spills the rest | |
3458 | * into the page. | |
3459 | */ | |
7deb07b1 AV |
3460 | hlen = (le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info) & |
3461 | E1000_RXDADV_HDRBUFLEN_MASK) >> E1000_RXDADV_HDRBUFLEN_SHIFT; | |
9d5c8243 AK |
3462 | if (hlen > adapter->rx_ps_hdr_size) |
3463 | hlen = adapter->rx_ps_hdr_size; | |
3464 | ||
3465 | length = le16_to_cpu(rx_desc->wb.upper.length); | |
3466 | cleaned = true; | |
3467 | cleaned_count++; | |
3468 | ||
3469 | if (rx_ring->pending_skb != NULL) { | |
3470 | skb = rx_ring->pending_skb; | |
3471 | rx_ring->pending_skb = NULL; | |
3472 | j = rx_ring->pending_skb_page; | |
3473 | } else { | |
3474 | skb = buffer_info->skb; | |
3475 | prefetch(skb->data - NET_IP_ALIGN); | |
3476 | buffer_info->skb = NULL; | |
3477 | if (hlen) { | |
3478 | pci_unmap_single(pdev, buffer_info->dma, | |
3479 | adapter->rx_ps_hdr_size + | |
3480 | NET_IP_ALIGN, | |
3481 | PCI_DMA_FROMDEVICE); | |
3482 | skb_put(skb, hlen); | |
3483 | } else { | |
3484 | pci_unmap_single(pdev, buffer_info->dma, | |
3485 | adapter->rx_buffer_len + | |
3486 | NET_IP_ALIGN, | |
3487 | PCI_DMA_FROMDEVICE); | |
3488 | skb_put(skb, length); | |
3489 | goto send_up; | |
3490 | } | |
3491 | j = 0; | |
3492 | } | |
3493 | ||
3494 | while (length) { | |
3495 | pci_unmap_page(pdev, buffer_info->page_dma, | |
3496 | PAGE_SIZE, PCI_DMA_FROMDEVICE); | |
3497 | buffer_info->page_dma = 0; | |
3498 | skb_fill_page_desc(skb, j, buffer_info->page, | |
3499 | 0, length); | |
3500 | buffer_info->page = NULL; | |
3501 | ||
3502 | skb->len += length; | |
3503 | skb->data_len += length; | |
3504 | skb->truesize += length; | |
3505 | rx_desc->wb.upper.status_error = 0; | |
3506 | if (staterr & E1000_RXD_STAT_EOP) | |
3507 | break; | |
3508 | ||
3509 | j++; | |
3510 | cleaned_count++; | |
3511 | i++; | |
3512 | if (i == rx_ring->count) | |
3513 | i = 0; | |
3514 | ||
3515 | buffer_info = &rx_ring->buffer_info[i]; | |
3516 | rx_desc = E1000_RX_DESC_ADV(*rx_ring, i); | |
3517 | staterr = le32_to_cpu(rx_desc->wb.upper.status_error); | |
3518 | length = le16_to_cpu(rx_desc->wb.upper.length); | |
3519 | if (!(staterr & E1000_RXD_STAT_DD)) { | |
3520 | rx_ring->pending_skb = skb; | |
3521 | rx_ring->pending_skb_page = j; | |
3522 | goto out; | |
3523 | } | |
3524 | } | |
3525 | send_up: | |
3526 | pskb_trim(skb, skb->len - 4); | |
3527 | i++; | |
3528 | if (i == rx_ring->count) | |
3529 | i = 0; | |
3530 | next_rxd = E1000_RX_DESC_ADV(*rx_ring, i); | |
3531 | prefetch(next_rxd); | |
3532 | next_buffer = &rx_ring->buffer_info[i]; | |
3533 | ||
3534 | if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) { | |
3535 | dev_kfree_skb_irq(skb); | |
3536 | goto next_desc; | |
3537 | } | |
3538 | rx_ring->no_itr_adjust |= (staterr & E1000_RXD_STAT_DYNINT); | |
3539 | ||
3540 | total_bytes += skb->len; | |
3541 | total_packets++; | |
3542 | ||
3543 | igb_rx_checksum_adv(adapter, staterr, skb); | |
3544 | ||
3545 | skb->protocol = eth_type_trans(skb, netdev); | |
3546 | ||
3547 | igb_receive_skb(adapter, staterr, rx_desc->wb.upper.vlan, skb); | |
3548 | ||
3549 | netdev->last_rx = jiffies; | |
3550 | ||
3551 | next_desc: | |
3552 | rx_desc->wb.upper.status_error = 0; | |
3553 | ||
3554 | /* return some buffers to hardware, one at a time is too slow */ | |
3555 | if (cleaned_count >= IGB_RX_BUFFER_WRITE) { | |
3556 | igb_alloc_rx_buffers_adv(adapter, rx_ring, | |
3557 | cleaned_count); | |
3558 | cleaned_count = 0; | |
3559 | } | |
3560 | ||
3561 | /* use prefetched values */ | |
3562 | rx_desc = next_rxd; | |
3563 | buffer_info = next_buffer; | |
3564 | ||
3565 | staterr = le32_to_cpu(rx_desc->wb.upper.status_error); | |
3566 | } | |
3567 | out: | |
3568 | rx_ring->next_to_clean = i; | |
3569 | cleaned_count = IGB_DESC_UNUSED(rx_ring); | |
3570 | ||
3571 | if (cleaned_count) | |
3572 | igb_alloc_rx_buffers_adv(adapter, rx_ring, cleaned_count); | |
3573 | ||
3574 | rx_ring->total_packets += total_packets; | |
3575 | rx_ring->total_bytes += total_bytes; | |
3576 | rx_ring->rx_stats.packets += total_packets; | |
3577 | rx_ring->rx_stats.bytes += total_bytes; | |
3578 | adapter->net_stats.rx_bytes += total_bytes; | |
3579 | adapter->net_stats.rx_packets += total_packets; | |
3580 | return cleaned; | |
3581 | } | |
3582 | ||
3583 | ||
3584 | /** | |
3585 | * igb_alloc_rx_buffers_adv - Replace used receive buffers; packet split | |
3586 | * @adapter: address of board private structure | |
3587 | **/ | |
3588 | static void igb_alloc_rx_buffers_adv(struct igb_adapter *adapter, | |
3589 | struct igb_ring *rx_ring, | |
3590 | int cleaned_count) | |
3591 | { | |
3592 | struct net_device *netdev = adapter->netdev; | |
3593 | struct pci_dev *pdev = adapter->pdev; | |
3594 | union e1000_adv_rx_desc *rx_desc; | |
3595 | struct igb_buffer *buffer_info; | |
3596 | struct sk_buff *skb; | |
3597 | unsigned int i; | |
3598 | ||
3599 | i = rx_ring->next_to_use; | |
3600 | buffer_info = &rx_ring->buffer_info[i]; | |
3601 | ||
3602 | while (cleaned_count--) { | |
3603 | rx_desc = E1000_RX_DESC_ADV(*rx_ring, i); | |
3604 | ||
3605 | if (adapter->rx_ps_hdr_size && !buffer_info->page) { | |
3606 | buffer_info->page = alloc_page(GFP_ATOMIC); | |
3607 | if (!buffer_info->page) { | |
3608 | adapter->alloc_rx_buff_failed++; | |
3609 | goto no_buffers; | |
3610 | } | |
3611 | buffer_info->page_dma = | |
3612 | pci_map_page(pdev, | |
3613 | buffer_info->page, | |
3614 | 0, PAGE_SIZE, | |
3615 | PCI_DMA_FROMDEVICE); | |
3616 | } | |
3617 | ||
3618 | if (!buffer_info->skb) { | |
3619 | int bufsz; | |
3620 | ||
3621 | if (adapter->rx_ps_hdr_size) | |
3622 | bufsz = adapter->rx_ps_hdr_size; | |
3623 | else | |
3624 | bufsz = adapter->rx_buffer_len; | |
3625 | bufsz += NET_IP_ALIGN; | |
3626 | skb = netdev_alloc_skb(netdev, bufsz); | |
3627 | ||
3628 | if (!skb) { | |
3629 | adapter->alloc_rx_buff_failed++; | |
3630 | goto no_buffers; | |
3631 | } | |
3632 | ||
3633 | /* Make buffer alignment 2 beyond a 16 byte boundary | |
3634 | * this will result in a 16 byte aligned IP header after | |
3635 | * the 14 byte MAC header is removed | |
3636 | */ | |
3637 | skb_reserve(skb, NET_IP_ALIGN); | |
3638 | ||
3639 | buffer_info->skb = skb; | |
3640 | buffer_info->dma = pci_map_single(pdev, skb->data, | |
3641 | bufsz, | |
3642 | PCI_DMA_FROMDEVICE); | |
3643 | ||
3644 | } | |
3645 | /* Refresh the desc even if buffer_addrs didn't change because | |
3646 | * each write-back erases this info. */ | |
3647 | if (adapter->rx_ps_hdr_size) { | |
3648 | rx_desc->read.pkt_addr = | |
3649 | cpu_to_le64(buffer_info->page_dma); | |
3650 | rx_desc->read.hdr_addr = cpu_to_le64(buffer_info->dma); | |
3651 | } else { | |
3652 | rx_desc->read.pkt_addr = | |
3653 | cpu_to_le64(buffer_info->dma); | |
3654 | rx_desc->read.hdr_addr = 0; | |
3655 | } | |
3656 | ||
3657 | i++; | |
3658 | if (i == rx_ring->count) | |
3659 | i = 0; | |
3660 | buffer_info = &rx_ring->buffer_info[i]; | |
3661 | } | |
3662 | ||
3663 | no_buffers: | |
3664 | if (rx_ring->next_to_use != i) { | |
3665 | rx_ring->next_to_use = i; | |
3666 | if (i == 0) | |
3667 | i = (rx_ring->count - 1); | |
3668 | else | |
3669 | i--; | |
3670 | ||
3671 | /* Force memory writes to complete before letting h/w | |
3672 | * know there are new descriptors to fetch. (Only | |
3673 | * applicable for weak-ordered memory model archs, | |
3674 | * such as IA-64). */ | |
3675 | wmb(); | |
3676 | writel(i, adapter->hw.hw_addr + rx_ring->tail); | |
3677 | } | |
3678 | } | |
3679 | ||
3680 | /** | |
3681 | * igb_mii_ioctl - | |
3682 | * @netdev: | |
3683 | * @ifreq: | |
3684 | * @cmd: | |
3685 | **/ | |
3686 | static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
3687 | { | |
3688 | struct igb_adapter *adapter = netdev_priv(netdev); | |
3689 | struct mii_ioctl_data *data = if_mii(ifr); | |
3690 | ||
3691 | if (adapter->hw.phy.media_type != e1000_media_type_copper) | |
3692 | return -EOPNOTSUPP; | |
3693 | ||
3694 | switch (cmd) { | |
3695 | case SIOCGMIIPHY: | |
3696 | data->phy_id = adapter->hw.phy.addr; | |
3697 | break; | |
3698 | case SIOCGMIIREG: | |
3699 | if (!capable(CAP_NET_ADMIN)) | |
3700 | return -EPERM; | |
3701 | if (adapter->hw.phy.ops.read_phy_reg(&adapter->hw, | |
3702 | data->reg_num | |
3703 | & 0x1F, &data->val_out)) | |
3704 | return -EIO; | |
3705 | break; | |
3706 | case SIOCSMIIREG: | |
3707 | default: | |
3708 | return -EOPNOTSUPP; | |
3709 | } | |
3710 | return 0; | |
3711 | } | |
3712 | ||
3713 | /** | |
3714 | * igb_ioctl - | |
3715 | * @netdev: | |
3716 | * @ifreq: | |
3717 | * @cmd: | |
3718 | **/ | |
3719 | static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) | |
3720 | { | |
3721 | switch (cmd) { | |
3722 | case SIOCGMIIPHY: | |
3723 | case SIOCGMIIREG: | |
3724 | case SIOCSMIIREG: | |
3725 | return igb_mii_ioctl(netdev, ifr, cmd); | |
3726 | default: | |
3727 | return -EOPNOTSUPP; | |
3728 | } | |
3729 | } | |
3730 | ||
3731 | static void igb_vlan_rx_register(struct net_device *netdev, | |
3732 | struct vlan_group *grp) | |
3733 | { | |
3734 | struct igb_adapter *adapter = netdev_priv(netdev); | |
3735 | struct e1000_hw *hw = &adapter->hw; | |
3736 | u32 ctrl, rctl; | |
3737 | ||
3738 | igb_irq_disable(adapter); | |
3739 | adapter->vlgrp = grp; | |
3740 | ||
3741 | if (grp) { | |
3742 | /* enable VLAN tag insert/strip */ | |
3743 | ctrl = rd32(E1000_CTRL); | |
3744 | ctrl |= E1000_CTRL_VME; | |
3745 | wr32(E1000_CTRL, ctrl); | |
3746 | ||
3747 | /* enable VLAN receive filtering */ | |
3748 | rctl = rd32(E1000_RCTL); | |
3749 | rctl |= E1000_RCTL_VFE; | |
3750 | rctl &= ~E1000_RCTL_CFIEN; | |
3751 | wr32(E1000_RCTL, rctl); | |
3752 | igb_update_mng_vlan(adapter); | |
3753 | wr32(E1000_RLPML, | |
3754 | adapter->max_frame_size + VLAN_TAG_SIZE); | |
3755 | } else { | |
3756 | /* disable VLAN tag insert/strip */ | |
3757 | ctrl = rd32(E1000_CTRL); | |
3758 | ctrl &= ~E1000_CTRL_VME; | |
3759 | wr32(E1000_CTRL, ctrl); | |
3760 | ||
3761 | /* disable VLAN filtering */ | |
3762 | rctl = rd32(E1000_RCTL); | |
3763 | rctl &= ~E1000_RCTL_VFE; | |
3764 | wr32(E1000_RCTL, rctl); | |
3765 | if (adapter->mng_vlan_id != (u16)IGB_MNG_VLAN_NONE) { | |
3766 | igb_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id); | |
3767 | adapter->mng_vlan_id = IGB_MNG_VLAN_NONE; | |
3768 | } | |
3769 | wr32(E1000_RLPML, | |
3770 | adapter->max_frame_size); | |
3771 | } | |
3772 | ||
3773 | if (!test_bit(__IGB_DOWN, &adapter->state)) | |
3774 | igb_irq_enable(adapter); | |
3775 | } | |
3776 | ||
3777 | static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid) | |
3778 | { | |
3779 | struct igb_adapter *adapter = netdev_priv(netdev); | |
3780 | struct e1000_hw *hw = &adapter->hw; | |
3781 | u32 vfta, index; | |
3782 | ||
3783 | if ((adapter->hw.mng_cookie.status & | |
3784 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && | |
3785 | (vid == adapter->mng_vlan_id)) | |
3786 | return; | |
3787 | /* add VID to filter table */ | |
3788 | index = (vid >> 5) & 0x7F; | |
3789 | vfta = array_rd32(E1000_VFTA, index); | |
3790 | vfta |= (1 << (vid & 0x1F)); | |
3791 | igb_write_vfta(&adapter->hw, index, vfta); | |
3792 | } | |
3793 | ||
3794 | static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid) | |
3795 | { | |
3796 | struct igb_adapter *adapter = netdev_priv(netdev); | |
3797 | struct e1000_hw *hw = &adapter->hw; | |
3798 | u32 vfta, index; | |
3799 | ||
3800 | igb_irq_disable(adapter); | |
3801 | vlan_group_set_device(adapter->vlgrp, vid, NULL); | |
3802 | ||
3803 | if (!test_bit(__IGB_DOWN, &adapter->state)) | |
3804 | igb_irq_enable(adapter); | |
3805 | ||
3806 | if ((adapter->hw.mng_cookie.status & | |
3807 | E1000_MNG_DHCP_COOKIE_STATUS_VLAN) && | |
3808 | (vid == adapter->mng_vlan_id)) { | |
3809 | /* release control to f/w */ | |
3810 | igb_release_hw_control(adapter); | |
3811 | return; | |
3812 | } | |
3813 | ||
3814 | /* remove VID from filter table */ | |
3815 | index = (vid >> 5) & 0x7F; | |
3816 | vfta = array_rd32(E1000_VFTA, index); | |
3817 | vfta &= ~(1 << (vid & 0x1F)); | |
3818 | igb_write_vfta(&adapter->hw, index, vfta); | |
3819 | } | |
3820 | ||
3821 | static void igb_restore_vlan(struct igb_adapter *adapter) | |
3822 | { | |
3823 | igb_vlan_rx_register(adapter->netdev, adapter->vlgrp); | |
3824 | ||
3825 | if (adapter->vlgrp) { | |
3826 | u16 vid; | |
3827 | for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) { | |
3828 | if (!vlan_group_get_device(adapter->vlgrp, vid)) | |
3829 | continue; | |
3830 | igb_vlan_rx_add_vid(adapter->netdev, vid); | |
3831 | } | |
3832 | } | |
3833 | } | |
3834 | ||
3835 | int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx) | |
3836 | { | |
3837 | struct e1000_mac_info *mac = &adapter->hw.mac; | |
3838 | ||
3839 | mac->autoneg = 0; | |
3840 | ||
3841 | /* Fiber NICs only allow 1000 gbps Full duplex */ | |
3842 | if ((adapter->hw.phy.media_type == e1000_media_type_fiber) && | |
3843 | spddplx != (SPEED_1000 + DUPLEX_FULL)) { | |
3844 | dev_err(&adapter->pdev->dev, | |
3845 | "Unsupported Speed/Duplex configuration\n"); | |
3846 | return -EINVAL; | |
3847 | } | |
3848 | ||
3849 | switch (spddplx) { | |
3850 | case SPEED_10 + DUPLEX_HALF: | |
3851 | mac->forced_speed_duplex = ADVERTISE_10_HALF; | |
3852 | break; | |
3853 | case SPEED_10 + DUPLEX_FULL: | |
3854 | mac->forced_speed_duplex = ADVERTISE_10_FULL; | |
3855 | break; | |
3856 | case SPEED_100 + DUPLEX_HALF: | |
3857 | mac->forced_speed_duplex = ADVERTISE_100_HALF; | |
3858 | break; | |
3859 | case SPEED_100 + DUPLEX_FULL: | |
3860 | mac->forced_speed_duplex = ADVERTISE_100_FULL; | |
3861 | break; | |
3862 | case SPEED_1000 + DUPLEX_FULL: | |
3863 | mac->autoneg = 1; | |
3864 | adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL; | |
3865 | break; | |
3866 | case SPEED_1000 + DUPLEX_HALF: /* not supported */ | |
3867 | default: | |
3868 | dev_err(&adapter->pdev->dev, | |
3869 | "Unsupported Speed/Duplex configuration\n"); | |
3870 | return -EINVAL; | |
3871 | } | |
3872 | return 0; | |
3873 | } | |
3874 | ||
3875 | ||
3876 | static int igb_suspend(struct pci_dev *pdev, pm_message_t state) | |
3877 | { | |
3878 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3879 | struct igb_adapter *adapter = netdev_priv(netdev); | |
3880 | struct e1000_hw *hw = &adapter->hw; | |
3881 | u32 ctrl, ctrl_ext, rctl, status; | |
3882 | u32 wufc = adapter->wol; | |
3883 | #ifdef CONFIG_PM | |
3884 | int retval = 0; | |
3885 | #endif | |
3886 | ||
3887 | netif_device_detach(netdev); | |
3888 | ||
3889 | if (netif_running(netdev)) { | |
3890 | WARN_ON(test_bit(__IGB_RESETTING, &adapter->state)); | |
3891 | igb_down(adapter); | |
3892 | igb_free_irq(adapter); | |
3893 | } | |
3894 | ||
3895 | #ifdef CONFIG_PM | |
3896 | retval = pci_save_state(pdev); | |
3897 | if (retval) | |
3898 | return retval; | |
3899 | #endif | |
3900 | ||
3901 | status = rd32(E1000_STATUS); | |
3902 | if (status & E1000_STATUS_LU) | |
3903 | wufc &= ~E1000_WUFC_LNKC; | |
3904 | ||
3905 | if (wufc) { | |
3906 | igb_setup_rctl(adapter); | |
3907 | igb_set_multi(netdev); | |
3908 | ||
3909 | /* turn on all-multi mode if wake on multicast is enabled */ | |
3910 | if (wufc & E1000_WUFC_MC) { | |
3911 | rctl = rd32(E1000_RCTL); | |
3912 | rctl |= E1000_RCTL_MPE; | |
3913 | wr32(E1000_RCTL, rctl); | |
3914 | } | |
3915 | ||
3916 | ctrl = rd32(E1000_CTRL); | |
3917 | /* advertise wake from D3Cold */ | |
3918 | #define E1000_CTRL_ADVD3WUC 0x00100000 | |
3919 | /* phy power management enable */ | |
3920 | #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000 | |
3921 | ctrl |= E1000_CTRL_ADVD3WUC; | |
3922 | wr32(E1000_CTRL, ctrl); | |
3923 | ||
3924 | if (adapter->hw.phy.media_type == e1000_media_type_fiber || | |
3925 | adapter->hw.phy.media_type == | |
3926 | e1000_media_type_internal_serdes) { | |
3927 | /* keep the laser running in D3 */ | |
3928 | ctrl_ext = rd32(E1000_CTRL_EXT); | |
3929 | ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA; | |
3930 | wr32(E1000_CTRL_EXT, ctrl_ext); | |
3931 | } | |
3932 | ||
3933 | /* Allow time for pending master requests to run */ | |
3934 | igb_disable_pcie_master(&adapter->hw); | |
3935 | ||
3936 | wr32(E1000_WUC, E1000_WUC_PME_EN); | |
3937 | wr32(E1000_WUFC, wufc); | |
3938 | pci_enable_wake(pdev, PCI_D3hot, 1); | |
3939 | pci_enable_wake(pdev, PCI_D3cold, 1); | |
3940 | } else { | |
3941 | wr32(E1000_WUC, 0); | |
3942 | wr32(E1000_WUFC, 0); | |
3943 | pci_enable_wake(pdev, PCI_D3hot, 0); | |
3944 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
3945 | } | |
3946 | ||
9d5c8243 AK |
3947 | /* make sure adapter isn't asleep if manageability is enabled */ |
3948 | if (adapter->en_mng_pt) { | |
3949 | pci_enable_wake(pdev, PCI_D3hot, 1); | |
3950 | pci_enable_wake(pdev, PCI_D3cold, 1); | |
3951 | } | |
3952 | ||
3953 | /* Release control of h/w to f/w. If f/w is AMT enabled, this | |
3954 | * would have already happened in close and is redundant. */ | |
3955 | igb_release_hw_control(adapter); | |
3956 | ||
3957 | pci_disable_device(pdev); | |
3958 | ||
3959 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | |
3960 | ||
3961 | return 0; | |
3962 | } | |
3963 | ||
3964 | #ifdef CONFIG_PM | |
3965 | static int igb_resume(struct pci_dev *pdev) | |
3966 | { | |
3967 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3968 | struct igb_adapter *adapter = netdev_priv(netdev); | |
3969 | struct e1000_hw *hw = &adapter->hw; | |
3970 | u32 err; | |
3971 | ||
3972 | pci_set_power_state(pdev, PCI_D0); | |
3973 | pci_restore_state(pdev); | |
3974 | err = pci_enable_device(pdev); | |
3975 | if (err) { | |
3976 | dev_err(&pdev->dev, | |
3977 | "igb: Cannot enable PCI device from suspend\n"); | |
3978 | return err; | |
3979 | } | |
3980 | pci_set_master(pdev); | |
3981 | ||
3982 | pci_enable_wake(pdev, PCI_D3hot, 0); | |
3983 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
3984 | ||
3985 | if (netif_running(netdev)) { | |
3986 | err = igb_request_irq(adapter); | |
3987 | if (err) | |
3988 | return err; | |
3989 | } | |
3990 | ||
3991 | /* e1000_power_up_phy(adapter); */ | |
3992 | ||
3993 | igb_reset(adapter); | |
3994 | wr32(E1000_WUS, ~0); | |
3995 | ||
3996 | igb_init_manageability(adapter); | |
3997 | ||
3998 | if (netif_running(netdev)) | |
3999 | igb_up(adapter); | |
4000 | ||
4001 | netif_device_attach(netdev); | |
4002 | ||
4003 | /* let the f/w know that the h/w is now under the control of the | |
4004 | * driver. */ | |
4005 | igb_get_hw_control(adapter); | |
4006 | ||
4007 | return 0; | |
4008 | } | |
4009 | #endif | |
4010 | ||
4011 | static void igb_shutdown(struct pci_dev *pdev) | |
4012 | { | |
4013 | igb_suspend(pdev, PMSG_SUSPEND); | |
4014 | } | |
4015 | ||
4016 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
4017 | /* | |
4018 | * Polling 'interrupt' - used by things like netconsole to send skbs | |
4019 | * without having to re-enable interrupts. It's not called while | |
4020 | * the interrupt routine is executing. | |
4021 | */ | |
4022 | static void igb_netpoll(struct net_device *netdev) | |
4023 | { | |
4024 | struct igb_adapter *adapter = netdev_priv(netdev); | |
4025 | int i; | |
4026 | int work_done = 0; | |
4027 | ||
4028 | igb_irq_disable(adapter); | |
4029 | for (i = 0; i < adapter->num_tx_queues; i++) | |
4030 | igb_clean_tx_irq(adapter, &adapter->tx_ring[i]); | |
4031 | ||
4032 | for (i = 0; i < adapter->num_rx_queues; i++) | |
4033 | igb_clean_rx_irq_adv(adapter, &adapter->rx_ring[i], | |
4034 | &work_done, | |
4035 | adapter->rx_ring[i].napi.weight); | |
4036 | ||
4037 | igb_irq_enable(adapter); | |
4038 | } | |
4039 | #endif /* CONFIG_NET_POLL_CONTROLLER */ | |
4040 | ||
4041 | /** | |
4042 | * igb_io_error_detected - called when PCI error is detected | |
4043 | * @pdev: Pointer to PCI device | |
4044 | * @state: The current pci connection state | |
4045 | * | |
4046 | * This function is called after a PCI bus error affecting | |
4047 | * this device has been detected. | |
4048 | */ | |
4049 | static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev, | |
4050 | pci_channel_state_t state) | |
4051 | { | |
4052 | struct net_device *netdev = pci_get_drvdata(pdev); | |
4053 | struct igb_adapter *adapter = netdev_priv(netdev); | |
4054 | ||
4055 | netif_device_detach(netdev); | |
4056 | ||
4057 | if (netif_running(netdev)) | |
4058 | igb_down(adapter); | |
4059 | pci_disable_device(pdev); | |
4060 | ||
4061 | /* Request a slot slot reset. */ | |
4062 | return PCI_ERS_RESULT_NEED_RESET; | |
4063 | } | |
4064 | ||
4065 | /** | |
4066 | * igb_io_slot_reset - called after the pci bus has been reset. | |
4067 | * @pdev: Pointer to PCI device | |
4068 | * | |
4069 | * Restart the card from scratch, as if from a cold-boot. Implementation | |
4070 | * resembles the first-half of the igb_resume routine. | |
4071 | */ | |
4072 | static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev) | |
4073 | { | |
4074 | struct net_device *netdev = pci_get_drvdata(pdev); | |
4075 | struct igb_adapter *adapter = netdev_priv(netdev); | |
4076 | struct e1000_hw *hw = &adapter->hw; | |
4077 | ||
4078 | if (pci_enable_device(pdev)) { | |
4079 | dev_err(&pdev->dev, | |
4080 | "Cannot re-enable PCI device after reset.\n"); | |
4081 | return PCI_ERS_RESULT_DISCONNECT; | |
4082 | } | |
4083 | pci_set_master(pdev); | |
c682fc23 | 4084 | pci_restore_state(pdev); |
9d5c8243 AK |
4085 | |
4086 | pci_enable_wake(pdev, PCI_D3hot, 0); | |
4087 | pci_enable_wake(pdev, PCI_D3cold, 0); | |
4088 | ||
4089 | igb_reset(adapter); | |
4090 | wr32(E1000_WUS, ~0); | |
4091 | ||
4092 | return PCI_ERS_RESULT_RECOVERED; | |
4093 | } | |
4094 | ||
4095 | /** | |
4096 | * igb_io_resume - called when traffic can start flowing again. | |
4097 | * @pdev: Pointer to PCI device | |
4098 | * | |
4099 | * This callback is called when the error recovery driver tells us that | |
4100 | * its OK to resume normal operation. Implementation resembles the | |
4101 | * second-half of the igb_resume routine. | |
4102 | */ | |
4103 | static void igb_io_resume(struct pci_dev *pdev) | |
4104 | { | |
4105 | struct net_device *netdev = pci_get_drvdata(pdev); | |
4106 | struct igb_adapter *adapter = netdev_priv(netdev); | |
4107 | ||
4108 | igb_init_manageability(adapter); | |
4109 | ||
4110 | if (netif_running(netdev)) { | |
4111 | if (igb_up(adapter)) { | |
4112 | dev_err(&pdev->dev, "igb_up failed after reset\n"); | |
4113 | return; | |
4114 | } | |
4115 | } | |
4116 | ||
4117 | netif_device_attach(netdev); | |
4118 | ||
4119 | /* let the f/w know that the h/w is now under the control of the | |
4120 | * driver. */ | |
4121 | igb_get_hw_control(adapter); | |
4122 | ||
4123 | } | |
4124 | ||
4125 | /* igb_main.c */ |