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6f475c01 NP |
1 | /* |
2 | * linux/drivers/net/irda/pxaficp_ir.c | |
3 | * | |
4 | * Based on sa1100_ir.c by Russell King | |
5 | * | |
6 | * Changes copyright (C) 2003-2005 MontaVista Software, Inc. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * Infra-red driver (SIR/FIR) for the PXA2xx embedded microprocessor | |
13 | * | |
14 | */ | |
6f475c01 | 15 | #include <linux/module.h> |
6f475c01 | 16 | #include <linux/netdevice.h> |
f6a26293 | 17 | #include <linux/etherdevice.h> |
d052d1be | 18 | #include <linux/platform_device.h> |
82d553c6 | 19 | #include <linux/clk.h> |
c4bd0172 | 20 | #include <linux/gpio.h> |
5a0e3ad6 | 21 | #include <linux/slab.h> |
6f475c01 NP |
22 | |
23 | #include <net/irda/irda.h> | |
24 | #include <net/irda/irmod.h> | |
25 | #include <net/irda/wrapper.h> | |
26 | #include <net/irda/irda_device.h> | |
27 | ||
dcea83ad | 28 | #include <mach/dma.h> |
a09e64fb | 29 | #include <mach/irda.h> |
02f65262 | 30 | #include <mach/regs-uart.h> |
5bf3df3f | 31 | #include <mach/regs-ost.h> |
6f475c01 | 32 | |
b40ddf57 EM |
33 | #define FICP __REG(0x40800000) /* Start of FICP area */ |
34 | #define ICCR0 __REG(0x40800000) /* ICP Control Register 0 */ | |
35 | #define ICCR1 __REG(0x40800004) /* ICP Control Register 1 */ | |
36 | #define ICCR2 __REG(0x40800008) /* ICP Control Register 2 */ | |
37 | #define ICDR __REG(0x4080000c) /* ICP Data Register */ | |
38 | #define ICSR0 __REG(0x40800014) /* ICP Status Register 0 */ | |
39 | #define ICSR1 __REG(0x40800018) /* ICP Status Register 1 */ | |
40 | ||
41 | #define ICCR0_AME (1 << 7) /* Address match enable */ | |
42 | #define ICCR0_TIE (1 << 6) /* Transmit FIFO interrupt enable */ | |
43 | #define ICCR0_RIE (1 << 5) /* Recieve FIFO interrupt enable */ | |
44 | #define ICCR0_RXE (1 << 4) /* Receive enable */ | |
45 | #define ICCR0_TXE (1 << 3) /* Transmit enable */ | |
46 | #define ICCR0_TUS (1 << 2) /* Transmit FIFO underrun select */ | |
47 | #define ICCR0_LBM (1 << 1) /* Loopback mode */ | |
48 | #define ICCR0_ITR (1 << 0) /* IrDA transmission */ | |
49 | ||
50 | #define ICCR2_RXP (1 << 3) /* Receive Pin Polarity select */ | |
51 | #define ICCR2_TXP (1 << 2) /* Transmit Pin Polarity select */ | |
52 | #define ICCR2_TRIG (3 << 0) /* Receive FIFO Trigger threshold */ | |
53 | #define ICCR2_TRIG_8 (0 << 0) /* >= 8 bytes */ | |
54 | #define ICCR2_TRIG_16 (1 << 0) /* >= 16 bytes */ | |
55 | #define ICCR2_TRIG_32 (2 << 0) /* >= 32 bytes */ | |
56 | ||
57 | #ifdef CONFIG_PXA27x | |
58 | #define ICSR0_EOC (1 << 6) /* DMA End of Descriptor Chain */ | |
59 | #endif | |
60 | #define ICSR0_FRE (1 << 5) /* Framing error */ | |
61 | #define ICSR0_RFS (1 << 4) /* Receive FIFO service request */ | |
62 | #define ICSR0_TFS (1 << 3) /* Transnit FIFO service request */ | |
63 | #define ICSR0_RAB (1 << 2) /* Receiver abort */ | |
64 | #define ICSR0_TUR (1 << 1) /* Trunsmit FIFO underun */ | |
65 | #define ICSR0_EIF (1 << 0) /* End/Error in FIFO */ | |
66 | ||
67 | #define ICSR1_ROR (1 << 6) /* Receiver FIFO underrun */ | |
68 | #define ICSR1_CRE (1 << 5) /* CRC error */ | |
69 | #define ICSR1_EOF (1 << 4) /* End of frame */ | |
70 | #define ICSR1_TNF (1 << 3) /* Transmit FIFO not full */ | |
71 | #define ICSR1_RNE (1 << 2) /* Receive FIFO not empty */ | |
72 | #define ICSR1_TBY (1 << 1) /* Tramsmiter busy flag */ | |
73 | #define ICSR1_RSY (1 << 0) /* Recevier synchronized flag */ | |
6f475c01 | 74 | |
6f475c01 NP |
75 | #define IrSR_RXPL_NEG_IS_ZERO (1<<4) |
76 | #define IrSR_RXPL_POS_IS_ZERO 0x0 | |
77 | #define IrSR_TXPL_NEG_IS_ZERO (1<<3) | |
78 | #define IrSR_TXPL_POS_IS_ZERO 0x0 | |
79 | #define IrSR_XMODE_PULSE_1_6 (1<<2) | |
80 | #define IrSR_XMODE_PULSE_3_16 0x0 | |
81 | #define IrSR_RCVEIR_IR_MODE (1<<1) | |
82 | #define IrSR_RCVEIR_UART_MODE 0x0 | |
83 | #define IrSR_XMITIR_IR_MODE (1<<0) | |
84 | #define IrSR_XMITIR_UART_MODE 0x0 | |
85 | ||
86 | #define IrSR_IR_RECEIVE_ON (\ | |
87 | IrSR_RXPL_NEG_IS_ZERO | \ | |
88 | IrSR_TXPL_POS_IS_ZERO | \ | |
89 | IrSR_XMODE_PULSE_3_16 | \ | |
90 | IrSR_RCVEIR_IR_MODE | \ | |
91 | IrSR_XMITIR_UART_MODE) | |
92 | ||
93 | #define IrSR_IR_TRANSMIT_ON (\ | |
94 | IrSR_RXPL_NEG_IS_ZERO | \ | |
95 | IrSR_TXPL_POS_IS_ZERO | \ | |
96 | IrSR_XMODE_PULSE_3_16 | \ | |
97 | IrSR_RCVEIR_UART_MODE | \ | |
98 | IrSR_XMITIR_IR_MODE) | |
99 | ||
100 | struct pxa_irda { | |
101 | int speed; | |
102 | int newspeed; | |
103 | unsigned long last_oscr; | |
104 | ||
105 | unsigned char *dma_rx_buff; | |
106 | unsigned char *dma_tx_buff; | |
107 | dma_addr_t dma_rx_buff_phy; | |
108 | dma_addr_t dma_tx_buff_phy; | |
109 | unsigned int dma_tx_buff_len; | |
110 | int txdma; | |
111 | int rxdma; | |
112 | ||
6f475c01 NP |
113 | struct irlap_cb *irlap; |
114 | struct qos_info qos; | |
115 | ||
116 | iobuff_t tx_buff; | |
117 | iobuff_t rx_buff; | |
118 | ||
119 | struct device *dev; | |
120 | struct pxaficp_platform_data *pdata; | |
82d553c6 RK |
121 | struct clk *fir_clk; |
122 | struct clk *sir_clk; | |
123 | struct clk *cur_clk; | |
6f475c01 NP |
124 | }; |
125 | ||
82d553c6 RK |
126 | static inline void pxa_irda_disable_clk(struct pxa_irda *si) |
127 | { | |
128 | if (si->cur_clk) | |
129 | clk_disable(si->cur_clk); | |
130 | si->cur_clk = NULL; | |
131 | } | |
132 | ||
133 | static inline void pxa_irda_enable_firclk(struct pxa_irda *si) | |
134 | { | |
135 | si->cur_clk = si->fir_clk; | |
136 | clk_enable(si->fir_clk); | |
137 | } | |
138 | ||
139 | static inline void pxa_irda_enable_sirclk(struct pxa_irda *si) | |
140 | { | |
141 | si->cur_clk = si->sir_clk; | |
142 | clk_enable(si->sir_clk); | |
143 | } | |
144 | ||
6f475c01 NP |
145 | |
146 | #define IS_FIR(si) ((si)->speed >= 4000000) | |
147 | #define IRDA_FRAME_SIZE_LIMIT 2047 | |
148 | ||
149 | inline static void pxa_irda_fir_dma_rx_start(struct pxa_irda *si) | |
150 | { | |
151 | DCSR(si->rxdma) = DCSR_NODESC; | |
152 | DSADR(si->rxdma) = __PREG(ICDR); | |
153 | DTADR(si->rxdma) = si->dma_rx_buff_phy; | |
154 | DCMD(si->rxdma) = DCMD_INCTRGADDR | DCMD_FLOWSRC | DCMD_WIDTH1 | DCMD_BURST32 | IRDA_FRAME_SIZE_LIMIT; | |
155 | DCSR(si->rxdma) |= DCSR_RUN; | |
156 | } | |
157 | ||
158 | inline static void pxa_irda_fir_dma_tx_start(struct pxa_irda *si) | |
159 | { | |
160 | DCSR(si->txdma) = DCSR_NODESC; | |
161 | DSADR(si->txdma) = si->dma_tx_buff_phy; | |
162 | DTADR(si->txdma) = __PREG(ICDR); | |
163 | DCMD(si->txdma) = DCMD_INCSRCADDR | DCMD_FLOWTRG | DCMD_ENDIRQEN | DCMD_WIDTH1 | DCMD_BURST32 | si->dma_tx_buff_len; | |
164 | DCSR(si->txdma) |= DCSR_RUN; | |
165 | } | |
166 | ||
c4bd0172 MV |
167 | /* |
168 | * Set the IrDA communications mode. | |
169 | */ | |
170 | static void pxa_irda_set_mode(struct pxa_irda *si, int mode) | |
171 | { | |
172 | if (si->pdata->transceiver_mode) | |
173 | si->pdata->transceiver_mode(si->dev, mode); | |
174 | else { | |
175 | if (gpio_is_valid(si->pdata->gpio_pwdown)) | |
176 | gpio_set_value(si->pdata->gpio_pwdown, | |
177 | !(mode & IR_OFF) ^ | |
178 | !si->pdata->gpio_pwdown_inverted); | |
179 | pxa2xx_transceiver_mode(si->dev, mode); | |
180 | } | |
181 | } | |
182 | ||
6f475c01 NP |
183 | /* |
184 | * Set the IrDA communications speed. | |
185 | */ | |
186 | static int pxa_irda_set_speed(struct pxa_irda *si, int speed) | |
187 | { | |
188 | unsigned long flags; | |
189 | unsigned int divisor; | |
190 | ||
191 | switch (speed) { | |
192 | case 9600: case 19200: case 38400: | |
193 | case 57600: case 115200: | |
194 | ||
195 | /* refer to PXA250/210 Developer's Manual 10-7 */ | |
196 | /* BaudRate = 14.7456 MHz / (16*Divisor) */ | |
197 | divisor = 14745600 / (16 * speed); | |
198 | ||
199 | local_irq_save(flags); | |
200 | ||
201 | if (IS_FIR(si)) { | |
202 | /* stop RX DMA */ | |
203 | DCSR(si->rxdma) &= ~DCSR_RUN; | |
204 | /* disable FICP */ | |
205 | ICCR0 = 0; | |
82d553c6 | 206 | pxa_irda_disable_clk(si); |
6f475c01 NP |
207 | |
208 | /* set board transceiver to SIR mode */ | |
c4bd0172 | 209 | pxa_irda_set_mode(si, IR_SIRMODE); |
6f475c01 | 210 | |
6f475c01 | 211 | /* enable the STUART clock */ |
82d553c6 | 212 | pxa_irda_enable_sirclk(si); |
6f475c01 NP |
213 | } |
214 | ||
215 | /* disable STUART first */ | |
216 | STIER = 0; | |
217 | ||
218 | /* access DLL & DLH */ | |
219 | STLCR |= LCR_DLAB; | |
220 | STDLL = divisor & 0xff; | |
221 | STDLH = divisor >> 8; | |
222 | STLCR &= ~LCR_DLAB; | |
223 | ||
224 | si->speed = speed; | |
225 | STISR = IrSR_IR_RECEIVE_ON | IrSR_XMODE_PULSE_1_6; | |
226 | STIER = IER_UUE | IER_RLSE | IER_RAVIE | IER_RTIOE; | |
227 | ||
228 | local_irq_restore(flags); | |
229 | break; | |
230 | ||
231 | case 4000000: | |
232 | local_irq_save(flags); | |
233 | ||
234 | /* disable STUART */ | |
235 | STIER = 0; | |
236 | STISR = 0; | |
82d553c6 | 237 | pxa_irda_disable_clk(si); |
6f475c01 NP |
238 | |
239 | /* disable FICP first */ | |
240 | ICCR0 = 0; | |
241 | ||
242 | /* set board transceiver to FIR mode */ | |
c4bd0172 | 243 | pxa_irda_set_mode(si, IR_FIRMODE); |
6f475c01 | 244 | |
6f475c01 | 245 | /* enable the FICP clock */ |
82d553c6 | 246 | pxa_irda_enable_firclk(si); |
6f475c01 NP |
247 | |
248 | si->speed = speed; | |
249 | pxa_irda_fir_dma_rx_start(si); | |
250 | ICCR0 = ICCR0_ITR | ICCR0_RXE; | |
251 | ||
252 | local_irq_restore(flags); | |
253 | break; | |
254 | ||
255 | default: | |
256 | return -EINVAL; | |
257 | } | |
258 | ||
259 | return 0; | |
260 | } | |
261 | ||
262 | /* SIR interrupt service routine. */ | |
7d12e780 | 263 | static irqreturn_t pxa_irda_sir_irq(int irq, void *dev_id) |
6f475c01 NP |
264 | { |
265 | struct net_device *dev = dev_id; | |
266 | struct pxa_irda *si = netdev_priv(dev); | |
267 | int iir, lsr, data; | |
268 | ||
269 | iir = STIIR; | |
270 | ||
271 | switch (iir & 0x0F) { | |
272 | case 0x06: /* Receiver Line Status */ | |
273 | lsr = STLSR; | |
274 | while (lsr & LSR_FIFOE) { | |
275 | data = STRBR; | |
276 | if (lsr & (LSR_OE | LSR_PE | LSR_FE | LSR_BI)) { | |
277 | printk(KERN_DEBUG "pxa_ir: sir receiving error\n"); | |
af049081 | 278 | dev->stats.rx_errors++; |
6f475c01 | 279 | if (lsr & LSR_FE) |
af049081 | 280 | dev->stats.rx_frame_errors++; |
6f475c01 | 281 | if (lsr & LSR_OE) |
af049081 | 282 | dev->stats.rx_fifo_errors++; |
6f475c01 | 283 | } else { |
af049081 SH |
284 | dev->stats.rx_bytes++; |
285 | async_unwrap_char(dev, &dev->stats, | |
286 | &si->rx_buff, data); | |
6f475c01 NP |
287 | } |
288 | lsr = STLSR; | |
289 | } | |
6f475c01 NP |
290 | si->last_oscr = OSCR; |
291 | break; | |
292 | ||
293 | case 0x04: /* Received Data Available */ | |
294 | /* forth through */ | |
295 | ||
296 | case 0x0C: /* Character Timeout Indication */ | |
297 | do { | |
af049081 SH |
298 | dev->stats.rx_bytes++; |
299 | async_unwrap_char(dev, &dev->stats, &si->rx_buff, STRBR); | |
6f475c01 | 300 | } while (STLSR & LSR_DR); |
6f475c01 NP |
301 | si->last_oscr = OSCR; |
302 | break; | |
303 | ||
304 | case 0x02: /* Transmit FIFO Data Request */ | |
305 | while ((si->tx_buff.len) && (STLSR & LSR_TDRQ)) { | |
306 | STTHR = *si->tx_buff.data++; | |
307 | si->tx_buff.len -= 1; | |
308 | } | |
309 | ||
310 | if (si->tx_buff.len == 0) { | |
af049081 SH |
311 | dev->stats.tx_packets++; |
312 | dev->stats.tx_bytes += si->tx_buff.data - si->tx_buff.head; | |
6f475c01 NP |
313 | |
314 | /* We need to ensure that the transmitter has finished. */ | |
315 | while ((STLSR & LSR_TEMT) == 0) | |
316 | cpu_relax(); | |
317 | si->last_oscr = OSCR; | |
318 | ||
319 | /* | |
320 | * Ok, we've finished transmitting. Now enable | |
321 | * the receiver. Sometimes we get a receive IRQ | |
322 | * immediately after a transmit... | |
323 | */ | |
324 | if (si->newspeed) { | |
325 | pxa_irda_set_speed(si, si->newspeed); | |
326 | si->newspeed = 0; | |
327 | } else { | |
328 | /* enable IR Receiver, disable IR Transmitter */ | |
329 | STISR = IrSR_IR_RECEIVE_ON | IrSR_XMODE_PULSE_1_6; | |
330 | /* enable STUART and receive interrupts */ | |
331 | STIER = IER_UUE | IER_RLSE | IER_RAVIE | IER_RTIOE; | |
332 | } | |
333 | /* I'm hungry! */ | |
334 | netif_wake_queue(dev); | |
335 | } | |
336 | break; | |
337 | } | |
338 | ||
339 | return IRQ_HANDLED; | |
340 | } | |
341 | ||
342 | /* FIR Receive DMA interrupt handler */ | |
7d12e780 | 343 | static void pxa_irda_fir_dma_rx_irq(int channel, void *data) |
6f475c01 NP |
344 | { |
345 | int dcsr = DCSR(channel); | |
346 | ||
347 | DCSR(channel) = dcsr & ~DCSR_RUN; | |
348 | ||
349 | printk(KERN_DEBUG "pxa_ir: fir rx dma bus error %#x\n", dcsr); | |
350 | } | |
351 | ||
352 | /* FIR Transmit DMA interrupt handler */ | |
7d12e780 | 353 | static void pxa_irda_fir_dma_tx_irq(int channel, void *data) |
6f475c01 NP |
354 | { |
355 | struct net_device *dev = data; | |
356 | struct pxa_irda *si = netdev_priv(dev); | |
357 | int dcsr; | |
358 | ||
359 | dcsr = DCSR(channel); | |
360 | DCSR(channel) = dcsr & ~DCSR_RUN; | |
361 | ||
362 | if (dcsr & DCSR_ENDINTR) { | |
af049081 SH |
363 | dev->stats.tx_packets++; |
364 | dev->stats.tx_bytes += si->dma_tx_buff_len; | |
6f475c01 | 365 | } else { |
af049081 | 366 | dev->stats.tx_errors++; |
6f475c01 NP |
367 | } |
368 | ||
369 | while (ICSR1 & ICSR1_TBY) | |
370 | cpu_relax(); | |
371 | si->last_oscr = OSCR; | |
372 | ||
373 | /* | |
374 | * HACK: It looks like the TBY bit is dropped too soon. | |
375 | * Without this delay things break. | |
376 | */ | |
377 | udelay(120); | |
378 | ||
379 | if (si->newspeed) { | |
380 | pxa_irda_set_speed(si, si->newspeed); | |
381 | si->newspeed = 0; | |
382 | } else { | |
9a4d93d4 GL |
383 | int i = 64; |
384 | ||
6f475c01 NP |
385 | ICCR0 = 0; |
386 | pxa_irda_fir_dma_rx_start(si); | |
9a4d93d4 GL |
387 | while ((ICSR1 & ICSR1_RNE) && i--) |
388 | (void)ICDR; | |
6f475c01 | 389 | ICCR0 = ICCR0_ITR | ICCR0_RXE; |
9a4d93d4 GL |
390 | |
391 | if (i < 0) | |
392 | printk(KERN_ERR "pxa_ir: cannot clear Rx FIFO!\n"); | |
6f475c01 NP |
393 | } |
394 | netif_wake_queue(dev); | |
395 | } | |
396 | ||
397 | /* EIF(Error in FIFO/End in Frame) handler for FIR */ | |
9a4d93d4 | 398 | static void pxa_irda_fir_irq_eif(struct pxa_irda *si, struct net_device *dev, int icsr0) |
6f475c01 NP |
399 | { |
400 | unsigned int len, stat, data; | |
401 | ||
402 | /* Get the current data position. */ | |
403 | len = DTADR(si->rxdma) - si->dma_rx_buff_phy; | |
404 | ||
405 | do { | |
406 | /* Read Status, and then Data. */ | |
407 | stat = ICSR1; | |
408 | rmb(); | |
409 | data = ICDR; | |
410 | ||
411 | if (stat & (ICSR1_CRE | ICSR1_ROR)) { | |
af049081 | 412 | dev->stats.rx_errors++; |
6f475c01 NP |
413 | if (stat & ICSR1_CRE) { |
414 | printk(KERN_DEBUG "pxa_ir: fir receive CRC error\n"); | |
af049081 | 415 | dev->stats.rx_crc_errors++; |
6f475c01 NP |
416 | } |
417 | if (stat & ICSR1_ROR) { | |
418 | printk(KERN_DEBUG "pxa_ir: fir receive overrun\n"); | |
af049081 | 419 | dev->stats.rx_over_errors++; |
6f475c01 NP |
420 | } |
421 | } else { | |
422 | si->dma_rx_buff[len++] = data; | |
423 | } | |
424 | /* If we hit the end of frame, there's no point in continuing. */ | |
425 | if (stat & ICSR1_EOF) | |
426 | break; | |
427 | } while (ICSR0 & ICSR0_EIF); | |
428 | ||
429 | if (stat & ICSR1_EOF) { | |
430 | /* end of frame. */ | |
9a4d93d4 GL |
431 | struct sk_buff *skb; |
432 | ||
433 | if (icsr0 & ICSR0_FRE) { | |
434 | printk(KERN_ERR "pxa_ir: dropping erroneous frame\n"); | |
af049081 | 435 | dev->stats.rx_dropped++; |
9a4d93d4 GL |
436 | return; |
437 | } | |
438 | ||
439 | skb = alloc_skb(len+1,GFP_ATOMIC); | |
6f475c01 NP |
440 | if (!skb) { |
441 | printk(KERN_ERR "pxa_ir: fir out of memory for receive skb\n"); | |
af049081 | 442 | dev->stats.rx_dropped++; |
6f475c01 NP |
443 | return; |
444 | } | |
445 | ||
446 | /* Align IP header to 20 bytes */ | |
447 | skb_reserve(skb, 1); | |
27d7ff46 | 448 | skb_copy_to_linear_data(skb, si->dma_rx_buff, len); |
6f475c01 NP |
449 | skb_put(skb, len); |
450 | ||
451 | /* Feed it to IrLAP */ | |
452 | skb->dev = dev; | |
459a98ed | 453 | skb_reset_mac_header(skb); |
6f475c01 NP |
454 | skb->protocol = htons(ETH_P_IRDA); |
455 | netif_rx(skb); | |
456 | ||
af049081 SH |
457 | dev->stats.rx_packets++; |
458 | dev->stats.rx_bytes += len; | |
6f475c01 NP |
459 | } |
460 | } | |
461 | ||
462 | /* FIR interrupt handler */ | |
7d12e780 | 463 | static irqreturn_t pxa_irda_fir_irq(int irq, void *dev_id) |
6f475c01 NP |
464 | { |
465 | struct net_device *dev = dev_id; | |
466 | struct pxa_irda *si = netdev_priv(dev); | |
9a4d93d4 | 467 | int icsr0, i = 64; |
6f475c01 NP |
468 | |
469 | /* stop RX DMA */ | |
470 | DCSR(si->rxdma) &= ~DCSR_RUN; | |
471 | si->last_oscr = OSCR; | |
472 | icsr0 = ICSR0; | |
473 | ||
474 | if (icsr0 & (ICSR0_FRE | ICSR0_RAB)) { | |
475 | if (icsr0 & ICSR0_FRE) { | |
476 | printk(KERN_DEBUG "pxa_ir: fir receive frame error\n"); | |
af049081 | 477 | dev->stats.rx_frame_errors++; |
6f475c01 NP |
478 | } else { |
479 | printk(KERN_DEBUG "pxa_ir: fir receive abort\n"); | |
af049081 | 480 | dev->stats.rx_errors++; |
6f475c01 NP |
481 | } |
482 | ICSR0 = icsr0 & (ICSR0_FRE | ICSR0_RAB); | |
483 | } | |
484 | ||
485 | if (icsr0 & ICSR0_EIF) { | |
486 | /* An error in FIFO occured, or there is a end of frame */ | |
9a4d93d4 | 487 | pxa_irda_fir_irq_eif(si, dev, icsr0); |
6f475c01 NP |
488 | } |
489 | ||
490 | ICCR0 = 0; | |
491 | pxa_irda_fir_dma_rx_start(si); | |
9a4d93d4 GL |
492 | while ((ICSR1 & ICSR1_RNE) && i--) |
493 | (void)ICDR; | |
6f475c01 NP |
494 | ICCR0 = ICCR0_ITR | ICCR0_RXE; |
495 | ||
9a4d93d4 GL |
496 | if (i < 0) |
497 | printk(KERN_ERR "pxa_ir: cannot clear Rx FIFO!\n"); | |
498 | ||
6f475c01 NP |
499 | return IRQ_HANDLED; |
500 | } | |
501 | ||
502 | /* hard_xmit interface of irda device */ | |
503 | static int pxa_irda_hard_xmit(struct sk_buff *skb, struct net_device *dev) | |
504 | { | |
505 | struct pxa_irda *si = netdev_priv(dev); | |
506 | int speed = irda_get_next_speed(skb); | |
507 | ||
508 | /* | |
509 | * Does this packet contain a request to change the interface | |
510 | * speed? If so, remember it until we complete the transmission | |
511 | * of this frame. | |
512 | */ | |
513 | if (speed != si->speed && speed != -1) | |
514 | si->newspeed = speed; | |
515 | ||
516 | /* | |
517 | * If this is an empty frame, we can bypass a lot. | |
518 | */ | |
519 | if (skb->len == 0) { | |
520 | if (si->newspeed) { | |
521 | si->newspeed = 0; | |
522 | pxa_irda_set_speed(si, speed); | |
523 | } | |
524 | dev_kfree_skb(skb); | |
6ed10654 | 525 | return NETDEV_TX_OK; |
6f475c01 NP |
526 | } |
527 | ||
528 | netif_stop_queue(dev); | |
529 | ||
530 | if (!IS_FIR(si)) { | |
531 | si->tx_buff.data = si->tx_buff.head; | |
532 | si->tx_buff.len = async_wrap_skb(skb, si->tx_buff.data, si->tx_buff.truesize); | |
533 | ||
534 | /* Disable STUART interrupts and switch to transmit mode. */ | |
535 | STIER = 0; | |
536 | STISR = IrSR_IR_TRANSMIT_ON | IrSR_XMODE_PULSE_1_6; | |
537 | ||
538 | /* enable STUART and transmit interrupts */ | |
539 | STIER = IER_UUE | IER_TIE; | |
540 | } else { | |
541 | unsigned long mtt = irda_get_mtt(skb); | |
542 | ||
543 | si->dma_tx_buff_len = skb->len; | |
d626f62b | 544 | skb_copy_from_linear_data(skb, si->dma_tx_buff, skb->len); |
6f475c01 NP |
545 | |
546 | if (mtt) | |
547 | while ((unsigned)(OSCR - si->last_oscr)/4 < mtt) | |
548 | cpu_relax(); | |
549 | ||
550 | /* stop RX DMA, disable FICP */ | |
551 | DCSR(si->rxdma) &= ~DCSR_RUN; | |
552 | ICCR0 = 0; | |
553 | ||
554 | pxa_irda_fir_dma_tx_start(si); | |
555 | ICCR0 = ICCR0_ITR | ICCR0_TXE; | |
556 | } | |
557 | ||
558 | dev_kfree_skb(skb); | |
559 | dev->trans_start = jiffies; | |
6ed10654 | 560 | return NETDEV_TX_OK; |
6f475c01 NP |
561 | } |
562 | ||
563 | static int pxa_irda_ioctl(struct net_device *dev, struct ifreq *ifreq, int cmd) | |
564 | { | |
565 | struct if_irda_req *rq = (struct if_irda_req *)ifreq; | |
566 | struct pxa_irda *si = netdev_priv(dev); | |
567 | int ret; | |
568 | ||
569 | switch (cmd) { | |
570 | case SIOCSBANDWIDTH: | |
571 | ret = -EPERM; | |
572 | if (capable(CAP_NET_ADMIN)) { | |
573 | /* | |
574 | * We are unable to set the speed if the | |
575 | * device is not running. | |
576 | */ | |
577 | if (netif_running(dev)) { | |
578 | ret = pxa_irda_set_speed(si, | |
579 | rq->ifr_baudrate); | |
580 | } else { | |
581 | printk(KERN_INFO "pxa_ir: SIOCSBANDWIDTH: !netif_running\n"); | |
582 | ret = 0; | |
583 | } | |
584 | } | |
585 | break; | |
586 | ||
587 | case SIOCSMEDIABUSY: | |
588 | ret = -EPERM; | |
589 | if (capable(CAP_NET_ADMIN)) { | |
590 | irda_device_set_media_busy(dev, TRUE); | |
591 | ret = 0; | |
592 | } | |
593 | break; | |
594 | ||
595 | case SIOCGRECEIVING: | |
596 | ret = 0; | |
597 | rq->ifr_receiving = IS_FIR(si) ? 0 | |
598 | : si->rx_buff.state != OUTSIDE_FRAME; | |
599 | break; | |
600 | ||
601 | default: | |
602 | ret = -EOPNOTSUPP; | |
603 | break; | |
604 | } | |
605 | ||
606 | return ret; | |
607 | } | |
608 | ||
6f475c01 NP |
609 | static void pxa_irda_startup(struct pxa_irda *si) |
610 | { | |
611 | /* Disable STUART interrupts */ | |
612 | STIER = 0; | |
613 | /* enable STUART interrupt to the processor */ | |
614 | STMCR = MCR_OUT2; | |
615 | /* configure SIR frame format: StartBit - Data 7 ... Data 0 - Stop Bit */ | |
616 | STLCR = LCR_WLS0 | LCR_WLS1; | |
617 | /* enable FIFO, we use FIFO to improve performance */ | |
618 | STFCR = FCR_TRFIFOE | FCR_ITL_32; | |
619 | ||
620 | /* disable FICP */ | |
621 | ICCR0 = 0; | |
622 | /* configure FICP ICCR2 */ | |
623 | ICCR2 = ICCR2_TXP | ICCR2_TRIG_32; | |
624 | ||
625 | /* configure DMAC */ | |
87f3dd77 EM |
626 | DRCMR(17) = si->rxdma | DRCMR_MAPVLD; |
627 | DRCMR(18) = si->txdma | DRCMR_MAPVLD; | |
6f475c01 NP |
628 | |
629 | /* force SIR reinitialization */ | |
630 | si->speed = 4000000; | |
631 | pxa_irda_set_speed(si, 9600); | |
632 | ||
633 | printk(KERN_DEBUG "pxa_ir: irda startup\n"); | |
634 | } | |
635 | ||
636 | static void pxa_irda_shutdown(struct pxa_irda *si) | |
637 | { | |
638 | unsigned long flags; | |
639 | ||
640 | local_irq_save(flags); | |
641 | ||
642 | /* disable STUART and interrupt */ | |
643 | STIER = 0; | |
644 | /* disable STUART SIR mode */ | |
645 | STISR = 0; | |
6f475c01 NP |
646 | |
647 | /* disable DMA */ | |
648 | DCSR(si->txdma) &= ~DCSR_RUN; | |
649 | DCSR(si->rxdma) &= ~DCSR_RUN; | |
650 | /* disable FICP */ | |
651 | ICCR0 = 0; | |
82d553c6 RK |
652 | |
653 | /* disable the STUART or FICP clocks */ | |
654 | pxa_irda_disable_clk(si); | |
6f475c01 | 655 | |
87f3dd77 EM |
656 | DRCMR(17) = 0; |
657 | DRCMR(18) = 0; | |
6f475c01 NP |
658 | |
659 | local_irq_restore(flags); | |
660 | ||
661 | /* power off board transceiver */ | |
c4bd0172 | 662 | pxa_irda_set_mode(si, IR_OFF); |
6f475c01 NP |
663 | |
664 | printk(KERN_DEBUG "pxa_ir: irda shutdown\n"); | |
665 | } | |
666 | ||
667 | static int pxa_irda_start(struct net_device *dev) | |
668 | { | |
669 | struct pxa_irda *si = netdev_priv(dev); | |
670 | int err; | |
671 | ||
672 | si->speed = 9600; | |
673 | ||
674 | err = request_irq(IRQ_STUART, pxa_irda_sir_irq, 0, dev->name, dev); | |
675 | if (err) | |
676 | goto err_irq1; | |
677 | ||
678 | err = request_irq(IRQ_ICP, pxa_irda_fir_irq, 0, dev->name, dev); | |
679 | if (err) | |
680 | goto err_irq2; | |
681 | ||
682 | /* | |
683 | * The interrupt must remain disabled for now. | |
684 | */ | |
685 | disable_irq(IRQ_STUART); | |
686 | disable_irq(IRQ_ICP); | |
687 | ||
688 | err = -EBUSY; | |
689 | si->rxdma = pxa_request_dma("FICP_RX",DMA_PRIO_LOW, pxa_irda_fir_dma_rx_irq, dev); | |
690 | if (si->rxdma < 0) | |
691 | goto err_rx_dma; | |
692 | ||
693 | si->txdma = pxa_request_dma("FICP_TX",DMA_PRIO_LOW, pxa_irda_fir_dma_tx_irq, dev); | |
694 | if (si->txdma < 0) | |
695 | goto err_tx_dma; | |
696 | ||
697 | err = -ENOMEM; | |
698 | si->dma_rx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, | |
699 | &si->dma_rx_buff_phy, GFP_KERNEL ); | |
700 | if (!si->dma_rx_buff) | |
701 | goto err_dma_rx_buff; | |
702 | ||
703 | si->dma_tx_buff = dma_alloc_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, | |
704 | &si->dma_tx_buff_phy, GFP_KERNEL ); | |
705 | if (!si->dma_tx_buff) | |
706 | goto err_dma_tx_buff; | |
707 | ||
708 | /* Setup the serial port for the initial speed. */ | |
709 | pxa_irda_startup(si); | |
710 | ||
711 | /* | |
712 | * Open a new IrLAP layer instance. | |
713 | */ | |
714 | si->irlap = irlap_open(dev, &si->qos, "pxa"); | |
715 | err = -ENOMEM; | |
716 | if (!si->irlap) | |
717 | goto err_irlap; | |
718 | ||
719 | /* | |
720 | * Now enable the interrupt and start the queue | |
721 | */ | |
722 | enable_irq(IRQ_STUART); | |
723 | enable_irq(IRQ_ICP); | |
724 | netif_start_queue(dev); | |
725 | ||
726 | printk(KERN_DEBUG "pxa_ir: irda driver opened\n"); | |
727 | ||
728 | return 0; | |
729 | ||
730 | err_irlap: | |
731 | pxa_irda_shutdown(si); | |
732 | dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy); | |
733 | err_dma_tx_buff: | |
734 | dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy); | |
735 | err_dma_rx_buff: | |
736 | pxa_free_dma(si->txdma); | |
737 | err_tx_dma: | |
738 | pxa_free_dma(si->rxdma); | |
739 | err_rx_dma: | |
740 | free_irq(IRQ_ICP, dev); | |
741 | err_irq2: | |
742 | free_irq(IRQ_STUART, dev); | |
743 | err_irq1: | |
744 | ||
745 | return err; | |
746 | } | |
747 | ||
748 | static int pxa_irda_stop(struct net_device *dev) | |
749 | { | |
750 | struct pxa_irda *si = netdev_priv(dev); | |
751 | ||
752 | netif_stop_queue(dev); | |
753 | ||
754 | pxa_irda_shutdown(si); | |
755 | ||
756 | /* Stop IrLAP */ | |
757 | if (si->irlap) { | |
758 | irlap_close(si->irlap); | |
759 | si->irlap = NULL; | |
760 | } | |
761 | ||
762 | free_irq(IRQ_STUART, dev); | |
763 | free_irq(IRQ_ICP, dev); | |
764 | ||
765 | pxa_free_dma(si->rxdma); | |
766 | pxa_free_dma(si->txdma); | |
767 | ||
768 | if (si->dma_rx_buff) | |
769 | dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_tx_buff, si->dma_tx_buff_phy); | |
770 | if (si->dma_tx_buff) | |
771 | dma_free_coherent(si->dev, IRDA_FRAME_SIZE_LIMIT, si->dma_rx_buff, si->dma_rx_buff_phy); | |
772 | ||
773 | printk(KERN_DEBUG "pxa_ir: irda driver closed\n"); | |
774 | return 0; | |
775 | } | |
776 | ||
b259e7d2 | 777 | static int pxa_irda_suspend(struct platform_device *_dev, pm_message_t state) |
6f475c01 | 778 | { |
b259e7d2 | 779 | struct net_device *dev = platform_get_drvdata(_dev); |
6f475c01 NP |
780 | struct pxa_irda *si; |
781 | ||
91e1a512 | 782 | if (dev && netif_running(dev)) { |
6f475c01 NP |
783 | si = netdev_priv(dev); |
784 | netif_device_detach(dev); | |
785 | pxa_irda_shutdown(si); | |
786 | } | |
787 | ||
788 | return 0; | |
789 | } | |
790 | ||
b259e7d2 | 791 | static int pxa_irda_resume(struct platform_device *_dev) |
6f475c01 | 792 | { |
b259e7d2 | 793 | struct net_device *dev = platform_get_drvdata(_dev); |
6f475c01 NP |
794 | struct pxa_irda *si; |
795 | ||
91e1a512 | 796 | if (dev && netif_running(dev)) { |
6f475c01 NP |
797 | si = netdev_priv(dev); |
798 | pxa_irda_startup(si); | |
799 | netif_device_attach(dev); | |
800 | netif_wake_queue(dev); | |
801 | } | |
802 | ||
803 | return 0; | |
804 | } | |
805 | ||
806 | ||
807 | static int pxa_irda_init_iobuf(iobuff_t *io, int size) | |
808 | { | |
809 | io->head = kmalloc(size, GFP_KERNEL | GFP_DMA); | |
810 | if (io->head != NULL) { | |
811 | io->truesize = size; | |
812 | io->in_frame = FALSE; | |
813 | io->state = OUTSIDE_FRAME; | |
814 | io->data = io->head; | |
815 | } | |
816 | return io->head ? 0 : -ENOMEM; | |
817 | } | |
818 | ||
c76ccd6a AB |
819 | static const struct net_device_ops pxa_irda_netdev_ops = { |
820 | .ndo_open = pxa_irda_start, | |
821 | .ndo_stop = pxa_irda_stop, | |
822 | .ndo_start_xmit = pxa_irda_hard_xmit, | |
823 | .ndo_do_ioctl = pxa_irda_ioctl, | |
c76ccd6a AB |
824 | }; |
825 | ||
b259e7d2 | 826 | static int pxa_irda_probe(struct platform_device *pdev) |
6f475c01 | 827 | { |
6f475c01 NP |
828 | struct net_device *dev; |
829 | struct pxa_irda *si; | |
830 | unsigned int baudrate_mask; | |
831 | int err; | |
832 | ||
833 | if (!pdev->dev.platform_data) | |
834 | return -ENODEV; | |
835 | ||
836 | err = request_mem_region(__PREG(STUART), 0x24, "IrDA") ? 0 : -EBUSY; | |
837 | if (err) | |
838 | goto err_mem_1; | |
839 | ||
840 | err = request_mem_region(__PREG(FICP), 0x1c, "IrDA") ? 0 : -EBUSY; | |
841 | if (err) | |
842 | goto err_mem_2; | |
843 | ||
844 | dev = alloc_irdadev(sizeof(struct pxa_irda)); | |
845 | if (!dev) | |
846 | goto err_mem_3; | |
847 | ||
d2f3ad4c | 848 | SET_NETDEV_DEV(dev, &pdev->dev); |
6f475c01 NP |
849 | si = netdev_priv(dev); |
850 | si->dev = &pdev->dev; | |
851 | si->pdata = pdev->dev.platform_data; | |
852 | ||
82d553c6 RK |
853 | si->sir_clk = clk_get(&pdev->dev, "UARTCLK"); |
854 | si->fir_clk = clk_get(&pdev->dev, "FICPCLK"); | |
855 | if (IS_ERR(si->sir_clk) || IS_ERR(si->fir_clk)) { | |
856 | err = PTR_ERR(IS_ERR(si->sir_clk) ? si->sir_clk : si->fir_clk); | |
857 | goto err_mem_4; | |
858 | } | |
859 | ||
6f475c01 NP |
860 | /* |
861 | * Initialise the SIR buffers | |
862 | */ | |
863 | err = pxa_irda_init_iobuf(&si->rx_buff, 14384); | |
864 | if (err) | |
865 | goto err_mem_4; | |
866 | err = pxa_irda_init_iobuf(&si->tx_buff, 4000); | |
867 | if (err) | |
868 | goto err_mem_5; | |
869 | ||
c4bd0172 MV |
870 | if (gpio_is_valid(si->pdata->gpio_pwdown)) { |
871 | err = gpio_request(si->pdata->gpio_pwdown, "IrDA switch"); | |
872 | if (err) | |
873 | goto err_startup; | |
874 | err = gpio_direction_output(si->pdata->gpio_pwdown, | |
875 | !si->pdata->gpio_pwdown_inverted); | |
876 | if (err) { | |
877 | gpio_free(si->pdata->gpio_pwdown); | |
878 | goto err_startup; | |
879 | } | |
880 | } | |
881 | ||
882 | if (si->pdata->startup) { | |
baf1c5d2 | 883 | err = si->pdata->startup(si->dev); |
c4bd0172 MV |
884 | if (err) |
885 | goto err_startup; | |
886 | } | |
887 | ||
888 | if (gpio_is_valid(si->pdata->gpio_pwdown) && si->pdata->startup) | |
889 | dev_warn(si->dev, "gpio_pwdown and startup() both defined!\n"); | |
baf1c5d2 | 890 | |
c76ccd6a | 891 | dev->netdev_ops = &pxa_irda_netdev_ops; |
6f475c01 NP |
892 | |
893 | irda_init_max_qos_capabilies(&si->qos); | |
894 | ||
895 | baudrate_mask = 0; | |
896 | if (si->pdata->transceiver_cap & IR_SIRMODE) | |
897 | baudrate_mask |= IR_9600|IR_19200|IR_38400|IR_57600|IR_115200; | |
898 | if (si->pdata->transceiver_cap & IR_FIRMODE) | |
899 | baudrate_mask |= IR_4000000 << 8; | |
900 | ||
901 | si->qos.baud_rate.bits &= baudrate_mask; | |
902 | si->qos.min_turn_time.bits = 7; /* 1ms or more */ | |
903 | ||
904 | irda_qos_bits_to_value(&si->qos); | |
905 | ||
906 | err = register_netdev(dev); | |
907 | ||
908 | if (err == 0) | |
909 | dev_set_drvdata(&pdev->dev, dev); | |
910 | ||
911 | if (err) { | |
baf1c5d2 DES |
912 | if (si->pdata->shutdown) |
913 | si->pdata->shutdown(si->dev); | |
914 | err_startup: | |
6f475c01 NP |
915 | kfree(si->tx_buff.head); |
916 | err_mem_5: | |
917 | kfree(si->rx_buff.head); | |
918 | err_mem_4: | |
82d553c6 RK |
919 | if (si->sir_clk && !IS_ERR(si->sir_clk)) |
920 | clk_put(si->sir_clk); | |
921 | if (si->fir_clk && !IS_ERR(si->fir_clk)) | |
922 | clk_put(si->fir_clk); | |
6f475c01 NP |
923 | free_netdev(dev); |
924 | err_mem_3: | |
925 | release_mem_region(__PREG(FICP), 0x1c); | |
926 | err_mem_2: | |
927 | release_mem_region(__PREG(STUART), 0x24); | |
928 | } | |
929 | err_mem_1: | |
930 | return err; | |
931 | } | |
932 | ||
b259e7d2 | 933 | static int pxa_irda_remove(struct platform_device *_dev) |
6f475c01 | 934 | { |
b259e7d2 | 935 | struct net_device *dev = platform_get_drvdata(_dev); |
6f475c01 NP |
936 | |
937 | if (dev) { | |
938 | struct pxa_irda *si = netdev_priv(dev); | |
939 | unregister_netdev(dev); | |
c4bd0172 MV |
940 | if (gpio_is_valid(si->pdata->gpio_pwdown)) |
941 | gpio_free(si->pdata->gpio_pwdown); | |
baf1c5d2 DES |
942 | if (si->pdata->shutdown) |
943 | si->pdata->shutdown(si->dev); | |
6f475c01 NP |
944 | kfree(si->tx_buff.head); |
945 | kfree(si->rx_buff.head); | |
82d553c6 RK |
946 | clk_put(si->fir_clk); |
947 | clk_put(si->sir_clk); | |
6f475c01 NP |
948 | free_netdev(dev); |
949 | } | |
950 | ||
951 | release_mem_region(__PREG(STUART), 0x24); | |
952 | release_mem_region(__PREG(FICP), 0x1c); | |
953 | ||
954 | return 0; | |
955 | } | |
956 | ||
b259e7d2 PS |
957 | static struct platform_driver pxa_ir_driver = { |
958 | .driver = { | |
959 | .name = "pxa2xx-ir", | |
72abb461 | 960 | .owner = THIS_MODULE, |
b259e7d2 | 961 | }, |
6f475c01 NP |
962 | .probe = pxa_irda_probe, |
963 | .remove = pxa_irda_remove, | |
964 | .suspend = pxa_irda_suspend, | |
965 | .resume = pxa_irda_resume, | |
966 | }; | |
967 | ||
968 | static int __init pxa_irda_init(void) | |
969 | { | |
b259e7d2 | 970 | return platform_driver_register(&pxa_ir_driver); |
6f475c01 NP |
971 | } |
972 | ||
973 | static void __exit pxa_irda_exit(void) | |
974 | { | |
b259e7d2 | 975 | platform_driver_unregister(&pxa_ir_driver); |
6f475c01 NP |
976 | } |
977 | ||
978 | module_init(pxa_irda_init); | |
979 | module_exit(pxa_irda_exit); | |
980 | ||
981 | MODULE_LICENSE("GPL"); | |
72abb461 | 982 | MODULE_ALIAS("platform:pxa2xx-ir"); |