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IRQ: Typedef the IRQ handler function type
[mirror_ubuntu-artful-kernel.git] / drivers / net / irda / via-ircc.c
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1da177e4
LT		 1/********************************************************************
2 Filename: via-ircc.c
3 Version: 1.0
4 Description: Driver for the VIA VT8231/VT8233 IrDA chipsets
5 Author: VIA Technologies,inc
6 Date : 08/06/2003
7
8Copyright (c) 1998-2003 VIA Technologies, Inc.
9
10This program is free software; you can redistribute it and/or modify it under
11the terms of the GNU General Public License as published by the Free Software
12Foundation; either version 2, or (at your option) any later version.
13
14This program is distributed in the hope that it will be useful, but WITHOUT
15ANY WARRANTIES OR REPRESENTATIONS; without even the implied warranty of
16MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
17See the GNU General Public License for more details.
18
19You should have received a copy of the GNU General Public License along with
20this program; if not, write to the Free Software Foundation, Inc.,
2159 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22
23F01 Oct/02/02: Modify code for V0.11(move out back to back transfer)
24F02 Oct/28/02: Add SB device ID for 3147 and 3177.
25 Comment :
26 jul/09/2002 : only implement two kind of dongle currently.
27 Oct/02/2002 : work on VT8231 and VT8233 .
28 Aug/06/2003 : change driver format to pci driver .
29
302004-02-16: <sda@bdit.de>
31- Removed unneeded 'legacy' pci stuff.
32- Make sure SIR mode is set (hw_init()) before calling mode-dependant stuff.
33- On speed change from core, don't send SIR frame with new speed.
34 Use current speed and change speeds later.
35- Make module-param dongle_id actually work.
36- New dongle_id 17 (0x11): TDFS4500. Single-ended SIR only.
37 Tested with home-grown PCB on EPIA boards.
38- Code cleanup.
39
40 ********************************************************************/
41#include <linux/module.h>
42#include <linux/kernel.h>
43#include <linux/types.h>
44#include <linux/skbuff.h>
45#include <linux/netdevice.h>
46#include <linux/ioport.h>
47#include <linux/delay.h>
48#include <linux/slab.h>
49#include <linux/init.h>
50#include <linux/rtnetlink.h>
51#include <linux/pci.h>
52#include <linux/dma-mapping.h>
53
54#include <asm/io.h>
55#include <asm/dma.h>
56#include <asm/byteorder.h>
57
58#include <linux/pm.h>
59
60#include <net/irda/wrapper.h>
61#include <net/irda/irda.h>
62#include <net/irda/irda_device.h>
63
64#include "via-ircc.h"
65
66#define VIA_MODULE_NAME "via-ircc"
67#define CHIP_IO_EXTENT 0x40
68
69static char *driver_name = VIA_MODULE_NAME;
70
71/* Module parameters */
72static int qos_mtt_bits = 0x07; /* 1 ms or more */
73static int dongle_id = 0; /* default: probe */
74
75/* We can't guess the type of connected dongle, user *must* supply it. */
76module_param(dongle_id, int, 0);
77
78/* FIXME : we should not need this, because instances should be automatically
79 * managed by the PCI layer. Especially that we seem to only be using the
80 * first entry. Jean II */
81/* Max 4 instances for now */
82static struct via_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL };
83
84/* Some prototypes */
85static int via_ircc_open(int i, chipio_t * info, unsigned int id);
86static int via_ircc_close(struct via_ircc_cb *self);
87static int via_ircc_dma_receive(struct via_ircc_cb *self);
88static int via_ircc_dma_receive_complete(struct via_ircc_cb *self,
89 int iobase);
90static int via_ircc_hard_xmit_sir(struct sk_buff *skb,
91 struct net_device *dev);
92static int via_ircc_hard_xmit_fir(struct sk_buff *skb,
93 struct net_device *dev);
94static void via_hw_init(struct via_ircc_cb *self);
95static void via_ircc_change_speed(struct via_ircc_cb *self, __u32 baud);
96static irqreturn_t via_ircc_interrupt(int irq, void *dev_id,
97 struct pt_regs *regs);
98static int via_ircc_is_receiving(struct via_ircc_cb *self);
99static int via_ircc_read_dongle_id(int iobase);
100
101static int via_ircc_net_open(struct net_device *dev);
102static int via_ircc_net_close(struct net_device *dev);
103static int via_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq,
104 int cmd);
105static struct net_device_stats *via_ircc_net_get_stats(struct net_device
106 *dev);
107static void via_ircc_change_dongle_speed(int iobase, int speed,
108 int dongle_id);
109static int RxTimerHandler(struct via_ircc_cb *self, int iobase);
110static void hwreset(struct via_ircc_cb *self);
111static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase);
112static int upload_rxdata(struct via_ircc_cb *self, int iobase);
113static int __devinit via_init_one (struct pci_dev *pcidev, const struct pci_device_id *id);
114static void __devexit via_remove_one (struct pci_dev *pdev);
115
116/* FIXME : Should use udelay() instead, even if we are x86 only - Jean II */
117static void iodelay(int udelay)
118{
119 u8 data;
120 int i;
121
122 for (i = 0; i < udelay; i++) {
123 data = inb(0x80);
124 }
125}
126
127static struct pci_device_id via_pci_tbl[] = {
128 { PCI_VENDOR_ID_VIA, 0x8231, PCI_ANY_ID, PCI_ANY_ID,0,0,0 },
129 { PCI_VENDOR_ID_VIA, 0x3109, PCI_ANY_ID, PCI_ANY_ID,0,0,1 },
130 { PCI_VENDOR_ID_VIA, 0x3074, PCI_ANY_ID, PCI_ANY_ID,0,0,2 },
131 { PCI_VENDOR_ID_VIA, 0x3147, PCI_ANY_ID, PCI_ANY_ID,0,0,3 },
132 { PCI_VENDOR_ID_VIA, 0x3177, PCI_ANY_ID, PCI_ANY_ID,0,0,4 },
133 { 0, }
134};
135
136MODULE_DEVICE_TABLE(pci,via_pci_tbl);
137
138
139static struct pci_driver via_driver = {
140 .name = VIA_MODULE_NAME,
141 .id_table = via_pci_tbl,
142 .probe = via_init_one,
143 .remove = __devexit_p(via_remove_one),
144};
145
146
147/*
148 * Function via_ircc_init ()
149 *
150 * Initialize chip. Just find out chip type and resource.
151 */
152static int __init via_ircc_init(void)
153{
154 int rc;
155
156 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
157
158 rc = pci_register_driver(&via_driver);
159 if (rc < 0) {
160 IRDA_DEBUG(0, "%s(): error rc = %d, returning -ENODEV...\n",
161 __FUNCTION__, rc);
162 return -ENODEV;
163 }
164 return 0;
165}
166
167static int __devinit via_init_one (struct pci_dev *pcidev, const struct pci_device_id *id)
168{
169 int rc;
170 u8 temp,oldPCI_40,oldPCI_44,bTmp,bTmp1;
171 u16 Chipset,FirDRQ1,FirDRQ0,FirIRQ,FirIOBase;
172 chipio_t info;
173
174 IRDA_DEBUG(2, "%s(): Device ID=(0X%X)\n", __FUNCTION__, id->device);
175
176 rc = pci_enable_device (pcidev);
177 if (rc) {
178 IRDA_DEBUG(0, "%s(): error rc = %d\n", __FUNCTION__, rc);
179 return -ENODEV;
180 }
181
182 // South Bridge exist
183 if ( ReadLPCReg(0x20) != 0x3C )
184 Chipset=0x3096;
185 else
186 Chipset=0x3076;
187
188 if (Chipset==0x3076) {
189 IRDA_DEBUG(2, "%s(): Chipset = 3076\n", __FUNCTION__);
190
191 WriteLPCReg(7,0x0c );
192 temp=ReadLPCReg(0x30);//check if BIOS Enable Fir
193 if((temp&0x01)==1) { // BIOS close or no FIR
194 WriteLPCReg(0x1d, 0x82 );
195 WriteLPCReg(0x23,0x18);
196 temp=ReadLPCReg(0xF0);
197 if((temp&0x01)==0) {
198 temp=(ReadLPCReg(0x74)&0x03); //DMA
199 FirDRQ0=temp + 4;
200 temp=(ReadLPCReg(0x74)&0x0C) >> 2;
201 FirDRQ1=temp + 4;
202 } else {
203 temp=(ReadLPCReg(0x74)&0x0C) >> 2; //DMA
204 FirDRQ0=temp + 4;
205 FirDRQ1=FirDRQ0;
206 }
207 FirIRQ=(ReadLPCReg(0x70)&0x0f); //IRQ
208 FirIOBase=ReadLPCReg(0x60 ) << 8; //IO Space :high byte
209 FirIOBase=FirIOBase| ReadLPCReg(0x61) ; //low byte
210 FirIOBase=FirIOBase ;
211 info.fir_base=FirIOBase;
212 info.irq=FirIRQ;
213 info.dma=FirDRQ1;
214 info.dma2=FirDRQ0;
215 pci_read_config_byte(pcidev,0x40,&bTmp);
216 pci_write_config_byte(pcidev,0x40,((bTmp | 0x08) & 0xfe));
217 pci_read_config_byte(pcidev,0x42,&bTmp);
218 pci_write_config_byte(pcidev,0x42,(bTmp | 0xf0));
219 pci_write_config_byte(pcidev,0x5a,0xc0);
220 WriteLPCReg(0x28, 0x70 );
221 if (via_ircc_open(0, &info,0x3076) == 0)
222 rc=0;
223 } else
224 rc = -ENODEV; //IR not turn on
225 } else { //Not VT1211
226 IRDA_DEBUG(2, "%s(): Chipset = 3096\n", __FUNCTION__);
227
228 pci_read_config_byte(pcidev,0x67,&bTmp);//check if BIOS Enable Fir
229 if((bTmp&0x01)==1) { // BIOS enable FIR
230 //Enable Double DMA clock
231 pci_read_config_byte(pcidev,0x42,&oldPCI_40);
232 pci_write_config_byte(pcidev,0x42,oldPCI_40 | 0x80);
233 pci_read_config_byte(pcidev,0x40,&oldPCI_40);
234 pci_write_config_byte(pcidev,0x40,oldPCI_40 & 0xf7);
235 pci_read_config_byte(pcidev,0x44,&oldPCI_44);
236 pci_write_config_byte(pcidev,0x44,0x4e);
237 //---------- read configuration from Function0 of south bridge
238 if((bTmp&0x02)==0) {
239 pci_read_config_byte(pcidev,0x44,&bTmp1); //DMA
240 FirDRQ0 = (bTmp1 & 0x30) >> 4;
241 pci_read_config_byte(pcidev,0x44,&bTmp1);
242 FirDRQ1 = (bTmp1 & 0xc0) >> 6;
243 } else {
244 pci_read_config_byte(pcidev,0x44,&bTmp1); //DMA
245 FirDRQ0 = (bTmp1 & 0x30) >> 4 ;
246 FirDRQ1=0;
247 }
248 pci_read_config_byte(pcidev,0x47,&bTmp1); //IRQ
249 FirIRQ = bTmp1 & 0x0f;
250
251 pci_read_config_byte(pcidev,0x69,&bTmp);
252 FirIOBase = bTmp << 8;//hight byte
253 pci_read_config_byte(pcidev,0x68,&bTmp);
254 FirIOBase = (FirIOBase | bTmp ) & 0xfff0;
255 //-------------------------
256 info.fir_base=FirIOBase;
257 info.irq=FirIRQ;
258 info.dma=FirDRQ1;
259 info.dma2=FirDRQ0;
260 if (via_ircc_open(0, &info,0x3096) == 0)
261 rc=0;
262 } else
263 rc = -ENODEV; //IR not turn on !!!!!
264 }//Not VT1211
265
266 IRDA_DEBUG(2, "%s(): End - rc = %d\n", __FUNCTION__, rc);
267 return rc;
268}
269
270/*
271 * Function via_ircc_clean ()
272 *
273 * Close all configured chips
274 *
275 */
276static void via_ircc_clean(void)
277{
278 int i;
279
280 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
281
9c3bd683 282 for (i=0; i < ARRAY_SIZE(dev_self); i++) {
1da177e4
LT		 283 if (dev_self[i])
284 via_ircc_close(dev_self[i]);
285 }
286}
287
288static void __devexit via_remove_one (struct pci_dev *pdev)
289{
290 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
291
292 /* FIXME : This is ugly. We should use pci_get_drvdata(pdev);
293 * to get our driver instance and call directly via_ircc_close().
294 * See vlsi_ir for details...
295 * Jean II */
296 via_ircc_clean();
297
298 /* FIXME : This should be in via_ircc_close(), because here we may
299 * theoritically disable still configured devices :-( - Jean II */
300 pci_disable_device(pdev);
301}
302
303static void __exit via_ircc_cleanup(void)
304{
305 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
306
307 /* FIXME : This should be redundant, as pci_unregister_driver()
308 * should call via_remove_one() on each device.
309 * Jean II */
310 via_ircc_clean();
311
312 /* Cleanup all instances of the driver */
313 pci_unregister_driver (&via_driver);
314}
315
316/*
317 * Function via_ircc_open (iobase, irq)
318 *
319 * Open driver instance
320 *
321 */
322static __devinit int via_ircc_open(int i, chipio_t * info, unsigned int id)
323{
324 struct net_device *dev;
325 struct via_ircc_cb *self;
326 int err;
327
328 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
329
9c3bd683
BH		 330 if (i >= ARRAY_SIZE(dev_self))
331 return -ENOMEM;
332
1da177e4
LT		 333 /* Allocate new instance of the driver */
334 dev = alloc_irdadev(sizeof(struct via_ircc_cb));
335 if (dev == NULL)
336 return -ENOMEM;
337
338 self = dev->priv;
339 self->netdev = dev;
340 spin_lock_init(&self->lock);
341
342 /* FIXME : We should store our driver instance in the PCI layer,
343 * using pci_set_drvdata(), not in this array.
344 * See vlsi_ir for details... - Jean II */
345 /* FIXME : 'i' is always 0 (see via_init_one()) :-( - Jean II */
346 /* Need to store self somewhere */
347 dev_self[i] = self;
348 self->index = i;
349 /* Initialize Resource */
350 self->io.cfg_base = info->cfg_base;
351 self->io.fir_base = info->fir_base;
352 self->io.irq = info->irq;
353 self->io.fir_ext = CHIP_IO_EXTENT;
354 self->io.dma = info->dma;
355 self->io.dma2 = info->dma2;
356 self->io.fifo_size = 32;
357 self->chip_id = id;
358 self->st_fifo.len = 0;
359 self->RxDataReady = 0;
360
361 /* Reserve the ioports that we need */
362 if (!request_region(self->io.fir_base, self->io.fir_ext, driver_name)) {
363 IRDA_DEBUG(0, "%s(), can't get iobase of 0x%03x\n",
364 __FUNCTION__, self->io.fir_base);
365 err = -ENODEV;
366 goto err_out1;
367 }
368
369 /* Initialize QoS for this device */
370 irda_init_max_qos_capabilies(&self->qos);
371
372 /* Check if user has supplied the dongle id or not */
373 if (!dongle_id)
374 dongle_id = via_ircc_read_dongle_id(self->io.fir_base);
375 self->io.dongle_id = dongle_id;
376
377 /* The only value we must override it the baudrate */
378 /* Maximum speeds and capabilities are dongle-dependant. */
379 switch( self->io.dongle_id ){
380 case 0x0d:
381 self->qos.baud_rate.bits =
382 IR_9600 | IR_19200 | IR_38400 | IR_57600 | IR_115200 |
383 IR_576000 | IR_1152000 | (IR_4000000 << 8);
384 break;
385 default:
386 self->qos.baud_rate.bits =
387 IR_9600 | IR_19200 | IR_38400 | IR_57600 | IR_115200;
388 break;
389 }
390
391 /* Following was used for testing:
392 *
393 * self->qos.baud_rate.bits = IR_9600;
394 *
395 * Is is no good, as it prohibits (error-prone) speed-changes.
396 */
397
398 self->qos.min_turn_time.bits = qos_mtt_bits;
399 irda_qos_bits_to_value(&self->qos);
400
401 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
402 self->rx_buff.truesize = 14384 + 2048;
403 self->tx_buff.truesize = 14384 + 2048;
404
405 /* Allocate memory if needed */
406 self->rx_buff.head =
407 dma_alloc_coherent(NULL, self->rx_buff.truesize,
408 &self->rx_buff_dma, GFP_KERNEL);
409 if (self->rx_buff.head == NULL) {
410 err = -ENOMEM;
411 goto err_out2;
412 }
413 memset(self->rx_buff.head, 0, self->rx_buff.truesize);
414
415 self->tx_buff.head =
416 dma_alloc_coherent(NULL, self->tx_buff.truesize,
417 &self->tx_buff_dma, GFP_KERNEL);
418 if (self->tx_buff.head == NULL) {
419 err = -ENOMEM;
420 goto err_out3;
421 }
422 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
423
424 self->rx_buff.in_frame = FALSE;
425 self->rx_buff.state = OUTSIDE_FRAME;
426 self->tx_buff.data = self->tx_buff.head;
427 self->rx_buff.data = self->rx_buff.head;
428
429 /* Reset Tx queue info */
430 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
431 self->tx_fifo.tail = self->tx_buff.head;
432
433 /* Keep track of module usage */
434 SET_MODULE_OWNER(dev);
435
436 /* Override the network functions we need to use */
437 dev->hard_start_xmit = via_ircc_hard_xmit_sir;
438 dev->open = via_ircc_net_open;
439 dev->stop = via_ircc_net_close;
440 dev->do_ioctl = via_ircc_net_ioctl;
441 dev->get_stats = via_ircc_net_get_stats;
442
443 err = register_netdev(dev);
444 if (err)
445 goto err_out4;
446
447 IRDA_MESSAGE("IrDA: Registered device %s (via-ircc)\n", dev->name);
448
449 /* Initialise the hardware..
450 */
451 self->io.speed = 9600;
452 via_hw_init(self);
453 return 0;
454 err_out4:
455 dma_free_coherent(NULL, self->tx_buff.truesize,
456 self->tx_buff.head, self->tx_buff_dma);
457 err_out3:
458 dma_free_coherent(NULL, self->rx_buff.truesize,
459 self->rx_buff.head, self->rx_buff_dma);
460 err_out2:
461 release_region(self->io.fir_base, self->io.fir_ext);
462 err_out1:
463 free_netdev(dev);
464 dev_self[i] = NULL;
465 return err;
466}
467
468/*
469 * Function via_ircc_close (self)
470 *
471 * Close driver instance
472 *
473 */
474static int via_ircc_close(struct via_ircc_cb *self)
475{
476 int iobase;
477
478 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
479
480 IRDA_ASSERT(self != NULL, return -1;);
481
482 iobase = self->io.fir_base;
483
484 ResetChip(iobase, 5); //hardware reset.
485 /* Remove netdevice */
486 unregister_netdev(self->netdev);
487
488 /* Release the PORT that this driver is using */
489 IRDA_DEBUG(2, "%s(), Releasing Region %03x\n",
490 __FUNCTION__, self->io.fir_base);
491 release_region(self->io.fir_base, self->io.fir_ext);
492 if (self->tx_buff.head)
493 dma_free_coherent(NULL, self->tx_buff.truesize,
494 self->tx_buff.head, self->tx_buff_dma);
495 if (self->rx_buff.head)
496 dma_free_coherent(NULL, self->rx_buff.truesize,
497 self->rx_buff.head, self->rx_buff_dma);
498 dev_self[self->index] = NULL;
499
500 free_netdev(self->netdev);
501
502 return 0;
503}
504
505/*
506 * Function via_hw_init(self)
507 *
508 * Returns non-negative on success.
509 *
510 * Formerly via_ircc_setup
511 */
512static void via_hw_init(struct via_ircc_cb *self)
513{
514 int iobase = self->io.fir_base;
515
516 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
517
518 SetMaxRxPacketSize(iobase, 0x0fff); //set to max:4095
519 // FIFO Init
520 EnRXFIFOReadyInt(iobase, OFF);
521 EnRXFIFOHalfLevelInt(iobase, OFF);
522 EnTXFIFOHalfLevelInt(iobase, OFF);
523 EnTXFIFOUnderrunEOMInt(iobase, ON);
524 EnTXFIFOReadyInt(iobase, OFF);
525 InvertTX(iobase, OFF);
526 InvertRX(iobase, OFF);
527
528 if (ReadLPCReg(0x20) == 0x3c)
529 WriteLPCReg(0xF0, 0); // for VT1211
530 /* Int Init */
531 EnRXSpecInt(iobase, ON);
532
533 /* The following is basically hwreset */
534 /* If this is the case, why not just call hwreset() ? Jean II */
535 ResetChip(iobase, 5);
536 EnableDMA(iobase, OFF);
537 EnableTX(iobase, OFF);
538 EnableRX(iobase, OFF);
539 EnRXDMA(iobase, OFF);
540 EnTXDMA(iobase, OFF);
541 RXStart(iobase, OFF);
542 TXStart(iobase, OFF);
543 InitCard(iobase);
544 CommonInit(iobase);
545 SIRFilter(iobase, ON);
546 SetSIR(iobase, ON);
547 CRC16(iobase, ON);
548 EnTXCRC(iobase, 0);
549 WriteReg(iobase, I_ST_CT_0, 0x00);
550 SetBaudRate(iobase, 9600);
551 SetPulseWidth(iobase, 12);
552 SetSendPreambleCount(iobase, 0);
553
554 self->io.speed = 9600;
555 self->st_fifo.len = 0;
556
557 via_ircc_change_dongle_speed(iobase, self->io.speed,
558 self->io.dongle_id);
559
560 WriteReg(iobase, I_ST_CT_0, 0x80);
561}
562
563/*
564 * Function via_ircc_read_dongle_id (void)
565 *
566 */
567static int via_ircc_read_dongle_id(int iobase)
568{
569 int dongle_id = 9; /* Default to IBM */
570
571 IRDA_ERROR("via-ircc: dongle probing not supported, please specify dongle_id module parameter.\n");
572 return dongle_id;
573}
574
575/*
576 * Function via_ircc_change_dongle_speed (iobase, speed, dongle_id)
577 * Change speed of the attach dongle
578 * only implement two type of dongle currently.
579 */
580static void via_ircc_change_dongle_speed(int iobase, int speed,
581 int dongle_id)
582{
583 u8 mode = 0;
584
585 /* speed is unused, as we use IsSIROn()/IsMIROn() */
586 speed = speed;
587
588 IRDA_DEBUG(1, "%s(): change_dongle_speed to %d for 0x%x, %d\n",
589 __FUNCTION__, speed, iobase, dongle_id);
590
591 switch (dongle_id) {
592
593 /* Note: The dongle_id's listed here are derived from
594 * nsc-ircc.c */
595
596 case 0x08: /* HP HSDL-2300, HP HSDL-3600/HSDL-3610 */
597 UseOneRX(iobase, ON); // use one RX pin RX1,RX2
598 InvertTX(iobase, OFF);
599 InvertRX(iobase, OFF);
600
601 EnRX2(iobase, ON); //sir to rx2
602 EnGPIOtoRX2(iobase, OFF);
603
604 if (IsSIROn(iobase)) { //sir
605 // Mode select Off
606 SlowIRRXLowActive(iobase, ON);
607 udelay(1000);
608 SlowIRRXLowActive(iobase, OFF);
609 } else {
610 if (IsMIROn(iobase)) { //mir
611 // Mode select On
612 SlowIRRXLowActive(iobase, OFF);
613 udelay(20);
614 } else { // fir
615 if (IsFIROn(iobase)) { //fir
616 // Mode select On
617 SlowIRRXLowActive(iobase, OFF);
618 udelay(20);
619 }
620 }
621 }
622 break;
623
624 case 0x09: /* IBM31T1100 or Temic TFDS6000/TFDS6500 */
625 UseOneRX(iobase, ON); //use ONE RX....RX1
626 InvertTX(iobase, OFF);
627 InvertRX(iobase, OFF); // invert RX pin
628
629 EnRX2(iobase, ON);
630 EnGPIOtoRX2(iobase, OFF);
631 if (IsSIROn(iobase)) { //sir
632 // Mode select On
633 SlowIRRXLowActive(iobase, ON);
634 udelay(20);
635 // Mode select Off
636 SlowIRRXLowActive(iobase, OFF);
637 }
638 if (IsMIROn(iobase)) { //mir
639 // Mode select On
640 SlowIRRXLowActive(iobase, OFF);
641 udelay(20);
642 // Mode select Off
643 SlowIRRXLowActive(iobase, ON);
644 } else { // fir
645 if (IsFIROn(iobase)) { //fir
646 // Mode select On
647 SlowIRRXLowActive(iobase, OFF);
648 // TX On
649 WriteTX(iobase, ON);
650 udelay(20);
651 // Mode select OFF
652 SlowIRRXLowActive(iobase, ON);
653 udelay(20);
654 // TX Off
655 WriteTX(iobase, OFF);
656 }
657 }
658 break;
659
660 case 0x0d:
661 UseOneRX(iobase, OFF); // use two RX pin RX1,RX2
662 InvertTX(iobase, OFF);
663 InvertRX(iobase, OFF);
664 SlowIRRXLowActive(iobase, OFF);
665 if (IsSIROn(iobase)) { //sir
666 EnGPIOtoRX2(iobase, OFF);
667 WriteGIO(iobase, OFF);
668 EnRX2(iobase, OFF); //sir to rx2
669 } else { // fir mir
670 EnGPIOtoRX2(iobase, OFF);
671 WriteGIO(iobase, OFF);
672 EnRX2(iobase, OFF); //fir to rx
673 }
674 break;
675
676 case 0x11: /* Temic TFDS4500 */
677
678 IRDA_DEBUG(2, "%s: Temic TFDS4500: One RX pin, TX normal, RX inverted.\n", __FUNCTION__);
679
680 UseOneRX(iobase, ON); //use ONE RX....RX1
681 InvertTX(iobase, OFF);
682 InvertRX(iobase, ON); // invert RX pin
683
684 EnRX2(iobase, ON); //sir to rx2
685 EnGPIOtoRX2(iobase, OFF);
686
687 if( IsSIROn(iobase) ){ //sir
688
689 // Mode select On
690 SlowIRRXLowActive(iobase, ON);
691 udelay(20);
692 // Mode select Off
693 SlowIRRXLowActive(iobase, OFF);
694
695 } else{
696 IRDA_DEBUG(0, "%s: Warning: TFDS4500 not running in SIR mode !\n", __FUNCTION__);
697 }
698 break;
699
700 case 0x0ff: /* Vishay */
701 if (IsSIROn(iobase))
702 mode = 0;
703 else if (IsMIROn(iobase))
704 mode = 1;
705 else if (IsFIROn(iobase))
706 mode = 2;
707 else if (IsVFIROn(iobase))
708 mode = 5; //VFIR-16
709 SI_SetMode(iobase, mode);
710 break;
711
712 default:
713 IRDA_ERROR("%s: Error: dongle_id %d unsupported !\n",
714 __FUNCTION__, dongle_id);
715 }
716}
717
718/*
719 * Function via_ircc_change_speed (self, baud)
720 *
721 * Change the speed of the device
722 *
723 */
724static void via_ircc_change_speed(struct via_ircc_cb *self, __u32 speed)
725{
726 struct net_device *dev = self->netdev;
727 u16 iobase;
728 u8 value = 0, bTmp;
729
730 iobase = self->io.fir_base;
731 /* Update accounting for new speed */
732 self->io.speed = speed;
733 IRDA_DEBUG(1, "%s: change_speed to %d bps.\n", __FUNCTION__, speed);
734
735 WriteReg(iobase, I_ST_CT_0, 0x0);
736
737 /* Controller mode sellection */
738 switch (speed) {
739 case 2400:
740 case 9600:
741 case 19200:
742 case 38400:
743 case 57600:
744 case 115200:
745 value = (115200/speed)-1;
746 SetSIR(iobase, ON);
747 CRC16(iobase, ON);
748 break;
749 case 576000:
750 /* FIXME: this can't be right, as it's the same as 115200,
751 * and 576000 is MIR, not SIR. */
752 value = 0;
753 SetSIR(iobase, ON);
754 CRC16(iobase, ON);
755 break;
756 case 1152000:
757 value = 0;
758 SetMIR(iobase, ON);
759 /* FIXME: CRC ??? */
760 break;
761 case 4000000:
762 value = 0;
763 SetFIR(iobase, ON);
764 SetPulseWidth(iobase, 0);
765 SetSendPreambleCount(iobase, 14);
766 CRC16(iobase, OFF);
767 EnTXCRC(iobase, ON);
768 break;
769 case 16000000:
770 value = 0;
771 SetVFIR(iobase, ON);
772 /* FIXME: CRC ??? */
773 break;
774 default:
775 value = 0;
776 break;
777 }
778
779 /* Set baudrate to 0x19[2..7] */
780 bTmp = (ReadReg(iobase, I_CF_H_1) & 0x03);
781 bTmp |= value << 2;
782 WriteReg(iobase, I_CF_H_1, bTmp);
783
784 /* Some dongles may need to be informed about speed changes. */
785 via_ircc_change_dongle_speed(iobase, speed, self->io.dongle_id);
786
787 /* Set FIFO size to 64 */
788 SetFIFO(iobase, 64);
789
790 /* Enable IR */
791 WriteReg(iobase, I_ST_CT_0, 0x80);
792
793 // EnTXFIFOHalfLevelInt(iobase,ON);
794
795 /* Enable some interrupts so we can receive frames */
796 //EnAllInt(iobase,ON);
797
798 if (IsSIROn(iobase)) {
799 SIRFilter(iobase, ON);
800 SIRRecvAny(iobase, ON);
801 } else {
802 SIRFilter(iobase, OFF);
803 SIRRecvAny(iobase, OFF);
804 }
805
806 if (speed > 115200) {
807 /* Install FIR xmit handler */
808 dev->hard_start_xmit = via_ircc_hard_xmit_fir;
809 via_ircc_dma_receive(self);
810 } else {
811 /* Install SIR xmit handler */
812 dev->hard_start_xmit = via_ircc_hard_xmit_sir;
813 }
814 netif_wake_queue(dev);
815}
816
817/*
818 * Function via_ircc_hard_xmit (skb, dev)
819 *
820 * Transmit the frame!
821 *
822 */
823static int via_ircc_hard_xmit_sir(struct sk_buff *skb,
824 struct net_device *dev)
825{
826 struct via_ircc_cb *self;
827 unsigned long flags;
828 u16 iobase;
829 __u32 speed;
830
831 self = (struct via_ircc_cb *) dev->priv;
832 IRDA_ASSERT(self != NULL, return 0;);
833 iobase = self->io.fir_base;
834
835 netif_stop_queue(dev);
836 /* Check if we need to change the speed */
837 speed = irda_get_next_speed(skb);
838 if ((speed != self->io.speed) && (speed != -1)) {
839 /* Check for empty frame */
840 if (!skb->len) {
841 via_ircc_change_speed(self, speed);
842 dev->trans_start = jiffies;
843 dev_kfree_skb(skb);
844 return 0;
845 } else
846 self->new_speed = speed;
847 }
848 InitCard(iobase);
849 CommonInit(iobase);
850 SIRFilter(iobase, ON);
851 SetSIR(iobase, ON);
852 CRC16(iobase, ON);
853 EnTXCRC(iobase, 0);
854 WriteReg(iobase, I_ST_CT_0, 0x00);
855
856 spin_lock_irqsave(&self->lock, flags);
857 self->tx_buff.data = self->tx_buff.head;
858 self->tx_buff.len =
859 async_wrap_skb(skb, self->tx_buff.data,
860 self->tx_buff.truesize);
861
862 self->stats.tx_bytes += self->tx_buff.len;
863 /* Send this frame with old speed */
864 SetBaudRate(iobase, self->io.speed);
865 SetPulseWidth(iobase, 12);
866 SetSendPreambleCount(iobase, 0);
867 WriteReg(iobase, I_ST_CT_0, 0x80);
868
869 EnableTX(iobase, ON);
870 EnableRX(iobase, OFF);
871
872 ResetChip(iobase, 0);
873 ResetChip(iobase, 1);
874 ResetChip(iobase, 2);
875 ResetChip(iobase, 3);
876 ResetChip(iobase, 4);
877
878 EnAllInt(iobase, ON);
879 EnTXDMA(iobase, ON);
880 EnRXDMA(iobase, OFF);
881
882 irda_setup_dma(self->io.dma, self->tx_buff_dma, self->tx_buff.len,
883 DMA_TX_MODE);
884
885 SetSendByte(iobase, self->tx_buff.len);
886 RXStart(iobase, OFF);
887 TXStart(iobase, ON);
888
889 dev->trans_start = jiffies;
890 spin_unlock_irqrestore(&self->lock, flags);
891 dev_kfree_skb(skb);
892 return 0;
893}
894
895static int via_ircc_hard_xmit_fir(struct sk_buff *skb,
896 struct net_device *dev)
897{
898 struct via_ircc_cb *self;
899 u16 iobase;
900 __u32 speed;
901 unsigned long flags;
902
903 self = (struct via_ircc_cb *) dev->priv;
904 iobase = self->io.fir_base;
905
906 if (self->st_fifo.len)
907 return 0;
908 if (self->chip_id == 0x3076)
909 iodelay(1500);
910 else
911 udelay(1500);
912 netif_stop_queue(dev);
913 speed = irda_get_next_speed(skb);
914 if ((speed != self->io.speed) && (speed != -1)) {
915 if (!skb->len) {
916 via_ircc_change_speed(self, speed);
917 dev->trans_start = jiffies;
918 dev_kfree_skb(skb);
919 return 0;
920 } else
921 self->new_speed = speed;
922 }
923 spin_lock_irqsave(&self->lock, flags);
924 self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
925 self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
926
927 self->tx_fifo.tail += skb->len;
928 self->stats.tx_bytes += skb->len;
929 memcpy(self->tx_fifo.queue[self->tx_fifo.free].start, skb->data,
930 skb->len);
931 self->tx_fifo.len++;
932 self->tx_fifo.free++;
933//F01 if (self->tx_fifo.len == 1) {
934 via_ircc_dma_xmit(self, iobase);
935//F01 }
936//F01 if (self->tx_fifo.free < (MAX_TX_WINDOW -1 )) netif_wake_queue(self->netdev);
937 dev->trans_start = jiffies;
938 dev_kfree_skb(skb);
939 spin_unlock_irqrestore(&self->lock, flags);
940 return 0;
941
942}
943
944static int via_ircc_dma_xmit(struct via_ircc_cb *self, u16 iobase)
945{
946 EnTXDMA(iobase, OFF);
947 self->io.direction = IO_XMIT;
948 EnPhys(iobase, ON);
949 EnableTX(iobase, ON);
950 EnableRX(iobase, OFF);
951 ResetChip(iobase, 0);
952 ResetChip(iobase, 1);
953 ResetChip(iobase, 2);
954 ResetChip(iobase, 3);
955 ResetChip(iobase, 4);
956 EnAllInt(iobase, ON);
957 EnTXDMA(iobase, ON);
958 EnRXDMA(iobase, OFF);
959 irda_setup_dma(self->io.dma,
960 ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
961 self->tx_buff.head) + self->tx_buff_dma,
962 self->tx_fifo.queue[self->tx_fifo.ptr].len, DMA_TX_MODE);
963 IRDA_DEBUG(1, "%s: tx_fifo.ptr=%x,len=%x,tx_fifo.len=%x..\n",
964 __FUNCTION__, self->tx_fifo.ptr,
965 self->tx_fifo.queue[self->tx_fifo.ptr].len,
966 self->tx_fifo.len);
967
968 SetSendByte(iobase, self->tx_fifo.queue[self->tx_fifo.ptr].len);
969 RXStart(iobase, OFF);
970 TXStart(iobase, ON);
971 return 0;
972
973}
974
975/*
976 * Function via_ircc_dma_xmit_complete (self)
977 *
978 * The transfer of a frame in finished. This function will only be called
979 * by the interrupt handler
980 *
981 */
982static int via_ircc_dma_xmit_complete(struct via_ircc_cb *self)
983{
984 int iobase;
985 int ret = TRUE;
986 u8 Tx_status;
987
988 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
989
990 iobase = self->io.fir_base;
991 /* Disable DMA */
992// DisableDmaChannel(self->io.dma);
993 /* Check for underrrun! */
994 /* Clear bit, by writing 1 into it */
995 Tx_status = GetTXStatus(iobase);
996 if (Tx_status & 0x08) {
997 self->stats.tx_errors++;
998 self->stats.tx_fifo_errors++;
999 hwreset(self);
1000// how to clear underrrun ?
1001 } else {
1002 self->stats.tx_packets++;
1003 ResetChip(iobase, 3);
1004 ResetChip(iobase, 4);
1005 }
1006 /* Check if we need to change the speed */
1007 if (self->new_speed) {
1008 via_ircc_change_speed(self, self->new_speed);
1009 self->new_speed = 0;
1010 }
1011
1012 /* Finished with this frame, so prepare for next */
1013 if (IsFIROn(iobase)) {
1014 if (self->tx_fifo.len) {
1015 self->tx_fifo.len--;
1016 self->tx_fifo.ptr++;
1017 }
1018 }
1019 IRDA_DEBUG(1,
1020 "%s: tx_fifo.len=%x ,tx_fifo.ptr=%x,tx_fifo.free=%x...\n",
1021 __FUNCTION__,
1022 self->tx_fifo.len, self->tx_fifo.ptr, self->tx_fifo.free);
1023/* F01_S
1024 // Any frames to be sent back-to-back?
1025 if (self->tx_fifo.len) {
1026 // Not finished yet!
1027 via_ircc_dma_xmit(self, iobase);
1028 ret = FALSE;
1029 } else {
1030F01_E*/
1031 // Reset Tx FIFO info
1032 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1033 self->tx_fifo.tail = self->tx_buff.head;
1034//F01 }
1035
1036 // Make sure we have room for more frames
1037//F01 if (self->tx_fifo.free < (MAX_TX_WINDOW -1 )) {
1038 // Not busy transmitting anymore
1039 // Tell the network layer, that we can accept more frames
1040 netif_wake_queue(self->netdev);
1041//F01 }
1042 return ret;
1043}
1044
1045/*
1046 * Function via_ircc_dma_receive (self)
1047 *
1048 * Set configuration for receive a frame.
1049 *
1050 */
1051static int via_ircc_dma_receive(struct via_ircc_cb *self)
1052{
1053 int iobase;
1054
1055 iobase = self->io.fir_base;
1056
1057 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
1058
1059 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1060 self->tx_fifo.tail = self->tx_buff.head;
1061 self->RxDataReady = 0;
1062 self->io.direction = IO_RECV;
1063 self->rx_buff.data = self->rx_buff.head;
1064 self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1065 self->st_fifo.tail = self->st_fifo.head = 0;
1066
1067 EnPhys(iobase, ON);
1068 EnableTX(iobase, OFF);
1069 EnableRX(iobase, ON);
1070
1071 ResetChip(iobase, 0);
1072 ResetChip(iobase, 1);
1073 ResetChip(iobase, 2);
1074 ResetChip(iobase, 3);
1075 ResetChip(iobase, 4);
1076
1077 EnAllInt(iobase, ON);
1078 EnTXDMA(iobase, OFF);
1079 EnRXDMA(iobase, ON);
1080 irda_setup_dma(self->io.dma2, self->rx_buff_dma,
1081 self->rx_buff.truesize, DMA_RX_MODE);
1082 TXStart(iobase, OFF);
1083 RXStart(iobase, ON);
1084
1085 return 0;
1086}
1087
1088/*
1089 * Function via_ircc_dma_receive_complete (self)
1090 *
1091 * Controller Finished with receiving frames,
1092 * and this routine is call by ISR
1093 *
1094 */
1095static int via_ircc_dma_receive_complete(struct via_ircc_cb *self,
1096 int iobase)
1097{
1098 struct st_fifo *st_fifo;
1099 struct sk_buff *skb;
1100 int len, i;
1101 u8 status = 0;
1102
1103 iobase = self->io.fir_base;
1104 st_fifo = &self->st_fifo;
1105
1106 if (self->io.speed < 4000000) { //Speed below FIR
1107 len = GetRecvByte(iobase, self);
1108 skb = dev_alloc_skb(len + 1);
1109 if (skb == NULL)
1110 return FALSE;
1111 // Make sure IP header gets aligned
1112 skb_reserve(skb, 1);
1113 skb_put(skb, len - 2);
1114 if (self->chip_id == 0x3076) {
1115 for (i = 0; i < len - 2; i++)
1116 skb->data[i] = self->rx_buff.data[i * 2];
1117 } else {
1118 if (self->chip_id == 0x3096) {
1119 for (i = 0; i < len - 2; i++)
1120 skb->data[i] =
1121 self->rx_buff.data[i];
1122 }
1123 }
1124 // Move to next frame
1125 self->rx_buff.data += len;
1126 self->stats.rx_bytes += len;
1127 self->stats.rx_packets++;
1128 skb->dev = self->netdev;
1129 skb->mac.raw = skb->data;
1130 skb->protocol = htons(ETH_P_IRDA);
1131 netif_rx(skb);
1132 return TRUE;
1133 }
1134
1135 else { //FIR mode
1136 len = GetRecvByte(iobase, self);
1137 if (len == 0)
1138 return TRUE; //interrupt only, data maybe move by RxT
1139 if (((len - 4) < 2) || ((len - 4) > 2048)) {
1140 IRDA_DEBUG(1, "%s(): Trouble:len=%x,CurCount=%x,LastCount=%x..\n",
1141 __FUNCTION__, len, RxCurCount(iobase, self),
1142 self->RxLastCount);
1143 hwreset(self);
1144 return FALSE;
1145 }
1146 IRDA_DEBUG(2, "%s(): fifo.len=%x,len=%x,CurCount=%x..\n",
1147 __FUNCTION__,
1148 st_fifo->len, len - 4, RxCurCount(iobase, self));
1149
1150 st_fifo->entries[st_fifo->tail].status = status;
1151 st_fifo->entries[st_fifo->tail].len = len;
1152 st_fifo->pending_bytes += len;
1153 st_fifo->tail++;
1154 st_fifo->len++;
1155 if (st_fifo->tail > MAX_RX_WINDOW)
1156 st_fifo->tail = 0;
1157 self->RxDataReady = 0;
1158
1159 // It maybe have MAX_RX_WINDOW package receive by
1160 // receive_complete before Timer IRQ
1161/* F01_S
1162 if (st_fifo->len < (MAX_RX_WINDOW+2 )) {
1163 RXStart(iobase,ON);
1164 SetTimer(iobase,4);
1165 }
1166 else {
1167F01_E */
1168 EnableRX(iobase, OFF);
1169 EnRXDMA(iobase, OFF);
1170 RXStart(iobase, OFF);
1171//F01_S
1172 // Put this entry back in fifo
1173 if (st_fifo->head > MAX_RX_WINDOW)
1174 st_fifo->head = 0;
1175 status = st_fifo->entries[st_fifo->head].status;
1176 len = st_fifo->entries[st_fifo->head].len;
1177 st_fifo->head++;
1178 st_fifo->len--;
1179
1180 skb = dev_alloc_skb(len + 1 - 4);
1181 /*
1182 * if frame size,data ptr,or skb ptr are wrong ,the get next
1183 * entry.
1184 */
1185 if ((skb == NULL) || (skb->data == NULL)
1186 || (self->rx_buff.data == NULL) || (len < 6)) {
1187 self->stats.rx_dropped++;
1188 return TRUE;
1189 }
1190 skb_reserve(skb, 1);
1191 skb_put(skb, len - 4);
1192
1193 memcpy(skb->data, self->rx_buff.data, len - 4);
1194 IRDA_DEBUG(2, "%s(): len=%x.rx_buff=%p\n", __FUNCTION__,
1195 len - 4, self->rx_buff.data);
1196
1197 // Move to next frame
1198 self->rx_buff.data += len;
1199 self->stats.rx_bytes += len;
1200 self->stats.rx_packets++;
1201 skb->dev = self->netdev;
1202 skb->mac.raw = skb->data;
1203 skb->protocol = htons(ETH_P_IRDA);
1204 netif_rx(skb);
1205
1206//F01_E
1207 } //FIR
1208 return TRUE;
1209
1210}
1211
1212/*
1213 * if frame is received , but no INT ,then use this routine to upload frame.
1214 */
1215static int upload_rxdata(struct via_ircc_cb *self, int iobase)
1216{
1217 struct sk_buff *skb;
1218 int len;
1219 struct st_fifo *st_fifo;
1220 st_fifo = &self->st_fifo;
1221
1222 len = GetRecvByte(iobase, self);
1223
1224 IRDA_DEBUG(2, "%s(): len=%x\n", __FUNCTION__, len);
1225
83e331e2
CS		 1226 if ((len - 4) < 2) {
1227 self->stats.rx_dropped++;
1228 return FALSE;
1229 }
1230
1da177e4 1231 skb = dev_alloc_skb(len + 1);
83e331e2 1232 if (skb == NULL) {
1da177e4
LT		 1233 self->stats.rx_dropped++;
1234 return FALSE;
1235 }
1236 skb_reserve(skb, 1);
1237 skb_put(skb, len - 4 + 1);
1238 memcpy(skb->data, self->rx_buff.data, len - 4 + 1);
1239 st_fifo->tail++;
1240 st_fifo->len++;
1241 if (st_fifo->tail > MAX_RX_WINDOW)
1242 st_fifo->tail = 0;
1243 // Move to next frame
1244 self->rx_buff.data += len;
1245 self->stats.rx_bytes += len;
1246 self->stats.rx_packets++;
1247 skb->dev = self->netdev;
1248 skb->mac.raw = skb->data;
1249 skb->protocol = htons(ETH_P_IRDA);
1250 netif_rx(skb);
1251 if (st_fifo->len < (MAX_RX_WINDOW + 2)) {
1252 RXStart(iobase, ON);
1253 } else {
1254 EnableRX(iobase, OFF);
1255 EnRXDMA(iobase, OFF);
1256 RXStart(iobase, OFF);
1257 }
1258 return TRUE;
1259}
1260
1261/*
1262 * Implement back to back receive , use this routine to upload data.
1263 */
1264
1265static int RxTimerHandler(struct via_ircc_cb *self, int iobase)
1266{
1267 struct st_fifo *st_fifo;
1268 struct sk_buff *skb;
1269 int len;
1270 u8 status;
1271
1272 st_fifo = &self->st_fifo;
1273
1274 if (CkRxRecv(iobase, self)) {
1275 // if still receiving ,then return ,don't upload frame
1276 self->RetryCount = 0;
1277 SetTimer(iobase, 20);
1278 self->RxDataReady++;
1279 return FALSE;
1280 } else
1281 self->RetryCount++;
1282
1283 if ((self->RetryCount >= 1) ||
1284 ((st_fifo->pending_bytes + 2048) > self->rx_buff.truesize)
1285 || (st_fifo->len >= (MAX_RX_WINDOW))) {
1286 while (st_fifo->len > 0) { //upload frame
1287 // Put this entry back in fifo
1288 if (st_fifo->head > MAX_RX_WINDOW)
1289 st_fifo->head = 0;
1290 status = st_fifo->entries[st_fifo->head].status;
1291 len = st_fifo->entries[st_fifo->head].len;
1292 st_fifo->head++;
1293 st_fifo->len--;
1294
1295 skb = dev_alloc_skb(len + 1 - 4);
1296 /*
1297 * if frame size, data ptr, or skb ptr are wrong,
1298 * then get next entry.
1299 */
1300 if ((skb == NULL) || (skb->data == NULL)
1301 || (self->rx_buff.data == NULL) || (len < 6)) {
1302 self->stats.rx_dropped++;
1303 continue;
1304 }
1305 skb_reserve(skb, 1);
1306 skb_put(skb, len - 4);
1307 memcpy(skb->data, self->rx_buff.data, len - 4);
1308
1309 IRDA_DEBUG(2, "%s(): len=%x.head=%x\n", __FUNCTION__,
1310 len - 4, st_fifo->head);
1311
1312 // Move to next frame
1313 self->rx_buff.data += len;
1314 self->stats.rx_bytes += len;
1315 self->stats.rx_packets++;
1316 skb->dev = self->netdev;
1317 skb->mac.raw = skb->data;
1318 skb->protocol = htons(ETH_P_IRDA);
1319 netif_rx(skb);
1320 } //while
1321 self->RetryCount = 0;
1322
1323 IRDA_DEBUG(2,
1324 "%s(): End of upload HostStatus=%x,RxStatus=%x\n",
1325 __FUNCTION__,
1326 GetHostStatus(iobase), GetRXStatus(iobase));
1327
1328 /*
1329 * if frame is receive complete at this routine ,then upload
1330 * frame.
1331 */
1332 if ((GetRXStatus(iobase) & 0x10)
1333 && (RxCurCount(iobase, self) != self->RxLastCount)) {
1334 upload_rxdata(self, iobase);
1335 if (irda_device_txqueue_empty(self->netdev))
1336 via_ircc_dma_receive(self);
1337 }
1338 } // timer detect complete
1339 else
1340 SetTimer(iobase, 4);
1341 return TRUE;
1342
1343}
1344
1345
1346
1347/*
1348 * Function via_ircc_interrupt (irq, dev_id, regs)
1349 *
1350 * An interrupt from the chip has arrived. Time to do some work
1351 *
1352 */
1353static irqreturn_t via_ircc_interrupt(int irq, void *dev_id,
1354 struct pt_regs *regs)
1355{
1356 struct net_device *dev = (struct net_device *) dev_id;
1357 struct via_ircc_cb *self;
1358 int iobase;
1359 u8 iHostIntType, iRxIntType, iTxIntType;
1360
1361 if (!dev) {
1362 IRDA_WARNING("%s: irq %d for unknown device.\n", driver_name,
1363 irq);
1364 return IRQ_NONE;
1365 }
1366 self = (struct via_ircc_cb *) dev->priv;
1367 iobase = self->io.fir_base;
1368 spin_lock(&self->lock);
1369 iHostIntType = GetHostStatus(iobase);
1370
1371 IRDA_DEBUG(4, "%s(): iHostIntType %02x: %s %s %s %02x\n",
1372 __FUNCTION__, iHostIntType,
1373 (iHostIntType & 0x40) ? "Timer" : "",
1374 (iHostIntType & 0x20) ? "Tx" : "",
1375 (iHostIntType & 0x10) ? "Rx" : "",
1376 (iHostIntType & 0x0e) >> 1);
1377
1378 if ((iHostIntType & 0x40) != 0) { //Timer Event
1379 self->EventFlag.TimeOut++;
1380 ClearTimerInt(iobase, 1);
1381 if (self->io.direction == IO_XMIT) {
1382 via_ircc_dma_xmit(self, iobase);
1383 }
1384 if (self->io.direction == IO_RECV) {
1385 /*
1386 * frame ready hold too long, must reset.
1387 */
1388 if (self->RxDataReady > 30) {
1389 hwreset(self);
1390 if (irda_device_txqueue_empty(self->netdev)) {
1391 via_ircc_dma_receive(self);
1392 }
1393 } else { // call this to upload frame.
1394 RxTimerHandler(self, iobase);
1395 }
1396 } //RECV
1397 } //Timer Event
1398 if ((iHostIntType & 0x20) != 0) { //Tx Event
1399 iTxIntType = GetTXStatus(iobase);
1400
1401 IRDA_DEBUG(4, "%s(): iTxIntType %02x: %s %s %s %s\n",
1402 __FUNCTION__, iTxIntType,
1403 (iTxIntType & 0x08) ? "FIFO underr." : "",
1404 (iTxIntType & 0x04) ? "EOM" : "",
1405 (iTxIntType & 0x02) ? "FIFO ready" : "",
1406 (iTxIntType & 0x01) ? "Early EOM" : "");
1407
1408 if (iTxIntType & 0x4) {
1409 self->EventFlag.EOMessage++; // read and will auto clean
1410 if (via_ircc_dma_xmit_complete(self)) {
1411 if (irda_device_txqueue_empty
1412 (self->netdev)) {
1413 via_ircc_dma_receive(self);
1414 }
1415 } else {
1416 self->EventFlag.Unknown++;
1417 }
1418 } //EOP
1419 } //Tx Event
1420 //----------------------------------------
1421 if ((iHostIntType & 0x10) != 0) { //Rx Event
1422 /* Check if DMA has finished */
1423 iRxIntType = GetRXStatus(iobase);
1424
1425 IRDA_DEBUG(4, "%s(): iRxIntType %02x: %s %s %s %s %s %s %s\n",
1426 __FUNCTION__, iRxIntType,
1427 (iRxIntType & 0x80) ? "PHY err." : "",
1428 (iRxIntType & 0x40) ? "CRC err" : "",
1429 (iRxIntType & 0x20) ? "FIFO overr." : "",
1430 (iRxIntType & 0x10) ? "EOF" : "",
1431 (iRxIntType & 0x08) ? "RxData" : "",
1432 (iRxIntType & 0x02) ? "RxMaxLen" : "",
1433 (iRxIntType & 0x01) ? "SIR bad" : "");
1434 if (!iRxIntType)
1435 IRDA_DEBUG(3, "%s(): RxIRQ =0\n", __FUNCTION__);
1436
1437 if (iRxIntType & 0x10) {
1438 if (via_ircc_dma_receive_complete(self, iobase)) {
1439//F01 if(!(IsFIROn(iobase))) via_ircc_dma_receive(self);
1440 via_ircc_dma_receive(self);
1441 }
1442 } // No ERR
1443 else { //ERR
1444 IRDA_DEBUG(4, "%s(): RxIRQ ERR:iRxIntType=%x,HostIntType=%x,CurCount=%x,RxLastCount=%x_____\n",
1445 __FUNCTION__, iRxIntType, iHostIntType,
1446 RxCurCount(iobase, self),
1447 self->RxLastCount);
1448
1449 if (iRxIntType & 0x20) { //FIFO OverRun ERR
1450 ResetChip(iobase, 0);
1451 ResetChip(iobase, 1);
1452 } else { //PHY,CRC ERR
1453
1454 if (iRxIntType != 0x08)
1455 hwreset(self); //F01
1456 }
1457 via_ircc_dma_receive(self);
1458 } //ERR
1459
1460 } //Rx Event
1461 spin_unlock(&self->lock);
1462 return IRQ_RETVAL(iHostIntType);
1463}
1464
1465static void hwreset(struct via_ircc_cb *self)
1466{
1467 int iobase;
1468 iobase = self->io.fir_base;
1469
1470 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
1471
1472 ResetChip(iobase, 5);
1473 EnableDMA(iobase, OFF);
1474 EnableTX(iobase, OFF);
1475 EnableRX(iobase, OFF);
1476 EnRXDMA(iobase, OFF);
1477 EnTXDMA(iobase, OFF);
1478 RXStart(iobase, OFF);
1479 TXStart(iobase, OFF);
1480 InitCard(iobase);
1481 CommonInit(iobase);
1482 SIRFilter(iobase, ON);
1483 SetSIR(iobase, ON);
1484 CRC16(iobase, ON);
1485 EnTXCRC(iobase, 0);
1486 WriteReg(iobase, I_ST_CT_0, 0x00);
1487 SetBaudRate(iobase, 9600);
1488 SetPulseWidth(iobase, 12);
1489 SetSendPreambleCount(iobase, 0);
1490 WriteReg(iobase, I_ST_CT_0, 0x80);
1491
1492 /* Restore speed. */
1493 via_ircc_change_speed(self, self->io.speed);
1494
1495 self->st_fifo.len = 0;
1496}
1497
1498/*
1499 * Function via_ircc_is_receiving (self)
1500 *
1501 * Return TRUE is we are currently receiving a frame
1502 *
1503 */
1504static int via_ircc_is_receiving(struct via_ircc_cb *self)
1505{
1506 int status = FALSE;
1507 int iobase;
1508
1509 IRDA_ASSERT(self != NULL, return FALSE;);
1510
1511 iobase = self->io.fir_base;
1512 if (CkRxRecv(iobase, self))
1513 status = TRUE;
1514
1515 IRDA_DEBUG(2, "%s(): status=%x....\n", __FUNCTION__, status);
1516
1517 return status;
1518}
1519
1520
1521/*
1522 * Function via_ircc_net_open (dev)
1523 *
1524 * Start the device
1525 *
1526 */
1527static int via_ircc_net_open(struct net_device *dev)
1528{
1529 struct via_ircc_cb *self;
1530 int iobase;
1531 char hwname[32];
1532
1533 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
1534
1535 IRDA_ASSERT(dev != NULL, return -1;);
1536 self = (struct via_ircc_cb *) dev->priv;
1537 self->stats.rx_packets = 0;
1538 IRDA_ASSERT(self != NULL, return 0;);
1539 iobase = self->io.fir_base;
1540 if (request_irq(self->io.irq, via_ircc_interrupt, 0, dev->name, dev)) {
1541 IRDA_WARNING("%s, unable to allocate irq=%d\n", driver_name,
1542 self->io.irq);
1543 return -EAGAIN;
1544 }
1545 /*
1546 * Always allocate the DMA channel after the IRQ, and clean up on
1547 * failure.
1548 */
1549 if (request_dma(self->io.dma, dev->name)) {
1550 IRDA_WARNING("%s, unable to allocate dma=%d\n", driver_name,
1551 self->io.dma);
1552 free_irq(self->io.irq, self);
1553 return -EAGAIN;
1554 }
1555 if (self->io.dma2 != self->io.dma) {
1556 if (request_dma(self->io.dma2, dev->name)) {
1557 IRDA_WARNING("%s, unable to allocate dma2=%d\n",
1558 driver_name, self->io.dma2);
1559 free_irq(self->io.irq, self);
1560 return -EAGAIN;
1561 }
1562 }
1563
1564
1565 /* turn on interrupts */
1566 EnAllInt(iobase, ON);
1567 EnInternalLoop(iobase, OFF);
1568 EnExternalLoop(iobase, OFF);
1569
1570 /* */
1571 via_ircc_dma_receive(self);
1572
1573 /* Ready to play! */
1574 netif_start_queue(dev);
1575
1576 /*
1577 * Open new IrLAP layer instance, now that everything should be
1578 * initialized properly
1579 */
1580 sprintf(hwname, "VIA @ 0x%x", iobase);
1581 self->irlap = irlap_open(dev, &self->qos, hwname);
1582
1583 self->RxLastCount = 0;
1584
1585 return 0;
1586}
1587
1588/*
1589 * Function via_ircc_net_close (dev)
1590 *
1591 * Stop the device
1592 *
1593 */
1594static int via_ircc_net_close(struct net_device *dev)
1595{
1596 struct via_ircc_cb *self;
1597 int iobase;
1598
1599 IRDA_DEBUG(3, "%s()\n", __FUNCTION__);
1600
1601 IRDA_ASSERT(dev != NULL, return -1;);
1602 self = (struct via_ircc_cb *) dev->priv;
1603 IRDA_ASSERT(self != NULL, return 0;);
1604
1605 /* Stop device */
1606 netif_stop_queue(dev);
1607 /* Stop and remove instance of IrLAP */
1608 if (self->irlap)
1609 irlap_close(self->irlap);
1610 self->irlap = NULL;
1611 iobase = self->io.fir_base;
1612 EnTXDMA(iobase, OFF);
1613 EnRXDMA(iobase, OFF);
1614 DisableDmaChannel(self->io.dma);
1615
1616 /* Disable interrupts */
1617 EnAllInt(iobase, OFF);
1618 free_irq(self->io.irq, dev);
1619 free_dma(self->io.dma);
1620
1621 return 0;
1622}
1623
1624/*
1625 * Function via_ircc_net_ioctl (dev, rq, cmd)
1626 *
1627 * Process IOCTL commands for this device
1628 *
1629 */
1630static int via_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq,
1631 int cmd)
1632{
1633 struct if_irda_req *irq = (struct if_irda_req *) rq;
1634 struct via_ircc_cb *self;
1635 unsigned long flags;
1636 int ret = 0;
1637
1638 IRDA_ASSERT(dev != NULL, return -1;);
1639 self = dev->priv;
1640 IRDA_ASSERT(self != NULL, return -1;);
1641 IRDA_DEBUG(1, "%s(), %s, (cmd=0x%X)\n", __FUNCTION__, dev->name,
1642 cmd);
1643 /* Disable interrupts & save flags */
1644 spin_lock_irqsave(&self->lock, flags);
1645 switch (cmd) {
1646 case SIOCSBANDWIDTH: /* Set bandwidth */
1647 if (!capable(CAP_NET_ADMIN)) {
1648 ret = -EPERM;
1649 goto out;
1650 }
1651 via_ircc_change_speed(self, irq->ifr_baudrate);
1652 break;
1653 case SIOCSMEDIABUSY: /* Set media busy */
1654 if (!capable(CAP_NET_ADMIN)) {
1655 ret = -EPERM;
1656 goto out;
1657 }
1658 irda_device_set_media_busy(self->netdev, TRUE);
1659 break;
1660 case SIOCGRECEIVING: /* Check if we are receiving right now */
1661 irq->ifr_receiving = via_ircc_is_receiving(self);
1662 break;
1663 default:
1664 ret = -EOPNOTSUPP;
1665 }
1666 out:
1667 spin_unlock_irqrestore(&self->lock, flags);
1668 return ret;
1669}
1670
1671static struct net_device_stats *via_ircc_net_get_stats(struct net_device
1672 *dev)
1673{
1674 struct via_ircc_cb *self = (struct via_ircc_cb *) dev->priv;
1675
1676 return &self->stats;
1677}
1678
1679MODULE_AUTHOR("VIA Technologies,inc");
1680MODULE_DESCRIPTION("VIA IrDA Device Driver");
1681MODULE_LICENSE("GPL");
1682
1683module_init(via_ircc_init);
1684module_exit(via_ircc_cleanup);
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