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ixgb: Fix early TSO completion
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CommitLineData
1da177e4
LT
1/*******************************************************************************
2
0abb6eb1
AK
3 Intel PRO/10GbE Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
0abb6eb1 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgb.h"
30
1da177e4 31char ixgb_driver_name[] = "ixgb";
e9ab1d14 32static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
1da177e4
LT
33
34#ifndef CONFIG_IXGB_NAPI
35#define DRIVERNAPI
36#else
37#define DRIVERNAPI "-NAPI"
38#endif
76ddb3fd 39#define DRV_VERSION "1.0.117-k2"DRIVERNAPI
01e5abc2 40char ixgb_driver_version[] = DRV_VERSION;
d3f464b5 41static char ixgb_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT
42
43/* ixgb_pci_tbl - PCI Device ID Table
44 *
45 * Wildcard entries (PCI_ANY_ID) should come last
46 * Last entry must be all 0s
47 *
48 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
49 * Class, Class Mask, private data (not used) }
50 */
51static struct pci_device_id ixgb_pci_tbl[] = {
52 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
53 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
940829e2
AK
54 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_CX4,
55 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1da177e4
LT
56 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
57 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
58 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
59 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
60
61 /* required last entry */
62 {0,}
63};
64
65MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
66
67/* Local Function Prototypes */
68
69int ixgb_up(struct ixgb_adapter *adapter);
70void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
71void ixgb_reset(struct ixgb_adapter *adapter);
72int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
73int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
74void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
75void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
76void ixgb_update_stats(struct ixgb_adapter *adapter);
77
78static int ixgb_init_module(void);
79static void ixgb_exit_module(void);
80static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
81static void __devexit ixgb_remove(struct pci_dev *pdev);
82static int ixgb_sw_init(struct ixgb_adapter *adapter);
83static int ixgb_open(struct net_device *netdev);
84static int ixgb_close(struct net_device *netdev);
85static void ixgb_configure_tx(struct ixgb_adapter *adapter);
86static void ixgb_configure_rx(struct ixgb_adapter *adapter);
87static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
88static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
89static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
90static void ixgb_set_multi(struct net_device *netdev);
91static void ixgb_watchdog(unsigned long data);
92static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
93static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
94static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
95static int ixgb_set_mac(struct net_device *netdev, void *p);
7d12e780 96static irqreturn_t ixgb_intr(int irq, void *data);
1da177e4 97static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
ac79c82e 98
1da177e4
LT
99#ifdef CONFIG_IXGB_NAPI
100static int ixgb_clean(struct net_device *netdev, int *budget);
101static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
102 int *work_done, int work_to_do);
103#else
104static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
105#endif
106static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
107void ixgb_set_ethtool_ops(struct net_device *netdev);
108static void ixgb_tx_timeout(struct net_device *dev);
c4028958 109static void ixgb_tx_timeout_task(struct work_struct *work);
1da177e4
LT
110static void ixgb_vlan_rx_register(struct net_device *netdev,
111 struct vlan_group *grp);
112static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
113static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
114static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
115
1da177e4
LT
116#ifdef CONFIG_NET_POLL_CONTROLLER
117/* for netdump / net console */
118static void ixgb_netpoll(struct net_device *dev);
119#endif
120
01748fbb
LV
121static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
122 enum pci_channel_state state);
123static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev);
124static void ixgb_io_resume (struct pci_dev *pdev);
1da177e4 125
01748fbb 126/* Exported from other modules */
1da177e4
LT
127extern void ixgb_check_options(struct ixgb_adapter *adapter);
128
01748fbb
LV
129static struct pci_error_handlers ixgb_err_handler = {
130 .error_detected = ixgb_io_error_detected,
131 .slot_reset = ixgb_io_slot_reset,
132 .resume = ixgb_io_resume,
133};
134
1da177e4 135static struct pci_driver ixgb_driver = {
c2eba932 136 .name = ixgb_driver_name,
1da177e4 137 .id_table = ixgb_pci_tbl,
c2eba932
MC
138 .probe = ixgb_probe,
139 .remove = __devexit_p(ixgb_remove),
01748fbb 140 .err_handler = &ixgb_err_handler
1da177e4
LT
141};
142
143MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
144MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
145MODULE_LICENSE("GPL");
01e5abc2 146MODULE_VERSION(DRV_VERSION);
1da177e4 147
ec9c3f5d
AK
148#define DEFAULT_DEBUG_LEVEL_SHIFT 3
149static int debug = DEFAULT_DEBUG_LEVEL_SHIFT;
150module_param(debug, int, 0);
151MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
152
1da177e4 153/* some defines for controlling descriptor fetches in h/w */
3ae84d92
JB
154#define RXDCTL_WTHRESH_DEFAULT 15 /* chip writes back at this many or RXT0 */
155#define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
156 * this */
157#define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
158 * is pushed this many descriptors
159 * from head */
1da177e4
LT
160
161/**
162 * ixgb_init_module - Driver Registration Routine
163 *
164 * ixgb_init_module is the first routine called when the driver is
165 * loaded. All it does is register with the PCI subsystem.
166 **/
167
168static int __init
169ixgb_init_module(void)
170{
1da177e4
LT
171 printk(KERN_INFO "%s - version %s\n",
172 ixgb_driver_string, ixgb_driver_version);
173
174 printk(KERN_INFO "%s\n", ixgb_copyright);
175
29917620 176 return pci_register_driver(&ixgb_driver);
1da177e4
LT
177}
178
179module_init(ixgb_init_module);
180
181/**
182 * ixgb_exit_module - Driver Exit Cleanup Routine
183 *
184 * ixgb_exit_module is called just before the driver is removed
185 * from memory.
186 **/
187
188static void __exit
189ixgb_exit_module(void)
190{
1da177e4
LT
191 pci_unregister_driver(&ixgb_driver);
192}
193
194module_exit(ixgb_exit_module);
195
196/**
197 * ixgb_irq_disable - Mask off interrupt generation on the NIC
198 * @adapter: board private structure
199 **/
200
235949d1 201static void
1da177e4
LT
202ixgb_irq_disable(struct ixgb_adapter *adapter)
203{
204 atomic_inc(&adapter->irq_sem);
205 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
206 IXGB_WRITE_FLUSH(&adapter->hw);
207 synchronize_irq(adapter->pdev->irq);
208}
209
210/**
211 * ixgb_irq_enable - Enable default interrupt generation settings
212 * @adapter: board private structure
213 **/
214
235949d1 215static void
1da177e4
LT
216ixgb_irq_enable(struct ixgb_adapter *adapter)
217{
218 if(atomic_dec_and_test(&adapter->irq_sem)) {
219 IXGB_WRITE_REG(&adapter->hw, IMS,
6dfbb6dd
MC
220 IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
221 IXGB_INT_LSC);
1da177e4
LT
222 IXGB_WRITE_FLUSH(&adapter->hw);
223 }
224}
225
226int
227ixgb_up(struct ixgb_adapter *adapter)
228{
229 struct net_device *netdev = adapter->netdev;
230 int err;
231 int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
232 struct ixgb_hw *hw = &adapter->hw;
233
234 /* hardware has been reset, we need to reload some things */
235
8556f0d1 236 ixgb_rar_set(hw, netdev->dev_addr, 0);
1da177e4
LT
237 ixgb_set_multi(netdev);
238
239 ixgb_restore_vlan(adapter);
240
241 ixgb_configure_tx(adapter);
242 ixgb_setup_rctl(adapter);
243 ixgb_configure_rx(adapter);
244 ixgb_alloc_rx_buffers(adapter);
245
e59d1696
AK
246 /* disable interrupts and get the hardware into a known state */
247 IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
248
1da177e4
LT
249#ifdef CONFIG_PCI_MSI
250 {
251 boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) &
252 IXGB_STATUS_PCIX_MODE) ? TRUE : FALSE;
253 adapter->have_msi = TRUE;
254
255 if (!pcix)
256 adapter->have_msi = FALSE;
257 else if((err = pci_enable_msi(adapter->pdev))) {
ec9c3f5d 258 DPRINTK(PROBE, ERR,
1da177e4
LT
259 "Unable to allocate MSI interrupt Error: %d\n", err);
260 adapter->have_msi = FALSE;
261 /* proceed to try to request regular interrupt */
262 }
263 }
264
265#endif
266 if((err = request_irq(adapter->pdev->irq, &ixgb_intr,
1fb9df5d 267 IRQF_SHARED | IRQF_SAMPLE_RANDOM,
ec9c3f5d
AK
268 netdev->name, netdev))) {
269 DPRINTK(PROBE, ERR,
270 "Unable to allocate interrupt Error: %d\n", err);
1da177e4 271 return err;
ec9c3f5d 272 }
1da177e4 273
1da177e4
LT
274 if((hw->max_frame_size != max_frame) ||
275 (hw->max_frame_size !=
276 (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
277
278 hw->max_frame_size = max_frame;
279
280 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
281
282 if(hw->max_frame_size >
283 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
284 uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
285
286 if(!(ctrl0 & IXGB_CTRL0_JFE)) {
287 ctrl0 |= IXGB_CTRL0_JFE;
288 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
289 }
290 }
291 }
292
293 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT
294
295#ifdef CONFIG_IXGB_NAPI
296 netif_poll_enable(netdev);
297#endif
e59d1696
AK
298 ixgb_irq_enable(adapter);
299
1da177e4
LT
300 return 0;
301}
302
303void
304ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
305{
306 struct net_device *netdev = adapter->netdev;
307
308 ixgb_irq_disable(adapter);
309 free_irq(adapter->pdev->irq, netdev);
310#ifdef CONFIG_PCI_MSI
311 if(adapter->have_msi == TRUE)
312 pci_disable_msi(adapter->pdev);
313
314#endif
315 if(kill_watchdog)
316 del_timer_sync(&adapter->watchdog_timer);
317#ifdef CONFIG_IXGB_NAPI
318 netif_poll_disable(netdev);
319#endif
320 adapter->link_speed = 0;
321 adapter->link_duplex = 0;
322 netif_carrier_off(netdev);
323 netif_stop_queue(netdev);
324
325 ixgb_reset(adapter);
326 ixgb_clean_tx_ring(adapter);
327 ixgb_clean_rx_ring(adapter);
328}
329
330void
331ixgb_reset(struct ixgb_adapter *adapter)
332{
333
334 ixgb_adapter_stop(&adapter->hw);
335 if(!ixgb_init_hw(&adapter->hw))
ec9c3f5d 336 DPRINTK(PROBE, ERR, "ixgb_init_hw failed.\n");
1da177e4
LT
337}
338
339/**
340 * ixgb_probe - Device Initialization Routine
341 * @pdev: PCI device information struct
342 * @ent: entry in ixgb_pci_tbl
343 *
344 * Returns 0 on success, negative on failure
345 *
346 * ixgb_probe initializes an adapter identified by a pci_dev structure.
347 * The OS initialization, configuring of the adapter private structure,
348 * and a hardware reset occur.
349 **/
350
351static int __devinit
352ixgb_probe(struct pci_dev *pdev,
353 const struct pci_device_id *ent)
354{
355 struct net_device *netdev = NULL;
356 struct ixgb_adapter *adapter;
357 static int cards_found = 0;
358 unsigned long mmio_start;
359 int mmio_len;
360 int pci_using_dac;
361 int i;
362 int err;
363
364 if((err = pci_enable_device(pdev)))
365 return err;
366
c91e468a
AS
367 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
368 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT
369 pci_using_dac = 1;
370 } else {
c91e468a
AS
371 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) ||
372 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
ec9c3f5d
AK
373 printk(KERN_ERR
374 "ixgb: No usable DMA configuration, aborting\n");
c91e468a 375 goto err_dma_mask;
1da177e4
LT
376 }
377 pci_using_dac = 0;
378 }
379
380 if((err = pci_request_regions(pdev, ixgb_driver_name)))
c91e468a 381 goto err_request_regions;
1da177e4
LT
382
383 pci_set_master(pdev);
384
385 netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
386 if(!netdev) {
387 err = -ENOMEM;
388 goto err_alloc_etherdev;
389 }
390
391 SET_MODULE_OWNER(netdev);
392 SET_NETDEV_DEV(netdev, &pdev->dev);
393
394 pci_set_drvdata(pdev, netdev);
8908c6cd 395 adapter = netdev_priv(netdev);
1da177e4
LT
396 adapter->netdev = netdev;
397 adapter->pdev = pdev;
398 adapter->hw.back = adapter;
ec9c3f5d 399 adapter->msg_enable = netif_msg_init(debug, DEFAULT_DEBUG_LEVEL_SHIFT);
1da177e4
LT
400
401 mmio_start = pci_resource_start(pdev, BAR_0);
402 mmio_len = pci_resource_len(pdev, BAR_0);
403
404 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
405 if(!adapter->hw.hw_addr) {
406 err = -EIO;
407 goto err_ioremap;
408 }
409
410 for(i = BAR_1; i <= BAR_5; i++) {
411 if(pci_resource_len(pdev, i) == 0)
412 continue;
413 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
414 adapter->hw.io_base = pci_resource_start(pdev, i);
415 break;
416 }
417 }
418
419 netdev->open = &ixgb_open;
420 netdev->stop = &ixgb_close;
421 netdev->hard_start_xmit = &ixgb_xmit_frame;
422 netdev->get_stats = &ixgb_get_stats;
423 netdev->set_multicast_list = &ixgb_set_multi;
424 netdev->set_mac_address = &ixgb_set_mac;
425 netdev->change_mtu = &ixgb_change_mtu;
426 ixgb_set_ethtool_ops(netdev);
427 netdev->tx_timeout = &ixgb_tx_timeout;
9b8118df 428 netdev->watchdog_timeo = 5 * HZ;
1da177e4
LT
429#ifdef CONFIG_IXGB_NAPI
430 netdev->poll = &ixgb_clean;
431 netdev->weight = 64;
432#endif
433 netdev->vlan_rx_register = ixgb_vlan_rx_register;
434 netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
435 netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
436#ifdef CONFIG_NET_POLL_CONTROLLER
437 netdev->poll_controller = ixgb_netpoll;
438#endif
439
0eb5a34c 440 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4
LT
441 netdev->mem_start = mmio_start;
442 netdev->mem_end = mmio_start + mmio_len;
443 netdev->base_addr = adapter->hw.io_base;
444
445 adapter->bd_number = cards_found;
446 adapter->link_speed = 0;
447 adapter->link_duplex = 0;
448
449 /* setup the private structure */
450
451 if((err = ixgb_sw_init(adapter)))
452 goto err_sw_init;
453
454 netdev->features = NETIF_F_SG |
455 NETIF_F_HW_CSUM |
456 NETIF_F_HW_VLAN_TX |
457 NETIF_F_HW_VLAN_RX |
458 NETIF_F_HW_VLAN_FILTER;
459#ifdef NETIF_F_TSO
460 netdev->features |= NETIF_F_TSO;
461#endif
f017f14b
AK
462#ifdef NETIF_F_LLTX
463 netdev->features |= NETIF_F_LLTX;
464#endif
1da177e4
LT
465
466 if(pci_using_dac)
467 netdev->features |= NETIF_F_HIGHDMA;
468
469 /* make sure the EEPROM is good */
470
471 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
ec9c3f5d 472 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT
473 err = -EIO;
474 goto err_eeprom;
475 }
476
477 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
df859c51 478 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
1da177e4 479
df859c51 480 if(!is_valid_ether_addr(netdev->perm_addr)) {
ec9c3f5d 481 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT
482 err = -EIO;
483 goto err_eeprom;
484 }
485
486 adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
487
488 init_timer(&adapter->watchdog_timer);
489 adapter->watchdog_timer.function = &ixgb_watchdog;
490 adapter->watchdog_timer.data = (unsigned long)adapter;
491
c4028958 492 INIT_WORK(&adapter->tx_timeout_task, ixgb_tx_timeout_task);
1da177e4 493
ec9c3f5d 494 strcpy(netdev->name, "eth%d");
1da177e4
LT
495 if((err = register_netdev(netdev)))
496 goto err_register;
497
498 /* we're going to reset, so assume we have no link for now */
499
500 netif_carrier_off(netdev);
501 netif_stop_queue(netdev);
502
ec9c3f5d 503 DPRINTK(PROBE, INFO, "Intel(R) PRO/10GbE Network Connection\n");
1da177e4
LT
504 ixgb_check_options(adapter);
505 /* reset the hardware with the new settings */
506
507 ixgb_reset(adapter);
508
509 cards_found++;
510 return 0;
511
512err_register:
513err_sw_init:
514err_eeprom:
515 iounmap(adapter->hw.hw_addr);
516err_ioremap:
517 free_netdev(netdev);
518err_alloc_etherdev:
519 pci_release_regions(pdev);
c91e468a
AS
520err_request_regions:
521err_dma_mask:
522 pci_disable_device(pdev);
1da177e4
LT
523 return err;
524}
525
526/**
527 * ixgb_remove - Device Removal Routine
528 * @pdev: PCI device information struct
529 *
530 * ixgb_remove is called by the PCI subsystem to alert the driver
531 * that it should release a PCI device. The could be caused by a
532 * Hot-Plug event, or because the driver is going to be removed from
533 * memory.
534 **/
535
536static void __devexit
537ixgb_remove(struct pci_dev *pdev)
538{
539 struct net_device *netdev = pci_get_drvdata(pdev);
8908c6cd 540 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
541
542 unregister_netdev(netdev);
543
544 iounmap(adapter->hw.hw_addr);
545 pci_release_regions(pdev);
546
547 free_netdev(netdev);
548}
549
550/**
551 * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
552 * @adapter: board private structure to initialize
553 *
554 * ixgb_sw_init initializes the Adapter private data structure.
555 * Fields are initialized based on PCI device information and
556 * OS network device settings (MTU size).
557 **/
558
559static int __devinit
560ixgb_sw_init(struct ixgb_adapter *adapter)
561{
562 struct ixgb_hw *hw = &adapter->hw;
563 struct net_device *netdev = adapter->netdev;
564 struct pci_dev *pdev = adapter->pdev;
565
566 /* PCI config space info */
567
568 hw->vendor_id = pdev->vendor;
569 hw->device_id = pdev->device;
570 hw->subsystem_vendor_id = pdev->subsystem_vendor;
571 hw->subsystem_id = pdev->subsystem_device;
572
1da177e4 573 hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
3f3dc0dd 574 adapter->rx_buffer_len = hw->max_frame_size;
1da177e4
LT
575
576 if((hw->device_id == IXGB_DEVICE_ID_82597EX)
940829e2
AK
577 || (hw->device_id == IXGB_DEVICE_ID_82597EX_CX4)
578 || (hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
579 || (hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
1da177e4
LT
580 hw->mac_type = ixgb_82597;
581 else {
582 /* should never have loaded on this device */
ec9c3f5d 583 DPRINTK(PROBE, ERR, "unsupported device id\n");
1da177e4
LT
584 }
585
586 /* enable flow control to be programmed */
587 hw->fc.send_xon = 1;
588
589 atomic_set(&adapter->irq_sem, 1);
590 spin_lock_init(&adapter->tx_lock);
591
592 return 0;
593}
594
595/**
596 * ixgb_open - Called when a network interface is made active
597 * @netdev: network interface device structure
598 *
599 * Returns 0 on success, negative value on failure
600 *
601 * The open entry point is called when a network interface is made
602 * active by the system (IFF_UP). At this point all resources needed
603 * for transmit and receive operations are allocated, the interrupt
604 * handler is registered with the OS, the watchdog timer is started,
605 * and the stack is notified that the interface is ready.
606 **/
607
608static int
609ixgb_open(struct net_device *netdev)
610{
8908c6cd 611 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
612 int err;
613
614 /* allocate transmit descriptors */
615
616 if((err = ixgb_setup_tx_resources(adapter)))
617 goto err_setup_tx;
618
619 /* allocate receive descriptors */
620
621 if((err = ixgb_setup_rx_resources(adapter)))
622 goto err_setup_rx;
623
624 if((err = ixgb_up(adapter)))
625 goto err_up;
626
627 return 0;
628
629err_up:
630 ixgb_free_rx_resources(adapter);
631err_setup_rx:
632 ixgb_free_tx_resources(adapter);
633err_setup_tx:
634 ixgb_reset(adapter);
635
636 return err;
637}
638
639/**
640 * ixgb_close - Disables a network interface
641 * @netdev: network interface device structure
642 *
643 * Returns 0, this is not allowed to fail
644 *
645 * The close entry point is called when an interface is de-activated
646 * by the OS. The hardware is still under the drivers control, but
647 * needs to be disabled. A global MAC reset is issued to stop the
648 * hardware, and all transmit and receive resources are freed.
649 **/
650
651static int
652ixgb_close(struct net_device *netdev)
653{
8908c6cd 654 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
655
656 ixgb_down(adapter, TRUE);
657
658 ixgb_free_tx_resources(adapter);
659 ixgb_free_rx_resources(adapter);
660
661 return 0;
662}
663
664/**
665 * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
666 * @adapter: board private structure
667 *
668 * Return 0 on success, negative on failure
669 **/
670
671int
672ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
673{
674 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
675 struct pci_dev *pdev = adapter->pdev;
676 int size;
677
678 size = sizeof(struct ixgb_buffer) * txdr->count;
679 txdr->buffer_info = vmalloc(size);
680 if(!txdr->buffer_info) {
ec9c3f5d
AK
681 DPRINTK(PROBE, ERR,
682 "Unable to allocate transmit descriptor ring memory\n");
1da177e4
LT
683 return -ENOMEM;
684 }
685 memset(txdr->buffer_info, 0, size);
686
687 /* round up to nearest 4K */
688
689 txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
690 IXGB_ROUNDUP(txdr->size, 4096);
691
692 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
693 if(!txdr->desc) {
694 vfree(txdr->buffer_info);
ec9c3f5d
AK
695 DPRINTK(PROBE, ERR,
696 "Unable to allocate transmit descriptor memory\n");
1da177e4
LT
697 return -ENOMEM;
698 }
699 memset(txdr->desc, 0, txdr->size);
700
701 txdr->next_to_use = 0;
702 txdr->next_to_clean = 0;
703
704 return 0;
705}
706
707/**
708 * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
709 * @adapter: board private structure
710 *
711 * Configure the Tx unit of the MAC after a reset.
712 **/
713
714static void
715ixgb_configure_tx(struct ixgb_adapter *adapter)
716{
717 uint64_t tdba = adapter->tx_ring.dma;
718 uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
719 uint32_t tctl;
720 struct ixgb_hw *hw = &adapter->hw;
721
722 /* Setup the Base and Length of the Tx Descriptor Ring
723 * tx_ring.dma can be either a 32 or 64 bit value
724 */
725
726 IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
727 IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
728
729 IXGB_WRITE_REG(hw, TDLEN, tdlen);
730
731 /* Setup the HW Tx Head and Tail descriptor pointers */
732
733 IXGB_WRITE_REG(hw, TDH, 0);
734 IXGB_WRITE_REG(hw, TDT, 0);
735
736 /* don't set up txdctl, it induces performance problems if configured
737 * incorrectly */
738 /* Set the Tx Interrupt Delay register */
739
740 IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
741
742 /* Program the Transmit Control Register */
743
744 tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
745 IXGB_WRITE_REG(hw, TCTL, tctl);
746
747 /* Setup Transmit Descriptor Settings for this adapter */
748 adapter->tx_cmd_type =
749 IXGB_TX_DESC_TYPE
750 | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
751}
752
753/**
754 * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
755 * @adapter: board private structure
756 *
757 * Returns 0 on success, negative on failure
758 **/
759
760int
761ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
762{
763 struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
764 struct pci_dev *pdev = adapter->pdev;
765 int size;
766
767 size = sizeof(struct ixgb_buffer) * rxdr->count;
768 rxdr->buffer_info = vmalloc(size);
769 if(!rxdr->buffer_info) {
ec9c3f5d
AK
770 DPRINTK(PROBE, ERR,
771 "Unable to allocate receive descriptor ring\n");
1da177e4
LT
772 return -ENOMEM;
773 }
774 memset(rxdr->buffer_info, 0, size);
775
776 /* Round up to nearest 4K */
777
778 rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
779 IXGB_ROUNDUP(rxdr->size, 4096);
780
781 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
782
783 if(!rxdr->desc) {
784 vfree(rxdr->buffer_info);
ec9c3f5d
AK
785 DPRINTK(PROBE, ERR,
786 "Unable to allocate receive descriptors\n");
1da177e4
LT
787 return -ENOMEM;
788 }
789 memset(rxdr->desc, 0, rxdr->size);
790
791 rxdr->next_to_clean = 0;
792 rxdr->next_to_use = 0;
793
794 return 0;
795}
796
797/**
798 * ixgb_setup_rctl - configure the receive control register
799 * @adapter: Board private structure
800 **/
801
802static void
803ixgb_setup_rctl(struct ixgb_adapter *adapter)
804{
805 uint32_t rctl;
806
807 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
808
809 rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
810
811 rctl |=
812 IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
813 IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
814 (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
815
816 rctl |= IXGB_RCTL_SECRC;
817
3f3dc0dd 818 if (adapter->rx_buffer_len <= IXGB_RXBUFFER_2048)
1da177e4 819 rctl |= IXGB_RCTL_BSIZE_2048;
3f3dc0dd 820 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_4096)
1da177e4 821 rctl |= IXGB_RCTL_BSIZE_4096;
3f3dc0dd 822 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_8192)
1da177e4 823 rctl |= IXGB_RCTL_BSIZE_8192;
3f3dc0dd 824 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_16384)
1da177e4 825 rctl |= IXGB_RCTL_BSIZE_16384;
1da177e4
LT
826
827 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
828}
829
830/**
831 * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
832 * @adapter: board private structure
833 *
834 * Configure the Rx unit of the MAC after a reset.
835 **/
836
837static void
838ixgb_configure_rx(struct ixgb_adapter *adapter)
839{
840 uint64_t rdba = adapter->rx_ring.dma;
841 uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
842 struct ixgb_hw *hw = &adapter->hw;
843 uint32_t rctl;
844 uint32_t rxcsum;
845 uint32_t rxdctl;
846
847 /* make sure receives are disabled while setting up the descriptors */
848
849 rctl = IXGB_READ_REG(hw, RCTL);
850 IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
851
852 /* set the Receive Delay Timer Register */
853
854 IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
855
856 /* Setup the Base and Length of the Rx Descriptor Ring */
857
858 IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
859 IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
860
861 IXGB_WRITE_REG(hw, RDLEN, rdlen);
862
863 /* Setup the HW Rx Head and Tail Descriptor Pointers */
864 IXGB_WRITE_REG(hw, RDH, 0);
865 IXGB_WRITE_REG(hw, RDT, 0);
866
867 /* set up pre-fetching of receive buffers so we get some before we
868 * run out (default hardware behavior is to run out before fetching
869 * more). This sets up to fetch if HTHRESH rx descriptors are avail
870 * and the descriptors in hw cache are below PTHRESH. This avoids
871 * the hardware behavior of fetching <=512 descriptors in a single
872 * burst that pre-empts all other activity, usually causing fifo
873 * overflows. */
874 /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
875 rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
876 RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
877 RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
878 IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
879
880 /* Enable Receive Checksum Offload for TCP and UDP */
881 if(adapter->rx_csum == TRUE) {
882 rxcsum = IXGB_READ_REG(hw, RXCSUM);
883 rxcsum |= IXGB_RXCSUM_TUOFL;
884 IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
885 }
886
887 /* Enable Receives */
888
889 IXGB_WRITE_REG(hw, RCTL, rctl);
890}
891
892/**
893 * ixgb_free_tx_resources - Free Tx Resources
894 * @adapter: board private structure
895 *
896 * Free all transmit software resources
897 **/
898
899void
900ixgb_free_tx_resources(struct ixgb_adapter *adapter)
901{
902 struct pci_dev *pdev = adapter->pdev;
903
904 ixgb_clean_tx_ring(adapter);
905
906 vfree(adapter->tx_ring.buffer_info);
907 adapter->tx_ring.buffer_info = NULL;
908
909 pci_free_consistent(pdev, adapter->tx_ring.size,
910 adapter->tx_ring.desc, adapter->tx_ring.dma);
911
912 adapter->tx_ring.desc = NULL;
913}
914
235949d1 915static void
1da177e4
LT
916ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
917 struct ixgb_buffer *buffer_info)
918{
919 struct pci_dev *pdev = adapter->pdev;
1dfdd7df
AK
920
921 if (buffer_info->dma)
922 pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
923 PCI_DMA_TODEVICE);
924
925 if (buffer_info->skb)
1da177e4 926 dev_kfree_skb_any(buffer_info->skb);
1dfdd7df
AK
927
928 buffer_info->skb = NULL;
929 buffer_info->dma = 0;
930 buffer_info->time_stamp = 0;
931 /* these fields must always be initialized in tx
932 * buffer_info->length = 0;
933 * buffer_info->next_to_watch = 0; */
1da177e4
LT
934}
935
936/**
937 * ixgb_clean_tx_ring - Free Tx Buffers
938 * @adapter: board private structure
939 **/
940
941static void
942ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
943{
944 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
945 struct ixgb_buffer *buffer_info;
946 unsigned long size;
947 unsigned int i;
948
949 /* Free all the Tx ring sk_buffs */
950
951 for(i = 0; i < tx_ring->count; i++) {
952 buffer_info = &tx_ring->buffer_info[i];
953 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
954 }
955
956 size = sizeof(struct ixgb_buffer) * tx_ring->count;
957 memset(tx_ring->buffer_info, 0, size);
958
959 /* Zero out the descriptor ring */
960
961 memset(tx_ring->desc, 0, tx_ring->size);
962
963 tx_ring->next_to_use = 0;
964 tx_ring->next_to_clean = 0;
965
966 IXGB_WRITE_REG(&adapter->hw, TDH, 0);
967 IXGB_WRITE_REG(&adapter->hw, TDT, 0);
968}
969
970/**
971 * ixgb_free_rx_resources - Free Rx Resources
972 * @adapter: board private structure
973 *
974 * Free all receive software resources
975 **/
976
977void
978ixgb_free_rx_resources(struct ixgb_adapter *adapter)
979{
980 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
981 struct pci_dev *pdev = adapter->pdev;
982
983 ixgb_clean_rx_ring(adapter);
984
985 vfree(rx_ring->buffer_info);
986 rx_ring->buffer_info = NULL;
987
988 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
989
990 rx_ring->desc = NULL;
991}
992
993/**
994 * ixgb_clean_rx_ring - Free Rx Buffers
995 * @adapter: board private structure
996 **/
997
998static void
999ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
1000{
1001 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1002 struct ixgb_buffer *buffer_info;
1003 struct pci_dev *pdev = adapter->pdev;
1004 unsigned long size;
1005 unsigned int i;
1006
1007 /* Free all the Rx ring sk_buffs */
1008
1009 for(i = 0; i < rx_ring->count; i++) {
1010 buffer_info = &rx_ring->buffer_info[i];
1011 if(buffer_info->skb) {
1012
1013 pci_unmap_single(pdev,
1014 buffer_info->dma,
1015 buffer_info->length,
1016 PCI_DMA_FROMDEVICE);
1017
1018 dev_kfree_skb(buffer_info->skb);
1019
1020 buffer_info->skb = NULL;
1021 }
1022 }
1023
1024 size = sizeof(struct ixgb_buffer) * rx_ring->count;
1025 memset(rx_ring->buffer_info, 0, size);
1026
1027 /* Zero out the descriptor ring */
1028
1029 memset(rx_ring->desc, 0, rx_ring->size);
1030
1031 rx_ring->next_to_clean = 0;
1032 rx_ring->next_to_use = 0;
1033
1034 IXGB_WRITE_REG(&adapter->hw, RDH, 0);
1035 IXGB_WRITE_REG(&adapter->hw, RDT, 0);
1036}
1037
1038/**
1039 * ixgb_set_mac - Change the Ethernet Address of the NIC
1040 * @netdev: network interface device structure
1041 * @p: pointer to an address structure
1042 *
1043 * Returns 0 on success, negative on failure
1044 **/
1045
1046static int
1047ixgb_set_mac(struct net_device *netdev, void *p)
1048{
8908c6cd 1049 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1050 struct sockaddr *addr = p;
1051
1052 if(!is_valid_ether_addr(addr->sa_data))
1053 return -EADDRNOTAVAIL;
1054
1055 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1056
1057 ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
1058
1059 return 0;
1060}
1061
1062/**
1063 * ixgb_set_multi - Multicast and Promiscuous mode set
1064 * @netdev: network interface device structure
1065 *
1066 * The set_multi entry point is called whenever the multicast address
1067 * list or the network interface flags are updated. This routine is
1068 * responsible for configuring the hardware for proper multicast,
1069 * promiscuous mode, and all-multi behavior.
1070 **/
1071
1072static void
1073ixgb_set_multi(struct net_device *netdev)
1074{
8908c6cd 1075 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1076 struct ixgb_hw *hw = &adapter->hw;
1077 struct dev_mc_list *mc_ptr;
1078 uint32_t rctl;
1079 int i;
1080
1081 /* Check for Promiscuous and All Multicast modes */
1082
1083 rctl = IXGB_READ_REG(hw, RCTL);
1084
1085 if(netdev->flags & IFF_PROMISC) {
1086 rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1087 } else if(netdev->flags & IFF_ALLMULTI) {
1088 rctl |= IXGB_RCTL_MPE;
1089 rctl &= ~IXGB_RCTL_UPE;
1090 } else {
1091 rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1092 }
1093
1094 if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
1095 rctl |= IXGB_RCTL_MPE;
1096 IXGB_WRITE_REG(hw, RCTL, rctl);
1097 } else {
1098 uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
1099
1100 IXGB_WRITE_REG(hw, RCTL, rctl);
1101
1102 for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
1103 i++, mc_ptr = mc_ptr->next)
1104 memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
1105 mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
1106
1107 ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
1108 }
1109}
1110
1111/**
1112 * ixgb_watchdog - Timer Call-back
1113 * @data: pointer to netdev cast into an unsigned long
1114 **/
1115
1116static void
1117ixgb_watchdog(unsigned long data)
1118{
1119 struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
1120 struct net_device *netdev = adapter->netdev;
1121 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
1122
1123 ixgb_check_for_link(&adapter->hw);
1124
1125 if (ixgb_check_for_bad_link(&adapter->hw)) {
1126 /* force the reset path */
1127 netif_stop_queue(netdev);
1128 }
1129
1130 if(adapter->hw.link_up) {
1131 if(!netif_carrier_ok(netdev)) {
ec9c3f5d
AK
1132 DPRINTK(LINK, INFO,
1133 "NIC Link is Up 10000 Mbps Full Duplex\n");
1da177e4
LT
1134 adapter->link_speed = 10000;
1135 adapter->link_duplex = FULL_DUPLEX;
1136 netif_carrier_on(netdev);
1137 netif_wake_queue(netdev);
1138 }
1139 } else {
1140 if(netif_carrier_ok(netdev)) {
1141 adapter->link_speed = 0;
1142 adapter->link_duplex = 0;
ec9c3f5d 1143 DPRINTK(LINK, INFO, "NIC Link is Down\n");
1da177e4
LT
1144 netif_carrier_off(netdev);
1145 netif_stop_queue(netdev);
1146
1147 }
1148 }
1149
1150 ixgb_update_stats(adapter);
1151
1152 if(!netif_carrier_ok(netdev)) {
1153 if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
1154 /* We've lost link, so the controller stops DMA,
1155 * but we've got queued Tx work that's never going
1156 * to get done, so reset controller to flush Tx.
1157 * (Do the reset outside of interrupt context). */
1158 schedule_work(&adapter->tx_timeout_task);
1159 }
1160 }
1161
1162 /* Force detection of hung controller every watchdog period */
1163 adapter->detect_tx_hung = TRUE;
1164
1165 /* generate an interrupt to force clean up of any stragglers */
1166 IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
1167
1168 /* Reset the timer */
1169 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1170}
1171
1172#define IXGB_TX_FLAGS_CSUM 0x00000001
1173#define IXGB_TX_FLAGS_VLAN 0x00000002
1174#define IXGB_TX_FLAGS_TSO 0x00000004
1175
235949d1 1176static int
1da177e4
LT
1177ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
1178{
1179#ifdef NETIF_F_TSO
1180 struct ixgb_context_desc *context_desc;
1181 unsigned int i;
1182 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
1183 uint16_t ipcse, tucse, mss;
1184 int err;
1185
89114afd 1186 if (likely(skb_is_gso(skb))) {
adc54139 1187 struct ixgb_buffer *buffer_info;
1da177e4
LT
1188 if (skb_header_cloned(skb)) {
1189 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1190 if (err)
1191 return err;
1192 }
1193
1194 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
7967168c 1195 mss = skb_shinfo(skb)->gso_size;
1da177e4
LT
1196 skb->nh.iph->tot_len = 0;
1197 skb->nh.iph->check = 0;
1198 skb->h.th->check = ~csum_tcpudp_magic(skb->nh.iph->saddr,
1199 skb->nh.iph->daddr,
1200 0, IPPROTO_TCP, 0);
1201 ipcss = skb->nh.raw - skb->data;
1202 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1203 ipcse = skb->h.raw - skb->data - 1;
1204 tucss = skb->h.raw - skb->data;
1205 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
1206 tucse = 0;
1207
1208 i = adapter->tx_ring.next_to_use;
1209 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
adc54139
JB
1210 buffer_info = &adapter->tx_ring.buffer_info[i];
1211 WARN_ON(buffer_info->dma != 0);
1da177e4
LT
1212
1213 context_desc->ipcss = ipcss;
1214 context_desc->ipcso = ipcso;
1215 context_desc->ipcse = cpu_to_le16(ipcse);
1216 context_desc->tucss = tucss;
1217 context_desc->tucso = tucso;
1218 context_desc->tucse = cpu_to_le16(tucse);
1219 context_desc->mss = cpu_to_le16(mss);
1220 context_desc->hdr_len = hdr_len;
1221 context_desc->status = 0;
1222 context_desc->cmd_type_len = cpu_to_le32(
1223 IXGB_CONTEXT_DESC_TYPE
1224 | IXGB_CONTEXT_DESC_CMD_TSE
1225 | IXGB_CONTEXT_DESC_CMD_IP
1226 | IXGB_CONTEXT_DESC_CMD_TCP
1da177e4
LT
1227 | IXGB_CONTEXT_DESC_CMD_IDE
1228 | (skb->len - (hdr_len)));
1229
06c2f9ec 1230
1da177e4
LT
1231 if(++i == adapter->tx_ring.count) i = 0;
1232 adapter->tx_ring.next_to_use = i;
1233
1234 return 1;
1235 }
1236#endif
1237
1238 return 0;
1239}
1240
235949d1 1241static boolean_t
1da177e4
LT
1242ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
1243{
1244 struct ixgb_context_desc *context_desc;
1245 unsigned int i;
1246 uint8_t css, cso;
1247
84fa7933 1248 if(likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
adc54139 1249 struct ixgb_buffer *buffer_info;
1da177e4 1250 css = skb->h.raw - skb->data;
ff1dcadb 1251 cso = css + skb->csum_offset;
1da177e4
LT
1252
1253 i = adapter->tx_ring.next_to_use;
1254 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
adc54139
JB
1255 buffer_info = &adapter->tx_ring.buffer_info[i];
1256 WARN_ON(buffer_info->dma != 0);
1da177e4
LT
1257
1258 context_desc->tucss = css;
1259 context_desc->tucso = cso;
1260 context_desc->tucse = 0;
1261 /* zero out any previously existing data in one instruction */
1262 *(uint32_t *)&(context_desc->ipcss) = 0;
1263 context_desc->status = 0;
1264 context_desc->hdr_len = 0;
1265 context_desc->mss = 0;
1266 context_desc->cmd_type_len =
1267 cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
06c2f9ec 1268 | IXGB_TX_DESC_CMD_IDE);
1da177e4
LT
1269
1270 if(++i == adapter->tx_ring.count) i = 0;
1271 adapter->tx_ring.next_to_use = i;
1272
1273 return TRUE;
1274 }
1275
1276 return FALSE;
1277}
1278
1279#define IXGB_MAX_TXD_PWR 14
1280#define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
1281
235949d1 1282static int
1da177e4
LT
1283ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
1284 unsigned int first)
1285{
1286 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1287 struct ixgb_buffer *buffer_info;
1288 int len = skb->len;
1289 unsigned int offset = 0, size, count = 0, i;
5d927853 1290 unsigned int mss = skb_shinfo(skb)->gso_size;
1da177e4
LT
1291
1292 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
1293 unsigned int f;
ac79c82e 1294
1da177e4
LT
1295 len -= skb->data_len;
1296
1297 i = tx_ring->next_to_use;
1298
1299 while(len) {
1300 buffer_info = &tx_ring->buffer_info[i];
709cf018 1301 size = min(len, IXGB_MAX_DATA_PER_TXD);
5d927853
JB
1302 /* Workaround for premature desc write-backs
1303 * in TSO mode. Append 4-byte sentinel desc */
1304 if (unlikely(mss && !nr_frags && size == len && size > 8))
1305 size -= 4;
1306
1da177e4 1307 buffer_info->length = size;
adc54139 1308 WARN_ON(buffer_info->dma != 0);
1da177e4
LT
1309 buffer_info->dma =
1310 pci_map_single(adapter->pdev,
1311 skb->data + offset,
1312 size,
1313 PCI_DMA_TODEVICE);
1314 buffer_info->time_stamp = jiffies;
1dfdd7df 1315 buffer_info->next_to_watch = 0;
1da177e4
LT
1316
1317 len -= size;
1318 offset += size;
1319 count++;
1320 if(++i == tx_ring->count) i = 0;
1321 }
1322
1323 for(f = 0; f < nr_frags; f++) {
1324 struct skb_frag_struct *frag;
1325
1326 frag = &skb_shinfo(skb)->frags[f];
1327 len = frag->size;
1328 offset = 0;
1329
1330 while(len) {
1331 buffer_info = &tx_ring->buffer_info[i];
709cf018 1332 size = min(len, IXGB_MAX_DATA_PER_TXD);
5d927853
JB
1333
1334 /* Workaround for premature desc write-backs
1335 * in TSO mode. Append 4-byte sentinel desc */
1336 if (unlikely(mss && !nr_frags && size == len
1337 && size > 8))
1338 size -= 4;
1339
1da177e4
LT
1340 buffer_info->length = size;
1341 buffer_info->dma =
1342 pci_map_page(adapter->pdev,
1343 frag->page,
1344 frag->page_offset + offset,
1345 size,
1346 PCI_DMA_TODEVICE);
1347 buffer_info->time_stamp = jiffies;
1dfdd7df 1348 buffer_info->next_to_watch = 0;
1da177e4
LT
1349
1350 len -= size;
1351 offset += size;
1352 count++;
1353 if(++i == tx_ring->count) i = 0;
1354 }
1355 }
1356 i = (i == 0) ? tx_ring->count - 1 : i - 1;
1357 tx_ring->buffer_info[i].skb = skb;
1358 tx_ring->buffer_info[first].next_to_watch = i;
1359
1360 return count;
1361}
1362
235949d1 1363static void
1da177e4
LT
1364ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
1365{
1366 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1367 struct ixgb_tx_desc *tx_desc = NULL;
1368 struct ixgb_buffer *buffer_info;
1369 uint32_t cmd_type_len = adapter->tx_cmd_type;
1370 uint8_t status = 0;
1371 uint8_t popts = 0;
1372 unsigned int i;
1373
1374 if(tx_flags & IXGB_TX_FLAGS_TSO) {
1375 cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
1376 popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
1377 }
1378
1379 if(tx_flags & IXGB_TX_FLAGS_CSUM)
1380 popts |= IXGB_TX_DESC_POPTS_TXSM;
1381
1382 if(tx_flags & IXGB_TX_FLAGS_VLAN) {
1383 cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
1384 }
1385
1386 i = tx_ring->next_to_use;
1387
1388 while(count--) {
1389 buffer_info = &tx_ring->buffer_info[i];
1390 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1391 tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
1392 tx_desc->cmd_type_len =
1393 cpu_to_le32(cmd_type_len | buffer_info->length);
1394 tx_desc->status = status;
1395 tx_desc->popts = popts;
1396 tx_desc->vlan = cpu_to_le16(vlan_id);
1397
1398 if(++i == tx_ring->count) i = 0;
1399 }
1400
1401 tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
1402 | IXGB_TX_DESC_CMD_RS );
1403
1404 /* Force memory writes to complete before letting h/w
1405 * know there are new descriptors to fetch. (Only
1406 * applicable for weak-ordered memory model archs,
1407 * such as IA-64). */
1408 wmb();
1409
1410 tx_ring->next_to_use = i;
1411 IXGB_WRITE_REG(&adapter->hw, TDT, i);
1412}
1413
1414/* Tx Descriptors needed, worst case */
1415#define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
1416 (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
5d927853
JB
1417#define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) /* skb->date */ + \
1418 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1 /* for context */ \
1419 + 1 /* one more needed for sentinel TSO workaround */
1da177e4
LT
1420
1421static int
1422ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1423{
8908c6cd 1424 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1425 unsigned int first;
1426 unsigned int tx_flags = 0;
1427 unsigned long flags;
1428 int vlan_id = 0;
1429 int tso;
1430
1431 if(skb->len <= 0) {
1432 dev_kfree_skb_any(skb);
1433 return 0;
1434 }
1435
f017f14b
AK
1436#ifdef NETIF_F_LLTX
1437 local_irq_save(flags);
1438 if (!spin_trylock(&adapter->tx_lock)) {
1439 /* Collision - tell upper layer to requeue */
1440 local_irq_restore(flags);
1441 return NETDEV_TX_LOCKED;
1442 }
1443#else
1da177e4 1444 spin_lock_irqsave(&adapter->tx_lock, flags);
f017f14b
AK
1445#endif
1446
1da177e4
LT
1447 if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) {
1448 netif_stop_queue(netdev);
1449 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1450 return NETDEV_TX_BUSY;
1da177e4 1451 }
f017f14b
AK
1452
1453#ifndef NETIF_F_LLTX
1da177e4 1454 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1455#endif
1da177e4
LT
1456
1457 if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
1458 tx_flags |= IXGB_TX_FLAGS_VLAN;
1459 vlan_id = vlan_tx_tag_get(skb);
1460 }
1461
1462 first = adapter->tx_ring.next_to_use;
1463
1464 tso = ixgb_tso(adapter, skb);
1465 if (tso < 0) {
1466 dev_kfree_skb_any(skb);
f017f14b
AK
1467#ifdef NETIF_F_LLTX
1468 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1469#endif
1da177e4
LT
1470 return NETDEV_TX_OK;
1471 }
1472
96f9c2e2 1473 if (likely(tso))
1da177e4
LT
1474 tx_flags |= IXGB_TX_FLAGS_TSO;
1475 else if(ixgb_tx_csum(adapter, skb))
1476 tx_flags |= IXGB_TX_FLAGS_CSUM;
1477
1478 ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
1479 tx_flags);
1480
1481 netdev->trans_start = jiffies;
1482
f017f14b
AK
1483#ifdef NETIF_F_LLTX
1484 /* Make sure there is space in the ring for the next send. */
1485 if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED))
1486 netif_stop_queue(netdev);
1487
1488 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1489
1490#endif
1491 return NETDEV_TX_OK;
1da177e4
LT
1492}
1493
1494/**
1495 * ixgb_tx_timeout - Respond to a Tx Hang
1496 * @netdev: network interface device structure
1497 **/
1498
1499static void
1500ixgb_tx_timeout(struct net_device *netdev)
1501{
8908c6cd 1502 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1503
1504 /* Do the reset outside of interrupt context */
1505 schedule_work(&adapter->tx_timeout_task);
1506}
1507
1508static void
c4028958 1509ixgb_tx_timeout_task(struct work_struct *work)
1da177e4 1510{
c4028958
DH
1511 struct ixgb_adapter *adapter =
1512 container_of(work, struct ixgb_adapter, tx_timeout_task);
1da177e4 1513
9b8118df 1514 adapter->tx_timeout_count++;
1da177e4
LT
1515 ixgb_down(adapter, TRUE);
1516 ixgb_up(adapter);
1517}
1518
1519/**
1520 * ixgb_get_stats - Get System Network Statistics
1521 * @netdev: network interface device structure
1522 *
1523 * Returns the address of the device statistics structure.
1524 * The statistics are actually updated from the timer callback.
1525 **/
1526
1527static struct net_device_stats *
1528ixgb_get_stats(struct net_device *netdev)
1529{
8908c6cd 1530 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1531
1532 return &adapter->net_stats;
1533}
1534
1535/**
1536 * ixgb_change_mtu - Change the Maximum Transfer Unit
1537 * @netdev: network interface device structure
1538 * @new_mtu: new value for maximum frame size
1539 *
1540 * Returns 0 on success, negative on failure
1541 **/
1542
1543static int
1544ixgb_change_mtu(struct net_device *netdev, int new_mtu)
1545{
8908c6cd 1546 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1547 int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1548 int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1549
1550
1551 if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1552 || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
ec9c3f5d 1553 DPRINTK(PROBE, ERR, "Invalid MTU setting %d\n", new_mtu);
1da177e4
LT
1554 return -EINVAL;
1555 }
1556
3f3dc0dd 1557 adapter->rx_buffer_len = max_frame;
1da177e4
LT
1558
1559 netdev->mtu = new_mtu;
1560
3f3dc0dd 1561 if ((old_max_frame != max_frame) && netif_running(netdev)) {
1da177e4
LT
1562 ixgb_down(adapter, TRUE);
1563 ixgb_up(adapter);
1564 }
1565
1566 return 0;
1567}
1568
1569/**
1570 * ixgb_update_stats - Update the board statistics counters.
1571 * @adapter: board private structure
1572 **/
1573
1574void
1575ixgb_update_stats(struct ixgb_adapter *adapter)
1576{
5633684d 1577 struct net_device *netdev = adapter->netdev;
01748fbb
LV
1578 struct pci_dev *pdev = adapter->pdev;
1579
1580 /* Prevent stats update while adapter is being reset */
1581 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
1582 return;
5633684d
MC
1583
1584 if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
1585 (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
1586 u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
1587 u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
1588 u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
1589 u64 bcast = ((u64)bcast_h << 32) | bcast_l;
1590
1591 multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
1592 /* fix up multicast stats by removing broadcasts */
7b89178d
MC
1593 if(multi >= bcast)
1594 multi -= bcast;
5633684d
MC
1595
1596 adapter->stats.mprcl += (multi & 0xFFFFFFFF);
1597 adapter->stats.mprch += (multi >> 32);
1598 adapter->stats.bprcl += bcast_l;
1599 adapter->stats.bprch += bcast_h;
1600 } else {
1601 adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
1602 adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
1603 adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
1604 adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
1605 }
1da177e4
LT
1606 adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
1607 adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
1608 adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
1609 adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
1da177e4
LT
1610 adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
1611 adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
1612 adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
1613 adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
1614 adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
1615 adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
1616 adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
1617 adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
1618 adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
1619 adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
1620 adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
1621 adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
1622 adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
1623 adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
1624 adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
1625 adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
1626 adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
1627 adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
1628 adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
1629 adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
1630 adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
1631 adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
1632 adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
1633 adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
1634 adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
1635 adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
1636 adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
1637 adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
1638 adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
1639 adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
1640 adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
1641 adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
1642 adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
1643 adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
1644 adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
1645 adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
1646 adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
1647 adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
1648 adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
1649 adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
1650 adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
1651 adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
1652 adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
1653 adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
1654 adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
1655 adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
1656 adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
1657 adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
1658 adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
1659 adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
1660 adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
1661 adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
1662
1663 /* Fill out the OS statistics structure */
1664
1665 adapter->net_stats.rx_packets = adapter->stats.gprcl;
1666 adapter->net_stats.tx_packets = adapter->stats.gptcl;
1667 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
1668 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
1669 adapter->net_stats.multicast = adapter->stats.mprcl;
1670 adapter->net_stats.collisions = 0;
1671
1672 /* ignore RLEC as it reports errors for padded (<64bytes) frames
1673 * with a length in the type/len field */
1674 adapter->net_stats.rx_errors =
1675 /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
1676 adapter->stats.ruc +
1677 adapter->stats.roc /*+ adapter->stats.rlec */ +
1678 adapter->stats.icbc +
1679 adapter->stats.ecbc + adapter->stats.mpc;
1680
1da177e4
LT
1681 /* see above
1682 * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
1683 */
1684
1685 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
1686 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
1687 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
1688 adapter->net_stats.rx_over_errors = adapter->stats.mpc;
1689
1690 adapter->net_stats.tx_errors = 0;
1691 adapter->net_stats.rx_frame_errors = 0;
1692 adapter->net_stats.tx_aborted_errors = 0;
1693 adapter->net_stats.tx_carrier_errors = 0;
1694 adapter->net_stats.tx_fifo_errors = 0;
1695 adapter->net_stats.tx_heartbeat_errors = 0;
1696 adapter->net_stats.tx_window_errors = 0;
1697}
1698
1699#define IXGB_MAX_INTR 10
1700/**
1701 * ixgb_intr - Interrupt Handler
1702 * @irq: interrupt number
1703 * @data: pointer to a network interface device structure
1da177e4
LT
1704 **/
1705
1706static irqreturn_t
7d12e780 1707ixgb_intr(int irq, void *data)
1da177e4
LT
1708{
1709 struct net_device *netdev = data;
8908c6cd 1710 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1711 struct ixgb_hw *hw = &adapter->hw;
1712 uint32_t icr = IXGB_READ_REG(hw, ICR);
1713#ifndef CONFIG_IXGB_NAPI
1714 unsigned int i;
1715#endif
1716
1717 if(unlikely(!icr))
1718 return IRQ_NONE; /* Not our interrupt */
1719
1720 if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
1721 mod_timer(&adapter->watchdog_timer, jiffies);
1722 }
1723
1724#ifdef CONFIG_IXGB_NAPI
1725 if(netif_rx_schedule_prep(netdev)) {
1726
1727 /* Disable interrupts and register for poll. The flush
1728 of the posted write is intentionally left out.
1729 */
1730
1731 atomic_inc(&adapter->irq_sem);
1732 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
1733 __netif_rx_schedule(netdev);
1734 }
1735#else
1736 /* yes, that is actually a & and it is meant to make sure that
1737 * every pass through this for loop checks both receive and
1738 * transmit queues for completed descriptors, intended to
1739 * avoid starvation issues and assist tx/rx fairness. */
1740 for(i = 0; i < IXGB_MAX_INTR; i++)
1741 if(!ixgb_clean_rx_irq(adapter) &
1742 !ixgb_clean_tx_irq(adapter))
1743 break;
1744#endif
1745 return IRQ_HANDLED;
1746}
1747
1748#ifdef CONFIG_IXGB_NAPI
1749/**
1750 * ixgb_clean - NAPI Rx polling callback
1751 * @adapter: board private structure
1752 **/
1753
1754static int
1755ixgb_clean(struct net_device *netdev, int *budget)
1756{
8908c6cd 1757 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1758 int work_to_do = min(*budget, netdev->quota);
1759 int tx_cleaned;
1760 int work_done = 0;
1761
1762 tx_cleaned = ixgb_clean_tx_irq(adapter);
1763 ixgb_clean_rx_irq(adapter, &work_done, work_to_do);
1764
1765 *budget -= work_done;
1766 netdev->quota -= work_done;
1767
1768 /* if no Tx and not enough Rx work done, exit the polling mode */
1769 if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
1770 netif_rx_complete(netdev);
1771 ixgb_irq_enable(adapter);
1772 return 0;
1773 }
1774
1775 return 1;
1776}
1777#endif
1778
1779/**
1780 * ixgb_clean_tx_irq - Reclaim resources after transmit completes
1781 * @adapter: board private structure
1782 **/
1783
1784static boolean_t
1785ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
1786{
1787 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1788 struct net_device *netdev = adapter->netdev;
1789 struct ixgb_tx_desc *tx_desc, *eop_desc;
1790 struct ixgb_buffer *buffer_info;
1791 unsigned int i, eop;
1792 boolean_t cleaned = FALSE;
1793
1794 i = tx_ring->next_to_clean;
1795 eop = tx_ring->buffer_info[i].next_to_watch;
1796 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1797
1798 while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
1799
1800 for(cleaned = FALSE; !cleaned; ) {
1801 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1802 buffer_info = &tx_ring->buffer_info[i];
1803
1804 if (tx_desc->popts
1805 & (IXGB_TX_DESC_POPTS_TXSM |
1806 IXGB_TX_DESC_POPTS_IXSM))
1807 adapter->hw_csum_tx_good++;
1808
1809 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
1810
1811 *(uint32_t *)&(tx_desc->status) = 0;
1812
1813 cleaned = (i == eop);
1814 if(++i == tx_ring->count) i = 0;
1815 }
1816
1817 eop = tx_ring->buffer_info[i].next_to_watch;
1818 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1819 }
1820
1821 tx_ring->next_to_clean = i;
1822
3352a3b2
AK
1823 if (unlikely(netif_queue_stopped(netdev))) {
1824 spin_lock(&adapter->tx_lock);
1825 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
ab8ced2f 1826 (IXGB_DESC_UNUSED(tx_ring) >= DESC_NEEDED))
3352a3b2
AK
1827 netif_wake_queue(netdev);
1828 spin_unlock(&adapter->tx_lock);
1da177e4 1829 }
1da177e4
LT
1830
1831 if(adapter->detect_tx_hung) {
1832 /* detect a transmit hang in hardware, this serializes the
1833 * check with the clearing of time_stamp and movement of i */
1834 adapter->detect_tx_hung = FALSE;
9b8118df
AK
1835 if (tx_ring->buffer_info[eop].dma &&
1836 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + HZ)
1da177e4 1837 && !(IXGB_READ_REG(&adapter->hw, STATUS) &
9b8118df
AK
1838 IXGB_STATUS_TXOFF)) {
1839 /* detected Tx unit hang */
1840 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
1841 " TDH <%x>\n"
1842 " TDT <%x>\n"
1843 " next_to_use <%x>\n"
1844 " next_to_clean <%x>\n"
1845 "buffer_info[next_to_clean]\n"
1846 " time_stamp <%lx>\n"
1847 " next_to_watch <%x>\n"
1848 " jiffies <%lx>\n"
1849 " next_to_watch.status <%x>\n",
1850 IXGB_READ_REG(&adapter->hw, TDH),
1851 IXGB_READ_REG(&adapter->hw, TDT),
1852 tx_ring->next_to_use,
1853 tx_ring->next_to_clean,
1854 tx_ring->buffer_info[eop].time_stamp,
1855 eop,
1856 jiffies,
1857 eop_desc->status);
1da177e4 1858 netif_stop_queue(netdev);
9b8118df 1859 }
1da177e4
LT
1860 }
1861
1862 return cleaned;
1863}
1864
1865/**
1866 * ixgb_rx_checksum - Receive Checksum Offload for 82597.
1867 * @adapter: board private structure
1868 * @rx_desc: receive descriptor
1869 * @sk_buff: socket buffer with received data
1870 **/
1871
235949d1 1872static void
1da177e4
LT
1873ixgb_rx_checksum(struct ixgb_adapter *adapter,
1874 struct ixgb_rx_desc *rx_desc,
1875 struct sk_buff *skb)
1876{
1877 /* Ignore Checksum bit is set OR
1878 * TCP Checksum has not been calculated
1879 */
1880 if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
1881 (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
1882 skb->ip_summed = CHECKSUM_NONE;
1883 return;
1884 }
1885
1886 /* At this point we know the hardware did the TCP checksum */
1887 /* now look at the TCP checksum error bit */
1888 if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
1889 /* let the stack verify checksum errors */
1890 skb->ip_summed = CHECKSUM_NONE;
1891 adapter->hw_csum_rx_error++;
1892 } else {
1893 /* TCP checksum is good */
1894 skb->ip_summed = CHECKSUM_UNNECESSARY;
1895 adapter->hw_csum_rx_good++;
1896 }
1897}
1898
1899/**
1900 * ixgb_clean_rx_irq - Send received data up the network stack,
1901 * @adapter: board private structure
1902 **/
1903
1904static boolean_t
1905#ifdef CONFIG_IXGB_NAPI
1906ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
1907#else
1908ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
1909#endif
1910{
1911 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1912 struct net_device *netdev = adapter->netdev;
1913 struct pci_dev *pdev = adapter->pdev;
1914 struct ixgb_rx_desc *rx_desc, *next_rxd;
1915 struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
1da177e4
LT
1916 uint32_t length;
1917 unsigned int i, j;
1918 boolean_t cleaned = FALSE;
1919
1920 i = rx_ring->next_to_clean;
1921 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1922 buffer_info = &rx_ring->buffer_info[i];
1923
1924 while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
f404de1c
MC
1925 struct sk_buff *skb, *next_skb;
1926 u8 status;
1da177e4
LT
1927
1928#ifdef CONFIG_IXGB_NAPI
1929 if(*work_done >= work_to_do)
1930 break;
1931
1932 (*work_done)++;
1933#endif
f404de1c 1934 status = rx_desc->status;
1da177e4 1935 skb = buffer_info->skb;
1dfdd7df 1936 buffer_info->skb = NULL;
f404de1c 1937
1da177e4
LT
1938 prefetch(skb->data);
1939
1940 if(++i == rx_ring->count) i = 0;
1941 next_rxd = IXGB_RX_DESC(*rx_ring, i);
1942 prefetch(next_rxd);
1943
1944 if((j = i + 1) == rx_ring->count) j = 0;
1945 next2_buffer = &rx_ring->buffer_info[j];
1946 prefetch(next2_buffer);
1947
1948 next_buffer = &rx_ring->buffer_info[i];
1949 next_skb = next_buffer->skb;
1950 prefetch(next_skb);
1951
1da177e4
LT
1952 cleaned = TRUE;
1953
1954 pci_unmap_single(pdev,
1955 buffer_info->dma,
1956 buffer_info->length,
1957 PCI_DMA_FROMDEVICE);
1958
1959 length = le16_to_cpu(rx_desc->length);
1960
f404de1c 1961 if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
1da177e4
LT
1962
1963 /* All receives must fit into a single buffer */
1964
1965 IXGB_DBG("Receive packet consumed multiple buffers "
1966 "length<%x>\n", length);
1967
1968 dev_kfree_skb_irq(skb);
f404de1c 1969 goto rxdesc_done;
1da177e4
LT
1970 }
1971
1972 if (unlikely(rx_desc->errors
1973 & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
1974 | IXGB_RX_DESC_ERRORS_P |
1975 IXGB_RX_DESC_ERRORS_RXE))) {
1976
1977 dev_kfree_skb_irq(skb);
f404de1c 1978 goto rxdesc_done;
1da177e4
LT
1979 }
1980
6b900bb4
AK
1981 /* code added for copybreak, this should improve
1982 * performance for small packets with large amounts
1983 * of reassembly being done in the stack */
1984#define IXGB_CB_LENGTH 256
1985 if (length < IXGB_CB_LENGTH) {
1986 struct sk_buff *new_skb =
5791704f 1987 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
6b900bb4
AK
1988 if (new_skb) {
1989 skb_reserve(new_skb, NET_IP_ALIGN);
6b900bb4
AK
1990 memcpy(new_skb->data - NET_IP_ALIGN,
1991 skb->data - NET_IP_ALIGN,
1992 length + NET_IP_ALIGN);
1993 /* save the skb in buffer_info as good */
1994 buffer_info->skb = skb;
1995 skb = new_skb;
1996 }
1997 }
1998 /* end copybreak code */
1999
1da177e4
LT
2000 /* Good Receive */
2001 skb_put(skb, length);
2002
2003 /* Receive Checksum Offload */
2004 ixgb_rx_checksum(adapter, rx_desc, skb);
2005
2006 skb->protocol = eth_type_trans(skb, netdev);
2007#ifdef CONFIG_IXGB_NAPI
f404de1c 2008 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT
2009 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2010 le16_to_cpu(rx_desc->special) &
2011 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
2012 } else {
2013 netif_receive_skb(skb);
2014 }
2015#else /* CONFIG_IXGB_NAPI */
f404de1c 2016 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT
2017 vlan_hwaccel_rx(skb, adapter->vlgrp,
2018 le16_to_cpu(rx_desc->special) &
2019 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
2020 } else {
2021 netif_rx(skb);
2022 }
2023#endif /* CONFIG_IXGB_NAPI */
2024 netdev->last_rx = jiffies;
2025
f404de1c
MC
2026rxdesc_done:
2027 /* clean up descriptor, might be written over by hw */
1da177e4 2028 rx_desc->status = 0;
1da177e4 2029
f404de1c 2030 /* use prefetched values */
1da177e4
LT
2031 rx_desc = next_rxd;
2032 buffer_info = next_buffer;
2033 }
2034
2035 rx_ring->next_to_clean = i;
2036
2037 ixgb_alloc_rx_buffers(adapter);
2038
2039 return cleaned;
2040}
2041
2042/**
2043 * ixgb_alloc_rx_buffers - Replace used receive buffers
2044 * @adapter: address of board private structure
2045 **/
2046
2047static void
2048ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
2049{
2050 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
2051 struct net_device *netdev = adapter->netdev;
2052 struct pci_dev *pdev = adapter->pdev;
2053 struct ixgb_rx_desc *rx_desc;
2054 struct ixgb_buffer *buffer_info;
2055 struct sk_buff *skb;
2056 unsigned int i;
2057 int num_group_tail_writes;
2058 long cleancount;
2059
2060 i = rx_ring->next_to_use;
2061 buffer_info = &rx_ring->buffer_info[i];
2062 cleancount = IXGB_DESC_UNUSED(rx_ring);
2063
2064 num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
2065
41639fed
MC
2066 /* leave three descriptors unused */
2067 while(--cleancount > 2) {
1dfdd7df 2068 /* recycle! its good for you */
69c7a940
AK
2069 skb = buffer_info->skb;
2070 if (skb) {
1dfdd7df
AK
2071 skb_trim(skb, 0);
2072 goto map_skb;
2073 }
1da177e4 2074
69c7a940
AK
2075 skb = netdev_alloc_skb(netdev, adapter->rx_buffer_len
2076 + NET_IP_ALIGN);
1dfdd7df 2077 if (unlikely(!skb)) {
1da177e4 2078 /* Better luck next round */
1dfdd7df 2079 adapter->alloc_rx_buff_failed++;
1da177e4
LT
2080 break;
2081 }
2082
2083 /* Make buffer alignment 2 beyond a 16 byte boundary
2084 * this will result in a 16 byte aligned IP header after
2085 * the 14 byte MAC header is removed
2086 */
2087 skb_reserve(skb, NET_IP_ALIGN);
2088
1da177e4
LT
2089 buffer_info->skb = skb;
2090 buffer_info->length = adapter->rx_buffer_len;
1dfdd7df
AK
2091map_skb:
2092 buffer_info->dma = pci_map_single(pdev,
2093 skb->data,
2094 adapter->rx_buffer_len,
2095 PCI_DMA_FROMDEVICE);
1da177e4 2096
1dfdd7df 2097 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1da177e4 2098 rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
41639fed
MC
2099 /* guarantee DD bit not set now before h/w gets descriptor
2100 * this is the rest of the workaround for h/w double
2101 * writeback. */
2102 rx_desc->status = 0;
1da177e4 2103
1da177e4
LT
2104
2105 if(++i == rx_ring->count) i = 0;
2106 buffer_info = &rx_ring->buffer_info[i];
2107 }
2108
1dfdd7df
AK
2109 if (likely(rx_ring->next_to_use != i)) {
2110 rx_ring->next_to_use = i;
2111 if (unlikely(i-- == 0))
2112 i = (rx_ring->count - 1);
2113
2114 /* Force memory writes to complete before letting h/w
2115 * know there are new descriptors to fetch. (Only
2116 * applicable for weak-ordered memory model archs, such
2117 * as IA-64). */
2118 wmb();
2119 IXGB_WRITE_REG(&adapter->hw, RDT, i);
2120 }
1da177e4
LT
2121}
2122
2123/**
2124 * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
2125 *
2126 * @param netdev network interface device structure
2127 * @param grp indicates to enable or disable tagging/stripping
2128 **/
2129static void
2130ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2131{
8908c6cd 2132 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
2133 uint32_t ctrl, rctl;
2134
2135 ixgb_irq_disable(adapter);
2136 adapter->vlgrp = grp;
2137
2138 if(grp) {
2139 /* enable VLAN tag insert/strip */
2140 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2141 ctrl |= IXGB_CTRL0_VME;
2142 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2143
2144 /* enable VLAN receive filtering */
2145
2146 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2147 rctl |= IXGB_RCTL_VFE;
2148 rctl &= ~IXGB_RCTL_CFIEN;
2149 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2150 } else {
2151 /* disable VLAN tag insert/strip */
2152
2153 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2154 ctrl &= ~IXGB_CTRL0_VME;
2155 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2156
2157 /* disable VLAN filtering */
2158
2159 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2160 rctl &= ~IXGB_RCTL_VFE;
2161 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2162 }
2163
2164 ixgb_irq_enable(adapter);
2165}
2166
2167static void
2168ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
2169{
8908c6cd 2170 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
2171 uint32_t vfta, index;
2172
2173 /* add VID to filter table */
2174
2175 index = (vid >> 5) & 0x7F;
2176 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2177 vfta |= (1 << (vid & 0x1F));
2178 ixgb_write_vfta(&adapter->hw, index, vfta);
2179}
2180
2181static void
2182ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
2183{
8908c6cd 2184 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
2185 uint32_t vfta, index;
2186
2187 ixgb_irq_disable(adapter);
2188
2189 if(adapter->vlgrp)
2190 adapter->vlgrp->vlan_devices[vid] = NULL;
2191
2192 ixgb_irq_enable(adapter);
2193
2194 /* remove VID from filter table*/
2195
2196 index = (vid >> 5) & 0x7F;
2197 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2198 vfta &= ~(1 << (vid & 0x1F));
2199 ixgb_write_vfta(&adapter->hw, index, vfta);
2200}
2201
2202static void
2203ixgb_restore_vlan(struct ixgb_adapter *adapter)
2204{
2205 ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2206
2207 if(adapter->vlgrp) {
2208 uint16_t vid;
2209 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2210 if(!adapter->vlgrp->vlan_devices[vid])
2211 continue;
2212 ixgb_vlan_rx_add_vid(adapter->netdev, vid);
2213 }
2214 }
2215}
2216
1da177e4
LT
2217#ifdef CONFIG_NET_POLL_CONTROLLER
2218/*
2219 * Polling 'interrupt' - used by things like netconsole to send skbs
2220 * without having to re-enable interrupts. It's not called while
2221 * the interrupt routine is executing.
2222 */
2223
2224static void ixgb_netpoll(struct net_device *dev)
2225{
f990b426 2226 struct ixgb_adapter *adapter = netdev_priv(dev);
ac79c82e 2227
1da177e4 2228 disable_irq(adapter->pdev->irq);
7d12e780 2229 ixgb_intr(adapter->pdev->irq, dev);
1da177e4
LT
2230 enable_irq(adapter->pdev->irq);
2231}
2232#endif
2233
01748fbb
LV
2234/**
2235 * ixgb_io_error_detected() - called when PCI error is detected
2236 * @pdev pointer to pci device with error
2237 * @state pci channel state after error
2238 *
2239 * This callback is called by the PCI subsystem whenever
2240 * a PCI bus error is detected.
2241 */
2242static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
2243 enum pci_channel_state state)
2244{
2245 struct net_device *netdev = pci_get_drvdata(pdev);
f7d4fa01 2246 struct ixgb_adapter *adapter = netdev_priv(netdev);
01748fbb
LV
2247
2248 if(netif_running(netdev))
2249 ixgb_down(adapter, TRUE);
2250
2251 pci_disable_device(pdev);
2252
2253 /* Request a slot reset. */
2254 return PCI_ERS_RESULT_NEED_RESET;
2255}
2256
2257/**
2258 * ixgb_io_slot_reset - called after the pci bus has been reset.
2259 * @pdev pointer to pci device with error
2260 *
2261 * This callback is called after the PCI buss has been reset.
2262 * Basically, this tries to restart the card from scratch.
2263 * This is a shortened version of the device probe/discovery code,
2264 * it resembles the first-half of the ixgb_probe() routine.
2265 */
2266static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev)
2267{
2268 struct net_device *netdev = pci_get_drvdata(pdev);
f7d4fa01 2269 struct ixgb_adapter *adapter = netdev_priv(netdev);
01748fbb
LV
2270
2271 if(pci_enable_device(pdev)) {
2272 DPRINTK(PROBE, ERR, "Cannot re-enable PCI device after reset.\n");
2273 return PCI_ERS_RESULT_DISCONNECT;
2274 }
2275
2276 /* Perform card reset only on one instance of the card */
2277 if (0 != PCI_FUNC (pdev->devfn))
2278 return PCI_ERS_RESULT_RECOVERED;
2279
2280 pci_set_master(pdev);
2281
2282 netif_carrier_off(netdev);
2283 netif_stop_queue(netdev);
2284 ixgb_reset(adapter);
2285
2286 /* Make sure the EEPROM is good */
2287 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
2288 DPRINTK(PROBE, ERR, "After reset, the EEPROM checksum is not valid.\n");
2289 return PCI_ERS_RESULT_DISCONNECT;
2290 }
2291 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
2292 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
2293
2294 if(!is_valid_ether_addr(netdev->perm_addr)) {
2295 DPRINTK(PROBE, ERR, "After reset, invalid MAC address.\n");
2296 return PCI_ERS_RESULT_DISCONNECT;
2297 }
2298
2299 return PCI_ERS_RESULT_RECOVERED;
2300}
2301
2302/**
2303 * ixgb_io_resume - called when its OK to resume normal operations
2304 * @pdev pointer to pci device with error
2305 *
2306 * The error recovery driver tells us that its OK to resume
2307 * normal operation. Implementation resembles the second-half
2308 * of the ixgb_probe() routine.
2309 */
2310static void ixgb_io_resume (struct pci_dev *pdev)
2311{
2312 struct net_device *netdev = pci_get_drvdata(pdev);
f7d4fa01 2313 struct ixgb_adapter *adapter = netdev_priv(netdev);
01748fbb
LV
2314
2315 pci_set_master(pdev);
2316
2317 if(netif_running(netdev)) {
2318 if(ixgb_up(adapter)) {
2319 printk ("ixgb: can't bring device back up after reset\n");
2320 return;
2321 }
2322 }
2323
2324 netif_device_attach(netdev);
2325 mod_timer(&adapter->watchdog_timer, jiffies);
2326}
2327
1da177e4 2328/* ixgb_main.c */