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ixgb: combine more rx descriptors to improve performance
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CommitLineData
1da177e4
LT
1/*******************************************************************************
2
0abb6eb1
AK
3 Intel PRO/10GbE Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
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AK
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
0abb6eb1 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgb.h"
30
1da177e4 31char ixgb_driver_name[] = "ixgb";
e9ab1d14 32static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
1da177e4
LT
33
34#ifndef CONFIG_IXGB_NAPI
35#define DRIVERNAPI
36#else
37#define DRIVERNAPI "-NAPI"
38#endif
9ee093f6 39#define DRV_VERSION "1.0.112-k2"DRIVERNAPI
01e5abc2 40char ixgb_driver_version[] = DRV_VERSION;
d3f464b5 41static char ixgb_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT
42
43/* ixgb_pci_tbl - PCI Device ID Table
44 *
45 * Wildcard entries (PCI_ANY_ID) should come last
46 * Last entry must be all 0s
47 *
48 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
49 * Class, Class Mask, private data (not used) }
50 */
51static struct pci_device_id ixgb_pci_tbl[] = {
52 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
53 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
940829e2
AK
54 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_CX4,
55 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1da177e4
LT
56 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
57 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
58 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
59 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
60
61 /* required last entry */
62 {0,}
63};
64
65MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
66
67/* Local Function Prototypes */
68
69int ixgb_up(struct ixgb_adapter *adapter);
70void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
71void ixgb_reset(struct ixgb_adapter *adapter);
72int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
73int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
74void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
75void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
76void ixgb_update_stats(struct ixgb_adapter *adapter);
77
78static int ixgb_init_module(void);
79static void ixgb_exit_module(void);
80static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
81static void __devexit ixgb_remove(struct pci_dev *pdev);
82static int ixgb_sw_init(struct ixgb_adapter *adapter);
83static int ixgb_open(struct net_device *netdev);
84static int ixgb_close(struct net_device *netdev);
85static void ixgb_configure_tx(struct ixgb_adapter *adapter);
86static void ixgb_configure_rx(struct ixgb_adapter *adapter);
87static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
88static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
89static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
90static void ixgb_set_multi(struct net_device *netdev);
91static void ixgb_watchdog(unsigned long data);
92static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
93static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
94static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
95static int ixgb_set_mac(struct net_device *netdev, void *p);
96static irqreturn_t ixgb_intr(int irq, void *data, struct pt_regs *regs);
97static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
ac79c82e 98
1da177e4
LT
99#ifdef CONFIG_IXGB_NAPI
100static int ixgb_clean(struct net_device *netdev, int *budget);
101static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
102 int *work_done, int work_to_do);
103#else
104static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
105#endif
106static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
107void ixgb_set_ethtool_ops(struct net_device *netdev);
108static void ixgb_tx_timeout(struct net_device *dev);
109static void ixgb_tx_timeout_task(struct net_device *dev);
110static void ixgb_vlan_rx_register(struct net_device *netdev,
111 struct vlan_group *grp);
112static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
113static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
114static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
115
1da177e4
LT
116#ifdef CONFIG_NET_POLL_CONTROLLER
117/* for netdump / net console */
118static void ixgb_netpoll(struct net_device *dev);
119#endif
120
01748fbb
LV
121static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
122 enum pci_channel_state state);
123static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev);
124static void ixgb_io_resume (struct pci_dev *pdev);
1da177e4 125
01748fbb 126/* Exported from other modules */
1da177e4
LT
127extern void ixgb_check_options(struct ixgb_adapter *adapter);
128
01748fbb
LV
129static struct pci_error_handlers ixgb_err_handler = {
130 .error_detected = ixgb_io_error_detected,
131 .slot_reset = ixgb_io_slot_reset,
132 .resume = ixgb_io_resume,
133};
134
1da177e4 135static struct pci_driver ixgb_driver = {
c2eba932 136 .name = ixgb_driver_name,
1da177e4 137 .id_table = ixgb_pci_tbl,
c2eba932
MC
138 .probe = ixgb_probe,
139 .remove = __devexit_p(ixgb_remove),
01748fbb 140 .err_handler = &ixgb_err_handler
1da177e4
LT
141};
142
143MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
144MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
145MODULE_LICENSE("GPL");
01e5abc2 146MODULE_VERSION(DRV_VERSION);
1da177e4 147
ec9c3f5d
AK
148#define DEFAULT_DEBUG_LEVEL_SHIFT 3
149static int debug = DEFAULT_DEBUG_LEVEL_SHIFT;
150module_param(debug, int, 0);
151MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
152
1da177e4 153/* some defines for controlling descriptor fetches in h/w */
3ae84d92
JB
154#define RXDCTL_WTHRESH_DEFAULT 15 /* chip writes back at this many or RXT0 */
155#define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
156 * this */
157#define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
158 * is pushed this many descriptors
159 * from head */
1da177e4
LT
160
161/**
162 * ixgb_init_module - Driver Registration Routine
163 *
164 * ixgb_init_module is the first routine called when the driver is
165 * loaded. All it does is register with the PCI subsystem.
166 **/
167
168static int __init
169ixgb_init_module(void)
170{
1da177e4
LT
171 printk(KERN_INFO "%s - version %s\n",
172 ixgb_driver_string, ixgb_driver_version);
173
174 printk(KERN_INFO "%s\n", ixgb_copyright);
175
29917620 176 return pci_register_driver(&ixgb_driver);
1da177e4
LT
177}
178
179module_init(ixgb_init_module);
180
181/**
182 * ixgb_exit_module - Driver Exit Cleanup Routine
183 *
184 * ixgb_exit_module is called just before the driver is removed
185 * from memory.
186 **/
187
188static void __exit
189ixgb_exit_module(void)
190{
1da177e4
LT
191 pci_unregister_driver(&ixgb_driver);
192}
193
194module_exit(ixgb_exit_module);
195
196/**
197 * ixgb_irq_disable - Mask off interrupt generation on the NIC
198 * @adapter: board private structure
199 **/
200
235949d1 201static void
1da177e4
LT
202ixgb_irq_disable(struct ixgb_adapter *adapter)
203{
204 atomic_inc(&adapter->irq_sem);
205 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
206 IXGB_WRITE_FLUSH(&adapter->hw);
207 synchronize_irq(adapter->pdev->irq);
208}
209
210/**
211 * ixgb_irq_enable - Enable default interrupt generation settings
212 * @adapter: board private structure
213 **/
214
235949d1 215static void
1da177e4
LT
216ixgb_irq_enable(struct ixgb_adapter *adapter)
217{
218 if(atomic_dec_and_test(&adapter->irq_sem)) {
219 IXGB_WRITE_REG(&adapter->hw, IMS,
6dfbb6dd
MC
220 IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
221 IXGB_INT_LSC);
1da177e4
LT
222 IXGB_WRITE_FLUSH(&adapter->hw);
223 }
224}
225
226int
227ixgb_up(struct ixgb_adapter *adapter)
228{
229 struct net_device *netdev = adapter->netdev;
230 int err;
231 int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
232 struct ixgb_hw *hw = &adapter->hw;
233
234 /* hardware has been reset, we need to reload some things */
235
8556f0d1 236 ixgb_rar_set(hw, netdev->dev_addr, 0);
1da177e4
LT
237 ixgb_set_multi(netdev);
238
239 ixgb_restore_vlan(adapter);
240
241 ixgb_configure_tx(adapter);
242 ixgb_setup_rctl(adapter);
243 ixgb_configure_rx(adapter);
244 ixgb_alloc_rx_buffers(adapter);
245
e59d1696
AK
246 /* disable interrupts and get the hardware into a known state */
247 IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
248
1da177e4
LT
249#ifdef CONFIG_PCI_MSI
250 {
251 boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) &
252 IXGB_STATUS_PCIX_MODE) ? TRUE : FALSE;
253 adapter->have_msi = TRUE;
254
255 if (!pcix)
256 adapter->have_msi = FALSE;
257 else if((err = pci_enable_msi(adapter->pdev))) {
ec9c3f5d 258 DPRINTK(PROBE, ERR,
1da177e4
LT
259 "Unable to allocate MSI interrupt Error: %d\n", err);
260 adapter->have_msi = FALSE;
261 /* proceed to try to request regular interrupt */
262 }
263 }
264
265#endif
266 if((err = request_irq(adapter->pdev->irq, &ixgb_intr,
1fb9df5d 267 IRQF_SHARED | IRQF_SAMPLE_RANDOM,
ec9c3f5d
AK
268 netdev->name, netdev))) {
269 DPRINTK(PROBE, ERR,
270 "Unable to allocate interrupt Error: %d\n", err);
1da177e4 271 return err;
ec9c3f5d 272 }
1da177e4 273
1da177e4
LT
274 if((hw->max_frame_size != max_frame) ||
275 (hw->max_frame_size !=
276 (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
277
278 hw->max_frame_size = max_frame;
279
280 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
281
282 if(hw->max_frame_size >
283 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
284 uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
285
286 if(!(ctrl0 & IXGB_CTRL0_JFE)) {
287 ctrl0 |= IXGB_CTRL0_JFE;
288 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
289 }
290 }
291 }
292
293 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT
294
295#ifdef CONFIG_IXGB_NAPI
296 netif_poll_enable(netdev);
297#endif
e59d1696
AK
298 ixgb_irq_enable(adapter);
299
1da177e4
LT
300 return 0;
301}
302
303void
304ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
305{
306 struct net_device *netdev = adapter->netdev;
307
308 ixgb_irq_disable(adapter);
309 free_irq(adapter->pdev->irq, netdev);
310#ifdef CONFIG_PCI_MSI
311 if(adapter->have_msi == TRUE)
312 pci_disable_msi(adapter->pdev);
313
314#endif
315 if(kill_watchdog)
316 del_timer_sync(&adapter->watchdog_timer);
317#ifdef CONFIG_IXGB_NAPI
318 netif_poll_disable(netdev);
319#endif
320 adapter->link_speed = 0;
321 adapter->link_duplex = 0;
322 netif_carrier_off(netdev);
323 netif_stop_queue(netdev);
324
325 ixgb_reset(adapter);
326 ixgb_clean_tx_ring(adapter);
327 ixgb_clean_rx_ring(adapter);
328}
329
330void
331ixgb_reset(struct ixgb_adapter *adapter)
332{
333
334 ixgb_adapter_stop(&adapter->hw);
335 if(!ixgb_init_hw(&adapter->hw))
ec9c3f5d 336 DPRINTK(PROBE, ERR, "ixgb_init_hw failed.\n");
1da177e4
LT
337}
338
339/**
340 * ixgb_probe - Device Initialization Routine
341 * @pdev: PCI device information struct
342 * @ent: entry in ixgb_pci_tbl
343 *
344 * Returns 0 on success, negative on failure
345 *
346 * ixgb_probe initializes an adapter identified by a pci_dev structure.
347 * The OS initialization, configuring of the adapter private structure,
348 * and a hardware reset occur.
349 **/
350
351static int __devinit
352ixgb_probe(struct pci_dev *pdev,
353 const struct pci_device_id *ent)
354{
355 struct net_device *netdev = NULL;
356 struct ixgb_adapter *adapter;
357 static int cards_found = 0;
358 unsigned long mmio_start;
359 int mmio_len;
360 int pci_using_dac;
361 int i;
362 int err;
363
364 if((err = pci_enable_device(pdev)))
365 return err;
366
c91e468a
AS
367 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
368 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT
369 pci_using_dac = 1;
370 } else {
c91e468a
AS
371 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) ||
372 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
ec9c3f5d
AK
373 printk(KERN_ERR
374 "ixgb: No usable DMA configuration, aborting\n");
c91e468a 375 goto err_dma_mask;
1da177e4
LT
376 }
377 pci_using_dac = 0;
378 }
379
380 if((err = pci_request_regions(pdev, ixgb_driver_name)))
c91e468a 381 goto err_request_regions;
1da177e4
LT
382
383 pci_set_master(pdev);
384
385 netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
386 if(!netdev) {
387 err = -ENOMEM;
388 goto err_alloc_etherdev;
389 }
390
391 SET_MODULE_OWNER(netdev);
392 SET_NETDEV_DEV(netdev, &pdev->dev);
393
394 pci_set_drvdata(pdev, netdev);
8908c6cd 395 adapter = netdev_priv(netdev);
1da177e4
LT
396 adapter->netdev = netdev;
397 adapter->pdev = pdev;
398 adapter->hw.back = adapter;
ec9c3f5d 399 adapter->msg_enable = netif_msg_init(debug, DEFAULT_DEBUG_LEVEL_SHIFT);
1da177e4
LT
400
401 mmio_start = pci_resource_start(pdev, BAR_0);
402 mmio_len = pci_resource_len(pdev, BAR_0);
403
404 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
405 if(!adapter->hw.hw_addr) {
406 err = -EIO;
407 goto err_ioremap;
408 }
409
410 for(i = BAR_1; i <= BAR_5; i++) {
411 if(pci_resource_len(pdev, i) == 0)
412 continue;
413 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
414 adapter->hw.io_base = pci_resource_start(pdev, i);
415 break;
416 }
417 }
418
419 netdev->open = &ixgb_open;
420 netdev->stop = &ixgb_close;
421 netdev->hard_start_xmit = &ixgb_xmit_frame;
422 netdev->get_stats = &ixgb_get_stats;
423 netdev->set_multicast_list = &ixgb_set_multi;
424 netdev->set_mac_address = &ixgb_set_mac;
425 netdev->change_mtu = &ixgb_change_mtu;
426 ixgb_set_ethtool_ops(netdev);
427 netdev->tx_timeout = &ixgb_tx_timeout;
9b8118df 428 netdev->watchdog_timeo = 5 * HZ;
1da177e4
LT
429#ifdef CONFIG_IXGB_NAPI
430 netdev->poll = &ixgb_clean;
431 netdev->weight = 64;
432#endif
433 netdev->vlan_rx_register = ixgb_vlan_rx_register;
434 netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
435 netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
436#ifdef CONFIG_NET_POLL_CONTROLLER
437 netdev->poll_controller = ixgb_netpoll;
438#endif
439
0eb5a34c 440 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4
LT
441 netdev->mem_start = mmio_start;
442 netdev->mem_end = mmio_start + mmio_len;
443 netdev->base_addr = adapter->hw.io_base;
444
445 adapter->bd_number = cards_found;
446 adapter->link_speed = 0;
447 adapter->link_duplex = 0;
448
449 /* setup the private structure */
450
451 if((err = ixgb_sw_init(adapter)))
452 goto err_sw_init;
453
454 netdev->features = NETIF_F_SG |
455 NETIF_F_HW_CSUM |
456 NETIF_F_HW_VLAN_TX |
457 NETIF_F_HW_VLAN_RX |
458 NETIF_F_HW_VLAN_FILTER;
459#ifdef NETIF_F_TSO
460 netdev->features |= NETIF_F_TSO;
461#endif
f017f14b
AK
462#ifdef NETIF_F_LLTX
463 netdev->features |= NETIF_F_LLTX;
464#endif
1da177e4
LT
465
466 if(pci_using_dac)
467 netdev->features |= NETIF_F_HIGHDMA;
468
469 /* make sure the EEPROM is good */
470
471 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
ec9c3f5d 472 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT
473 err = -EIO;
474 goto err_eeprom;
475 }
476
477 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
df859c51 478 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
1da177e4 479
df859c51 480 if(!is_valid_ether_addr(netdev->perm_addr)) {
ec9c3f5d 481 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT
482 err = -EIO;
483 goto err_eeprom;
484 }
485
486 adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
487
488 init_timer(&adapter->watchdog_timer);
489 adapter->watchdog_timer.function = &ixgb_watchdog;
490 adapter->watchdog_timer.data = (unsigned long)adapter;
491
492 INIT_WORK(&adapter->tx_timeout_task,
493 (void (*)(void *))ixgb_tx_timeout_task, netdev);
494
ec9c3f5d 495 strcpy(netdev->name, "eth%d");
1da177e4
LT
496 if((err = register_netdev(netdev)))
497 goto err_register;
498
499 /* we're going to reset, so assume we have no link for now */
500
501 netif_carrier_off(netdev);
502 netif_stop_queue(netdev);
503
ec9c3f5d 504 DPRINTK(PROBE, INFO, "Intel(R) PRO/10GbE Network Connection\n");
1da177e4
LT
505 ixgb_check_options(adapter);
506 /* reset the hardware with the new settings */
507
508 ixgb_reset(adapter);
509
510 cards_found++;
511 return 0;
512
513err_register:
514err_sw_init:
515err_eeprom:
516 iounmap(adapter->hw.hw_addr);
517err_ioremap:
518 free_netdev(netdev);
519err_alloc_etherdev:
520 pci_release_regions(pdev);
c91e468a
AS
521err_request_regions:
522err_dma_mask:
523 pci_disable_device(pdev);
1da177e4
LT
524 return err;
525}
526
527/**
528 * ixgb_remove - Device Removal Routine
529 * @pdev: PCI device information struct
530 *
531 * ixgb_remove is called by the PCI subsystem to alert the driver
532 * that it should release a PCI device. The could be caused by a
533 * Hot-Plug event, or because the driver is going to be removed from
534 * memory.
535 **/
536
537static void __devexit
538ixgb_remove(struct pci_dev *pdev)
539{
540 struct net_device *netdev = pci_get_drvdata(pdev);
8908c6cd 541 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
542
543 unregister_netdev(netdev);
544
545 iounmap(adapter->hw.hw_addr);
546 pci_release_regions(pdev);
547
548 free_netdev(netdev);
549}
550
551/**
552 * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
553 * @adapter: board private structure to initialize
554 *
555 * ixgb_sw_init initializes the Adapter private data structure.
556 * Fields are initialized based on PCI device information and
557 * OS network device settings (MTU size).
558 **/
559
560static int __devinit
561ixgb_sw_init(struct ixgb_adapter *adapter)
562{
563 struct ixgb_hw *hw = &adapter->hw;
564 struct net_device *netdev = adapter->netdev;
565 struct pci_dev *pdev = adapter->pdev;
566
567 /* PCI config space info */
568
569 hw->vendor_id = pdev->vendor;
570 hw->device_id = pdev->device;
571 hw->subsystem_vendor_id = pdev->subsystem_vendor;
572 hw->subsystem_id = pdev->subsystem_device;
573
1da177e4 574 hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
3f3dc0dd 575 adapter->rx_buffer_len = hw->max_frame_size;
1da177e4
LT
576
577 if((hw->device_id == IXGB_DEVICE_ID_82597EX)
940829e2
AK
578 || (hw->device_id == IXGB_DEVICE_ID_82597EX_CX4)
579 || (hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
580 || (hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
1da177e4
LT
581 hw->mac_type = ixgb_82597;
582 else {
583 /* should never have loaded on this device */
ec9c3f5d 584 DPRINTK(PROBE, ERR, "unsupported device id\n");
1da177e4
LT
585 }
586
587 /* enable flow control to be programmed */
588 hw->fc.send_xon = 1;
589
590 atomic_set(&adapter->irq_sem, 1);
591 spin_lock_init(&adapter->tx_lock);
592
593 return 0;
594}
595
596/**
597 * ixgb_open - Called when a network interface is made active
598 * @netdev: network interface device structure
599 *
600 * Returns 0 on success, negative value on failure
601 *
602 * The open entry point is called when a network interface is made
603 * active by the system (IFF_UP). At this point all resources needed
604 * for transmit and receive operations are allocated, the interrupt
605 * handler is registered with the OS, the watchdog timer is started,
606 * and the stack is notified that the interface is ready.
607 **/
608
609static int
610ixgb_open(struct net_device *netdev)
611{
8908c6cd 612 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
613 int err;
614
615 /* allocate transmit descriptors */
616
617 if((err = ixgb_setup_tx_resources(adapter)))
618 goto err_setup_tx;
619
620 /* allocate receive descriptors */
621
622 if((err = ixgb_setup_rx_resources(adapter)))
623 goto err_setup_rx;
624
625 if((err = ixgb_up(adapter)))
626 goto err_up;
627
628 return 0;
629
630err_up:
631 ixgb_free_rx_resources(adapter);
632err_setup_rx:
633 ixgb_free_tx_resources(adapter);
634err_setup_tx:
635 ixgb_reset(adapter);
636
637 return err;
638}
639
640/**
641 * ixgb_close - Disables a network interface
642 * @netdev: network interface device structure
643 *
644 * Returns 0, this is not allowed to fail
645 *
646 * The close entry point is called when an interface is de-activated
647 * by the OS. The hardware is still under the drivers control, but
648 * needs to be disabled. A global MAC reset is issued to stop the
649 * hardware, and all transmit and receive resources are freed.
650 **/
651
652static int
653ixgb_close(struct net_device *netdev)
654{
8908c6cd 655 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
656
657 ixgb_down(adapter, TRUE);
658
659 ixgb_free_tx_resources(adapter);
660 ixgb_free_rx_resources(adapter);
661
662 return 0;
663}
664
665/**
666 * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
667 * @adapter: board private structure
668 *
669 * Return 0 on success, negative on failure
670 **/
671
672int
673ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
674{
675 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
676 struct pci_dev *pdev = adapter->pdev;
677 int size;
678
679 size = sizeof(struct ixgb_buffer) * txdr->count;
680 txdr->buffer_info = vmalloc(size);
681 if(!txdr->buffer_info) {
ec9c3f5d
AK
682 DPRINTK(PROBE, ERR,
683 "Unable to allocate transmit descriptor ring memory\n");
1da177e4
LT
684 return -ENOMEM;
685 }
686 memset(txdr->buffer_info, 0, size);
687
688 /* round up to nearest 4K */
689
690 txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
691 IXGB_ROUNDUP(txdr->size, 4096);
692
693 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
694 if(!txdr->desc) {
695 vfree(txdr->buffer_info);
ec9c3f5d
AK
696 DPRINTK(PROBE, ERR,
697 "Unable to allocate transmit descriptor memory\n");
1da177e4
LT
698 return -ENOMEM;
699 }
700 memset(txdr->desc, 0, txdr->size);
701
702 txdr->next_to_use = 0;
703 txdr->next_to_clean = 0;
704
705 return 0;
706}
707
708/**
709 * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
710 * @adapter: board private structure
711 *
712 * Configure the Tx unit of the MAC after a reset.
713 **/
714
715static void
716ixgb_configure_tx(struct ixgb_adapter *adapter)
717{
718 uint64_t tdba = adapter->tx_ring.dma;
719 uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
720 uint32_t tctl;
721 struct ixgb_hw *hw = &adapter->hw;
722
723 /* Setup the Base and Length of the Tx Descriptor Ring
724 * tx_ring.dma can be either a 32 or 64 bit value
725 */
726
727 IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
728 IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
729
730 IXGB_WRITE_REG(hw, TDLEN, tdlen);
731
732 /* Setup the HW Tx Head and Tail descriptor pointers */
733
734 IXGB_WRITE_REG(hw, TDH, 0);
735 IXGB_WRITE_REG(hw, TDT, 0);
736
737 /* don't set up txdctl, it induces performance problems if configured
738 * incorrectly */
739 /* Set the Tx Interrupt Delay register */
740
741 IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
742
743 /* Program the Transmit Control Register */
744
745 tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
746 IXGB_WRITE_REG(hw, TCTL, tctl);
747
748 /* Setup Transmit Descriptor Settings for this adapter */
749 adapter->tx_cmd_type =
750 IXGB_TX_DESC_TYPE
751 | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
752}
753
754/**
755 * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
756 * @adapter: board private structure
757 *
758 * Returns 0 on success, negative on failure
759 **/
760
761int
762ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
763{
764 struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
765 struct pci_dev *pdev = adapter->pdev;
766 int size;
767
768 size = sizeof(struct ixgb_buffer) * rxdr->count;
769 rxdr->buffer_info = vmalloc(size);
770 if(!rxdr->buffer_info) {
ec9c3f5d
AK
771 DPRINTK(PROBE, ERR,
772 "Unable to allocate receive descriptor ring\n");
1da177e4
LT
773 return -ENOMEM;
774 }
775 memset(rxdr->buffer_info, 0, size);
776
777 /* Round up to nearest 4K */
778
779 rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
780 IXGB_ROUNDUP(rxdr->size, 4096);
781
782 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
783
784 if(!rxdr->desc) {
785 vfree(rxdr->buffer_info);
ec9c3f5d
AK
786 DPRINTK(PROBE, ERR,
787 "Unable to allocate receive descriptors\n");
1da177e4
LT
788 return -ENOMEM;
789 }
790 memset(rxdr->desc, 0, rxdr->size);
791
792 rxdr->next_to_clean = 0;
793 rxdr->next_to_use = 0;
794
795 return 0;
796}
797
798/**
799 * ixgb_setup_rctl - configure the receive control register
800 * @adapter: Board private structure
801 **/
802
803static void
804ixgb_setup_rctl(struct ixgb_adapter *adapter)
805{
806 uint32_t rctl;
807
808 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
809
810 rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
811
812 rctl |=
813 IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
814 IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
815 (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
816
817 rctl |= IXGB_RCTL_SECRC;
818
3f3dc0dd 819 if (adapter->rx_buffer_len <= IXGB_RXBUFFER_2048)
1da177e4 820 rctl |= IXGB_RCTL_BSIZE_2048;
3f3dc0dd 821 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_4096)
1da177e4 822 rctl |= IXGB_RCTL_BSIZE_4096;
3f3dc0dd 823 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_8192)
1da177e4 824 rctl |= IXGB_RCTL_BSIZE_8192;
3f3dc0dd 825 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_16384)
1da177e4 826 rctl |= IXGB_RCTL_BSIZE_16384;
1da177e4
LT
827
828 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
829}
830
831/**
832 * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
833 * @adapter: board private structure
834 *
835 * Configure the Rx unit of the MAC after a reset.
836 **/
837
838static void
839ixgb_configure_rx(struct ixgb_adapter *adapter)
840{
841 uint64_t rdba = adapter->rx_ring.dma;
842 uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
843 struct ixgb_hw *hw = &adapter->hw;
844 uint32_t rctl;
845 uint32_t rxcsum;
846 uint32_t rxdctl;
847
848 /* make sure receives are disabled while setting up the descriptors */
849
850 rctl = IXGB_READ_REG(hw, RCTL);
851 IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
852
853 /* set the Receive Delay Timer Register */
854
855 IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
856
857 /* Setup the Base and Length of the Rx Descriptor Ring */
858
859 IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
860 IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
861
862 IXGB_WRITE_REG(hw, RDLEN, rdlen);
863
864 /* Setup the HW Rx Head and Tail Descriptor Pointers */
865 IXGB_WRITE_REG(hw, RDH, 0);
866 IXGB_WRITE_REG(hw, RDT, 0);
867
868 /* set up pre-fetching of receive buffers so we get some before we
869 * run out (default hardware behavior is to run out before fetching
870 * more). This sets up to fetch if HTHRESH rx descriptors are avail
871 * and the descriptors in hw cache are below PTHRESH. This avoids
872 * the hardware behavior of fetching <=512 descriptors in a single
873 * burst that pre-empts all other activity, usually causing fifo
874 * overflows. */
875 /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
876 rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
877 RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
878 RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
879 IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
880
881 /* Enable Receive Checksum Offload for TCP and UDP */
882 if(adapter->rx_csum == TRUE) {
883 rxcsum = IXGB_READ_REG(hw, RXCSUM);
884 rxcsum |= IXGB_RXCSUM_TUOFL;
885 IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
886 }
887
888 /* Enable Receives */
889
890 IXGB_WRITE_REG(hw, RCTL, rctl);
891}
892
893/**
894 * ixgb_free_tx_resources - Free Tx Resources
895 * @adapter: board private structure
896 *
897 * Free all transmit software resources
898 **/
899
900void
901ixgb_free_tx_resources(struct ixgb_adapter *adapter)
902{
903 struct pci_dev *pdev = adapter->pdev;
904
905 ixgb_clean_tx_ring(adapter);
906
907 vfree(adapter->tx_ring.buffer_info);
908 adapter->tx_ring.buffer_info = NULL;
909
910 pci_free_consistent(pdev, adapter->tx_ring.size,
911 adapter->tx_ring.desc, adapter->tx_ring.dma);
912
913 adapter->tx_ring.desc = NULL;
914}
915
235949d1 916static void
1da177e4
LT
917ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
918 struct ixgb_buffer *buffer_info)
919{
920 struct pci_dev *pdev = adapter->pdev;
1dfdd7df
AK
921
922 if (buffer_info->dma)
923 pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
924 PCI_DMA_TODEVICE);
925
926 if (buffer_info->skb)
1da177e4 927 dev_kfree_skb_any(buffer_info->skb);
1dfdd7df
AK
928
929 buffer_info->skb = NULL;
930 buffer_info->dma = 0;
931 buffer_info->time_stamp = 0;
932 /* these fields must always be initialized in tx
933 * buffer_info->length = 0;
934 * buffer_info->next_to_watch = 0; */
1da177e4
LT
935}
936
937/**
938 * ixgb_clean_tx_ring - Free Tx Buffers
939 * @adapter: board private structure
940 **/
941
942static void
943ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
944{
945 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
946 struct ixgb_buffer *buffer_info;
947 unsigned long size;
948 unsigned int i;
949
950 /* Free all the Tx ring sk_buffs */
951
952 for(i = 0; i < tx_ring->count; i++) {
953 buffer_info = &tx_ring->buffer_info[i];
954 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
955 }
956
957 size = sizeof(struct ixgb_buffer) * tx_ring->count;
958 memset(tx_ring->buffer_info, 0, size);
959
960 /* Zero out the descriptor ring */
961
962 memset(tx_ring->desc, 0, tx_ring->size);
963
964 tx_ring->next_to_use = 0;
965 tx_ring->next_to_clean = 0;
966
967 IXGB_WRITE_REG(&adapter->hw, TDH, 0);
968 IXGB_WRITE_REG(&adapter->hw, TDT, 0);
969}
970
971/**
972 * ixgb_free_rx_resources - Free Rx Resources
973 * @adapter: board private structure
974 *
975 * Free all receive software resources
976 **/
977
978void
979ixgb_free_rx_resources(struct ixgb_adapter *adapter)
980{
981 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
982 struct pci_dev *pdev = adapter->pdev;
983
984 ixgb_clean_rx_ring(adapter);
985
986 vfree(rx_ring->buffer_info);
987 rx_ring->buffer_info = NULL;
988
989 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
990
991 rx_ring->desc = NULL;
992}
993
994/**
995 * ixgb_clean_rx_ring - Free Rx Buffers
996 * @adapter: board private structure
997 **/
998
999static void
1000ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
1001{
1002 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1003 struct ixgb_buffer *buffer_info;
1004 struct pci_dev *pdev = adapter->pdev;
1005 unsigned long size;
1006 unsigned int i;
1007
1008 /* Free all the Rx ring sk_buffs */
1009
1010 for(i = 0; i < rx_ring->count; i++) {
1011 buffer_info = &rx_ring->buffer_info[i];
1012 if(buffer_info->skb) {
1013
1014 pci_unmap_single(pdev,
1015 buffer_info->dma,
1016 buffer_info->length,
1017 PCI_DMA_FROMDEVICE);
1018
1019 dev_kfree_skb(buffer_info->skb);
1020
1021 buffer_info->skb = NULL;
1022 }
1023 }
1024
1025 size = sizeof(struct ixgb_buffer) * rx_ring->count;
1026 memset(rx_ring->buffer_info, 0, size);
1027
1028 /* Zero out the descriptor ring */
1029
1030 memset(rx_ring->desc, 0, rx_ring->size);
1031
1032 rx_ring->next_to_clean = 0;
1033 rx_ring->next_to_use = 0;
1034
1035 IXGB_WRITE_REG(&adapter->hw, RDH, 0);
1036 IXGB_WRITE_REG(&adapter->hw, RDT, 0);
1037}
1038
1039/**
1040 * ixgb_set_mac - Change the Ethernet Address of the NIC
1041 * @netdev: network interface device structure
1042 * @p: pointer to an address structure
1043 *
1044 * Returns 0 on success, negative on failure
1045 **/
1046
1047static int
1048ixgb_set_mac(struct net_device *netdev, void *p)
1049{
8908c6cd 1050 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1051 struct sockaddr *addr = p;
1052
1053 if(!is_valid_ether_addr(addr->sa_data))
1054 return -EADDRNOTAVAIL;
1055
1056 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1057
1058 ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
1059
1060 return 0;
1061}
1062
1063/**
1064 * ixgb_set_multi - Multicast and Promiscuous mode set
1065 * @netdev: network interface device structure
1066 *
1067 * The set_multi entry point is called whenever the multicast address
1068 * list or the network interface flags are updated. This routine is
1069 * responsible for configuring the hardware for proper multicast,
1070 * promiscuous mode, and all-multi behavior.
1071 **/
1072
1073static void
1074ixgb_set_multi(struct net_device *netdev)
1075{
8908c6cd 1076 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1077 struct ixgb_hw *hw = &adapter->hw;
1078 struct dev_mc_list *mc_ptr;
1079 uint32_t rctl;
1080 int i;
1081
1082 /* Check for Promiscuous and All Multicast modes */
1083
1084 rctl = IXGB_READ_REG(hw, RCTL);
1085
1086 if(netdev->flags & IFF_PROMISC) {
1087 rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1088 } else if(netdev->flags & IFF_ALLMULTI) {
1089 rctl |= IXGB_RCTL_MPE;
1090 rctl &= ~IXGB_RCTL_UPE;
1091 } else {
1092 rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1093 }
1094
1095 if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
1096 rctl |= IXGB_RCTL_MPE;
1097 IXGB_WRITE_REG(hw, RCTL, rctl);
1098 } else {
1099 uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
1100
1101 IXGB_WRITE_REG(hw, RCTL, rctl);
1102
1103 for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
1104 i++, mc_ptr = mc_ptr->next)
1105 memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
1106 mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
1107
1108 ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
1109 }
1110}
1111
1112/**
1113 * ixgb_watchdog - Timer Call-back
1114 * @data: pointer to netdev cast into an unsigned long
1115 **/
1116
1117static void
1118ixgb_watchdog(unsigned long data)
1119{
1120 struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
1121 struct net_device *netdev = adapter->netdev;
1122 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
1123
1124 ixgb_check_for_link(&adapter->hw);
1125
1126 if (ixgb_check_for_bad_link(&adapter->hw)) {
1127 /* force the reset path */
1128 netif_stop_queue(netdev);
1129 }
1130
1131 if(adapter->hw.link_up) {
1132 if(!netif_carrier_ok(netdev)) {
ec9c3f5d
AK
1133 DPRINTK(LINK, INFO,
1134 "NIC Link is Up 10000 Mbps Full Duplex\n");
1da177e4
LT
1135 adapter->link_speed = 10000;
1136 adapter->link_duplex = FULL_DUPLEX;
1137 netif_carrier_on(netdev);
1138 netif_wake_queue(netdev);
1139 }
1140 } else {
1141 if(netif_carrier_ok(netdev)) {
1142 adapter->link_speed = 0;
1143 adapter->link_duplex = 0;
ec9c3f5d 1144 DPRINTK(LINK, INFO, "NIC Link is Down\n");
1da177e4
LT
1145 netif_carrier_off(netdev);
1146 netif_stop_queue(netdev);
1147
1148 }
1149 }
1150
1151 ixgb_update_stats(adapter);
1152
1153 if(!netif_carrier_ok(netdev)) {
1154 if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
1155 /* We've lost link, so the controller stops DMA,
1156 * but we've got queued Tx work that's never going
1157 * to get done, so reset controller to flush Tx.
1158 * (Do the reset outside of interrupt context). */
1159 schedule_work(&adapter->tx_timeout_task);
1160 }
1161 }
1162
1163 /* Force detection of hung controller every watchdog period */
1164 adapter->detect_tx_hung = TRUE;
1165
1166 /* generate an interrupt to force clean up of any stragglers */
1167 IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
1168
1169 /* Reset the timer */
1170 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1171}
1172
1173#define IXGB_TX_FLAGS_CSUM 0x00000001
1174#define IXGB_TX_FLAGS_VLAN 0x00000002
1175#define IXGB_TX_FLAGS_TSO 0x00000004
1176
235949d1 1177static int
1da177e4
LT
1178ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
1179{
1180#ifdef NETIF_F_TSO
1181 struct ixgb_context_desc *context_desc;
1182 unsigned int i;
1183 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
1184 uint16_t ipcse, tucse, mss;
1185 int err;
1186
89114afd 1187 if (likely(skb_is_gso(skb))) {
adc54139 1188 struct ixgb_buffer *buffer_info;
1da177e4
LT
1189 if (skb_header_cloned(skb)) {
1190 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1191 if (err)
1192 return err;
1193 }
1194
1195 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
7967168c 1196 mss = skb_shinfo(skb)->gso_size;
1da177e4
LT
1197 skb->nh.iph->tot_len = 0;
1198 skb->nh.iph->check = 0;
1199 skb->h.th->check = ~csum_tcpudp_magic(skb->nh.iph->saddr,
1200 skb->nh.iph->daddr,
1201 0, IPPROTO_TCP, 0);
1202 ipcss = skb->nh.raw - skb->data;
1203 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1204 ipcse = skb->h.raw - skb->data - 1;
1205 tucss = skb->h.raw - skb->data;
1206 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
1207 tucse = 0;
1208
1209 i = adapter->tx_ring.next_to_use;
1210 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
adc54139
JB
1211 buffer_info = &adapter->tx_ring.buffer_info[i];
1212 WARN_ON(buffer_info->dma != 0);
1da177e4
LT
1213
1214 context_desc->ipcss = ipcss;
1215 context_desc->ipcso = ipcso;
1216 context_desc->ipcse = cpu_to_le16(ipcse);
1217 context_desc->tucss = tucss;
1218 context_desc->tucso = tucso;
1219 context_desc->tucse = cpu_to_le16(tucse);
1220 context_desc->mss = cpu_to_le16(mss);
1221 context_desc->hdr_len = hdr_len;
1222 context_desc->status = 0;
1223 context_desc->cmd_type_len = cpu_to_le32(
1224 IXGB_CONTEXT_DESC_TYPE
1225 | IXGB_CONTEXT_DESC_CMD_TSE
1226 | IXGB_CONTEXT_DESC_CMD_IP
1227 | IXGB_CONTEXT_DESC_CMD_TCP
1da177e4
LT
1228 | IXGB_CONTEXT_DESC_CMD_IDE
1229 | (skb->len - (hdr_len)));
1230
06c2f9ec 1231
1da177e4
LT
1232 if(++i == adapter->tx_ring.count) i = 0;
1233 adapter->tx_ring.next_to_use = i;
1234
1235 return 1;
1236 }
1237#endif
1238
1239 return 0;
1240}
1241
235949d1 1242static boolean_t
1da177e4
LT
1243ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
1244{
1245 struct ixgb_context_desc *context_desc;
1246 unsigned int i;
1247 uint8_t css, cso;
1248
84fa7933 1249 if(likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
adc54139 1250 struct ixgb_buffer *buffer_info;
1da177e4
LT
1251 css = skb->h.raw - skb->data;
1252 cso = (skb->h.raw + skb->csum) - skb->data;
1253
1254 i = adapter->tx_ring.next_to_use;
1255 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
adc54139
JB
1256 buffer_info = &adapter->tx_ring.buffer_info[i];
1257 WARN_ON(buffer_info->dma != 0);
1da177e4
LT
1258
1259 context_desc->tucss = css;
1260 context_desc->tucso = cso;
1261 context_desc->tucse = 0;
1262 /* zero out any previously existing data in one instruction */
1263 *(uint32_t *)&(context_desc->ipcss) = 0;
1264 context_desc->status = 0;
1265 context_desc->hdr_len = 0;
1266 context_desc->mss = 0;
1267 context_desc->cmd_type_len =
1268 cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
06c2f9ec 1269 | IXGB_TX_DESC_CMD_IDE);
1da177e4
LT
1270
1271 if(++i == adapter->tx_ring.count) i = 0;
1272 adapter->tx_ring.next_to_use = i;
1273
1274 return TRUE;
1275 }
1276
1277 return FALSE;
1278}
1279
1280#define IXGB_MAX_TXD_PWR 14
1281#define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
1282
235949d1 1283static int
1da177e4
LT
1284ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
1285 unsigned int first)
1286{
1287 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1288 struct ixgb_buffer *buffer_info;
1289 int len = skb->len;
1290 unsigned int offset = 0, size, count = 0, i;
1291
1292 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
1293 unsigned int f;
ac79c82e 1294
1da177e4
LT
1295 len -= skb->data_len;
1296
1297 i = tx_ring->next_to_use;
1298
1299 while(len) {
1300 buffer_info = &tx_ring->buffer_info[i];
709cf018 1301 size = min(len, IXGB_MAX_DATA_PER_TXD);
1da177e4 1302 buffer_info->length = size;
adc54139 1303 WARN_ON(buffer_info->dma != 0);
1da177e4
LT
1304 buffer_info->dma =
1305 pci_map_single(adapter->pdev,
1306 skb->data + offset,
1307 size,
1308 PCI_DMA_TODEVICE);
1309 buffer_info->time_stamp = jiffies;
1dfdd7df 1310 buffer_info->next_to_watch = 0;
1da177e4
LT
1311
1312 len -= size;
1313 offset += size;
1314 count++;
1315 if(++i == tx_ring->count) i = 0;
1316 }
1317
1318 for(f = 0; f < nr_frags; f++) {
1319 struct skb_frag_struct *frag;
1320
1321 frag = &skb_shinfo(skb)->frags[f];
1322 len = frag->size;
1323 offset = 0;
1324
1325 while(len) {
1326 buffer_info = &tx_ring->buffer_info[i];
709cf018 1327 size = min(len, IXGB_MAX_DATA_PER_TXD);
1da177e4
LT
1328 buffer_info->length = size;
1329 buffer_info->dma =
1330 pci_map_page(adapter->pdev,
1331 frag->page,
1332 frag->page_offset + offset,
1333 size,
1334 PCI_DMA_TODEVICE);
1335 buffer_info->time_stamp = jiffies;
1dfdd7df 1336 buffer_info->next_to_watch = 0;
1da177e4
LT
1337
1338 len -= size;
1339 offset += size;
1340 count++;
1341 if(++i == tx_ring->count) i = 0;
1342 }
1343 }
1344 i = (i == 0) ? tx_ring->count - 1 : i - 1;
1345 tx_ring->buffer_info[i].skb = skb;
1346 tx_ring->buffer_info[first].next_to_watch = i;
1347
1348 return count;
1349}
1350
235949d1 1351static void
1da177e4
LT
1352ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
1353{
1354 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1355 struct ixgb_tx_desc *tx_desc = NULL;
1356 struct ixgb_buffer *buffer_info;
1357 uint32_t cmd_type_len = adapter->tx_cmd_type;
1358 uint8_t status = 0;
1359 uint8_t popts = 0;
1360 unsigned int i;
1361
1362 if(tx_flags & IXGB_TX_FLAGS_TSO) {
1363 cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
1364 popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
1365 }
1366
1367 if(tx_flags & IXGB_TX_FLAGS_CSUM)
1368 popts |= IXGB_TX_DESC_POPTS_TXSM;
1369
1370 if(tx_flags & IXGB_TX_FLAGS_VLAN) {
1371 cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
1372 }
1373
1374 i = tx_ring->next_to_use;
1375
1376 while(count--) {
1377 buffer_info = &tx_ring->buffer_info[i];
1378 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1379 tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
1380 tx_desc->cmd_type_len =
1381 cpu_to_le32(cmd_type_len | buffer_info->length);
1382 tx_desc->status = status;
1383 tx_desc->popts = popts;
1384 tx_desc->vlan = cpu_to_le16(vlan_id);
1385
1386 if(++i == tx_ring->count) i = 0;
1387 }
1388
1389 tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
1390 | IXGB_TX_DESC_CMD_RS );
1391
1392 /* Force memory writes to complete before letting h/w
1393 * know there are new descriptors to fetch. (Only
1394 * applicable for weak-ordered memory model archs,
1395 * such as IA-64). */
1396 wmb();
1397
1398 tx_ring->next_to_use = i;
1399 IXGB_WRITE_REG(&adapter->hw, TDT, i);
1400}
1401
1402/* Tx Descriptors needed, worst case */
1403#define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
1404 (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
1405#define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) + \
989316dd 1406 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1
1da177e4
LT
1407
1408static int
1409ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1410{
8908c6cd 1411 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1412 unsigned int first;
1413 unsigned int tx_flags = 0;
1414 unsigned long flags;
1415 int vlan_id = 0;
1416 int tso;
1417
1418 if(skb->len <= 0) {
1419 dev_kfree_skb_any(skb);
1420 return 0;
1421 }
1422
f017f14b
AK
1423#ifdef NETIF_F_LLTX
1424 local_irq_save(flags);
1425 if (!spin_trylock(&adapter->tx_lock)) {
1426 /* Collision - tell upper layer to requeue */
1427 local_irq_restore(flags);
1428 return NETDEV_TX_LOCKED;
1429 }
1430#else
1da177e4 1431 spin_lock_irqsave(&adapter->tx_lock, flags);
f017f14b
AK
1432#endif
1433
1da177e4
LT
1434 if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED)) {
1435 netif_stop_queue(netdev);
1436 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1437 return NETDEV_TX_BUSY;
1da177e4 1438 }
f017f14b
AK
1439
1440#ifndef NETIF_F_LLTX
1da177e4 1441 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1442#endif
1da177e4
LT
1443
1444 if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
1445 tx_flags |= IXGB_TX_FLAGS_VLAN;
1446 vlan_id = vlan_tx_tag_get(skb);
1447 }
1448
1449 first = adapter->tx_ring.next_to_use;
1450
1451 tso = ixgb_tso(adapter, skb);
1452 if (tso < 0) {
1453 dev_kfree_skb_any(skb);
f017f14b
AK
1454#ifdef NETIF_F_LLTX
1455 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1456#endif
1da177e4
LT
1457 return NETDEV_TX_OK;
1458 }
1459
96f9c2e2 1460 if (likely(tso))
1da177e4
LT
1461 tx_flags |= IXGB_TX_FLAGS_TSO;
1462 else if(ixgb_tx_csum(adapter, skb))
1463 tx_flags |= IXGB_TX_FLAGS_CSUM;
1464
1465 ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
1466 tx_flags);
1467
1468 netdev->trans_start = jiffies;
1469
f017f14b
AK
1470#ifdef NETIF_F_LLTX
1471 /* Make sure there is space in the ring for the next send. */
1472 if(unlikely(IXGB_DESC_UNUSED(&adapter->tx_ring) < DESC_NEEDED))
1473 netif_stop_queue(netdev);
1474
1475 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1476
1477#endif
1478 return NETDEV_TX_OK;
1da177e4
LT
1479}
1480
1481/**
1482 * ixgb_tx_timeout - Respond to a Tx Hang
1483 * @netdev: network interface device structure
1484 **/
1485
1486static void
1487ixgb_tx_timeout(struct net_device *netdev)
1488{
8908c6cd 1489 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1490
1491 /* Do the reset outside of interrupt context */
1492 schedule_work(&adapter->tx_timeout_task);
1493}
1494
1495static void
1496ixgb_tx_timeout_task(struct net_device *netdev)
1497{
8908c6cd 1498 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4 1499
9b8118df 1500 adapter->tx_timeout_count++;
1da177e4
LT
1501 ixgb_down(adapter, TRUE);
1502 ixgb_up(adapter);
1503}
1504
1505/**
1506 * ixgb_get_stats - Get System Network Statistics
1507 * @netdev: network interface device structure
1508 *
1509 * Returns the address of the device statistics structure.
1510 * The statistics are actually updated from the timer callback.
1511 **/
1512
1513static struct net_device_stats *
1514ixgb_get_stats(struct net_device *netdev)
1515{
8908c6cd 1516 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1517
1518 return &adapter->net_stats;
1519}
1520
1521/**
1522 * ixgb_change_mtu - Change the Maximum Transfer Unit
1523 * @netdev: network interface device structure
1524 * @new_mtu: new value for maximum frame size
1525 *
1526 * Returns 0 on success, negative on failure
1527 **/
1528
1529static int
1530ixgb_change_mtu(struct net_device *netdev, int new_mtu)
1531{
8908c6cd 1532 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1533 int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1534 int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1535
1536
1537 if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1538 || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
ec9c3f5d 1539 DPRINTK(PROBE, ERR, "Invalid MTU setting %d\n", new_mtu);
1da177e4
LT
1540 return -EINVAL;
1541 }
1542
3f3dc0dd 1543 adapter->rx_buffer_len = max_frame;
1da177e4
LT
1544
1545 netdev->mtu = new_mtu;
1546
3f3dc0dd 1547 if ((old_max_frame != max_frame) && netif_running(netdev)) {
1da177e4
LT
1548 ixgb_down(adapter, TRUE);
1549 ixgb_up(adapter);
1550 }
1551
1552 return 0;
1553}
1554
1555/**
1556 * ixgb_update_stats - Update the board statistics counters.
1557 * @adapter: board private structure
1558 **/
1559
1560void
1561ixgb_update_stats(struct ixgb_adapter *adapter)
1562{
5633684d 1563 struct net_device *netdev = adapter->netdev;
01748fbb
LV
1564 struct pci_dev *pdev = adapter->pdev;
1565
1566 /* Prevent stats update while adapter is being reset */
1567 if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
1568 return;
5633684d
MC
1569
1570 if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
1571 (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
1572 u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
1573 u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
1574 u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
1575 u64 bcast = ((u64)bcast_h << 32) | bcast_l;
1576
1577 multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
1578 /* fix up multicast stats by removing broadcasts */
7b89178d
MC
1579 if(multi >= bcast)
1580 multi -= bcast;
5633684d
MC
1581
1582 adapter->stats.mprcl += (multi & 0xFFFFFFFF);
1583 adapter->stats.mprch += (multi >> 32);
1584 adapter->stats.bprcl += bcast_l;
1585 adapter->stats.bprch += bcast_h;
1586 } else {
1587 adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
1588 adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
1589 adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
1590 adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
1591 }
1da177e4
LT
1592 adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
1593 adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
1594 adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
1595 adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
1da177e4
LT
1596 adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
1597 adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
1598 adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
1599 adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
1600 adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
1601 adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
1602 adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
1603 adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
1604 adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
1605 adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
1606 adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
1607 adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
1608 adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
1609 adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
1610 adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
1611 adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
1612 adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
1613 adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
1614 adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
1615 adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
1616 adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
1617 adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
1618 adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
1619 adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
1620 adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
1621 adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
1622 adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
1623 adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
1624 adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
1625 adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
1626 adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
1627 adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
1628 adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
1629 adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
1630 adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
1631 adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
1632 adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
1633 adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
1634 adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
1635 adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
1636 adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
1637 adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
1638 adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
1639 adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
1640 adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
1641 adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
1642 adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
1643 adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
1644 adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
1645 adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
1646 adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
1647 adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
1648
1649 /* Fill out the OS statistics structure */
1650
1651 adapter->net_stats.rx_packets = adapter->stats.gprcl;
1652 adapter->net_stats.tx_packets = adapter->stats.gptcl;
1653 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
1654 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
1655 adapter->net_stats.multicast = adapter->stats.mprcl;
1656 adapter->net_stats.collisions = 0;
1657
1658 /* ignore RLEC as it reports errors for padded (<64bytes) frames
1659 * with a length in the type/len field */
1660 adapter->net_stats.rx_errors =
1661 /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
1662 adapter->stats.ruc +
1663 adapter->stats.roc /*+ adapter->stats.rlec */ +
1664 adapter->stats.icbc +
1665 adapter->stats.ecbc + adapter->stats.mpc;
1666
1da177e4
LT
1667 /* see above
1668 * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
1669 */
1670
1671 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
1672 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
1673 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
1674 adapter->net_stats.rx_over_errors = adapter->stats.mpc;
1675
1676 adapter->net_stats.tx_errors = 0;
1677 adapter->net_stats.rx_frame_errors = 0;
1678 adapter->net_stats.tx_aborted_errors = 0;
1679 adapter->net_stats.tx_carrier_errors = 0;
1680 adapter->net_stats.tx_fifo_errors = 0;
1681 adapter->net_stats.tx_heartbeat_errors = 0;
1682 adapter->net_stats.tx_window_errors = 0;
1683}
1684
1685#define IXGB_MAX_INTR 10
1686/**
1687 * ixgb_intr - Interrupt Handler
1688 * @irq: interrupt number
1689 * @data: pointer to a network interface device structure
1690 * @pt_regs: CPU registers structure
1691 **/
1692
1693static irqreturn_t
1694ixgb_intr(int irq, void *data, struct pt_regs *regs)
1695{
1696 struct net_device *netdev = data;
8908c6cd 1697 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1698 struct ixgb_hw *hw = &adapter->hw;
1699 uint32_t icr = IXGB_READ_REG(hw, ICR);
1700#ifndef CONFIG_IXGB_NAPI
1701 unsigned int i;
1702#endif
1703
1704 if(unlikely(!icr))
1705 return IRQ_NONE; /* Not our interrupt */
1706
1707 if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
1708 mod_timer(&adapter->watchdog_timer, jiffies);
1709 }
1710
1711#ifdef CONFIG_IXGB_NAPI
1712 if(netif_rx_schedule_prep(netdev)) {
1713
1714 /* Disable interrupts and register for poll. The flush
1715 of the posted write is intentionally left out.
1716 */
1717
1718 atomic_inc(&adapter->irq_sem);
1719 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
1720 __netif_rx_schedule(netdev);
1721 }
1722#else
1723 /* yes, that is actually a & and it is meant to make sure that
1724 * every pass through this for loop checks both receive and
1725 * transmit queues for completed descriptors, intended to
1726 * avoid starvation issues and assist tx/rx fairness. */
1727 for(i = 0; i < IXGB_MAX_INTR; i++)
1728 if(!ixgb_clean_rx_irq(adapter) &
1729 !ixgb_clean_tx_irq(adapter))
1730 break;
1731#endif
1732 return IRQ_HANDLED;
1733}
1734
1735#ifdef CONFIG_IXGB_NAPI
1736/**
1737 * ixgb_clean - NAPI Rx polling callback
1738 * @adapter: board private structure
1739 **/
1740
1741static int
1742ixgb_clean(struct net_device *netdev, int *budget)
1743{
8908c6cd 1744 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
1745 int work_to_do = min(*budget, netdev->quota);
1746 int tx_cleaned;
1747 int work_done = 0;
1748
1749 tx_cleaned = ixgb_clean_tx_irq(adapter);
1750 ixgb_clean_rx_irq(adapter, &work_done, work_to_do);
1751
1752 *budget -= work_done;
1753 netdev->quota -= work_done;
1754
1755 /* if no Tx and not enough Rx work done, exit the polling mode */
1756 if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
1757 netif_rx_complete(netdev);
1758 ixgb_irq_enable(adapter);
1759 return 0;
1760 }
1761
1762 return 1;
1763}
1764#endif
1765
1766/**
1767 * ixgb_clean_tx_irq - Reclaim resources after transmit completes
1768 * @adapter: board private structure
1769 **/
1770
1771static boolean_t
1772ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
1773{
1774 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1775 struct net_device *netdev = adapter->netdev;
1776 struct ixgb_tx_desc *tx_desc, *eop_desc;
1777 struct ixgb_buffer *buffer_info;
1778 unsigned int i, eop;
1779 boolean_t cleaned = FALSE;
1780
1781 i = tx_ring->next_to_clean;
1782 eop = tx_ring->buffer_info[i].next_to_watch;
1783 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1784
1785 while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
1786
1787 for(cleaned = FALSE; !cleaned; ) {
1788 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1789 buffer_info = &tx_ring->buffer_info[i];
1790
1791 if (tx_desc->popts
1792 & (IXGB_TX_DESC_POPTS_TXSM |
1793 IXGB_TX_DESC_POPTS_IXSM))
1794 adapter->hw_csum_tx_good++;
1795
1796 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
1797
1798 *(uint32_t *)&(tx_desc->status) = 0;
1799
1800 cleaned = (i == eop);
1801 if(++i == tx_ring->count) i = 0;
1802 }
1803
1804 eop = tx_ring->buffer_info[i].next_to_watch;
1805 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1806 }
1807
1808 tx_ring->next_to_clean = i;
1809
3352a3b2
AK
1810 if (unlikely(netif_queue_stopped(netdev))) {
1811 spin_lock(&adapter->tx_lock);
1812 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
ab8ced2f 1813 (IXGB_DESC_UNUSED(tx_ring) >= DESC_NEEDED))
3352a3b2
AK
1814 netif_wake_queue(netdev);
1815 spin_unlock(&adapter->tx_lock);
1da177e4 1816 }
1da177e4
LT
1817
1818 if(adapter->detect_tx_hung) {
1819 /* detect a transmit hang in hardware, this serializes the
1820 * check with the clearing of time_stamp and movement of i */
1821 adapter->detect_tx_hung = FALSE;
9b8118df
AK
1822 if (tx_ring->buffer_info[eop].dma &&
1823 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + HZ)
1da177e4 1824 && !(IXGB_READ_REG(&adapter->hw, STATUS) &
9b8118df
AK
1825 IXGB_STATUS_TXOFF)) {
1826 /* detected Tx unit hang */
1827 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
1828 " TDH <%x>\n"
1829 " TDT <%x>\n"
1830 " next_to_use <%x>\n"
1831 " next_to_clean <%x>\n"
1832 "buffer_info[next_to_clean]\n"
1833 " time_stamp <%lx>\n"
1834 " next_to_watch <%x>\n"
1835 " jiffies <%lx>\n"
1836 " next_to_watch.status <%x>\n",
1837 IXGB_READ_REG(&adapter->hw, TDH),
1838 IXGB_READ_REG(&adapter->hw, TDT),
1839 tx_ring->next_to_use,
1840 tx_ring->next_to_clean,
1841 tx_ring->buffer_info[eop].time_stamp,
1842 eop,
1843 jiffies,
1844 eop_desc->status);
1da177e4 1845 netif_stop_queue(netdev);
9b8118df 1846 }
1da177e4
LT
1847 }
1848
1849 return cleaned;
1850}
1851
1852/**
1853 * ixgb_rx_checksum - Receive Checksum Offload for 82597.
1854 * @adapter: board private structure
1855 * @rx_desc: receive descriptor
1856 * @sk_buff: socket buffer with received data
1857 **/
1858
235949d1 1859static void
1da177e4
LT
1860ixgb_rx_checksum(struct ixgb_adapter *adapter,
1861 struct ixgb_rx_desc *rx_desc,
1862 struct sk_buff *skb)
1863{
1864 /* Ignore Checksum bit is set OR
1865 * TCP Checksum has not been calculated
1866 */
1867 if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
1868 (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
1869 skb->ip_summed = CHECKSUM_NONE;
1870 return;
1871 }
1872
1873 /* At this point we know the hardware did the TCP checksum */
1874 /* now look at the TCP checksum error bit */
1875 if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
1876 /* let the stack verify checksum errors */
1877 skb->ip_summed = CHECKSUM_NONE;
1878 adapter->hw_csum_rx_error++;
1879 } else {
1880 /* TCP checksum is good */
1881 skb->ip_summed = CHECKSUM_UNNECESSARY;
1882 adapter->hw_csum_rx_good++;
1883 }
1884}
1885
1886/**
1887 * ixgb_clean_rx_irq - Send received data up the network stack,
1888 * @adapter: board private structure
1889 **/
1890
1891static boolean_t
1892#ifdef CONFIG_IXGB_NAPI
1893ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
1894#else
1895ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
1896#endif
1897{
1898 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1899 struct net_device *netdev = adapter->netdev;
1900 struct pci_dev *pdev = adapter->pdev;
1901 struct ixgb_rx_desc *rx_desc, *next_rxd;
1902 struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
1da177e4
LT
1903 uint32_t length;
1904 unsigned int i, j;
1905 boolean_t cleaned = FALSE;
1906
1907 i = rx_ring->next_to_clean;
1908 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1909 buffer_info = &rx_ring->buffer_info[i];
1910
1911 while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
f404de1c
MC
1912 struct sk_buff *skb, *next_skb;
1913 u8 status;
1da177e4
LT
1914
1915#ifdef CONFIG_IXGB_NAPI
1916 if(*work_done >= work_to_do)
1917 break;
1918
1919 (*work_done)++;
1920#endif
f404de1c 1921 status = rx_desc->status;
1da177e4 1922 skb = buffer_info->skb;
1dfdd7df 1923 buffer_info->skb = NULL;
f404de1c 1924
1da177e4
LT
1925 prefetch(skb->data);
1926
1927 if(++i == rx_ring->count) i = 0;
1928 next_rxd = IXGB_RX_DESC(*rx_ring, i);
1929 prefetch(next_rxd);
1930
1931 if((j = i + 1) == rx_ring->count) j = 0;
1932 next2_buffer = &rx_ring->buffer_info[j];
1933 prefetch(next2_buffer);
1934
1935 next_buffer = &rx_ring->buffer_info[i];
1936 next_skb = next_buffer->skb;
1937 prefetch(next_skb);
1938
1da177e4
LT
1939 cleaned = TRUE;
1940
1941 pci_unmap_single(pdev,
1942 buffer_info->dma,
1943 buffer_info->length,
1944 PCI_DMA_FROMDEVICE);
1945
1946 length = le16_to_cpu(rx_desc->length);
1947
f404de1c 1948 if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
1da177e4
LT
1949
1950 /* All receives must fit into a single buffer */
1951
1952 IXGB_DBG("Receive packet consumed multiple buffers "
1953 "length<%x>\n", length);
1954
1955 dev_kfree_skb_irq(skb);
f404de1c 1956 goto rxdesc_done;
1da177e4
LT
1957 }
1958
1959 if (unlikely(rx_desc->errors
1960 & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
1961 | IXGB_RX_DESC_ERRORS_P |
1962 IXGB_RX_DESC_ERRORS_RXE))) {
1963
1964 dev_kfree_skb_irq(skb);
f404de1c 1965 goto rxdesc_done;
1da177e4
LT
1966 }
1967
6b900bb4
AK
1968 /* code added for copybreak, this should improve
1969 * performance for small packets with large amounts
1970 * of reassembly being done in the stack */
1971#define IXGB_CB_LENGTH 256
1972 if (length < IXGB_CB_LENGTH) {
1973 struct sk_buff *new_skb =
5791704f 1974 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
6b900bb4
AK
1975 if (new_skb) {
1976 skb_reserve(new_skb, NET_IP_ALIGN);
6b900bb4
AK
1977 memcpy(new_skb->data - NET_IP_ALIGN,
1978 skb->data - NET_IP_ALIGN,
1979 length + NET_IP_ALIGN);
1980 /* save the skb in buffer_info as good */
1981 buffer_info->skb = skb;
1982 skb = new_skb;
1983 }
1984 }
1985 /* end copybreak code */
1986
1da177e4
LT
1987 /* Good Receive */
1988 skb_put(skb, length);
1989
1990 /* Receive Checksum Offload */
1991 ixgb_rx_checksum(adapter, rx_desc, skb);
1992
1993 skb->protocol = eth_type_trans(skb, netdev);
1994#ifdef CONFIG_IXGB_NAPI
f404de1c 1995 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT
1996 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
1997 le16_to_cpu(rx_desc->special) &
1998 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
1999 } else {
2000 netif_receive_skb(skb);
2001 }
2002#else /* CONFIG_IXGB_NAPI */
f404de1c 2003 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT
2004 vlan_hwaccel_rx(skb, adapter->vlgrp,
2005 le16_to_cpu(rx_desc->special) &
2006 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
2007 } else {
2008 netif_rx(skb);
2009 }
2010#endif /* CONFIG_IXGB_NAPI */
2011 netdev->last_rx = jiffies;
2012
f404de1c
MC
2013rxdesc_done:
2014 /* clean up descriptor, might be written over by hw */
1da177e4 2015 rx_desc->status = 0;
1da177e4 2016
f404de1c 2017 /* use prefetched values */
1da177e4
LT
2018 rx_desc = next_rxd;
2019 buffer_info = next_buffer;
2020 }
2021
2022 rx_ring->next_to_clean = i;
2023
2024 ixgb_alloc_rx_buffers(adapter);
2025
2026 return cleaned;
2027}
2028
2029/**
2030 * ixgb_alloc_rx_buffers - Replace used receive buffers
2031 * @adapter: address of board private structure
2032 **/
2033
2034static void
2035ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
2036{
2037 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
2038 struct net_device *netdev = adapter->netdev;
2039 struct pci_dev *pdev = adapter->pdev;
2040 struct ixgb_rx_desc *rx_desc;
2041 struct ixgb_buffer *buffer_info;
2042 struct sk_buff *skb;
2043 unsigned int i;
2044 int num_group_tail_writes;
2045 long cleancount;
2046
2047 i = rx_ring->next_to_use;
2048 buffer_info = &rx_ring->buffer_info[i];
2049 cleancount = IXGB_DESC_UNUSED(rx_ring);
2050
2051 num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
2052
41639fed
MC
2053 /* leave three descriptors unused */
2054 while(--cleancount > 2) {
1dfdd7df 2055 /* recycle! its good for you */
69c7a940
AK
2056 skb = buffer_info->skb;
2057 if (skb) {
1dfdd7df
AK
2058 skb_trim(skb, 0);
2059 goto map_skb;
2060 }
1da177e4 2061
69c7a940
AK
2062 skb = netdev_alloc_skb(netdev, adapter->rx_buffer_len
2063 + NET_IP_ALIGN);
1dfdd7df 2064 if (unlikely(!skb)) {
1da177e4 2065 /* Better luck next round */
1dfdd7df 2066 adapter->alloc_rx_buff_failed++;
1da177e4
LT
2067 break;
2068 }
2069
2070 /* Make buffer alignment 2 beyond a 16 byte boundary
2071 * this will result in a 16 byte aligned IP header after
2072 * the 14 byte MAC header is removed
2073 */
2074 skb_reserve(skb, NET_IP_ALIGN);
2075
1da177e4
LT
2076 buffer_info->skb = skb;
2077 buffer_info->length = adapter->rx_buffer_len;
1dfdd7df
AK
2078map_skb:
2079 buffer_info->dma = pci_map_single(pdev,
2080 skb->data,
2081 adapter->rx_buffer_len,
2082 PCI_DMA_FROMDEVICE);
1da177e4 2083
1dfdd7df 2084 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1da177e4 2085 rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
41639fed
MC
2086 /* guarantee DD bit not set now before h/w gets descriptor
2087 * this is the rest of the workaround for h/w double
2088 * writeback. */
2089 rx_desc->status = 0;
1da177e4 2090
1da177e4
LT
2091
2092 if(++i == rx_ring->count) i = 0;
2093 buffer_info = &rx_ring->buffer_info[i];
2094 }
2095
1dfdd7df
AK
2096 if (likely(rx_ring->next_to_use != i)) {
2097 rx_ring->next_to_use = i;
2098 if (unlikely(i-- == 0))
2099 i = (rx_ring->count - 1);
2100
2101 /* Force memory writes to complete before letting h/w
2102 * know there are new descriptors to fetch. (Only
2103 * applicable for weak-ordered memory model archs, such
2104 * as IA-64). */
2105 wmb();
2106 IXGB_WRITE_REG(&adapter->hw, RDT, i);
2107 }
1da177e4
LT
2108}
2109
2110/**
2111 * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
2112 *
2113 * @param netdev network interface device structure
2114 * @param grp indicates to enable or disable tagging/stripping
2115 **/
2116static void
2117ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2118{
8908c6cd 2119 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
2120 uint32_t ctrl, rctl;
2121
2122 ixgb_irq_disable(adapter);
2123 adapter->vlgrp = grp;
2124
2125 if(grp) {
2126 /* enable VLAN tag insert/strip */
2127 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2128 ctrl |= IXGB_CTRL0_VME;
2129 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2130
2131 /* enable VLAN receive filtering */
2132
2133 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2134 rctl |= IXGB_RCTL_VFE;
2135 rctl &= ~IXGB_RCTL_CFIEN;
2136 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2137 } else {
2138 /* disable VLAN tag insert/strip */
2139
2140 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2141 ctrl &= ~IXGB_CTRL0_VME;
2142 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2143
2144 /* disable VLAN filtering */
2145
2146 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2147 rctl &= ~IXGB_RCTL_VFE;
2148 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2149 }
2150
2151 ixgb_irq_enable(adapter);
2152}
2153
2154static void
2155ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
2156{
8908c6cd 2157 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
2158 uint32_t vfta, index;
2159
2160 /* add VID to filter table */
2161
2162 index = (vid >> 5) & 0x7F;
2163 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2164 vfta |= (1 << (vid & 0x1F));
2165 ixgb_write_vfta(&adapter->hw, index, vfta);
2166}
2167
2168static void
2169ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
2170{
8908c6cd 2171 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT
2172 uint32_t vfta, index;
2173
2174 ixgb_irq_disable(adapter);
2175
2176 if(adapter->vlgrp)
2177 adapter->vlgrp->vlan_devices[vid] = NULL;
2178
2179 ixgb_irq_enable(adapter);
2180
2181 /* remove VID from filter table*/
2182
2183 index = (vid >> 5) & 0x7F;
2184 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2185 vfta &= ~(1 << (vid & 0x1F));
2186 ixgb_write_vfta(&adapter->hw, index, vfta);
2187}
2188
2189static void
2190ixgb_restore_vlan(struct ixgb_adapter *adapter)
2191{
2192 ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2193
2194 if(adapter->vlgrp) {
2195 uint16_t vid;
2196 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2197 if(!adapter->vlgrp->vlan_devices[vid])
2198 continue;
2199 ixgb_vlan_rx_add_vid(adapter->netdev, vid);
2200 }
2201 }
2202}
2203
1da177e4
LT
2204#ifdef CONFIG_NET_POLL_CONTROLLER
2205/*
2206 * Polling 'interrupt' - used by things like netconsole to send skbs
2207 * without having to re-enable interrupts. It's not called while
2208 * the interrupt routine is executing.
2209 */
2210
2211static void ixgb_netpoll(struct net_device *dev)
2212{
f990b426 2213 struct ixgb_adapter *adapter = netdev_priv(dev);
ac79c82e 2214
1da177e4
LT
2215 disable_irq(adapter->pdev->irq);
2216 ixgb_intr(adapter->pdev->irq, dev, NULL);
2217 enable_irq(adapter->pdev->irq);
2218}
2219#endif
2220
01748fbb
LV
2221/**
2222 * ixgb_io_error_detected() - called when PCI error is detected
2223 * @pdev pointer to pci device with error
2224 * @state pci channel state after error
2225 *
2226 * This callback is called by the PCI subsystem whenever
2227 * a PCI bus error is detected.
2228 */
2229static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
2230 enum pci_channel_state state)
2231{
2232 struct net_device *netdev = pci_get_drvdata(pdev);
2233 struct ixgb_adapter *adapter = netdev->priv;
2234
2235 if(netif_running(netdev))
2236 ixgb_down(adapter, TRUE);
2237
2238 pci_disable_device(pdev);
2239
2240 /* Request a slot reset. */
2241 return PCI_ERS_RESULT_NEED_RESET;
2242}
2243
2244/**
2245 * ixgb_io_slot_reset - called after the pci bus has been reset.
2246 * @pdev pointer to pci device with error
2247 *
2248 * This callback is called after the PCI buss has been reset.
2249 * Basically, this tries to restart the card from scratch.
2250 * This is a shortened version of the device probe/discovery code,
2251 * it resembles the first-half of the ixgb_probe() routine.
2252 */
2253static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev)
2254{
2255 struct net_device *netdev = pci_get_drvdata(pdev);
2256 struct ixgb_adapter *adapter = netdev->priv;
2257
2258 if(pci_enable_device(pdev)) {
2259 DPRINTK(PROBE, ERR, "Cannot re-enable PCI device after reset.\n");
2260 return PCI_ERS_RESULT_DISCONNECT;
2261 }
2262
2263 /* Perform card reset only on one instance of the card */
2264 if (0 != PCI_FUNC (pdev->devfn))
2265 return PCI_ERS_RESULT_RECOVERED;
2266
2267 pci_set_master(pdev);
2268
2269 netif_carrier_off(netdev);
2270 netif_stop_queue(netdev);
2271 ixgb_reset(adapter);
2272
2273 /* Make sure the EEPROM is good */
2274 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
2275 DPRINTK(PROBE, ERR, "After reset, the EEPROM checksum is not valid.\n");
2276 return PCI_ERS_RESULT_DISCONNECT;
2277 }
2278 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
2279 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
2280
2281 if(!is_valid_ether_addr(netdev->perm_addr)) {
2282 DPRINTK(PROBE, ERR, "After reset, invalid MAC address.\n");
2283 return PCI_ERS_RESULT_DISCONNECT;
2284 }
2285
2286 return PCI_ERS_RESULT_RECOVERED;
2287}
2288
2289/**
2290 * ixgb_io_resume - called when its OK to resume normal operations
2291 * @pdev pointer to pci device with error
2292 *
2293 * The error recovery driver tells us that its OK to resume
2294 * normal operation. Implementation resembles the second-half
2295 * of the ixgb_probe() routine.
2296 */
2297static void ixgb_io_resume (struct pci_dev *pdev)
2298{
2299 struct net_device *netdev = pci_get_drvdata(pdev);
2300 struct ixgb_adapter *adapter = netdev->priv;
2301
2302 pci_set_master(pdev);
2303
2304 if(netif_running(netdev)) {
2305 if(ixgb_up(adapter)) {
2306 printk ("ixgb: can't bring device back up after reset\n");
2307 return;
2308 }
2309 }
2310
2311 netif_device_attach(netdev);
2312 mod_timer(&adapter->watchdog_timer, jiffies);
2313}
2314
1da177e4 2315/* ixgb_main.c */