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ixgbe: properly return CHECKSUM_NONE, cleanup csum code
[mirror_ubuntu-artful-kernel.git] / drivers / net / ixgbe / ixgbe_main.c
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9a799d71
AK		 1/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2007 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include <linux/types.h>
30#include <linux/module.h>
31#include <linux/pci.h>
32#include <linux/netdevice.h>
33#include <linux/vmalloc.h>
34#include <linux/string.h>
35#include <linux/in.h>
36#include <linux/ip.h>
37#include <linux/tcp.h>
38#include <linux/ipv6.h>
39#include <net/checksum.h>
40#include <net/ip6_checksum.h>
41#include <linux/ethtool.h>
42#include <linux/if_vlan.h>
43
44#include "ixgbe.h"
45#include "ixgbe_common.h"
46
47char ixgbe_driver_name[] = "ixgbe";
9c8eb720
SH		 48static const char ixgbe_driver_string[] =
49 "Intel(R) 10 Gigabit PCI Express Network Driver";
9a799d71
AK		 50
51#define DRV_VERSION "1.1.18"
9c8eb720
SH		 52const char ixgbe_driver_version[] = DRV_VERSION;
53static const char ixgbe_copyright[] =
54 "Copyright (c) 1999-2007 Intel Corporation.";
9a799d71
AK		 55
56static const struct ixgbe_info *ixgbe_info_tbl[] = {
3957d63d 57 [board_82598] = &ixgbe_82598_info,
9a799d71
AK		 58};
59
60/* ixgbe_pci_tbl - PCI Device ID Table
61 *
62 * Wildcard entries (PCI_ANY_ID) should come last
63 * Last entry must be all 0s
64 *
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
67 */
68static struct pci_device_id ixgbe_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
3957d63d 70 board_82598 },
9a799d71 71 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
3957d63d 72 board_82598 },
9a799d71 73 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT_DUAL_PORT),
3957d63d 74 board_82598 },
9a799d71 75 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
3957d63d 76 board_82598 },
9a799d71
AK		 77
78 /* required last entry */
79 {0, }
80};
81MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
82
83MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
84MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
85MODULE_LICENSE("GPL");
86MODULE_VERSION(DRV_VERSION);
87
88#define DEFAULT_DEBUG_LEVEL_SHIFT 3
89
5eba3699
AV		 90static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
91{
92 u32 ctrl_ext;
93
94 /* Let firmware take over control of h/w */
95 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
96 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
97 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
98}
99
100static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
101{
102 u32 ctrl_ext;
103
104 /* Let firmware know the driver has taken over */
105 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
106 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
107 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
108}
9a799d71
AK		 109
110#ifdef DEBUG
111/**
112 * ixgbe_get_hw_dev_name - return device name string
113 * used by hardware layer to print debugging information
114 **/
115char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw)
116{
117 struct ixgbe_adapter *adapter = hw->back;
118 struct net_device *netdev = adapter->netdev;
119 return netdev->name;
120}
121#endif
122
123static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
124 u8 msix_vector)
125{
126 u32 ivar, index;
127
128 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
129 index = (int_alloc_entry >> 2) & 0x1F;
130 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
131 ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
132 ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
133 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
134}
135
136static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
137 struct ixgbe_tx_buffer
138 *tx_buffer_info)
139{
140 if (tx_buffer_info->dma) {
141 pci_unmap_page(adapter->pdev,
142 tx_buffer_info->dma,
143 tx_buffer_info->length, PCI_DMA_TODEVICE);
144 tx_buffer_info->dma = 0;
145 }
146 if (tx_buffer_info->skb) {
147 dev_kfree_skb_any(tx_buffer_info->skb);
148 tx_buffer_info->skb = NULL;
149 }
150 /* tx_buffer_info must be completely set up in the transmit path */
151}
152
153static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
154 struct ixgbe_ring *tx_ring,
155 unsigned int eop,
156 union ixgbe_adv_tx_desc *eop_desc)
157{
158 /* Detect a transmit hang in hardware, this serializes the
159 * check with the clearing of time_stamp and movement of i */
160 adapter->detect_tx_hung = false;
161 if (tx_ring->tx_buffer_info[eop].dma &&
162 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
163 !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
164 /* detected Tx unit hang */
165 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
166 " TDH <%x>\n"
167 " TDT <%x>\n"
168 " next_to_use <%x>\n"
169 " next_to_clean <%x>\n"
170 "tx_buffer_info[next_to_clean]\n"
171 " time_stamp <%lx>\n"
172 " next_to_watch <%x>\n"
173 " jiffies <%lx>\n"
174 " next_to_watch.status <%x>\n",
175 readl(adapter->hw.hw_addr + tx_ring->head),
176 readl(adapter->hw.hw_addr + tx_ring->tail),
177 tx_ring->next_to_use,
178 tx_ring->next_to_clean,
179 tx_ring->tx_buffer_info[eop].time_stamp,
180 eop, jiffies, eop_desc->wb.status);
181 return true;
182 }
183
184 return false;
185}
186
e092be60
AV		 187#define IXGBE_MAX_TXD_PWR 14
188#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
189
190/* Tx Descriptors needed, worst case */
191#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
192 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
193#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
194 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
195
9a799d71
AK		 196/**
197 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
198 * @adapter: board private structure
199 **/
200static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
201 struct ixgbe_ring *tx_ring)
202{
203 struct net_device *netdev = adapter->netdev;
204 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
205 struct ixgbe_tx_buffer *tx_buffer_info;
206 unsigned int i, eop;
207 bool cleaned = false;
e092be60 208 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
9a799d71
AK		 209
210 i = tx_ring->next_to_clean;
211 eop = tx_ring->tx_buffer_info[i].next_to_watch;
212 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
213 while (eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) {
e092be60
AV		 214 cleaned = false;
215 while (!cleaned) {
9a799d71
AK		 216 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
217 tx_buffer_info = &tx_ring->tx_buffer_info[i];
218 cleaned = (i == eop);
219
220 tx_ring->stats.bytes += tx_buffer_info->length;
e092be60
AV		 221 if (cleaned) {
222 struct sk_buff *skb = tx_buffer_info->skb;
223#ifdef NETIF_F_TSO
224 unsigned int segs, bytecount;
225 segs = skb_shinfo(skb)->gso_segs ?: 1;
226 /* multiply data chunks by size of headers */
227 bytecount = ((segs - 1) * skb_headlen(skb)) +
228 skb->len;
229 total_tx_packets += segs;
230 total_tx_bytes += bytecount;
231#else
232 total_tx_packets++;
233 total_tx_bytes += skb->len;
234#endif
235 }
9a799d71
AK		 236 ixgbe_unmap_and_free_tx_resource(adapter,
237 tx_buffer_info);
238 tx_desc->wb.status = 0;
239
240 i++;
241 if (i == tx_ring->count)
242 i = 0;
243 }
244
245 tx_ring->stats.packets++;
246
247 eop = tx_ring->tx_buffer_info[i].next_to_watch;
248 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
249
250 /* weight of a sort for tx, avoid endless transmit cleanup */
e092be60 251 if (total_tx_packets >= tx_ring->work_limit)
9a799d71
AK		 252 break;
253 }
254
255 tx_ring->next_to_clean = i;
256
e092be60
AV		 257#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
258 if (total_tx_packets && netif_carrier_ok(netdev) &&
259 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
260 /* Make sure that anybody stopping the queue after this
261 * sees the new next_to_clean.
262 */
263 smp_mb();
264 if (netif_queue_stopped(netdev) &&
265 !test_bit(__IXGBE_DOWN, &adapter->state)) {
266 netif_wake_queue(netdev);
267 adapter->restart_queue++;
268 }
269 }
9a799d71
AK		 270
271 if (adapter->detect_tx_hung)
272 if (ixgbe_check_tx_hang(adapter, tx_ring, eop, eop_desc))
273 netif_stop_queue(netdev);
274
e092be60 275 if (total_tx_packets >= tx_ring->work_limit)
9a799d71
AK		 276 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->eims_value);
277
e092be60 278 cleaned = total_tx_packets ? true : false;
9a799d71
AK		 279 return cleaned;
280}
281
282/**
283 * ixgbe_receive_skb - Send a completed packet up the stack
284 * @adapter: board private structure
285 * @skb: packet to send up
286 * @is_vlan: packet has a VLAN tag
287 * @tag: VLAN tag from descriptor
288 **/
289static void ixgbe_receive_skb(struct ixgbe_adapter *adapter,
290 struct sk_buff *skb, bool is_vlan,
291 u16 tag)
292{
293 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
294 if (adapter->vlgrp && is_vlan)
295 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
296 else
297 netif_receive_skb(skb);
298 } else {
299
300 if (adapter->vlgrp && is_vlan)
301 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
302 else
303 netif_rx(skb);
304 }
305}
306
e59bd25d
AV		 307/**
308 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
309 * @adapter: address of board private structure
310 * @status_err: hardware indication of status of receive
311 * @skb: skb currently being received and modified
312 **/
9a799d71
AK		 313static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
314 u32 status_err,
315 struct sk_buff *skb)
316{
317 skb->ip_summed = CHECKSUM_NONE;
318
e59bd25d 319 /* Ignore Checksum bit is set, or rx csum disabled */
9a799d71 320 if ((status_err & IXGBE_RXD_STAT_IXSM) ||
e59bd25d 321 !(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
9a799d71 322 return;
e59bd25d
AV		 323
324 /* if IP and error */
325 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
326 (status_err & IXGBE_RXDADV_ERR_IPE)) {
9a799d71
AK		 327 adapter->hw_csum_rx_error++;
328 return;
329 }
e59bd25d
AV		 330
331 if (!(status_err & IXGBE_RXD_STAT_L4CS))
332 return;
333
334 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
335 adapter->hw_csum_rx_error++;
336 return;
337 }
338
9a799d71 339 /* It must be a TCP or UDP packet with a valid checksum */
e59bd25d 340 skb->ip_summed = CHECKSUM_UNNECESSARY;
9a799d71
AK		 341 adapter->hw_csum_rx_good++;
342}
343
344/**
345 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
346 * @adapter: address of board private structure
347 **/
348static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
349 struct ixgbe_ring *rx_ring,
350 int cleaned_count)
351{
352 struct net_device *netdev = adapter->netdev;
353 struct pci_dev *pdev = adapter->pdev;
354 union ixgbe_adv_rx_desc *rx_desc;
355 struct ixgbe_rx_buffer *rx_buffer_info;
356 struct sk_buff *skb;
357 unsigned int i;
358 unsigned int bufsz = adapter->rx_buf_len + NET_IP_ALIGN;
359
360 i = rx_ring->next_to_use;
361 rx_buffer_info = &rx_ring->rx_buffer_info[i];
362
363 while (cleaned_count--) {
364 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
365
366 if (!rx_buffer_info->page &&
367 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
368 rx_buffer_info->page = alloc_page(GFP_ATOMIC);
369 if (!rx_buffer_info->page) {
370 adapter->alloc_rx_page_failed++;
371 goto no_buffers;
372 }
373 rx_buffer_info->page_dma =
374 pci_map_page(pdev, rx_buffer_info->page,
375 0, PAGE_SIZE, PCI_DMA_FROMDEVICE);
376 }
377
378 if (!rx_buffer_info->skb) {
379 skb = netdev_alloc_skb(netdev, bufsz);
380
381 if (!skb) {
382 adapter->alloc_rx_buff_failed++;
383 goto no_buffers;
384 }
385
386 /*
387 * Make buffer alignment 2 beyond a 16 byte boundary
388 * this will result in a 16 byte aligned IP header after
389 * the 14 byte MAC header is removed
390 */
391 skb_reserve(skb, NET_IP_ALIGN);
392
393 rx_buffer_info->skb = skb;
394 rx_buffer_info->dma = pci_map_single(pdev, skb->data,
395 bufsz,
396 PCI_DMA_FROMDEVICE);
397 }
398 /* Refresh the desc even if buffer_addrs didn't change because
399 * each write-back erases this info. */
400 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
401 rx_desc->read.pkt_addr =
402 cpu_to_le64(rx_buffer_info->page_dma);
403 rx_desc->read.hdr_addr =
404 cpu_to_le64(rx_buffer_info->dma);
405 } else {
406 rx_desc->read.pkt_addr =
407 cpu_to_le64(rx_buffer_info->dma);
408 }
409
410 i++;
411 if (i == rx_ring->count)
412 i = 0;
413 rx_buffer_info = &rx_ring->rx_buffer_info[i];
414 }
415no_buffers:
416 if (rx_ring->next_to_use != i) {
417 rx_ring->next_to_use = i;
418 if (i-- == 0)
419 i = (rx_ring->count - 1);
420
421 /*
422 * Force memory writes to complete before letting h/w
423 * know there are new descriptors to fetch. (Only
424 * applicable for weak-ordered memory model archs,
425 * such as IA-64).
426 */
427 wmb();
428 writel(i, adapter->hw.hw_addr + rx_ring->tail);
429 }
430}
431
432static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
433 struct ixgbe_ring *rx_ring,
434 int *work_done, int work_to_do)
435{
436 struct net_device *netdev = adapter->netdev;
437 struct pci_dev *pdev = adapter->pdev;
438 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
439 struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
440 struct sk_buff *skb;
441 unsigned int i;
442 u32 upper_len, len, staterr;
443 u16 hdr_info, vlan_tag;
444 bool is_vlan, cleaned = false;
445 int cleaned_count = 0;
446
447 i = rx_ring->next_to_clean;
448 upper_len = 0;
449 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
450 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
451 rx_buffer_info = &rx_ring->rx_buffer_info[i];
452 is_vlan = (staterr & IXGBE_RXD_STAT_VP);
453 vlan_tag = le16_to_cpu(rx_desc->wb.upper.vlan);
454
455 while (staterr & IXGBE_RXD_STAT_DD) {
456 if (*work_done >= work_to_do)
457 break;
458 (*work_done)++;
459
460 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
461 hdr_info =
462 le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info);
463 len =
464 ((hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
465 IXGBE_RXDADV_HDRBUFLEN_SHIFT);
466 if (hdr_info & IXGBE_RXDADV_SPH)
467 adapter->rx_hdr_split++;
468 if (len > IXGBE_RX_HDR_SIZE)
469 len = IXGBE_RX_HDR_SIZE;
470 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
471 } else
472 len = le16_to_cpu(rx_desc->wb.upper.length);
473
474 cleaned = true;
475 skb = rx_buffer_info->skb;
476 prefetch(skb->data - NET_IP_ALIGN);
477 rx_buffer_info->skb = NULL;
478
479 if (len && !skb_shinfo(skb)->nr_frags) {
480 pci_unmap_single(pdev, rx_buffer_info->dma,
481 adapter->rx_buf_len + NET_IP_ALIGN,
482 PCI_DMA_FROMDEVICE);
483 skb_put(skb, len);
484 }
485
486 if (upper_len) {
487 pci_unmap_page(pdev, rx_buffer_info->page_dma,
488 PAGE_SIZE, PCI_DMA_FROMDEVICE);
489 rx_buffer_info->page_dma = 0;
490 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
491 rx_buffer_info->page, 0, upper_len);
492 rx_buffer_info->page = NULL;
493
494 skb->len += upper_len;
495 skb->data_len += upper_len;
496 skb->truesize += upper_len;
497 }
498
499 i++;
500 if (i == rx_ring->count)
501 i = 0;
502 next_buffer = &rx_ring->rx_buffer_info[i];
503
504 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
505 prefetch(next_rxd);
506
507 cleaned_count++;
508 if (staterr & IXGBE_RXD_STAT_EOP) {
509 rx_ring->stats.packets++;
510 rx_ring->stats.bytes += skb->len;
511 } else {
512 rx_buffer_info->skb = next_buffer->skb;
513 rx_buffer_info->dma = next_buffer->dma;
514 next_buffer->skb = skb;
515 adapter->non_eop_descs++;
516 goto next_desc;
517 }
518
519 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
520 dev_kfree_skb_irq(skb);
521 goto next_desc;
522 }
523
524 ixgbe_rx_checksum(adapter, staterr, skb);
525 skb->protocol = eth_type_trans(skb, netdev);
526 ixgbe_receive_skb(adapter, skb, is_vlan, vlan_tag);
527 netdev->last_rx = jiffies;
528
529next_desc:
530 rx_desc->wb.upper.status_error = 0;
531
532 /* return some buffers to hardware, one at a time is too slow */
533 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
534 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
535 cleaned_count = 0;
536 }
537
538 /* use prefetched values */
539 rx_desc = next_rxd;
540 rx_buffer_info = next_buffer;
541
542 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
543 is_vlan = (staterr & IXGBE_RXD_STAT_VP);
544 vlan_tag = le16_to_cpu(rx_desc->wb.upper.vlan);
545 }
546
547 rx_ring->next_to_clean = i;
548 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
549
550 if (cleaned_count)
551 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
552
553 return cleaned;
554}
555
556#define IXGBE_MAX_INTR 10
557/**
558 * ixgbe_configure_msix - Configure MSI-X hardware
559 * @adapter: board private structure
560 *
561 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
562 * interrupts.
563 **/
564static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
565{
566 int i, vector = 0;
567
568 for (i = 0; i < adapter->num_tx_queues; i++) {
569 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(i),
570 IXGBE_MSIX_VECTOR(vector));
571 writel(EITR_INTS_PER_SEC_TO_REG(adapter->tx_eitr),
572 adapter->hw.hw_addr + adapter->tx_ring[i].itr_register);
573 vector++;
574 }
575
576 for (i = 0; i < adapter->num_rx_queues; i++) {
577 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(i),
578 IXGBE_MSIX_VECTOR(vector));
579 writel(EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr),
580 adapter->hw.hw_addr + adapter->rx_ring[i].itr_register);
581 vector++;
582 }
583
584 vector = adapter->num_tx_queues + adapter->num_rx_queues;
585 ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX,
586 IXGBE_MSIX_VECTOR(vector));
587 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(vector), 1950);
588}
589
590static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
591{
592 struct net_device *netdev = data;
593 struct ixgbe_adapter *adapter = netdev_priv(netdev);
594 struct ixgbe_hw *hw = &adapter->hw;
595 u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
596
597 if (eicr & IXGBE_EICR_LSC) {
598 adapter->lsc_int++;
599 if (!test_bit(__IXGBE_DOWN, &adapter->state))
600 mod_timer(&adapter->watchdog_timer, jiffies);
601 }
d4f80882
AV		 602
603 if (!test_bit(__IXGBE_DOWN, &adapter->state))
604 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
9a799d71
AK		 605
606 return IRQ_HANDLED;
607}
608
609static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
610{
611 struct ixgbe_ring *txr = data;
612 struct ixgbe_adapter *adapter = txr->adapter;
613
614 ixgbe_clean_tx_irq(adapter, txr);
615
616 return IRQ_HANDLED;
617}
618
619static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
620{
621 struct ixgbe_ring *rxr = data;
622 struct ixgbe_adapter *adapter = rxr->adapter;
623
624 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rxr->eims_value);
625 netif_rx_schedule(adapter->netdev, &adapter->napi);
626 return IRQ_HANDLED;
627}
628
629static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
630{
631 struct ixgbe_adapter *adapter = container_of(napi,
632 struct ixgbe_adapter, napi);
633 struct net_device *netdev = adapter->netdev;
634 int work_done = 0;
635 struct ixgbe_ring *rxr = adapter->rx_ring;
636
637 /* Keep link state information with original netdev */
638 if (!netif_carrier_ok(netdev))
639 goto quit_polling;
640
641 ixgbe_clean_rx_irq(adapter, rxr, &work_done, budget);
642
643 /* If no Tx and not enough Rx work done, exit the polling mode */
644 if ((work_done < budget) || !netif_running(netdev)) {
645quit_polling:
646 netif_rx_complete(netdev, napi);
647 if (!test_bit(__IXGBE_DOWN, &adapter->state))
648 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS,
649 rxr->eims_value);
650 }
651
652 return work_done;
653}
654
655/**
656 * ixgbe_setup_msix - Initialize MSI-X interrupts
657 *
658 * ixgbe_setup_msix allocates MSI-X vectors and requests
659 * interrutps from the kernel.
660 **/
661static int ixgbe_setup_msix(struct ixgbe_adapter *adapter)
662{
663 struct net_device *netdev = adapter->netdev;
664 int i, int_vector = 0, err = 0;
665 int max_msix_count;
666
667 /* +1 for the LSC interrupt */
668 max_msix_count = adapter->num_rx_queues + adapter->num_tx_queues + 1;
669 adapter->msix_entries = kcalloc(max_msix_count,
670 sizeof(struct msix_entry), GFP_KERNEL);
671 if (!adapter->msix_entries)
672 return -ENOMEM;
673
674 for (i = 0; i < max_msix_count; i++)
675 adapter->msix_entries[i].entry = i;
676
677 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
678 max_msix_count);
679 if (err)
680 goto out;
681
682 for (i = 0; i < adapter->num_tx_queues; i++) {
683 sprintf(adapter->tx_ring[i].name, "%s-tx%d", netdev->name, i);
684 err = request_irq(adapter->msix_entries[int_vector].vector,
685 &ixgbe_msix_clean_tx,
686 0,
687 adapter->tx_ring[i].name,
688 &(adapter->tx_ring[i]));
689 if (err) {
690 DPRINTK(PROBE, ERR,
691 "request_irq failed for MSIX interrupt "
692 "Error: %d\n", err);
693 goto release_irqs;
694 }
695 adapter->tx_ring[i].eims_value =
696 (1 << IXGBE_MSIX_VECTOR(int_vector));
697 adapter->tx_ring[i].itr_register = IXGBE_EITR(int_vector);
698 int_vector++;
699 }
700
701 for (i = 0; i < adapter->num_rx_queues; i++) {
702 if (strlen(netdev->name) < (IFNAMSIZ - 5))
703 sprintf(adapter->rx_ring[i].name,
704 "%s-rx%d", netdev->name, i);
705 else
706 memcpy(adapter->rx_ring[i].name,
707 netdev->name, IFNAMSIZ);
708 err = request_irq(adapter->msix_entries[int_vector].vector,
709 &ixgbe_msix_clean_rx, 0,
710 adapter->rx_ring[i].name,
711 &(adapter->rx_ring[i]));
712 if (err) {
713 DPRINTK(PROBE, ERR,
714 "request_irq failed for MSIX interrupt "
715 "Error: %d\n", err);
716 goto release_irqs;
717 }
718
719 adapter->rx_ring[i].eims_value =
720 (1 << IXGBE_MSIX_VECTOR(int_vector));
721 adapter->rx_ring[i].itr_register = IXGBE_EITR(int_vector);
722 int_vector++;
723 }
724
725 sprintf(adapter->lsc_name, "%s-lsc", netdev->name);
726 err = request_irq(adapter->msix_entries[int_vector].vector,
727 &ixgbe_msix_lsc, 0, adapter->lsc_name, netdev);
728 if (err) {
729 DPRINTK(PROBE, ERR,
730 "request_irq for msix_lsc failed: %d\n", err);
731 goto release_irqs;
732 }
733
734 /* FIXME: implement netif_napi_remove() instead */
735 adapter->napi.poll = ixgbe_clean_rxonly;
736 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED;
737 return 0;
738
739release_irqs:
740 int_vector--;
741 for (; int_vector >= adapter->num_tx_queues; int_vector--)
742 free_irq(adapter->msix_entries[int_vector].vector,
743 &(adapter->rx_ring[int_vector -
744 adapter->num_tx_queues]));
745
746 for (; int_vector >= 0; int_vector--)
747 free_irq(adapter->msix_entries[int_vector].vector,
748 &(adapter->tx_ring[int_vector]));
749out:
750 kfree(adapter->msix_entries);
751 adapter->msix_entries = NULL;
752 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
753 return err;
754}
755
756/**
757 * ixgbe_intr - Interrupt Handler
758 * @irq: interrupt number
759 * @data: pointer to a network interface device structure
760 * @pt_regs: CPU registers structure
761 **/
762static irqreturn_t ixgbe_intr(int irq, void *data)
763{
764 struct net_device *netdev = data;
765 struct ixgbe_adapter *adapter = netdev_priv(netdev);
766 struct ixgbe_hw *hw = &adapter->hw;
767 u32 eicr;
768
769 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
770
771 if (!eicr)
772 return IRQ_NONE; /* Not our interrupt */
773
774 if (eicr & IXGBE_EICR_LSC) {
775 adapter->lsc_int++;
776 if (!test_bit(__IXGBE_DOWN, &adapter->state))
777 mod_timer(&adapter->watchdog_timer, jiffies);
778 }
779 if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
780 /* Disable interrupts and register for poll. The flush of the
781 * posted write is intentionally left out. */
9a799d71
AK		 782 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
783 __netif_rx_schedule(netdev, &adapter->napi);
784 }
785
786 return IRQ_HANDLED;
787}
788
789/**
790 * ixgbe_request_irq - initialize interrupts
791 * @adapter: board private structure
792 *
793 * Attempts to configure interrupts using the best available
794 * capabilities of the hardware and kernel.
795 **/
796static int ixgbe_request_irq(struct ixgbe_adapter *adapter, u32 *num_rx_queues)
797{
798 struct net_device *netdev = adapter->netdev;
799 int flags, err;
28fc1f5a 800 irq_handler_t handler = ixgbe_intr;
9a799d71
AK		 801
802 flags = IRQF_SHARED;
803
804 err = ixgbe_setup_msix(adapter);
805 if (!err)
806 goto request_done;
807
808 /*
809 * if we can't do MSI-X, fall through and try MSI
810 * No need to reallocate memory since we're decreasing the number of
811 * queues. We just won't use the other ones, also it is freed correctly
812 * on ixgbe_remove.
813 */
814 *num_rx_queues = 1;
815
816 /* do MSI */
817 err = pci_enable_msi(adapter->pdev);
818 if (!err) {
819 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
820 flags &= ~IRQF_SHARED;
821 handler = &ixgbe_intr;
822 }
823
824 err = request_irq(adapter->pdev->irq, handler, flags,
825 netdev->name, netdev);
826 if (err)
827 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
828
829request_done:
830 return err;
831}
832
833static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
834{
835 struct net_device *netdev = adapter->netdev;
836
837 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
838 int i;
839
840 for (i = 0; i < adapter->num_tx_queues; i++)
841 free_irq(adapter->msix_entries[i].vector,
842 &(adapter->tx_ring[i]));
843 for (i = 0; i < adapter->num_rx_queues; i++)
844 free_irq(adapter->msix_entries[i +
845 adapter->num_tx_queues].vector,
846 &(adapter->rx_ring[i]));
847 i = adapter->num_rx_queues + adapter->num_tx_queues;
848 free_irq(adapter->msix_entries[i].vector, netdev);
849 pci_disable_msix(adapter->pdev);
850 kfree(adapter->msix_entries);
851 adapter->msix_entries = NULL;
852 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
853 return;
854 }
855
856 free_irq(adapter->pdev->irq, netdev);
857 if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
858 pci_disable_msi(adapter->pdev);
859 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
860 }
861}
862
863/**
864 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
865 * @adapter: board private structure
866 **/
867static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
868{
9a799d71
AK		 869 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
870 IXGBE_WRITE_FLUSH(&adapter->hw);
871 synchronize_irq(adapter->pdev->irq);
872}
873
874/**
875 * ixgbe_irq_enable - Enable default interrupt generation settings
876 * @adapter: board private structure
877 **/
878static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
879{
d4f80882
AV		 880 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
881 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC,
882 (IXGBE_EIMS_ENABLE_MASK &
883 ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC)));
884 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS,
885 IXGBE_EIMS_ENABLE_MASK);
886 IXGBE_WRITE_FLUSH(&adapter->hw);
9a799d71
AK		 887}
888
889/**
890 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
891 *
892 **/
893static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
894{
895 int i;
896 struct ixgbe_hw *hw = &adapter->hw;
897
898 if (adapter->rx_eitr)
899 IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
900 EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr));
901
902 /* for re-triggering the interrupt in non-NAPI mode */
903 adapter->rx_ring[0].eims_value = (1 << IXGBE_MSIX_VECTOR(0));
904 adapter->tx_ring[0].eims_value = (1 << IXGBE_MSIX_VECTOR(0));
905
906 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
907 for (i = 0; i < adapter->num_tx_queues; i++)
908 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(i), i);
909}
910
911/**
912 * ixgbe_configure_tx - Configure 8254x Transmit Unit after Reset
913 * @adapter: board private structure
914 *
915 * Configure the Tx unit of the MAC after a reset.
916 **/
917static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
918{
919 u64 tdba;
920 struct ixgbe_hw *hw = &adapter->hw;
921 u32 i, tdlen;
922
923 /* Setup the HW Tx Head and Tail descriptor pointers */
924 for (i = 0; i < adapter->num_tx_queues; i++) {
925 tdba = adapter->tx_ring[i].dma;
926 tdlen = adapter->tx_ring[i].count *
927 sizeof(union ixgbe_adv_tx_desc);
928 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(i), (tdba & DMA_32BIT_MASK));
929 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(i), (tdba >> 32));
930 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(i), tdlen);
931 IXGBE_WRITE_REG(hw, IXGBE_TDH(i), 0);
932 IXGBE_WRITE_REG(hw, IXGBE_TDT(i), 0);
933 adapter->tx_ring[i].head = IXGBE_TDH(i);
934 adapter->tx_ring[i].tail = IXGBE_TDT(i);
935 }
936
937 IXGBE_WRITE_REG(hw, IXGBE_TIPG, IXGBE_TIPG_FIBER_DEFAULT);
938}
939
940#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
941 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
942
943#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
944/**
945 * ixgbe_configure_rx - Configure 8254x Receive Unit after Reset
946 * @adapter: board private structure
947 *
948 * Configure the Rx unit of the MAC after a reset.
949 **/
950static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
951{
952 u64 rdba;
953 struct ixgbe_hw *hw = &adapter->hw;
954 struct net_device *netdev = adapter->netdev;
955 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
956 u32 rdlen, rxctrl, rxcsum;
957 u32 random[10];
958 u32 reta, mrqc;
959 int i;
960 u32 fctrl, hlreg0;
961 u32 srrctl;
962 u32 pages;
963
964 /* Decide whether to use packet split mode or not */
965 if (netdev->mtu > ETH_DATA_LEN)
966 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
967 else
968 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
969
970 /* Set the RX buffer length according to the mode */
971 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
972 adapter->rx_buf_len = IXGBE_RX_HDR_SIZE;
973 } else {
974 if (netdev->mtu <= ETH_DATA_LEN)
975 adapter->rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
976 else
977 adapter->rx_buf_len = ALIGN(max_frame, 1024);
978 }
979
980 fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
981 fctrl |= IXGBE_FCTRL_BAM;
982 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
983
984 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
985 if (adapter->netdev->mtu <= ETH_DATA_LEN)
986 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
987 else
988 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
989 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
990
991 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
992
993 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(0));
994 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
995 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
996
997 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
998 srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
999 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1000 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1001 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1002 IXGBE_SRRCTL_BSIZEHDR_MASK);
1003 } else {
1004 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1005
1006 if (adapter->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1007 srrctl |=
1008 IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1009 else
1010 srrctl |=
1011 adapter->rx_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1012 }
1013 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(0), srrctl);
1014
1015 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1016 /* disable receives while setting up the descriptors */
1017 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1018 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1019
1020 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1021 * the Base and Length of the Rx Descriptor Ring */
1022 for (i = 0; i < adapter->num_rx_queues; i++) {
1023 rdba = adapter->rx_ring[i].dma;
1024 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(i), (rdba & DMA_32BIT_MASK));
1025 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(i), (rdba >> 32));
1026 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(i), rdlen);
1027 IXGBE_WRITE_REG(hw, IXGBE_RDH(i), 0);
1028 IXGBE_WRITE_REG(hw, IXGBE_RDT(i), 0);
1029 adapter->rx_ring[i].head = IXGBE_RDH(i);
1030 adapter->rx_ring[i].tail = IXGBE_RDT(i);
1031 }
1032
1033 if (adapter->num_rx_queues > 1) {
1034 /* Random 40bytes used as random key in RSS hash function */
1035 get_random_bytes(&random[0], 40);
1036
1037 switch (adapter->num_rx_queues) {
1038 case 8:
1039 case 4:
1040 /* Bits [3:0] in each byte refers the Rx queue no */
1041 reta = 0x00010203;
1042 break;
1043 case 2:
1044 reta = 0x00010001;
1045 break;
1046 default:
1047 reta = 0x00000000;
1048 break;
1049 }
1050
1051 /* Fill out redirection table */
1052 for (i = 0; i < 32; i++) {
1053 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RETA(0), i, reta);
1054 if (adapter->num_rx_queues > 4) {
1055 i++;
1056 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RETA(0), i,
1057 0x04050607);
1058 }
1059 }
1060
1061 /* Fill out hash function seeds */
1062 for (i = 0; i < 10; i++)
1063 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RSSRK(0), i, random[i]);
1064
1065 mrqc = IXGBE_MRQC_RSSEN
1066 /* Perform hash on these packet types */
1067 | IXGBE_MRQC_RSS_FIELD_IPV4
1068 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1069 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1070 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1071 | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1072 | IXGBE_MRQC_RSS_FIELD_IPV6
1073 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1074 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1075 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1076 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1077
1078 /* Multiqueue and packet checksumming are mutually exclusive. */
1079 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1080 rxcsum |= IXGBE_RXCSUM_PCSD;
1081 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1082 } else {
1083 /* Enable Receive Checksum Offload for TCP and UDP */
1084 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1085 if (adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1086 /* Enable IPv4 payload checksum for UDP fragments
1087 * Must be used in conjunction with packet-split. */
1088 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1089 } else {
1090 /* don't need to clear IPPCSE as it defaults to 0 */
1091 }
1092 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1093 }
1094 /* Enable Receives */
1095 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl);
1096 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1097}
1098
1099static void ixgbe_vlan_rx_register(struct net_device *netdev,
1100 struct vlan_group *grp)
1101{
1102 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1103 u32 ctrl;
1104
d4f80882
AV		 1105 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1106 ixgbe_irq_disable(adapter);
9a799d71
AK		 1107 adapter->vlgrp = grp;
1108
1109 if (grp) {
1110 /* enable VLAN tag insert/strip */
1111 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1112 ctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
1113 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1114 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1115 }
1116
d4f80882
AV		 1117 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1118 ixgbe_irq_enable(adapter);
9a799d71
AK		 1119}
1120
1121static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1122{
1123 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1124
1125 /* add VID to filter table */
1126 ixgbe_set_vfta(&adapter->hw, vid, 0, true);
1127}
1128
1129static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1130{
1131 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1132
d4f80882
AV		 1133 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1134 ixgbe_irq_disable(adapter);
1135
9a799d71 1136 vlan_group_set_device(adapter->vlgrp, vid, NULL);
d4f80882
AV		 1137
1138 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1139 ixgbe_irq_enable(adapter);
9a799d71
AK		 1140
1141 /* remove VID from filter table */
1142 ixgbe_set_vfta(&adapter->hw, vid, 0, false);
1143}
1144
1145static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1146{
1147 ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1148
1149 if (adapter->vlgrp) {
1150 u16 vid;
1151 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1152 if (!vlan_group_get_device(adapter->vlgrp, vid))
1153 continue;
1154 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1155 }
1156 }
1157}
1158
1159/**
1160 * ixgbe_set_multi - Multicast and Promiscuous mode set
1161 * @netdev: network interface device structure
1162 *
1163 * The set_multi entry point is called whenever the multicast address
1164 * list or the network interface flags are updated. This routine is
1165 * responsible for configuring the hardware for proper multicast,
1166 * promiscuous mode, and all-multi behavior.
1167 **/
1168static void ixgbe_set_multi(struct net_device *netdev)
1169{
1170 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1171 struct ixgbe_hw *hw = &adapter->hw;
1172 struct dev_mc_list *mc_ptr;
1173 u8 *mta_list;
1174 u32 fctrl;
1175 int i;
1176
1177 /* Check for Promiscuous and All Multicast modes */
1178
1179 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1180
1181 if (netdev->flags & IFF_PROMISC) {
1182 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1183 } else if (netdev->flags & IFF_ALLMULTI) {
1184 fctrl |= IXGBE_FCTRL_MPE;
1185 fctrl &= ~IXGBE_FCTRL_UPE;
1186 } else {
1187 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1188 }
1189
1190 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1191
1192 if (netdev->mc_count) {
1193 mta_list = kcalloc(netdev->mc_count, ETH_ALEN, GFP_ATOMIC);
1194 if (!mta_list)
1195 return;
1196
1197 /* Shared function expects packed array of only addresses. */
1198 mc_ptr = netdev->mc_list;
1199
1200 for (i = 0; i < netdev->mc_count; i++) {
1201 if (!mc_ptr)
1202 break;
1203 memcpy(mta_list + (i * ETH_ALEN), mc_ptr->dmi_addr,
1204 ETH_ALEN);
1205 mc_ptr = mc_ptr->next;
1206 }
1207
1208 ixgbe_update_mc_addr_list(hw, mta_list, i, 0);
1209 kfree(mta_list);
1210 } else {
1211 ixgbe_update_mc_addr_list(hw, NULL, 0, 0);
1212 }
1213
1214}
1215
1216static void ixgbe_configure(struct ixgbe_adapter *adapter)
1217{
1218 struct net_device *netdev = adapter->netdev;
1219 int i;
1220
1221 ixgbe_set_multi(netdev);
1222
1223 ixgbe_restore_vlan(adapter);
1224
1225 ixgbe_configure_tx(adapter);
1226 ixgbe_configure_rx(adapter);
1227 for (i = 0; i < adapter->num_rx_queues; i++)
1228 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1229 (adapter->rx_ring[i].count - 1));
1230}
1231
1232static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1233{
1234 struct net_device *netdev = adapter->netdev;
1235 int i;
1236 u32 gpie = 0;
1237 struct ixgbe_hw *hw = &adapter->hw;
1238 u32 txdctl, rxdctl, mhadd;
1239 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1240
5eba3699
AV		 1241 ixgbe_get_hw_control(adapter);
1242
9a799d71
AK		 1243 if (adapter->flags & (IXGBE_FLAG_MSIX_ENABLED |
1244 IXGBE_FLAG_MSI_ENABLED)) {
1245 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1246 gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
1247 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
1248 } else {
1249 /* MSI only */
1250 gpie = (IXGBE_GPIE_EIAME |
1251 IXGBE_GPIE_PBA_SUPPORT);
1252 }
1253 IXGBE_WRITE_REG(&adapter->hw, IXGBE_GPIE, gpie);
1254 gpie = IXGBE_READ_REG(&adapter->hw, IXGBE_GPIE);
1255 }
1256
1257 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
1258
1259 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
1260 mhadd &= ~IXGBE_MHADD_MFS_MASK;
1261 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
1262
1263 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
1264 }
1265
1266 for (i = 0; i < adapter->num_tx_queues; i++) {
1267 txdctl = IXGBE_READ_REG(&adapter->hw, IXGBE_TXDCTL(i));
1268 txdctl |= IXGBE_TXDCTL_ENABLE;
1269 IXGBE_WRITE_REG(&adapter->hw, IXGBE_TXDCTL(i), txdctl);
1270 }
1271
1272 for (i = 0; i < adapter->num_rx_queues; i++) {
1273 rxdctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXDCTL(i));
1274 rxdctl |= IXGBE_RXDCTL_ENABLE;
1275 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXDCTL(i), rxdctl);
1276 }
1277 /* enable all receives */
1278 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1279 rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
1280 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
1281
1282 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
1283 ixgbe_configure_msix(adapter);
1284 else
1285 ixgbe_configure_msi_and_legacy(adapter);
1286
1287 clear_bit(__IXGBE_DOWN, &adapter->state);
1288 napi_enable(&adapter->napi);
1289 ixgbe_irq_enable(adapter);
1290
1291 /* bring the link up in the watchdog, this could race with our first
1292 * link up interrupt but shouldn't be a problem */
1293 mod_timer(&adapter->watchdog_timer, jiffies);
1294 return 0;
1295}
1296
d4f80882
AV		 1297void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
1298{
1299 WARN_ON(in_interrupt());
1300 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
1301 msleep(1);
1302 ixgbe_down(adapter);
1303 ixgbe_up(adapter);
1304 clear_bit(__IXGBE_RESETTING, &adapter->state);
1305}
1306
9a799d71
AK		 1307int ixgbe_up(struct ixgbe_adapter *adapter)
1308{
1309 /* hardware has been reset, we need to reload some things */
1310 ixgbe_configure(adapter);
1311
1312 return ixgbe_up_complete(adapter);
1313}
1314
1315void ixgbe_reset(struct ixgbe_adapter *adapter)
1316{
1317 if (ixgbe_init_hw(&adapter->hw))
1318 DPRINTK(PROBE, ERR, "Hardware Error\n");
1319
1320 /* reprogram the RAR[0] in case user changed it. */
1321 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
1322
1323}
1324
1325#ifdef CONFIG_PM
1326static int ixgbe_resume(struct pci_dev *pdev)
1327{
1328 struct net_device *netdev = pci_get_drvdata(pdev);
1329 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1330 u32 err, num_rx_queues = adapter->num_rx_queues;
1331
1332 pci_set_power_state(pdev, PCI_D0);
1333 pci_restore_state(pdev);
1334 err = pci_enable_device(pdev);
1335 if (err) {
1336 printk(KERN_ERR "ixgbe: Cannot enable PCI device from " \
1337 "suspend\n");
1338 return err;
1339 }
1340 pci_set_master(pdev);
1341
1342 pci_enable_wake(pdev, PCI_D3hot, 0);
1343 pci_enable_wake(pdev, PCI_D3cold, 0);
1344
1345 if (netif_running(netdev)) {
1346 err = ixgbe_request_irq(adapter, &num_rx_queues);
1347 if (err)
1348 return err;
1349 }
1350
1351 ixgbe_reset(adapter);
1352
1353 if (netif_running(netdev))
1354 ixgbe_up(adapter);
1355
1356 netif_device_attach(netdev);
1357
1358 return 0;
1359}
1360#endif
1361
1362/**
1363 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
1364 * @adapter: board private structure
1365 * @rx_ring: ring to free buffers from
1366 **/
1367static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
1368 struct ixgbe_ring *rx_ring)
1369{
1370 struct pci_dev *pdev = adapter->pdev;
1371 unsigned long size;
1372 unsigned int i;
1373
1374 /* Free all the Rx ring sk_buffs */
1375
1376 for (i = 0; i < rx_ring->count; i++) {
1377 struct ixgbe_rx_buffer *rx_buffer_info;
1378
1379 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1380 if (rx_buffer_info->dma) {
1381 pci_unmap_single(pdev, rx_buffer_info->dma,
1382 adapter->rx_buf_len,
1383 PCI_DMA_FROMDEVICE);
1384 rx_buffer_info->dma = 0;
1385 }
1386 if (rx_buffer_info->skb) {
1387 dev_kfree_skb(rx_buffer_info->skb);
1388 rx_buffer_info->skb = NULL;
1389 }
1390 if (!rx_buffer_info->page)
1391 continue;
1392 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE,
1393 PCI_DMA_FROMDEVICE);
1394 rx_buffer_info->page_dma = 0;
1395
1396 put_page(rx_buffer_info->page);
1397 rx_buffer_info->page = NULL;
1398 }
1399
1400 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
1401 memset(rx_ring->rx_buffer_info, 0, size);
1402
1403 /* Zero out the descriptor ring */
1404 memset(rx_ring->desc, 0, rx_ring->size);
1405
1406 rx_ring->next_to_clean = 0;
1407 rx_ring->next_to_use = 0;
1408
1409 writel(0, adapter->hw.hw_addr + rx_ring->head);
1410 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1411}
1412
1413/**
1414 * ixgbe_clean_tx_ring - Free Tx Buffers
1415 * @adapter: board private structure
1416 * @tx_ring: ring to be cleaned
1417 **/
1418static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
1419 struct ixgbe_ring *tx_ring)
1420{
1421 struct ixgbe_tx_buffer *tx_buffer_info;
1422 unsigned long size;
1423 unsigned int i;
1424
1425 /* Free all the Tx ring sk_buffs */
1426
1427 for (i = 0; i < tx_ring->count; i++) {
1428 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1429 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1430 }
1431
1432 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
1433 memset(tx_ring->tx_buffer_info, 0, size);
1434
1435 /* Zero out the descriptor ring */
1436 memset(tx_ring->desc, 0, tx_ring->size);
1437
1438 tx_ring->next_to_use = 0;
1439 tx_ring->next_to_clean = 0;
1440
1441 writel(0, adapter->hw.hw_addr + tx_ring->head);
1442 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1443}
1444
1445/**
1446 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
1447 * @adapter: board private structure
1448 **/
1449static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
1450{
1451 int i;
1452
1453 for (i = 0; i < adapter->num_tx_queues; i++)
1454 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1455}
1456
1457/**
1458 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
1459 * @adapter: board private structure
1460 **/
1461static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
1462{
1463 int i;
1464
1465 for (i = 0; i < adapter->num_rx_queues; i++)
1466 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1467}
1468
1469void ixgbe_down(struct ixgbe_adapter *adapter)
1470{
1471 struct net_device *netdev = adapter->netdev;
1472 u32 rxctrl;
1473
1474 /* signal that we are down to the interrupt handler */
1475 set_bit(__IXGBE_DOWN, &adapter->state);
1476
1477 /* disable receives */
1478 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1479 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL,
1480 rxctrl & ~IXGBE_RXCTRL_RXEN);
1481
1482 netif_tx_disable(netdev);
1483
1484 /* disable transmits in the hardware */
1485
1486 /* flush both disables */
1487 IXGBE_WRITE_FLUSH(&adapter->hw);
1488 msleep(10);
1489
49d85c50 1490 napi_disable(&adapter->napi);
49d85c50 1491
9a799d71
AK		 1492 ixgbe_irq_disable(adapter);
1493
9a799d71
AK		 1494 del_timer_sync(&adapter->watchdog_timer);
1495
1496 netif_carrier_off(netdev);
1497 netif_stop_queue(netdev);
1498
1499 ixgbe_reset(adapter);
1500 ixgbe_clean_all_tx_rings(adapter);
1501 ixgbe_clean_all_rx_rings(adapter);
1502
1503}
1504
1505static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
1506{
1507 struct net_device *netdev = pci_get_drvdata(pdev);
1508 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1509#ifdef CONFIG_PM
1510 int retval = 0;
1511#endif
1512
1513 netif_device_detach(netdev);
1514
1515 if (netif_running(netdev)) {
1516 ixgbe_down(adapter);
1517 ixgbe_free_irq(adapter);
1518 }
1519
1520#ifdef CONFIG_PM
1521 retval = pci_save_state(pdev);
1522 if (retval)
1523 return retval;
1524#endif
1525
1526 pci_enable_wake(pdev, PCI_D3hot, 0);
1527 pci_enable_wake(pdev, PCI_D3cold, 0);
1528
5eba3699
AV		 1529 ixgbe_release_hw_control(adapter);
1530
9a799d71
AK		 1531 pci_disable_device(pdev);
1532
1533 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1534
1535 return 0;
1536}
1537
1538static void ixgbe_shutdown(struct pci_dev *pdev)
1539{
1540 ixgbe_suspend(pdev, PMSG_SUSPEND);
1541}
1542
1543/**
1544 * ixgbe_clean - NAPI Rx polling callback
1545 * @adapter: board private structure
1546 **/
1547static int ixgbe_clean(struct napi_struct *napi, int budget)
1548{
1549 struct ixgbe_adapter *adapter = container_of(napi,
1550 struct ixgbe_adapter, napi);
1551 struct net_device *netdev = adapter->netdev;
d2c7ddd6 1552 int tx_cleaned = 0, work_done = 0;
9a799d71 1553
9a799d71 1554 /* In non-MSIX case, there is no multi-Tx/Rx queue */
d2c7ddd6 1555 tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
9a799d71
AK		 1556 ixgbe_clean_rx_irq(adapter, &adapter->rx_ring[0], &work_done,
1557 budget);
1558
d2c7ddd6
DM		 1559 if (tx_cleaned)
1560 work_done = budget;
1561
53e52c72
DM		 1562 /* If budget not fully consumed, exit the polling mode */
1563 if (work_done < budget) {
9a799d71 1564 netif_rx_complete(netdev, napi);
d4f80882
AV		 1565 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1566 ixgbe_irq_enable(adapter);
9a799d71
AK		 1567 }
1568
1569 return work_done;
1570}
1571
1572/**
1573 * ixgbe_tx_timeout - Respond to a Tx Hang
1574 * @netdev: network interface device structure
1575 **/
1576static void ixgbe_tx_timeout(struct net_device *netdev)
1577{
1578 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1579
1580 /* Do the reset outside of interrupt context */
1581 schedule_work(&adapter->reset_task);
1582}
1583
1584static void ixgbe_reset_task(struct work_struct *work)
1585{
1586 struct ixgbe_adapter *adapter;
1587 adapter = container_of(work, struct ixgbe_adapter, reset_task);
1588
1589 adapter->tx_timeout_count++;
1590
d4f80882 1591 ixgbe_reinit_locked(adapter);
9a799d71
AK		 1592}
1593
1594/**
1595 * ixgbe_alloc_queues - Allocate memory for all rings
1596 * @adapter: board private structure to initialize
1597 *
1598 * We allocate one ring per queue at run-time since we don't know the
1599 * number of queues at compile-time. The polling_netdev array is
1600 * intended for Multiqueue, but should work fine with a single queue.
1601 **/
1602static int __devinit ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
1603{
1604 int i;
1605
1606 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1607 sizeof(struct ixgbe_ring), GFP_KERNEL);
1608 if (!adapter->tx_ring)
1609 return -ENOMEM;
1610
1611 for (i = 0; i < adapter->num_tx_queues; i++)
1612 adapter->tx_ring[i].count = IXGBE_DEFAULT_TXD;
1613
1614 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1615 sizeof(struct ixgbe_ring), GFP_KERNEL);
1616 if (!adapter->rx_ring) {
1617 kfree(adapter->tx_ring);
1618 return -ENOMEM;
1619 }
1620
1621 for (i = 0; i < adapter->num_rx_queues; i++) {
1622 adapter->rx_ring[i].adapter = adapter;
1623 adapter->rx_ring[i].itr_register = IXGBE_EITR(i);
1624 adapter->rx_ring[i].count = IXGBE_DEFAULT_RXD;
1625 }
1626
1627 return 0;
1628}
1629
1630/**
1631 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
1632 * @adapter: board private structure to initialize
1633 *
1634 * ixgbe_sw_init initializes the Adapter private data structure.
1635 * Fields are initialized based on PCI device information and
1636 * OS network device settings (MTU size).
1637 **/
1638static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
1639{
1640 struct ixgbe_hw *hw = &adapter->hw;
1641 struct pci_dev *pdev = adapter->pdev;
1642
1643 /* default flow control settings */
1644 hw->fc.original_type = ixgbe_fc_full;
1645 hw->fc.type = ixgbe_fc_full;
1646
1647 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
1648 if (hw->mac.ops.reset(hw)) {
1649 dev_err(&pdev->dev, "HW Init failed\n");
1650 return -EIO;
1651 }
3957d63d
AK		 1652 if (hw->mac.ops.setup_link_speed(hw, IXGBE_LINK_SPEED_10GB_FULL, true,
1653 false)) {
9a799d71
AK		 1654 dev_err(&pdev->dev, "Link Speed setup failed\n");
1655 return -EIO;
1656 }
1657
1658 /* initialize eeprom parameters */
1659 if (ixgbe_init_eeprom(hw)) {
1660 dev_err(&pdev->dev, "EEPROM initialization failed\n");
1661 return -EIO;
1662 }
1663
1664 /* Set the default values */
1665 adapter->num_rx_queues = IXGBE_DEFAULT_RXQ;
1666 adapter->num_tx_queues = 1;
1667 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
1668
1669 if (ixgbe_alloc_queues(adapter)) {
1670 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1671 return -ENOMEM;
1672 }
1673
9a799d71
AK		 1674 set_bit(__IXGBE_DOWN, &adapter->state);
1675
1676 return 0;
1677}
1678
1679/**
1680 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
1681 * @adapter: board private structure
1682 * @txdr: tx descriptor ring (for a specific queue) to setup
1683 *
1684 * Return 0 on success, negative on failure
1685 **/
1686int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
1687 struct ixgbe_ring *txdr)
1688{
1689 struct pci_dev *pdev = adapter->pdev;
1690 int size;
1691
1692 size = sizeof(struct ixgbe_tx_buffer) * txdr->count;
1693 txdr->tx_buffer_info = vmalloc(size);
1694 if (!txdr->tx_buffer_info) {
1695 DPRINTK(PROBE, ERR,
1696 "Unable to allocate memory for the transmit descriptor ring\n");
1697 return -ENOMEM;
1698 }
1699 memset(txdr->tx_buffer_info, 0, size);
1700
1701 /* round up to nearest 4K */
1702 txdr->size = txdr->count * sizeof(union ixgbe_adv_tx_desc);
1703 txdr->size = ALIGN(txdr->size, 4096);
1704
1705 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1706 if (!txdr->desc) {
1707 vfree(txdr->tx_buffer_info);
1708 DPRINTK(PROBE, ERR,
1709 "Memory allocation failed for the tx desc ring\n");
1710 return -ENOMEM;
1711 }
1712
1713 txdr->adapter = adapter;
1714 txdr->next_to_use = 0;
1715 txdr->next_to_clean = 0;
1716 txdr->work_limit = txdr->count;
9a799d71
AK		 1717
1718 return 0;
1719}
1720
1721/**
1722 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
1723 * @adapter: board private structure
1724 * @rxdr: rx descriptor ring (for a specific queue) to setup
1725 *
1726 * Returns 0 on success, negative on failure
1727 **/
1728int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
1729 struct ixgbe_ring *rxdr)
1730{
1731 struct pci_dev *pdev = adapter->pdev;
1732 int size, desc_len;
1733
1734 size = sizeof(struct ixgbe_rx_buffer) * rxdr->count;
1735 rxdr->rx_buffer_info = vmalloc(size);
1736 if (!rxdr->rx_buffer_info) {
1737 DPRINTK(PROBE, ERR,
1738 "vmalloc allocation failed for the rx desc ring\n");
1739 return -ENOMEM;
1740 }
1741 memset(rxdr->rx_buffer_info, 0, size);
1742
1743 desc_len = sizeof(union ixgbe_adv_rx_desc);
1744
1745 /* Round up to nearest 4K */
1746 rxdr->size = rxdr->count * desc_len;
1747 rxdr->size = ALIGN(rxdr->size, 4096);
1748
1749 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1750
1751 if (!rxdr->desc) {
1752 DPRINTK(PROBE, ERR,
1753 "Memory allocation failed for the rx desc ring\n");
1754 vfree(rxdr->rx_buffer_info);
1755 return -ENOMEM;
1756 }
1757
1758 rxdr->next_to_clean = 0;
1759 rxdr->next_to_use = 0;
1760 rxdr->adapter = adapter;
1761
1762 return 0;
1763}
1764
1765/**
1766 * ixgbe_free_tx_resources - Free Tx Resources per Queue
1767 * @adapter: board private structure
1768 * @tx_ring: Tx descriptor ring for a specific queue
1769 *
1770 * Free all transmit software resources
1771 **/
1772static void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
1773 struct ixgbe_ring *tx_ring)
1774{
1775 struct pci_dev *pdev = adapter->pdev;
1776
1777 ixgbe_clean_tx_ring(adapter, tx_ring);
1778
1779 vfree(tx_ring->tx_buffer_info);
1780 tx_ring->tx_buffer_info = NULL;
1781
1782 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1783
1784 tx_ring->desc = NULL;
1785}
1786
1787/**
1788 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
1789 * @adapter: board private structure
1790 *
1791 * Free all transmit software resources
1792 **/
1793static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
1794{
1795 int i;
1796
1797 for (i = 0; i < adapter->num_tx_queues; i++)
1798 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
1799}
1800
1801/**
1802 * ixgbe_free_rx_resources - Free Rx Resources
1803 * @adapter: board private structure
1804 * @rx_ring: ring to clean the resources from
1805 *
1806 * Free all receive software resources
1807 **/
1808static void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
1809 struct ixgbe_ring *rx_ring)
1810{
1811 struct pci_dev *pdev = adapter->pdev;
1812
1813 ixgbe_clean_rx_ring(adapter, rx_ring);
1814
1815 vfree(rx_ring->rx_buffer_info);
1816 rx_ring->rx_buffer_info = NULL;
1817
1818 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1819
1820 rx_ring->desc = NULL;
1821}
1822
1823/**
1824 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
1825 * @adapter: board private structure
1826 *
1827 * Free all receive software resources
1828 **/
1829static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
1830{
1831 int i;
1832
1833 for (i = 0; i < adapter->num_rx_queues; i++)
1834 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
1835}
1836
1837/**
1838 * ixgbe_setup_all_tx_resources - wrapper to allocate Tx resources
1839 * (Descriptors) for all queues
1840 * @adapter: board private structure
1841 *
1842 * If this function returns with an error, then it's possible one or
1843 * more of the rings is populated (while the rest are not). It is the
1844 * callers duty to clean those orphaned rings.
1845 *
1846 * Return 0 on success, negative on failure
1847 **/
1848static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
1849{
1850 int i, err = 0;
1851
1852 for (i = 0; i < adapter->num_tx_queues; i++) {
1853 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1854 if (err) {
1855 DPRINTK(PROBE, ERR,
1856 "Allocation for Tx Queue %u failed\n", i);
1857 break;
1858 }
1859 }
1860
1861 return err;
1862}
1863
1864/**
1865 * ixgbe_setup_all_rx_resources - wrapper to allocate Rx resources
1866 * (Descriptors) for all queues
1867 * @adapter: board private structure
1868 *
1869 * If this function returns with an error, then it's possible one or
1870 * more of the rings is populated (while the rest are not). It is the
1871 * callers duty to clean those orphaned rings.
1872 *
1873 * Return 0 on success, negative on failure
1874 **/
1875
1876static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
1877{
1878 int i, err = 0;
1879
1880 for (i = 0; i < adapter->num_rx_queues; i++) {
1881 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1882 if (err) {
1883 DPRINTK(PROBE, ERR,
1884 "Allocation for Rx Queue %u failed\n", i);
1885 break;
1886 }
1887 }
1888
1889 return err;
1890}
1891
1892/**
1893 * ixgbe_change_mtu - Change the Maximum Transfer Unit
1894 * @netdev: network interface device structure
1895 * @new_mtu: new value for maximum frame size
1896 *
1897 * Returns 0 on success, negative on failure
1898 **/
1899static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
1900{
1901 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1902 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
1903
1904 if ((max_frame < (ETH_ZLEN + ETH_FCS_LEN)) ||
1905 (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
1906 return -EINVAL;
1907
1908 netdev->mtu = new_mtu;
1909
d4f80882
AV		 1910 if (netif_running(netdev))
1911 ixgbe_reinit_locked(adapter);
9a799d71
AK		 1912
1913 return 0;
1914}
1915
1916/**
1917 * ixgbe_open - Called when a network interface is made active
1918 * @netdev: network interface device structure
1919 *
1920 * Returns 0 on success, negative value on failure
1921 *
1922 * The open entry point is called when a network interface is made
1923 * active by the system (IFF_UP). At this point all resources needed
1924 * for transmit and receive operations are allocated, the interrupt
1925 * handler is registered with the OS, the watchdog timer is started,
1926 * and the stack is notified that the interface is ready.
1927 **/
1928static int ixgbe_open(struct net_device *netdev)
1929{
1930 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1931 int err;
9a799d71
AK		 1932 u32 num_rx_queues = adapter->num_rx_queues;
1933
9a799d71
AK		 1934try_intr_reinit:
1935 /* allocate transmit descriptors */
1936 err = ixgbe_setup_all_tx_resources(adapter);
1937 if (err)
1938 goto err_setup_tx;
1939
1940 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
1941 num_rx_queues = 1;
1942 adapter->num_rx_queues = num_rx_queues;
1943 }
1944
1945 /* allocate receive descriptors */
1946 err = ixgbe_setup_all_rx_resources(adapter);
1947 if (err)
1948 goto err_setup_rx;
1949
1950 ixgbe_configure(adapter);
1951
1952 err = ixgbe_request_irq(adapter, &num_rx_queues);
1953 if (err)
1954 goto err_req_irq;
1955
1956 /* ixgbe_request might have reduced num_rx_queues */
1957 if (num_rx_queues < adapter->num_rx_queues) {
1958 /* We didn't get MSI-X, so we need to release everything,
1959 * set our Rx queue count to num_rx_queues, and redo the
1960 * whole init process.
1961 */
1962 ixgbe_free_irq(adapter);
1963 if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1964 pci_disable_msi(adapter->pdev);
1965 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
1966 }
1967 ixgbe_free_all_rx_resources(adapter);
1968 ixgbe_free_all_tx_resources(adapter);
1969 adapter->num_rx_queues = num_rx_queues;
1970
1971 /* Reset the hardware, and start over. */
1972 ixgbe_reset(adapter);
1973
1974 goto try_intr_reinit;
1975 }
1976
1977 err = ixgbe_up_complete(adapter);
1978 if (err)
1979 goto err_up;
1980
1981 return 0;
1982
1983err_up:
5eba3699 1984 ixgbe_release_hw_control(adapter);
9a799d71
AK		 1985 ixgbe_free_irq(adapter);
1986err_req_irq:
1987 ixgbe_free_all_rx_resources(adapter);
1988err_setup_rx:
1989 ixgbe_free_all_tx_resources(adapter);
1990err_setup_tx:
1991 ixgbe_reset(adapter);
1992
1993 return err;
1994}
1995
1996/**
1997 * ixgbe_close - Disables a network interface
1998 * @netdev: network interface device structure
1999 *
2000 * Returns 0, this is not allowed to fail
2001 *
2002 * The close entry point is called when an interface is de-activated
2003 * by the OS. The hardware is still under the drivers control, but
2004 * needs to be disabled. A global MAC reset is issued to stop the
2005 * hardware, and all transmit and receive resources are freed.
2006 **/
2007static int ixgbe_close(struct net_device *netdev)
2008{
2009 struct ixgbe_adapter *adapter = netdev_priv(netdev);
9a799d71
AK		 2010
2011 ixgbe_down(adapter);
2012 ixgbe_free_irq(adapter);
2013
2014 ixgbe_free_all_tx_resources(adapter);
2015 ixgbe_free_all_rx_resources(adapter);
2016
5eba3699 2017 ixgbe_release_hw_control(adapter);
9a799d71
AK		 2018
2019 return 0;
2020}
2021
2022/**
2023 * ixgbe_update_stats - Update the board statistics counters.
2024 * @adapter: board private structure
2025 **/
2026void ixgbe_update_stats(struct ixgbe_adapter *adapter)
2027{
2028 struct ixgbe_hw *hw = &adapter->hw;
2029 u64 good_rx, missed_rx, bprc;
2030
2031 adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
2032 good_rx = IXGBE_READ_REG(hw, IXGBE_GPRC);
2033 missed_rx = IXGBE_READ_REG(hw, IXGBE_MPC(0));
2034 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(1));
2035 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(2));
2036 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(3));
2037 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(4));
2038 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(5));
2039 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(6));
2040 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(7));
2041 adapter->stats.gprc += (good_rx - missed_rx);
2042
2043 adapter->stats.mpc[0] += missed_rx;
2044 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
2045 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
2046 adapter->stats.bprc += bprc;
2047 adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
2048 adapter->stats.mprc -= bprc;
2049 adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
2050 adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
2051 adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
2052 adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
2053 adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
2054 adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
2055 adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
2056
2057 adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
2058 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
2059 adapter->stats.lxontxc += IXGBE_READ_REG(hw, IXGBE_LXONTXC);
2060 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
2061 adapter->stats.lxofftxc += IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
2062 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2063 adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
2064 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
2065 adapter->stats.rnbc[0] += IXGBE_READ_REG(hw, IXGBE_RNBC(0));
2066 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2067 adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
2068 adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
2069 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
2070 adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
2071 adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
2072 adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
2073 adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
2074 adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
2075 adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
2076 adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
2077 adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
2078 adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
2079
2080 /* Fill out the OS statistics structure */
2081 adapter->net_stats.rx_packets = adapter->stats.gprc;
2082 adapter->net_stats.tx_packets = adapter->stats.gptc;
2083 adapter->net_stats.rx_bytes = adapter->stats.gorc;
2084 adapter->net_stats.tx_bytes = adapter->stats.gotc;
2085 adapter->net_stats.multicast = adapter->stats.mprc;
2086
2087 /* Rx Errors */
2088 adapter->net_stats.rx_errors = adapter->stats.crcerrs +
2089 adapter->stats.rlec;
2090 adapter->net_stats.rx_dropped = 0;
2091 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
2092 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
2093 adapter->net_stats.rx_missed_errors = adapter->stats.mpc[0];
2094
2095}
2096
2097/**
2098 * ixgbe_watchdog - Timer Call-back
2099 * @data: pointer to adapter cast into an unsigned long
2100 **/
2101static void ixgbe_watchdog(unsigned long data)
2102{
2103 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
2104 struct net_device *netdev = adapter->netdev;
2105 bool link_up;
2106 u32 link_speed = 0;
2107
3957d63d 2108 adapter->hw.mac.ops.check_link(&adapter->hw, &(link_speed), &link_up);
9a799d71
AK		 2109
2110 if (link_up) {
2111 if (!netif_carrier_ok(netdev)) {
2112 u32 frctl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
2113 u32 rmcs = IXGBE_READ_REG(&adapter->hw, IXGBE_RMCS);
2114#define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
2115#define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
2116 DPRINTK(LINK, INFO, "NIC Link is Up %s, "
2117 "Flow Control: %s\n",
2118 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
2119 "10 Gbps" :
2120 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
2121 "1 Gpbs" : "unknown speed")),
2122 ((FLOW_RX && FLOW_TX) ? "RX/TX" :
2123 (FLOW_RX ? "RX" :
2124 (FLOW_TX ? "TX" : "None"))));
2125
2126 netif_carrier_on(netdev);
2127 netif_wake_queue(netdev);
2128 } else {
2129 /* Force detection of hung controller */
2130 adapter->detect_tx_hung = true;
2131 }
2132 } else {
2133 if (netif_carrier_ok(netdev)) {
2134 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2135 netif_carrier_off(netdev);
2136 netif_stop_queue(netdev);
2137 }
2138 }
2139
2140 ixgbe_update_stats(adapter);
2141
2142 /* Reset the timer */
2143 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2144 mod_timer(&adapter->watchdog_timer,
2145 round_jiffies(jiffies + 2 * HZ));
2146}
2147
9a799d71
AK		 2148static int ixgbe_tso(struct ixgbe_adapter *adapter,
2149 struct ixgbe_ring *tx_ring, struct sk_buff *skb,
2150 u32 tx_flags, u8 *hdr_len)
2151{
2152 struct ixgbe_adv_tx_context_desc *context_desc;
2153 unsigned int i;
2154 int err;
2155 struct ixgbe_tx_buffer *tx_buffer_info;
2156 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2157 u32 mss_l4len_idx = 0, l4len;
2158 *hdr_len = 0;
2159
2160 if (skb_is_gso(skb)) {
2161 if (skb_header_cloned(skb)) {
2162 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2163 if (err)
2164 return err;
2165 }
2166 l4len = tcp_hdrlen(skb);
2167 *hdr_len += l4len;
2168
8327d000 2169 if (skb->protocol == htons(ETH_P_IP)) {
9a799d71
AK		 2170 struct iphdr *iph = ip_hdr(skb);
2171 iph->tot_len = 0;
2172 iph->check = 0;
2173 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2174 iph->daddr, 0,
2175 IPPROTO_TCP,
2176 0);
2177 adapter->hw_tso_ctxt++;
2178 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2179 ipv6_hdr(skb)->payload_len = 0;
2180 tcp_hdr(skb)->check =
2181 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2182 &ipv6_hdr(skb)->daddr,
2183 0, IPPROTO_TCP, 0);
2184 adapter->hw_tso6_ctxt++;
2185 }
2186
2187 i = tx_ring->next_to_use;
2188
2189 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2190 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2191
2192 /* VLAN MACLEN IPLEN */
2193 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2194 vlan_macip_lens |=
2195 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2196 vlan_macip_lens |= ((skb_network_offset(skb)) <<
2197 IXGBE_ADVTXD_MACLEN_SHIFT);
2198 *hdr_len += skb_network_offset(skb);
2199 vlan_macip_lens |=
2200 (skb_transport_header(skb) - skb_network_header(skb));
2201 *hdr_len +=
2202 (skb_transport_header(skb) - skb_network_header(skb));
2203 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2204 context_desc->seqnum_seed = 0;
2205
2206 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2207 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2208 IXGBE_ADVTXD_DTYP_CTXT);
2209
8327d000 2210 if (skb->protocol == htons(ETH_P_IP))
9a799d71
AK		 2211 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2212 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2213 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2214
2215 /* MSS L4LEN IDX */
2216 mss_l4len_idx |=
2217 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
2218 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
2219 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2220
2221 tx_buffer_info->time_stamp = jiffies;
2222 tx_buffer_info->next_to_watch = i;
2223
2224 i++;
2225 if (i == tx_ring->count)
2226 i = 0;
2227 tx_ring->next_to_use = i;
2228
2229 return true;
2230 }
2231 return false;
2232}
2233
2234static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
2235 struct ixgbe_ring *tx_ring,
2236 struct sk_buff *skb, u32 tx_flags)
2237{
2238 struct ixgbe_adv_tx_context_desc *context_desc;
2239 unsigned int i;
2240 struct ixgbe_tx_buffer *tx_buffer_info;
2241 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2242
2243 if (skb->ip_summed == CHECKSUM_PARTIAL ||
2244 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
2245 i = tx_ring->next_to_use;
2246 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2247 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2248
2249 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2250 vlan_macip_lens |=
2251 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2252 vlan_macip_lens |= (skb_network_offset(skb) <<
2253 IXGBE_ADVTXD_MACLEN_SHIFT);
2254 if (skb->ip_summed == CHECKSUM_PARTIAL)
2255 vlan_macip_lens |= (skb_transport_header(skb) -
2256 skb_network_header(skb));
2257
2258 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2259 context_desc->seqnum_seed = 0;
2260
2261 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2262 IXGBE_ADVTXD_DTYP_CTXT);
2263
2264 if (skb->ip_summed == CHECKSUM_PARTIAL) {
8327d000 2265 if (skb->protocol == htons(ETH_P_IP))
9a799d71
AK		 2266 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2267
2268 if (skb->sk->sk_protocol == IPPROTO_TCP)
2269 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2270 }
2271
2272 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2273 context_desc->mss_l4len_idx = 0;
2274
2275 tx_buffer_info->time_stamp = jiffies;
2276 tx_buffer_info->next_to_watch = i;
2277 adapter->hw_csum_tx_good++;
2278 i++;
2279 if (i == tx_ring->count)
2280 i = 0;
2281 tx_ring->next_to_use = i;
2282
2283 return true;
2284 }
2285 return false;
2286}
2287
2288static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
2289 struct ixgbe_ring *tx_ring,
2290 struct sk_buff *skb, unsigned int first)
2291{
2292 struct ixgbe_tx_buffer *tx_buffer_info;
2293 unsigned int len = skb->len;
2294 unsigned int offset = 0, size, count = 0, i;
2295 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2296 unsigned int f;
2297
2298 len -= skb->data_len;
2299
2300 i = tx_ring->next_to_use;
2301
2302 while (len) {
2303 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2304 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
2305
2306 tx_buffer_info->length = size;
2307 tx_buffer_info->dma = pci_map_single(adapter->pdev,
2308 skb->data + offset,
2309 size, PCI_DMA_TODEVICE);
2310 tx_buffer_info->time_stamp = jiffies;
2311 tx_buffer_info->next_to_watch = i;
2312
2313 len -= size;
2314 offset += size;
2315 count++;
2316 i++;
2317 if (i == tx_ring->count)
2318 i = 0;
2319 }
2320
2321 for (f = 0; f < nr_frags; f++) {
2322 struct skb_frag_struct *frag;
2323
2324 frag = &skb_shinfo(skb)->frags[f];
2325 len = frag->size;
2326 offset = frag->page_offset;
2327
2328 while (len) {
2329 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2330 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
2331
2332 tx_buffer_info->length = size;
2333 tx_buffer_info->dma = pci_map_page(adapter->pdev,
2334 frag->page,
2335 offset,
2336 size, PCI_DMA_TODEVICE);
2337 tx_buffer_info->time_stamp = jiffies;
2338 tx_buffer_info->next_to_watch = i;
2339
2340 len -= size;
2341 offset += size;
2342 count++;
2343 i++;
2344 if (i == tx_ring->count)
2345 i = 0;
2346 }
2347 }
2348 if (i == 0)
2349 i = tx_ring->count - 1;
2350 else
2351 i = i - 1;
2352 tx_ring->tx_buffer_info[i].skb = skb;
2353 tx_ring->tx_buffer_info[first].next_to_watch = i;
2354
2355 return count;
2356}
2357
2358static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
2359 struct ixgbe_ring *tx_ring,
2360 int tx_flags, int count, u32 paylen, u8 hdr_len)
2361{
2362 union ixgbe_adv_tx_desc *tx_desc = NULL;
2363 struct ixgbe_tx_buffer *tx_buffer_info;
2364 u32 olinfo_status = 0, cmd_type_len = 0;
2365 unsigned int i;
2366 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
2367
2368 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
2369
2370 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
2371
2372 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2373 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
2374
2375 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
2376 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
2377
2378 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
2379 IXGBE_ADVTXD_POPTS_SHIFT;
2380
2381 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
2382 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
2383 IXGBE_ADVTXD_POPTS_SHIFT;
2384
2385 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
2386 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
2387 IXGBE_ADVTXD_POPTS_SHIFT;
2388
2389 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
2390
2391 i = tx_ring->next_to_use;
2392 while (count--) {
2393 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2394 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
2395 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
2396 tx_desc->read.cmd_type_len =
2397 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
2398 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2399
2400 i++;
2401 if (i == tx_ring->count)
2402 i = 0;
2403 }
2404
2405 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
2406
2407 /*
2408 * Force memory writes to complete before letting h/w
2409 * know there are new descriptors to fetch. (Only
2410 * applicable for weak-ordered memory model archs,
2411 * such as IA-64).
2412 */
2413 wmb();
2414
2415 tx_ring->next_to_use = i;
2416 writel(i, adapter->hw.hw_addr + tx_ring->tail);
2417}
2418
e092be60
AV		 2419static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
2420 struct ixgbe_ring *tx_ring, int size)
2421{
2422 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2423
2424 netif_stop_queue(netdev);
2425 /* Herbert's original patch had:
2426 * smp_mb__after_netif_stop_queue();
2427 * but since that doesn't exist yet, just open code it. */
2428 smp_mb();
2429
2430 /* We need to check again in a case another CPU has just
2431 * made room available. */
2432 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
2433 return -EBUSY;
2434
2435 /* A reprieve! - use start_queue because it doesn't call schedule */
2436 netif_wake_queue(netdev);
2437 ++adapter->restart_queue;
2438 return 0;
2439}
2440
2441static int ixgbe_maybe_stop_tx(struct net_device *netdev,
2442 struct ixgbe_ring *tx_ring, int size)
2443{
2444 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
2445 return 0;
2446 return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
2447}
2448
2449
9a799d71
AK		 2450static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2451{
2452 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2453 struct ixgbe_ring *tx_ring;
2454 unsigned int len = skb->len;
2455 unsigned int first;
2456 unsigned int tx_flags = 0;
9a799d71
AK		 2457 u8 hdr_len;
2458 int tso;
2459 unsigned int mss = 0;
2460 int count = 0;
2461 unsigned int f;
2462 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2463 len -= skb->data_len;
2464
2465 tx_ring = adapter->tx_ring;
2466
2467 if (skb->len <= 0) {
2468 dev_kfree_skb(skb);
2469 return NETDEV_TX_OK;
2470 }
2471 mss = skb_shinfo(skb)->gso_size;
2472
2473 if (mss)
2474 count++;
2475 else if (skb->ip_summed == CHECKSUM_PARTIAL)
2476 count++;
2477
2478 count += TXD_USE_COUNT(len);
2479 for (f = 0; f < nr_frags; f++)
2480 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
2481
e092be60 2482 if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
9a799d71 2483 adapter->tx_busy++;
9a799d71
AK		 2484 return NETDEV_TX_BUSY;
2485 }
9a799d71
AK		 2486 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2487 tx_flags |= IXGBE_TX_FLAGS_VLAN;
2488 tx_flags |= (vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT);
2489 }
2490
8327d000 2491 if (skb->protocol == htons(ETH_P_IP))
9a799d71
AK		 2492 tx_flags |= IXGBE_TX_FLAGS_IPV4;
2493 first = tx_ring->next_to_use;
2494 tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
2495 if (tso < 0) {
2496 dev_kfree_skb_any(skb);
2497 return NETDEV_TX_OK;
2498 }
2499
2500 if (tso)
2501 tx_flags |= IXGBE_TX_FLAGS_TSO;
2502 else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
2503 (skb->ip_summed == CHECKSUM_PARTIAL))
2504 tx_flags |= IXGBE_TX_FLAGS_CSUM;
2505
2506 ixgbe_tx_queue(adapter, tx_ring, tx_flags,
2507 ixgbe_tx_map(adapter, tx_ring, skb, first),
2508 skb->len, hdr_len);
2509
2510 netdev->trans_start = jiffies;
2511
e092be60 2512 ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
9a799d71
AK		 2513
2514 return NETDEV_TX_OK;
2515}
2516
2517/**
2518 * ixgbe_get_stats - Get System Network Statistics
2519 * @netdev: network interface device structure
2520 *
2521 * Returns the address of the device statistics structure.
2522 * The statistics are actually updated from the timer callback.
2523 **/
2524static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
2525{
2526 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2527
2528 /* only return the current stats */
2529 return &adapter->net_stats;
2530}
2531
2532/**
2533 * ixgbe_set_mac - Change the Ethernet Address of the NIC
2534 * @netdev: network interface device structure
2535 * @p: pointer to an address structure
2536 *
2537 * Returns 0 on success, negative on failure
2538 **/
2539static int ixgbe_set_mac(struct net_device *netdev, void *p)
2540{
2541 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2542 struct sockaddr *addr = p;
2543
2544 if (!is_valid_ether_addr(addr->sa_data))
2545 return -EADDRNOTAVAIL;
2546
2547 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2548 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2549
2550 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
2551
2552 return 0;
2553}
2554
2555#ifdef CONFIG_NET_POLL_CONTROLLER
2556/*
2557 * Polling 'interrupt' - used by things like netconsole to send skbs
2558 * without having to re-enable interrupts. It's not called while
2559 * the interrupt routine is executing.
2560 */
2561static void ixgbe_netpoll(struct net_device *netdev)
2562{
2563 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2564
2565 disable_irq(adapter->pdev->irq);
2566 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
2567 ixgbe_intr(adapter->pdev->irq, netdev);
2568 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
2569 enable_irq(adapter->pdev->irq);
2570}
2571#endif
2572
2573/**
2574 * ixgbe_probe - Device Initialization Routine
2575 * @pdev: PCI device information struct
2576 * @ent: entry in ixgbe_pci_tbl
2577 *
2578 * Returns 0 on success, negative on failure
2579 *
2580 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
2581 * The OS initialization, configuring of the adapter private structure,
2582 * and a hardware reset occur.
2583 **/
2584static int __devinit ixgbe_probe(struct pci_dev *pdev,
2585 const struct pci_device_id *ent)
2586{
2587 struct net_device *netdev;
2588 struct ixgbe_adapter *adapter = NULL;
2589 struct ixgbe_hw *hw;
2590 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
2591 unsigned long mmio_start, mmio_len;
2592 static int cards_found;
2593 int i, err, pci_using_dac;
2594 u16 link_status, link_speed, link_width;
2595 u32 part_num;
2596
2597 err = pci_enable_device(pdev);
2598 if (err)
2599 return err;
2600
2601 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
2602 !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
2603 pci_using_dac = 1;
2604 } else {
2605 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
2606 if (err) {
2607 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
2608 if (err) {
2609 dev_err(&pdev->dev, "No usable DMA "
2610 "configuration, aborting\n");
2611 goto err_dma;
2612 }
2613 }
2614 pci_using_dac = 0;
2615 }
2616
2617 err = pci_request_regions(pdev, ixgbe_driver_name);
2618 if (err) {
2619 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
2620 goto err_pci_reg;
2621 }
2622
2623 pci_set_master(pdev);
2624
2625 netdev = alloc_etherdev(sizeof(struct ixgbe_adapter));
2626 if (!netdev) {
2627 err = -ENOMEM;
2628 goto err_alloc_etherdev;
2629 }
2630
9a799d71
AK		 2631 SET_NETDEV_DEV(netdev, &pdev->dev);
2632
2633 pci_set_drvdata(pdev, netdev);
2634 adapter = netdev_priv(netdev);
2635
2636 adapter->netdev = netdev;
2637 adapter->pdev = pdev;
2638 hw = &adapter->hw;
2639 hw->back = adapter;
2640 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
2641
2642 mmio_start = pci_resource_start(pdev, 0);
2643 mmio_len = pci_resource_len(pdev, 0);
2644
2645 hw->hw_addr = ioremap(mmio_start, mmio_len);
2646 if (!hw->hw_addr) {
2647 err = -EIO;
2648 goto err_ioremap;
2649 }
2650
2651 for (i = 1; i <= 5; i++) {
2652 if (pci_resource_len(pdev, i) == 0)
2653 continue;
2654 }
2655
2656 netdev->open = &ixgbe_open;
2657 netdev->stop = &ixgbe_close;
2658 netdev->hard_start_xmit = &ixgbe_xmit_frame;
2659 netdev->get_stats = &ixgbe_get_stats;
2660 netdev->set_multicast_list = &ixgbe_set_multi;
2661 netdev->set_mac_address = &ixgbe_set_mac;
2662 netdev->change_mtu = &ixgbe_change_mtu;
2663 ixgbe_set_ethtool_ops(netdev);
2664 netdev->tx_timeout = &ixgbe_tx_timeout;
2665 netdev->watchdog_timeo = 5 * HZ;
2666 netif_napi_add(netdev, &adapter->napi, ixgbe_clean, 64);
2667 netdev->vlan_rx_register = ixgbe_vlan_rx_register;
2668 netdev->vlan_rx_add_vid = ixgbe_vlan_rx_add_vid;
2669 netdev->vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid;
2670#ifdef CONFIG_NET_POLL_CONTROLLER
2671 netdev->poll_controller = ixgbe_netpoll;
2672#endif
2673 strcpy(netdev->name, pci_name(pdev));
2674
2675 netdev->mem_start = mmio_start;
2676 netdev->mem_end = mmio_start + mmio_len;
2677
2678 adapter->bd_number = cards_found;
2679
2680 /* PCI config space info */
2681 hw->vendor_id = pdev->vendor;
2682 hw->device_id = pdev->device;
2683 hw->revision_id = pdev->revision;
2684 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2685 hw->subsystem_device_id = pdev->subsystem_device;
2686
2687 /* Setup hw api */
2688 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
9a799d71
AK		 2689
2690 err = ii->get_invariants(hw);
2691 if (err)
2692 goto err_hw_init;
2693
2694 /* setup the private structure */
2695 err = ixgbe_sw_init(adapter);
2696 if (err)
2697 goto err_sw_init;
2698
2699 netdev->features = NETIF_F_SG |
2700 NETIF_F_HW_CSUM |
2701 NETIF_F_HW_VLAN_TX |
2702 NETIF_F_HW_VLAN_RX |
2703 NETIF_F_HW_VLAN_FILTER;
2704
2705 netdev->features |= NETIF_F_TSO;
2706
2707 netdev->features |= NETIF_F_TSO6;
2708 if (pci_using_dac)
2709 netdev->features |= NETIF_F_HIGHDMA;
2710
2711
2712 /* make sure the EEPROM is good */
2713 if (ixgbe_validate_eeprom_checksum(hw, NULL) < 0) {
2714 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
2715 err = -EIO;
2716 goto err_eeprom;
2717 }
2718
2719 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
2720 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
2721
2722 if (ixgbe_validate_mac_addr(netdev->dev_addr)) {
2723 err = -EIO;
2724 goto err_eeprom;
2725 }
2726
2727 init_timer(&adapter->watchdog_timer);
2728 adapter->watchdog_timer.function = &ixgbe_watchdog;
2729 adapter->watchdog_timer.data = (unsigned long)adapter;
2730
2731 INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
2732
2733 /* initialize default flow control settings */
2734 hw->fc.original_type = ixgbe_fc_full;
2735 hw->fc.type = ixgbe_fc_full;
2736 hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
2737 hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
2738 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
2739
2740 /* Interrupt Throttle Rate */
2741 adapter->rx_eitr = (1000000 / IXGBE_DEFAULT_ITR_RX_USECS);
2742 adapter->tx_eitr = (1000000 / IXGBE_DEFAULT_ITR_TX_USECS);
2743
2744 /* print bus type/speed/width info */
2745 pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
2746 link_speed = link_status & IXGBE_PCI_LINK_SPEED;
2747 link_width = link_status & IXGBE_PCI_LINK_WIDTH;
2748 dev_info(&pdev->dev, "(PCI Express:%s:%s) "
2749 "%02x:%02x:%02x:%02x:%02x:%02x\n",
2750 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
2751 (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
2752 "Unknown"),
2753 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
2754 (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
2755 (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
2756 (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
2757 "Unknown"),
2758 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
2759 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
2760 ixgbe_read_part_num(hw, &part_num);
2761 dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
2762 hw->mac.type, hw->phy.type,
2763 (part_num >> 8), (part_num & 0xff));
2764
2765 /* reset the hardware with the new settings */
2766 ixgbe_start_hw(hw);
2767
2768 netif_carrier_off(netdev);
2769 netif_stop_queue(netdev);
2770
2771 strcpy(netdev->name, "eth%d");
2772 err = register_netdev(netdev);
2773 if (err)
2774 goto err_register;
2775
2776
2777 dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
2778 cards_found++;
2779 return 0;
2780
2781err_register:
5eba3699 2782 ixgbe_release_hw_control(adapter);
9a799d71
AK		 2783err_hw_init:
2784err_sw_init:
2785err_eeprom:
2786 iounmap(hw->hw_addr);
2787err_ioremap:
2788 free_netdev(netdev);
2789err_alloc_etherdev:
2790 pci_release_regions(pdev);
2791err_pci_reg:
2792err_dma:
2793 pci_disable_device(pdev);
2794 return err;
2795}
2796
2797/**
2798 * ixgbe_remove - Device Removal Routine
2799 * @pdev: PCI device information struct
2800 *
2801 * ixgbe_remove is called by the PCI subsystem to alert the driver
2802 * that it should release a PCI device. The could be caused by a
2803 * Hot-Plug event, or because the driver is going to be removed from
2804 * memory.
2805 **/
2806static void __devexit ixgbe_remove(struct pci_dev *pdev)
2807{
2808 struct net_device *netdev = pci_get_drvdata(pdev);
2809 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2810
2811 set_bit(__IXGBE_DOWN, &adapter->state);
2812 del_timer_sync(&adapter->watchdog_timer);
2813
2814 flush_scheduled_work();
2815
2816 unregister_netdev(netdev);
2817
5eba3699
AV		 2818 ixgbe_release_hw_control(adapter);
2819
9a799d71
AK		 2820 kfree(adapter->tx_ring);
2821 kfree(adapter->rx_ring);
2822
2823 iounmap(adapter->hw.hw_addr);
2824 pci_release_regions(pdev);
2825
2826 free_netdev(netdev);
2827
2828 pci_disable_device(pdev);
2829}
2830
2831/**
2832 * ixgbe_io_error_detected - called when PCI error is detected
2833 * @pdev: Pointer to PCI device
2834 * @state: The current pci connection state
2835 *
2836 * This function is called after a PCI bus error affecting
2837 * this device has been detected.
2838 */
2839static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
2840 pci_channel_state_t state)
2841{
2842 struct net_device *netdev = pci_get_drvdata(pdev);
2843 struct ixgbe_adapter *adapter = netdev->priv;
2844
2845 netif_device_detach(netdev);
2846
2847 if (netif_running(netdev))
2848 ixgbe_down(adapter);
2849 pci_disable_device(pdev);
2850
2851 /* Request a slot slot reset. */
2852 return PCI_ERS_RESULT_NEED_RESET;
2853}
2854
2855/**
2856 * ixgbe_io_slot_reset - called after the pci bus has been reset.
2857 * @pdev: Pointer to PCI device
2858 *
2859 * Restart the card from scratch, as if from a cold-boot.
2860 */
2861static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
2862{
2863 struct net_device *netdev = pci_get_drvdata(pdev);
2864 struct ixgbe_adapter *adapter = netdev->priv;
2865
2866 if (pci_enable_device(pdev)) {
2867 DPRINTK(PROBE, ERR,
2868 "Cannot re-enable PCI device after reset.\n");
2869 return PCI_ERS_RESULT_DISCONNECT;
2870 }
2871 pci_set_master(pdev);
2872
2873 pci_enable_wake(pdev, PCI_D3hot, 0);
2874 pci_enable_wake(pdev, PCI_D3cold, 0);
2875
2876 ixgbe_reset(adapter);
2877
2878 return PCI_ERS_RESULT_RECOVERED;
2879}
2880
2881/**
2882 * ixgbe_io_resume - called when traffic can start flowing again.
2883 * @pdev: Pointer to PCI device
2884 *
2885 * This callback is called when the error recovery driver tells us that
2886 * its OK to resume normal operation.
2887 */
2888static void ixgbe_io_resume(struct pci_dev *pdev)
2889{
2890 struct net_device *netdev = pci_get_drvdata(pdev);
2891 struct ixgbe_adapter *adapter = netdev->priv;
2892
2893 if (netif_running(netdev)) {
2894 if (ixgbe_up(adapter)) {
2895 DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
2896 return;
2897 }
2898 }
2899
2900 netif_device_attach(netdev);
2901
2902}
2903
2904static struct pci_error_handlers ixgbe_err_handler = {
2905 .error_detected = ixgbe_io_error_detected,
2906 .slot_reset = ixgbe_io_slot_reset,
2907 .resume = ixgbe_io_resume,
2908};
2909
2910static struct pci_driver ixgbe_driver = {
2911 .name = ixgbe_driver_name,
2912 .id_table = ixgbe_pci_tbl,
2913 .probe = ixgbe_probe,
2914 .remove = __devexit_p(ixgbe_remove),
2915#ifdef CONFIG_PM
2916 .suspend = ixgbe_suspend,
2917 .resume = ixgbe_resume,
2918#endif
2919 .shutdown = ixgbe_shutdown,
2920 .err_handler = &ixgbe_err_handler
2921};
2922
2923/**
2924 * ixgbe_init_module - Driver Registration Routine
2925 *
2926 * ixgbe_init_module is the first routine called when the driver is
2927 * loaded. All it does is register with the PCI subsystem.
2928 **/
2929static int __init ixgbe_init_module(void)
2930{
2931 int ret;
2932 printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
2933 ixgbe_driver_string, ixgbe_driver_version);
2934
2935 printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
2936
2937 ret = pci_register_driver(&ixgbe_driver);
2938 return ret;
2939}
2940module_init(ixgbe_init_module);
2941
2942/**
2943 * ixgbe_exit_module - Driver Exit Cleanup Routine
2944 *
2945 * ixgbe_exit_module is called just before the driver is removed
2946 * from memory.
2947 **/
2948static void __exit ixgbe_exit_module(void)
2949{
2950 pci_unregister_driver(&ixgbe_driver);
2951}
2952module_exit(ixgbe_exit_module);
2953
2954/* ixgbe_main.c */
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