[mirror_ubuntu-bionic-kernel.git] / drivers / net / ixgbe / ixgbe_mbx.c

/*******************************************************************************

  Intel 10 Gigabit PCI Express Linux driver
  Copyright(c) 1999 - 2011 Intel Corporation.

  This program is free software; you can redistribute it and/or modify it
  under the terms and conditions of the GNU General Public License,
  version 2, as published by the Free Software Foundation.

  This program is distributed in the hope it will be useful, but WITHOUT
  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  more details.

  You should have received a copy of the GNU General Public License along with
  this program; if not, write to the Free Software Foundation, Inc.,
  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.

  The full GNU General Public License is included in this distribution in
  the file called "COPYING".

  Contact Information:
  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497

*******************************************************************************/

#include <linux/pci.h>
#include <linux/delay.h>
#include "ixgbe_type.h"
#include "ixgbe_common.h"
#include "ixgbe_mbx.h"

/**
 *  ixgbe_read_mbx - Reads a message from the mailbox
 *  @hw: pointer to the HW structure
 *  @msg: The message buffer
 *  @size: Length of buffer
 *  @mbx_id: id of mailbox to read
 *
 *  returns SUCCESS if it successfuly read message from buffer
 **/
s32 ixgbe_read_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
{
	struct ixgbe_mbx_info *mbx = &hw->mbx;
	s32 ret_val = IXGBE_ERR_MBX;

	/* limit read to size of mailbox */
	if (size > mbx->size)
		size = mbx->size;

	if (mbx->ops.read)
		ret_val = mbx->ops.read(hw, msg, size, mbx_id);

	return ret_val;
}

/**
 *  ixgbe_write_mbx - Write a message to the mailbox
 *  @hw: pointer to the HW structure
 *  @msg: The message buffer
 *  @size: Length of buffer
 *  @mbx_id: id of mailbox to write
 *
 *  returns SUCCESS if it successfully copied message into the buffer
 **/
s32 ixgbe_write_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size, u16 mbx_id)
{
	struct ixgbe_mbx_info *mbx = &hw->mbx;
	s32 ret_val = 0;

	if (size > mbx->size)
		ret_val = IXGBE_ERR_MBX;

	else if (mbx->ops.write)
		ret_val = mbx->ops.write(hw, msg, size, mbx_id);

	return ret_val;
}

/**
 *  ixgbe_check_for_msg - checks to see if someone sent us mail
 *  @hw: pointer to the HW structure
 *  @mbx_id: id of mailbox to check
 *
 *  returns SUCCESS if the Status bit was found or else ERR_MBX
 **/
s32 ixgbe_check_for_msg(struct ixgbe_hw *hw, u16 mbx_id)
{
	struct ixgbe_mbx_info *mbx = &hw->mbx;
	s32 ret_val = IXGBE_ERR_MBX;

	if (mbx->ops.check_for_msg)
		ret_val = mbx->ops.check_for_msg(hw, mbx_id);

	return ret_val;
}

/**
 *  ixgbe_check_for_ack - checks to see if someone sent us ACK
 *  @hw: pointer to the HW structure
 *  @mbx_id: id of mailbox to check
 *
 *  returns SUCCESS if the Status bit was found or else ERR_MBX
 **/
s32 ixgbe_check_for_ack(struct ixgbe_hw *hw, u16 mbx_id)
{
	struct ixgbe_mbx_info *mbx = &hw->mbx;
	s32 ret_val = IXGBE_ERR_MBX;

	if (mbx->ops.check_for_ack)
		ret_val = mbx->ops.check_for_ack(hw, mbx_id);

	return ret_val;
}

/**
 *  ixgbe_check_for_rst - checks to see if other side has reset
 *  @hw: pointer to the HW structure
 *  @mbx_id: id of mailbox to check
 *
 *  returns SUCCESS if the Status bit was found or else ERR_MBX
 **/
s32 ixgbe_check_for_rst(struct ixgbe_hw *hw, u16 mbx_id)
{
	struct ixgbe_mbx_info *mbx = &hw->mbx;
	s32 ret_val = IXGBE_ERR_MBX;

	if (mbx->ops.check_for_rst)
		ret_val = mbx->ops.check_for_rst(hw, mbx_id);

	return ret_val;
}

/**
 *  ixgbe_poll_for_msg - Wait for message notification
 *  @hw: pointer to the HW structure
 *  @mbx_id: id of mailbox to write
 *
 *  returns SUCCESS if it successfully received a message notification
 **/
static s32 ixgbe_poll_for_msg(struct ixgbe_hw *hw, u16 mbx_id)
{
	struct ixgbe_mbx_info *mbx = &hw->mbx;
	int countdown = mbx->timeout;

	if (!countdown || !mbx->ops.check_for_msg)
		goto out;

	while (countdown && mbx->ops.check_for_msg(hw, mbx_id)) {
		countdown--;
		if (!countdown)
			break;
		udelay(mbx->usec_delay);
	}

	/* if we failed, all future posted messages fail until reset */
	if (!countdown)
		mbx->timeout = 0;
out:
	return countdown ? 0 : IXGBE_ERR_MBX;
}

/**
 *  ixgbe_poll_for_ack - Wait for message acknowledgement
 *  @hw: pointer to the HW structure
 *  @mbx_id: id of mailbox to write
 *
 *  returns SUCCESS if it successfully received a message acknowledgement
 **/
static s32 ixgbe_poll_for_ack(struct ixgbe_hw *hw, u16 mbx_id)
{
	struct ixgbe_mbx_info *mbx = &hw->mbx;
	int countdown = mbx->timeout;

	if (!countdown || !mbx->ops.check_for_ack)
		goto out;

	while (countdown && mbx->ops.check_for_ack(hw, mbx_id)) {
		countdown--;
		if (!countdown)
			break;
		udelay(mbx->usec_delay);
	}

	/* if we failed, all future posted messages fail until reset */
	if (!countdown)
		mbx->timeout = 0;
out:
	return countdown ? 0 : IXGBE_ERR_MBX;
}

/**
 *  ixgbe_read_posted_mbx - Wait for message notification and receive message
 *  @hw: pointer to the HW structure
 *  @msg: The message buffer
 *  @size: Length of buffer
 *  @mbx_id: id of mailbox to write
 *
 *  returns SUCCESS if it successfully received a message notification and
 *  copied it into the receive buffer.
 **/
static s32 ixgbe_read_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size,
				 u16 mbx_id)
{
	struct ixgbe_mbx_info *mbx = &hw->mbx;
	s32 ret_val = IXGBE_ERR_MBX;

	if (!mbx->ops.read)
		goto out;

	ret_val = ixgbe_poll_for_msg(hw, mbx_id);

	/* if ack received read message, otherwise we timed out */
	if (!ret_val)
		ret_val = mbx->ops.read(hw, msg, size, mbx_id);
out:
	return ret_val;
}

/**
 *  ixgbe_write_posted_mbx - Write a message to the mailbox, wait for ack
 *  @hw: pointer to the HW structure
 *  @msg: The message buffer
 *  @size: Length of buffer
 *  @mbx_id: id of mailbox to write
 *
 *  returns SUCCESS if it successfully copied message into the buffer and
 *  received an ack to that message within delay * timeout period
 **/
static s32 ixgbe_write_posted_mbx(struct ixgbe_hw *hw, u32 *msg, u16 size,
                           u16 mbx_id)
{
	struct ixgbe_mbx_info *mbx = &hw->mbx;
	s32 ret_val = IXGBE_ERR_MBX;

	/* exit if either we can't write or there isn't a defined timeout */
	if (!mbx->ops.write || !mbx->timeout)
		goto out;

	/* send msg */
	ret_val = mbx->ops.write(hw, msg, size, mbx_id);

	/* if msg sent wait until we receive an ack */
	if (!ret_val)
		ret_val = ixgbe_poll_for_ack(hw, mbx_id);
out:
	return ret_val;
}

static s32 ixgbe_check_for_bit_pf(struct ixgbe_hw *hw, u32 mask, s32 index)
{
	u32 mbvficr = IXGBE_READ_REG(hw, IXGBE_MBVFICR(index));
	s32 ret_val = IXGBE_ERR_MBX;

	if (mbvficr & mask) {
		ret_val = 0;
		IXGBE_WRITE_REG(hw, IXGBE_MBVFICR(index), mask);
	}

	return ret_val;
}

/**
 *  ixgbe_check_for_msg_pf - checks to see if the VF has sent mail
 *  @hw: pointer to the HW structure
 *  @vf_number: the VF index
 *
 *  returns SUCCESS if the VF has set the Status bit or else ERR_MBX
 **/
static s32 ixgbe_check_for_msg_pf(struct ixgbe_hw *hw, u16 vf_number)
{
	s32 ret_val = IXGBE_ERR_MBX;
	s32 index = IXGBE_MBVFICR_INDEX(vf_number);
	u32 vf_bit = vf_number % 16;

	if (!ixgbe_check_for_bit_pf(hw, IXGBE_MBVFICR_VFREQ_VF1 << vf_bit,
	                            index)) {
		ret_val = 0;
		hw->mbx.stats.reqs++;
	}

	return ret_val;
}

/**
 *  ixgbe_check_for_ack_pf - checks to see if the VF has ACKed
 *  @hw: pointer to the HW structure
 *  @vf_number: the VF index
 *
 *  returns SUCCESS if the VF has set the Status bit or else ERR_MBX
 **/
static s32 ixgbe_check_for_ack_pf(struct ixgbe_hw *hw, u16 vf_number)
{
	s32 ret_val = IXGBE_ERR_MBX;
	s32 index = IXGBE_MBVFICR_INDEX(vf_number);
	u32 vf_bit = vf_number % 16;

	if (!ixgbe_check_for_bit_pf(hw, IXGBE_MBVFICR_VFACK_VF1 << vf_bit,
	                            index)) {
		ret_val = 0;
		hw->mbx.stats.acks++;
	}

	return ret_val;
}

/**
 *  ixgbe_check_for_rst_pf - checks to see if the VF has reset
 *  @hw: pointer to the HW structure
 *  @vf_number: the VF index
 *
 *  returns SUCCESS if the VF has set the Status bit or else ERR_MBX
 **/
static s32 ixgbe_check_for_rst_pf(struct ixgbe_hw *hw, u16 vf_number)
{
	u32 reg_offset = (vf_number < 32) ? 0 : 1;
	u32 vf_shift = vf_number % 32;
	u32 vflre = 0;
	s32 ret_val = IXGBE_ERR_MBX;

	switch (hw->mac.type) {
	case ixgbe_mac_82599EB:
		vflre = IXGBE_READ_REG(hw, IXGBE_VFLRE(reg_offset));
		break;
	case ixgbe_mac_X540:
		vflre = IXGBE_READ_REG(hw, IXGBE_VFLREC(reg_offset));
		break;
	default:
		break;
	}

	if (vflre & (1 << vf_shift)) {
		ret_val = 0;
		IXGBE_WRITE_REG(hw, IXGBE_VFLREC(reg_offset), (1 << vf_shift));
		hw->mbx.stats.rsts++;
	}

	return ret_val;
}

/**
 *  ixgbe_obtain_mbx_lock_pf - obtain mailbox lock
 *  @hw: pointer to the HW structure
 *  @vf_number: the VF index
 *
 *  return SUCCESS if we obtained the mailbox lock
 **/
static s32 ixgbe_obtain_mbx_lock_pf(struct ixgbe_hw *hw, u16 vf_number)
{
	s32 ret_val = IXGBE_ERR_MBX;
	u32 p2v_mailbox;

	/* Take ownership of the buffer */
	IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_PFU);

	/* reserve mailbox for vf use */
	p2v_mailbox = IXGBE_READ_REG(hw, IXGBE_PFMAILBOX(vf_number));
	if (p2v_mailbox & IXGBE_PFMAILBOX_PFU)
		ret_val = 0;

	return ret_val;
}

/**
 *  ixgbe_write_mbx_pf - Places a message in the mailbox
 *  @hw: pointer to the HW structure
 *  @msg: The message buffer
 *  @size: Length of buffer
 *  @vf_number: the VF index
 *
 *  returns SUCCESS if it successfully copied message into the buffer
 **/
static s32 ixgbe_write_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,
                              u16 vf_number)
{
	s32 ret_val;
	u16 i;

	/* lock the mailbox to prevent pf/vf race condition */
	ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_number);
	if (ret_val)
		goto out_no_write;

	/* flush msg and acks as we are overwriting the message buffer */
	ixgbe_check_for_msg_pf(hw, vf_number);
	ixgbe_check_for_ack_pf(hw, vf_number);

	/* copy the caller specified message to the mailbox memory buffer */
	for (i = 0; i < size; i++)
		IXGBE_WRITE_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_number), i, msg[i]);

	/* Interrupt VF to tell it a message has been sent and release buffer*/
	IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_STS);

	/* update stats */
	hw->mbx.stats.msgs_tx++;

out_no_write:
	return ret_val;

}

/**
 *  ixgbe_read_mbx_pf - Read a message from the mailbox
 *  @hw: pointer to the HW structure
 *  @msg: The message buffer
 *  @size: Length of buffer
 *  @vf_number: the VF index
 *
 *  This function copies a message from the mailbox buffer to the caller's
 *  memory buffer.  The presumption is that the caller knows that there was
 *  a message due to a VF request so no polling for message is needed.
 **/
static s32 ixgbe_read_mbx_pf(struct ixgbe_hw *hw, u32 *msg, u16 size,
                             u16 vf_number)
{
	s32 ret_val;
	u16 i;

	/* lock the mailbox to prevent pf/vf race condition */
	ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_number);
	if (ret_val)
		goto out_no_read;

	/* copy the message to the mailbox memory buffer */
	for (i = 0; i < size; i++)
		msg[i] = IXGBE_READ_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_number), i);

	/* Acknowledge the message and release buffer */
	IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_ACK);

	/* update stats */
	hw->mbx.stats.msgs_rx++;

out_no_read:
	return ret_val;
}

#ifdef CONFIG_PCI_IOV
/**
 *  ixgbe_init_mbx_params_pf - set initial values for pf mailbox
 *  @hw: pointer to the HW structure
 *
 *  Initializes the hw->mbx struct to correct values for pf mailbox
 */
void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw)
{
	struct ixgbe_mbx_info *mbx = &hw->mbx;

	if (hw->mac.type != ixgbe_mac_82599EB &&
	    hw->mac.type != ixgbe_mac_X540)
		return;

	mbx->timeout = 0;
	mbx->usec_delay = 0;

	mbx->stats.msgs_tx = 0;
	mbx->stats.msgs_rx = 0;
	mbx->stats.reqs = 0;
	mbx->stats.acks = 0;
	mbx->stats.rsts = 0;

	mbx->size = IXGBE_VFMAILBOX_SIZE;
}
#endif /* CONFIG_PCI_IOV */

struct ixgbe_mbx_operations mbx_ops_generic = {
	.read                   = ixgbe_read_mbx_pf,
	.write                  = ixgbe_write_mbx_pf,
	.read_posted            = ixgbe_read_posted_mbx,
	.write_posted           = ixgbe_write_posted_mbx,
	.check_for_msg          = ixgbe_check_for_msg_pf,
	.check_for_ack          = ixgbe_check_for_ack_pf,
	.check_for_rst          = ixgbe_check_for_rst_pf,
};
Commit	Line	Data
10ca132c GR	1	/*******************************************************************************
	2
	3	Intel 10 Gigabit PCI Express Linux driver
a52055e0	4	Copyright(c) 1999 - 2011 Intel Corporation.
10ca132c GR	5
	6	This program is free software; you can redistribute it and/or modify it
	7	under the terms and conditions of the GNU General Public License,
	8	version 2, as published by the Free Software Foundation.
	9
	10	This program is distributed in the hope it will be useful, but WITHOUT
	11	ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	12	FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	13	more details.
	14
	15	You should have received a copy of the GNU General Public License along with
	16	this program; if not, write to the Free Software Foundation, Inc.,
	17	51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
	18
	19	The full GNU General Public License is included in this distribution in
	20	the file called "COPYING".
	21
	22	Contact Information:
	23	e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
	24	Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
	25
	26	*******************************************************************************/
	27
	28	#include <linux/pci.h>
	29	#include <linux/delay.h>
	30	#include "ixgbe_type.h"
	31	#include "ixgbe_common.h"
	32	#include "ixgbe_mbx.h"
	33
	34	/**
	35	* ixgbe_read_mbx - Reads a message from the mailbox
	36	* @hw: pointer to the HW structure
	37	* @msg: The message buffer
	38	* @size: Length of buffer
	39	* @mbx_id: id of mailbox to read
	40	*
	41	* returns SUCCESS if it successfuly read message from buffer
	42	**/
	43	s32 ixgbe_read_mbx(struct ixgbe_hw hw, u32 msg, u16 size, u16 mbx_id)
	44	{
	45	struct ixgbe_mbx_info *mbx = &hw->mbx;
	46	s32 ret_val = IXGBE_ERR_MBX;
	47
	48	/* limit read to size of mailbox */
	49	if (size > mbx->size)
	50	size = mbx->size;
	51
	52	if (mbx->ops.read)
	53	ret_val = mbx->ops.read(hw, msg, size, mbx_id);
	54
	55	return ret_val;
	56	}
	57
	58	/**
	59	* ixgbe_write_mbx - Write a message to the mailbox
	60	* @hw: pointer to the HW structure
	61	* @msg: The message buffer
	62	* @size: Length of buffer
	63	* @mbx_id: id of mailbox to write
	64	*
	65	* returns SUCCESS if it successfully copied message into the buffer
	66	**/
	67	s32 ixgbe_write_mbx(struct ixgbe_hw hw, u32 msg, u16 size, u16 mbx_id)
	68	{
69	struct ixgbe_mbx_info *mbx = &hw->mbx;
70	s32 ret_val = 0;
71
72	if (size > mbx->size)
73	ret_val = IXGBE_ERR_MBX;
74
75	else if (mbx->ops.write)
76	ret_val = mbx->ops.write(hw, msg, size, mbx_id);
77
78	return ret_val;
79	}
80
81	/**
82	* ixgbe_check_for_msg - checks to see if someone sent us mail
83	* @hw: pointer to the HW structure
84	* @mbx_id: id of mailbox to check
85	*
86	* returns SUCCESS if the Status bit was found or else ERR_MBX
87	**/
88	s32 ixgbe_check_for_msg(struct ixgbe_hw *hw, u16 mbx_id)
89	{
90	struct ixgbe_mbx_info *mbx = &hw->mbx;
91	s32 ret_val = IXGBE_ERR_MBX;
92
93	if (mbx->ops.check_for_msg)
94	ret_val = mbx->ops.check_for_msg(hw, mbx_id);
95
96	return ret_val;
97	}
98
99	/**
100	* ixgbe_check_for_ack - checks to see if someone sent us ACK
101	* @hw: pointer to the HW structure
102	* @mbx_id: id of mailbox to check
103	*
104	* returns SUCCESS if the Status bit was found or else ERR_MBX
105	**/
106	s32 ixgbe_check_for_ack(struct ixgbe_hw *hw, u16 mbx_id)
107	{
108	struct ixgbe_mbx_info *mbx = &hw->mbx;
109	s32 ret_val = IXGBE_ERR_MBX;
110
111	if (mbx->ops.check_for_ack)
112	ret_val = mbx->ops.check_for_ack(hw, mbx_id);
113
114	return ret_val;
115	}
116
117	/**
118	* ixgbe_check_for_rst - checks to see if other side has reset
119	* @hw: pointer to the HW structure
120	* @mbx_id: id of mailbox to check
121	*
122	* returns SUCCESS if the Status bit was found or else ERR_MBX
123	**/
124	s32 ixgbe_check_for_rst(struct ixgbe_hw *hw, u16 mbx_id)
125	{
126	struct ixgbe_mbx_info *mbx = &hw->mbx;
127	s32 ret_val = IXGBE_ERR_MBX;
128
129	if (mbx->ops.check_for_rst)
130	ret_val = mbx->ops.check_for_rst(hw, mbx_id);
131
132	return ret_val;
133	}
134
135	/**
136	* ixgbe_poll_for_msg - Wait for message notification
137	* @hw: pointer to the HW structure
138	* @mbx_id: id of mailbox to write
139	*
140	* returns SUCCESS if it successfully received a message notification
141	**/
142	static s32 ixgbe_poll_for_msg(struct ixgbe_hw *hw, u16 mbx_id)
143	{
144	struct ixgbe_mbx_info *mbx = &hw->mbx;
145	int countdown = mbx->timeout;
146
147	if (!countdown \|\| !mbx->ops.check_for_msg)
148	goto out;
149
150	while (countdown && mbx->ops.check_for_msg(hw, mbx_id)) {
151	countdown--;
152	if (!countdown)
153	break;
154	udelay(mbx->usec_delay);
155	}
156
157	/* if we failed, all future posted messages fail until reset */
158	if (!countdown)
159	mbx->timeout = 0;
160	out:
161	return countdown ? 0 : IXGBE_ERR_MBX;
162	}
163
164	/**
165	* ixgbe_poll_for_ack - Wait for message acknowledgement
166	* @hw: pointer to the HW structure
167	* @mbx_id: id of mailbox to write
168	*
169	* returns SUCCESS if it successfully received a message acknowledgement
170	**/
171	static s32 ixgbe_poll_for_ack(struct ixgbe_hw *hw, u16 mbx_id)
172	{
173	struct ixgbe_mbx_info *mbx = &hw->mbx;
174	int countdown = mbx->timeout;
175
176	if (!countdown \|\| !mbx->ops.check_for_ack)
177	goto out;
178
179	while (countdown && mbx->ops.check_for_ack(hw, mbx_id)) {
180	countdown--;
181	if (!countdown)
182	break;
183	udelay(mbx->usec_delay);
184	}
185
186	/* if we failed, all future posted messages fail until reset */
187	if (!countdown)
188	mbx->timeout = 0;
189	out:
190	return countdown ? 0 : IXGBE_ERR_MBX;
191	}
192
193	/**
194	* ixgbe_read_posted_mbx - Wait for message notification and receive message
195	* @hw: pointer to the HW structure
196	* @msg: The message buffer
197	* @size: Length of buffer
198	* @mbx_id: id of mailbox to write
199	*
200	* returns SUCCESS if it successfully received a message notification and
201	* copied it into the receive buffer.
202	**/
5d5b7c39 ET	203	static s32 ixgbe_read_posted_mbx(struct ixgbe_hw hw, u32 msg, u16 size,
5d5b7c39 ET	204	u16 mbx_id)
10ca132c GR	205	{
	206	struct ixgbe_mbx_info *mbx = &hw->mbx;
	207	s32 ret_val = IXGBE_ERR_MBX;
	208
	209	if (!mbx->ops.read)
	210	goto out;
	211
	212	ret_val = ixgbe_poll_for_msg(hw, mbx_id);
	213
	214	/* if ack received read message, otherwise we timed out */
	215	if (!ret_val)
	216	ret_val = mbx->ops.read(hw, msg, size, mbx_id);
	217	out:
	218	return ret_val;
	219	}
	220
	221	/**
	222	* ixgbe_write_posted_mbx - Write a message to the mailbox, wait for ack
	223	* @hw: pointer to the HW structure
	224	* @msg: The message buffer
	225	* @size: Length of buffer
	226	* @mbx_id: id of mailbox to write
	227	*
	228	* returns SUCCESS if it successfully copied message into the buffer and
	229	* received an ack to that message within delay * timeout period
	230	**/
5d5b7c39	231	static s32 ixgbe_write_posted_mbx(struct ixgbe_hw hw, u32 msg, u16 size,
10ca132c GR	232	u16 mbx_id)
	233	{
	234	struct ixgbe_mbx_info *mbx = &hw->mbx;
	235	s32 ret_val = IXGBE_ERR_MBX;
	236
	237	/* exit if either we can't write or there isn't a defined timeout */
	238	if (!mbx->ops.write \|\| !mbx->timeout)
	239	goto out;
	240
	241	/* send msg */
	242	ret_val = mbx->ops.write(hw, msg, size, mbx_id);
	243
	244	/* if msg sent wait until we receive an ack */
	245	if (!ret_val)
	246	ret_val = ixgbe_poll_for_ack(hw, mbx_id);
	247	out:
	248	return ret_val;
	249	}
	250
10ca132c GR	251	static s32 ixgbe_check_for_bit_pf(struct ixgbe_hw *hw, u32 mask, s32 index)
	252	{
	253	u32 mbvficr = IXGBE_READ_REG(hw, IXGBE_MBVFICR(index));
	254	s32 ret_val = IXGBE_ERR_MBX;
	255
	256	if (mbvficr & mask) {
	257	ret_val = 0;
	258	IXGBE_WRITE_REG(hw, IXGBE_MBVFICR(index), mask);
	259	}
	260
	261	return ret_val;
	262	}
	263
	264	/**
	265	* ixgbe_check_for_msg_pf - checks to see if the VF has sent mail
	266	* @hw: pointer to the HW structure
	267	* @vf_number: the VF index
	268	*
	269	* returns SUCCESS if the VF has set the Status bit or else ERR_MBX
	270	**/
	271	static s32 ixgbe_check_for_msg_pf(struct ixgbe_hw *hw, u16 vf_number)
	272	{
	273	s32 ret_val = IXGBE_ERR_MBX;
	274	s32 index = IXGBE_MBVFICR_INDEX(vf_number);
	275	u32 vf_bit = vf_number % 16;
	276
	277	if (!ixgbe_check_for_bit_pf(hw, IXGBE_MBVFICR_VFREQ_VF1 << vf_bit,
	278	index)) {
	279	ret_val = 0;
	280	hw->mbx.stats.reqs++;
	281	}
	282
	283	return ret_val;
	284	}
	285
	286	/**
	287	* ixgbe_check_for_ack_pf - checks to see if the VF has ACKed
	288	* @hw: pointer to the HW structure
	289	* @vf_number: the VF index
	290	*
	291	* returns SUCCESS if the VF has set the Status bit or else ERR_MBX
	292	**/
	293	static s32 ixgbe_check_for_ack_pf(struct ixgbe_hw *hw, u16 vf_number)
	294	{
	295	s32 ret_val = IXGBE_ERR_MBX;
	296	s32 index = IXGBE_MBVFICR_INDEX(vf_number);
	297	u32 vf_bit = vf_number % 16;
	298
	299	if (!ixgbe_check_for_bit_pf(hw, IXGBE_MBVFICR_VFACK_VF1 << vf_bit,
	300	index)) {
	301	ret_val = 0;
	302	hw->mbx.stats.acks++;
	303	}
	304
	305	return ret_val;
	306	}
	307
	308	/**
	309	* ixgbe_check_for_rst_pf - checks to see if the VF has reset
	310	* @hw: pointer to the HW structure
	311	* @vf_number: the VF index
	312	*
	313	* returns SUCCESS if the VF has set the Status bit or else ERR_MBX
	314	**/
315	static s32 ixgbe_check_for_rst_pf(struct ixgbe_hw *hw, u16 vf_number)
316	{
317	u32 reg_offset = (vf_number < 32) ? 0 : 1;
318	u32 vf_shift = vf_number % 32;
319	u32 vflre = 0;
320	s32 ret_val = IXGBE_ERR_MBX;
321
b93a2226 DS	322	switch (hw->mac.type) {
b93a2226 DS	323	case ixgbe_mac_82599EB:
10ca132c	324	vflre = IXGBE_READ_REG(hw, IXGBE_VFLRE(reg_offset));
b93a2226	325	break;
3377eba7 GR	326	case ixgbe_mac_X540:
	327	vflre = IXGBE_READ_REG(hw, IXGBE_VFLREC(reg_offset));
	328	break;
b93a2226 DS	329	default:
	330	break;
	331	}
10ca132c GR	332
	333	if (vflre & (1 << vf_shift)) {
	334	ret_val = 0;
	335	IXGBE_WRITE_REG(hw, IXGBE_VFLREC(reg_offset), (1 << vf_shift));
	336	hw->mbx.stats.rsts++;
	337	}
	338
	339	return ret_val;
	340	}
	341
	342	/**
	343	* ixgbe_obtain_mbx_lock_pf - obtain mailbox lock
	344	* @hw: pointer to the HW structure
	345	* @vf_number: the VF index
	346	*
	347	* return SUCCESS if we obtained the mailbox lock
	348	**/
	349	static s32 ixgbe_obtain_mbx_lock_pf(struct ixgbe_hw *hw, u16 vf_number)
	350	{
	351	s32 ret_val = IXGBE_ERR_MBX;
	352	u32 p2v_mailbox;
	353
	354	/* Take ownership of the buffer */
	355	IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_PFU);
	356
	357	/* reserve mailbox for vf use */
	358	p2v_mailbox = IXGBE_READ_REG(hw, IXGBE_PFMAILBOX(vf_number));
	359	if (p2v_mailbox & IXGBE_PFMAILBOX_PFU)
	360	ret_val = 0;
	361
	362	return ret_val;
	363	}
	364
	365	/**
	366	* ixgbe_write_mbx_pf - Places a message in the mailbox
	367	* @hw: pointer to the HW structure
	368	* @msg: The message buffer
	369	* @size: Length of buffer
	370	* @vf_number: the VF index
	371	*
	372	* returns SUCCESS if it successfully copied message into the buffer
	373	**/
	374	static s32 ixgbe_write_mbx_pf(struct ixgbe_hw hw, u32 msg, u16 size,
	375	u16 vf_number)
	376	{
	377	s32 ret_val;
	378	u16 i;
	379
	380	/* lock the mailbox to prevent pf/vf race condition */
	381	ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_number);
	382	if (ret_val)
	383	goto out_no_write;
	384
	385	/* flush msg and acks as we are overwriting the message buffer */
	386	ixgbe_check_for_msg_pf(hw, vf_number);
	387	ixgbe_check_for_ack_pf(hw, vf_number);
	388
	389	/* copy the caller specified message to the mailbox memory buffer */
	390	for (i = 0; i < size; i++)
	391	IXGBE_WRITE_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_number), i, msg[i]);
	392
	393	/* Interrupt VF to tell it a message has been sent and release buffer*/
	394	IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_STS);
	395
396	/* update stats */
397	hw->mbx.stats.msgs_tx++;
398
399	out_no_write:
400	return ret_val;
401
402	}
403
404	/**
405	* ixgbe_read_mbx_pf - Read a message from the mailbox
406	* @hw: pointer to the HW structure
407	* @msg: The message buffer
408	* @size: Length of buffer
409	* @vf_number: the VF index
410	*
411	* This function copies a message from the mailbox buffer to the caller's
412	* memory buffer. The presumption is that the caller knows that there was
413	* a message due to a VF request so no polling for message is needed.
414	**/
415	static s32 ixgbe_read_mbx_pf(struct ixgbe_hw hw, u32 msg, u16 size,
416	u16 vf_number)
417	{
418	s32 ret_val;
419	u16 i;
420
421	/* lock the mailbox to prevent pf/vf race condition */
422	ret_val = ixgbe_obtain_mbx_lock_pf(hw, vf_number);
423	if (ret_val)
424	goto out_no_read;
425
426	/* copy the message to the mailbox memory buffer */
427	for (i = 0; i < size; i++)
428	msg[i] = IXGBE_READ_REG_ARRAY(hw, IXGBE_PFMBMEM(vf_number), i);
429
430	/* Acknowledge the message and release buffer */
431	IXGBE_WRITE_REG(hw, IXGBE_PFMAILBOX(vf_number), IXGBE_PFMAILBOX_ACK);
432
433	/* update stats */
434	hw->mbx.stats.msgs_rx++;
435
436	out_no_read:
437	return ret_val;
438	}
439
8fecce62	440	#ifdef CONFIG_PCI_IOV
10ca132c GR	441	/**
	442	* ixgbe_init_mbx_params_pf - set initial values for pf mailbox
	443	* @hw: pointer to the HW structure
	444	*
	445	* Initializes the hw->mbx struct to correct values for pf mailbox
	446	*/
	447	void ixgbe_init_mbx_params_pf(struct ixgbe_hw *hw)
	448	{
	449	struct ixgbe_mbx_info *mbx = &hw->mbx;
	450
d7c8a29f ET	451	if (hw->mac.type != ixgbe_mac_82599EB &&
	452	hw->mac.type != ixgbe_mac_X540)
	453	return;
b93a2226	454
d7c8a29f	455	mbx->timeout = 0;
5217e879	456	mbx->usec_delay = 0;
b93a2226	457
d7c8a29f ET	458	mbx->stats.msgs_tx = 0;
	459	mbx->stats.msgs_rx = 0;
	460	mbx->stats.reqs = 0;
	461	mbx->stats.acks = 0;
	462	mbx->stats.rsts = 0;
	463
	464	mbx->size = IXGBE_VFMAILBOX_SIZE;
10ca132c	465	}
8fecce62	466	#endif /* CONFIG_PCI_IOV */
10ca132c	467
a391f1d5	468	struct ixgbe_mbx_operations mbx_ops_generic = {
10ca132c GR	469	.read = ixgbe_read_mbx_pf,
	470	.write = ixgbe_write_mbx_pf,
	471	.read_posted = ixgbe_read_posted_mbx,
	472	.write_posted = ixgbe_write_posted_mbx,
	473	.check_for_msg = ixgbe_check_for_msg_pf,
	474	.check_for_ack = ixgbe_check_for_ack_pf,
	475	.check_for_rst = ixgbe_check_for_rst_pf,
	476	};
	477