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92915f71
GR		 1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
66c87bd5 4 Copyright(c) 1999 - 2010 Intel Corporation.
92915f71
GR		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29/******************************************************************************
30 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
31******************************************************************************/
32#include <linux/types.h>
33#include <linux/module.h>
34#include <linux/pci.h>
35#include <linux/netdevice.h>
36#include <linux/vmalloc.h>
37#include <linux/string.h>
38#include <linux/in.h>
39#include <linux/ip.h>
40#include <linux/tcp.h>
41#include <linux/ipv6.h>
5a0e3ad6 42#include <linux/slab.h>
92915f71
GR		 43#include <net/checksum.h>
44#include <net/ip6_checksum.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
47
48#include "ixgbevf.h"
49
50char ixgbevf_driver_name[] = "ixgbevf";
51static const char ixgbevf_driver_string[] =
422e05d1 52 "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
92915f71 53
a9f7c536 54#define DRV_VERSION "2.0.0-k2"
92915f71 55const char ixgbevf_driver_version[] = DRV_VERSION;
66c87bd5
GR		 56static char ixgbevf_copyright[] =
57 "Copyright (c) 2009 - 2010 Intel Corporation.";
92915f71
GR		 58
59static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
2316aa2a
GR		 60 [board_82599_vf] = &ixgbevf_82599_vf_info,
61 [board_X540_vf] = &ixgbevf_X540_vf_info,
92915f71
GR		 62};
63
64/* ixgbevf_pci_tbl - PCI Device ID Table
65 *
66 * Wildcard entries (PCI_ANY_ID) should come last
67 * Last entry must be all 0s
68 *
69 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
70 * Class, Class Mask, private data (not used) }
71 */
72static struct pci_device_id ixgbevf_pci_tbl[] = {
73 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF),
74 board_82599_vf},
2316aa2a
GR		 75 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF),
76 board_X540_vf},
92915f71
GR		 77
78 /* required last entry */
79 {0, }
80};
81MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
82
83MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
84MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver");
85MODULE_LICENSE("GPL");
86MODULE_VERSION(DRV_VERSION);
87
88#define DEFAULT_DEBUG_LEVEL_SHIFT 3
89
90/* forward decls */
91static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector);
92static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
93 u32 itr_reg);
94
95static inline void ixgbevf_release_rx_desc(struct ixgbe_hw *hw,
96 struct ixgbevf_ring *rx_ring,
97 u32 val)
98{
99 /*
100 * Force memory writes to complete before letting h/w
101 * know there are new descriptors to fetch. (Only
102 * applicable for weak-ordered memory model archs,
103 * such as IA-64).
104 */
105 wmb();
106 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rx_ring->reg_idx), val);
107}
108
109/*
65d676c8 110 * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
92915f71
GR		 111 * @adapter: pointer to adapter struct
112 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
113 * @queue: queue to map the corresponding interrupt to
114 * @msix_vector: the vector to map to the corresponding queue
115 *
116 */
117static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
118 u8 queue, u8 msix_vector)
119{
120 u32 ivar, index;
121 struct ixgbe_hw *hw = &adapter->hw;
122 if (direction == -1) {
123 /* other causes */
124 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
125 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
126 ivar &= ~0xFF;
127 ivar |= msix_vector;
128 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
129 } else {
130 /* tx or rx causes */
131 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
132 index = ((16 * (queue & 1)) + (8 * direction));
133 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
134 ivar &= ~(0xFF << index);
135 ivar |= (msix_vector << index);
136 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
137 }
138}
139
140static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_adapter *adapter,
141 struct ixgbevf_tx_buffer
142 *tx_buffer_info)
143{
144 if (tx_buffer_info->dma) {
145 if (tx_buffer_info->mapped_as_page)
2a1f8794 146 dma_unmap_page(&adapter->pdev->dev,
92915f71
GR		 147 tx_buffer_info->dma,
148 tx_buffer_info->length,
2a1f8794 149 DMA_TO_DEVICE);
92915f71 150 else
2a1f8794 151 dma_unmap_single(&adapter->pdev->dev,
92915f71
GR		 152 tx_buffer_info->dma,
153 tx_buffer_info->length,
2a1f8794 154 DMA_TO_DEVICE);
92915f71
GR		 155 tx_buffer_info->dma = 0;
156 }
157 if (tx_buffer_info->skb) {
158 dev_kfree_skb_any(tx_buffer_info->skb);
159 tx_buffer_info->skb = NULL;
160 }
161 tx_buffer_info->time_stamp = 0;
162 /* tx_buffer_info must be completely set up in the transmit path */
163}
164
92915f71
GR		 165#define IXGBE_MAX_TXD_PWR 14
166#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
167
168/* Tx Descriptors needed, worst case */
169#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
170 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
171#ifdef MAX_SKB_FRAGS
172#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
173 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
174#else
175#define DESC_NEEDED TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD)
176#endif
177
178static void ixgbevf_tx_timeout(struct net_device *netdev);
179
180/**
181 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
182 * @adapter: board private structure
183 * @tx_ring: tx ring to clean
184 **/
185static bool ixgbevf_clean_tx_irq(struct ixgbevf_adapter *adapter,
186 struct ixgbevf_ring *tx_ring)
187{
188 struct net_device *netdev = adapter->netdev;
189 struct ixgbe_hw *hw = &adapter->hw;
190 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
191 struct ixgbevf_tx_buffer *tx_buffer_info;
192 unsigned int i, eop, count = 0;
193 unsigned int total_bytes = 0, total_packets = 0;
194
195 i = tx_ring->next_to_clean;
196 eop = tx_ring->tx_buffer_info[i].next_to_watch;
197 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
198
199 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
200 (count < tx_ring->work_limit)) {
201 bool cleaned = false;
2d0bb1c1 202 rmb(); /* read buffer_info after eop_desc */
92915f71
GR		 203 for ( ; !cleaned; count++) {
204 struct sk_buff *skb;
205 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
206 tx_buffer_info = &tx_ring->tx_buffer_info[i];
207 cleaned = (i == eop);
208 skb = tx_buffer_info->skb;
209
210 if (cleaned && skb) {
211 unsigned int segs, bytecount;
212
213 /* gso_segs is currently only valid for tcp */
214 segs = skb_shinfo(skb)->gso_segs ?: 1;
215 /* multiply data chunks by size of headers */
216 bytecount = ((segs - 1) * skb_headlen(skb)) +
217 skb->len;
218 total_packets += segs;
219 total_bytes += bytecount;
220 }
221
222 ixgbevf_unmap_and_free_tx_resource(adapter,
223 tx_buffer_info);
224
225 tx_desc->wb.status = 0;
226
227 i++;
228 if (i == tx_ring->count)
229 i = 0;
230 }
231
232 eop = tx_ring->tx_buffer_info[i].next_to_watch;
233 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
234 }
235
236 tx_ring->next_to_clean = i;
237
238#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
239 if (unlikely(count && netif_carrier_ok(netdev) &&
240 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
241 /* Make sure that anybody stopping the queue after this
242 * sees the new next_to_clean.
243 */
244 smp_mb();
245#ifdef HAVE_TX_MQ
246 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
247 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
248 netif_wake_subqueue(netdev, tx_ring->queue_index);
249 ++adapter->restart_queue;
250 }
251#else
252 if (netif_queue_stopped(netdev) &&
253 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
254 netif_wake_queue(netdev);
255 ++adapter->restart_queue;
256 }
257#endif
258 }
259
92915f71
GR		 260 /* re-arm the interrupt */
261 if ((count >= tx_ring->work_limit) &&
262 (!test_bit(__IXGBEVF_DOWN, &adapter->state))) {
263 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, tx_ring->v_idx);
264 }
265
266 tx_ring->total_bytes += total_bytes;
267 tx_ring->total_packets += total_packets;
268
fb621bac
ED		 269 netdev->stats.tx_bytes += total_bytes;
270 netdev->stats.tx_packets += total_packets;
92915f71 271
807540ba 272 return count < tx_ring->work_limit;
92915f71
GR		 273}
274
275/**
276 * ixgbevf_receive_skb - Send a completed packet up the stack
277 * @q_vector: structure containing interrupt and ring information
278 * @skb: packet to send up
279 * @status: hardware indication of status of receive
280 * @rx_ring: rx descriptor ring (for a specific queue) to setup
281 * @rx_desc: rx descriptor
282 **/
283static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector,
284 struct sk_buff *skb, u8 status,
285 struct ixgbevf_ring *ring,
286 union ixgbe_adv_rx_desc *rx_desc)
287{
288 struct ixgbevf_adapter *adapter = q_vector->adapter;
289 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
290 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
92915f71
GR		 291
292 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
293 if (adapter->vlgrp && is_vlan)
294 vlan_gro_receive(&q_vector->napi,
295 adapter->vlgrp,
296 tag, skb);
297 else
298 napi_gro_receive(&q_vector->napi, skb);
299 } else {
300 if (adapter->vlgrp && is_vlan)
c82a538e 301 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
92915f71 302 else
c82a538e 303 netif_rx(skb);
92915f71
GR		 304 }
305}
306
307/**
308 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
309 * @adapter: address of board private structure
310 * @status_err: hardware indication of status of receive
311 * @skb: skb currently being received and modified
312 **/
313static inline void ixgbevf_rx_checksum(struct ixgbevf_adapter *adapter,
314 u32 status_err, struct sk_buff *skb)
315{
bc8acf2c 316 skb_checksum_none_assert(skb);
92915f71
GR		 317
318 /* Rx csum disabled */
319 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
320 return;
321
322 /* if IP and error */
323 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
324 (status_err & IXGBE_RXDADV_ERR_IPE)) {
325 adapter->hw_csum_rx_error++;
326 return;
327 }
328
329 if (!(status_err & IXGBE_RXD_STAT_L4CS))
330 return;
331
332 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
333 adapter->hw_csum_rx_error++;
334 return;
335 }
336
337 /* It must be a TCP or UDP packet with a valid checksum */
338 skb->ip_summed = CHECKSUM_UNNECESSARY;
339 adapter->hw_csum_rx_good++;
340}
341
342/**
343 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
344 * @adapter: address of board private structure
345 **/
346static void ixgbevf_alloc_rx_buffers(struct ixgbevf_adapter *adapter,
347 struct ixgbevf_ring *rx_ring,
348 int cleaned_count)
349{
350 struct pci_dev *pdev = adapter->pdev;
351 union ixgbe_adv_rx_desc *rx_desc;
352 struct ixgbevf_rx_buffer *bi;
353 struct sk_buff *skb;
354 unsigned int i;
355 unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN;
356
357 i = rx_ring->next_to_use;
358 bi = &rx_ring->rx_buffer_info[i];
359
360 while (cleaned_count--) {
361 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
362
363 if (!bi->page_dma &&
364 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
365 if (!bi->page) {
366 bi->page = netdev_alloc_page(adapter->netdev);
367 if (!bi->page) {
368 adapter->alloc_rx_page_failed++;
369 goto no_buffers;
370 }
371 bi->page_offset = 0;
372 } else {
373 /* use a half page if we're re-using */
374 bi->page_offset ^= (PAGE_SIZE / 2);
375 }
376
2a1f8794 377 bi->page_dma = dma_map_page(&pdev->dev, bi->page,
92915f71
GR		 378 bi->page_offset,
379 (PAGE_SIZE / 2),
2a1f8794 380 DMA_FROM_DEVICE);
92915f71
GR		 381 }
382
383 skb = bi->skb;
384 if (!skb) {
385 skb = netdev_alloc_skb(adapter->netdev,
386 bufsz);
387
388 if (!skb) {
389 adapter->alloc_rx_buff_failed++;
390 goto no_buffers;
391 }
392
393 /*
394 * Make buffer alignment 2 beyond a 16 byte boundary
395 * this will result in a 16 byte aligned IP header after
396 * the 14 byte MAC header is removed
397 */
398 skb_reserve(skb, NET_IP_ALIGN);
399
400 bi->skb = skb;
401 }
402 if (!bi->dma) {
2a1f8794 403 bi->dma = dma_map_single(&pdev->dev, skb->data,
92915f71 404 rx_ring->rx_buf_len,
2a1f8794 405 DMA_FROM_DEVICE);
92915f71
GR		 406 }
407 /* Refresh the desc even if buffer_addrs didn't change because
408 * each write-back erases this info. */
409 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
410 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
411 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
412 } else {
413 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
414 }
415
416 i++;
417 if (i == rx_ring->count)
418 i = 0;
419 bi = &rx_ring->rx_buffer_info[i];
420 }
421
422no_buffers:
423 if (rx_ring->next_to_use != i) {
424 rx_ring->next_to_use = i;
425 if (i-- == 0)
426 i = (rx_ring->count - 1);
427
428 ixgbevf_release_rx_desc(&adapter->hw, rx_ring, i);
429 }
430}
431
432static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
433 u64 qmask)
434{
435 u32 mask;
436 struct ixgbe_hw *hw = &adapter->hw;
437
438 mask = (qmask & 0xFFFFFFFF);
439 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
440}
441
442static inline u16 ixgbevf_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
443{
444 return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
445}
446
447static inline u16 ixgbevf_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
448{
449 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
450}
451
452static bool ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
453 struct ixgbevf_ring *rx_ring,
454 int *work_done, int work_to_do)
455{
456 struct ixgbevf_adapter *adapter = q_vector->adapter;
457 struct pci_dev *pdev = adapter->pdev;
458 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
459 struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer;
460 struct sk_buff *skb;
461 unsigned int i;
462 u32 len, staterr;
463 u16 hdr_info;
464 bool cleaned = false;
465 int cleaned_count = 0;
466 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
467
468 i = rx_ring->next_to_clean;
469 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
470 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
471 rx_buffer_info = &rx_ring->rx_buffer_info[i];
472
473 while (staterr & IXGBE_RXD_STAT_DD) {
474 u32 upper_len = 0;
475 if (*work_done >= work_to_do)
476 break;
477 (*work_done)++;
478
2d0bb1c1 479 rmb(); /* read descriptor and rx_buffer_info after status DD */
92915f71
GR		 480 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
481 hdr_info = le16_to_cpu(ixgbevf_get_hdr_info(rx_desc));
482 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
483 IXGBE_RXDADV_HDRBUFLEN_SHIFT;
484 if (hdr_info & IXGBE_RXDADV_SPH)
485 adapter->rx_hdr_split++;
486 if (len > IXGBEVF_RX_HDR_SIZE)
487 len = IXGBEVF_RX_HDR_SIZE;
488 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
489 } else {
490 len = le16_to_cpu(rx_desc->wb.upper.length);
491 }
492 cleaned = true;
493 skb = rx_buffer_info->skb;
494 prefetch(skb->data - NET_IP_ALIGN);
495 rx_buffer_info->skb = NULL;
496
497 if (rx_buffer_info->dma) {
2a1f8794 498 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
92915f71 499 rx_ring->rx_buf_len,
2a1f8794 500 DMA_FROM_DEVICE);
92915f71
GR		 501 rx_buffer_info->dma = 0;
502 skb_put(skb, len);
503 }
504
505 if (upper_len) {
2a1f8794
NN		 506 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma,
507 PAGE_SIZE / 2, DMA_FROM_DEVICE);
92915f71
GR		 508 rx_buffer_info->page_dma = 0;
509 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
510 rx_buffer_info->page,
511 rx_buffer_info->page_offset,
512 upper_len);
513
514 if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
515 (page_count(rx_buffer_info->page) != 1))
516 rx_buffer_info->page = NULL;
517 else
518 get_page(rx_buffer_info->page);
519
520 skb->len += upper_len;
521 skb->data_len += upper_len;
522 skb->truesize += upper_len;
523 }
524
525 i++;
526 if (i == rx_ring->count)
527 i = 0;
528
529 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
530 prefetch(next_rxd);
531 cleaned_count++;
532
533 next_buffer = &rx_ring->rx_buffer_info[i];
534
535 if (!(staterr & IXGBE_RXD_STAT_EOP)) {
536 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
537 rx_buffer_info->skb = next_buffer->skb;
538 rx_buffer_info->dma = next_buffer->dma;
539 next_buffer->skb = skb;
540 next_buffer->dma = 0;
541 } else {
542 skb->next = next_buffer->skb;
543 skb->next->prev = skb;
544 }
545 adapter->non_eop_descs++;
546 goto next_desc;
547 }
548
549 /* ERR_MASK will only have valid bits if EOP set */
550 if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) {
551 dev_kfree_skb_irq(skb);
552 goto next_desc;
553 }
554
555 ixgbevf_rx_checksum(adapter, staterr, skb);
556
557 /* probably a little skewed due to removing CRC */
558 total_rx_bytes += skb->len;
559 total_rx_packets++;
560
561 /*
562 * Work around issue of some types of VM to VM loop back
563 * packets not getting split correctly
564 */
565 if (staterr & IXGBE_RXD_STAT_LB) {
e743d313 566 u32 header_fixup_len = skb_headlen(skb);
92915f71
GR		 567 if (header_fixup_len < 14)
568 skb_push(skb, header_fixup_len);
569 }
570 skb->protocol = eth_type_trans(skb, adapter->netdev);
571
572 ixgbevf_receive_skb(q_vector, skb, staterr, rx_ring, rx_desc);
92915f71
GR		 573
574next_desc:
575 rx_desc->wb.upper.status_error = 0;
576
577 /* return some buffers to hardware, one at a time is too slow */
578 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
579 ixgbevf_alloc_rx_buffers(adapter, rx_ring,
580 cleaned_count);
581 cleaned_count = 0;
582 }
583
584 /* use prefetched values */
585 rx_desc = next_rxd;
586 rx_buffer_info = &rx_ring->rx_buffer_info[i];
587
588 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
589 }
590
591 rx_ring->next_to_clean = i;
592 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
593
594 if (cleaned_count)
595 ixgbevf_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
596
597 rx_ring->total_packets += total_rx_packets;
598 rx_ring->total_bytes += total_rx_bytes;
fb621bac
ED		 599 adapter->netdev->stats.rx_bytes += total_rx_bytes;
600 adapter->netdev->stats.rx_packets += total_rx_packets;
92915f71
GR		 601
602 return cleaned;
603}
604
605/**
606 * ixgbevf_clean_rxonly - msix (aka one shot) rx clean routine
607 * @napi: napi struct with our devices info in it
608 * @budget: amount of work driver is allowed to do this pass, in packets
609 *
610 * This function is optimized for cleaning one queue only on a single
611 * q_vector!!!
612 **/
613static int ixgbevf_clean_rxonly(struct napi_struct *napi, int budget)
614{
615 struct ixgbevf_q_vector *q_vector =
616 container_of(napi, struct ixgbevf_q_vector, napi);
617 struct ixgbevf_adapter *adapter = q_vector->adapter;
618 struct ixgbevf_ring *rx_ring = NULL;
619 int work_done = 0;
620 long r_idx;
621
622 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
623 rx_ring = &(adapter->rx_ring[r_idx]);
624
625 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
626
627 /* If all Rx work done, exit the polling mode */
628 if (work_done < budget) {
629 napi_complete(napi);
630 if (adapter->itr_setting & 1)
631 ixgbevf_set_itr_msix(q_vector);
632 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
633 ixgbevf_irq_enable_queues(adapter, rx_ring->v_idx);
634 }
635
636 return work_done;
637}
638
639/**
640 * ixgbevf_clean_rxonly_many - msix (aka one shot) rx clean routine
641 * @napi: napi struct with our devices info in it
642 * @budget: amount of work driver is allowed to do this pass, in packets
643 *
644 * This function will clean more than one rx queue associated with a
645 * q_vector.
646 **/
647static int ixgbevf_clean_rxonly_many(struct napi_struct *napi, int budget)
648{
649 struct ixgbevf_q_vector *q_vector =
650 container_of(napi, struct ixgbevf_q_vector, napi);
651 struct ixgbevf_adapter *adapter = q_vector->adapter;
652 struct ixgbevf_ring *rx_ring = NULL;
653 int work_done = 0, i;
654 long r_idx;
655 u64 enable_mask = 0;
656
657 /* attempt to distribute budget to each queue fairly, but don't allow
658 * the budget to go below 1 because we'll exit polling */
659 budget /= (q_vector->rxr_count ?: 1);
660 budget = max(budget, 1);
661 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
662 for (i = 0; i < q_vector->rxr_count; i++) {
663 rx_ring = &(adapter->rx_ring[r_idx]);
664 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
665 enable_mask |= rx_ring->v_idx;
666 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
667 r_idx + 1);
668 }
669
670#ifndef HAVE_NETDEV_NAPI_LIST
671 if (!netif_running(adapter->netdev))
672 work_done = 0;
673
674#endif
675 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
676 rx_ring = &(adapter->rx_ring[r_idx]);
677
678 /* If all Rx work done, exit the polling mode */
679 if (work_done < budget) {
680 napi_complete(napi);
681 if (adapter->itr_setting & 1)
682 ixgbevf_set_itr_msix(q_vector);
683 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
684 ixgbevf_irq_enable_queues(adapter, enable_mask);
685 }
686
687 return work_done;
688}
689
690
691/**
692 * ixgbevf_configure_msix - Configure MSI-X hardware
693 * @adapter: board private structure
694 *
695 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
696 * interrupts.
697 **/
698static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
699{
700 struct ixgbevf_q_vector *q_vector;
701 struct ixgbe_hw *hw = &adapter->hw;
702 int i, j, q_vectors, v_idx, r_idx;
703 u32 mask;
704
705 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
706
707 /*
708 * Populate the IVAR table and set the ITR values to the
709 * corresponding register.
710 */
711 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
712 q_vector = adapter->q_vector[v_idx];
984b3f57 713 /* XXX for_each_set_bit(...) */
92915f71
GR		 714 r_idx = find_first_bit(q_vector->rxr_idx,
715 adapter->num_rx_queues);
716
717 for (i = 0; i < q_vector->rxr_count; i++) {
718 j = adapter->rx_ring[r_idx].reg_idx;
719 ixgbevf_set_ivar(adapter, 0, j, v_idx);
720 r_idx = find_next_bit(q_vector->rxr_idx,
721 adapter->num_rx_queues,
722 r_idx + 1);
723 }
724 r_idx = find_first_bit(q_vector->txr_idx,
725 adapter->num_tx_queues);
726
727 for (i = 0; i < q_vector->txr_count; i++) {
728 j = adapter->tx_ring[r_idx].reg_idx;
729 ixgbevf_set_ivar(adapter, 1, j, v_idx);
730 r_idx = find_next_bit(q_vector->txr_idx,
731 adapter->num_tx_queues,
732 r_idx + 1);
733 }
734
735 /* if this is a tx only vector halve the interrupt rate */
736 if (q_vector->txr_count && !q_vector->rxr_count)
737 q_vector->eitr = (adapter->eitr_param >> 1);
738 else if (q_vector->rxr_count)
739 /* rx only */
740 q_vector->eitr = adapter->eitr_param;
741
742 ixgbevf_write_eitr(adapter, v_idx, q_vector->eitr);
743 }
744
745 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
746
747 /* set up to autoclear timer, and the vectors */
748 mask = IXGBE_EIMS_ENABLE_MASK;
749 mask &= ~IXGBE_EIMS_OTHER;
750 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, mask);
751}
752
753enum latency_range {
754 lowest_latency = 0,
755 low_latency = 1,
756 bulk_latency = 2,
757 latency_invalid = 255
758};
759
760/**
761 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
762 * @adapter: pointer to adapter
763 * @eitr: eitr setting (ints per sec) to give last timeslice
764 * @itr_setting: current throttle rate in ints/second
765 * @packets: the number of packets during this measurement interval
766 * @bytes: the number of bytes during this measurement interval
767 *
768 * Stores a new ITR value based on packets and byte
769 * counts during the last interrupt. The advantage of per interrupt
770 * computation is faster updates and more accurate ITR for the current
771 * traffic pattern. Constants in this function were computed
772 * based on theoretical maximum wire speed and thresholds were set based
773 * on testing data as well as attempting to minimize response time
774 * while increasing bulk throughput.
775 **/
776static u8 ixgbevf_update_itr(struct ixgbevf_adapter *adapter,
777 u32 eitr, u8 itr_setting,
778 int packets, int bytes)
779{
780 unsigned int retval = itr_setting;
781 u32 timepassed_us;
782 u64 bytes_perint;
783
784 if (packets == 0)
785 goto update_itr_done;
786
787
788 /* simple throttlerate management
789 * 0-20MB/s lowest (100000 ints/s)
790 * 20-100MB/s low (20000 ints/s)
791 * 100-1249MB/s bulk (8000 ints/s)
792 */
793 /* what was last interrupt timeslice? */
794 timepassed_us = 1000000/eitr;
795 bytes_perint = bytes / timepassed_us; /* bytes/usec */
796
797 switch (itr_setting) {
798 case lowest_latency:
799 if (bytes_perint > adapter->eitr_low)
800 retval = low_latency;
801 break;
802 case low_latency:
803 if (bytes_perint > adapter->eitr_high)
804 retval = bulk_latency;
805 else if (bytes_perint <= adapter->eitr_low)
806 retval = lowest_latency;
807 break;
808 case bulk_latency:
809 if (bytes_perint <= adapter->eitr_high)
810 retval = low_latency;
811 break;
812 }
813
814update_itr_done:
815 return retval;
816}
817
818/**
819 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
820 * @adapter: pointer to adapter struct
821 * @v_idx: vector index into q_vector array
822 * @itr_reg: new value to be written in *register* format, not ints/s
823 *
824 * This function is made to be called by ethtool and by the driver
825 * when it needs to update VTEITR registers at runtime. Hardware
826 * specific quirks/differences are taken care of here.
827 */
828static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
829 u32 itr_reg)
830{
831 struct ixgbe_hw *hw = &adapter->hw;
832
833 itr_reg = EITR_INTS_PER_SEC_TO_REG(itr_reg);
834
835 /*
836 * set the WDIS bit to not clear the timer bits and cause an
837 * immediate assertion of the interrupt
838 */
839 itr_reg |= IXGBE_EITR_CNT_WDIS;
840
841 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
842}
843
844static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector)
845{
846 struct ixgbevf_adapter *adapter = q_vector->adapter;
847 u32 new_itr;
848 u8 current_itr, ret_itr;
849 int i, r_idx, v_idx = q_vector->v_idx;
850 struct ixgbevf_ring *rx_ring, *tx_ring;
851
852 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
853 for (i = 0; i < q_vector->txr_count; i++) {
854 tx_ring = &(adapter->tx_ring[r_idx]);
855 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
856 q_vector->tx_itr,
857 tx_ring->total_packets,
858 tx_ring->total_bytes);
859 /* if the result for this queue would decrease interrupt
860 * rate for this vector then use that result */
861 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
862 q_vector->tx_itr - 1 : ret_itr);
863 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
864 r_idx + 1);
865 }
866
867 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
868 for (i = 0; i < q_vector->rxr_count; i++) {
869 rx_ring = &(adapter->rx_ring[r_idx]);
870 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
871 q_vector->rx_itr,
872 rx_ring->total_packets,
873 rx_ring->total_bytes);
874 /* if the result for this queue would decrease interrupt
875 * rate for this vector then use that result */
876 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
877 q_vector->rx_itr - 1 : ret_itr);
878 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
879 r_idx + 1);
880 }
881
882 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
883
884 switch (current_itr) {
885 /* counts and packets in update_itr are dependent on these numbers */
886 case lowest_latency:
887 new_itr = 100000;
888 break;
889 case low_latency:
890 new_itr = 20000; /* aka hwitr = ~200 */
891 break;
892 case bulk_latency:
893 default:
894 new_itr = 8000;
895 break;
896 }
897
898 if (new_itr != q_vector->eitr) {
899 u32 itr_reg;
900
901 /* save the algorithm value here, not the smoothed one */
902 q_vector->eitr = new_itr;
903 /* do an exponential smoothing */
904 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
905 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
906 ixgbevf_write_eitr(adapter, v_idx, itr_reg);
907 }
92915f71
GR		 908}
909
910static irqreturn_t ixgbevf_msix_mbx(int irq, void *data)
911{
912 struct net_device *netdev = data;
913 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
914 struct ixgbe_hw *hw = &adapter->hw;
915 u32 eicr;
a9ee25a2 916 u32 msg;
92915f71
GR		 917
918 eicr = IXGBE_READ_REG(hw, IXGBE_VTEICS);
919 IXGBE_WRITE_REG(hw, IXGBE_VTEICR, eicr);
920
08259594
GR		 921 if (!hw->mbx.ops.check_for_ack(hw)) {
922 /*
923 * checking for the ack clears the PFACK bit. Place
924 * it back in the v2p_mailbox cache so that anyone
925 * polling for an ack will not miss it. Also
926 * avoid the read below because the code to read
927 * the mailbox will also clear the ack bit. This was
928 * causing lost acks. Just cache the bit and exit
929 * the IRQ handler.
930 */
931 hw->mbx.v2p_mailbox |= IXGBE_VFMAILBOX_PFACK;
932 goto out;
933 }
934
935 /* Not an ack interrupt, go ahead and read the message */
a9ee25a2
GR		 936 hw->mbx.ops.read(hw, &msg, 1);
937
938 if ((msg & IXGBE_MBVFICR_VFREQ_MASK) == IXGBE_PF_CONTROL_MSG)
939 mod_timer(&adapter->watchdog_timer,
4c3a8223 940 round_jiffies(jiffies + 1));
a9ee25a2 941
08259594 942out:
92915f71
GR		 943 return IRQ_HANDLED;
944}
945
946static irqreturn_t ixgbevf_msix_clean_tx(int irq, void *data)
947{
948 struct ixgbevf_q_vector *q_vector = data;
949 struct ixgbevf_adapter *adapter = q_vector->adapter;
950 struct ixgbevf_ring *tx_ring;
951 int i, r_idx;
952
953 if (!q_vector->txr_count)
954 return IRQ_HANDLED;
955
956 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
957 for (i = 0; i < q_vector->txr_count; i++) {
958 tx_ring = &(adapter->tx_ring[r_idx]);
959 tx_ring->total_bytes = 0;
960 tx_ring->total_packets = 0;
961 ixgbevf_clean_tx_irq(adapter, tx_ring);
962 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
963 r_idx + 1);
964 }
965
966 if (adapter->itr_setting & 1)
967 ixgbevf_set_itr_msix(q_vector);
968
969 return IRQ_HANDLED;
970}
971
972/**
65d676c8 973 * ixgbevf_msix_clean_rx - single unshared vector rx clean (all queues)
92915f71
GR		 974 * @irq: unused
975 * @data: pointer to our q_vector struct for this interrupt vector
976 **/
977static irqreturn_t ixgbevf_msix_clean_rx(int irq, void *data)
978{
979 struct ixgbevf_q_vector *q_vector = data;
980 struct ixgbevf_adapter *adapter = q_vector->adapter;
981 struct ixgbe_hw *hw = &adapter->hw;
982 struct ixgbevf_ring *rx_ring;
983 int r_idx;
984 int i;
985
986 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
987 for (i = 0; i < q_vector->rxr_count; i++) {
988 rx_ring = &(adapter->rx_ring[r_idx]);
989 rx_ring->total_bytes = 0;
990 rx_ring->total_packets = 0;
991 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
992 r_idx + 1);
993 }
994
995 if (!q_vector->rxr_count)
996 return IRQ_HANDLED;
997
998 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
999 rx_ring = &(adapter->rx_ring[r_idx]);
1000 /* disable interrupts on this vector only */
1001 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, rx_ring->v_idx);
1002 napi_schedule(&q_vector->napi);
1003
1004
1005 return IRQ_HANDLED;
1006}
1007
1008static irqreturn_t ixgbevf_msix_clean_many(int irq, void *data)
1009{
1010 ixgbevf_msix_clean_rx(irq, data);
1011 ixgbevf_msix_clean_tx(irq, data);
1012
1013 return IRQ_HANDLED;
1014}
1015
1016static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
1017 int r_idx)
1018{
1019 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1020
1021 set_bit(r_idx, q_vector->rxr_idx);
1022 q_vector->rxr_count++;
1023 a->rx_ring[r_idx].v_idx = 1 << v_idx;
1024}
1025
1026static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
1027 int t_idx)
1028{
1029 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1030
1031 set_bit(t_idx, q_vector->txr_idx);
1032 q_vector->txr_count++;
1033 a->tx_ring[t_idx].v_idx = 1 << v_idx;
1034}
1035
1036/**
1037 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
1038 * @adapter: board private structure to initialize
1039 *
1040 * This function maps descriptor rings to the queue-specific vectors
1041 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1042 * one vector per ring/queue, but on a constrained vector budget, we
1043 * group the rings as "efficiently" as possible. You would add new
1044 * mapping configurations in here.
1045 **/
1046static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
1047{
1048 int q_vectors;
1049 int v_start = 0;
1050 int rxr_idx = 0, txr_idx = 0;
1051 int rxr_remaining = adapter->num_rx_queues;
1052 int txr_remaining = adapter->num_tx_queues;
1053 int i, j;
1054 int rqpv, tqpv;
1055 int err = 0;
1056
1057 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1058
1059 /*
1060 * The ideal configuration...
1061 * We have enough vectors to map one per queue.
1062 */
1063 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1064 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1065 map_vector_to_rxq(adapter, v_start, rxr_idx);
1066
1067 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1068 map_vector_to_txq(adapter, v_start, txr_idx);
1069 goto out;
1070 }
1071
1072 /*
1073 * If we don't have enough vectors for a 1-to-1
1074 * mapping, we'll have to group them so there are
1075 * multiple queues per vector.
1076 */
1077 /* Re-adjusting *qpv takes care of the remainder. */
1078 for (i = v_start; i < q_vectors; i++) {
1079 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
1080 for (j = 0; j < rqpv; j++) {
1081 map_vector_to_rxq(adapter, i, rxr_idx);
1082 rxr_idx++;
1083 rxr_remaining--;
1084 }
1085 }
1086 for (i = v_start; i < q_vectors; i++) {
1087 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
1088 for (j = 0; j < tqpv; j++) {
1089 map_vector_to_txq(adapter, i, txr_idx);
1090 txr_idx++;
1091 txr_remaining--;
1092 }
1093 }
1094
1095out:
1096 return err;
1097}
1098
1099/**
1100 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
1101 * @adapter: board private structure
1102 *
1103 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
1104 * interrupts from the kernel.
1105 **/
1106static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1107{
1108 struct net_device *netdev = adapter->netdev;
1109 irqreturn_t (*handler)(int, void *);
1110 int i, vector, q_vectors, err;
1111 int ri = 0, ti = 0;
1112
1113 /* Decrement for Other and TCP Timer vectors */
1114 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1115
1116#define SET_HANDLER(_v) (((_v)->rxr_count && (_v)->txr_count) \
1117 ? &ixgbevf_msix_clean_many : \
1118 (_v)->rxr_count ? &ixgbevf_msix_clean_rx : \
1119 (_v)->txr_count ? &ixgbevf_msix_clean_tx : \
1120 NULL)
1121 for (vector = 0; vector < q_vectors; vector++) {
1122 handler = SET_HANDLER(adapter->q_vector[vector]);
1123
1124 if (handler == &ixgbevf_msix_clean_rx) {
1125 sprintf(adapter->name[vector], "%s-%s-%d",
1126 netdev->name, "rx", ri++);
1127 } else if (handler == &ixgbevf_msix_clean_tx) {
1128 sprintf(adapter->name[vector], "%s-%s-%d",
1129 netdev->name, "tx", ti++);
1130 } else if (handler == &ixgbevf_msix_clean_many) {
1131 sprintf(adapter->name[vector], "%s-%s-%d",
1132 netdev->name, "TxRx", vector);
1133 } else {
1134 /* skip this unused q_vector */
1135 continue;
1136 }
1137 err = request_irq(adapter->msix_entries[vector].vector,
1138 handler, 0, adapter->name[vector],
1139 adapter->q_vector[vector]);
1140 if (err) {
1141 hw_dbg(&adapter->hw,
1142 "request_irq failed for MSIX interrupt "
1143 "Error: %d\n", err);
1144 goto free_queue_irqs;
1145 }
1146 }
1147
1148 sprintf(adapter->name[vector], "%s:mbx", netdev->name);
1149 err = request_irq(adapter->msix_entries[vector].vector,
1150 &ixgbevf_msix_mbx, 0, adapter->name[vector], netdev);
1151 if (err) {
1152 hw_dbg(&adapter->hw,
1153 "request_irq for msix_mbx failed: %d\n", err);
1154 goto free_queue_irqs;
1155 }
1156
1157 return 0;
1158
1159free_queue_irqs:
1160 for (i = vector - 1; i >= 0; i--)
1161 free_irq(adapter->msix_entries[--vector].vector,
1162 &(adapter->q_vector[i]));
1163 pci_disable_msix(adapter->pdev);
1164 kfree(adapter->msix_entries);
1165 adapter->msix_entries = NULL;
1166 return err;
1167}
1168
1169static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
1170{
1171 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1172
1173 for (i = 0; i < q_vectors; i++) {
1174 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
1175 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1176 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1177 q_vector->rxr_count = 0;
1178 q_vector->txr_count = 0;
1179 q_vector->eitr = adapter->eitr_param;
1180 }
1181}
1182
1183/**
1184 * ixgbevf_request_irq - initialize interrupts
1185 * @adapter: board private structure
1186 *
1187 * Attempts to configure interrupts using the best available
1188 * capabilities of the hardware and kernel.
1189 **/
1190static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1191{
1192 int err = 0;
1193
1194 err = ixgbevf_request_msix_irqs(adapter);
1195
1196 if (err)
1197 hw_dbg(&adapter->hw,
1198 "request_irq failed, Error %d\n", err);
1199
1200 return err;
1201}
1202
1203static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1204{
1205 struct net_device *netdev = adapter->netdev;
1206 int i, q_vectors;
1207
1208 q_vectors = adapter->num_msix_vectors;
1209
1210 i = q_vectors - 1;
1211
1212 free_irq(adapter->msix_entries[i].vector, netdev);
1213 i--;
1214
1215 for (; i >= 0; i--) {
1216 free_irq(adapter->msix_entries[i].vector,
1217 adapter->q_vector[i]);
1218 }
1219
1220 ixgbevf_reset_q_vectors(adapter);
1221}
1222
1223/**
1224 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1225 * @adapter: board private structure
1226 **/
1227static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1228{
1229 int i;
1230 struct ixgbe_hw *hw = &adapter->hw;
1231
1232 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
1233
1234 IXGBE_WRITE_FLUSH(hw);
1235
1236 for (i = 0; i < adapter->num_msix_vectors; i++)
1237 synchronize_irq(adapter->msix_entries[i].vector);
1238}
1239
1240/**
1241 * ixgbevf_irq_enable - Enable default interrupt generation settings
1242 * @adapter: board private structure
1243 **/
1244static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter,
1245 bool queues, bool flush)
1246{
1247 struct ixgbe_hw *hw = &adapter->hw;
1248 u32 mask;
1249 u64 qmask;
1250
1251 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
1252 qmask = ~0;
1253
1254 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
1255
1256 if (queues)
1257 ixgbevf_irq_enable_queues(adapter, qmask);
1258
1259 if (flush)
1260 IXGBE_WRITE_FLUSH(hw);
1261}
1262
1263/**
1264 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1265 * @adapter: board private structure
1266 *
1267 * Configure the Tx unit of the MAC after a reset.
1268 **/
1269static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1270{
1271 u64 tdba;
1272 struct ixgbe_hw *hw = &adapter->hw;
1273 u32 i, j, tdlen, txctrl;
1274
1275 /* Setup the HW Tx Head and Tail descriptor pointers */
1276 for (i = 0; i < adapter->num_tx_queues; i++) {
1277 struct ixgbevf_ring *ring = &adapter->tx_ring[i];
1278 j = ring->reg_idx;
1279 tdba = ring->dma;
1280 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1281 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j),
1282 (tdba & DMA_BIT_MASK(32)));
1283 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(j), (tdba >> 32));
1284 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(j), tdlen);
1285 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(j), 0);
1286 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(j), 0);
1287 adapter->tx_ring[i].head = IXGBE_VFTDH(j);
1288 adapter->tx_ring[i].tail = IXGBE_VFTDT(j);
1289 /* Disable Tx Head Writeback RO bit, since this hoses
1290 * bookkeeping if things aren't delivered in order.
1291 */
1292 txctrl = IXGBE_READ_REG(hw, IXGBE_VFDCA_TXCTRL(j));
1293 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1294 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(j), txctrl);
1295 }
1296}
1297
1298#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1299
1300static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1301{
1302 struct ixgbevf_ring *rx_ring;
1303 struct ixgbe_hw *hw = &adapter->hw;
1304 u32 srrctl;
1305
1306 rx_ring = &adapter->rx_ring[index];
1307
1308 srrctl = IXGBE_SRRCTL_DROP_EN;
1309
1310 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1311 u16 bufsz = IXGBEVF_RXBUFFER_2048;
1312 /* grow the amount we can receive on large page machines */
1313 if (bufsz < (PAGE_SIZE / 2))
1314 bufsz = (PAGE_SIZE / 2);
1315 /* cap the bufsz at our largest descriptor size */
1316 bufsz = min((u16)IXGBEVF_MAX_RXBUFFER, bufsz);
1317
1318 srrctl |= bufsz >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1319 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1320 srrctl |= ((IXGBEVF_RX_HDR_SIZE <<
1321 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1322 IXGBE_SRRCTL_BSIZEHDR_MASK);
1323 } else {
1324 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1325
1326 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1327 srrctl |= IXGBEVF_RXBUFFER_2048 >>
1328 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1329 else
1330 srrctl |= rx_ring->rx_buf_len >>
1331 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1332 }
1333 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1334}
1335
1336/**
1337 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1338 * @adapter: board private structure
1339 *
1340 * Configure the Rx unit of the MAC after a reset.
1341 **/
1342static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1343{
1344 u64 rdba;
1345 struct ixgbe_hw *hw = &adapter->hw;
1346 struct net_device *netdev = adapter->netdev;
1347 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1348 int i, j;
1349 u32 rdlen;
1350 int rx_buf_len;
1351
1352 /* Decide whether to use packet split mode or not */
1353 if (netdev->mtu > ETH_DATA_LEN) {
1354 if (adapter->flags & IXGBE_FLAG_RX_PS_CAPABLE)
1355 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1356 else
1357 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1358 } else {
1359 if (adapter->flags & IXGBE_FLAG_RX_1BUF_CAPABLE)
1360 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1361 else
1362 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1363 }
1364
1365 /* Set the RX buffer length according to the mode */
1366 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1367 /* PSRTYPE must be initialized in 82599 */
1368 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
1369 IXGBE_PSRTYPE_UDPHDR |
1370 IXGBE_PSRTYPE_IPV4HDR |
1371 IXGBE_PSRTYPE_IPV6HDR |
1372 IXGBE_PSRTYPE_L2HDR;
1373 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1374 rx_buf_len = IXGBEVF_RX_HDR_SIZE;
1375 } else {
1376 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
1377 if (netdev->mtu <= ETH_DATA_LEN)
1378 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1379 else
1380 rx_buf_len = ALIGN(max_frame, 1024);
1381 }
1382
1383 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1384 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1385 * the Base and Length of the Rx Descriptor Ring */
1386 for (i = 0; i < adapter->num_rx_queues; i++) {
1387 rdba = adapter->rx_ring[i].dma;
1388 j = adapter->rx_ring[i].reg_idx;
1389 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(j),
1390 (rdba & DMA_BIT_MASK(32)));
1391 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(j), (rdba >> 32));
1392 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(j), rdlen);
1393 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(j), 0);
1394 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(j), 0);
1395 adapter->rx_ring[i].head = IXGBE_VFRDH(j);
1396 adapter->rx_ring[i].tail = IXGBE_VFRDT(j);
1397 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1398
1399 ixgbevf_configure_srrctl(adapter, j);
1400 }
1401}
1402
1403static void ixgbevf_vlan_rx_register(struct net_device *netdev,
1404 struct vlan_group *grp)
1405{
1406 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1407 struct ixgbe_hw *hw = &adapter->hw;
1408 int i, j;
1409 u32 ctrl;
1410
1411 adapter->vlgrp = grp;
1412
1413 for (i = 0; i < adapter->num_rx_queues; i++) {
1414 j = adapter->rx_ring[i].reg_idx;
1415 ctrl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1416 ctrl |= IXGBE_RXDCTL_VME;
1417 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), ctrl);
1418 }
1419}
1420
1421static void ixgbevf_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1422{
1423 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1424 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 1425
1426 /* add VID to filter table */
1427 if (hw->mac.ops.set_vfta)
1428 hw->mac.ops.set_vfta(hw, vid, 0, true);
92915f71
GR		 1429}
1430
1431static void ixgbevf_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1432{
1433 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1434 struct ixgbe_hw *hw = &adapter->hw;
1435
1436 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
1437 ixgbevf_irq_disable(adapter);
1438
1439 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1440
1441 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
1442 ixgbevf_irq_enable(adapter, true, true);
1443
1444 /* remove VID from filter table */
1445 if (hw->mac.ops.set_vfta)
1446 hw->mac.ops.set_vfta(hw, vid, 0, false);
1447}
1448
1449static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1450{
1451 ixgbevf_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1452
1453 if (adapter->vlgrp) {
1454 u16 vid;
b738127d 1455 for (vid = 0; vid < VLAN_N_VID; vid++) {
92915f71
GR		 1456 if (!vlan_group_get_device(adapter->vlgrp, vid))
1457 continue;
1458 ixgbevf_vlan_rx_add_vid(adapter->netdev, vid);
1459 }
1460 }
1461}
1462
46ec20ff
GR		 1463static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
1464{
1465 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1466 struct ixgbe_hw *hw = &adapter->hw;
1467 int count = 0;
1468
1469 if ((netdev_uc_count(netdev)) > 10) {
1470 printk(KERN_ERR "Too many unicast filters - No Space\n");
1471 return -ENOSPC;
1472 }
1473
1474 if (!netdev_uc_empty(netdev)) {
1475 struct netdev_hw_addr *ha;
1476 netdev_for_each_uc_addr(ha, netdev) {
1477 hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
1478 udelay(200);
1479 }
1480 } else {
1481 /*
1482 * If the list is empty then send message to PF driver to
1483 * clear all macvlans on this VF.
1484 */
1485 hw->mac.ops.set_uc_addr(hw, 0, NULL);
1486 }
1487
1488 return count;
1489}
1490
92915f71
GR		 1491/**
1492 * ixgbevf_set_rx_mode - Multicast set
1493 * @netdev: network interface device structure
1494 *
1495 * The set_rx_method entry point is called whenever the multicast address
1496 * list or the network interface flags are updated. This routine is
1497 * responsible for configuring the hardware for proper multicast mode.
1498 **/
1499static void ixgbevf_set_rx_mode(struct net_device *netdev)
1500{
1501 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1502 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 1503
1504 /* reprogram multicast list */
92915f71 1505 if (hw->mac.ops.update_mc_addr_list)
5c58c47a 1506 hw->mac.ops.update_mc_addr_list(hw, netdev);
46ec20ff
GR		 1507
1508 ixgbevf_write_uc_addr_list(netdev);
92915f71
GR		 1509}
1510
1511static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1512{
1513 int q_idx;
1514 struct ixgbevf_q_vector *q_vector;
1515 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1516
1517 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1518 struct napi_struct *napi;
1519 q_vector = adapter->q_vector[q_idx];
1520 if (!q_vector->rxr_count)
1521 continue;
1522 napi = &q_vector->napi;
1523 if (q_vector->rxr_count > 1)
1524 napi->poll = &ixgbevf_clean_rxonly_many;
1525
1526 napi_enable(napi);
1527 }
1528}
1529
1530static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1531{
1532 int q_idx;
1533 struct ixgbevf_q_vector *q_vector;
1534 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1535
1536 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1537 q_vector = adapter->q_vector[q_idx];
1538 if (!q_vector->rxr_count)
1539 continue;
1540 napi_disable(&q_vector->napi);
1541 }
1542}
1543
1544static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1545{
1546 struct net_device *netdev = adapter->netdev;
1547 int i;
1548
1549 ixgbevf_set_rx_mode(netdev);
1550
1551 ixgbevf_restore_vlan(adapter);
1552
1553 ixgbevf_configure_tx(adapter);
1554 ixgbevf_configure_rx(adapter);
1555 for (i = 0; i < adapter->num_rx_queues; i++) {
1556 struct ixgbevf_ring *ring = &adapter->rx_ring[i];
1557 ixgbevf_alloc_rx_buffers(adapter, ring, ring->count);
1558 ring->next_to_use = ring->count - 1;
1559 writel(ring->next_to_use, adapter->hw.hw_addr + ring->tail);
1560 }
1561}
1562
1563#define IXGBE_MAX_RX_DESC_POLL 10
1564static inline void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1565 int rxr)
1566{
1567 struct ixgbe_hw *hw = &adapter->hw;
1568 int j = adapter->rx_ring[rxr].reg_idx;
1569 int k;
1570
1571 for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) {
1572 if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)) & IXGBE_RXDCTL_ENABLE)
1573 break;
1574 else
1575 msleep(1);
1576 }
1577 if (k >= IXGBE_MAX_RX_DESC_POLL) {
1578 hw_dbg(hw, "RXDCTL.ENABLE on Rx queue %d "
1579 "not set within the polling period\n", rxr);
1580 }
1581
1582 ixgbevf_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr],
1583 (adapter->rx_ring[rxr].count - 1));
1584}
1585
33bd9f60
GR		 1586static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
1587{
1588 /* Only save pre-reset stats if there are some */
1589 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
1590 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
1591 adapter->stats.base_vfgprc;
1592 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
1593 adapter->stats.base_vfgptc;
1594 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
1595 adapter->stats.base_vfgorc;
1596 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
1597 adapter->stats.base_vfgotc;
1598 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
1599 adapter->stats.base_vfmprc;
1600 }
1601}
1602
1603static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
1604{
1605 struct ixgbe_hw *hw = &adapter->hw;
1606
1607 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
1608 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
1609 adapter->stats.last_vfgorc |=
1610 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
1611 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
1612 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
1613 adapter->stats.last_vfgotc |=
1614 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
1615 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
1616
1617 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
1618 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
1619 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
1620 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
1621 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
1622}
1623
92915f71
GR		 1624static int ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
1625{
1626 struct net_device *netdev = adapter->netdev;
1627 struct ixgbe_hw *hw = &adapter->hw;
1628 int i, j = 0;
1629 int num_rx_rings = adapter->num_rx_queues;
1630 u32 txdctl, rxdctl;
1631
1632 for (i = 0; i < adapter->num_tx_queues; i++) {
1633 j = adapter->tx_ring[i].reg_idx;
1634 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1635 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1636 txdctl |= (8 << 16);
1637 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1638 }
1639
1640 for (i = 0; i < adapter->num_tx_queues; i++) {
1641 j = adapter->tx_ring[i].reg_idx;
1642 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1643 txdctl |= IXGBE_TXDCTL_ENABLE;
1644 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1645 }
1646
1647 for (i = 0; i < num_rx_rings; i++) {
1648 j = adapter->rx_ring[i].reg_idx;
1649 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1650 rxdctl |= IXGBE_RXDCTL_ENABLE;
69bfbec4
GR		 1651 if (hw->mac.type == ixgbe_mac_X540_vf) {
1652 rxdctl &= ~IXGBE_RXDCTL_RLPMLMASK;
1653 rxdctl |= ((netdev->mtu + ETH_HLEN + ETH_FCS_LEN) |
1654 IXGBE_RXDCTL_RLPML_EN);
1655 }
92915f71
GR		 1656 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);
1657 ixgbevf_rx_desc_queue_enable(adapter, i);
1658 }
1659
1660 ixgbevf_configure_msix(adapter);
1661
1662 if (hw->mac.ops.set_rar) {
1663 if (is_valid_ether_addr(hw->mac.addr))
1664 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
1665 else
1666 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
1667 }
1668
1669 clear_bit(__IXGBEVF_DOWN, &adapter->state);
1670 ixgbevf_napi_enable_all(adapter);
1671
1672 /* enable transmits */
1673 netif_tx_start_all_queues(netdev);
1674
33bd9f60
GR		 1675 ixgbevf_save_reset_stats(adapter);
1676 ixgbevf_init_last_counter_stats(adapter);
1677
92915f71
GR		 1678 /* bring the link up in the watchdog, this could race with our first
1679 * link up interrupt but shouldn't be a problem */
1680 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
1681 adapter->link_check_timeout = jiffies;
1682 mod_timer(&adapter->watchdog_timer, jiffies);
1683 return 0;
1684}
1685
1686int ixgbevf_up(struct ixgbevf_adapter *adapter)
1687{
1688 int err;
1689 struct ixgbe_hw *hw = &adapter->hw;
1690
1691 ixgbevf_configure(adapter);
1692
1693 err = ixgbevf_up_complete(adapter);
1694
1695 /* clear any pending interrupts, may auto mask */
1696 IXGBE_READ_REG(hw, IXGBE_VTEICR);
1697
1698 ixgbevf_irq_enable(adapter, true, true);
1699
1700 return err;
1701}
1702
1703/**
1704 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
1705 * @adapter: board private structure
1706 * @rx_ring: ring to free buffers from
1707 **/
1708static void ixgbevf_clean_rx_ring(struct ixgbevf_adapter *adapter,
1709 struct ixgbevf_ring *rx_ring)
1710{
1711 struct pci_dev *pdev = adapter->pdev;
1712 unsigned long size;
1713 unsigned int i;
1714
c0456c23
GR		 1715 if (!rx_ring->rx_buffer_info)
1716 return;
92915f71 1717
c0456c23 1718 /* Free all the Rx ring sk_buffs */
92915f71
GR		 1719 for (i = 0; i < rx_ring->count; i++) {
1720 struct ixgbevf_rx_buffer *rx_buffer_info;
1721
1722 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1723 if (rx_buffer_info->dma) {
2a1f8794 1724 dma_unmap_single(&pdev->dev, rx_buffer_info->dma,
92915f71 1725 rx_ring->rx_buf_len,
2a1f8794 1726 DMA_FROM_DEVICE);
92915f71
GR		 1727 rx_buffer_info->dma = 0;
1728 }
1729 if (rx_buffer_info->skb) {
1730 struct sk_buff *skb = rx_buffer_info->skb;
1731 rx_buffer_info->skb = NULL;
1732 do {
1733 struct sk_buff *this = skb;
1734 skb = skb->prev;
1735 dev_kfree_skb(this);
1736 } while (skb);
1737 }
1738 if (!rx_buffer_info->page)
1739 continue;
2a1f8794
NN		 1740 dma_unmap_page(&pdev->dev, rx_buffer_info->page_dma,
1741 PAGE_SIZE / 2, DMA_FROM_DEVICE);
92915f71
GR		 1742 rx_buffer_info->page_dma = 0;
1743 put_page(rx_buffer_info->page);
1744 rx_buffer_info->page = NULL;
1745 rx_buffer_info->page_offset = 0;
1746 }
1747
1748 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
1749 memset(rx_ring->rx_buffer_info, 0, size);
1750
1751 /* Zero out the descriptor ring */
1752 memset(rx_ring->desc, 0, rx_ring->size);
1753
1754 rx_ring->next_to_clean = 0;
1755 rx_ring->next_to_use = 0;
1756
1757 if (rx_ring->head)
1758 writel(0, adapter->hw.hw_addr + rx_ring->head);
1759 if (rx_ring->tail)
1760 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1761}
1762
1763/**
1764 * ixgbevf_clean_tx_ring - Free Tx Buffers
1765 * @adapter: board private structure
1766 * @tx_ring: ring to be cleaned
1767 **/
1768static void ixgbevf_clean_tx_ring(struct ixgbevf_adapter *adapter,
1769 struct ixgbevf_ring *tx_ring)
1770{
1771 struct ixgbevf_tx_buffer *tx_buffer_info;
1772 unsigned long size;
1773 unsigned int i;
1774
c0456c23
GR		 1775 if (!tx_ring->tx_buffer_info)
1776 return;
1777
92915f71
GR		 1778 /* Free all the Tx ring sk_buffs */
1779
1780 for (i = 0; i < tx_ring->count; i++) {
1781 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1782 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1783 }
1784
1785 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
1786 memset(tx_ring->tx_buffer_info, 0, size);
1787
1788 memset(tx_ring->desc, 0, tx_ring->size);
1789
1790 tx_ring->next_to_use = 0;
1791 tx_ring->next_to_clean = 0;
1792
1793 if (tx_ring->head)
1794 writel(0, adapter->hw.hw_addr + tx_ring->head);
1795 if (tx_ring->tail)
1796 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1797}
1798
1799/**
1800 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
1801 * @adapter: board private structure
1802 **/
1803static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
1804{
1805 int i;
1806
1807 for (i = 0; i < adapter->num_rx_queues; i++)
1808 ixgbevf_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1809}
1810
1811/**
1812 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
1813 * @adapter: board private structure
1814 **/
1815static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
1816{
1817 int i;
1818
1819 for (i = 0; i < adapter->num_tx_queues; i++)
1820 ixgbevf_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1821}
1822
1823void ixgbevf_down(struct ixgbevf_adapter *adapter)
1824{
1825 struct net_device *netdev = adapter->netdev;
1826 struct ixgbe_hw *hw = &adapter->hw;
1827 u32 txdctl;
1828 int i, j;
1829
1830 /* signal that we are down to the interrupt handler */
1831 set_bit(__IXGBEVF_DOWN, &adapter->state);
1832 /* disable receives */
1833
1834 netif_tx_disable(netdev);
1835
1836 msleep(10);
1837
1838 netif_tx_stop_all_queues(netdev);
1839
1840 ixgbevf_irq_disable(adapter);
1841
1842 ixgbevf_napi_disable_all(adapter);
1843
1844 del_timer_sync(&adapter->watchdog_timer);
1845 /* can't call flush scheduled work here because it can deadlock
1846 * if linkwatch_event tries to acquire the rtnl_lock which we are
1847 * holding */
1848 while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK)
1849 msleep(1);
1850
1851 /* disable transmits in the hardware now that interrupts are off */
1852 for (i = 0; i < adapter->num_tx_queues; i++) {
1853 j = adapter->tx_ring[i].reg_idx;
1854 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1855 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j),
1856 (txdctl & ~IXGBE_TXDCTL_ENABLE));
1857 }
1858
1859 netif_carrier_off(netdev);
1860
1861 if (!pci_channel_offline(adapter->pdev))
1862 ixgbevf_reset(adapter);
1863
1864 ixgbevf_clean_all_tx_rings(adapter);
1865 ixgbevf_clean_all_rx_rings(adapter);
1866}
1867
1868void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
1869{
c0456c23
GR		 1870 struct ixgbe_hw *hw = &adapter->hw;
1871
92915f71 1872 WARN_ON(in_interrupt());
c0456c23 1873
92915f71
GR		 1874 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
1875 msleep(1);
1876
c0456c23
GR		 1877 /*
1878 * Check if PF is up before re-init. If not then skip until
1879 * later when the PF is up and ready to service requests from
1880 * the VF via mailbox. If the VF is up and running then the
1881 * watchdog task will continue to schedule reset tasks until
1882 * the PF is up and running.
1883 */
1884 if (!hw->mac.ops.reset_hw(hw)) {
1885 ixgbevf_down(adapter);
1886 ixgbevf_up(adapter);
1887 }
92915f71
GR		 1888
1889 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
1890}
1891
1892void ixgbevf_reset(struct ixgbevf_adapter *adapter)
1893{
1894 struct ixgbe_hw *hw = &adapter->hw;
1895 struct net_device *netdev = adapter->netdev;
1896
1897 if (hw->mac.ops.reset_hw(hw))
1898 hw_dbg(hw, "PF still resetting\n");
1899 else
1900 hw->mac.ops.init_hw(hw);
1901
1902 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
1903 memcpy(netdev->dev_addr, adapter->hw.mac.addr,
1904 netdev->addr_len);
1905 memcpy(netdev->perm_addr, adapter->hw.mac.addr,
1906 netdev->addr_len);
1907 }
1908}
1909
1910static void ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
1911 int vectors)
1912{
1913 int err, vector_threshold;
1914
1915 /* We'll want at least 3 (vector_threshold):
1916 * 1) TxQ[0] Cleanup
1917 * 2) RxQ[0] Cleanup
1918 * 3) Other (Link Status Change, etc.)
1919 */
1920 vector_threshold = MIN_MSIX_COUNT;
1921
1922 /* The more we get, the more we will assign to Tx/Rx Cleanup
1923 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
1924 * Right now, we simply care about how many we'll get; we'll
1925 * set them up later while requesting irq's.
1926 */
1927 while (vectors >= vector_threshold) {
1928 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1929 vectors);
1930 if (!err) /* Success in acquiring all requested vectors. */
1931 break;
1932 else if (err < 0)
1933 vectors = 0; /* Nasty failure, quit now */
1934 else /* err == number of vectors we should try again with */
1935 vectors = err;
1936 }
1937
1938 if (vectors < vector_threshold) {
1939 /* Can't allocate enough MSI-X interrupts? Oh well.
1940 * This just means we'll go with either a single MSI
1941 * vector or fall back to legacy interrupts.
1942 */
1943 hw_dbg(&adapter->hw,
1944 "Unable to allocate MSI-X interrupts\n");
1945 kfree(adapter->msix_entries);
1946 adapter->msix_entries = NULL;
1947 } else {
1948 /*
1949 * Adjust for only the vectors we'll use, which is minimum
1950 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
1951 * vectors we were allocated.
1952 */
1953 adapter->num_msix_vectors = vectors;
1954 }
1955}
1956
1957/*
25985edc 1958 * ixgbevf_set_num_queues: Allocate queues for device, feature dependent
92915f71
GR		 1959 * @adapter: board private structure to initialize
1960 *
1961 * This is the top level queue allocation routine. The order here is very
1962 * important, starting with the "most" number of features turned on at once,
1963 * and ending with the smallest set of features. This way large combinations
1964 * can be allocated if they're turned on, and smaller combinations are the
1965 * fallthrough conditions.
1966 *
1967 **/
1968static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
1969{
1970 /* Start with base case */
1971 adapter->num_rx_queues = 1;
1972 adapter->num_tx_queues = 1;
1973 adapter->num_rx_pools = adapter->num_rx_queues;
1974 adapter->num_rx_queues_per_pool = 1;
1975}
1976
1977/**
1978 * ixgbevf_alloc_queues - Allocate memory for all rings
1979 * @adapter: board private structure to initialize
1980 *
1981 * We allocate one ring per queue at run-time since we don't know the
1982 * number of queues at compile-time. The polling_netdev array is
1983 * intended for Multiqueue, but should work fine with a single queue.
1984 **/
1985static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
1986{
1987 int i;
1988
1989 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1990 sizeof(struct ixgbevf_ring), GFP_KERNEL);
1991 if (!adapter->tx_ring)
1992 goto err_tx_ring_allocation;
1993
1994 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1995 sizeof(struct ixgbevf_ring), GFP_KERNEL);
1996 if (!adapter->rx_ring)
1997 goto err_rx_ring_allocation;
1998
1999 for (i = 0; i < adapter->num_tx_queues; i++) {
2000 adapter->tx_ring[i].count = adapter->tx_ring_count;
2001 adapter->tx_ring[i].queue_index = i;
2002 adapter->tx_ring[i].reg_idx = i;
2003 }
2004
2005 for (i = 0; i < adapter->num_rx_queues; i++) {
2006 adapter->rx_ring[i].count = adapter->rx_ring_count;
2007 adapter->rx_ring[i].queue_index = i;
2008 adapter->rx_ring[i].reg_idx = i;
2009 }
2010
2011 return 0;
2012
2013err_rx_ring_allocation:
2014 kfree(adapter->tx_ring);
2015err_tx_ring_allocation:
2016 return -ENOMEM;
2017}
2018
2019/**
2020 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
2021 * @adapter: board private structure to initialize
2022 *
2023 * Attempt to configure the interrupts using the best available
2024 * capabilities of the hardware and the kernel.
2025 **/
2026static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2027{
2028 int err = 0;
2029 int vector, v_budget;
2030
2031 /*
2032 * It's easy to be greedy for MSI-X vectors, but it really
2033 * doesn't do us much good if we have a lot more vectors
2034 * than CPU's. So let's be conservative and only ask for
2035 * (roughly) twice the number of vectors as there are CPU's.
2036 */
2037 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2038 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2039
2040 /* A failure in MSI-X entry allocation isn't fatal, but it does
2041 * mean we disable MSI-X capabilities of the adapter. */
2042 adapter->msix_entries = kcalloc(v_budget,
2043 sizeof(struct msix_entry), GFP_KERNEL);
2044 if (!adapter->msix_entries) {
2045 err = -ENOMEM;
2046 goto out;
2047 }
2048
2049 for (vector = 0; vector < v_budget; vector++)
2050 adapter->msix_entries[vector].entry = vector;
2051
2052 ixgbevf_acquire_msix_vectors(adapter, v_budget);
2053
2054out:
2055 return err;
2056}
2057
2058/**
2059 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2060 * @adapter: board private structure to initialize
2061 *
2062 * We allocate one q_vector per queue interrupt. If allocation fails we
2063 * return -ENOMEM.
2064 **/
2065static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2066{
2067 int q_idx, num_q_vectors;
2068 struct ixgbevf_q_vector *q_vector;
2069 int napi_vectors;
2070 int (*poll)(struct napi_struct *, int);
2071
2072 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2073 napi_vectors = adapter->num_rx_queues;
2074 poll = &ixgbevf_clean_rxonly;
2075
2076 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2077 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
2078 if (!q_vector)
2079 goto err_out;
2080 q_vector->adapter = adapter;
2081 q_vector->v_idx = q_idx;
2082 q_vector->eitr = adapter->eitr_param;
2083 if (q_idx < napi_vectors)
2084 netif_napi_add(adapter->netdev, &q_vector->napi,
2085 (*poll), 64);
2086 adapter->q_vector[q_idx] = q_vector;
2087 }
2088
2089 return 0;
2090
2091err_out:
2092 while (q_idx) {
2093 q_idx--;
2094 q_vector = adapter->q_vector[q_idx];
2095 netif_napi_del(&q_vector->napi);
2096 kfree(q_vector);
2097 adapter->q_vector[q_idx] = NULL;
2098 }
2099 return -ENOMEM;
2100}
2101
2102/**
2103 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2104 * @adapter: board private structure to initialize
2105 *
2106 * This function frees the memory allocated to the q_vectors. In addition if
2107 * NAPI is enabled it will delete any references to the NAPI struct prior
2108 * to freeing the q_vector.
2109 **/
2110static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2111{
2112 int q_idx, num_q_vectors;
2113 int napi_vectors;
2114
2115 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2116 napi_vectors = adapter->num_rx_queues;
2117
2118 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2119 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
2120
2121 adapter->q_vector[q_idx] = NULL;
2122 if (q_idx < napi_vectors)
2123 netif_napi_del(&q_vector->napi);
2124 kfree(q_vector);
2125 }
2126}
2127
2128/**
2129 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2130 * @adapter: board private structure
2131 *
2132 **/
2133static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2134{
2135 pci_disable_msix(adapter->pdev);
2136 kfree(adapter->msix_entries);
2137 adapter->msix_entries = NULL;
92915f71
GR		 2138}
2139
2140/**
2141 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2142 * @adapter: board private structure to initialize
2143 *
2144 **/
2145static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2146{
2147 int err;
2148
2149 /* Number of supported queues */
2150 ixgbevf_set_num_queues(adapter);
2151
2152 err = ixgbevf_set_interrupt_capability(adapter);
2153 if (err) {
2154 hw_dbg(&adapter->hw,
2155 "Unable to setup interrupt capabilities\n");
2156 goto err_set_interrupt;
2157 }
2158
2159 err = ixgbevf_alloc_q_vectors(adapter);
2160 if (err) {
2161 hw_dbg(&adapter->hw, "Unable to allocate memory for queue "
2162 "vectors\n");
2163 goto err_alloc_q_vectors;
2164 }
2165
2166 err = ixgbevf_alloc_queues(adapter);
2167 if (err) {
2168 printk(KERN_ERR "Unable to allocate memory for queues\n");
2169 goto err_alloc_queues;
2170 }
2171
2172 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, "
2173 "Tx Queue count = %u\n",
2174 (adapter->num_rx_queues > 1) ? "Enabled" :
2175 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2176
2177 set_bit(__IXGBEVF_DOWN, &adapter->state);
2178
2179 return 0;
2180err_alloc_queues:
2181 ixgbevf_free_q_vectors(adapter);
2182err_alloc_q_vectors:
2183 ixgbevf_reset_interrupt_capability(adapter);
2184err_set_interrupt:
2185 return err;
2186}
2187
2188/**
2189 * ixgbevf_sw_init - Initialize general software structures
2190 * (struct ixgbevf_adapter)
2191 * @adapter: board private structure to initialize
2192 *
2193 * ixgbevf_sw_init initializes the Adapter private data structure.
2194 * Fields are initialized based on PCI device information and
2195 * OS network device settings (MTU size).
2196 **/
2197static int __devinit ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
2198{
2199 struct ixgbe_hw *hw = &adapter->hw;
2200 struct pci_dev *pdev = adapter->pdev;
2201 int err;
2202
2203 /* PCI config space info */
2204
2205 hw->vendor_id = pdev->vendor;
2206 hw->device_id = pdev->device;
ff938e43 2207 hw->revision_id = pdev->revision;
92915f71
GR		 2208 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2209 hw->subsystem_device_id = pdev->subsystem_device;
2210
2211 hw->mbx.ops.init_params(hw);
2212 hw->mac.max_tx_queues = MAX_TX_QUEUES;
2213 hw->mac.max_rx_queues = MAX_RX_QUEUES;
2214 err = hw->mac.ops.reset_hw(hw);
2215 if (err) {
2216 dev_info(&pdev->dev,
2217 "PF still in reset state, assigning new address\n");
2c6952df 2218 dev_hw_addr_random(adapter->netdev, hw->mac.addr);
92915f71
GR		 2219 } else {
2220 err = hw->mac.ops.init_hw(hw);
2221 if (err) {
2222 printk(KERN_ERR "init_shared_code failed: %d\n", err);
2223 goto out;
2224 }
2225 }
2226
2227 /* Enable dynamic interrupt throttling rates */
2228 adapter->eitr_param = 20000;
2229 adapter->itr_setting = 1;
2230
2231 /* set defaults for eitr in MegaBytes */
2232 adapter->eitr_low = 10;
2233 adapter->eitr_high = 20;
2234
2235 /* set default ring sizes */
2236 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2237 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2238
2239 /* enable rx csum by default */
2240 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2241
2242 set_bit(__IXGBEVF_DOWN, &adapter->state);
2243
2244out:
2245 return err;
2246}
2247
92915f71
GR		 2248#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2249 { \
2250 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2251 if (current_counter < last_counter) \
2252 counter += 0x100000000LL; \
2253 last_counter = current_counter; \
2254 counter &= 0xFFFFFFFF00000000LL; \
2255 counter |= current_counter; \
2256 }
2257
2258#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2259 { \
2260 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2261 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
2262 u64 current_counter = (current_counter_msb << 32) | \
2263 current_counter_lsb; \
2264 if (current_counter < last_counter) \
2265 counter += 0x1000000000LL; \
2266 last_counter = current_counter; \
2267 counter &= 0xFFFFFFF000000000LL; \
2268 counter |= current_counter; \
2269 }
2270/**
2271 * ixgbevf_update_stats - Update the board statistics counters.
2272 * @adapter: board private structure
2273 **/
2274void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2275{
2276 struct ixgbe_hw *hw = &adapter->hw;
2277
2278 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2279 adapter->stats.vfgprc);
2280 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2281 adapter->stats.vfgptc);
2282 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2283 adapter->stats.last_vfgorc,
2284 adapter->stats.vfgorc);
2285 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2286 adapter->stats.last_vfgotc,
2287 adapter->stats.vfgotc);
2288 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2289 adapter->stats.vfmprc);
2290
2291 /* Fill out the OS statistics structure */
fb621bac 2292 adapter->netdev->stats.multicast = adapter->stats.vfmprc -
92915f71
GR		 2293 adapter->stats.base_vfmprc;
2294}
2295
2296/**
2297 * ixgbevf_watchdog - Timer Call-back
2298 * @data: pointer to adapter cast into an unsigned long
2299 **/
2300static void ixgbevf_watchdog(unsigned long data)
2301{
2302 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
2303 struct ixgbe_hw *hw = &adapter->hw;
2304 u64 eics = 0;
2305 int i;
2306
2307 /*
2308 * Do the watchdog outside of interrupt context due to the lovely
2309 * delays that some of the newer hardware requires
2310 */
2311
2312 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
2313 goto watchdog_short_circuit;
2314
2315 /* get one bit for every active tx/rx interrupt vector */
2316 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2317 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
2318 if (qv->rxr_count || qv->txr_count)
2319 eics |= (1 << i);
2320 }
2321
2322 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, (u32)eics);
2323
2324watchdog_short_circuit:
2325 schedule_work(&adapter->watchdog_task);
2326}
2327
2328/**
2329 * ixgbevf_tx_timeout - Respond to a Tx Hang
2330 * @netdev: network interface device structure
2331 **/
2332static void ixgbevf_tx_timeout(struct net_device *netdev)
2333{
2334 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2335
2336 /* Do the reset outside of interrupt context */
2337 schedule_work(&adapter->reset_task);
2338}
2339
2340static void ixgbevf_reset_task(struct work_struct *work)
2341{
2342 struct ixgbevf_adapter *adapter;
2343 adapter = container_of(work, struct ixgbevf_adapter, reset_task);
2344
2345 /* If we're already down or resetting, just bail */
2346 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2347 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2348 return;
2349
2350 adapter->tx_timeout_count++;
2351
2352 ixgbevf_reinit_locked(adapter);
2353}
2354
2355/**
2356 * ixgbevf_watchdog_task - worker thread to bring link up
2357 * @work: pointer to work_struct containing our data
2358 **/
2359static void ixgbevf_watchdog_task(struct work_struct *work)
2360{
2361 struct ixgbevf_adapter *adapter = container_of(work,
2362 struct ixgbevf_adapter,
2363 watchdog_task);
2364 struct net_device *netdev = adapter->netdev;
2365 struct ixgbe_hw *hw = &adapter->hw;
2366 u32 link_speed = adapter->link_speed;
2367 bool link_up = adapter->link_up;
2368
2369 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
2370
2371 /*
2372 * Always check the link on the watchdog because we have
2373 * no LSC interrupt
2374 */
2375 if (hw->mac.ops.check_link) {
2376 if ((hw->mac.ops.check_link(hw, &link_speed,
2377 &link_up, false)) != 0) {
2378 adapter->link_up = link_up;
2379 adapter->link_speed = link_speed;
da6b3330
GR		 2380 netif_carrier_off(netdev);
2381 netif_tx_stop_all_queues(netdev);
92915f71
GR		 2382 schedule_work(&adapter->reset_task);
2383 goto pf_has_reset;
2384 }
2385 } else {
2386 /* always assume link is up, if no check link
2387 * function */
2388 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
2389 link_up = true;
2390 }
2391 adapter->link_up = link_up;
2392 adapter->link_speed = link_speed;
2393
2394 if (link_up) {
2395 if (!netif_carrier_ok(netdev)) {
300bc060
JP		 2396 hw_dbg(&adapter->hw, "NIC Link is Up, %u Gbps\n",
2397 (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
2398 10 : 1);
92915f71
GR		 2399 netif_carrier_on(netdev);
2400 netif_tx_wake_all_queues(netdev);
92915f71
GR		 2401 }
2402 } else {
2403 adapter->link_up = false;
2404 adapter->link_speed = 0;
2405 if (netif_carrier_ok(netdev)) {
2406 hw_dbg(&adapter->hw, "NIC Link is Down\n");
2407 netif_carrier_off(netdev);
2408 netif_tx_stop_all_queues(netdev);
2409 }
2410 }
2411
92915f71
GR		 2412 ixgbevf_update_stats(adapter);
2413
33bd9f60 2414pf_has_reset:
92915f71
GR		 2415 /* Reset the timer */
2416 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
2417 mod_timer(&adapter->watchdog_timer,
2418 round_jiffies(jiffies + (2 * HZ)));
2419
2420 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
2421}
2422
2423/**
2424 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
2425 * @adapter: board private structure
2426 * @tx_ring: Tx descriptor ring for a specific queue
2427 *
2428 * Free all transmit software resources
2429 **/
2430void ixgbevf_free_tx_resources(struct ixgbevf_adapter *adapter,
2431 struct ixgbevf_ring *tx_ring)
2432{
2433 struct pci_dev *pdev = adapter->pdev;
2434
92915f71
GR		 2435 ixgbevf_clean_tx_ring(adapter, tx_ring);
2436
2437 vfree(tx_ring->tx_buffer_info);
2438 tx_ring->tx_buffer_info = NULL;
2439
2a1f8794
NN		 2440 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2441 tx_ring->dma);
92915f71
GR		 2442
2443 tx_ring->desc = NULL;
2444}
2445
2446/**
2447 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2448 * @adapter: board private structure
2449 *
2450 * Free all transmit software resources
2451 **/
2452static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2453{
2454 int i;
2455
2456 for (i = 0; i < adapter->num_tx_queues; i++)
2457 if (adapter->tx_ring[i].desc)
2458 ixgbevf_free_tx_resources(adapter,
2459 &adapter->tx_ring[i]);
2460
2461}
2462
2463/**
2464 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
2465 * @adapter: board private structure
2466 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2467 *
2468 * Return 0 on success, negative on failure
2469 **/
2470int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *adapter,
2471 struct ixgbevf_ring *tx_ring)
2472{
2473 struct pci_dev *pdev = adapter->pdev;
2474 int size;
2475
2476 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
89bf67f1 2477 tx_ring->tx_buffer_info = vzalloc(size);
92915f71
GR		 2478 if (!tx_ring->tx_buffer_info)
2479 goto err;
92915f71
GR		 2480
2481 /* round up to nearest 4K */
2482 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2483 tx_ring->size = ALIGN(tx_ring->size, 4096);
2484
2a1f8794
NN		 2485 tx_ring->desc = dma_alloc_coherent(&pdev->dev, tx_ring->size,
2486 &tx_ring->dma, GFP_KERNEL);
92915f71
GR		 2487 if (!tx_ring->desc)
2488 goto err;
2489
2490 tx_ring->next_to_use = 0;
2491 tx_ring->next_to_clean = 0;
2492 tx_ring->work_limit = tx_ring->count;
2493 return 0;
2494
2495err:
2496 vfree(tx_ring->tx_buffer_info);
2497 tx_ring->tx_buffer_info = NULL;
2498 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit "
2499 "descriptor ring\n");
2500 return -ENOMEM;
2501}
2502
2503/**
2504 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
2505 * @adapter: board private structure
2506 *
2507 * If this function returns with an error, then it's possible one or
2508 * more of the rings is populated (while the rest are not). It is the
2509 * callers duty to clean those orphaned rings.
2510 *
2511 * Return 0 on success, negative on failure
2512 **/
2513static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
2514{
2515 int i, err = 0;
2516
2517 for (i = 0; i < adapter->num_tx_queues; i++) {
2518 err = ixgbevf_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2519 if (!err)
2520 continue;
2521 hw_dbg(&adapter->hw,
2522 "Allocation for Tx Queue %u failed\n", i);
2523 break;
2524 }
2525
2526 return err;
2527}
2528
2529/**
2530 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
2531 * @adapter: board private structure
2532 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2533 *
2534 * Returns 0 on success, negative on failure
2535 **/
2536int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
2537 struct ixgbevf_ring *rx_ring)
2538{
2539 struct pci_dev *pdev = adapter->pdev;
2540 int size;
2541
2542 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
89bf67f1 2543 rx_ring->rx_buffer_info = vzalloc(size);
92915f71
GR		 2544 if (!rx_ring->rx_buffer_info) {
2545 hw_dbg(&adapter->hw,
2546 "Unable to vmalloc buffer memory for "
2547 "the receive descriptor ring\n");
2548 goto alloc_failed;
2549 }
92915f71
GR		 2550
2551 /* Round up to nearest 4K */
2552 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2553 rx_ring->size = ALIGN(rx_ring->size, 4096);
2554
2a1f8794
NN		 2555 rx_ring->desc = dma_alloc_coherent(&pdev->dev, rx_ring->size,
2556 &rx_ring->dma, GFP_KERNEL);
92915f71
GR		 2557
2558 if (!rx_ring->desc) {
2559 hw_dbg(&adapter->hw,
2560 "Unable to allocate memory for "
2561 "the receive descriptor ring\n");
2562 vfree(rx_ring->rx_buffer_info);
2563 rx_ring->rx_buffer_info = NULL;
2564 goto alloc_failed;
2565 }
2566
2567 rx_ring->next_to_clean = 0;
2568 rx_ring->next_to_use = 0;
2569
2570 return 0;
2571alloc_failed:
2572 return -ENOMEM;
2573}
2574
2575/**
2576 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
2577 * @adapter: board private structure
2578 *
2579 * If this function returns with an error, then it's possible one or
2580 * more of the rings is populated (while the rest are not). It is the
2581 * callers duty to clean those orphaned rings.
2582 *
2583 * Return 0 on success, negative on failure
2584 **/
2585static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
2586{
2587 int i, err = 0;
2588
2589 for (i = 0; i < adapter->num_rx_queues; i++) {
2590 err = ixgbevf_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2591 if (!err)
2592 continue;
2593 hw_dbg(&adapter->hw,
2594 "Allocation for Rx Queue %u failed\n", i);
2595 break;
2596 }
2597 return err;
2598}
2599
2600/**
2601 * ixgbevf_free_rx_resources - Free Rx Resources
2602 * @adapter: board private structure
2603 * @rx_ring: ring to clean the resources from
2604 *
2605 * Free all receive software resources
2606 **/
2607void ixgbevf_free_rx_resources(struct ixgbevf_adapter *adapter,
2608 struct ixgbevf_ring *rx_ring)
2609{
2610 struct pci_dev *pdev = adapter->pdev;
2611
2612 ixgbevf_clean_rx_ring(adapter, rx_ring);
2613
2614 vfree(rx_ring->rx_buffer_info);
2615 rx_ring->rx_buffer_info = NULL;
2616
2a1f8794
NN		 2617 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2618 rx_ring->dma);
92915f71
GR		 2619
2620 rx_ring->desc = NULL;
2621}
2622
2623/**
2624 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
2625 * @adapter: board private structure
2626 *
2627 * Free all receive software resources
2628 **/
2629static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
2630{
2631 int i;
2632
2633 for (i = 0; i < adapter->num_rx_queues; i++)
2634 if (adapter->rx_ring[i].desc)
2635 ixgbevf_free_rx_resources(adapter,
2636 &adapter->rx_ring[i]);
2637}
2638
2639/**
2640 * ixgbevf_open - Called when a network interface is made active
2641 * @netdev: network interface device structure
2642 *
2643 * Returns 0 on success, negative value on failure
2644 *
2645 * The open entry point is called when a network interface is made
2646 * active by the system (IFF_UP). At this point all resources needed
2647 * for transmit and receive operations are allocated, the interrupt
2648 * handler is registered with the OS, the watchdog timer is started,
2649 * and the stack is notified that the interface is ready.
2650 **/
2651static int ixgbevf_open(struct net_device *netdev)
2652{
2653 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2654 struct ixgbe_hw *hw = &adapter->hw;
2655 int err;
2656
2657 /* disallow open during test */
2658 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
2659 return -EBUSY;
2660
2661 if (hw->adapter_stopped) {
2662 ixgbevf_reset(adapter);
2663 /* if adapter is still stopped then PF isn't up and
2664 * the vf can't start. */
2665 if (hw->adapter_stopped) {
2666 err = IXGBE_ERR_MBX;
2667 printk(KERN_ERR "Unable to start - perhaps the PF"
29b8dd02 2668 " Driver isn't up yet\n");
92915f71
GR		 2669 goto err_setup_reset;
2670 }
2671 }
2672
2673 /* allocate transmit descriptors */
2674 err = ixgbevf_setup_all_tx_resources(adapter);
2675 if (err)
2676 goto err_setup_tx;
2677
2678 /* allocate receive descriptors */
2679 err = ixgbevf_setup_all_rx_resources(adapter);
2680 if (err)
2681 goto err_setup_rx;
2682
2683 ixgbevf_configure(adapter);
2684
2685 /*
2686 * Map the Tx/Rx rings to the vectors we were allotted.
2687 * if request_irq will be called in this function map_rings
2688 * must be called *before* up_complete
2689 */
2690 ixgbevf_map_rings_to_vectors(adapter);
2691
2692 err = ixgbevf_up_complete(adapter);
2693 if (err)
2694 goto err_up;
2695
2696 /* clear any pending interrupts, may auto mask */
2697 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2698 err = ixgbevf_request_irq(adapter);
2699 if (err)
2700 goto err_req_irq;
2701
2702 ixgbevf_irq_enable(adapter, true, true);
2703
2704 return 0;
2705
2706err_req_irq:
2707 ixgbevf_down(adapter);
2708err_up:
2709 ixgbevf_free_irq(adapter);
2710err_setup_rx:
2711 ixgbevf_free_all_rx_resources(adapter);
2712err_setup_tx:
2713 ixgbevf_free_all_tx_resources(adapter);
2714 ixgbevf_reset(adapter);
2715
2716err_setup_reset:
2717
2718 return err;
2719}
2720
2721/**
2722 * ixgbevf_close - Disables a network interface
2723 * @netdev: network interface device structure
2724 *
2725 * Returns 0, this is not allowed to fail
2726 *
2727 * The close entry point is called when an interface is de-activated
2728 * by the OS. The hardware is still under the drivers control, but
2729 * needs to be disabled. A global MAC reset is issued to stop the
2730 * hardware, and all transmit and receive resources are freed.
2731 **/
2732static int ixgbevf_close(struct net_device *netdev)
2733{
2734 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2735
2736 ixgbevf_down(adapter);
2737 ixgbevf_free_irq(adapter);
2738
2739 ixgbevf_free_all_tx_resources(adapter);
2740 ixgbevf_free_all_rx_resources(adapter);
2741
2742 return 0;
2743}
2744
2745static int ixgbevf_tso(struct ixgbevf_adapter *adapter,
2746 struct ixgbevf_ring *tx_ring,
2747 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2748{
2749 struct ixgbe_adv_tx_context_desc *context_desc;
2750 unsigned int i;
2751 int err;
2752 struct ixgbevf_tx_buffer *tx_buffer_info;
2753 u32 vlan_macip_lens = 0, type_tucmd_mlhl;
2754 u32 mss_l4len_idx, l4len;
2755
2756 if (skb_is_gso(skb)) {
2757 if (skb_header_cloned(skb)) {
2758 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2759 if (err)
2760 return err;
2761 }
2762 l4len = tcp_hdrlen(skb);
2763 *hdr_len += l4len;
2764
2765 if (skb->protocol == htons(ETH_P_IP)) {
2766 struct iphdr *iph = ip_hdr(skb);
2767 iph->tot_len = 0;
2768 iph->check = 0;
2769 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2770 iph->daddr, 0,
2771 IPPROTO_TCP,
2772 0);
2773 adapter->hw_tso_ctxt++;
9010bc33 2774 } else if (skb_is_gso_v6(skb)) {
92915f71
GR		 2775 ipv6_hdr(skb)->payload_len = 0;
2776 tcp_hdr(skb)->check =
2777 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2778 &ipv6_hdr(skb)->daddr,
2779 0, IPPROTO_TCP, 0);
2780 adapter->hw_tso6_ctxt++;
2781 }
2782
2783 i = tx_ring->next_to_use;
2784
2785 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2786 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2787
2788 /* VLAN MACLEN IPLEN */
2789 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2790 vlan_macip_lens |=
2791 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2792 vlan_macip_lens |= ((skb_network_offset(skb)) <<
2793 IXGBE_ADVTXD_MACLEN_SHIFT);
2794 *hdr_len += skb_network_offset(skb);
2795 vlan_macip_lens |=
2796 (skb_transport_header(skb) - skb_network_header(skb));
2797 *hdr_len +=
2798 (skb_transport_header(skb) - skb_network_header(skb));
2799 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2800 context_desc->seqnum_seed = 0;
2801
2802 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2803 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
2804 IXGBE_ADVTXD_DTYP_CTXT);
2805
2806 if (skb->protocol == htons(ETH_P_IP))
2807 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2808 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2809 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2810
2811 /* MSS L4LEN IDX */
2812 mss_l4len_idx =
2813 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
2814 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
2815 /* use index 1 for TSO */
2816 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
2817 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2818
2819 tx_buffer_info->time_stamp = jiffies;
2820 tx_buffer_info->next_to_watch = i;
2821
2822 i++;
2823 if (i == tx_ring->count)
2824 i = 0;
2825 tx_ring->next_to_use = i;
2826
2827 return true;
2828 }
2829
2830 return false;
2831}
2832
2833static bool ixgbevf_tx_csum(struct ixgbevf_adapter *adapter,
2834 struct ixgbevf_ring *tx_ring,
2835 struct sk_buff *skb, u32 tx_flags)
2836{
2837 struct ixgbe_adv_tx_context_desc *context_desc;
2838 unsigned int i;
2839 struct ixgbevf_tx_buffer *tx_buffer_info;
2840 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2841
2842 if (skb->ip_summed == CHECKSUM_PARTIAL ||
2843 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
2844 i = tx_ring->next_to_use;
2845 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2846 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2847
2848 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2849 vlan_macip_lens |= (tx_flags &
2850 IXGBE_TX_FLAGS_VLAN_MASK);
2851 vlan_macip_lens |= (skb_network_offset(skb) <<
2852 IXGBE_ADVTXD_MACLEN_SHIFT);
2853 if (skb->ip_summed == CHECKSUM_PARTIAL)
2854 vlan_macip_lens |= (skb_transport_header(skb) -
2855 skb_network_header(skb));
2856
2857 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2858 context_desc->seqnum_seed = 0;
2859
2860 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2861 IXGBE_ADVTXD_DTYP_CTXT);
2862
2863 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2864 switch (skb->protocol) {
2865 case __constant_htons(ETH_P_IP):
2866 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2867 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2868 type_tucmd_mlhl |=
2869 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2870 break;
2871 case __constant_htons(ETH_P_IPV6):
2872 /* XXX what about other V6 headers?? */
2873 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2874 type_tucmd_mlhl |=
2875 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2876 break;
2877 default:
2878 if (unlikely(net_ratelimit())) {
2879 printk(KERN_WARNING
2880 "partial checksum but "
2881 "proto=%x!\n",
2882 skb->protocol);
2883 }
2884 break;
2885 }
2886 }
2887
2888 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2889 /* use index zero for tx checksum offload */
2890 context_desc->mss_l4len_idx = 0;
2891
2892 tx_buffer_info->time_stamp = jiffies;
2893 tx_buffer_info->next_to_watch = i;
2894
2895 adapter->hw_csum_tx_good++;
2896 i++;
2897 if (i == tx_ring->count)
2898 i = 0;
2899 tx_ring->next_to_use = i;
2900
2901 return true;
2902 }
2903
2904 return false;
2905}
2906
2907static int ixgbevf_tx_map(struct ixgbevf_adapter *adapter,
2908 struct ixgbevf_ring *tx_ring,
2909 struct sk_buff *skb, u32 tx_flags,
2910 unsigned int first)
2911{
2912 struct pci_dev *pdev = adapter->pdev;
2913 struct ixgbevf_tx_buffer *tx_buffer_info;
2914 unsigned int len;
2915 unsigned int total = skb->len;
2540ddb5
KV		 2916 unsigned int offset = 0, size;
2917 int count = 0;
92915f71
GR		 2918 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2919 unsigned int f;
65deeed7 2920 int i;
92915f71
GR		 2921
2922 i = tx_ring->next_to_use;
2923
2924 len = min(skb_headlen(skb), total);
2925 while (len) {
2926 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2927 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2928
2929 tx_buffer_info->length = size;
2930 tx_buffer_info->mapped_as_page = false;
2a1f8794 2931 tx_buffer_info->dma = dma_map_single(&adapter->pdev->dev,
92915f71 2932 skb->data + offset,
2a1f8794
NN		 2933 size, DMA_TO_DEVICE);
2934 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma))
92915f71
GR		 2935 goto dma_error;
2936 tx_buffer_info->time_stamp = jiffies;
2937 tx_buffer_info->next_to_watch = i;
2938
2939 len -= size;
2940 total -= size;
2941 offset += size;
2942 count++;
2943 i++;
2944 if (i == tx_ring->count)
2945 i = 0;
2946 }
2947
2948 for (f = 0; f < nr_frags; f++) {
2949 struct skb_frag_struct *frag;
2950
2951 frag = &skb_shinfo(skb)->frags[f];
2952 len = min((unsigned int)frag->size, total);
2953 offset = frag->page_offset;
2954
2955 while (len) {
2956 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2957 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2958
2959 tx_buffer_info->length = size;
2a1f8794 2960 tx_buffer_info->dma = dma_map_page(&adapter->pdev->dev,
92915f71
GR		 2961 frag->page,
2962 offset,
2963 size,
2a1f8794 2964 DMA_TO_DEVICE);
92915f71 2965 tx_buffer_info->mapped_as_page = true;
2a1f8794 2966 if (dma_mapping_error(&pdev->dev, tx_buffer_info->dma))
92915f71
GR		 2967 goto dma_error;
2968 tx_buffer_info->time_stamp = jiffies;
2969 tx_buffer_info->next_to_watch = i;
2970
2971 len -= size;
2972 total -= size;
2973 offset += size;
2974 count++;
2975 i++;
2976 if (i == tx_ring->count)
2977 i = 0;
2978 }
2979 if (total == 0)
2980 break;
2981 }
2982
2983 if (i == 0)
2984 i = tx_ring->count - 1;
2985 else
2986 i = i - 1;
2987 tx_ring->tx_buffer_info[i].skb = skb;
2988 tx_ring->tx_buffer_info[first].next_to_watch = i;
2989
2990 return count;
2991
2992dma_error:
2993 dev_err(&pdev->dev, "TX DMA map failed\n");
2994
2995 /* clear timestamp and dma mappings for failed tx_buffer_info map */
2996 tx_buffer_info->dma = 0;
2997 tx_buffer_info->time_stamp = 0;
2998 tx_buffer_info->next_to_watch = 0;
2999 count--;
3000
3001 /* clear timestamp and dma mappings for remaining portion of packet */
3002 while (count >= 0) {
3003 count--;
3004 i--;
3005 if (i < 0)
3006 i += tx_ring->count;
3007 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3008 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
3009 }
3010
3011 return count;
3012}
3013
3014static void ixgbevf_tx_queue(struct ixgbevf_adapter *adapter,
3015 struct ixgbevf_ring *tx_ring, int tx_flags,
3016 int count, u32 paylen, u8 hdr_len)
3017{
3018 union ixgbe_adv_tx_desc *tx_desc = NULL;
3019 struct ixgbevf_tx_buffer *tx_buffer_info;
3020 u32 olinfo_status = 0, cmd_type_len = 0;
3021 unsigned int i;
3022
3023 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3024
3025 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3026
3027 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3028
3029 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3030 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3031
3032 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3033 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3034
3035 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3036 IXGBE_ADVTXD_POPTS_SHIFT;
3037
3038 /* use index 1 context for tso */
3039 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3040 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3041 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3042 IXGBE_ADVTXD_POPTS_SHIFT;
3043
3044 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3045 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3046 IXGBE_ADVTXD_POPTS_SHIFT;
3047
3048 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3049
3050 i = tx_ring->next_to_use;
3051 while (count--) {
3052 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3053 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3054 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3055 tx_desc->read.cmd_type_len =
3056 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3057 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3058 i++;
3059 if (i == tx_ring->count)
3060 i = 0;
3061 }
3062
3063 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3064
3065 /*
3066 * Force memory writes to complete before letting h/w
3067 * know there are new descriptors to fetch. (Only
3068 * applicable for weak-ordered memory model archs,
3069 * such as IA-64).
3070 */
3071 wmb();
3072
3073 tx_ring->next_to_use = i;
3074 writel(i, adapter->hw.hw_addr + tx_ring->tail);
3075}
3076
3077static int __ixgbevf_maybe_stop_tx(struct net_device *netdev,
3078 struct ixgbevf_ring *tx_ring, int size)
3079{
3080 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3081
3082 netif_stop_subqueue(netdev, tx_ring->queue_index);
3083 /* Herbert's original patch had:
3084 * smp_mb__after_netif_stop_queue();
3085 * but since that doesn't exist yet, just open code it. */
3086 smp_mb();
3087
3088 /* We need to check again in a case another CPU has just
3089 * made room available. */
3090 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3091 return -EBUSY;
3092
3093 /* A reprieve! - use start_queue because it doesn't call schedule */
3094 netif_start_subqueue(netdev, tx_ring->queue_index);
3095 ++adapter->restart_queue;
3096 return 0;
3097}
3098
3099static int ixgbevf_maybe_stop_tx(struct net_device *netdev,
3100 struct ixgbevf_ring *tx_ring, int size)
3101{
3102 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3103 return 0;
3104 return __ixgbevf_maybe_stop_tx(netdev, tx_ring, size);
3105}
3106
3107static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3108{
3109 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3110 struct ixgbevf_ring *tx_ring;
3111 unsigned int first;
3112 unsigned int tx_flags = 0;
3113 u8 hdr_len = 0;
3114 int r_idx = 0, tso;
3115 int count = 0;
3116
3117 unsigned int f;
3118
3119 tx_ring = &adapter->tx_ring[r_idx];
3120
eab6d18d 3121 if (vlan_tx_tag_present(skb)) {
92915f71
GR		 3122 tx_flags |= vlan_tx_tag_get(skb);
3123 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3124 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3125 }
3126
3127 /* four things can cause us to need a context descriptor */
3128 if (skb_is_gso(skb) ||
3129 (skb->ip_summed == CHECKSUM_PARTIAL) ||
3130 (tx_flags & IXGBE_TX_FLAGS_VLAN))
3131 count++;
3132
3133 count += TXD_USE_COUNT(skb_headlen(skb));
3134 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3135 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3136
3137 if (ixgbevf_maybe_stop_tx(netdev, tx_ring, count)) {
3138 adapter->tx_busy++;
3139 return NETDEV_TX_BUSY;
3140 }
3141
3142 first = tx_ring->next_to_use;
3143
3144 if (skb->protocol == htons(ETH_P_IP))
3145 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3146 tso = ixgbevf_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3147 if (tso < 0) {
3148 dev_kfree_skb_any(skb);
3149 return NETDEV_TX_OK;
3150 }
3151
3152 if (tso)
3153 tx_flags |= IXGBE_TX_FLAGS_TSO;
3154 else if (ixgbevf_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3155 (skb->ip_summed == CHECKSUM_PARTIAL))
3156 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3157
3158 ixgbevf_tx_queue(adapter, tx_ring, tx_flags,
3159 ixgbevf_tx_map(adapter, tx_ring, skb, tx_flags, first),
3160 skb->len, hdr_len);
3161
92915f71
GR		 3162 ixgbevf_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3163
3164 return NETDEV_TX_OK;
3165}
3166
92915f71
GR		 3167/**
3168 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
3169 * @netdev: network interface device structure
3170 * @p: pointer to an address structure
3171 *
3172 * Returns 0 on success, negative on failure
3173 **/
3174static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3175{
3176 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3177 struct ixgbe_hw *hw = &adapter->hw;
3178 struct sockaddr *addr = p;
3179
3180 if (!is_valid_ether_addr(addr->sa_data))
3181 return -EADDRNOTAVAIL;
3182
3183 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3184 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3185
3186 if (hw->mac.ops.set_rar)
3187 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
3188
3189 return 0;
3190}
3191
3192/**
3193 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
3194 * @netdev: network interface device structure
3195 * @new_mtu: new value for maximum frame size
3196 *
3197 * Returns 0 on success, negative on failure
3198 **/
3199static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3200{
3201 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
69bfbec4 3202 struct ixgbe_hw *hw = &adapter->hw;
92915f71 3203 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
69bfbec4
GR		 3204 int max_possible_frame = MAXIMUM_ETHERNET_VLAN_SIZE;
3205 u32 msg[2];
3206
3207 if (adapter->hw.mac.type == ixgbe_mac_X540_vf)
3208 max_possible_frame = IXGBE_MAX_JUMBO_FRAME_SIZE;
92915f71
GR		 3209
3210 /* MTU < 68 is an error and causes problems on some kernels */
69bfbec4 3211 if ((new_mtu < 68) || (max_frame > max_possible_frame))
92915f71
GR		 3212 return -EINVAL;
3213
3214 hw_dbg(&adapter->hw, "changing MTU from %d to %d\n",
3215 netdev->mtu, new_mtu);
3216 /* must set new MTU before calling down or up */
3217 netdev->mtu = new_mtu;
3218
69bfbec4
GR		 3219 msg[0] = IXGBE_VF_SET_LPE;
3220 msg[1] = max_frame;
3221 hw->mbx.ops.write_posted(hw, msg, 2);
3222
92915f71
GR		 3223 if (netif_running(netdev))
3224 ixgbevf_reinit_locked(adapter);
3225
3226 return 0;
3227}
3228
3229static void ixgbevf_shutdown(struct pci_dev *pdev)
3230{
3231 struct net_device *netdev = pci_get_drvdata(pdev);
3232 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3233
3234 netif_device_detach(netdev);
3235
3236 if (netif_running(netdev)) {
3237 ixgbevf_down(adapter);
3238 ixgbevf_free_irq(adapter);
3239 ixgbevf_free_all_tx_resources(adapter);
3240 ixgbevf_free_all_rx_resources(adapter);
3241 }
3242
3243#ifdef CONFIG_PM
3244 pci_save_state(pdev);
3245#endif
3246
3247 pci_disable_device(pdev);
3248}
3249
92915f71
GR		 3250static const struct net_device_ops ixgbe_netdev_ops = {
3251 .ndo_open = &ixgbevf_open,
3252 .ndo_stop = &ixgbevf_close,
3253 .ndo_start_xmit = &ixgbevf_xmit_frame,
92915f71
GR		 3254 .ndo_set_rx_mode = &ixgbevf_set_rx_mode,
3255 .ndo_set_multicast_list = &ixgbevf_set_rx_mode,
3256 .ndo_validate_addr = eth_validate_addr,
3257 .ndo_set_mac_address = &ixgbevf_set_mac,
3258 .ndo_change_mtu = &ixgbevf_change_mtu,
3259 .ndo_tx_timeout = &ixgbevf_tx_timeout,
3260 .ndo_vlan_rx_register = &ixgbevf_vlan_rx_register,
3261 .ndo_vlan_rx_add_vid = &ixgbevf_vlan_rx_add_vid,
3262 .ndo_vlan_rx_kill_vid = &ixgbevf_vlan_rx_kill_vid,
3263};
92915f71
GR		 3264
3265static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3266{
92915f71 3267 dev->netdev_ops = &ixgbe_netdev_ops;
92915f71
GR		 3268 ixgbevf_set_ethtool_ops(dev);
3269 dev->watchdog_timeo = 5 * HZ;
3270}
3271
3272/**
3273 * ixgbevf_probe - Device Initialization Routine
3274 * @pdev: PCI device information struct
3275 * @ent: entry in ixgbevf_pci_tbl
3276 *
3277 * Returns 0 on success, negative on failure
3278 *
3279 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3280 * The OS initialization, configuring of the adapter private structure,
3281 * and a hardware reset occur.
3282 **/
3283static int __devinit ixgbevf_probe(struct pci_dev *pdev,
3284 const struct pci_device_id *ent)
3285{
3286 struct net_device *netdev;
3287 struct ixgbevf_adapter *adapter = NULL;
3288 struct ixgbe_hw *hw = NULL;
3289 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
3290 static int cards_found;
3291 int err, pci_using_dac;
3292
3293 err = pci_enable_device(pdev);
3294 if (err)
3295 return err;
3296
2a1f8794
NN		 3297 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
3298 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
92915f71
GR		 3299 pci_using_dac = 1;
3300 } else {
2a1f8794 3301 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
92915f71 3302 if (err) {
2a1f8794
NN		 3303 err = dma_set_coherent_mask(&pdev->dev,
3304 DMA_BIT_MASK(32));
92915f71
GR		 3305 if (err) {
3306 dev_err(&pdev->dev, "No usable DMA "
3307 "configuration, aborting\n");
3308 goto err_dma;
3309 }
3310 }
3311 pci_using_dac = 0;
3312 }
3313
3314 err = pci_request_regions(pdev, ixgbevf_driver_name);
3315 if (err) {
3316 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3317 goto err_pci_reg;
3318 }
3319
3320 pci_set_master(pdev);
3321
3322#ifdef HAVE_TX_MQ
3323 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3324 MAX_TX_QUEUES);
3325#else
3326 netdev = alloc_etherdev(sizeof(struct ixgbevf_adapter));
3327#endif
3328 if (!netdev) {
3329 err = -ENOMEM;
3330 goto err_alloc_etherdev;
3331 }
3332
3333 SET_NETDEV_DEV(netdev, &pdev->dev);
3334
3335 pci_set_drvdata(pdev, netdev);
3336 adapter = netdev_priv(netdev);
3337
3338 adapter->netdev = netdev;
3339 adapter->pdev = pdev;
3340 hw = &adapter->hw;
3341 hw->back = adapter;
3342 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
3343
3344 /*
3345 * call save state here in standalone driver because it relies on
3346 * adapter struct to exist, and needs to call netdev_priv
3347 */
3348 pci_save_state(pdev);
3349
3350 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3351 pci_resource_len(pdev, 0));
3352 if (!hw->hw_addr) {
3353 err = -EIO;
3354 goto err_ioremap;
3355 }
3356
3357 ixgbevf_assign_netdev_ops(netdev);
3358
3359 adapter->bd_number = cards_found;
3360
3361 /* Setup hw api */
3362 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3363 hw->mac.type = ii->mac;
3364
3365 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
3366 sizeof(struct ixgbe_mac_operations));
3367
3368 adapter->flags &= ~IXGBE_FLAG_RX_PS_CAPABLE;
3369 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
3370 adapter->flags |= IXGBE_FLAG_RX_1BUF_CAPABLE;
3371
3372 /* setup the private structure */
3373 err = ixgbevf_sw_init(adapter);
3374
92915f71
GR		 3375 netdev->features = NETIF_F_SG |
3376 NETIF_F_IP_CSUM |
3377 NETIF_F_HW_VLAN_TX |
3378 NETIF_F_HW_VLAN_RX |
3379 NETIF_F_HW_VLAN_FILTER;
3380
3381 netdev->features |= NETIF_F_IPV6_CSUM;
3382 netdev->features |= NETIF_F_TSO;
3383 netdev->features |= NETIF_F_TSO6;
e59d44df 3384 netdev->features |= NETIF_F_GRO;
92915f71
GR		 3385 netdev->vlan_features |= NETIF_F_TSO;
3386 netdev->vlan_features |= NETIF_F_TSO6;
3387 netdev->vlan_features |= NETIF_F_IP_CSUM;
3bfacf96 3388 netdev->vlan_features |= NETIF_F_IPV6_CSUM;
92915f71
GR		 3389 netdev->vlan_features |= NETIF_F_SG;
3390
3391 if (pci_using_dac)
3392 netdev->features |= NETIF_F_HIGHDMA;
3393
92915f71
GR		 3394 /* The HW MAC address was set and/or determined in sw_init */
3395 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
3396 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
3397
3398 if (!is_valid_ether_addr(netdev->dev_addr)) {
3399 printk(KERN_ERR "invalid MAC address\n");
3400 err = -EIO;
3401 goto err_sw_init;
3402 }
3403
3404 init_timer(&adapter->watchdog_timer);
c061b18d 3405 adapter->watchdog_timer.function = ixgbevf_watchdog;
92915f71
GR		 3406 adapter->watchdog_timer.data = (unsigned long)adapter;
3407
3408 INIT_WORK(&adapter->reset_task, ixgbevf_reset_task);
3409 INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task);
3410
3411 err = ixgbevf_init_interrupt_scheme(adapter);
3412 if (err)
3413 goto err_sw_init;
3414
3415 /* pick up the PCI bus settings for reporting later */
3416 if (hw->mac.ops.get_bus_info)
3417 hw->mac.ops.get_bus_info(hw);
3418
92915f71
GR		 3419 strcpy(netdev->name, "eth%d");
3420
3421 err = register_netdev(netdev);
3422 if (err)
3423 goto err_register;
3424
3425 adapter->netdev_registered = true;
3426
5d426ad1
GR		 3427 netif_carrier_off(netdev);
3428
33bd9f60
GR		 3429 ixgbevf_init_last_counter_stats(adapter);
3430
92915f71
GR		 3431 /* print the MAC address */
3432 hw_dbg(hw, "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n",
3433 netdev->dev_addr[0],
3434 netdev->dev_addr[1],
3435 netdev->dev_addr[2],
3436 netdev->dev_addr[3],
3437 netdev->dev_addr[4],
3438 netdev->dev_addr[5]);
3439
3440 hw_dbg(hw, "MAC: %d\n", hw->mac.type);
3441
d6dbee86 3442 hw_dbg(hw, "LRO is disabled\n");
92915f71
GR		 3443
3444 hw_dbg(hw, "Intel(R) 82599 Virtual Function\n");
3445 cards_found++;
3446 return 0;
3447
3448err_register:
3449err_sw_init:
3450 ixgbevf_reset_interrupt_capability(adapter);
3451 iounmap(hw->hw_addr);
3452err_ioremap:
3453 free_netdev(netdev);
3454err_alloc_etherdev:
3455 pci_release_regions(pdev);
3456err_pci_reg:
3457err_dma:
3458 pci_disable_device(pdev);
3459 return err;
3460}
3461
3462/**
3463 * ixgbevf_remove - Device Removal Routine
3464 * @pdev: PCI device information struct
3465 *
3466 * ixgbevf_remove is called by the PCI subsystem to alert the driver
3467 * that it should release a PCI device. The could be caused by a
3468 * Hot-Plug event, or because the driver is going to be removed from
3469 * memory.
3470 **/
3471static void __devexit ixgbevf_remove(struct pci_dev *pdev)
3472{
3473 struct net_device *netdev = pci_get_drvdata(pdev);
3474 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3475
3476 set_bit(__IXGBEVF_DOWN, &adapter->state);
3477
3478 del_timer_sync(&adapter->watchdog_timer);
3479
23f333a2 3480 cancel_work_sync(&adapter->reset_task);
92915f71
GR		 3481 cancel_work_sync(&adapter->watchdog_task);
3482
92915f71
GR		 3483 if (adapter->netdev_registered) {
3484 unregister_netdev(netdev);
3485 adapter->netdev_registered = false;
3486 }
3487
3488 ixgbevf_reset_interrupt_capability(adapter);
3489
3490 iounmap(adapter->hw.hw_addr);
3491 pci_release_regions(pdev);
3492
3493 hw_dbg(&adapter->hw, "Remove complete\n");
3494
3495 kfree(adapter->tx_ring);
3496 kfree(adapter->rx_ring);
3497
3498 free_netdev(netdev);
3499
3500 pci_disable_device(pdev);
3501}
3502
3503static struct pci_driver ixgbevf_driver = {
3504 .name = ixgbevf_driver_name,
3505 .id_table = ixgbevf_pci_tbl,
3506 .probe = ixgbevf_probe,
3507 .remove = __devexit_p(ixgbevf_remove),
3508 .shutdown = ixgbevf_shutdown,
3509};
3510
3511/**
65d676c8 3512 * ixgbevf_init_module - Driver Registration Routine
92915f71 3513 *
65d676c8 3514 * ixgbevf_init_module is the first routine called when the driver is
92915f71
GR		 3515 * loaded. All it does is register with the PCI subsystem.
3516 **/
3517static int __init ixgbevf_init_module(void)
3518{
3519 int ret;
3520 printk(KERN_INFO "ixgbevf: %s - version %s\n", ixgbevf_driver_string,
3521 ixgbevf_driver_version);
3522
3523 printk(KERN_INFO "%s\n", ixgbevf_copyright);
3524
3525 ret = pci_register_driver(&ixgbevf_driver);
3526 return ret;
3527}
3528
3529module_init(ixgbevf_init_module);
3530
3531/**
65d676c8 3532 * ixgbevf_exit_module - Driver Exit Cleanup Routine
92915f71 3533 *
65d676c8 3534 * ixgbevf_exit_module is called just before the driver is removed
92915f71
GR		 3535 * from memory.
3536 **/
3537static void __exit ixgbevf_exit_module(void)
3538{
3539 pci_unregister_driver(&ixgbevf_driver);
3540}
3541
3542#ifdef DEBUG
3543/**
65d676c8 3544 * ixgbevf_get_hw_dev_name - return device name string
92915f71
GR		 3545 * used by hardware layer to print debugging information
3546 **/
3547char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
3548{
3549 struct ixgbevf_adapter *adapter = hw->back;
3550 return adapter->netdev->name;
3551}
3552
3553#endif
3554module_exit(ixgbevf_exit_module);
3555
3556/* ixgbevf_main.c */
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