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1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
4 Copyright(c) 1999 - 2009 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29/******************************************************************************
30 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
31******************************************************************************/
32#include <linux/types.h>
33#include <linux/module.h>
34#include <linux/pci.h>
35#include <linux/netdevice.h>
36#include <linux/vmalloc.h>
37#include <linux/string.h>
38#include <linux/in.h>
39#include <linux/ip.h>
40#include <linux/tcp.h>
41#include <linux/ipv6.h>
42#include <net/checksum.h>
43#include <net/ip6_checksum.h>
44#include <linux/ethtool.h>
45#include <linux/if_vlan.h>
46
47#include "ixgbevf.h"
48
49char ixgbevf_driver_name[] = "ixgbevf";
50static const char ixgbevf_driver_string[] =
51 "Intel(R) 82599 Virtual Function";
52
53#define DRV_VERSION "1.0.0-k0"
54const char ixgbevf_driver_version[] = DRV_VERSION;
55static char ixgbevf_copyright[] = "Copyright (c) 2009 Intel Corporation.";
56
57static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
58 [board_82599_vf] = &ixgbevf_vf_info,
59};
60
61/* ixgbevf_pci_tbl - PCI Device ID Table
62 *
63 * Wildcard entries (PCI_ANY_ID) should come last
64 * Last entry must be all 0s
65 *
66 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
67 * Class, Class Mask, private data (not used) }
68 */
69static struct pci_device_id ixgbevf_pci_tbl[] = {
70 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF),
71 board_82599_vf},
72
73 /* required last entry */
74 {0, }
75};
76MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
77
78MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
79MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver");
80MODULE_LICENSE("GPL");
81MODULE_VERSION(DRV_VERSION);
82
83#define DEFAULT_DEBUG_LEVEL_SHIFT 3
84
85/* forward decls */
86static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector);
87static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
88 u32 itr_reg);
89
90static inline void ixgbevf_release_rx_desc(struct ixgbe_hw *hw,
91 struct ixgbevf_ring *rx_ring,
92 u32 val)
93{
94 /*
95 * Force memory writes to complete before letting h/w
96 * know there are new descriptors to fetch. (Only
97 * applicable for weak-ordered memory model archs,
98 * such as IA-64).
99 */
100 wmb();
101 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rx_ring->reg_idx), val);
102}
103
104/*
105 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
106 * @adapter: pointer to adapter struct
107 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
108 * @queue: queue to map the corresponding interrupt to
109 * @msix_vector: the vector to map to the corresponding queue
110 *
111 */
112static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
113 u8 queue, u8 msix_vector)
114{
115 u32 ivar, index;
116 struct ixgbe_hw *hw = &adapter->hw;
117 if (direction == -1) {
118 /* other causes */
119 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
120 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
121 ivar &= ~0xFF;
122 ivar |= msix_vector;
123 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
124 } else {
125 /* tx or rx causes */
126 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
127 index = ((16 * (queue & 1)) + (8 * direction));
128 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
129 ivar &= ~(0xFF << index);
130 ivar |= (msix_vector << index);
131 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
132 }
133}
134
135static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_adapter *adapter,
136 struct ixgbevf_tx_buffer
137 *tx_buffer_info)
138{
139 if (tx_buffer_info->dma) {
140 if (tx_buffer_info->mapped_as_page)
141 pci_unmap_page(adapter->pdev,
142 tx_buffer_info->dma,
143 tx_buffer_info->length,
144 PCI_DMA_TODEVICE);
145 else
146 pci_unmap_single(adapter->pdev,
147 tx_buffer_info->dma,
148 tx_buffer_info->length,
149 PCI_DMA_TODEVICE);
150 tx_buffer_info->dma = 0;
151 }
152 if (tx_buffer_info->skb) {
153 dev_kfree_skb_any(tx_buffer_info->skb);
154 tx_buffer_info->skb = NULL;
155 }
156 tx_buffer_info->time_stamp = 0;
157 /* tx_buffer_info must be completely set up in the transmit path */
158}
159
160static inline bool ixgbevf_check_tx_hang(struct ixgbevf_adapter *adapter,
161 struct ixgbevf_ring *tx_ring,
162 unsigned int eop)
163{
164 struct ixgbe_hw *hw = &adapter->hw;
165 u32 head, tail;
166
167 /* Detect a transmit hang in hardware, this serializes the
168 * check with the clearing of time_stamp and movement of eop */
169 head = readl(hw->hw_addr + tx_ring->head);
170 tail = readl(hw->hw_addr + tx_ring->tail);
171 adapter->detect_tx_hung = false;
172 if ((head != tail) &&
173 tx_ring->tx_buffer_info[eop].time_stamp &&
174 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ)) {
175 /* detected Tx unit hang */
176 union ixgbe_adv_tx_desc *tx_desc;
177 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
178 printk(KERN_ERR "Detected Tx Unit Hang\n"
179 " Tx Queue <%d>\n"
180 " TDH, TDT <%x>, <%x>\n"
181 " next_to_use <%x>\n"
182 " next_to_clean <%x>\n"
183 "tx_buffer_info[next_to_clean]\n"
184 " time_stamp <%lx>\n"
185 " jiffies <%lx>\n",
186 tx_ring->queue_index,
187 head, tail,
188 tx_ring->next_to_use, eop,
189 tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
190 return true;
191 }
192
193 return false;
194}
195
196#define IXGBE_MAX_TXD_PWR 14
197#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
198
199/* Tx Descriptors needed, worst case */
200#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
201 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
202#ifdef MAX_SKB_FRAGS
203#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
204 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
205#else
206#define DESC_NEEDED TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD)
207#endif
208
209static void ixgbevf_tx_timeout(struct net_device *netdev);
210
211/**
212 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
213 * @adapter: board private structure
214 * @tx_ring: tx ring to clean
215 **/
216static bool ixgbevf_clean_tx_irq(struct ixgbevf_adapter *adapter,
217 struct ixgbevf_ring *tx_ring)
218{
219 struct net_device *netdev = adapter->netdev;
220 struct ixgbe_hw *hw = &adapter->hw;
221 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
222 struct ixgbevf_tx_buffer *tx_buffer_info;
223 unsigned int i, eop, count = 0;
224 unsigned int total_bytes = 0, total_packets = 0;
225
226 i = tx_ring->next_to_clean;
227 eop = tx_ring->tx_buffer_info[i].next_to_watch;
228 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
229
230 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
231 (count < tx_ring->work_limit)) {
232 bool cleaned = false;
233 for ( ; !cleaned; count++) {
234 struct sk_buff *skb;
235 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
236 tx_buffer_info = &tx_ring->tx_buffer_info[i];
237 cleaned = (i == eop);
238 skb = tx_buffer_info->skb;
239
240 if (cleaned && skb) {
241 unsigned int segs, bytecount;
242
243 /* gso_segs is currently only valid for tcp */
244 segs = skb_shinfo(skb)->gso_segs ?: 1;
245 /* multiply data chunks by size of headers */
246 bytecount = ((segs - 1) * skb_headlen(skb)) +
247 skb->len;
248 total_packets += segs;
249 total_bytes += bytecount;
250 }
251
252 ixgbevf_unmap_and_free_tx_resource(adapter,
253 tx_buffer_info);
254
255 tx_desc->wb.status = 0;
256
257 i++;
258 if (i == tx_ring->count)
259 i = 0;
260 }
261
262 eop = tx_ring->tx_buffer_info[i].next_to_watch;
263 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
264 }
265
266 tx_ring->next_to_clean = i;
267
268#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
269 if (unlikely(count && netif_carrier_ok(netdev) &&
270 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
271 /* Make sure that anybody stopping the queue after this
272 * sees the new next_to_clean.
273 */
274 smp_mb();
275#ifdef HAVE_TX_MQ
276 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
277 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
278 netif_wake_subqueue(netdev, tx_ring->queue_index);
279 ++adapter->restart_queue;
280 }
281#else
282 if (netif_queue_stopped(netdev) &&
283 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
284 netif_wake_queue(netdev);
285 ++adapter->restart_queue;
286 }
287#endif
288 }
289
290 if (adapter->detect_tx_hung) {
291 if (ixgbevf_check_tx_hang(adapter, tx_ring, i)) {
292 /* schedule immediate reset if we believe we hung */
293 printk(KERN_INFO
294 "tx hang %d detected, resetting adapter\n",
295 adapter->tx_timeout_count + 1);
296 ixgbevf_tx_timeout(adapter->netdev);
297 }
298 }
299
300 /* re-arm the interrupt */
301 if ((count >= tx_ring->work_limit) &&
302 (!test_bit(__IXGBEVF_DOWN, &adapter->state))) {
303 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, tx_ring->v_idx);
304 }
305
306 tx_ring->total_bytes += total_bytes;
307 tx_ring->total_packets += total_packets;
308
309 adapter->net_stats.tx_bytes += total_bytes;
310 adapter->net_stats.tx_packets += total_packets;
311
312 return (count < tx_ring->work_limit);
313}
314
315/**
316 * ixgbevf_receive_skb - Send a completed packet up the stack
317 * @q_vector: structure containing interrupt and ring information
318 * @skb: packet to send up
319 * @status: hardware indication of status of receive
320 * @rx_ring: rx descriptor ring (for a specific queue) to setup
321 * @rx_desc: rx descriptor
322 **/
323static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector,
324 struct sk_buff *skb, u8 status,
325 struct ixgbevf_ring *ring,
326 union ixgbe_adv_rx_desc *rx_desc)
327{
328 struct ixgbevf_adapter *adapter = q_vector->adapter;
329 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
330 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
331 int ret;
332
333 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
334 if (adapter->vlgrp && is_vlan)
335 vlan_gro_receive(&q_vector->napi,
336 adapter->vlgrp,
337 tag, skb);
338 else
339 napi_gro_receive(&q_vector->napi, skb);
340 } else {
341 if (adapter->vlgrp && is_vlan)
342 ret = vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
343 else
344 ret = netif_rx(skb);
345 }
346}
347
348/**
349 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
350 * @adapter: address of board private structure
351 * @status_err: hardware indication of status of receive
352 * @skb: skb currently being received and modified
353 **/
354static inline void ixgbevf_rx_checksum(struct ixgbevf_adapter *adapter,
355 u32 status_err, struct sk_buff *skb)
356{
357 skb->ip_summed = CHECKSUM_NONE;
358
359 /* Rx csum disabled */
360 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
361 return;
362
363 /* if IP and error */
364 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
365 (status_err & IXGBE_RXDADV_ERR_IPE)) {
366 adapter->hw_csum_rx_error++;
367 return;
368 }
369
370 if (!(status_err & IXGBE_RXD_STAT_L4CS))
371 return;
372
373 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
374 adapter->hw_csum_rx_error++;
375 return;
376 }
377
378 /* It must be a TCP or UDP packet with a valid checksum */
379 skb->ip_summed = CHECKSUM_UNNECESSARY;
380 adapter->hw_csum_rx_good++;
381}
382
383/**
384 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
385 * @adapter: address of board private structure
386 **/
387static void ixgbevf_alloc_rx_buffers(struct ixgbevf_adapter *adapter,
388 struct ixgbevf_ring *rx_ring,
389 int cleaned_count)
390{
391 struct pci_dev *pdev = adapter->pdev;
392 union ixgbe_adv_rx_desc *rx_desc;
393 struct ixgbevf_rx_buffer *bi;
394 struct sk_buff *skb;
395 unsigned int i;
396 unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN;
397
398 i = rx_ring->next_to_use;
399 bi = &rx_ring->rx_buffer_info[i];
400
401 while (cleaned_count--) {
402 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
403
404 if (!bi->page_dma &&
405 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
406 if (!bi->page) {
407 bi->page = netdev_alloc_page(adapter->netdev);
408 if (!bi->page) {
409 adapter->alloc_rx_page_failed++;
410 goto no_buffers;
411 }
412 bi->page_offset = 0;
413 } else {
414 /* use a half page if we're re-using */
415 bi->page_offset ^= (PAGE_SIZE / 2);
416 }
417
418 bi->page_dma = pci_map_page(pdev, bi->page,
419 bi->page_offset,
420 (PAGE_SIZE / 2),
421 PCI_DMA_FROMDEVICE);
422 }
423
424 skb = bi->skb;
425 if (!skb) {
426 skb = netdev_alloc_skb(adapter->netdev,
427 bufsz);
428
429 if (!skb) {
430 adapter->alloc_rx_buff_failed++;
431 goto no_buffers;
432 }
433
434 /*
435 * Make buffer alignment 2 beyond a 16 byte boundary
436 * this will result in a 16 byte aligned IP header after
437 * the 14 byte MAC header is removed
438 */
439 skb_reserve(skb, NET_IP_ALIGN);
440
441 bi->skb = skb;
442 }
443 if (!bi->dma) {
444 bi->dma = pci_map_single(pdev, skb->data,
445 rx_ring->rx_buf_len,
446 PCI_DMA_FROMDEVICE);
447 }
448 /* Refresh the desc even if buffer_addrs didn't change because
449 * each write-back erases this info. */
450 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
451 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
452 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
453 } else {
454 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
455 }
456
457 i++;
458 if (i == rx_ring->count)
459 i = 0;
460 bi = &rx_ring->rx_buffer_info[i];
461 }
462
463no_buffers:
464 if (rx_ring->next_to_use != i) {
465 rx_ring->next_to_use = i;
466 if (i-- == 0)
467 i = (rx_ring->count - 1);
468
469 ixgbevf_release_rx_desc(&adapter->hw, rx_ring, i);
470 }
471}
472
473static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
474 u64 qmask)
475{
476 u32 mask;
477 struct ixgbe_hw *hw = &adapter->hw;
478
479 mask = (qmask & 0xFFFFFFFF);
480 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
481}
482
483static inline u16 ixgbevf_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
484{
485 return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
486}
487
488static inline u16 ixgbevf_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
489{
490 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
491}
492
493static bool ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
494 struct ixgbevf_ring *rx_ring,
495 int *work_done, int work_to_do)
496{
497 struct ixgbevf_adapter *adapter = q_vector->adapter;
498 struct pci_dev *pdev = adapter->pdev;
499 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
500 struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer;
501 struct sk_buff *skb;
502 unsigned int i;
503 u32 len, staterr;
504 u16 hdr_info;
505 bool cleaned = false;
506 int cleaned_count = 0;
507 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
508
509 i = rx_ring->next_to_clean;
510 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
511 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
512 rx_buffer_info = &rx_ring->rx_buffer_info[i];
513
514 while (staterr & IXGBE_RXD_STAT_DD) {
515 u32 upper_len = 0;
516 if (*work_done >= work_to_do)
517 break;
518 (*work_done)++;
519
520 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
521 hdr_info = le16_to_cpu(ixgbevf_get_hdr_info(rx_desc));
522 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
523 IXGBE_RXDADV_HDRBUFLEN_SHIFT;
524 if (hdr_info & IXGBE_RXDADV_SPH)
525 adapter->rx_hdr_split++;
526 if (len > IXGBEVF_RX_HDR_SIZE)
527 len = IXGBEVF_RX_HDR_SIZE;
528 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
529 } else {
530 len = le16_to_cpu(rx_desc->wb.upper.length);
531 }
532 cleaned = true;
533 skb = rx_buffer_info->skb;
534 prefetch(skb->data - NET_IP_ALIGN);
535 rx_buffer_info->skb = NULL;
536
537 if (rx_buffer_info->dma) {
538 pci_unmap_single(pdev, rx_buffer_info->dma,
539 rx_ring->rx_buf_len,
540 PCI_DMA_FROMDEVICE);
541 rx_buffer_info->dma = 0;
542 skb_put(skb, len);
543 }
544
545 if (upper_len) {
546 pci_unmap_page(pdev, rx_buffer_info->page_dma,
547 PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
548 rx_buffer_info->page_dma = 0;
549 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
550 rx_buffer_info->page,
551 rx_buffer_info->page_offset,
552 upper_len);
553
554 if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
555 (page_count(rx_buffer_info->page) != 1))
556 rx_buffer_info->page = NULL;
557 else
558 get_page(rx_buffer_info->page);
559
560 skb->len += upper_len;
561 skb->data_len += upper_len;
562 skb->truesize += upper_len;
563 }
564
565 i++;
566 if (i == rx_ring->count)
567 i = 0;
568
569 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
570 prefetch(next_rxd);
571 cleaned_count++;
572
573 next_buffer = &rx_ring->rx_buffer_info[i];
574
575 if (!(staterr & IXGBE_RXD_STAT_EOP)) {
576 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
577 rx_buffer_info->skb = next_buffer->skb;
578 rx_buffer_info->dma = next_buffer->dma;
579 next_buffer->skb = skb;
580 next_buffer->dma = 0;
581 } else {
582 skb->next = next_buffer->skb;
583 skb->next->prev = skb;
584 }
585 adapter->non_eop_descs++;
586 goto next_desc;
587 }
588
589 /* ERR_MASK will only have valid bits if EOP set */
590 if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) {
591 dev_kfree_skb_irq(skb);
592 goto next_desc;
593 }
594
595 ixgbevf_rx_checksum(adapter, staterr, skb);
596
597 /* probably a little skewed due to removing CRC */
598 total_rx_bytes += skb->len;
599 total_rx_packets++;
600
601 /*
602 * Work around issue of some types of VM to VM loop back
603 * packets not getting split correctly
604 */
605 if (staterr & IXGBE_RXD_STAT_LB) {
606 u32 header_fixup_len = skb->len - skb->data_len;
607 if (header_fixup_len < 14)
608 skb_push(skb, header_fixup_len);
609 }
610 skb->protocol = eth_type_trans(skb, adapter->netdev);
611
612 ixgbevf_receive_skb(q_vector, skb, staterr, rx_ring, rx_desc);
613 adapter->netdev->last_rx = jiffies;
614
615next_desc:
616 rx_desc->wb.upper.status_error = 0;
617
618 /* return some buffers to hardware, one at a time is too slow */
619 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
620 ixgbevf_alloc_rx_buffers(adapter, rx_ring,
621 cleaned_count);
622 cleaned_count = 0;
623 }
624
625 /* use prefetched values */
626 rx_desc = next_rxd;
627 rx_buffer_info = &rx_ring->rx_buffer_info[i];
628
629 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
630 }
631
632 rx_ring->next_to_clean = i;
633 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
634
635 if (cleaned_count)
636 ixgbevf_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
637
638 rx_ring->total_packets += total_rx_packets;
639 rx_ring->total_bytes += total_rx_bytes;
640 adapter->net_stats.rx_bytes += total_rx_bytes;
641 adapter->net_stats.rx_packets += total_rx_packets;
642
643 return cleaned;
644}
645
646/**
647 * ixgbevf_clean_rxonly - msix (aka one shot) rx clean routine
648 * @napi: napi struct with our devices info in it
649 * @budget: amount of work driver is allowed to do this pass, in packets
650 *
651 * This function is optimized for cleaning one queue only on a single
652 * q_vector!!!
653 **/
654static int ixgbevf_clean_rxonly(struct napi_struct *napi, int budget)
655{
656 struct ixgbevf_q_vector *q_vector =
657 container_of(napi, struct ixgbevf_q_vector, napi);
658 struct ixgbevf_adapter *adapter = q_vector->adapter;
659 struct ixgbevf_ring *rx_ring = NULL;
660 int work_done = 0;
661 long r_idx;
662
663 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
664 rx_ring = &(adapter->rx_ring[r_idx]);
665
666 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
667
668 /* If all Rx work done, exit the polling mode */
669 if (work_done < budget) {
670 napi_complete(napi);
671 if (adapter->itr_setting & 1)
672 ixgbevf_set_itr_msix(q_vector);
673 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
674 ixgbevf_irq_enable_queues(adapter, rx_ring->v_idx);
675 }
676
677 return work_done;
678}
679
680/**
681 * ixgbevf_clean_rxonly_many - msix (aka one shot) rx clean routine
682 * @napi: napi struct with our devices info in it
683 * @budget: amount of work driver is allowed to do this pass, in packets
684 *
685 * This function will clean more than one rx queue associated with a
686 * q_vector.
687 **/
688static int ixgbevf_clean_rxonly_many(struct napi_struct *napi, int budget)
689{
690 struct ixgbevf_q_vector *q_vector =
691 container_of(napi, struct ixgbevf_q_vector, napi);
692 struct ixgbevf_adapter *adapter = q_vector->adapter;
693 struct ixgbevf_ring *rx_ring = NULL;
694 int work_done = 0, i;
695 long r_idx;
696 u64 enable_mask = 0;
697
698 /* attempt to distribute budget to each queue fairly, but don't allow
699 * the budget to go below 1 because we'll exit polling */
700 budget /= (q_vector->rxr_count ?: 1);
701 budget = max(budget, 1);
702 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
703 for (i = 0; i < q_vector->rxr_count; i++) {
704 rx_ring = &(adapter->rx_ring[r_idx]);
705 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
706 enable_mask |= rx_ring->v_idx;
707 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
708 r_idx + 1);
709 }
710
711#ifndef HAVE_NETDEV_NAPI_LIST
712 if (!netif_running(adapter->netdev))
713 work_done = 0;
714
715#endif
716 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
717 rx_ring = &(adapter->rx_ring[r_idx]);
718
719 /* If all Rx work done, exit the polling mode */
720 if (work_done < budget) {
721 napi_complete(napi);
722 if (adapter->itr_setting & 1)
723 ixgbevf_set_itr_msix(q_vector);
724 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
725 ixgbevf_irq_enable_queues(adapter, enable_mask);
726 }
727
728 return work_done;
729}
730
731
732/**
733 * ixgbevf_configure_msix - Configure MSI-X hardware
734 * @adapter: board private structure
735 *
736 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
737 * interrupts.
738 **/
739static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
740{
741 struct ixgbevf_q_vector *q_vector;
742 struct ixgbe_hw *hw = &adapter->hw;
743 int i, j, q_vectors, v_idx, r_idx;
744 u32 mask;
745
746 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
747
748 /*
749 * Populate the IVAR table and set the ITR values to the
750 * corresponding register.
751 */
752 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
753 q_vector = adapter->q_vector[v_idx];
984b3f57 754 /* XXX for_each_set_bit(...) */
92915f71
GR
755 r_idx = find_first_bit(q_vector->rxr_idx,
756 adapter->num_rx_queues);
757
758 for (i = 0; i < q_vector->rxr_count; i++) {
759 j = adapter->rx_ring[r_idx].reg_idx;
760 ixgbevf_set_ivar(adapter, 0, j, v_idx);
761 r_idx = find_next_bit(q_vector->rxr_idx,
762 adapter->num_rx_queues,
763 r_idx + 1);
764 }
765 r_idx = find_first_bit(q_vector->txr_idx,
766 adapter->num_tx_queues);
767
768 for (i = 0; i < q_vector->txr_count; i++) {
769 j = adapter->tx_ring[r_idx].reg_idx;
770 ixgbevf_set_ivar(adapter, 1, j, v_idx);
771 r_idx = find_next_bit(q_vector->txr_idx,
772 adapter->num_tx_queues,
773 r_idx + 1);
774 }
775
776 /* if this is a tx only vector halve the interrupt rate */
777 if (q_vector->txr_count && !q_vector->rxr_count)
778 q_vector->eitr = (adapter->eitr_param >> 1);
779 else if (q_vector->rxr_count)
780 /* rx only */
781 q_vector->eitr = adapter->eitr_param;
782
783 ixgbevf_write_eitr(adapter, v_idx, q_vector->eitr);
784 }
785
786 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
787
788 /* set up to autoclear timer, and the vectors */
789 mask = IXGBE_EIMS_ENABLE_MASK;
790 mask &= ~IXGBE_EIMS_OTHER;
791 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, mask);
792}
793
794enum latency_range {
795 lowest_latency = 0,
796 low_latency = 1,
797 bulk_latency = 2,
798 latency_invalid = 255
799};
800
801/**
802 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
803 * @adapter: pointer to adapter
804 * @eitr: eitr setting (ints per sec) to give last timeslice
805 * @itr_setting: current throttle rate in ints/second
806 * @packets: the number of packets during this measurement interval
807 * @bytes: the number of bytes during this measurement interval
808 *
809 * Stores a new ITR value based on packets and byte
810 * counts during the last interrupt. The advantage of per interrupt
811 * computation is faster updates and more accurate ITR for the current
812 * traffic pattern. Constants in this function were computed
813 * based on theoretical maximum wire speed and thresholds were set based
814 * on testing data as well as attempting to minimize response time
815 * while increasing bulk throughput.
816 **/
817static u8 ixgbevf_update_itr(struct ixgbevf_adapter *adapter,
818 u32 eitr, u8 itr_setting,
819 int packets, int bytes)
820{
821 unsigned int retval = itr_setting;
822 u32 timepassed_us;
823 u64 bytes_perint;
824
825 if (packets == 0)
826 goto update_itr_done;
827
828
829 /* simple throttlerate management
830 * 0-20MB/s lowest (100000 ints/s)
831 * 20-100MB/s low (20000 ints/s)
832 * 100-1249MB/s bulk (8000 ints/s)
833 */
834 /* what was last interrupt timeslice? */
835 timepassed_us = 1000000/eitr;
836 bytes_perint = bytes / timepassed_us; /* bytes/usec */
837
838 switch (itr_setting) {
839 case lowest_latency:
840 if (bytes_perint > adapter->eitr_low)
841 retval = low_latency;
842 break;
843 case low_latency:
844 if (bytes_perint > adapter->eitr_high)
845 retval = bulk_latency;
846 else if (bytes_perint <= adapter->eitr_low)
847 retval = lowest_latency;
848 break;
849 case bulk_latency:
850 if (bytes_perint <= adapter->eitr_high)
851 retval = low_latency;
852 break;
853 }
854
855update_itr_done:
856 return retval;
857}
858
859/**
860 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
861 * @adapter: pointer to adapter struct
862 * @v_idx: vector index into q_vector array
863 * @itr_reg: new value to be written in *register* format, not ints/s
864 *
865 * This function is made to be called by ethtool and by the driver
866 * when it needs to update VTEITR registers at runtime. Hardware
867 * specific quirks/differences are taken care of here.
868 */
869static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
870 u32 itr_reg)
871{
872 struct ixgbe_hw *hw = &adapter->hw;
873
874 itr_reg = EITR_INTS_PER_SEC_TO_REG(itr_reg);
875
876 /*
877 * set the WDIS bit to not clear the timer bits and cause an
878 * immediate assertion of the interrupt
879 */
880 itr_reg |= IXGBE_EITR_CNT_WDIS;
881
882 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
883}
884
885static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector)
886{
887 struct ixgbevf_adapter *adapter = q_vector->adapter;
888 u32 new_itr;
889 u8 current_itr, ret_itr;
890 int i, r_idx, v_idx = q_vector->v_idx;
891 struct ixgbevf_ring *rx_ring, *tx_ring;
892
893 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
894 for (i = 0; i < q_vector->txr_count; i++) {
895 tx_ring = &(adapter->tx_ring[r_idx]);
896 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
897 q_vector->tx_itr,
898 tx_ring->total_packets,
899 tx_ring->total_bytes);
900 /* if the result for this queue would decrease interrupt
901 * rate for this vector then use that result */
902 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
903 q_vector->tx_itr - 1 : ret_itr);
904 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
905 r_idx + 1);
906 }
907
908 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
909 for (i = 0; i < q_vector->rxr_count; i++) {
910 rx_ring = &(adapter->rx_ring[r_idx]);
911 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
912 q_vector->rx_itr,
913 rx_ring->total_packets,
914 rx_ring->total_bytes);
915 /* if the result for this queue would decrease interrupt
916 * rate for this vector then use that result */
917 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
918 q_vector->rx_itr - 1 : ret_itr);
919 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
920 r_idx + 1);
921 }
922
923 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
924
925 switch (current_itr) {
926 /* counts and packets in update_itr are dependent on these numbers */
927 case lowest_latency:
928 new_itr = 100000;
929 break;
930 case low_latency:
931 new_itr = 20000; /* aka hwitr = ~200 */
932 break;
933 case bulk_latency:
934 default:
935 new_itr = 8000;
936 break;
937 }
938
939 if (new_itr != q_vector->eitr) {
940 u32 itr_reg;
941
942 /* save the algorithm value here, not the smoothed one */
943 q_vector->eitr = new_itr;
944 /* do an exponential smoothing */
945 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
946 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
947 ixgbevf_write_eitr(adapter, v_idx, itr_reg);
948 }
949
950 return;
951}
952
953static irqreturn_t ixgbevf_msix_mbx(int irq, void *data)
954{
955 struct net_device *netdev = data;
956 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
957 struct ixgbe_hw *hw = &adapter->hw;
958 u32 eicr;
a9ee25a2 959 u32 msg;
92915f71
GR
960
961 eicr = IXGBE_READ_REG(hw, IXGBE_VTEICS);
962 IXGBE_WRITE_REG(hw, IXGBE_VTEICR, eicr);
963
a9ee25a2
GR
964 hw->mbx.ops.read(hw, &msg, 1);
965
966 if ((msg & IXGBE_MBVFICR_VFREQ_MASK) == IXGBE_PF_CONTROL_MSG)
967 mod_timer(&adapter->watchdog_timer,
4c3a8223 968 round_jiffies(jiffies + 1));
a9ee25a2 969
92915f71
GR
970 return IRQ_HANDLED;
971}
972
973static irqreturn_t ixgbevf_msix_clean_tx(int irq, void *data)
974{
975 struct ixgbevf_q_vector *q_vector = data;
976 struct ixgbevf_adapter *adapter = q_vector->adapter;
977 struct ixgbevf_ring *tx_ring;
978 int i, r_idx;
979
980 if (!q_vector->txr_count)
981 return IRQ_HANDLED;
982
983 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
984 for (i = 0; i < q_vector->txr_count; i++) {
985 tx_ring = &(adapter->tx_ring[r_idx]);
986 tx_ring->total_bytes = 0;
987 tx_ring->total_packets = 0;
988 ixgbevf_clean_tx_irq(adapter, tx_ring);
989 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
990 r_idx + 1);
991 }
992
993 if (adapter->itr_setting & 1)
994 ixgbevf_set_itr_msix(q_vector);
995
996 return IRQ_HANDLED;
997}
998
999/**
1000 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
1001 * @irq: unused
1002 * @data: pointer to our q_vector struct for this interrupt vector
1003 **/
1004static irqreturn_t ixgbevf_msix_clean_rx(int irq, void *data)
1005{
1006 struct ixgbevf_q_vector *q_vector = data;
1007 struct ixgbevf_adapter *adapter = q_vector->adapter;
1008 struct ixgbe_hw *hw = &adapter->hw;
1009 struct ixgbevf_ring *rx_ring;
1010 int r_idx;
1011 int i;
1012
1013 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1014 for (i = 0; i < q_vector->rxr_count; i++) {
1015 rx_ring = &(adapter->rx_ring[r_idx]);
1016 rx_ring->total_bytes = 0;
1017 rx_ring->total_packets = 0;
1018 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1019 r_idx + 1);
1020 }
1021
1022 if (!q_vector->rxr_count)
1023 return IRQ_HANDLED;
1024
1025 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1026 rx_ring = &(adapter->rx_ring[r_idx]);
1027 /* disable interrupts on this vector only */
1028 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, rx_ring->v_idx);
1029 napi_schedule(&q_vector->napi);
1030
1031
1032 return IRQ_HANDLED;
1033}
1034
1035static irqreturn_t ixgbevf_msix_clean_many(int irq, void *data)
1036{
1037 ixgbevf_msix_clean_rx(irq, data);
1038 ixgbevf_msix_clean_tx(irq, data);
1039
1040 return IRQ_HANDLED;
1041}
1042
1043static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
1044 int r_idx)
1045{
1046 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1047
1048 set_bit(r_idx, q_vector->rxr_idx);
1049 q_vector->rxr_count++;
1050 a->rx_ring[r_idx].v_idx = 1 << v_idx;
1051}
1052
1053static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
1054 int t_idx)
1055{
1056 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1057
1058 set_bit(t_idx, q_vector->txr_idx);
1059 q_vector->txr_count++;
1060 a->tx_ring[t_idx].v_idx = 1 << v_idx;
1061}
1062
1063/**
1064 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
1065 * @adapter: board private structure to initialize
1066 *
1067 * This function maps descriptor rings to the queue-specific vectors
1068 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1069 * one vector per ring/queue, but on a constrained vector budget, we
1070 * group the rings as "efficiently" as possible. You would add new
1071 * mapping configurations in here.
1072 **/
1073static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
1074{
1075 int q_vectors;
1076 int v_start = 0;
1077 int rxr_idx = 0, txr_idx = 0;
1078 int rxr_remaining = adapter->num_rx_queues;
1079 int txr_remaining = adapter->num_tx_queues;
1080 int i, j;
1081 int rqpv, tqpv;
1082 int err = 0;
1083
1084 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1085
1086 /*
1087 * The ideal configuration...
1088 * We have enough vectors to map one per queue.
1089 */
1090 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1091 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1092 map_vector_to_rxq(adapter, v_start, rxr_idx);
1093
1094 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1095 map_vector_to_txq(adapter, v_start, txr_idx);
1096 goto out;
1097 }
1098
1099 /*
1100 * If we don't have enough vectors for a 1-to-1
1101 * mapping, we'll have to group them so there are
1102 * multiple queues per vector.
1103 */
1104 /* Re-adjusting *qpv takes care of the remainder. */
1105 for (i = v_start; i < q_vectors; i++) {
1106 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
1107 for (j = 0; j < rqpv; j++) {
1108 map_vector_to_rxq(adapter, i, rxr_idx);
1109 rxr_idx++;
1110 rxr_remaining--;
1111 }
1112 }
1113 for (i = v_start; i < q_vectors; i++) {
1114 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
1115 for (j = 0; j < tqpv; j++) {
1116 map_vector_to_txq(adapter, i, txr_idx);
1117 txr_idx++;
1118 txr_remaining--;
1119 }
1120 }
1121
1122out:
1123 return err;
1124}
1125
1126/**
1127 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
1128 * @adapter: board private structure
1129 *
1130 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
1131 * interrupts from the kernel.
1132 **/
1133static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1134{
1135 struct net_device *netdev = adapter->netdev;
1136 irqreturn_t (*handler)(int, void *);
1137 int i, vector, q_vectors, err;
1138 int ri = 0, ti = 0;
1139
1140 /* Decrement for Other and TCP Timer vectors */
1141 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1142
1143#define SET_HANDLER(_v) (((_v)->rxr_count && (_v)->txr_count) \
1144 ? &ixgbevf_msix_clean_many : \
1145 (_v)->rxr_count ? &ixgbevf_msix_clean_rx : \
1146 (_v)->txr_count ? &ixgbevf_msix_clean_tx : \
1147 NULL)
1148 for (vector = 0; vector < q_vectors; vector++) {
1149 handler = SET_HANDLER(adapter->q_vector[vector]);
1150
1151 if (handler == &ixgbevf_msix_clean_rx) {
1152 sprintf(adapter->name[vector], "%s-%s-%d",
1153 netdev->name, "rx", ri++);
1154 } else if (handler == &ixgbevf_msix_clean_tx) {
1155 sprintf(adapter->name[vector], "%s-%s-%d",
1156 netdev->name, "tx", ti++);
1157 } else if (handler == &ixgbevf_msix_clean_many) {
1158 sprintf(adapter->name[vector], "%s-%s-%d",
1159 netdev->name, "TxRx", vector);
1160 } else {
1161 /* skip this unused q_vector */
1162 continue;
1163 }
1164 err = request_irq(adapter->msix_entries[vector].vector,
1165 handler, 0, adapter->name[vector],
1166 adapter->q_vector[vector]);
1167 if (err) {
1168 hw_dbg(&adapter->hw,
1169 "request_irq failed for MSIX interrupt "
1170 "Error: %d\n", err);
1171 goto free_queue_irqs;
1172 }
1173 }
1174
1175 sprintf(adapter->name[vector], "%s:mbx", netdev->name);
1176 err = request_irq(adapter->msix_entries[vector].vector,
1177 &ixgbevf_msix_mbx, 0, adapter->name[vector], netdev);
1178 if (err) {
1179 hw_dbg(&adapter->hw,
1180 "request_irq for msix_mbx failed: %d\n", err);
1181 goto free_queue_irqs;
1182 }
1183
1184 return 0;
1185
1186free_queue_irqs:
1187 for (i = vector - 1; i >= 0; i--)
1188 free_irq(adapter->msix_entries[--vector].vector,
1189 &(adapter->q_vector[i]));
1190 pci_disable_msix(adapter->pdev);
1191 kfree(adapter->msix_entries);
1192 adapter->msix_entries = NULL;
1193 return err;
1194}
1195
1196static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
1197{
1198 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1199
1200 for (i = 0; i < q_vectors; i++) {
1201 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
1202 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1203 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1204 q_vector->rxr_count = 0;
1205 q_vector->txr_count = 0;
1206 q_vector->eitr = adapter->eitr_param;
1207 }
1208}
1209
1210/**
1211 * ixgbevf_request_irq - initialize interrupts
1212 * @adapter: board private structure
1213 *
1214 * Attempts to configure interrupts using the best available
1215 * capabilities of the hardware and kernel.
1216 **/
1217static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1218{
1219 int err = 0;
1220
1221 err = ixgbevf_request_msix_irqs(adapter);
1222
1223 if (err)
1224 hw_dbg(&adapter->hw,
1225 "request_irq failed, Error %d\n", err);
1226
1227 return err;
1228}
1229
1230static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1231{
1232 struct net_device *netdev = adapter->netdev;
1233 int i, q_vectors;
1234
1235 q_vectors = adapter->num_msix_vectors;
1236
1237 i = q_vectors - 1;
1238
1239 free_irq(adapter->msix_entries[i].vector, netdev);
1240 i--;
1241
1242 for (; i >= 0; i--) {
1243 free_irq(adapter->msix_entries[i].vector,
1244 adapter->q_vector[i]);
1245 }
1246
1247 ixgbevf_reset_q_vectors(adapter);
1248}
1249
1250/**
1251 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1252 * @adapter: board private structure
1253 **/
1254static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1255{
1256 int i;
1257 struct ixgbe_hw *hw = &adapter->hw;
1258
1259 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
1260
1261 IXGBE_WRITE_FLUSH(hw);
1262
1263 for (i = 0; i < adapter->num_msix_vectors; i++)
1264 synchronize_irq(adapter->msix_entries[i].vector);
1265}
1266
1267/**
1268 * ixgbevf_irq_enable - Enable default interrupt generation settings
1269 * @adapter: board private structure
1270 **/
1271static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter,
1272 bool queues, bool flush)
1273{
1274 struct ixgbe_hw *hw = &adapter->hw;
1275 u32 mask;
1276 u64 qmask;
1277
1278 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
1279 qmask = ~0;
1280
1281 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
1282
1283 if (queues)
1284 ixgbevf_irq_enable_queues(adapter, qmask);
1285
1286 if (flush)
1287 IXGBE_WRITE_FLUSH(hw);
1288}
1289
1290/**
1291 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1292 * @adapter: board private structure
1293 *
1294 * Configure the Tx unit of the MAC after a reset.
1295 **/
1296static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1297{
1298 u64 tdba;
1299 struct ixgbe_hw *hw = &adapter->hw;
1300 u32 i, j, tdlen, txctrl;
1301
1302 /* Setup the HW Tx Head and Tail descriptor pointers */
1303 for (i = 0; i < adapter->num_tx_queues; i++) {
1304 struct ixgbevf_ring *ring = &adapter->tx_ring[i];
1305 j = ring->reg_idx;
1306 tdba = ring->dma;
1307 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1308 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j),
1309 (tdba & DMA_BIT_MASK(32)));
1310 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(j), (tdba >> 32));
1311 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(j), tdlen);
1312 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(j), 0);
1313 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(j), 0);
1314 adapter->tx_ring[i].head = IXGBE_VFTDH(j);
1315 adapter->tx_ring[i].tail = IXGBE_VFTDT(j);
1316 /* Disable Tx Head Writeback RO bit, since this hoses
1317 * bookkeeping if things aren't delivered in order.
1318 */
1319 txctrl = IXGBE_READ_REG(hw, IXGBE_VFDCA_TXCTRL(j));
1320 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1321 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(j), txctrl);
1322 }
1323}
1324
1325#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1326
1327static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1328{
1329 struct ixgbevf_ring *rx_ring;
1330 struct ixgbe_hw *hw = &adapter->hw;
1331 u32 srrctl;
1332
1333 rx_ring = &adapter->rx_ring[index];
1334
1335 srrctl = IXGBE_SRRCTL_DROP_EN;
1336
1337 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1338 u16 bufsz = IXGBEVF_RXBUFFER_2048;
1339 /* grow the amount we can receive on large page machines */
1340 if (bufsz < (PAGE_SIZE / 2))
1341 bufsz = (PAGE_SIZE / 2);
1342 /* cap the bufsz at our largest descriptor size */
1343 bufsz = min((u16)IXGBEVF_MAX_RXBUFFER, bufsz);
1344
1345 srrctl |= bufsz >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1346 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1347 srrctl |= ((IXGBEVF_RX_HDR_SIZE <<
1348 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1349 IXGBE_SRRCTL_BSIZEHDR_MASK);
1350 } else {
1351 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1352
1353 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1354 srrctl |= IXGBEVF_RXBUFFER_2048 >>
1355 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1356 else
1357 srrctl |= rx_ring->rx_buf_len >>
1358 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1359 }
1360 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1361}
1362
1363/**
1364 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1365 * @adapter: board private structure
1366 *
1367 * Configure the Rx unit of the MAC after a reset.
1368 **/
1369static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1370{
1371 u64 rdba;
1372 struct ixgbe_hw *hw = &adapter->hw;
1373 struct net_device *netdev = adapter->netdev;
1374 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1375 int i, j;
1376 u32 rdlen;
1377 int rx_buf_len;
1378
1379 /* Decide whether to use packet split mode or not */
1380 if (netdev->mtu > ETH_DATA_LEN) {
1381 if (adapter->flags & IXGBE_FLAG_RX_PS_CAPABLE)
1382 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1383 else
1384 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1385 } else {
1386 if (adapter->flags & IXGBE_FLAG_RX_1BUF_CAPABLE)
1387 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1388 else
1389 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1390 }
1391
1392 /* Set the RX buffer length according to the mode */
1393 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1394 /* PSRTYPE must be initialized in 82599 */
1395 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
1396 IXGBE_PSRTYPE_UDPHDR |
1397 IXGBE_PSRTYPE_IPV4HDR |
1398 IXGBE_PSRTYPE_IPV6HDR |
1399 IXGBE_PSRTYPE_L2HDR;
1400 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1401 rx_buf_len = IXGBEVF_RX_HDR_SIZE;
1402 } else {
1403 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
1404 if (netdev->mtu <= ETH_DATA_LEN)
1405 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1406 else
1407 rx_buf_len = ALIGN(max_frame, 1024);
1408 }
1409
1410 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1411 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1412 * the Base and Length of the Rx Descriptor Ring */
1413 for (i = 0; i < adapter->num_rx_queues; i++) {
1414 rdba = adapter->rx_ring[i].dma;
1415 j = adapter->rx_ring[i].reg_idx;
1416 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(j),
1417 (rdba & DMA_BIT_MASK(32)));
1418 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(j), (rdba >> 32));
1419 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(j), rdlen);
1420 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(j), 0);
1421 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(j), 0);
1422 adapter->rx_ring[i].head = IXGBE_VFRDH(j);
1423 adapter->rx_ring[i].tail = IXGBE_VFRDT(j);
1424 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1425
1426 ixgbevf_configure_srrctl(adapter, j);
1427 }
1428}
1429
1430static void ixgbevf_vlan_rx_register(struct net_device *netdev,
1431 struct vlan_group *grp)
1432{
1433 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1434 struct ixgbe_hw *hw = &adapter->hw;
1435 int i, j;
1436 u32 ctrl;
1437
1438 adapter->vlgrp = grp;
1439
1440 for (i = 0; i < adapter->num_rx_queues; i++) {
1441 j = adapter->rx_ring[i].reg_idx;
1442 ctrl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1443 ctrl |= IXGBE_RXDCTL_VME;
1444 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), ctrl);
1445 }
1446}
1447
1448static void ixgbevf_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1449{
1450 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1451 struct ixgbe_hw *hw = &adapter->hw;
1452 struct net_device *v_netdev;
1453
1454 /* add VID to filter table */
1455 if (hw->mac.ops.set_vfta)
1456 hw->mac.ops.set_vfta(hw, vid, 0, true);
1457 /*
1458 * Copy feature flags from netdev to the vlan netdev for this vid.
1459 * This allows things like TSO to bubble down to our vlan device.
1460 */
1461 v_netdev = vlan_group_get_device(adapter->vlgrp, vid);
1462 v_netdev->features |= adapter->netdev->features;
1463 vlan_group_set_device(adapter->vlgrp, vid, v_netdev);
1464}
1465
1466static void ixgbevf_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1467{
1468 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1469 struct ixgbe_hw *hw = &adapter->hw;
1470
1471 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
1472 ixgbevf_irq_disable(adapter);
1473
1474 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1475
1476 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
1477 ixgbevf_irq_enable(adapter, true, true);
1478
1479 /* remove VID from filter table */
1480 if (hw->mac.ops.set_vfta)
1481 hw->mac.ops.set_vfta(hw, vid, 0, false);
1482}
1483
1484static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1485{
1486 ixgbevf_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1487
1488 if (adapter->vlgrp) {
1489 u16 vid;
1490 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1491 if (!vlan_group_get_device(adapter->vlgrp, vid))
1492 continue;
1493 ixgbevf_vlan_rx_add_vid(adapter->netdev, vid);
1494 }
1495 }
1496}
1497
1498static u8 *ixgbevf_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr,
1499 u32 *vmdq)
1500{
1501 struct dev_mc_list *mc_ptr;
1502 u8 *addr = *mc_addr_ptr;
1503 *vmdq = 0;
1504
1505 mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
1506 if (mc_ptr->next)
1507 *mc_addr_ptr = mc_ptr->next->dmi_addr;
1508 else
1509 *mc_addr_ptr = NULL;
1510
1511 return addr;
1512}
1513
1514/**
1515 * ixgbevf_set_rx_mode - Multicast set
1516 * @netdev: network interface device structure
1517 *
1518 * The set_rx_method entry point is called whenever the multicast address
1519 * list or the network interface flags are updated. This routine is
1520 * responsible for configuring the hardware for proper multicast mode.
1521 **/
1522static void ixgbevf_set_rx_mode(struct net_device *netdev)
1523{
1524 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1525 struct ixgbe_hw *hw = &adapter->hw;
1526 u8 *addr_list = NULL;
1527 int addr_count = 0;
1528
1529 /* reprogram multicast list */
4cd24eaf 1530 addr_count = netdev_mc_count(netdev);
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1531 if (addr_count)
1532 addr_list = netdev->mc_list->dmi_addr;
1533 if (hw->mac.ops.update_mc_addr_list)
1534 hw->mac.ops.update_mc_addr_list(hw, addr_list, addr_count,
1535 ixgbevf_addr_list_itr);
1536}
1537
1538static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1539{
1540 int q_idx;
1541 struct ixgbevf_q_vector *q_vector;
1542 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1543
1544 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1545 struct napi_struct *napi;
1546 q_vector = adapter->q_vector[q_idx];
1547 if (!q_vector->rxr_count)
1548 continue;
1549 napi = &q_vector->napi;
1550 if (q_vector->rxr_count > 1)
1551 napi->poll = &ixgbevf_clean_rxonly_many;
1552
1553 napi_enable(napi);
1554 }
1555}
1556
1557static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1558{
1559 int q_idx;
1560 struct ixgbevf_q_vector *q_vector;
1561 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1562
1563 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1564 q_vector = adapter->q_vector[q_idx];
1565 if (!q_vector->rxr_count)
1566 continue;
1567 napi_disable(&q_vector->napi);
1568 }
1569}
1570
1571static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1572{
1573 struct net_device *netdev = adapter->netdev;
1574 int i;
1575
1576 ixgbevf_set_rx_mode(netdev);
1577
1578 ixgbevf_restore_vlan(adapter);
1579
1580 ixgbevf_configure_tx(adapter);
1581 ixgbevf_configure_rx(adapter);
1582 for (i = 0; i < adapter->num_rx_queues; i++) {
1583 struct ixgbevf_ring *ring = &adapter->rx_ring[i];
1584 ixgbevf_alloc_rx_buffers(adapter, ring, ring->count);
1585 ring->next_to_use = ring->count - 1;
1586 writel(ring->next_to_use, adapter->hw.hw_addr + ring->tail);
1587 }
1588}
1589
1590#define IXGBE_MAX_RX_DESC_POLL 10
1591static inline void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1592 int rxr)
1593{
1594 struct ixgbe_hw *hw = &adapter->hw;
1595 int j = adapter->rx_ring[rxr].reg_idx;
1596 int k;
1597
1598 for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) {
1599 if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)) & IXGBE_RXDCTL_ENABLE)
1600 break;
1601 else
1602 msleep(1);
1603 }
1604 if (k >= IXGBE_MAX_RX_DESC_POLL) {
1605 hw_dbg(hw, "RXDCTL.ENABLE on Rx queue %d "
1606 "not set within the polling period\n", rxr);
1607 }
1608
1609 ixgbevf_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr],
1610 (adapter->rx_ring[rxr].count - 1));
1611}
1612
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1613static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
1614{
1615 /* Only save pre-reset stats if there are some */
1616 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
1617 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
1618 adapter->stats.base_vfgprc;
1619 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
1620 adapter->stats.base_vfgptc;
1621 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
1622 adapter->stats.base_vfgorc;
1623 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
1624 adapter->stats.base_vfgotc;
1625 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
1626 adapter->stats.base_vfmprc;
1627 }
1628}
1629
1630static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
1631{
1632 struct ixgbe_hw *hw = &adapter->hw;
1633
1634 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
1635 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
1636 adapter->stats.last_vfgorc |=
1637 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
1638 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
1639 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
1640 adapter->stats.last_vfgotc |=
1641 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
1642 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
1643
1644 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
1645 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
1646 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
1647 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
1648 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
1649}
1650
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1651static int ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
1652{
1653 struct net_device *netdev = adapter->netdev;
1654 struct ixgbe_hw *hw = &adapter->hw;
1655 int i, j = 0;
1656 int num_rx_rings = adapter->num_rx_queues;
1657 u32 txdctl, rxdctl;
1658
1659 for (i = 0; i < adapter->num_tx_queues; i++) {
1660 j = adapter->tx_ring[i].reg_idx;
1661 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1662 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1663 txdctl |= (8 << 16);
1664 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1665 }
1666
1667 for (i = 0; i < adapter->num_tx_queues; i++) {
1668 j = adapter->tx_ring[i].reg_idx;
1669 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1670 txdctl |= IXGBE_TXDCTL_ENABLE;
1671 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1672 }
1673
1674 for (i = 0; i < num_rx_rings; i++) {
1675 j = adapter->rx_ring[i].reg_idx;
1676 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1677 rxdctl |= IXGBE_RXDCTL_ENABLE;
1678 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);
1679 ixgbevf_rx_desc_queue_enable(adapter, i);
1680 }
1681
1682 ixgbevf_configure_msix(adapter);
1683
1684 if (hw->mac.ops.set_rar) {
1685 if (is_valid_ether_addr(hw->mac.addr))
1686 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
1687 else
1688 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
1689 }
1690
1691 clear_bit(__IXGBEVF_DOWN, &adapter->state);
1692 ixgbevf_napi_enable_all(adapter);
1693
1694 /* enable transmits */
1695 netif_tx_start_all_queues(netdev);
1696
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1697 ixgbevf_save_reset_stats(adapter);
1698 ixgbevf_init_last_counter_stats(adapter);
1699
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1700 /* bring the link up in the watchdog, this could race with our first
1701 * link up interrupt but shouldn't be a problem */
1702 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
1703 adapter->link_check_timeout = jiffies;
1704 mod_timer(&adapter->watchdog_timer, jiffies);
1705 return 0;
1706}
1707
1708int ixgbevf_up(struct ixgbevf_adapter *adapter)
1709{
1710 int err;
1711 struct ixgbe_hw *hw = &adapter->hw;
1712
1713 ixgbevf_configure(adapter);
1714
1715 err = ixgbevf_up_complete(adapter);
1716
1717 /* clear any pending interrupts, may auto mask */
1718 IXGBE_READ_REG(hw, IXGBE_VTEICR);
1719
1720 ixgbevf_irq_enable(adapter, true, true);
1721
1722 return err;
1723}
1724
1725/**
1726 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
1727 * @adapter: board private structure
1728 * @rx_ring: ring to free buffers from
1729 **/
1730static void ixgbevf_clean_rx_ring(struct ixgbevf_adapter *adapter,
1731 struct ixgbevf_ring *rx_ring)
1732{
1733 struct pci_dev *pdev = adapter->pdev;
1734 unsigned long size;
1735 unsigned int i;
1736
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1737 if (!rx_ring->rx_buffer_info)
1738 return;
92915f71 1739
c0456c23 1740 /* Free all the Rx ring sk_buffs */
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1741 for (i = 0; i < rx_ring->count; i++) {
1742 struct ixgbevf_rx_buffer *rx_buffer_info;
1743
1744 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1745 if (rx_buffer_info->dma) {
1746 pci_unmap_single(pdev, rx_buffer_info->dma,
1747 rx_ring->rx_buf_len,
1748 PCI_DMA_FROMDEVICE);
1749 rx_buffer_info->dma = 0;
1750 }
1751 if (rx_buffer_info->skb) {
1752 struct sk_buff *skb = rx_buffer_info->skb;
1753 rx_buffer_info->skb = NULL;
1754 do {
1755 struct sk_buff *this = skb;
1756 skb = skb->prev;
1757 dev_kfree_skb(this);
1758 } while (skb);
1759 }
1760 if (!rx_buffer_info->page)
1761 continue;
1762 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE / 2,
1763 PCI_DMA_FROMDEVICE);
1764 rx_buffer_info->page_dma = 0;
1765 put_page(rx_buffer_info->page);
1766 rx_buffer_info->page = NULL;
1767 rx_buffer_info->page_offset = 0;
1768 }
1769
1770 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
1771 memset(rx_ring->rx_buffer_info, 0, size);
1772
1773 /* Zero out the descriptor ring */
1774 memset(rx_ring->desc, 0, rx_ring->size);
1775
1776 rx_ring->next_to_clean = 0;
1777 rx_ring->next_to_use = 0;
1778
1779 if (rx_ring->head)
1780 writel(0, adapter->hw.hw_addr + rx_ring->head);
1781 if (rx_ring->tail)
1782 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1783}
1784
1785/**
1786 * ixgbevf_clean_tx_ring - Free Tx Buffers
1787 * @adapter: board private structure
1788 * @tx_ring: ring to be cleaned
1789 **/
1790static void ixgbevf_clean_tx_ring(struct ixgbevf_adapter *adapter,
1791 struct ixgbevf_ring *tx_ring)
1792{
1793 struct ixgbevf_tx_buffer *tx_buffer_info;
1794 unsigned long size;
1795 unsigned int i;
1796
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1797 if (!tx_ring->tx_buffer_info)
1798 return;
1799
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1800 /* Free all the Tx ring sk_buffs */
1801
1802 for (i = 0; i < tx_ring->count; i++) {
1803 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1804 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1805 }
1806
1807 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
1808 memset(tx_ring->tx_buffer_info, 0, size);
1809
1810 memset(tx_ring->desc, 0, tx_ring->size);
1811
1812 tx_ring->next_to_use = 0;
1813 tx_ring->next_to_clean = 0;
1814
1815 if (tx_ring->head)
1816 writel(0, adapter->hw.hw_addr + tx_ring->head);
1817 if (tx_ring->tail)
1818 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1819}
1820
1821/**
1822 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
1823 * @adapter: board private structure
1824 **/
1825static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
1826{
1827 int i;
1828
1829 for (i = 0; i < adapter->num_rx_queues; i++)
1830 ixgbevf_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1831}
1832
1833/**
1834 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
1835 * @adapter: board private structure
1836 **/
1837static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
1838{
1839 int i;
1840
1841 for (i = 0; i < adapter->num_tx_queues; i++)
1842 ixgbevf_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1843}
1844
1845void ixgbevf_down(struct ixgbevf_adapter *adapter)
1846{
1847 struct net_device *netdev = adapter->netdev;
1848 struct ixgbe_hw *hw = &adapter->hw;
1849 u32 txdctl;
1850 int i, j;
1851
1852 /* signal that we are down to the interrupt handler */
1853 set_bit(__IXGBEVF_DOWN, &adapter->state);
1854 /* disable receives */
1855
1856 netif_tx_disable(netdev);
1857
1858 msleep(10);
1859
1860 netif_tx_stop_all_queues(netdev);
1861
1862 ixgbevf_irq_disable(adapter);
1863
1864 ixgbevf_napi_disable_all(adapter);
1865
1866 del_timer_sync(&adapter->watchdog_timer);
1867 /* can't call flush scheduled work here because it can deadlock
1868 * if linkwatch_event tries to acquire the rtnl_lock which we are
1869 * holding */
1870 while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK)
1871 msleep(1);
1872
1873 /* disable transmits in the hardware now that interrupts are off */
1874 for (i = 0; i < adapter->num_tx_queues; i++) {
1875 j = adapter->tx_ring[i].reg_idx;
1876 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1877 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j),
1878 (txdctl & ~IXGBE_TXDCTL_ENABLE));
1879 }
1880
1881 netif_carrier_off(netdev);
1882
1883 if (!pci_channel_offline(adapter->pdev))
1884 ixgbevf_reset(adapter);
1885
1886 ixgbevf_clean_all_tx_rings(adapter);
1887 ixgbevf_clean_all_rx_rings(adapter);
1888}
1889
1890void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
1891{
c0456c23
GR
1892 struct ixgbe_hw *hw = &adapter->hw;
1893
92915f71 1894 WARN_ON(in_interrupt());
c0456c23 1895
92915f71
GR
1896 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
1897 msleep(1);
1898
c0456c23
GR
1899 /*
1900 * Check if PF is up before re-init. If not then skip until
1901 * later when the PF is up and ready to service requests from
1902 * the VF via mailbox. If the VF is up and running then the
1903 * watchdog task will continue to schedule reset tasks until
1904 * the PF is up and running.
1905 */
1906 if (!hw->mac.ops.reset_hw(hw)) {
1907 ixgbevf_down(adapter);
1908 ixgbevf_up(adapter);
1909 }
92915f71
GR
1910
1911 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
1912}
1913
1914void ixgbevf_reset(struct ixgbevf_adapter *adapter)
1915{
1916 struct ixgbe_hw *hw = &adapter->hw;
1917 struct net_device *netdev = adapter->netdev;
1918
1919 if (hw->mac.ops.reset_hw(hw))
1920 hw_dbg(hw, "PF still resetting\n");
1921 else
1922 hw->mac.ops.init_hw(hw);
1923
1924 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
1925 memcpy(netdev->dev_addr, adapter->hw.mac.addr,
1926 netdev->addr_len);
1927 memcpy(netdev->perm_addr, adapter->hw.mac.addr,
1928 netdev->addr_len);
1929 }
1930}
1931
1932static void ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
1933 int vectors)
1934{
1935 int err, vector_threshold;
1936
1937 /* We'll want at least 3 (vector_threshold):
1938 * 1) TxQ[0] Cleanup
1939 * 2) RxQ[0] Cleanup
1940 * 3) Other (Link Status Change, etc.)
1941 */
1942 vector_threshold = MIN_MSIX_COUNT;
1943
1944 /* The more we get, the more we will assign to Tx/Rx Cleanup
1945 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
1946 * Right now, we simply care about how many we'll get; we'll
1947 * set them up later while requesting irq's.
1948 */
1949 while (vectors >= vector_threshold) {
1950 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1951 vectors);
1952 if (!err) /* Success in acquiring all requested vectors. */
1953 break;
1954 else if (err < 0)
1955 vectors = 0; /* Nasty failure, quit now */
1956 else /* err == number of vectors we should try again with */
1957 vectors = err;
1958 }
1959
1960 if (vectors < vector_threshold) {
1961 /* Can't allocate enough MSI-X interrupts? Oh well.
1962 * This just means we'll go with either a single MSI
1963 * vector or fall back to legacy interrupts.
1964 */
1965 hw_dbg(&adapter->hw,
1966 "Unable to allocate MSI-X interrupts\n");
1967 kfree(adapter->msix_entries);
1968 adapter->msix_entries = NULL;
1969 } else {
1970 /*
1971 * Adjust for only the vectors we'll use, which is minimum
1972 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
1973 * vectors we were allocated.
1974 */
1975 adapter->num_msix_vectors = vectors;
1976 }
1977}
1978
1979/*
1980 * ixgbe_set_num_queues: Allocate queues for device, feature dependant
1981 * @adapter: board private structure to initialize
1982 *
1983 * This is the top level queue allocation routine. The order here is very
1984 * important, starting with the "most" number of features turned on at once,
1985 * and ending with the smallest set of features. This way large combinations
1986 * can be allocated if they're turned on, and smaller combinations are the
1987 * fallthrough conditions.
1988 *
1989 **/
1990static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
1991{
1992 /* Start with base case */
1993 adapter->num_rx_queues = 1;
1994 adapter->num_tx_queues = 1;
1995 adapter->num_rx_pools = adapter->num_rx_queues;
1996 adapter->num_rx_queues_per_pool = 1;
1997}
1998
1999/**
2000 * ixgbevf_alloc_queues - Allocate memory for all rings
2001 * @adapter: board private structure to initialize
2002 *
2003 * We allocate one ring per queue at run-time since we don't know the
2004 * number of queues at compile-time. The polling_netdev array is
2005 * intended for Multiqueue, but should work fine with a single queue.
2006 **/
2007static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
2008{
2009 int i;
2010
2011 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
2012 sizeof(struct ixgbevf_ring), GFP_KERNEL);
2013 if (!adapter->tx_ring)
2014 goto err_tx_ring_allocation;
2015
2016 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
2017 sizeof(struct ixgbevf_ring), GFP_KERNEL);
2018 if (!adapter->rx_ring)
2019 goto err_rx_ring_allocation;
2020
2021 for (i = 0; i < adapter->num_tx_queues; i++) {
2022 adapter->tx_ring[i].count = adapter->tx_ring_count;
2023 adapter->tx_ring[i].queue_index = i;
2024 adapter->tx_ring[i].reg_idx = i;
2025 }
2026
2027 for (i = 0; i < adapter->num_rx_queues; i++) {
2028 adapter->rx_ring[i].count = adapter->rx_ring_count;
2029 adapter->rx_ring[i].queue_index = i;
2030 adapter->rx_ring[i].reg_idx = i;
2031 }
2032
2033 return 0;
2034
2035err_rx_ring_allocation:
2036 kfree(adapter->tx_ring);
2037err_tx_ring_allocation:
2038 return -ENOMEM;
2039}
2040
2041/**
2042 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
2043 * @adapter: board private structure to initialize
2044 *
2045 * Attempt to configure the interrupts using the best available
2046 * capabilities of the hardware and the kernel.
2047 **/
2048static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2049{
2050 int err = 0;
2051 int vector, v_budget;
2052
2053 /*
2054 * It's easy to be greedy for MSI-X vectors, but it really
2055 * doesn't do us much good if we have a lot more vectors
2056 * than CPU's. So let's be conservative and only ask for
2057 * (roughly) twice the number of vectors as there are CPU's.
2058 */
2059 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2060 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2061
2062 /* A failure in MSI-X entry allocation isn't fatal, but it does
2063 * mean we disable MSI-X capabilities of the adapter. */
2064 adapter->msix_entries = kcalloc(v_budget,
2065 sizeof(struct msix_entry), GFP_KERNEL);
2066 if (!adapter->msix_entries) {
2067 err = -ENOMEM;
2068 goto out;
2069 }
2070
2071 for (vector = 0; vector < v_budget; vector++)
2072 adapter->msix_entries[vector].entry = vector;
2073
2074 ixgbevf_acquire_msix_vectors(adapter, v_budget);
2075
2076out:
2077 return err;
2078}
2079
2080/**
2081 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2082 * @adapter: board private structure to initialize
2083 *
2084 * We allocate one q_vector per queue interrupt. If allocation fails we
2085 * return -ENOMEM.
2086 **/
2087static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2088{
2089 int q_idx, num_q_vectors;
2090 struct ixgbevf_q_vector *q_vector;
2091 int napi_vectors;
2092 int (*poll)(struct napi_struct *, int);
2093
2094 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2095 napi_vectors = adapter->num_rx_queues;
2096 poll = &ixgbevf_clean_rxonly;
2097
2098 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2099 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
2100 if (!q_vector)
2101 goto err_out;
2102 q_vector->adapter = adapter;
2103 q_vector->v_idx = q_idx;
2104 q_vector->eitr = adapter->eitr_param;
2105 if (q_idx < napi_vectors)
2106 netif_napi_add(adapter->netdev, &q_vector->napi,
2107 (*poll), 64);
2108 adapter->q_vector[q_idx] = q_vector;
2109 }
2110
2111 return 0;
2112
2113err_out:
2114 while (q_idx) {
2115 q_idx--;
2116 q_vector = adapter->q_vector[q_idx];
2117 netif_napi_del(&q_vector->napi);
2118 kfree(q_vector);
2119 adapter->q_vector[q_idx] = NULL;
2120 }
2121 return -ENOMEM;
2122}
2123
2124/**
2125 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2126 * @adapter: board private structure to initialize
2127 *
2128 * This function frees the memory allocated to the q_vectors. In addition if
2129 * NAPI is enabled it will delete any references to the NAPI struct prior
2130 * to freeing the q_vector.
2131 **/
2132static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2133{
2134 int q_idx, num_q_vectors;
2135 int napi_vectors;
2136
2137 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2138 napi_vectors = adapter->num_rx_queues;
2139
2140 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2141 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
2142
2143 adapter->q_vector[q_idx] = NULL;
2144 if (q_idx < napi_vectors)
2145 netif_napi_del(&q_vector->napi);
2146 kfree(q_vector);
2147 }
2148}
2149
2150/**
2151 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2152 * @adapter: board private structure
2153 *
2154 **/
2155static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2156{
2157 pci_disable_msix(adapter->pdev);
2158 kfree(adapter->msix_entries);
2159 adapter->msix_entries = NULL;
2160
2161 return;
2162}
2163
2164/**
2165 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2166 * @adapter: board private structure to initialize
2167 *
2168 **/
2169static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2170{
2171 int err;
2172
2173 /* Number of supported queues */
2174 ixgbevf_set_num_queues(adapter);
2175
2176 err = ixgbevf_set_interrupt_capability(adapter);
2177 if (err) {
2178 hw_dbg(&adapter->hw,
2179 "Unable to setup interrupt capabilities\n");
2180 goto err_set_interrupt;
2181 }
2182
2183 err = ixgbevf_alloc_q_vectors(adapter);
2184 if (err) {
2185 hw_dbg(&adapter->hw, "Unable to allocate memory for queue "
2186 "vectors\n");
2187 goto err_alloc_q_vectors;
2188 }
2189
2190 err = ixgbevf_alloc_queues(adapter);
2191 if (err) {
2192 printk(KERN_ERR "Unable to allocate memory for queues\n");
2193 goto err_alloc_queues;
2194 }
2195
2196 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, "
2197 "Tx Queue count = %u\n",
2198 (adapter->num_rx_queues > 1) ? "Enabled" :
2199 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2200
2201 set_bit(__IXGBEVF_DOWN, &adapter->state);
2202
2203 return 0;
2204err_alloc_queues:
2205 ixgbevf_free_q_vectors(adapter);
2206err_alloc_q_vectors:
2207 ixgbevf_reset_interrupt_capability(adapter);
2208err_set_interrupt:
2209 return err;
2210}
2211
2212/**
2213 * ixgbevf_sw_init - Initialize general software structures
2214 * (struct ixgbevf_adapter)
2215 * @adapter: board private structure to initialize
2216 *
2217 * ixgbevf_sw_init initializes the Adapter private data structure.
2218 * Fields are initialized based on PCI device information and
2219 * OS network device settings (MTU size).
2220 **/
2221static int __devinit ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
2222{
2223 struct ixgbe_hw *hw = &adapter->hw;
2224 struct pci_dev *pdev = adapter->pdev;
2225 int err;
2226
2227 /* PCI config space info */
2228
2229 hw->vendor_id = pdev->vendor;
2230 hw->device_id = pdev->device;
2231 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
2232 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2233 hw->subsystem_device_id = pdev->subsystem_device;
2234
2235 hw->mbx.ops.init_params(hw);
2236 hw->mac.max_tx_queues = MAX_TX_QUEUES;
2237 hw->mac.max_rx_queues = MAX_RX_QUEUES;
2238 err = hw->mac.ops.reset_hw(hw);
2239 if (err) {
2240 dev_info(&pdev->dev,
2241 "PF still in reset state, assigning new address\n");
2242 random_ether_addr(hw->mac.addr);
2243 } else {
2244 err = hw->mac.ops.init_hw(hw);
2245 if (err) {
2246 printk(KERN_ERR "init_shared_code failed: %d\n", err);
2247 goto out;
2248 }
2249 }
2250
2251 /* Enable dynamic interrupt throttling rates */
2252 adapter->eitr_param = 20000;
2253 adapter->itr_setting = 1;
2254
2255 /* set defaults for eitr in MegaBytes */
2256 adapter->eitr_low = 10;
2257 adapter->eitr_high = 20;
2258
2259 /* set default ring sizes */
2260 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2261 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2262
2263 /* enable rx csum by default */
2264 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2265
2266 set_bit(__IXGBEVF_DOWN, &adapter->state);
2267
2268out:
2269 return err;
2270}
2271
92915f71
GR
2272#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2273 { \
2274 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2275 if (current_counter < last_counter) \
2276 counter += 0x100000000LL; \
2277 last_counter = current_counter; \
2278 counter &= 0xFFFFFFFF00000000LL; \
2279 counter |= current_counter; \
2280 }
2281
2282#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2283 { \
2284 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2285 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
2286 u64 current_counter = (current_counter_msb << 32) | \
2287 current_counter_lsb; \
2288 if (current_counter < last_counter) \
2289 counter += 0x1000000000LL; \
2290 last_counter = current_counter; \
2291 counter &= 0xFFFFFFF000000000LL; \
2292 counter |= current_counter; \
2293 }
2294/**
2295 * ixgbevf_update_stats - Update the board statistics counters.
2296 * @adapter: board private structure
2297 **/
2298void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2299{
2300 struct ixgbe_hw *hw = &adapter->hw;
2301
2302 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2303 adapter->stats.vfgprc);
2304 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2305 adapter->stats.vfgptc);
2306 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2307 adapter->stats.last_vfgorc,
2308 adapter->stats.vfgorc);
2309 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2310 adapter->stats.last_vfgotc,
2311 adapter->stats.vfgotc);
2312 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2313 adapter->stats.vfmprc);
2314
2315 /* Fill out the OS statistics structure */
2316 adapter->net_stats.multicast = adapter->stats.vfmprc -
2317 adapter->stats.base_vfmprc;
2318}
2319
2320/**
2321 * ixgbevf_watchdog - Timer Call-back
2322 * @data: pointer to adapter cast into an unsigned long
2323 **/
2324static void ixgbevf_watchdog(unsigned long data)
2325{
2326 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
2327 struct ixgbe_hw *hw = &adapter->hw;
2328 u64 eics = 0;
2329 int i;
2330
2331 /*
2332 * Do the watchdog outside of interrupt context due to the lovely
2333 * delays that some of the newer hardware requires
2334 */
2335
2336 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
2337 goto watchdog_short_circuit;
2338
2339 /* get one bit for every active tx/rx interrupt vector */
2340 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2341 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
2342 if (qv->rxr_count || qv->txr_count)
2343 eics |= (1 << i);
2344 }
2345
2346 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, (u32)eics);
2347
2348watchdog_short_circuit:
2349 schedule_work(&adapter->watchdog_task);
2350}
2351
2352/**
2353 * ixgbevf_tx_timeout - Respond to a Tx Hang
2354 * @netdev: network interface device structure
2355 **/
2356static void ixgbevf_tx_timeout(struct net_device *netdev)
2357{
2358 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2359
2360 /* Do the reset outside of interrupt context */
2361 schedule_work(&adapter->reset_task);
2362}
2363
2364static void ixgbevf_reset_task(struct work_struct *work)
2365{
2366 struct ixgbevf_adapter *adapter;
2367 adapter = container_of(work, struct ixgbevf_adapter, reset_task);
2368
2369 /* If we're already down or resetting, just bail */
2370 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2371 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2372 return;
2373
2374 adapter->tx_timeout_count++;
2375
2376 ixgbevf_reinit_locked(adapter);
2377}
2378
2379/**
2380 * ixgbevf_watchdog_task - worker thread to bring link up
2381 * @work: pointer to work_struct containing our data
2382 **/
2383static void ixgbevf_watchdog_task(struct work_struct *work)
2384{
2385 struct ixgbevf_adapter *adapter = container_of(work,
2386 struct ixgbevf_adapter,
2387 watchdog_task);
2388 struct net_device *netdev = adapter->netdev;
2389 struct ixgbe_hw *hw = &adapter->hw;
2390 u32 link_speed = adapter->link_speed;
2391 bool link_up = adapter->link_up;
2392
2393 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
2394
2395 /*
2396 * Always check the link on the watchdog because we have
2397 * no LSC interrupt
2398 */
2399 if (hw->mac.ops.check_link) {
2400 if ((hw->mac.ops.check_link(hw, &link_speed,
2401 &link_up, false)) != 0) {
2402 adapter->link_up = link_up;
2403 adapter->link_speed = link_speed;
da6b3330
GR
2404 netif_carrier_off(netdev);
2405 netif_tx_stop_all_queues(netdev);
92915f71
GR
2406 schedule_work(&adapter->reset_task);
2407 goto pf_has_reset;
2408 }
2409 } else {
2410 /* always assume link is up, if no check link
2411 * function */
2412 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
2413 link_up = true;
2414 }
2415 adapter->link_up = link_up;
2416 adapter->link_speed = link_speed;
2417
2418 if (link_up) {
2419 if (!netif_carrier_ok(netdev)) {
2420 hw_dbg(&adapter->hw, "NIC Link is Up %s, ",
2421 ((link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
29b8dd02 2422 "10 Gbps\n" : "1 Gbps\n"));
92915f71
GR
2423 netif_carrier_on(netdev);
2424 netif_tx_wake_all_queues(netdev);
2425 } else {
2426 /* Force detection of hung controller */
2427 adapter->detect_tx_hung = true;
2428 }
2429 } else {
2430 adapter->link_up = false;
2431 adapter->link_speed = 0;
2432 if (netif_carrier_ok(netdev)) {
2433 hw_dbg(&adapter->hw, "NIC Link is Down\n");
2434 netif_carrier_off(netdev);
2435 netif_tx_stop_all_queues(netdev);
2436 }
2437 }
2438
92915f71
GR
2439 ixgbevf_update_stats(adapter);
2440
33bd9f60 2441pf_has_reset:
92915f71
GR
2442 /* Force detection of hung controller every watchdog period */
2443 adapter->detect_tx_hung = true;
2444
2445 /* Reset the timer */
2446 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
2447 mod_timer(&adapter->watchdog_timer,
2448 round_jiffies(jiffies + (2 * HZ)));
2449
2450 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
2451}
2452
2453/**
2454 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
2455 * @adapter: board private structure
2456 * @tx_ring: Tx descriptor ring for a specific queue
2457 *
2458 * Free all transmit software resources
2459 **/
2460void ixgbevf_free_tx_resources(struct ixgbevf_adapter *adapter,
2461 struct ixgbevf_ring *tx_ring)
2462{
2463 struct pci_dev *pdev = adapter->pdev;
2464
92915f71
GR
2465 ixgbevf_clean_tx_ring(adapter, tx_ring);
2466
2467 vfree(tx_ring->tx_buffer_info);
2468 tx_ring->tx_buffer_info = NULL;
2469
2470 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2471
2472 tx_ring->desc = NULL;
2473}
2474
2475/**
2476 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2477 * @adapter: board private structure
2478 *
2479 * Free all transmit software resources
2480 **/
2481static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2482{
2483 int i;
2484
2485 for (i = 0; i < adapter->num_tx_queues; i++)
2486 if (adapter->tx_ring[i].desc)
2487 ixgbevf_free_tx_resources(adapter,
2488 &adapter->tx_ring[i]);
2489
2490}
2491
2492/**
2493 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
2494 * @adapter: board private structure
2495 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2496 *
2497 * Return 0 on success, negative on failure
2498 **/
2499int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *adapter,
2500 struct ixgbevf_ring *tx_ring)
2501{
2502 struct pci_dev *pdev = adapter->pdev;
2503 int size;
2504
2505 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
2506 tx_ring->tx_buffer_info = vmalloc(size);
2507 if (!tx_ring->tx_buffer_info)
2508 goto err;
2509 memset(tx_ring->tx_buffer_info, 0, size);
2510
2511 /* round up to nearest 4K */
2512 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2513 tx_ring->size = ALIGN(tx_ring->size, 4096);
2514
2515 tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
2516 &tx_ring->dma);
2517 if (!tx_ring->desc)
2518 goto err;
2519
2520 tx_ring->next_to_use = 0;
2521 tx_ring->next_to_clean = 0;
2522 tx_ring->work_limit = tx_ring->count;
2523 return 0;
2524
2525err:
2526 vfree(tx_ring->tx_buffer_info);
2527 tx_ring->tx_buffer_info = NULL;
2528 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit "
2529 "descriptor ring\n");
2530 return -ENOMEM;
2531}
2532
2533/**
2534 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
2535 * @adapter: board private structure
2536 *
2537 * If this function returns with an error, then it's possible one or
2538 * more of the rings is populated (while the rest are not). It is the
2539 * callers duty to clean those orphaned rings.
2540 *
2541 * Return 0 on success, negative on failure
2542 **/
2543static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
2544{
2545 int i, err = 0;
2546
2547 for (i = 0; i < adapter->num_tx_queues; i++) {
2548 err = ixgbevf_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2549 if (!err)
2550 continue;
2551 hw_dbg(&adapter->hw,
2552 "Allocation for Tx Queue %u failed\n", i);
2553 break;
2554 }
2555
2556 return err;
2557}
2558
2559/**
2560 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
2561 * @adapter: board private structure
2562 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2563 *
2564 * Returns 0 on success, negative on failure
2565 **/
2566int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
2567 struct ixgbevf_ring *rx_ring)
2568{
2569 struct pci_dev *pdev = adapter->pdev;
2570 int size;
2571
2572 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
2573 rx_ring->rx_buffer_info = vmalloc(size);
2574 if (!rx_ring->rx_buffer_info) {
2575 hw_dbg(&adapter->hw,
2576 "Unable to vmalloc buffer memory for "
2577 "the receive descriptor ring\n");
2578 goto alloc_failed;
2579 }
2580 memset(rx_ring->rx_buffer_info, 0, size);
2581
2582 /* Round up to nearest 4K */
2583 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2584 rx_ring->size = ALIGN(rx_ring->size, 4096);
2585
2586 rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
2587 &rx_ring->dma);
2588
2589 if (!rx_ring->desc) {
2590 hw_dbg(&adapter->hw,
2591 "Unable to allocate memory for "
2592 "the receive descriptor ring\n");
2593 vfree(rx_ring->rx_buffer_info);
2594 rx_ring->rx_buffer_info = NULL;
2595 goto alloc_failed;
2596 }
2597
2598 rx_ring->next_to_clean = 0;
2599 rx_ring->next_to_use = 0;
2600
2601 return 0;
2602alloc_failed:
2603 return -ENOMEM;
2604}
2605
2606/**
2607 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
2608 * @adapter: board private structure
2609 *
2610 * If this function returns with an error, then it's possible one or
2611 * more of the rings is populated (while the rest are not). It is the
2612 * callers duty to clean those orphaned rings.
2613 *
2614 * Return 0 on success, negative on failure
2615 **/
2616static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
2617{
2618 int i, err = 0;
2619
2620 for (i = 0; i < adapter->num_rx_queues; i++) {
2621 err = ixgbevf_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2622 if (!err)
2623 continue;
2624 hw_dbg(&adapter->hw,
2625 "Allocation for Rx Queue %u failed\n", i);
2626 break;
2627 }
2628 return err;
2629}
2630
2631/**
2632 * ixgbevf_free_rx_resources - Free Rx Resources
2633 * @adapter: board private structure
2634 * @rx_ring: ring to clean the resources from
2635 *
2636 * Free all receive software resources
2637 **/
2638void ixgbevf_free_rx_resources(struct ixgbevf_adapter *adapter,
2639 struct ixgbevf_ring *rx_ring)
2640{
2641 struct pci_dev *pdev = adapter->pdev;
2642
2643 ixgbevf_clean_rx_ring(adapter, rx_ring);
2644
2645 vfree(rx_ring->rx_buffer_info);
2646 rx_ring->rx_buffer_info = NULL;
2647
2648 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2649
2650 rx_ring->desc = NULL;
2651}
2652
2653/**
2654 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
2655 * @adapter: board private structure
2656 *
2657 * Free all receive software resources
2658 **/
2659static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
2660{
2661 int i;
2662
2663 for (i = 0; i < adapter->num_rx_queues; i++)
2664 if (adapter->rx_ring[i].desc)
2665 ixgbevf_free_rx_resources(adapter,
2666 &adapter->rx_ring[i]);
2667}
2668
2669/**
2670 * ixgbevf_open - Called when a network interface is made active
2671 * @netdev: network interface device structure
2672 *
2673 * Returns 0 on success, negative value on failure
2674 *
2675 * The open entry point is called when a network interface is made
2676 * active by the system (IFF_UP). At this point all resources needed
2677 * for transmit and receive operations are allocated, the interrupt
2678 * handler is registered with the OS, the watchdog timer is started,
2679 * and the stack is notified that the interface is ready.
2680 **/
2681static int ixgbevf_open(struct net_device *netdev)
2682{
2683 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2684 struct ixgbe_hw *hw = &adapter->hw;
2685 int err;
2686
2687 /* disallow open during test */
2688 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
2689 return -EBUSY;
2690
2691 if (hw->adapter_stopped) {
2692 ixgbevf_reset(adapter);
2693 /* if adapter is still stopped then PF isn't up and
2694 * the vf can't start. */
2695 if (hw->adapter_stopped) {
2696 err = IXGBE_ERR_MBX;
2697 printk(KERN_ERR "Unable to start - perhaps the PF"
29b8dd02 2698 " Driver isn't up yet\n");
92915f71
GR
2699 goto err_setup_reset;
2700 }
2701 }
2702
2703 /* allocate transmit descriptors */
2704 err = ixgbevf_setup_all_tx_resources(adapter);
2705 if (err)
2706 goto err_setup_tx;
2707
2708 /* allocate receive descriptors */
2709 err = ixgbevf_setup_all_rx_resources(adapter);
2710 if (err)
2711 goto err_setup_rx;
2712
2713 ixgbevf_configure(adapter);
2714
2715 /*
2716 * Map the Tx/Rx rings to the vectors we were allotted.
2717 * if request_irq will be called in this function map_rings
2718 * must be called *before* up_complete
2719 */
2720 ixgbevf_map_rings_to_vectors(adapter);
2721
2722 err = ixgbevf_up_complete(adapter);
2723 if (err)
2724 goto err_up;
2725
2726 /* clear any pending interrupts, may auto mask */
2727 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2728 err = ixgbevf_request_irq(adapter);
2729 if (err)
2730 goto err_req_irq;
2731
2732 ixgbevf_irq_enable(adapter, true, true);
2733
2734 return 0;
2735
2736err_req_irq:
2737 ixgbevf_down(adapter);
2738err_up:
2739 ixgbevf_free_irq(adapter);
2740err_setup_rx:
2741 ixgbevf_free_all_rx_resources(adapter);
2742err_setup_tx:
2743 ixgbevf_free_all_tx_resources(adapter);
2744 ixgbevf_reset(adapter);
2745
2746err_setup_reset:
2747
2748 return err;
2749}
2750
2751/**
2752 * ixgbevf_close - Disables a network interface
2753 * @netdev: network interface device structure
2754 *
2755 * Returns 0, this is not allowed to fail
2756 *
2757 * The close entry point is called when an interface is de-activated
2758 * by the OS. The hardware is still under the drivers control, but
2759 * needs to be disabled. A global MAC reset is issued to stop the
2760 * hardware, and all transmit and receive resources are freed.
2761 **/
2762static int ixgbevf_close(struct net_device *netdev)
2763{
2764 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2765
2766 ixgbevf_down(adapter);
2767 ixgbevf_free_irq(adapter);
2768
2769 ixgbevf_free_all_tx_resources(adapter);
2770 ixgbevf_free_all_rx_resources(adapter);
2771
2772 return 0;
2773}
2774
2775static int ixgbevf_tso(struct ixgbevf_adapter *adapter,
2776 struct ixgbevf_ring *tx_ring,
2777 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2778{
2779 struct ixgbe_adv_tx_context_desc *context_desc;
2780 unsigned int i;
2781 int err;
2782 struct ixgbevf_tx_buffer *tx_buffer_info;
2783 u32 vlan_macip_lens = 0, type_tucmd_mlhl;
2784 u32 mss_l4len_idx, l4len;
2785
2786 if (skb_is_gso(skb)) {
2787 if (skb_header_cloned(skb)) {
2788 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2789 if (err)
2790 return err;
2791 }
2792 l4len = tcp_hdrlen(skb);
2793 *hdr_len += l4len;
2794
2795 if (skb->protocol == htons(ETH_P_IP)) {
2796 struct iphdr *iph = ip_hdr(skb);
2797 iph->tot_len = 0;
2798 iph->check = 0;
2799 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2800 iph->daddr, 0,
2801 IPPROTO_TCP,
2802 0);
2803 adapter->hw_tso_ctxt++;
9010bc33 2804 } else if (skb_is_gso_v6(skb)) {
92915f71
GR
2805 ipv6_hdr(skb)->payload_len = 0;
2806 tcp_hdr(skb)->check =
2807 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2808 &ipv6_hdr(skb)->daddr,
2809 0, IPPROTO_TCP, 0);
2810 adapter->hw_tso6_ctxt++;
2811 }
2812
2813 i = tx_ring->next_to_use;
2814
2815 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2816 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2817
2818 /* VLAN MACLEN IPLEN */
2819 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2820 vlan_macip_lens |=
2821 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2822 vlan_macip_lens |= ((skb_network_offset(skb)) <<
2823 IXGBE_ADVTXD_MACLEN_SHIFT);
2824 *hdr_len += skb_network_offset(skb);
2825 vlan_macip_lens |=
2826 (skb_transport_header(skb) - skb_network_header(skb));
2827 *hdr_len +=
2828 (skb_transport_header(skb) - skb_network_header(skb));
2829 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2830 context_desc->seqnum_seed = 0;
2831
2832 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2833 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
2834 IXGBE_ADVTXD_DTYP_CTXT);
2835
2836 if (skb->protocol == htons(ETH_P_IP))
2837 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2838 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2839 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2840
2841 /* MSS L4LEN IDX */
2842 mss_l4len_idx =
2843 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
2844 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
2845 /* use index 1 for TSO */
2846 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
2847 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2848
2849 tx_buffer_info->time_stamp = jiffies;
2850 tx_buffer_info->next_to_watch = i;
2851
2852 i++;
2853 if (i == tx_ring->count)
2854 i = 0;
2855 tx_ring->next_to_use = i;
2856
2857 return true;
2858 }
2859
2860 return false;
2861}
2862
2863static bool ixgbevf_tx_csum(struct ixgbevf_adapter *adapter,
2864 struct ixgbevf_ring *tx_ring,
2865 struct sk_buff *skb, u32 tx_flags)
2866{
2867 struct ixgbe_adv_tx_context_desc *context_desc;
2868 unsigned int i;
2869 struct ixgbevf_tx_buffer *tx_buffer_info;
2870 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2871
2872 if (skb->ip_summed == CHECKSUM_PARTIAL ||
2873 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
2874 i = tx_ring->next_to_use;
2875 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2876 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2877
2878 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2879 vlan_macip_lens |= (tx_flags &
2880 IXGBE_TX_FLAGS_VLAN_MASK);
2881 vlan_macip_lens |= (skb_network_offset(skb) <<
2882 IXGBE_ADVTXD_MACLEN_SHIFT);
2883 if (skb->ip_summed == CHECKSUM_PARTIAL)
2884 vlan_macip_lens |= (skb_transport_header(skb) -
2885 skb_network_header(skb));
2886
2887 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2888 context_desc->seqnum_seed = 0;
2889
2890 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2891 IXGBE_ADVTXD_DTYP_CTXT);
2892
2893 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2894 switch (skb->protocol) {
2895 case __constant_htons(ETH_P_IP):
2896 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2897 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2898 type_tucmd_mlhl |=
2899 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2900 break;
2901 case __constant_htons(ETH_P_IPV6):
2902 /* XXX what about other V6 headers?? */
2903 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2904 type_tucmd_mlhl |=
2905 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2906 break;
2907 default:
2908 if (unlikely(net_ratelimit())) {
2909 printk(KERN_WARNING
2910 "partial checksum but "
2911 "proto=%x!\n",
2912 skb->protocol);
2913 }
2914 break;
2915 }
2916 }
2917
2918 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2919 /* use index zero for tx checksum offload */
2920 context_desc->mss_l4len_idx = 0;
2921
2922 tx_buffer_info->time_stamp = jiffies;
2923 tx_buffer_info->next_to_watch = i;
2924
2925 adapter->hw_csum_tx_good++;
2926 i++;
2927 if (i == tx_ring->count)
2928 i = 0;
2929 tx_ring->next_to_use = i;
2930
2931 return true;
2932 }
2933
2934 return false;
2935}
2936
2937static int ixgbevf_tx_map(struct ixgbevf_adapter *adapter,
2938 struct ixgbevf_ring *tx_ring,
2939 struct sk_buff *skb, u32 tx_flags,
2940 unsigned int first)
2941{
2942 struct pci_dev *pdev = adapter->pdev;
2943 struct ixgbevf_tx_buffer *tx_buffer_info;
2944 unsigned int len;
2945 unsigned int total = skb->len;
65deeed7 2946 unsigned int offset = 0, size, count = 0;
92915f71
GR
2947 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2948 unsigned int f;
65deeed7 2949 int i;
92915f71
GR
2950
2951 i = tx_ring->next_to_use;
2952
2953 len = min(skb_headlen(skb), total);
2954 while (len) {
2955 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2956 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2957
2958 tx_buffer_info->length = size;
2959 tx_buffer_info->mapped_as_page = false;
2960 tx_buffer_info->dma = pci_map_single(adapter->pdev,
2961 skb->data + offset,
2962 size, PCI_DMA_TODEVICE);
2963 if (pci_dma_mapping_error(pdev, tx_buffer_info->dma))
2964 goto dma_error;
2965 tx_buffer_info->time_stamp = jiffies;
2966 tx_buffer_info->next_to_watch = i;
2967
2968 len -= size;
2969 total -= size;
2970 offset += size;
2971 count++;
2972 i++;
2973 if (i == tx_ring->count)
2974 i = 0;
2975 }
2976
2977 for (f = 0; f < nr_frags; f++) {
2978 struct skb_frag_struct *frag;
2979
2980 frag = &skb_shinfo(skb)->frags[f];
2981 len = min((unsigned int)frag->size, total);
2982 offset = frag->page_offset;
2983
2984 while (len) {
2985 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2986 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2987
2988 tx_buffer_info->length = size;
2989 tx_buffer_info->dma = pci_map_page(adapter->pdev,
2990 frag->page,
2991 offset,
2992 size,
2993 PCI_DMA_TODEVICE);
2994 tx_buffer_info->mapped_as_page = true;
2995 if (pci_dma_mapping_error(pdev, tx_buffer_info->dma))
2996 goto dma_error;
2997 tx_buffer_info->time_stamp = jiffies;
2998 tx_buffer_info->next_to_watch = i;
2999
3000 len -= size;
3001 total -= size;
3002 offset += size;
3003 count++;
3004 i++;
3005 if (i == tx_ring->count)
3006 i = 0;
3007 }
3008 if (total == 0)
3009 break;
3010 }
3011
3012 if (i == 0)
3013 i = tx_ring->count - 1;
3014 else
3015 i = i - 1;
3016 tx_ring->tx_buffer_info[i].skb = skb;
3017 tx_ring->tx_buffer_info[first].next_to_watch = i;
3018
3019 return count;
3020
3021dma_error:
3022 dev_err(&pdev->dev, "TX DMA map failed\n");
3023
3024 /* clear timestamp and dma mappings for failed tx_buffer_info map */
3025 tx_buffer_info->dma = 0;
3026 tx_buffer_info->time_stamp = 0;
3027 tx_buffer_info->next_to_watch = 0;
3028 count--;
3029
3030 /* clear timestamp and dma mappings for remaining portion of packet */
3031 while (count >= 0) {
3032 count--;
3033 i--;
3034 if (i < 0)
3035 i += tx_ring->count;
3036 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3037 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
3038 }
3039
3040 return count;
3041}
3042
3043static void ixgbevf_tx_queue(struct ixgbevf_adapter *adapter,
3044 struct ixgbevf_ring *tx_ring, int tx_flags,
3045 int count, u32 paylen, u8 hdr_len)
3046{
3047 union ixgbe_adv_tx_desc *tx_desc = NULL;
3048 struct ixgbevf_tx_buffer *tx_buffer_info;
3049 u32 olinfo_status = 0, cmd_type_len = 0;
3050 unsigned int i;
3051
3052 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3053
3054 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3055
3056 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3057
3058 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3059 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3060
3061 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3062 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3063
3064 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3065 IXGBE_ADVTXD_POPTS_SHIFT;
3066
3067 /* use index 1 context for tso */
3068 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3069 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3070 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3071 IXGBE_ADVTXD_POPTS_SHIFT;
3072
3073 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3074 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3075 IXGBE_ADVTXD_POPTS_SHIFT;
3076
3077 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3078
3079 i = tx_ring->next_to_use;
3080 while (count--) {
3081 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3082 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3083 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3084 tx_desc->read.cmd_type_len =
3085 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3086 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3087 i++;
3088 if (i == tx_ring->count)
3089 i = 0;
3090 }
3091
3092 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3093
3094 /*
3095 * Force memory writes to complete before letting h/w
3096 * know there are new descriptors to fetch. (Only
3097 * applicable for weak-ordered memory model archs,
3098 * such as IA-64).
3099 */
3100 wmb();
3101
3102 tx_ring->next_to_use = i;
3103 writel(i, adapter->hw.hw_addr + tx_ring->tail);
3104}
3105
3106static int __ixgbevf_maybe_stop_tx(struct net_device *netdev,
3107 struct ixgbevf_ring *tx_ring, int size)
3108{
3109 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3110
3111 netif_stop_subqueue(netdev, tx_ring->queue_index);
3112 /* Herbert's original patch had:
3113 * smp_mb__after_netif_stop_queue();
3114 * but since that doesn't exist yet, just open code it. */
3115 smp_mb();
3116
3117 /* We need to check again in a case another CPU has just
3118 * made room available. */
3119 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3120 return -EBUSY;
3121
3122 /* A reprieve! - use start_queue because it doesn't call schedule */
3123 netif_start_subqueue(netdev, tx_ring->queue_index);
3124 ++adapter->restart_queue;
3125 return 0;
3126}
3127
3128static int ixgbevf_maybe_stop_tx(struct net_device *netdev,
3129 struct ixgbevf_ring *tx_ring, int size)
3130{
3131 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3132 return 0;
3133 return __ixgbevf_maybe_stop_tx(netdev, tx_ring, size);
3134}
3135
3136static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3137{
3138 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3139 struct ixgbevf_ring *tx_ring;
3140 unsigned int first;
3141 unsigned int tx_flags = 0;
3142 u8 hdr_len = 0;
3143 int r_idx = 0, tso;
3144 int count = 0;
3145
3146 unsigned int f;
3147
3148 tx_ring = &adapter->tx_ring[r_idx];
3149
3150 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3151 tx_flags |= vlan_tx_tag_get(skb);
3152 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3153 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3154 }
3155
3156 /* four things can cause us to need a context descriptor */
3157 if (skb_is_gso(skb) ||
3158 (skb->ip_summed == CHECKSUM_PARTIAL) ||
3159 (tx_flags & IXGBE_TX_FLAGS_VLAN))
3160 count++;
3161
3162 count += TXD_USE_COUNT(skb_headlen(skb));
3163 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3164 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3165
3166 if (ixgbevf_maybe_stop_tx(netdev, tx_ring, count)) {
3167 adapter->tx_busy++;
3168 return NETDEV_TX_BUSY;
3169 }
3170
3171 first = tx_ring->next_to_use;
3172
3173 if (skb->protocol == htons(ETH_P_IP))
3174 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3175 tso = ixgbevf_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3176 if (tso < 0) {
3177 dev_kfree_skb_any(skb);
3178 return NETDEV_TX_OK;
3179 }
3180
3181 if (tso)
3182 tx_flags |= IXGBE_TX_FLAGS_TSO;
3183 else if (ixgbevf_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3184 (skb->ip_summed == CHECKSUM_PARTIAL))
3185 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3186
3187 ixgbevf_tx_queue(adapter, tx_ring, tx_flags,
3188 ixgbevf_tx_map(adapter, tx_ring, skb, tx_flags, first),
3189 skb->len, hdr_len);
3190
3191 netdev->trans_start = jiffies;
3192
3193 ixgbevf_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3194
3195 return NETDEV_TX_OK;
3196}
3197
3198/**
3199 * ixgbevf_get_stats - Get System Network Statistics
3200 * @netdev: network interface device structure
3201 *
3202 * Returns the address of the device statistics structure.
3203 * The statistics are actually updated from the timer callback.
3204 **/
3205static struct net_device_stats *ixgbevf_get_stats(struct net_device *netdev)
3206{
3207 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3208
3209 /* only return the current stats */
3210 return &adapter->net_stats;
3211}
3212
3213/**
3214 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
3215 * @netdev: network interface device structure
3216 * @p: pointer to an address structure
3217 *
3218 * Returns 0 on success, negative on failure
3219 **/
3220static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3221{
3222 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3223 struct ixgbe_hw *hw = &adapter->hw;
3224 struct sockaddr *addr = p;
3225
3226 if (!is_valid_ether_addr(addr->sa_data))
3227 return -EADDRNOTAVAIL;
3228
3229 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3230 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3231
3232 if (hw->mac.ops.set_rar)
3233 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
3234
3235 return 0;
3236}
3237
3238/**
3239 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
3240 * @netdev: network interface device structure
3241 * @new_mtu: new value for maximum frame size
3242 *
3243 * Returns 0 on success, negative on failure
3244 **/
3245static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3246{
3247 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3248 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3249
3250 /* MTU < 68 is an error and causes problems on some kernels */
3251 if ((new_mtu < 68) || (max_frame > MAXIMUM_ETHERNET_VLAN_SIZE))
3252 return -EINVAL;
3253
3254 hw_dbg(&adapter->hw, "changing MTU from %d to %d\n",
3255 netdev->mtu, new_mtu);
3256 /* must set new MTU before calling down or up */
3257 netdev->mtu = new_mtu;
3258
3259 if (netif_running(netdev))
3260 ixgbevf_reinit_locked(adapter);
3261
3262 return 0;
3263}
3264
3265static void ixgbevf_shutdown(struct pci_dev *pdev)
3266{
3267 struct net_device *netdev = pci_get_drvdata(pdev);
3268 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3269
3270 netif_device_detach(netdev);
3271
3272 if (netif_running(netdev)) {
3273 ixgbevf_down(adapter);
3274 ixgbevf_free_irq(adapter);
3275 ixgbevf_free_all_tx_resources(adapter);
3276 ixgbevf_free_all_rx_resources(adapter);
3277 }
3278
3279#ifdef CONFIG_PM
3280 pci_save_state(pdev);
3281#endif
3282
3283 pci_disable_device(pdev);
3284}
3285
92915f71
GR
3286static const struct net_device_ops ixgbe_netdev_ops = {
3287 .ndo_open = &ixgbevf_open,
3288 .ndo_stop = &ixgbevf_close,
3289 .ndo_start_xmit = &ixgbevf_xmit_frame,
3290 .ndo_get_stats = &ixgbevf_get_stats,
3291 .ndo_set_rx_mode = &ixgbevf_set_rx_mode,
3292 .ndo_set_multicast_list = &ixgbevf_set_rx_mode,
3293 .ndo_validate_addr = eth_validate_addr,
3294 .ndo_set_mac_address = &ixgbevf_set_mac,
3295 .ndo_change_mtu = &ixgbevf_change_mtu,
3296 .ndo_tx_timeout = &ixgbevf_tx_timeout,
3297 .ndo_vlan_rx_register = &ixgbevf_vlan_rx_register,
3298 .ndo_vlan_rx_add_vid = &ixgbevf_vlan_rx_add_vid,
3299 .ndo_vlan_rx_kill_vid = &ixgbevf_vlan_rx_kill_vid,
3300};
92915f71
GR
3301
3302static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3303{
3304 struct ixgbevf_adapter *adapter;
3305 adapter = netdev_priv(dev);
92915f71 3306 dev->netdev_ops = &ixgbe_netdev_ops;
92915f71
GR
3307 ixgbevf_set_ethtool_ops(dev);
3308 dev->watchdog_timeo = 5 * HZ;
3309}
3310
3311/**
3312 * ixgbevf_probe - Device Initialization Routine
3313 * @pdev: PCI device information struct
3314 * @ent: entry in ixgbevf_pci_tbl
3315 *
3316 * Returns 0 on success, negative on failure
3317 *
3318 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3319 * The OS initialization, configuring of the adapter private structure,
3320 * and a hardware reset occur.
3321 **/
3322static int __devinit ixgbevf_probe(struct pci_dev *pdev,
3323 const struct pci_device_id *ent)
3324{
3325 struct net_device *netdev;
3326 struct ixgbevf_adapter *adapter = NULL;
3327 struct ixgbe_hw *hw = NULL;
3328 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
3329 static int cards_found;
3330 int err, pci_using_dac;
3331
3332 err = pci_enable_device(pdev);
3333 if (err)
3334 return err;
3335
3336 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
3337 !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
3338 pci_using_dac = 1;
3339 } else {
3340 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3341 if (err) {
3342 err = pci_set_consistent_dma_mask(pdev,
3343 DMA_BIT_MASK(32));
3344 if (err) {
3345 dev_err(&pdev->dev, "No usable DMA "
3346 "configuration, aborting\n");
3347 goto err_dma;
3348 }
3349 }
3350 pci_using_dac = 0;
3351 }
3352
3353 err = pci_request_regions(pdev, ixgbevf_driver_name);
3354 if (err) {
3355 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3356 goto err_pci_reg;
3357 }
3358
3359 pci_set_master(pdev);
3360
3361#ifdef HAVE_TX_MQ
3362 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3363 MAX_TX_QUEUES);
3364#else
3365 netdev = alloc_etherdev(sizeof(struct ixgbevf_adapter));
3366#endif
3367 if (!netdev) {
3368 err = -ENOMEM;
3369 goto err_alloc_etherdev;
3370 }
3371
3372 SET_NETDEV_DEV(netdev, &pdev->dev);
3373
3374 pci_set_drvdata(pdev, netdev);
3375 adapter = netdev_priv(netdev);
3376
3377 adapter->netdev = netdev;
3378 adapter->pdev = pdev;
3379 hw = &adapter->hw;
3380 hw->back = adapter;
3381 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
3382
3383 /*
3384 * call save state here in standalone driver because it relies on
3385 * adapter struct to exist, and needs to call netdev_priv
3386 */
3387 pci_save_state(pdev);
3388
3389 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3390 pci_resource_len(pdev, 0));
3391 if (!hw->hw_addr) {
3392 err = -EIO;
3393 goto err_ioremap;
3394 }
3395
3396 ixgbevf_assign_netdev_ops(netdev);
3397
3398 adapter->bd_number = cards_found;
3399
3400 /* Setup hw api */
3401 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3402 hw->mac.type = ii->mac;
3403
3404 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
3405 sizeof(struct ixgbe_mac_operations));
3406
3407 adapter->flags &= ~IXGBE_FLAG_RX_PS_CAPABLE;
3408 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
3409 adapter->flags |= IXGBE_FLAG_RX_1BUF_CAPABLE;
3410
3411 /* setup the private structure */
3412 err = ixgbevf_sw_init(adapter);
3413
92915f71
GR
3414#ifdef MAX_SKB_FRAGS
3415 netdev->features = NETIF_F_SG |
3416 NETIF_F_IP_CSUM |
3417 NETIF_F_HW_VLAN_TX |
3418 NETIF_F_HW_VLAN_RX |
3419 NETIF_F_HW_VLAN_FILTER;
3420
3421 netdev->features |= NETIF_F_IPV6_CSUM;
3422 netdev->features |= NETIF_F_TSO;
3423 netdev->features |= NETIF_F_TSO6;
3424 netdev->vlan_features |= NETIF_F_TSO;
3425 netdev->vlan_features |= NETIF_F_TSO6;
3426 netdev->vlan_features |= NETIF_F_IP_CSUM;
3427 netdev->vlan_features |= NETIF_F_SG;
3428
3429 if (pci_using_dac)
3430 netdev->features |= NETIF_F_HIGHDMA;
3431
3432#endif /* MAX_SKB_FRAGS */
3433
3434 /* The HW MAC address was set and/or determined in sw_init */
3435 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
3436 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
3437
3438 if (!is_valid_ether_addr(netdev->dev_addr)) {
3439 printk(KERN_ERR "invalid MAC address\n");
3440 err = -EIO;
3441 goto err_sw_init;
3442 }
3443
3444 init_timer(&adapter->watchdog_timer);
3445 adapter->watchdog_timer.function = &ixgbevf_watchdog;
3446 adapter->watchdog_timer.data = (unsigned long)adapter;
3447
3448 INIT_WORK(&adapter->reset_task, ixgbevf_reset_task);
3449 INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task);
3450
3451 err = ixgbevf_init_interrupt_scheme(adapter);
3452 if (err)
3453 goto err_sw_init;
3454
3455 /* pick up the PCI bus settings for reporting later */
3456 if (hw->mac.ops.get_bus_info)
3457 hw->mac.ops.get_bus_info(hw);
3458
3459
3460 netif_carrier_off(netdev);
3461 netif_tx_stop_all_queues(netdev);
3462
3463 strcpy(netdev->name, "eth%d");
3464
3465 err = register_netdev(netdev);
3466 if (err)
3467 goto err_register;
3468
3469 adapter->netdev_registered = true;
3470
33bd9f60
GR
3471 ixgbevf_init_last_counter_stats(adapter);
3472
92915f71
GR
3473 /* print the MAC address */
3474 hw_dbg(hw, "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n",
3475 netdev->dev_addr[0],
3476 netdev->dev_addr[1],
3477 netdev->dev_addr[2],
3478 netdev->dev_addr[3],
3479 netdev->dev_addr[4],
3480 netdev->dev_addr[5]);
3481
3482 hw_dbg(hw, "MAC: %d\n", hw->mac.type);
3483
3484 hw_dbg(hw, "LRO is disabled \n");
3485
3486 hw_dbg(hw, "Intel(R) 82599 Virtual Function\n");
3487 cards_found++;
3488 return 0;
3489
3490err_register:
3491err_sw_init:
3492 ixgbevf_reset_interrupt_capability(adapter);
3493 iounmap(hw->hw_addr);
3494err_ioremap:
3495 free_netdev(netdev);
3496err_alloc_etherdev:
3497 pci_release_regions(pdev);
3498err_pci_reg:
3499err_dma:
3500 pci_disable_device(pdev);
3501 return err;
3502}
3503
3504/**
3505 * ixgbevf_remove - Device Removal Routine
3506 * @pdev: PCI device information struct
3507 *
3508 * ixgbevf_remove is called by the PCI subsystem to alert the driver
3509 * that it should release a PCI device. The could be caused by a
3510 * Hot-Plug event, or because the driver is going to be removed from
3511 * memory.
3512 **/
3513static void __devexit ixgbevf_remove(struct pci_dev *pdev)
3514{
3515 struct net_device *netdev = pci_get_drvdata(pdev);
3516 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3517
3518 set_bit(__IXGBEVF_DOWN, &adapter->state);
3519
3520 del_timer_sync(&adapter->watchdog_timer);
3521
3522 cancel_work_sync(&adapter->watchdog_task);
3523
3524 flush_scheduled_work();
3525
3526 if (adapter->netdev_registered) {
3527 unregister_netdev(netdev);
3528 adapter->netdev_registered = false;
3529 }
3530
3531 ixgbevf_reset_interrupt_capability(adapter);
3532
3533 iounmap(adapter->hw.hw_addr);
3534 pci_release_regions(pdev);
3535
3536 hw_dbg(&adapter->hw, "Remove complete\n");
3537
3538 kfree(adapter->tx_ring);
3539 kfree(adapter->rx_ring);
3540
3541 free_netdev(netdev);
3542
3543 pci_disable_device(pdev);
3544}
3545
3546static struct pci_driver ixgbevf_driver = {
3547 .name = ixgbevf_driver_name,
3548 .id_table = ixgbevf_pci_tbl,
3549 .probe = ixgbevf_probe,
3550 .remove = __devexit_p(ixgbevf_remove),
3551 .shutdown = ixgbevf_shutdown,
3552};
3553
3554/**
3555 * ixgbe_init_module - Driver Registration Routine
3556 *
3557 * ixgbe_init_module is the first routine called when the driver is
3558 * loaded. All it does is register with the PCI subsystem.
3559 **/
3560static int __init ixgbevf_init_module(void)
3561{
3562 int ret;
3563 printk(KERN_INFO "ixgbevf: %s - version %s\n", ixgbevf_driver_string,
3564 ixgbevf_driver_version);
3565
3566 printk(KERN_INFO "%s\n", ixgbevf_copyright);
3567
3568 ret = pci_register_driver(&ixgbevf_driver);
3569 return ret;
3570}
3571
3572module_init(ixgbevf_init_module);
3573
3574/**
3575 * ixgbe_exit_module - Driver Exit Cleanup Routine
3576 *
3577 * ixgbe_exit_module is called just before the driver is removed
3578 * from memory.
3579 **/
3580static void __exit ixgbevf_exit_module(void)
3581{
3582 pci_unregister_driver(&ixgbevf_driver);
3583}
3584
3585#ifdef DEBUG
3586/**
3587 * ixgbe_get_hw_dev_name - return device name string
3588 * used by hardware layer to print debugging information
3589 **/
3590char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
3591{
3592 struct ixgbevf_adapter *adapter = hw->back;
3593 return adapter->netdev->name;
3594}
3595
3596#endif
3597module_exit(ixgbevf_exit_module);
3598
3599/* ixgbevf_main.c */