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95252236 GFT |
1 | /* |
2 | * JMicron JMC2x0 series PCIe Ethernet Linux Device Driver | |
3 | * | |
4 | * Copyright 2008 JMicron Technology Corporation | |
5 | * http://www.jmicron.com/ | |
e47dfcd8 | 6 | * Copyright (c) 2009 - 2010 Guo-Fu Tseng <cooldavid@cooldavid.org> |
95252236 GFT |
7 | * |
8 | * Author: Guo-Fu Tseng <cooldavid@cooldavid.org> | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
22 | * | |
23 | */ | |
24 | ||
49d70c48 JP |
25 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
26 | ||
95252236 GFT |
27 | #include <linux/module.h> |
28 | #include <linux/kernel.h> | |
29 | #include <linux/pci.h> | |
30 | #include <linux/netdevice.h> | |
31 | #include <linux/etherdevice.h> | |
32 | #include <linux/ethtool.h> | |
33 | #include <linux/mii.h> | |
34 | #include <linux/crc32.h> | |
35 | #include <linux/delay.h> | |
36 | #include <linux/spinlock.h> | |
37 | #include <linux/in.h> | |
38 | #include <linux/ip.h> | |
39 | #include <linux/ipv6.h> | |
40 | #include <linux/tcp.h> | |
41 | #include <linux/udp.h> | |
42 | #include <linux/if_vlan.h> | |
5a0e3ad6 | 43 | #include <linux/slab.h> |
b7c6bfb7 | 44 | #include <net/ip6_checksum.h> |
95252236 GFT |
45 | #include "jme.h" |
46 | ||
47 | static int force_pseudohp = -1; | |
48 | static int no_pseudohp = -1; | |
49 | static int no_extplug = -1; | |
50 | module_param(force_pseudohp, int, 0); | |
51 | MODULE_PARM_DESC(force_pseudohp, | |
52 | "Enable pseudo hot-plug feature manually by driver instead of BIOS."); | |
53 | module_param(no_pseudohp, int, 0); | |
54 | MODULE_PARM_DESC(no_pseudohp, "Disable pseudo hot-plug feature."); | |
55 | module_param(no_extplug, int, 0); | |
56 | MODULE_PARM_DESC(no_extplug, | |
57 | "Do not use external plug signal for pseudo hot-plug."); | |
58 | ||
59 | static int | |
60 | jme_mdio_read(struct net_device *netdev, int phy, int reg) | |
61 | { | |
62 | struct jme_adapter *jme = netdev_priv(netdev); | |
63 | int i, val, again = (reg == MII_BMSR) ? 1 : 0; | |
64 | ||
65 | read_again: | |
66 | jwrite32(jme, JME_SMI, SMI_OP_REQ | | |
67 | smi_phy_addr(phy) | | |
68 | smi_reg_addr(reg)); | |
69 | ||
70 | wmb(); | |
71 | for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { | |
72 | udelay(20); | |
73 | val = jread32(jme, JME_SMI); | |
74 | if ((val & SMI_OP_REQ) == 0) | |
75 | break; | |
76 | } | |
77 | ||
78 | if (i == 0) { | |
49d70c48 | 79 | pr_err("phy(%d) read timeout : %d\n", phy, reg); |
95252236 GFT |
80 | return 0; |
81 | } | |
82 | ||
83 | if (again--) | |
84 | goto read_again; | |
85 | ||
86 | return (val & SMI_DATA_MASK) >> SMI_DATA_SHIFT; | |
87 | } | |
88 | ||
89 | static void | |
90 | jme_mdio_write(struct net_device *netdev, | |
91 | int phy, int reg, int val) | |
92 | { | |
93 | struct jme_adapter *jme = netdev_priv(netdev); | |
94 | int i; | |
95 | ||
96 | jwrite32(jme, JME_SMI, SMI_OP_WRITE | SMI_OP_REQ | | |
97 | ((val << SMI_DATA_SHIFT) & SMI_DATA_MASK) | | |
98 | smi_phy_addr(phy) | smi_reg_addr(reg)); | |
99 | ||
100 | wmb(); | |
101 | for (i = JME_PHY_TIMEOUT * 50 ; i > 0 ; --i) { | |
102 | udelay(20); | |
103 | if ((jread32(jme, JME_SMI) & SMI_OP_REQ) == 0) | |
104 | break; | |
105 | } | |
106 | ||
107 | if (i == 0) | |
49d70c48 | 108 | pr_err("phy(%d) write timeout : %d\n", phy, reg); |
95252236 GFT |
109 | } |
110 | ||
111 | static inline void | |
112 | jme_reset_phy_processor(struct jme_adapter *jme) | |
113 | { | |
114 | u32 val; | |
115 | ||
116 | jme_mdio_write(jme->dev, | |
117 | jme->mii_if.phy_id, | |
118 | MII_ADVERTISE, ADVERTISE_ALL | | |
119 | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
120 | ||
121 | if (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) | |
122 | jme_mdio_write(jme->dev, | |
123 | jme->mii_if.phy_id, | |
124 | MII_CTRL1000, | |
125 | ADVERTISE_1000FULL | ADVERTISE_1000HALF); | |
126 | ||
127 | val = jme_mdio_read(jme->dev, | |
128 | jme->mii_if.phy_id, | |
129 | MII_BMCR); | |
130 | ||
131 | jme_mdio_write(jme->dev, | |
132 | jme->mii_if.phy_id, | |
133 | MII_BMCR, val | BMCR_RESET); | |
95252236 GFT |
134 | } |
135 | ||
136 | static void | |
137 | jme_setup_wakeup_frame(struct jme_adapter *jme, | |
b6bc7650 | 138 | const u32 *mask, u32 crc, int fnr) |
95252236 GFT |
139 | { |
140 | int i; | |
141 | ||
142 | /* | |
143 | * Setup CRC pattern | |
144 | */ | |
145 | jwrite32(jme, JME_WFOI, WFOI_CRC_SEL | (fnr & WFOI_FRAME_SEL)); | |
146 | wmb(); | |
147 | jwrite32(jme, JME_WFODP, crc); | |
148 | wmb(); | |
149 | ||
150 | /* | |
151 | * Setup Mask | |
152 | */ | |
153 | for (i = 0 ; i < WAKEUP_FRAME_MASK_DWNR ; ++i) { | |
154 | jwrite32(jme, JME_WFOI, | |
155 | ((i << WFOI_MASK_SHIFT) & WFOI_MASK_SEL) | | |
156 | (fnr & WFOI_FRAME_SEL)); | |
157 | wmb(); | |
158 | jwrite32(jme, JME_WFODP, mask[i]); | |
159 | wmb(); | |
160 | } | |
161 | } | |
162 | ||
854a2e7c GFT |
163 | static inline void |
164 | jme_mac_rxclk_off(struct jme_adapter *jme) | |
165 | { | |
166 | jme->reg_gpreg1 |= GPREG1_RXCLKOFF; | |
167 | jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1); | |
168 | } | |
169 | ||
170 | static inline void | |
171 | jme_mac_rxclk_on(struct jme_adapter *jme) | |
172 | { | |
173 | jme->reg_gpreg1 &= ~GPREG1_RXCLKOFF; | |
174 | jwrite32f(jme, JME_GPREG1, jme->reg_gpreg1); | |
175 | } | |
176 | ||
177 | static inline void | |
178 | jme_mac_txclk_off(struct jme_adapter *jme) | |
179 | { | |
180 | jme->reg_ghc &= ~(GHC_TO_CLK_SRC | GHC_TXMAC_CLK_SRC); | |
181 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
182 | } | |
183 | ||
184 | static inline void | |
185 | jme_mac_txclk_on(struct jme_adapter *jme) | |
186 | { | |
187 | u32 speed = jme->reg_ghc & GHC_SPEED; | |
188 | if (speed == GHC_SPEED_1000M) | |
189 | jme->reg_ghc |= GHC_TO_CLK_GPHY | GHC_TXMAC_CLK_GPHY; | |
190 | else | |
191 | jme->reg_ghc |= GHC_TO_CLK_PCIE | GHC_TXMAC_CLK_PCIE; | |
192 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
193 | } | |
194 | ||
195 | static inline void | |
196 | jme_reset_ghc_speed(struct jme_adapter *jme) | |
197 | { | |
198 | jme->reg_ghc &= ~(GHC_SPEED | GHC_DPX); | |
199 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
200 | } | |
201 | ||
202 | static inline void | |
203 | jme_reset_250A2_workaround(struct jme_adapter *jme) | |
204 | { | |
205 | jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH | | |
206 | GPREG1_RSSPATCH); | |
207 | jwrite32(jme, JME_GPREG1, jme->reg_gpreg1); | |
208 | } | |
209 | ||
210 | static inline void | |
211 | jme_assert_ghc_reset(struct jme_adapter *jme) | |
212 | { | |
213 | jme->reg_ghc |= GHC_SWRST; | |
214 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
215 | } | |
216 | ||
217 | static inline void | |
218 | jme_clear_ghc_reset(struct jme_adapter *jme) | |
219 | { | |
220 | jme->reg_ghc &= ~GHC_SWRST; | |
221 | jwrite32f(jme, JME_GHC, jme->reg_ghc); | |
222 | } | |
223 | ||
95252236 GFT |
224 | static inline void |
225 | jme_reset_mac_processor(struct jme_adapter *jme) | |
226 | { | |
b6bc7650 | 227 | static const u32 mask[WAKEUP_FRAME_MASK_DWNR] = {0, 0, 0, 0}; |
95252236 GFT |
228 | u32 crc = 0xCDCDCDCD; |
229 | u32 gpreg0; | |
230 | int i; | |
231 | ||
854a2e7c GFT |
232 | jme_reset_ghc_speed(jme); |
233 | jme_reset_250A2_workaround(jme); | |
234 | ||
235 | jme_mac_rxclk_on(jme); | |
236 | jme_mac_txclk_on(jme); | |
237 | udelay(1); | |
238 | jme_assert_ghc_reset(jme); | |
239 | udelay(1); | |
240 | jme_mac_rxclk_off(jme); | |
241 | jme_mac_txclk_off(jme); | |
242 | udelay(1); | |
243 | jme_clear_ghc_reset(jme); | |
244 | udelay(1); | |
245 | jme_mac_rxclk_on(jme); | |
246 | jme_mac_txclk_on(jme); | |
247 | udelay(1); | |
248 | jme_mac_rxclk_off(jme); | |
249 | jme_mac_txclk_off(jme); | |
95252236 GFT |
250 | |
251 | jwrite32(jme, JME_RXDBA_LO, 0x00000000); | |
252 | jwrite32(jme, JME_RXDBA_HI, 0x00000000); | |
253 | jwrite32(jme, JME_RXQDC, 0x00000000); | |
254 | jwrite32(jme, JME_RXNDA, 0x00000000); | |
255 | jwrite32(jme, JME_TXDBA_LO, 0x00000000); | |
256 | jwrite32(jme, JME_TXDBA_HI, 0x00000000); | |
257 | jwrite32(jme, JME_TXQDC, 0x00000000); | |
258 | jwrite32(jme, JME_TXNDA, 0x00000000); | |
259 | ||
260 | jwrite32(jme, JME_RXMCHT_LO, 0x00000000); | |
261 | jwrite32(jme, JME_RXMCHT_HI, 0x00000000); | |
262 | for (i = 0 ; i < WAKEUP_FRAME_NR ; ++i) | |
263 | jme_setup_wakeup_frame(jme, mask, crc, i); | |
264 | if (jme->fpgaver) | |
265 | gpreg0 = GPREG0_DEFAULT | GPREG0_LNKINTPOLL; | |
266 | else | |
267 | gpreg0 = GPREG0_DEFAULT; | |
268 | jwrite32(jme, JME_GPREG0, gpreg0); | |
95252236 GFT |
269 | } |
270 | ||
271 | static inline void | |
272 | jme_clear_pm(struct jme_adapter *jme) | |
273 | { | |
274 | jwrite32(jme, JME_PMCS, 0xFFFF0000 | jme->reg_pmcs); | |
275 | pci_set_power_state(jme->pdev, PCI_D0); | |
276 | pci_enable_wake(jme->pdev, PCI_D0, false); | |
277 | } | |
278 | ||
279 | static int | |
280 | jme_reload_eeprom(struct jme_adapter *jme) | |
281 | { | |
282 | u32 val; | |
283 | int i; | |
284 | ||
285 | val = jread32(jme, JME_SMBCSR); | |
286 | ||
287 | if (val & SMBCSR_EEPROMD) { | |
288 | val |= SMBCSR_CNACK; | |
289 | jwrite32(jme, JME_SMBCSR, val); | |
290 | val |= SMBCSR_RELOAD; | |
291 | jwrite32(jme, JME_SMBCSR, val); | |
292 | mdelay(12); | |
293 | ||
294 | for (i = JME_EEPROM_RELOAD_TIMEOUT; i > 0; --i) { | |
295 | mdelay(1); | |
296 | if ((jread32(jme, JME_SMBCSR) & SMBCSR_RELOAD) == 0) | |
297 | break; | |
298 | } | |
299 | ||
300 | if (i == 0) { | |
49d70c48 | 301 | pr_err("eeprom reload timeout\n"); |
95252236 GFT |
302 | return -EIO; |
303 | } | |
304 | } | |
305 | ||
306 | return 0; | |
307 | } | |
308 | ||
309 | static void | |
310 | jme_load_macaddr(struct net_device *netdev) | |
311 | { | |
312 | struct jme_adapter *jme = netdev_priv(netdev); | |
313 | unsigned char macaddr[6]; | |
314 | u32 val; | |
315 | ||
316 | spin_lock_bh(&jme->macaddr_lock); | |
317 | val = jread32(jme, JME_RXUMA_LO); | |
318 | macaddr[0] = (val >> 0) & 0xFF; | |
319 | macaddr[1] = (val >> 8) & 0xFF; | |
320 | macaddr[2] = (val >> 16) & 0xFF; | |
321 | macaddr[3] = (val >> 24) & 0xFF; | |
322 | val = jread32(jme, JME_RXUMA_HI); | |
323 | macaddr[4] = (val >> 0) & 0xFF; | |
324 | macaddr[5] = (val >> 8) & 0xFF; | |
325 | memcpy(netdev->dev_addr, macaddr, 6); | |
326 | spin_unlock_bh(&jme->macaddr_lock); | |
327 | } | |
328 | ||
329 | static inline void | |
330 | jme_set_rx_pcc(struct jme_adapter *jme, int p) | |
331 | { | |
332 | switch (p) { | |
333 | case PCC_OFF: | |
334 | jwrite32(jme, JME_PCCRX0, | |
335 | ((PCC_OFF_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
336 | ((PCC_OFF_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
337 | break; | |
338 | case PCC_P1: | |
339 | jwrite32(jme, JME_PCCRX0, | |
340 | ((PCC_P1_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
341 | ((PCC_P1_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
342 | break; | |
343 | case PCC_P2: | |
344 | jwrite32(jme, JME_PCCRX0, | |
345 | ((PCC_P2_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
346 | ((PCC_P2_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
347 | break; | |
348 | case PCC_P3: | |
349 | jwrite32(jme, JME_PCCRX0, | |
350 | ((PCC_P3_TO << PCCRXTO_SHIFT) & PCCRXTO_MASK) | | |
351 | ((PCC_P3_CNT << PCCRX_SHIFT) & PCCRX_MASK)); | |
352 | break; | |
353 | default: | |
354 | break; | |
355 | } | |
356 | wmb(); | |
357 | ||
358 | if (!(test_bit(JME_FLAG_POLL, &jme->flags))) | |
f8502ce4 | 359 | netif_info(jme, rx_status, jme->dev, "Switched to PCC_P%d\n", p); |
95252236 GFT |
360 | } |
361 | ||
362 | static void | |
363 | jme_start_irq(struct jme_adapter *jme) | |
364 | { | |
365 | register struct dynpcc_info *dpi = &(jme->dpi); | |
366 | ||
367 | jme_set_rx_pcc(jme, PCC_P1); | |
368 | dpi->cur = PCC_P1; | |
369 | dpi->attempt = PCC_P1; | |
370 | dpi->cnt = 0; | |
371 | ||
372 | jwrite32(jme, JME_PCCTX, | |
373 | ((PCC_TX_TO << PCCTXTO_SHIFT) & PCCTXTO_MASK) | | |
374 | ((PCC_TX_CNT << PCCTX_SHIFT) & PCCTX_MASK) | | |
375 | PCCTXQ0_EN | |
376 | ); | |
377 | ||
378 | /* | |
379 | * Enable Interrupts | |
380 | */ | |
381 | jwrite32(jme, JME_IENS, INTR_ENABLE); | |
382 | } | |
383 | ||
384 | static inline void | |
385 | jme_stop_irq(struct jme_adapter *jme) | |
386 | { | |
387 | /* | |
388 | * Disable Interrupts | |
389 | */ | |
390 | jwrite32f(jme, JME_IENC, INTR_ENABLE); | |
391 | } | |
392 | ||
95252236 GFT |
393 | static u32 |
394 | jme_linkstat_from_phy(struct jme_adapter *jme) | |
395 | { | |
396 | u32 phylink, bmsr; | |
397 | ||
398 | phylink = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 17); | |
399 | bmsr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMSR); | |
400 | if (bmsr & BMSR_ANCOMP) | |
401 | phylink |= PHY_LINK_AUTONEG_COMPLETE; | |
402 | ||
403 | return phylink; | |
404 | } | |
405 | ||
406 | static inline void | |
51754572 | 407 | jme_set_phyfifo_5level(struct jme_adapter *jme) |
95252236 GFT |
408 | { |
409 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0004); | |
410 | } | |
411 | ||
412 | static inline void | |
51754572 | 413 | jme_set_phyfifo_8level(struct jme_adapter *jme) |
95252236 GFT |
414 | { |
415 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 27, 0x0000); | |
416 | } | |
417 | ||
418 | static int | |
419 | jme_check_link(struct net_device *netdev, int testonly) | |
420 | { | |
421 | struct jme_adapter *jme = netdev_priv(netdev); | |
854a2e7c | 422 | u32 phylink, cnt = JME_SPDRSV_TIMEOUT, bmcr; |
95252236 GFT |
423 | char linkmsg[64]; |
424 | int rc = 0; | |
425 | ||
426 | linkmsg[0] = '\0'; | |
427 | ||
428 | if (jme->fpgaver) | |
429 | phylink = jme_linkstat_from_phy(jme); | |
430 | else | |
431 | phylink = jread32(jme, JME_PHY_LINK); | |
432 | ||
433 | if (phylink & PHY_LINK_UP) { | |
434 | if (!(phylink & PHY_LINK_AUTONEG_COMPLETE)) { | |
435 | /* | |
436 | * If we did not enable AN | |
437 | * Speed/Duplex Info should be obtained from SMI | |
438 | */ | |
439 | phylink = PHY_LINK_UP; | |
440 | ||
441 | bmcr = jme_mdio_read(jme->dev, | |
442 | jme->mii_if.phy_id, | |
443 | MII_BMCR); | |
444 | ||
445 | phylink |= ((bmcr & BMCR_SPEED1000) && | |
446 | (bmcr & BMCR_SPEED100) == 0) ? | |
447 | PHY_LINK_SPEED_1000M : | |
448 | (bmcr & BMCR_SPEED100) ? | |
449 | PHY_LINK_SPEED_100M : | |
450 | PHY_LINK_SPEED_10M; | |
451 | ||
452 | phylink |= (bmcr & BMCR_FULLDPLX) ? | |
453 | PHY_LINK_DUPLEX : 0; | |
454 | ||
455 | strcat(linkmsg, "Forced: "); | |
456 | } else { | |
457 | /* | |
458 | * Keep polling for speed/duplex resolve complete | |
459 | */ | |
460 | while (!(phylink & PHY_LINK_SPEEDDPU_RESOLVED) && | |
461 | --cnt) { | |
462 | ||
463 | udelay(1); | |
464 | ||
465 | if (jme->fpgaver) | |
466 | phylink = jme_linkstat_from_phy(jme); | |
467 | else | |
468 | phylink = jread32(jme, JME_PHY_LINK); | |
469 | } | |
470 | if (!cnt) | |
49d70c48 | 471 | pr_err("Waiting speed resolve timeout\n"); |
95252236 GFT |
472 | |
473 | strcat(linkmsg, "ANed: "); | |
474 | } | |
475 | ||
476 | if (jme->phylink == phylink) { | |
477 | rc = 1; | |
478 | goto out; | |
479 | } | |
480 | if (testonly) | |
481 | goto out; | |
482 | ||
483 | jme->phylink = phylink; | |
484 | ||
854a2e7c GFT |
485 | /* |
486 | * The speed/duplex setting of jme->reg_ghc already cleared | |
487 | * by jme_reset_mac_processor() | |
488 | */ | |
95252236 GFT |
489 | switch (phylink & PHY_LINK_SPEED_MASK) { |
490 | case PHY_LINK_SPEED_10M: | |
854a2e7c | 491 | jme->reg_ghc |= GHC_SPEED_10M; |
95252236 | 492 | strcat(linkmsg, "10 Mbps, "); |
95252236 GFT |
493 | break; |
494 | case PHY_LINK_SPEED_100M: | |
854a2e7c | 495 | jme->reg_ghc |= GHC_SPEED_100M; |
95252236 | 496 | strcat(linkmsg, "100 Mbps, "); |
95252236 GFT |
497 | break; |
498 | case PHY_LINK_SPEED_1000M: | |
854a2e7c | 499 | jme->reg_ghc |= GHC_SPEED_1000M; |
95252236 | 500 | strcat(linkmsg, "1000 Mbps, "); |
95252236 GFT |
501 | break; |
502 | default: | |
503 | break; | |
504 | } | |
95252236 GFT |
505 | |
506 | if (phylink & PHY_LINK_DUPLEX) { | |
507 | jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT); | |
3903c023 | 508 | jwrite32(jme, JME_TXTRHD, TXTRHD_FULLDUPLEX); |
854a2e7c | 509 | jme->reg_ghc |= GHC_DPX; |
95252236 GFT |
510 | } else { |
511 | jwrite32(jme, JME_TXMCS, TXMCS_DEFAULT | | |
512 | TXMCS_BACKOFF | | |
513 | TXMCS_CARRIERSENSE | | |
514 | TXMCS_COLLISION); | |
3903c023 | 515 | jwrite32(jme, JME_TXTRHD, TXTRHD_HALFDUPLEX); |
95252236 | 516 | } |
a821ebe5 | 517 | |
854a2e7c GFT |
518 | jwrite32(jme, JME_GHC, jme->reg_ghc); |
519 | ||
a821ebe5 | 520 | if (is_buggy250(jme->pdev->device, jme->chiprev)) { |
854a2e7c GFT |
521 | jme->reg_gpreg1 &= ~(GPREG1_HALFMODEPATCH | |
522 | GPREG1_RSSPATCH); | |
a821ebe5 | 523 | if (!(phylink & PHY_LINK_DUPLEX)) |
854a2e7c | 524 | jme->reg_gpreg1 |= GPREG1_HALFMODEPATCH; |
a821ebe5 GFT |
525 | switch (phylink & PHY_LINK_SPEED_MASK) { |
526 | case PHY_LINK_SPEED_10M: | |
51754572 | 527 | jme_set_phyfifo_8level(jme); |
854a2e7c | 528 | jme->reg_gpreg1 |= GPREG1_RSSPATCH; |
a821ebe5 GFT |
529 | break; |
530 | case PHY_LINK_SPEED_100M: | |
51754572 | 531 | jme_set_phyfifo_5level(jme); |
854a2e7c | 532 | jme->reg_gpreg1 |= GPREG1_RSSPATCH; |
a821ebe5 GFT |
533 | break; |
534 | case PHY_LINK_SPEED_1000M: | |
51754572 | 535 | jme_set_phyfifo_8level(jme); |
a821ebe5 GFT |
536 | break; |
537 | default: | |
538 | break; | |
539 | } | |
540 | } | |
854a2e7c | 541 | jwrite32(jme, JME_GPREG1, jme->reg_gpreg1); |
95252236 | 542 | |
4f40bf46 | 543 | strcat(linkmsg, (phylink & PHY_LINK_DUPLEX) ? |
544 | "Full-Duplex, " : | |
545 | "Half-Duplex, "); | |
546 | strcat(linkmsg, (phylink & PHY_LINK_MDI_STAT) ? | |
547 | "MDI-X" : | |
548 | "MDI"); | |
49d70c48 | 549 | netif_info(jme, link, jme->dev, "Link is up at %s\n", linkmsg); |
95252236 GFT |
550 | netif_carrier_on(netdev); |
551 | } else { | |
552 | if (testonly) | |
553 | goto out; | |
554 | ||
49d70c48 | 555 | netif_info(jme, link, jme->dev, "Link is down\n"); |
95252236 GFT |
556 | jme->phylink = 0; |
557 | netif_carrier_off(netdev); | |
558 | } | |
559 | ||
560 | out: | |
561 | return rc; | |
562 | } | |
563 | ||
564 | static int | |
565 | jme_setup_tx_resources(struct jme_adapter *jme) | |
566 | { | |
567 | struct jme_ring *txring = &(jme->txring[0]); | |
568 | ||
569 | txring->alloc = dma_alloc_coherent(&(jme->pdev->dev), | |
570 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), | |
571 | &(txring->dmaalloc), | |
572 | GFP_ATOMIC); | |
573 | ||
47bd10d1 GFT |
574 | if (!txring->alloc) |
575 | goto err_set_null; | |
95252236 GFT |
576 | |
577 | /* | |
578 | * 16 Bytes align | |
579 | */ | |
580 | txring->desc = (void *)ALIGN((unsigned long)(txring->alloc), | |
581 | RING_DESC_ALIGN); | |
582 | txring->dma = ALIGN(txring->dmaalloc, RING_DESC_ALIGN); | |
583 | txring->next_to_use = 0; | |
584 | atomic_set(&txring->next_to_clean, 0); | |
585 | atomic_set(&txring->nr_free, jme->tx_ring_size); | |
586 | ||
47bd10d1 GFT |
587 | txring->bufinf = kmalloc(sizeof(struct jme_buffer_info) * |
588 | jme->tx_ring_size, GFP_ATOMIC); | |
589 | if (unlikely(!(txring->bufinf))) | |
590 | goto err_free_txring; | |
591 | ||
95252236 GFT |
592 | /* |
593 | * Initialize Transmit Descriptors | |
594 | */ | |
595 | memset(txring->alloc, 0, TX_RING_ALLOC_SIZE(jme->tx_ring_size)); | |
596 | memset(txring->bufinf, 0, | |
597 | sizeof(struct jme_buffer_info) * jme->tx_ring_size); | |
598 | ||
599 | return 0; | |
47bd10d1 GFT |
600 | |
601 | err_free_txring: | |
602 | dma_free_coherent(&(jme->pdev->dev), | |
603 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), | |
604 | txring->alloc, | |
605 | txring->dmaalloc); | |
606 | ||
607 | err_set_null: | |
608 | txring->desc = NULL; | |
609 | txring->dmaalloc = 0; | |
610 | txring->dma = 0; | |
611 | txring->bufinf = NULL; | |
612 | ||
613 | return -ENOMEM; | |
95252236 GFT |
614 | } |
615 | ||
616 | static void | |
617 | jme_free_tx_resources(struct jme_adapter *jme) | |
618 | { | |
619 | int i; | |
620 | struct jme_ring *txring = &(jme->txring[0]); | |
eacf69a1 | 621 | struct jme_buffer_info *txbi; |
95252236 GFT |
622 | |
623 | if (txring->alloc) { | |
47bd10d1 GFT |
624 | if (txring->bufinf) { |
625 | for (i = 0 ; i < jme->tx_ring_size ; ++i) { | |
626 | txbi = txring->bufinf + i; | |
627 | if (txbi->skb) { | |
628 | dev_kfree_skb(txbi->skb); | |
629 | txbi->skb = NULL; | |
630 | } | |
631 | txbi->mapping = 0; | |
632 | txbi->len = 0; | |
633 | txbi->nr_desc = 0; | |
634 | txbi->start_xmit = 0; | |
95252236 | 635 | } |
47bd10d1 | 636 | kfree(txring->bufinf); |
95252236 GFT |
637 | } |
638 | ||
639 | dma_free_coherent(&(jme->pdev->dev), | |
640 | TX_RING_ALLOC_SIZE(jme->tx_ring_size), | |
641 | txring->alloc, | |
642 | txring->dmaalloc); | |
643 | ||
644 | txring->alloc = NULL; | |
645 | txring->desc = NULL; | |
646 | txring->dmaalloc = 0; | |
647 | txring->dma = 0; | |
47bd10d1 | 648 | txring->bufinf = NULL; |
95252236 GFT |
649 | } |
650 | txring->next_to_use = 0; | |
651 | atomic_set(&txring->next_to_clean, 0); | |
652 | atomic_set(&txring->nr_free, 0); | |
95252236 GFT |
653 | } |
654 | ||
655 | static inline void | |
656 | jme_enable_tx_engine(struct jme_adapter *jme) | |
657 | { | |
658 | /* | |
659 | * Select Queue 0 | |
660 | */ | |
661 | jwrite32(jme, JME_TXCS, TXCS_DEFAULT | TXCS_SELECT_QUEUE0); | |
662 | wmb(); | |
663 | ||
664 | /* | |
665 | * Setup TX Queue 0 DMA Bass Address | |
666 | */ | |
667 | jwrite32(jme, JME_TXDBA_LO, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL); | |
668 | jwrite32(jme, JME_TXDBA_HI, (__u64)(jme->txring[0].dma) >> 32); | |
669 | jwrite32(jme, JME_TXNDA, (__u64)jme->txring[0].dma & 0xFFFFFFFFUL); | |
670 | ||
671 | /* | |
672 | * Setup TX Descptor Count | |
673 | */ | |
674 | jwrite32(jme, JME_TXQDC, jme->tx_ring_size); | |
675 | ||
676 | /* | |
677 | * Enable TX Engine | |
678 | */ | |
679 | wmb(); | |
854a2e7c | 680 | jwrite32f(jme, JME_TXCS, jme->reg_txcs | |
95252236 GFT |
681 | TXCS_SELECT_QUEUE0 | |
682 | TXCS_ENABLE); | |
683 | ||
854a2e7c GFT |
684 | /* |
685 | * Start clock for TX MAC Processor | |
686 | */ | |
687 | jme_mac_txclk_on(jme); | |
95252236 GFT |
688 | } |
689 | ||
690 | static inline void | |
691 | jme_restart_tx_engine(struct jme_adapter *jme) | |
692 | { | |
693 | /* | |
694 | * Restart TX Engine | |
695 | */ | |
696 | jwrite32(jme, JME_TXCS, jme->reg_txcs | | |
697 | TXCS_SELECT_QUEUE0 | | |
698 | TXCS_ENABLE); | |
699 | } | |
700 | ||
701 | static inline void | |
702 | jme_disable_tx_engine(struct jme_adapter *jme) | |
703 | { | |
704 | int i; | |
705 | u32 val; | |
706 | ||
707 | /* | |
708 | * Disable TX Engine | |
709 | */ | |
710 | jwrite32(jme, JME_TXCS, jme->reg_txcs | TXCS_SELECT_QUEUE0); | |
711 | wmb(); | |
712 | ||
713 | val = jread32(jme, JME_TXCS); | |
714 | for (i = JME_TX_DISABLE_TIMEOUT ; (val & TXCS_ENABLE) && i > 0 ; --i) { | |
715 | mdelay(1); | |
716 | val = jread32(jme, JME_TXCS); | |
717 | rmb(); | |
718 | } | |
719 | ||
720 | if (!i) | |
49d70c48 | 721 | pr_err("Disable TX engine timeout\n"); |
854a2e7c GFT |
722 | |
723 | /* | |
724 | * Stop clock for TX MAC Processor | |
725 | */ | |
726 | jme_mac_txclk_off(jme); | |
95252236 GFT |
727 | } |
728 | ||
729 | static void | |
730 | jme_set_clean_rxdesc(struct jme_adapter *jme, int i) | |
731 | { | |
eacf69a1 | 732 | struct jme_ring *rxring = &(jme->rxring[0]); |
95252236 GFT |
733 | register struct rxdesc *rxdesc = rxring->desc; |
734 | struct jme_buffer_info *rxbi = rxring->bufinf; | |
735 | rxdesc += i; | |
736 | rxbi += i; | |
737 | ||
738 | rxdesc->dw[0] = 0; | |
739 | rxdesc->dw[1] = 0; | |
740 | rxdesc->desc1.bufaddrh = cpu_to_le32((__u64)rxbi->mapping >> 32); | |
741 | rxdesc->desc1.bufaddrl = cpu_to_le32( | |
742 | (__u64)rxbi->mapping & 0xFFFFFFFFUL); | |
743 | rxdesc->desc1.datalen = cpu_to_le16(rxbi->len); | |
744 | if (jme->dev->features & NETIF_F_HIGHDMA) | |
745 | rxdesc->desc1.flags = RXFLAG_64BIT; | |
746 | wmb(); | |
747 | rxdesc->desc1.flags |= RXFLAG_OWN | RXFLAG_INT; | |
748 | } | |
749 | ||
750 | static int | |
751 | jme_make_new_rx_buf(struct jme_adapter *jme, int i) | |
752 | { | |
753 | struct jme_ring *rxring = &(jme->rxring[0]); | |
754 | struct jme_buffer_info *rxbi = rxring->bufinf + i; | |
755 | struct sk_buff *skb; | |
756 | ||
757 | skb = netdev_alloc_skb(jme->dev, | |
758 | jme->dev->mtu + RX_EXTRA_LEN); | |
759 | if (unlikely(!skb)) | |
760 | return -ENOMEM; | |
761 | ||
762 | rxbi->skb = skb; | |
763 | rxbi->len = skb_tailroom(skb); | |
764 | rxbi->mapping = pci_map_page(jme->pdev, | |
765 | virt_to_page(skb->data), | |
766 | offset_in_page(skb->data), | |
767 | rxbi->len, | |
768 | PCI_DMA_FROMDEVICE); | |
769 | ||
770 | return 0; | |
771 | } | |
772 | ||
773 | static void | |
774 | jme_free_rx_buf(struct jme_adapter *jme, int i) | |
775 | { | |
776 | struct jme_ring *rxring = &(jme->rxring[0]); | |
777 | struct jme_buffer_info *rxbi = rxring->bufinf; | |
778 | rxbi += i; | |
779 | ||
780 | if (rxbi->skb) { | |
781 | pci_unmap_page(jme->pdev, | |
782 | rxbi->mapping, | |
783 | rxbi->len, | |
784 | PCI_DMA_FROMDEVICE); | |
785 | dev_kfree_skb(rxbi->skb); | |
786 | rxbi->skb = NULL; | |
787 | rxbi->mapping = 0; | |
788 | rxbi->len = 0; | |
789 | } | |
790 | } | |
791 | ||
792 | static void | |
793 | jme_free_rx_resources(struct jme_adapter *jme) | |
794 | { | |
795 | int i; | |
796 | struct jme_ring *rxring = &(jme->rxring[0]); | |
797 | ||
798 | if (rxring->alloc) { | |
47bd10d1 GFT |
799 | if (rxring->bufinf) { |
800 | for (i = 0 ; i < jme->rx_ring_size ; ++i) | |
801 | jme_free_rx_buf(jme, i); | |
802 | kfree(rxring->bufinf); | |
803 | } | |
95252236 GFT |
804 | |
805 | dma_free_coherent(&(jme->pdev->dev), | |
806 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), | |
807 | rxring->alloc, | |
808 | rxring->dmaalloc); | |
809 | rxring->alloc = NULL; | |
810 | rxring->desc = NULL; | |
811 | rxring->dmaalloc = 0; | |
812 | rxring->dma = 0; | |
47bd10d1 | 813 | rxring->bufinf = NULL; |
95252236 GFT |
814 | } |
815 | rxring->next_to_use = 0; | |
816 | atomic_set(&rxring->next_to_clean, 0); | |
817 | } | |
818 | ||
819 | static int | |
820 | jme_setup_rx_resources(struct jme_adapter *jme) | |
821 | { | |
822 | int i; | |
823 | struct jme_ring *rxring = &(jme->rxring[0]); | |
824 | ||
825 | rxring->alloc = dma_alloc_coherent(&(jme->pdev->dev), | |
826 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), | |
827 | &(rxring->dmaalloc), | |
828 | GFP_ATOMIC); | |
47bd10d1 GFT |
829 | if (!rxring->alloc) |
830 | goto err_set_null; | |
95252236 GFT |
831 | |
832 | /* | |
833 | * 16 Bytes align | |
834 | */ | |
835 | rxring->desc = (void *)ALIGN((unsigned long)(rxring->alloc), | |
836 | RING_DESC_ALIGN); | |
837 | rxring->dma = ALIGN(rxring->dmaalloc, RING_DESC_ALIGN); | |
838 | rxring->next_to_use = 0; | |
839 | atomic_set(&rxring->next_to_clean, 0); | |
840 | ||
47bd10d1 GFT |
841 | rxring->bufinf = kmalloc(sizeof(struct jme_buffer_info) * |
842 | jme->rx_ring_size, GFP_ATOMIC); | |
843 | if (unlikely(!(rxring->bufinf))) | |
844 | goto err_free_rxring; | |
845 | ||
95252236 GFT |
846 | /* |
847 | * Initiallize Receive Descriptors | |
848 | */ | |
47bd10d1 GFT |
849 | memset(rxring->bufinf, 0, |
850 | sizeof(struct jme_buffer_info) * jme->rx_ring_size); | |
95252236 GFT |
851 | for (i = 0 ; i < jme->rx_ring_size ; ++i) { |
852 | if (unlikely(jme_make_new_rx_buf(jme, i))) { | |
853 | jme_free_rx_resources(jme); | |
854 | return -ENOMEM; | |
855 | } | |
856 | ||
857 | jme_set_clean_rxdesc(jme, i); | |
858 | } | |
859 | ||
860 | return 0; | |
47bd10d1 GFT |
861 | |
862 | err_free_rxring: | |
863 | dma_free_coherent(&(jme->pdev->dev), | |
864 | RX_RING_ALLOC_SIZE(jme->rx_ring_size), | |
865 | rxring->alloc, | |
866 | rxring->dmaalloc); | |
867 | err_set_null: | |
868 | rxring->desc = NULL; | |
869 | rxring->dmaalloc = 0; | |
870 | rxring->dma = 0; | |
871 | rxring->bufinf = NULL; | |
872 | ||
873 | return -ENOMEM; | |
95252236 GFT |
874 | } |
875 | ||
876 | static inline void | |
877 | jme_enable_rx_engine(struct jme_adapter *jme) | |
878 | { | |
879 | /* | |
880 | * Select Queue 0 | |
881 | */ | |
882 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | | |
883 | RXCS_QUEUESEL_Q0); | |
884 | wmb(); | |
885 | ||
886 | /* | |
887 | * Setup RX DMA Bass Address | |
888 | */ | |
eacf69a1 | 889 | jwrite32(jme, JME_RXDBA_LO, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL); |
95252236 | 890 | jwrite32(jme, JME_RXDBA_HI, (__u64)(jme->rxring[0].dma) >> 32); |
eacf69a1 | 891 | jwrite32(jme, JME_RXNDA, (__u64)(jme->rxring[0].dma) & 0xFFFFFFFFUL); |
95252236 GFT |
892 | |
893 | /* | |
894 | * Setup RX Descriptor Count | |
895 | */ | |
896 | jwrite32(jme, JME_RXQDC, jme->rx_ring_size); | |
897 | ||
898 | /* | |
899 | * Setup Unicast Filter | |
900 | */ | |
8b53abae | 901 | jme_set_unicastaddr(jme->dev); |
95252236 GFT |
902 | jme_set_multi(jme->dev); |
903 | ||
904 | /* | |
905 | * Enable RX Engine | |
906 | */ | |
907 | wmb(); | |
854a2e7c | 908 | jwrite32f(jme, JME_RXCS, jme->reg_rxcs | |
95252236 GFT |
909 | RXCS_QUEUESEL_Q0 | |
910 | RXCS_ENABLE | | |
911 | RXCS_QST); | |
854a2e7c GFT |
912 | |
913 | /* | |
914 | * Start clock for RX MAC Processor | |
915 | */ | |
916 | jme_mac_rxclk_on(jme); | |
95252236 GFT |
917 | } |
918 | ||
919 | static inline void | |
920 | jme_restart_rx_engine(struct jme_adapter *jme) | |
921 | { | |
922 | /* | |
923 | * Start RX Engine | |
924 | */ | |
925 | jwrite32(jme, JME_RXCS, jme->reg_rxcs | | |
926 | RXCS_QUEUESEL_Q0 | | |
927 | RXCS_ENABLE | | |
928 | RXCS_QST); | |
929 | } | |
930 | ||
931 | static inline void | |
932 | jme_disable_rx_engine(struct jme_adapter *jme) | |
933 | { | |
934 | int i; | |
935 | u32 val; | |
936 | ||
937 | /* | |
938 | * Disable RX Engine | |
939 | */ | |
940 | jwrite32(jme, JME_RXCS, jme->reg_rxcs); | |
941 | wmb(); | |
942 | ||
943 | val = jread32(jme, JME_RXCS); | |
944 | for (i = JME_RX_DISABLE_TIMEOUT ; (val & RXCS_ENABLE) && i > 0 ; --i) { | |
945 | mdelay(1); | |
946 | val = jread32(jme, JME_RXCS); | |
947 | rmb(); | |
948 | } | |
949 | ||
950 | if (!i) | |
49d70c48 | 951 | pr_err("Disable RX engine timeout\n"); |
95252236 | 952 | |
854a2e7c GFT |
953 | /* |
954 | * Stop clock for RX MAC Processor | |
955 | */ | |
956 | jme_mac_rxclk_off(jme); | |
95252236 GFT |
957 | } |
958 | ||
959 | static int | |
960 | jme_rxsum_ok(struct jme_adapter *jme, u16 flags) | |
961 | { | |
962 | if (!(flags & (RXWBFLAG_TCPON | RXWBFLAG_UDPON | RXWBFLAG_IPV4))) | |
963 | return false; | |
964 | ||
ce7d70af GFT |
965 | if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_TCPON | RXWBFLAG_TCPCS)) |
966 | == RXWBFLAG_TCPON)) { | |
967 | if (flags & RXWBFLAG_IPV4) | |
f8502ce4 | 968 | netif_err(jme, rx_err, jme->dev, "TCP Checksum error\n"); |
ce7d70af | 969 | return false; |
95252236 GFT |
970 | } |
971 | ||
ce7d70af GFT |
972 | if (unlikely((flags & (RXWBFLAG_MF | RXWBFLAG_UDPON | RXWBFLAG_UDPCS)) |
973 | == RXWBFLAG_UDPON)) { | |
974 | if (flags & RXWBFLAG_IPV4) | |
49d70c48 | 975 | netif_err(jme, rx_err, jme->dev, "UDP Checksum error\n"); |
ce7d70af | 976 | return false; |
95252236 GFT |
977 | } |
978 | ||
ce7d70af GFT |
979 | if (unlikely((flags & (RXWBFLAG_IPV4 | RXWBFLAG_IPCS)) |
980 | == RXWBFLAG_IPV4)) { | |
49d70c48 | 981 | netif_err(jme, rx_err, jme->dev, "IPv4 Checksum error\n"); |
ce7d70af | 982 | return false; |
95252236 GFT |
983 | } |
984 | ||
985 | return true; | |
95252236 GFT |
986 | } |
987 | ||
988 | static void | |
989 | jme_alloc_and_feed_skb(struct jme_adapter *jme, int idx) | |
990 | { | |
991 | struct jme_ring *rxring = &(jme->rxring[0]); | |
992 | struct rxdesc *rxdesc = rxring->desc; | |
993 | struct jme_buffer_info *rxbi = rxring->bufinf; | |
994 | struct sk_buff *skb; | |
995 | int framesize; | |
996 | ||
997 | rxdesc += idx; | |
998 | rxbi += idx; | |
999 | ||
1000 | skb = rxbi->skb; | |
1001 | pci_dma_sync_single_for_cpu(jme->pdev, | |
1002 | rxbi->mapping, | |
1003 | rxbi->len, | |
1004 | PCI_DMA_FROMDEVICE); | |
1005 | ||
1006 | if (unlikely(jme_make_new_rx_buf(jme, idx))) { | |
1007 | pci_dma_sync_single_for_device(jme->pdev, | |
1008 | rxbi->mapping, | |
1009 | rxbi->len, | |
1010 | PCI_DMA_FROMDEVICE); | |
1011 | ||
1012 | ++(NET_STAT(jme).rx_dropped); | |
1013 | } else { | |
1014 | framesize = le16_to_cpu(rxdesc->descwb.framesize) | |
1015 | - RX_PREPAD_SIZE; | |
1016 | ||
1017 | skb_reserve(skb, RX_PREPAD_SIZE); | |
1018 | skb_put(skb, framesize); | |
1019 | skb->protocol = eth_type_trans(skb, jme->dev); | |
1020 | ||
31c221c4 | 1021 | if (jme_rxsum_ok(jme, le16_to_cpu(rxdesc->descwb.flags))) |
95252236 GFT |
1022 | skb->ip_summed = CHECKSUM_UNNECESSARY; |
1023 | else | |
bc8acf2c | 1024 | skb_checksum_none_assert(skb); |
95252236 | 1025 | |
31c221c4 | 1026 | if (rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_TAGON)) { |
95252236 GFT |
1027 | if (jme->vlgrp) { |
1028 | jme->jme_vlan_rx(skb, jme->vlgrp, | |
31c221c4 | 1029 | le16_to_cpu(rxdesc->descwb.vlan)); |
95252236 | 1030 | NET_STAT(jme).rx_bytes += 4; |
17da69b8 GFT |
1031 | } else { |
1032 | dev_kfree_skb(skb); | |
95252236 GFT |
1033 | } |
1034 | } else { | |
1035 | jme->jme_rx(skb); | |
1036 | } | |
1037 | ||
31c221c4 HH |
1038 | if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_DEST)) == |
1039 | cpu_to_le16(RXWBFLAG_DEST_MUL)) | |
95252236 GFT |
1040 | ++(NET_STAT(jme).multicast); |
1041 | ||
95252236 GFT |
1042 | NET_STAT(jme).rx_bytes += framesize; |
1043 | ++(NET_STAT(jme).rx_packets); | |
1044 | } | |
1045 | ||
1046 | jme_set_clean_rxdesc(jme, idx); | |
1047 | ||
1048 | } | |
1049 | ||
1050 | static int | |
1051 | jme_process_receive(struct jme_adapter *jme, int limit) | |
1052 | { | |
1053 | struct jme_ring *rxring = &(jme->rxring[0]); | |
1054 | struct rxdesc *rxdesc = rxring->desc; | |
1055 | int i, j, ccnt, desccnt, mask = jme->rx_ring_mask; | |
1056 | ||
1057 | if (unlikely(!atomic_dec_and_test(&jme->rx_cleaning))) | |
1058 | goto out_inc; | |
1059 | ||
1060 | if (unlikely(atomic_read(&jme->link_changing) != 1)) | |
1061 | goto out_inc; | |
1062 | ||
1063 | if (unlikely(!netif_carrier_ok(jme->dev))) | |
1064 | goto out_inc; | |
1065 | ||
1066 | i = atomic_read(&rxring->next_to_clean); | |
858b9ced | 1067 | while (limit > 0) { |
95252236 GFT |
1068 | rxdesc = rxring->desc; |
1069 | rxdesc += i; | |
1070 | ||
31c221c4 | 1071 | if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) || |
95252236 GFT |
1072 | !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL)) |
1073 | goto out; | |
858b9ced | 1074 | --limit; |
95252236 | 1075 | |
ea192aa8 | 1076 | rmb(); |
95252236 GFT |
1077 | desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT; |
1078 | ||
1079 | if (unlikely(desccnt > 1 || | |
1080 | rxdesc->descwb.errstat & RXWBERR_ALLERR)) { | |
1081 | ||
1082 | if (rxdesc->descwb.errstat & RXWBERR_CRCERR) | |
1083 | ++(NET_STAT(jme).rx_crc_errors); | |
1084 | else if (rxdesc->descwb.errstat & RXWBERR_OVERUN) | |
1085 | ++(NET_STAT(jme).rx_fifo_errors); | |
1086 | else | |
1087 | ++(NET_STAT(jme).rx_errors); | |
1088 | ||
1089 | if (desccnt > 1) | |
1090 | limit -= desccnt - 1; | |
1091 | ||
1092 | for (j = i, ccnt = desccnt ; ccnt-- ; ) { | |
1093 | jme_set_clean_rxdesc(jme, j); | |
1094 | j = (j + 1) & (mask); | |
1095 | } | |
1096 | ||
1097 | } else { | |
1098 | jme_alloc_and_feed_skb(jme, i); | |
1099 | } | |
1100 | ||
1101 | i = (i + desccnt) & (mask); | |
1102 | } | |
1103 | ||
1104 | out: | |
1105 | atomic_set(&rxring->next_to_clean, i); | |
1106 | ||
1107 | out_inc: | |
1108 | atomic_inc(&jme->rx_cleaning); | |
1109 | ||
1110 | return limit > 0 ? limit : 0; | |
1111 | ||
1112 | } | |
1113 | ||
1114 | static void | |
1115 | jme_attempt_pcc(struct dynpcc_info *dpi, int atmp) | |
1116 | { | |
1117 | if (likely(atmp == dpi->cur)) { | |
1118 | dpi->cnt = 0; | |
1119 | return; | |
1120 | } | |
1121 | ||
1122 | if (dpi->attempt == atmp) { | |
1123 | ++(dpi->cnt); | |
1124 | } else { | |
1125 | dpi->attempt = atmp; | |
1126 | dpi->cnt = 0; | |
1127 | } | |
1128 | ||
1129 | } | |
1130 | ||
1131 | static void | |
1132 | jme_dynamic_pcc(struct jme_adapter *jme) | |
1133 | { | |
1134 | register struct dynpcc_info *dpi = &(jme->dpi); | |
1135 | ||
1136 | if ((NET_STAT(jme).rx_bytes - dpi->last_bytes) > PCC_P3_THRESHOLD) | |
1137 | jme_attempt_pcc(dpi, PCC_P3); | |
8e95a202 JP |
1138 | else if ((NET_STAT(jme).rx_packets - dpi->last_pkts) > PCC_P2_THRESHOLD || |
1139 | dpi->intr_cnt > PCC_INTR_THRESHOLD) | |
95252236 GFT |
1140 | jme_attempt_pcc(dpi, PCC_P2); |
1141 | else | |
1142 | jme_attempt_pcc(dpi, PCC_P1); | |
1143 | ||
1144 | if (unlikely(dpi->attempt != dpi->cur && dpi->cnt > 5)) { | |
1145 | if (dpi->attempt < dpi->cur) | |
1146 | tasklet_schedule(&jme->rxclean_task); | |
1147 | jme_set_rx_pcc(jme, dpi->attempt); | |
1148 | dpi->cur = dpi->attempt; | |
1149 | dpi->cnt = 0; | |
1150 | } | |
1151 | } | |
1152 | ||
1153 | static void | |
1154 | jme_start_pcc_timer(struct jme_adapter *jme) | |
1155 | { | |
1156 | struct dynpcc_info *dpi = &(jme->dpi); | |
1157 | dpi->last_bytes = NET_STAT(jme).rx_bytes; | |
1158 | dpi->last_pkts = NET_STAT(jme).rx_packets; | |
1159 | dpi->intr_cnt = 0; | |
1160 | jwrite32(jme, JME_TMCSR, | |
1161 | TMCSR_EN | ((0xFFFFFF - PCC_INTERVAL_US) & TMCSR_CNT)); | |
1162 | } | |
1163 | ||
1164 | static inline void | |
1165 | jme_stop_pcc_timer(struct jme_adapter *jme) | |
1166 | { | |
1167 | jwrite32(jme, JME_TMCSR, 0); | |
1168 | } | |
1169 | ||
1170 | static void | |
1171 | jme_shutdown_nic(struct jme_adapter *jme) | |
1172 | { | |
1173 | u32 phylink; | |
1174 | ||
1175 | phylink = jme_linkstat_from_phy(jme); | |
1176 | ||
1177 | if (!(phylink & PHY_LINK_UP)) { | |
1178 | /* | |
1179 | * Disable all interrupt before issue timer | |
1180 | */ | |
1181 | jme_stop_irq(jme); | |
1182 | jwrite32(jme, JME_TIMER2, TMCSR_EN | 0xFFFFFE); | |
1183 | } | |
1184 | } | |
1185 | ||
1186 | static void | |
1187 | jme_pcc_tasklet(unsigned long arg) | |
1188 | { | |
1189 | struct jme_adapter *jme = (struct jme_adapter *)arg; | |
1190 | struct net_device *netdev = jme->dev; | |
1191 | ||
1192 | if (unlikely(test_bit(JME_FLAG_SHUTDOWN, &jme->flags))) { | |
1193 | jme_shutdown_nic(jme); | |
1194 | return; | |
1195 | } | |
1196 | ||
1197 | if (unlikely(!netif_carrier_ok(netdev) || | |
1198 | (atomic_read(&jme->link_changing) != 1) | |
1199 | )) { | |
1200 | jme_stop_pcc_timer(jme); | |
1201 | return; | |
1202 | } | |
1203 | ||
1204 | if (!(test_bit(JME_FLAG_POLL, &jme->flags))) | |
1205 | jme_dynamic_pcc(jme); | |
1206 | ||
1207 | jme_start_pcc_timer(jme); | |
1208 | } | |
1209 | ||
1210 | static inline void | |
1211 | jme_polling_mode(struct jme_adapter *jme) | |
1212 | { | |
1213 | jme_set_rx_pcc(jme, PCC_OFF); | |
1214 | } | |
1215 | ||
1216 | static inline void | |
1217 | jme_interrupt_mode(struct jme_adapter *jme) | |
1218 | { | |
1219 | jme_set_rx_pcc(jme, PCC_P1); | |
1220 | } | |
1221 | ||
1222 | static inline int | |
1223 | jme_pseudo_hotplug_enabled(struct jme_adapter *jme) | |
1224 | { | |
1225 | u32 apmc; | |
1226 | apmc = jread32(jme, JME_APMC); | |
1227 | return apmc & JME_APMC_PSEUDO_HP_EN; | |
1228 | } | |
1229 | ||
1230 | static void | |
1231 | jme_start_shutdown_timer(struct jme_adapter *jme) | |
1232 | { | |
1233 | u32 apmc; | |
1234 | ||
1235 | apmc = jread32(jme, JME_APMC) | JME_APMC_PCIE_SD_EN; | |
1236 | apmc &= ~JME_APMC_EPIEN_CTRL; | |
1237 | if (!no_extplug) { | |
1238 | jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_EN); | |
1239 | wmb(); | |
1240 | } | |
1241 | jwrite32f(jme, JME_APMC, apmc); | |
1242 | ||
1243 | jwrite32f(jme, JME_TIMER2, 0); | |
1244 | set_bit(JME_FLAG_SHUTDOWN, &jme->flags); | |
1245 | jwrite32(jme, JME_TMCSR, | |
1246 | TMCSR_EN | ((0xFFFFFF - APMC_PHP_SHUTDOWN_DELAY) & TMCSR_CNT)); | |
1247 | } | |
1248 | ||
1249 | static void | |
1250 | jme_stop_shutdown_timer(struct jme_adapter *jme) | |
1251 | { | |
1252 | u32 apmc; | |
1253 | ||
1254 | jwrite32f(jme, JME_TMCSR, 0); | |
1255 | jwrite32f(jme, JME_TIMER2, 0); | |
1256 | clear_bit(JME_FLAG_SHUTDOWN, &jme->flags); | |
1257 | ||
1258 | apmc = jread32(jme, JME_APMC); | |
1259 | apmc &= ~(JME_APMC_PCIE_SD_EN | JME_APMC_EPIEN_CTRL); | |
1260 | jwrite32f(jme, JME_APMC, apmc | JME_APMC_EPIEN_CTRL_DIS); | |
1261 | wmb(); | |
1262 | jwrite32f(jme, JME_APMC, apmc); | |
1263 | } | |
1264 | ||
1265 | static void | |
1266 | jme_link_change_tasklet(unsigned long arg) | |
1267 | { | |
1268 | struct jme_adapter *jme = (struct jme_adapter *)arg; | |
1269 | struct net_device *netdev = jme->dev; | |
1270 | int rc; | |
1271 | ||
1272 | while (!atomic_dec_and_test(&jme->link_changing)) { | |
1273 | atomic_inc(&jme->link_changing); | |
49d70c48 | 1274 | netif_info(jme, intr, jme->dev, "Get link change lock failed\n"); |
95252236 | 1275 | while (atomic_read(&jme->link_changing) != 1) |
49d70c48 | 1276 | netif_info(jme, intr, jme->dev, "Waiting link change lock\n"); |
95252236 GFT |
1277 | } |
1278 | ||
1279 | if (jme_check_link(netdev, 1) && jme->old_mtu == netdev->mtu) | |
1280 | goto out; | |
1281 | ||
1282 | jme->old_mtu = netdev->mtu; | |
1283 | netif_stop_queue(netdev); | |
1284 | if (jme_pseudo_hotplug_enabled(jme)) | |
1285 | jme_stop_shutdown_timer(jme); | |
1286 | ||
1287 | jme_stop_pcc_timer(jme); | |
1288 | tasklet_disable(&jme->txclean_task); | |
1289 | tasklet_disable(&jme->rxclean_task); | |
1290 | tasklet_disable(&jme->rxempty_task); | |
1291 | ||
1292 | if (netif_carrier_ok(netdev)) { | |
95252236 GFT |
1293 | jme_disable_rx_engine(jme); |
1294 | jme_disable_tx_engine(jme); | |
1295 | jme_reset_mac_processor(jme); | |
1296 | jme_free_rx_resources(jme); | |
1297 | jme_free_tx_resources(jme); | |
1298 | ||
1299 | if (test_bit(JME_FLAG_POLL, &jme->flags)) | |
1300 | jme_polling_mode(jme); | |
1301 | ||
1302 | netif_carrier_off(netdev); | |
1303 | } | |
1304 | ||
1305 | jme_check_link(netdev, 0); | |
1306 | if (netif_carrier_ok(netdev)) { | |
1307 | rc = jme_setup_rx_resources(jme); | |
1308 | if (rc) { | |
49d70c48 | 1309 | pr_err("Allocating resources for RX error, Device STOPPED!\n"); |
95252236 GFT |
1310 | goto out_enable_tasklet; |
1311 | } | |
1312 | ||
1313 | rc = jme_setup_tx_resources(jme); | |
1314 | if (rc) { | |
49d70c48 | 1315 | pr_err("Allocating resources for TX error, Device STOPPED!\n"); |
95252236 GFT |
1316 | goto err_out_free_rx_resources; |
1317 | } | |
1318 | ||
1319 | jme_enable_rx_engine(jme); | |
1320 | jme_enable_tx_engine(jme); | |
1321 | ||
1322 | netif_start_queue(netdev); | |
1323 | ||
1324 | if (test_bit(JME_FLAG_POLL, &jme->flags)) | |
1325 | jme_interrupt_mode(jme); | |
1326 | ||
1327 | jme_start_pcc_timer(jme); | |
1328 | } else if (jme_pseudo_hotplug_enabled(jme)) { | |
1329 | jme_start_shutdown_timer(jme); | |
1330 | } | |
1331 | ||
1332 | goto out_enable_tasklet; | |
1333 | ||
1334 | err_out_free_rx_resources: | |
1335 | jme_free_rx_resources(jme); | |
1336 | out_enable_tasklet: | |
1337 | tasklet_enable(&jme->txclean_task); | |
1338 | tasklet_hi_enable(&jme->rxclean_task); | |
1339 | tasklet_hi_enable(&jme->rxempty_task); | |
1340 | out: | |
1341 | atomic_inc(&jme->link_changing); | |
1342 | } | |
1343 | ||
1344 | static void | |
1345 | jme_rx_clean_tasklet(unsigned long arg) | |
1346 | { | |
1347 | struct jme_adapter *jme = (struct jme_adapter *)arg; | |
1348 | struct dynpcc_info *dpi = &(jme->dpi); | |
1349 | ||
1350 | jme_process_receive(jme, jme->rx_ring_size); | |
1351 | ++(dpi->intr_cnt); | |
1352 | ||
1353 | } | |
1354 | ||
1355 | static int | |
1356 | jme_poll(JME_NAPI_HOLDER(holder), JME_NAPI_WEIGHT(budget)) | |
1357 | { | |
1358 | struct jme_adapter *jme = jme_napi_priv(holder); | |
95252236 GFT |
1359 | int rest; |
1360 | ||
1361 | rest = jme_process_receive(jme, JME_NAPI_WEIGHT_VAL(budget)); | |
1362 | ||
1363 | while (atomic_read(&jme->rx_empty) > 0) { | |
1364 | atomic_dec(&jme->rx_empty); | |
1365 | ++(NET_STAT(jme).rx_dropped); | |
1366 | jme_restart_rx_engine(jme); | |
1367 | } | |
1368 | atomic_inc(&jme->rx_empty); | |
1369 | ||
1370 | if (rest) { | |
1371 | JME_RX_COMPLETE(netdev, holder); | |
1372 | jme_interrupt_mode(jme); | |
1373 | } | |
1374 | ||
1375 | JME_NAPI_WEIGHT_SET(budget, rest); | |
1376 | return JME_NAPI_WEIGHT_VAL(budget) - rest; | |
1377 | } | |
1378 | ||
1379 | static void | |
1380 | jme_rx_empty_tasklet(unsigned long arg) | |
1381 | { | |
1382 | struct jme_adapter *jme = (struct jme_adapter *)arg; | |
1383 | ||
1384 | if (unlikely(atomic_read(&jme->link_changing) != 1)) | |
1385 | return; | |
1386 | ||
1387 | if (unlikely(!netif_carrier_ok(jme->dev))) | |
1388 | return; | |
1389 | ||
f8502ce4 | 1390 | netif_info(jme, rx_status, jme->dev, "RX Queue Full!\n"); |
95252236 GFT |
1391 | |
1392 | jme_rx_clean_tasklet(arg); | |
1393 | ||
1394 | while (atomic_read(&jme->rx_empty) > 0) { | |
1395 | atomic_dec(&jme->rx_empty); | |
1396 | ++(NET_STAT(jme).rx_dropped); | |
1397 | jme_restart_rx_engine(jme); | |
1398 | } | |
1399 | atomic_inc(&jme->rx_empty); | |
1400 | } | |
1401 | ||
1402 | static void | |
1403 | jme_wake_queue_if_stopped(struct jme_adapter *jme) | |
1404 | { | |
eacf69a1 | 1405 | struct jme_ring *txring = &(jme->txring[0]); |
95252236 GFT |
1406 | |
1407 | smp_wmb(); | |
1408 | if (unlikely(netif_queue_stopped(jme->dev) && | |
1409 | atomic_read(&txring->nr_free) >= (jme->tx_wake_threshold))) { | |
49d70c48 | 1410 | netif_info(jme, tx_done, jme->dev, "TX Queue Waked\n"); |
95252236 GFT |
1411 | netif_wake_queue(jme->dev); |
1412 | } | |
1413 | ||
1414 | } | |
1415 | ||
1416 | static void | |
1417 | jme_tx_clean_tasklet(unsigned long arg) | |
1418 | { | |
1419 | struct jme_adapter *jme = (struct jme_adapter *)arg; | |
1420 | struct jme_ring *txring = &(jme->txring[0]); | |
1421 | struct txdesc *txdesc = txring->desc; | |
1422 | struct jme_buffer_info *txbi = txring->bufinf, *ctxbi, *ttxbi; | |
1423 | int i, j, cnt = 0, max, err, mask; | |
1424 | ||
49d70c48 | 1425 | tx_dbg(jme, "Into txclean\n"); |
95252236 GFT |
1426 | |
1427 | if (unlikely(!atomic_dec_and_test(&jme->tx_cleaning))) | |
1428 | goto out; | |
1429 | ||
1430 | if (unlikely(atomic_read(&jme->link_changing) != 1)) | |
1431 | goto out; | |
1432 | ||
1433 | if (unlikely(!netif_carrier_ok(jme->dev))) | |
1434 | goto out; | |
1435 | ||
1436 | max = jme->tx_ring_size - atomic_read(&txring->nr_free); | |
1437 | mask = jme->tx_ring_mask; | |
1438 | ||
1439 | for (i = atomic_read(&txring->next_to_clean) ; cnt < max ; ) { | |
1440 | ||
1441 | ctxbi = txbi + i; | |
1442 | ||
1443 | if (likely(ctxbi->skb && | |
1444 | !(txdesc[i].descwb.flags & TXWBFLAG_OWN))) { | |
1445 | ||
1446 | tx_dbg(jme, "txclean: %d+%d@%lu\n", | |
49d70c48 | 1447 | i, ctxbi->nr_desc, jiffies); |
95252236 GFT |
1448 | |
1449 | err = txdesc[i].descwb.flags & TXWBFLAG_ALLERR; | |
1450 | ||
1451 | for (j = 1 ; j < ctxbi->nr_desc ; ++j) { | |
1452 | ttxbi = txbi + ((i + j) & (mask)); | |
1453 | txdesc[(i + j) & (mask)].dw[0] = 0; | |
1454 | ||
1455 | pci_unmap_page(jme->pdev, | |
1456 | ttxbi->mapping, | |
1457 | ttxbi->len, | |
1458 | PCI_DMA_TODEVICE); | |
1459 | ||
1460 | ttxbi->mapping = 0; | |
1461 | ttxbi->len = 0; | |
1462 | } | |
1463 | ||
1464 | dev_kfree_skb(ctxbi->skb); | |
1465 | ||
1466 | cnt += ctxbi->nr_desc; | |
1467 | ||
1468 | if (unlikely(err)) { | |
1469 | ++(NET_STAT(jme).tx_carrier_errors); | |
1470 | } else { | |
1471 | ++(NET_STAT(jme).tx_packets); | |
1472 | NET_STAT(jme).tx_bytes += ctxbi->len; | |
1473 | } | |
1474 | ||
1475 | ctxbi->skb = NULL; | |
1476 | ctxbi->len = 0; | |
1477 | ctxbi->start_xmit = 0; | |
1478 | ||
1479 | } else { | |
1480 | break; | |
1481 | } | |
1482 | ||
1483 | i = (i + ctxbi->nr_desc) & mask; | |
1484 | ||
1485 | ctxbi->nr_desc = 0; | |
1486 | } | |
1487 | ||
49d70c48 | 1488 | tx_dbg(jme, "txclean: done %d@%lu\n", i, jiffies); |
95252236 GFT |
1489 | atomic_set(&txring->next_to_clean, i); |
1490 | atomic_add(cnt, &txring->nr_free); | |
1491 | ||
1492 | jme_wake_queue_if_stopped(jme); | |
1493 | ||
1494 | out: | |
1495 | atomic_inc(&jme->tx_cleaning); | |
1496 | } | |
1497 | ||
1498 | static void | |
1499 | jme_intr_msi(struct jme_adapter *jme, u32 intrstat) | |
1500 | { | |
1501 | /* | |
1502 | * Disable interrupt | |
1503 | */ | |
1504 | jwrite32f(jme, JME_IENC, INTR_ENABLE); | |
1505 | ||
1506 | if (intrstat & (INTR_LINKCH | INTR_SWINTR)) { | |
1507 | /* | |
1508 | * Link change event is critical | |
1509 | * all other events are ignored | |
1510 | */ | |
1511 | jwrite32(jme, JME_IEVE, intrstat); | |
1512 | tasklet_schedule(&jme->linkch_task); | |
1513 | goto out_reenable; | |
1514 | } | |
1515 | ||
1516 | if (intrstat & INTR_TMINTR) { | |
1517 | jwrite32(jme, JME_IEVE, INTR_TMINTR); | |
1518 | tasklet_schedule(&jme->pcc_task); | |
1519 | } | |
1520 | ||
1521 | if (intrstat & (INTR_PCCTXTO | INTR_PCCTX)) { | |
1522 | jwrite32(jme, JME_IEVE, INTR_PCCTXTO | INTR_PCCTX | INTR_TX0); | |
1523 | tasklet_schedule(&jme->txclean_task); | |
1524 | } | |
1525 | ||
1526 | if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { | |
1527 | jwrite32(jme, JME_IEVE, (intrstat & (INTR_PCCRX0TO | | |
1528 | INTR_PCCRX0 | | |
1529 | INTR_RX0EMP)) | | |
1530 | INTR_RX0); | |
1531 | } | |
1532 | ||
1533 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { | |
1534 | if (intrstat & INTR_RX0EMP) | |
1535 | atomic_inc(&jme->rx_empty); | |
1536 | ||
1537 | if ((intrstat & (INTR_PCCRX0TO | INTR_PCCRX0 | INTR_RX0EMP))) { | |
1538 | if (likely(JME_RX_SCHEDULE_PREP(jme))) { | |
1539 | jme_polling_mode(jme); | |
1540 | JME_RX_SCHEDULE(jme); | |
1541 | } | |
1542 | } | |
1543 | } else { | |
1544 | if (intrstat & INTR_RX0EMP) { | |
1545 | atomic_inc(&jme->rx_empty); | |
1546 | tasklet_hi_schedule(&jme->rxempty_task); | |
1547 | } else if (intrstat & (INTR_PCCRX0TO | INTR_PCCRX0)) { | |
1548 | tasklet_hi_schedule(&jme->rxclean_task); | |
1549 | } | |
1550 | } | |
1551 | ||
1552 | out_reenable: | |
1553 | /* | |
1554 | * Re-enable interrupt | |
1555 | */ | |
1556 | jwrite32f(jme, JME_IENS, INTR_ENABLE); | |
1557 | } | |
1558 | ||
1559 | static irqreturn_t | |
1560 | jme_intr(int irq, void *dev_id) | |
1561 | { | |
1562 | struct net_device *netdev = dev_id; | |
1563 | struct jme_adapter *jme = netdev_priv(netdev); | |
1564 | u32 intrstat; | |
1565 | ||
1566 | intrstat = jread32(jme, JME_IEVE); | |
1567 | ||
1568 | /* | |
1569 | * Check if it's really an interrupt for us | |
1570 | */ | |
576b5223 | 1571 | if (unlikely((intrstat & INTR_ENABLE) == 0)) |
95252236 GFT |
1572 | return IRQ_NONE; |
1573 | ||
1574 | /* | |
1575 | * Check if the device still exist | |
1576 | */ | |
1577 | if (unlikely(intrstat == ~((typeof(intrstat))0))) | |
1578 | return IRQ_NONE; | |
1579 | ||
1580 | jme_intr_msi(jme, intrstat); | |
1581 | ||
1582 | return IRQ_HANDLED; | |
1583 | } | |
1584 | ||
1585 | static irqreturn_t | |
1586 | jme_msi(int irq, void *dev_id) | |
1587 | { | |
1588 | struct net_device *netdev = dev_id; | |
1589 | struct jme_adapter *jme = netdev_priv(netdev); | |
1590 | u32 intrstat; | |
1591 | ||
d1dfa1d1 | 1592 | intrstat = jread32(jme, JME_IEVE); |
95252236 GFT |
1593 | |
1594 | jme_intr_msi(jme, intrstat); | |
1595 | ||
1596 | return IRQ_HANDLED; | |
1597 | } | |
1598 | ||
1599 | static void | |
1600 | jme_reset_link(struct jme_adapter *jme) | |
1601 | { | |
1602 | jwrite32(jme, JME_TMCSR, TMCSR_SWIT); | |
1603 | } | |
1604 | ||
1605 | static void | |
1606 | jme_restart_an(struct jme_adapter *jme) | |
1607 | { | |
1608 | u32 bmcr; | |
1609 | ||
1610 | spin_lock_bh(&jme->phy_lock); | |
1611 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); | |
1612 | bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART); | |
1613 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
1614 | spin_unlock_bh(&jme->phy_lock); | |
1615 | } | |
1616 | ||
1617 | static int | |
1618 | jme_request_irq(struct jme_adapter *jme) | |
1619 | { | |
1620 | int rc; | |
1621 | struct net_device *netdev = jme->dev; | |
1622 | irq_handler_t handler = jme_intr; | |
1623 | int irq_flags = IRQF_SHARED; | |
1624 | ||
1625 | if (!pci_enable_msi(jme->pdev)) { | |
1626 | set_bit(JME_FLAG_MSI, &jme->flags); | |
1627 | handler = jme_msi; | |
1628 | irq_flags = 0; | |
1629 | } | |
1630 | ||
1631 | rc = request_irq(jme->pdev->irq, handler, irq_flags, netdev->name, | |
1632 | netdev); | |
1633 | if (rc) { | |
49d70c48 JP |
1634 | netdev_err(netdev, |
1635 | "Unable to request %s interrupt (return: %d)\n", | |
1636 | test_bit(JME_FLAG_MSI, &jme->flags) ? "MSI" : "INTx", | |
1637 | rc); | |
95252236 GFT |
1638 | |
1639 | if (test_bit(JME_FLAG_MSI, &jme->flags)) { | |
1640 | pci_disable_msi(jme->pdev); | |
1641 | clear_bit(JME_FLAG_MSI, &jme->flags); | |
1642 | } | |
1643 | } else { | |
1644 | netdev->irq = jme->pdev->irq; | |
1645 | } | |
1646 | ||
1647 | return rc; | |
1648 | } | |
1649 | ||
1650 | static void | |
1651 | jme_free_irq(struct jme_adapter *jme) | |
1652 | { | |
1653 | free_irq(jme->pdev->irq, jme->dev); | |
1654 | if (test_bit(JME_FLAG_MSI, &jme->flags)) { | |
1655 | pci_disable_msi(jme->pdev); | |
1656 | clear_bit(JME_FLAG_MSI, &jme->flags); | |
1657 | jme->dev->irq = jme->pdev->irq; | |
1658 | } | |
1659 | } | |
1660 | ||
4872b11f GFT |
1661 | static inline void |
1662 | jme_new_phy_on(struct jme_adapter *jme) | |
1663 | { | |
1664 | u32 reg; | |
1665 | ||
1666 | reg = jread32(jme, JME_PHY_PWR); | |
1667 | reg &= ~(PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW | | |
1668 | PHY_PWR_DWN2 | PHY_PWR_CLKSEL); | |
1669 | jwrite32(jme, JME_PHY_PWR, reg); | |
1670 | ||
1671 | pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, ®); | |
1672 | reg &= ~PE1_GPREG0_PBG; | |
1673 | reg |= PE1_GPREG0_ENBG; | |
1674 | pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg); | |
1675 | } | |
1676 | ||
1677 | static inline void | |
1678 | jme_new_phy_off(struct jme_adapter *jme) | |
1679 | { | |
1680 | u32 reg; | |
1681 | ||
1682 | reg = jread32(jme, JME_PHY_PWR); | |
1683 | reg |= PHY_PWR_DWN1SEL | PHY_PWR_DWN1SW | | |
1684 | PHY_PWR_DWN2 | PHY_PWR_CLKSEL; | |
1685 | jwrite32(jme, JME_PHY_PWR, reg); | |
1686 | ||
1687 | pci_read_config_dword(jme->pdev, PCI_PRIV_PE1, ®); | |
1688 | reg &= ~PE1_GPREG0_PBG; | |
1689 | reg |= PE1_GPREG0_PDD3COLD; | |
1690 | pci_write_config_dword(jme->pdev, PCI_PRIV_PE1, reg); | |
1691 | } | |
1692 | ||
c8a8684d GFT |
1693 | static inline void |
1694 | jme_phy_on(struct jme_adapter *jme) | |
1695 | { | |
1696 | u32 bmcr; | |
1697 | ||
1698 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); | |
1699 | bmcr &= ~BMCR_PDOWN; | |
1700 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
4872b11f GFT |
1701 | |
1702 | if (new_phy_power_ctrl(jme->chip_main_rev)) | |
1703 | jme_new_phy_on(jme); | |
1704 | } | |
1705 | ||
1706 | static inline void | |
1707 | jme_phy_off(struct jme_adapter *jme) | |
1708 | { | |
1709 | u32 bmcr; | |
1710 | ||
1711 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); | |
1712 | bmcr |= BMCR_PDOWN; | |
1713 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, bmcr); | |
1714 | ||
1715 | if (new_phy_power_ctrl(jme->chip_main_rev)) | |
1716 | jme_new_phy_off(jme); | |
c8a8684d GFT |
1717 | } |
1718 | ||
95252236 GFT |
1719 | static int |
1720 | jme_open(struct net_device *netdev) | |
1721 | { | |
1722 | struct jme_adapter *jme = netdev_priv(netdev); | |
1723 | int rc; | |
1724 | ||
1725 | jme_clear_pm(jme); | |
1726 | JME_NAPI_ENABLE(jme); | |
1727 | ||
38ed0c21 | 1728 | tasklet_enable(&jme->linkch_task); |
95252236 GFT |
1729 | tasklet_enable(&jme->txclean_task); |
1730 | tasklet_hi_enable(&jme->rxclean_task); | |
1731 | tasklet_hi_enable(&jme->rxempty_task); | |
1732 | ||
1733 | rc = jme_request_irq(jme); | |
1734 | if (rc) | |
1735 | goto err_out; | |
1736 | ||
95252236 GFT |
1737 | jme_start_irq(jme); |
1738 | ||
4872b11f GFT |
1739 | jme_phy_on(jme); |
1740 | if (test_bit(JME_FLAG_SSET, &jme->flags)) | |
95252236 | 1741 | jme_set_settings(netdev, &jme->old_ecmd); |
4872b11f | 1742 | else |
95252236 GFT |
1743 | jme_reset_phy_processor(jme); |
1744 | ||
1745 | jme_reset_link(jme); | |
1746 | ||
1747 | return 0; | |
1748 | ||
1749 | err_out: | |
1750 | netif_stop_queue(netdev); | |
1751 | netif_carrier_off(netdev); | |
1752 | return rc; | |
1753 | } | |
1754 | ||
1755 | static void | |
1756 | jme_set_100m_half(struct jme_adapter *jme) | |
1757 | { | |
1758 | u32 bmcr, tmp; | |
1759 | ||
1c557819 | 1760 | jme_phy_on(jme); |
95252236 GFT |
1761 | bmcr = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_BMCR); |
1762 | tmp = bmcr & ~(BMCR_ANENABLE | BMCR_SPEED100 | | |
1763 | BMCR_SPEED1000 | BMCR_FULLDPLX); | |
1764 | tmp |= BMCR_SPEED100; | |
1765 | ||
1766 | if (bmcr != tmp) | |
1767 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, MII_BMCR, tmp); | |
1768 | ||
1769 | if (jme->fpgaver) | |
1770 | jwrite32(jme, JME_GHC, GHC_SPEED_100M | GHC_LINK_POLL); | |
1771 | else | |
1772 | jwrite32(jme, JME_GHC, GHC_SPEED_100M); | |
1773 | } | |
1774 | ||
1775 | #define JME_WAIT_LINK_TIME 2000 /* 2000ms */ | |
1776 | static void | |
1777 | jme_wait_link(struct jme_adapter *jme) | |
1778 | { | |
1779 | u32 phylink, to = JME_WAIT_LINK_TIME; | |
1780 | ||
1781 | mdelay(1000); | |
1782 | phylink = jme_linkstat_from_phy(jme); | |
1783 | while (!(phylink & PHY_LINK_UP) && (to -= 10) > 0) { | |
1784 | mdelay(10); | |
1785 | phylink = jme_linkstat_from_phy(jme); | |
1786 | } | |
1787 | } | |
1788 | ||
1c557819 GFT |
1789 | static void |
1790 | jme_powersave_phy(struct jme_adapter *jme) | |
1791 | { | |
1792 | if (jme->reg_pmcs) { | |
1793 | jme_set_100m_half(jme); | |
1794 | ||
1795 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) | |
1796 | jme_wait_link(jme); | |
1797 | ||
1798 | jwrite32(jme, JME_PMCS, jme->reg_pmcs); | |
1799 | } else { | |
1800 | jme_phy_off(jme); | |
1801 | } | |
1802 | } | |
1803 | ||
95252236 GFT |
1804 | static int |
1805 | jme_close(struct net_device *netdev) | |
1806 | { | |
1807 | struct jme_adapter *jme = netdev_priv(netdev); | |
1808 | ||
1809 | netif_stop_queue(netdev); | |
1810 | netif_carrier_off(netdev); | |
1811 | ||
1812 | jme_stop_irq(jme); | |
95252236 GFT |
1813 | jme_free_irq(jme); |
1814 | ||
1815 | JME_NAPI_DISABLE(jme); | |
1816 | ||
38ed0c21 GFT |
1817 | tasklet_disable(&jme->linkch_task); |
1818 | tasklet_disable(&jme->txclean_task); | |
1819 | tasklet_disable(&jme->rxclean_task); | |
1820 | tasklet_disable(&jme->rxempty_task); | |
95252236 | 1821 | |
95252236 GFT |
1822 | jme_disable_rx_engine(jme); |
1823 | jme_disable_tx_engine(jme); | |
1824 | jme_reset_mac_processor(jme); | |
1825 | jme_free_rx_resources(jme); | |
1826 | jme_free_tx_resources(jme); | |
1827 | jme->phylink = 0; | |
1828 | jme_phy_off(jme); | |
1829 | ||
1830 | return 0; | |
1831 | } | |
1832 | ||
1833 | static int | |
1834 | jme_alloc_txdesc(struct jme_adapter *jme, | |
1835 | struct sk_buff *skb) | |
1836 | { | |
eacf69a1 | 1837 | struct jme_ring *txring = &(jme->txring[0]); |
95252236 GFT |
1838 | int idx, nr_alloc, mask = jme->tx_ring_mask; |
1839 | ||
1840 | idx = txring->next_to_use; | |
1841 | nr_alloc = skb_shinfo(skb)->nr_frags + 2; | |
1842 | ||
1843 | if (unlikely(atomic_read(&txring->nr_free) < nr_alloc)) | |
1844 | return -1; | |
1845 | ||
1846 | atomic_sub(nr_alloc, &txring->nr_free); | |
1847 | ||
1848 | txring->next_to_use = (txring->next_to_use + nr_alloc) & mask; | |
1849 | ||
1850 | return idx; | |
1851 | } | |
1852 | ||
1853 | static void | |
1854 | jme_fill_tx_map(struct pci_dev *pdev, | |
1855 | struct txdesc *txdesc, | |
1856 | struct jme_buffer_info *txbi, | |
1857 | struct page *page, | |
1858 | u32 page_offset, | |
1859 | u32 len, | |
1860 | u8 hidma) | |
1861 | { | |
1862 | dma_addr_t dmaaddr; | |
1863 | ||
1864 | dmaaddr = pci_map_page(pdev, | |
1865 | page, | |
1866 | page_offset, | |
1867 | len, | |
1868 | PCI_DMA_TODEVICE); | |
1869 | ||
1870 | pci_dma_sync_single_for_device(pdev, | |
1871 | dmaaddr, | |
1872 | len, | |
1873 | PCI_DMA_TODEVICE); | |
1874 | ||
1875 | txdesc->dw[0] = 0; | |
1876 | txdesc->dw[1] = 0; | |
1877 | txdesc->desc2.flags = TXFLAG_OWN; | |
1878 | txdesc->desc2.flags |= (hidma) ? TXFLAG_64BIT : 0; | |
1879 | txdesc->desc2.datalen = cpu_to_le16(len); | |
1880 | txdesc->desc2.bufaddrh = cpu_to_le32((__u64)dmaaddr >> 32); | |
1881 | txdesc->desc2.bufaddrl = cpu_to_le32( | |
1882 | (__u64)dmaaddr & 0xFFFFFFFFUL); | |
1883 | ||
1884 | txbi->mapping = dmaaddr; | |
1885 | txbi->len = len; | |
1886 | } | |
1887 | ||
1888 | static void | |
1889 | jme_map_tx_skb(struct jme_adapter *jme, struct sk_buff *skb, int idx) | |
1890 | { | |
eacf69a1 | 1891 | struct jme_ring *txring = &(jme->txring[0]); |
95252236 GFT |
1892 | struct txdesc *txdesc = txring->desc, *ctxdesc; |
1893 | struct jme_buffer_info *txbi = txring->bufinf, *ctxbi; | |
1894 | u8 hidma = jme->dev->features & NETIF_F_HIGHDMA; | |
1895 | int i, nr_frags = skb_shinfo(skb)->nr_frags; | |
1896 | int mask = jme->tx_ring_mask; | |
1897 | struct skb_frag_struct *frag; | |
1898 | u32 len; | |
1899 | ||
1900 | for (i = 0 ; i < nr_frags ; ++i) { | |
1901 | frag = &skb_shinfo(skb)->frags[i]; | |
1902 | ctxdesc = txdesc + ((idx + i + 2) & (mask)); | |
1903 | ctxbi = txbi + ((idx + i + 2) & (mask)); | |
1904 | ||
1905 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, frag->page, | |
1906 | frag->page_offset, frag->size, hidma); | |
1907 | } | |
1908 | ||
1909 | len = skb_is_nonlinear(skb) ? skb_headlen(skb) : skb->len; | |
1910 | ctxdesc = txdesc + ((idx + 1) & (mask)); | |
1911 | ctxbi = txbi + ((idx + 1) & (mask)); | |
1912 | jme_fill_tx_map(jme->pdev, ctxdesc, ctxbi, virt_to_page(skb->data), | |
1913 | offset_in_page(skb->data), len, hidma); | |
1914 | ||
1915 | } | |
1916 | ||
1917 | static int | |
1918 | jme_expand_header(struct jme_adapter *jme, struct sk_buff *skb) | |
1919 | { | |
1920 | if (unlikely(skb_shinfo(skb)->gso_size && | |
1921 | skb_header_cloned(skb) && | |
1922 | pskb_expand_head(skb, 0, 0, GFP_ATOMIC))) { | |
1923 | dev_kfree_skb(skb); | |
1924 | return -1; | |
1925 | } | |
1926 | ||
1927 | return 0; | |
1928 | } | |
1929 | ||
1930 | static int | |
31c221c4 | 1931 | jme_tx_tso(struct sk_buff *skb, __le16 *mss, u8 *flags) |
95252236 | 1932 | { |
31c221c4 | 1933 | *mss = cpu_to_le16(skb_shinfo(skb)->gso_size << TXDESC_MSS_SHIFT); |
95252236 GFT |
1934 | if (*mss) { |
1935 | *flags |= TXFLAG_LSEN; | |
1936 | ||
1937 | if (skb->protocol == htons(ETH_P_IP)) { | |
1938 | struct iphdr *iph = ip_hdr(skb); | |
1939 | ||
1940 | iph->check = 0; | |
1941 | tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, | |
1942 | iph->daddr, 0, | |
1943 | IPPROTO_TCP, | |
1944 | 0); | |
1945 | } else { | |
1946 | struct ipv6hdr *ip6h = ipv6_hdr(skb); | |
1947 | ||
1948 | tcp_hdr(skb)->check = ~csum_ipv6_magic(&ip6h->saddr, | |
1949 | &ip6h->daddr, 0, | |
1950 | IPPROTO_TCP, | |
1951 | 0); | |
1952 | } | |
1953 | ||
1954 | return 0; | |
1955 | } | |
1956 | ||
1957 | return 1; | |
1958 | } | |
1959 | ||
1960 | static void | |
1961 | jme_tx_csum(struct jme_adapter *jme, struct sk_buff *skb, u8 *flags) | |
1962 | { | |
1963 | if (skb->ip_summed == CHECKSUM_PARTIAL) { | |
1964 | u8 ip_proto; | |
1965 | ||
1966 | switch (skb->protocol) { | |
1967 | case htons(ETH_P_IP): | |
1968 | ip_proto = ip_hdr(skb)->protocol; | |
1969 | break; | |
1970 | case htons(ETH_P_IPV6): | |
1971 | ip_proto = ipv6_hdr(skb)->nexthdr; | |
1972 | break; | |
1973 | default: | |
1974 | ip_proto = 0; | |
1975 | break; | |
1976 | } | |
1977 | ||
1978 | switch (ip_proto) { | |
1979 | case IPPROTO_TCP: | |
1980 | *flags |= TXFLAG_TCPCS; | |
1981 | break; | |
1982 | case IPPROTO_UDP: | |
1983 | *flags |= TXFLAG_UDPCS; | |
1984 | break; | |
1985 | default: | |
49d70c48 | 1986 | netif_err(jme, tx_err, jme->dev, "Error upper layer protocol\n"); |
95252236 GFT |
1987 | break; |
1988 | } | |
1989 | } | |
1990 | } | |
1991 | ||
1992 | static inline void | |
31c221c4 | 1993 | jme_tx_vlan(struct sk_buff *skb, __le16 *vlan, u8 *flags) |
95252236 GFT |
1994 | { |
1995 | if (vlan_tx_tag_present(skb)) { | |
1996 | *flags |= TXFLAG_TAGON; | |
31c221c4 | 1997 | *vlan = cpu_to_le16(vlan_tx_tag_get(skb)); |
95252236 GFT |
1998 | } |
1999 | } | |
2000 | ||
2001 | static int | |
7f7fd2da | 2002 | jme_fill_tx_desc(struct jme_adapter *jme, struct sk_buff *skb, int idx) |
95252236 | 2003 | { |
eacf69a1 | 2004 | struct jme_ring *txring = &(jme->txring[0]); |
95252236 GFT |
2005 | struct txdesc *txdesc; |
2006 | struct jme_buffer_info *txbi; | |
2007 | u8 flags; | |
2008 | ||
2009 | txdesc = (struct txdesc *)txring->desc + idx; | |
2010 | txbi = txring->bufinf + idx; | |
2011 | ||
2012 | txdesc->dw[0] = 0; | |
2013 | txdesc->dw[1] = 0; | |
2014 | txdesc->dw[2] = 0; | |
2015 | txdesc->dw[3] = 0; | |
2016 | txdesc->desc1.pktsize = cpu_to_le16(skb->len); | |
2017 | /* | |
2018 | * Set OWN bit at final. | |
2019 | * When kernel transmit faster than NIC. | |
2020 | * And NIC trying to send this descriptor before we tell | |
2021 | * it to start sending this TX queue. | |
2022 | * Other fields are already filled correctly. | |
2023 | */ | |
2024 | wmb(); | |
2025 | flags = TXFLAG_OWN | TXFLAG_INT; | |
2026 | /* | |
2027 | * Set checksum flags while not tso | |
2028 | */ | |
2029 | if (jme_tx_tso(skb, &txdesc->desc1.mss, &flags)) | |
2030 | jme_tx_csum(jme, skb, &flags); | |
2031 | jme_tx_vlan(skb, &txdesc->desc1.vlan, &flags); | |
7f7fd2da | 2032 | jme_map_tx_skb(jme, skb, idx); |
95252236 GFT |
2033 | txdesc->desc1.flags = flags; |
2034 | /* | |
2035 | * Set tx buffer info after telling NIC to send | |
2036 | * For better tx_clean timing | |
2037 | */ | |
2038 | wmb(); | |
2039 | txbi->nr_desc = skb_shinfo(skb)->nr_frags + 2; | |
2040 | txbi->skb = skb; | |
2041 | txbi->len = skb->len; | |
2042 | txbi->start_xmit = jiffies; | |
2043 | if (!txbi->start_xmit) | |
2044 | txbi->start_xmit = (0UL-1); | |
2045 | ||
2046 | return 0; | |
2047 | } | |
2048 | ||
2049 | static void | |
2050 | jme_stop_queue_if_full(struct jme_adapter *jme) | |
2051 | { | |
eacf69a1 | 2052 | struct jme_ring *txring = &(jme->txring[0]); |
95252236 GFT |
2053 | struct jme_buffer_info *txbi = txring->bufinf; |
2054 | int idx = atomic_read(&txring->next_to_clean); | |
2055 | ||
2056 | txbi += idx; | |
2057 | ||
2058 | smp_wmb(); | |
2059 | if (unlikely(atomic_read(&txring->nr_free) < (MAX_SKB_FRAGS+2))) { | |
2060 | netif_stop_queue(jme->dev); | |
49d70c48 | 2061 | netif_info(jme, tx_queued, jme->dev, "TX Queue Paused\n"); |
95252236 GFT |
2062 | smp_wmb(); |
2063 | if (atomic_read(&txring->nr_free) | |
2064 | >= (jme->tx_wake_threshold)) { | |
2065 | netif_wake_queue(jme->dev); | |
49d70c48 | 2066 | netif_info(jme, tx_queued, jme->dev, "TX Queue Fast Waked\n"); |
95252236 GFT |
2067 | } |
2068 | } | |
2069 | ||
2070 | if (unlikely(txbi->start_xmit && | |
2071 | (jiffies - txbi->start_xmit) >= TX_TIMEOUT && | |
2072 | txbi->skb)) { | |
2073 | netif_stop_queue(jme->dev); | |
49d70c48 JP |
2074 | netif_info(jme, tx_queued, jme->dev, |
2075 | "TX Queue Stopped %d@%lu\n", idx, jiffies); | |
95252236 GFT |
2076 | } |
2077 | } | |
2078 | ||
2079 | /* | |
2080 | * This function is already protected by netif_tx_lock() | |
2081 | */ | |
2082 | ||
61357325 | 2083 | static netdev_tx_t |
95252236 GFT |
2084 | jme_start_xmit(struct sk_buff *skb, struct net_device *netdev) |
2085 | { | |
2086 | struct jme_adapter *jme = netdev_priv(netdev); | |
2087 | int idx; | |
2088 | ||
2089 | if (unlikely(jme_expand_header(jme, skb))) { | |
2090 | ++(NET_STAT(jme).tx_dropped); | |
2091 | return NETDEV_TX_OK; | |
2092 | } | |
2093 | ||
2094 | idx = jme_alloc_txdesc(jme, skb); | |
2095 | ||
2096 | if (unlikely(idx < 0)) { | |
2097 | netif_stop_queue(netdev); | |
49d70c48 JP |
2098 | netif_err(jme, tx_err, jme->dev, |
2099 | "BUG! Tx ring full when queue awake!\n"); | |
95252236 GFT |
2100 | |
2101 | return NETDEV_TX_BUSY; | |
2102 | } | |
2103 | ||
7f7fd2da | 2104 | jme_fill_tx_desc(jme, skb, idx); |
95252236 GFT |
2105 | |
2106 | jwrite32(jme, JME_TXCS, jme->reg_txcs | | |
2107 | TXCS_SELECT_QUEUE0 | | |
2108 | TXCS_QUEUE0S | | |
2109 | TXCS_ENABLE); | |
95252236 | 2110 | |
49d70c48 JP |
2111 | tx_dbg(jme, "xmit: %d+%d@%lu\n", |
2112 | idx, skb_shinfo(skb)->nr_frags + 2, jiffies); | |
95252236 GFT |
2113 | jme_stop_queue_if_full(jme); |
2114 | ||
2115 | return NETDEV_TX_OK; | |
2116 | } | |
2117 | ||
8b53abae GFT |
2118 | static void |
2119 | jme_set_unicastaddr(struct net_device *netdev) | |
2120 | { | |
2121 | struct jme_adapter *jme = netdev_priv(netdev); | |
2122 | u32 val; | |
2123 | ||
2124 | val = (netdev->dev_addr[3] & 0xff) << 24 | | |
2125 | (netdev->dev_addr[2] & 0xff) << 16 | | |
2126 | (netdev->dev_addr[1] & 0xff) << 8 | | |
2127 | (netdev->dev_addr[0] & 0xff); | |
2128 | jwrite32(jme, JME_RXUMA_LO, val); | |
2129 | val = (netdev->dev_addr[5] & 0xff) << 8 | | |
2130 | (netdev->dev_addr[4] & 0xff); | |
2131 | jwrite32(jme, JME_RXUMA_HI, val); | |
2132 | } | |
2133 | ||
95252236 GFT |
2134 | static int |
2135 | jme_set_macaddr(struct net_device *netdev, void *p) | |
2136 | { | |
2137 | struct jme_adapter *jme = netdev_priv(netdev); | |
2138 | struct sockaddr *addr = p; | |
95252236 GFT |
2139 | |
2140 | if (netif_running(netdev)) | |
2141 | return -EBUSY; | |
2142 | ||
2143 | spin_lock_bh(&jme->macaddr_lock); | |
2144 | memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len); | |
8b53abae | 2145 | jme_set_unicastaddr(netdev); |
95252236 GFT |
2146 | spin_unlock_bh(&jme->macaddr_lock); |
2147 | ||
2148 | return 0; | |
2149 | } | |
2150 | ||
2151 | static void | |
2152 | jme_set_multi(struct net_device *netdev) | |
2153 | { | |
2154 | struct jme_adapter *jme = netdev_priv(netdev); | |
2155 | u32 mc_hash[2] = {}; | |
95252236 GFT |
2156 | |
2157 | spin_lock_bh(&jme->rxmcs_lock); | |
2158 | ||
2159 | jme->reg_rxmcs |= RXMCS_BRDFRAME | RXMCS_UNIFRAME; | |
2160 | ||
2161 | if (netdev->flags & IFF_PROMISC) { | |
2162 | jme->reg_rxmcs |= RXMCS_ALLFRAME; | |
2163 | } else if (netdev->flags & IFF_ALLMULTI) { | |
2164 | jme->reg_rxmcs |= RXMCS_ALLMULFRAME; | |
2165 | } else if (netdev->flags & IFF_MULTICAST) { | |
22bedad3 | 2166 | struct netdev_hw_addr *ha; |
95252236 GFT |
2167 | int bit_nr; |
2168 | ||
2169 | jme->reg_rxmcs |= RXMCS_MULFRAME | RXMCS_MULFILTERED; | |
22bedad3 JP |
2170 | netdev_for_each_mc_addr(ha, netdev) { |
2171 | bit_nr = ether_crc(ETH_ALEN, ha->addr) & 0x3F; | |
95252236 GFT |
2172 | mc_hash[bit_nr >> 5] |= 1 << (bit_nr & 0x1F); |
2173 | } | |
2174 | ||
2175 | jwrite32(jme, JME_RXMCHT_LO, mc_hash[0]); | |
2176 | jwrite32(jme, JME_RXMCHT_HI, mc_hash[1]); | |
2177 | } | |
2178 | ||
2179 | wmb(); | |
2180 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
2181 | ||
2182 | spin_unlock_bh(&jme->rxmcs_lock); | |
2183 | } | |
2184 | ||
2185 | static int | |
2186 | jme_change_mtu(struct net_device *netdev, int new_mtu) | |
2187 | { | |
2188 | struct jme_adapter *jme = netdev_priv(netdev); | |
2189 | ||
2190 | if (new_mtu == jme->old_mtu) | |
2191 | return 0; | |
2192 | ||
2193 | if (((new_mtu + ETH_HLEN) > MAX_ETHERNET_JUMBO_PACKET_SIZE) || | |
2194 | ((new_mtu) < IPV6_MIN_MTU)) | |
2195 | return -EINVAL; | |
2196 | ||
2197 | if (new_mtu > 4000) { | |
2198 | jme->reg_rxcs &= ~RXCS_FIFOTHNP; | |
2199 | jme->reg_rxcs |= RXCS_FIFOTHNP_64QW; | |
2200 | jme_restart_rx_engine(jme); | |
2201 | } else { | |
2202 | jme->reg_rxcs &= ~RXCS_FIFOTHNP; | |
2203 | jme->reg_rxcs |= RXCS_FIFOTHNP_128QW; | |
2204 | jme_restart_rx_engine(jme); | |
2205 | } | |
2206 | ||
2207 | if (new_mtu > 1900) { | |
79032644 MM |
2208 | netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | |
2209 | NETIF_F_TSO | NETIF_F_TSO6); | |
95252236 GFT |
2210 | } else { |
2211 | if (test_bit(JME_FLAG_TXCSUM, &jme->flags)) | |
79032644 | 2212 | netdev->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; |
95252236 GFT |
2213 | if (test_bit(JME_FLAG_TSO, &jme->flags)) |
2214 | netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; | |
2215 | } | |
2216 | ||
2217 | netdev->mtu = new_mtu; | |
2218 | jme_reset_link(jme); | |
2219 | ||
2220 | return 0; | |
2221 | } | |
2222 | ||
2223 | static void | |
2224 | jme_tx_timeout(struct net_device *netdev) | |
2225 | { | |
2226 | struct jme_adapter *jme = netdev_priv(netdev); | |
2227 | ||
2228 | jme->phylink = 0; | |
2229 | jme_reset_phy_processor(jme); | |
2230 | if (test_bit(JME_FLAG_SSET, &jme->flags)) | |
2231 | jme_set_settings(netdev, &jme->old_ecmd); | |
2232 | ||
2233 | /* | |
2234 | * Force to Reset the link again | |
2235 | */ | |
2236 | jme_reset_link(jme); | |
2237 | } | |
2238 | ||
bf5e5360 GFT |
2239 | static inline void jme_pause_rx(struct jme_adapter *jme) |
2240 | { | |
2241 | atomic_dec(&jme->link_changing); | |
2242 | ||
2243 | jme_set_rx_pcc(jme, PCC_OFF); | |
2244 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { | |
2245 | JME_NAPI_DISABLE(jme); | |
2246 | } else { | |
2247 | tasklet_disable(&jme->rxclean_task); | |
2248 | tasklet_disable(&jme->rxempty_task); | |
2249 | } | |
2250 | } | |
2251 | ||
2252 | static inline void jme_resume_rx(struct jme_adapter *jme) | |
2253 | { | |
2254 | struct dynpcc_info *dpi = &(jme->dpi); | |
2255 | ||
2256 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { | |
2257 | JME_NAPI_ENABLE(jme); | |
2258 | } else { | |
2259 | tasklet_hi_enable(&jme->rxclean_task); | |
2260 | tasklet_hi_enable(&jme->rxempty_task); | |
2261 | } | |
2262 | dpi->cur = PCC_P1; | |
2263 | dpi->attempt = PCC_P1; | |
2264 | dpi->cnt = 0; | |
2265 | jme_set_rx_pcc(jme, PCC_P1); | |
2266 | ||
2267 | atomic_inc(&jme->link_changing); | |
2268 | } | |
2269 | ||
95252236 GFT |
2270 | static void |
2271 | jme_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp) | |
2272 | { | |
2273 | struct jme_adapter *jme = netdev_priv(netdev); | |
2274 | ||
bf5e5360 | 2275 | jme_pause_rx(jme); |
95252236 | 2276 | jme->vlgrp = grp; |
bf5e5360 | 2277 | jme_resume_rx(jme); |
95252236 GFT |
2278 | } |
2279 | ||
2280 | static void | |
2281 | jme_get_drvinfo(struct net_device *netdev, | |
2282 | struct ethtool_drvinfo *info) | |
2283 | { | |
2284 | struct jme_adapter *jme = netdev_priv(netdev); | |
2285 | ||
2286 | strcpy(info->driver, DRV_NAME); | |
2287 | strcpy(info->version, DRV_VERSION); | |
2288 | strcpy(info->bus_info, pci_name(jme->pdev)); | |
2289 | } | |
2290 | ||
2291 | static int | |
2292 | jme_get_regs_len(struct net_device *netdev) | |
2293 | { | |
2294 | return JME_REG_LEN; | |
2295 | } | |
2296 | ||
2297 | static void | |
2298 | mmapio_memcpy(struct jme_adapter *jme, u32 *p, u32 reg, int len) | |
2299 | { | |
2300 | int i; | |
2301 | ||
2302 | for (i = 0 ; i < len ; i += 4) | |
2303 | p[i >> 2] = jread32(jme, reg + i); | |
2304 | } | |
2305 | ||
2306 | static void | |
2307 | mdio_memcpy(struct jme_adapter *jme, u32 *p, int reg_nr) | |
2308 | { | |
2309 | int i; | |
2310 | u16 *p16 = (u16 *)p; | |
2311 | ||
2312 | for (i = 0 ; i < reg_nr ; ++i) | |
2313 | p16[i] = jme_mdio_read(jme->dev, jme->mii_if.phy_id, i); | |
2314 | } | |
2315 | ||
2316 | static void | |
2317 | jme_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p) | |
2318 | { | |
2319 | struct jme_adapter *jme = netdev_priv(netdev); | |
2320 | u32 *p32 = (u32 *)p; | |
2321 | ||
2322 | memset(p, 0xFF, JME_REG_LEN); | |
2323 | ||
2324 | regs->version = 1; | |
2325 | mmapio_memcpy(jme, p32, JME_MAC, JME_MAC_LEN); | |
2326 | ||
2327 | p32 += 0x100 >> 2; | |
2328 | mmapio_memcpy(jme, p32, JME_PHY, JME_PHY_LEN); | |
2329 | ||
2330 | p32 += 0x100 >> 2; | |
2331 | mmapio_memcpy(jme, p32, JME_MISC, JME_MISC_LEN); | |
2332 | ||
2333 | p32 += 0x100 >> 2; | |
2334 | mmapio_memcpy(jme, p32, JME_RSS, JME_RSS_LEN); | |
2335 | ||
2336 | p32 += 0x100 >> 2; | |
2337 | mdio_memcpy(jme, p32, JME_PHY_REG_NR); | |
2338 | } | |
2339 | ||
2340 | static int | |
2341 | jme_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) | |
2342 | { | |
2343 | struct jme_adapter *jme = netdev_priv(netdev); | |
2344 | ||
2345 | ecmd->tx_coalesce_usecs = PCC_TX_TO; | |
2346 | ecmd->tx_max_coalesced_frames = PCC_TX_CNT; | |
2347 | ||
2348 | if (test_bit(JME_FLAG_POLL, &jme->flags)) { | |
2349 | ecmd->use_adaptive_rx_coalesce = false; | |
2350 | ecmd->rx_coalesce_usecs = 0; | |
2351 | ecmd->rx_max_coalesced_frames = 0; | |
2352 | return 0; | |
2353 | } | |
2354 | ||
2355 | ecmd->use_adaptive_rx_coalesce = true; | |
2356 | ||
2357 | switch (jme->dpi.cur) { | |
2358 | case PCC_P1: | |
2359 | ecmd->rx_coalesce_usecs = PCC_P1_TO; | |
2360 | ecmd->rx_max_coalesced_frames = PCC_P1_CNT; | |
2361 | break; | |
2362 | case PCC_P2: | |
2363 | ecmd->rx_coalesce_usecs = PCC_P2_TO; | |
2364 | ecmd->rx_max_coalesced_frames = PCC_P2_CNT; | |
2365 | break; | |
2366 | case PCC_P3: | |
2367 | ecmd->rx_coalesce_usecs = PCC_P3_TO; | |
2368 | ecmd->rx_max_coalesced_frames = PCC_P3_CNT; | |
2369 | break; | |
2370 | default: | |
2371 | break; | |
2372 | } | |
2373 | ||
2374 | return 0; | |
2375 | } | |
2376 | ||
2377 | static int | |
2378 | jme_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *ecmd) | |
2379 | { | |
2380 | struct jme_adapter *jme = netdev_priv(netdev); | |
2381 | struct dynpcc_info *dpi = &(jme->dpi); | |
2382 | ||
2383 | if (netif_running(netdev)) | |
2384 | return -EBUSY; | |
2385 | ||
8e95a202 JP |
2386 | if (ecmd->use_adaptive_rx_coalesce && |
2387 | test_bit(JME_FLAG_POLL, &jme->flags)) { | |
95252236 GFT |
2388 | clear_bit(JME_FLAG_POLL, &jme->flags); |
2389 | jme->jme_rx = netif_rx; | |
2390 | jme->jme_vlan_rx = vlan_hwaccel_rx; | |
2391 | dpi->cur = PCC_P1; | |
2392 | dpi->attempt = PCC_P1; | |
2393 | dpi->cnt = 0; | |
2394 | jme_set_rx_pcc(jme, PCC_P1); | |
2395 | jme_interrupt_mode(jme); | |
8e95a202 JP |
2396 | } else if (!(ecmd->use_adaptive_rx_coalesce) && |
2397 | !(test_bit(JME_FLAG_POLL, &jme->flags))) { | |
95252236 GFT |
2398 | set_bit(JME_FLAG_POLL, &jme->flags); |
2399 | jme->jme_rx = netif_receive_skb; | |
2400 | jme->jme_vlan_rx = vlan_hwaccel_receive_skb; | |
2401 | jme_interrupt_mode(jme); | |
2402 | } | |
2403 | ||
2404 | return 0; | |
2405 | } | |
2406 | ||
2407 | static void | |
2408 | jme_get_pauseparam(struct net_device *netdev, | |
2409 | struct ethtool_pauseparam *ecmd) | |
2410 | { | |
2411 | struct jme_adapter *jme = netdev_priv(netdev); | |
2412 | u32 val; | |
2413 | ||
2414 | ecmd->tx_pause = (jme->reg_txpfc & TXPFC_PF_EN) != 0; | |
2415 | ecmd->rx_pause = (jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0; | |
2416 | ||
2417 | spin_lock_bh(&jme->phy_lock); | |
2418 | val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); | |
2419 | spin_unlock_bh(&jme->phy_lock); | |
2420 | ||
2421 | ecmd->autoneg = | |
2422 | (val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0; | |
2423 | } | |
2424 | ||
2425 | static int | |
2426 | jme_set_pauseparam(struct net_device *netdev, | |
2427 | struct ethtool_pauseparam *ecmd) | |
2428 | { | |
2429 | struct jme_adapter *jme = netdev_priv(netdev); | |
2430 | u32 val; | |
2431 | ||
2432 | if (((jme->reg_txpfc & TXPFC_PF_EN) != 0) ^ | |
2433 | (ecmd->tx_pause != 0)) { | |
2434 | ||
2435 | if (ecmd->tx_pause) | |
2436 | jme->reg_txpfc |= TXPFC_PF_EN; | |
2437 | else | |
2438 | jme->reg_txpfc &= ~TXPFC_PF_EN; | |
2439 | ||
2440 | jwrite32(jme, JME_TXPFC, jme->reg_txpfc); | |
2441 | } | |
2442 | ||
2443 | spin_lock_bh(&jme->rxmcs_lock); | |
2444 | if (((jme->reg_rxmcs & RXMCS_FLOWCTRL) != 0) ^ | |
2445 | (ecmd->rx_pause != 0)) { | |
2446 | ||
2447 | if (ecmd->rx_pause) | |
2448 | jme->reg_rxmcs |= RXMCS_FLOWCTRL; | |
2449 | else | |
2450 | jme->reg_rxmcs &= ~RXMCS_FLOWCTRL; | |
2451 | ||
2452 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
2453 | } | |
2454 | spin_unlock_bh(&jme->rxmcs_lock); | |
2455 | ||
2456 | spin_lock_bh(&jme->phy_lock); | |
2457 | val = jme_mdio_read(jme->dev, jme->mii_if.phy_id, MII_ADVERTISE); | |
2458 | if (((val & (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)) != 0) ^ | |
2459 | (ecmd->autoneg != 0)) { | |
2460 | ||
2461 | if (ecmd->autoneg) | |
2462 | val |= (ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
2463 | else | |
2464 | val &= ~(ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); | |
2465 | ||
2466 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, | |
2467 | MII_ADVERTISE, val); | |
2468 | } | |
2469 | spin_unlock_bh(&jme->phy_lock); | |
2470 | ||
2471 | return 0; | |
2472 | } | |
2473 | ||
2474 | static void | |
2475 | jme_get_wol(struct net_device *netdev, | |
2476 | struct ethtool_wolinfo *wol) | |
2477 | { | |
2478 | struct jme_adapter *jme = netdev_priv(netdev); | |
2479 | ||
2480 | wol->supported = WAKE_MAGIC | WAKE_PHY; | |
2481 | ||
2482 | wol->wolopts = 0; | |
2483 | ||
2484 | if (jme->reg_pmcs & (PMCS_LFEN | PMCS_LREN)) | |
2485 | wol->wolopts |= WAKE_PHY; | |
2486 | ||
2487 | if (jme->reg_pmcs & PMCS_MFEN) | |
2488 | wol->wolopts |= WAKE_MAGIC; | |
2489 | ||
2490 | } | |
2491 | ||
2492 | static int | |
2493 | jme_set_wol(struct net_device *netdev, | |
2494 | struct ethtool_wolinfo *wol) | |
2495 | { | |
2496 | struct jme_adapter *jme = netdev_priv(netdev); | |
2497 | ||
2498 | if (wol->wolopts & (WAKE_MAGICSECURE | | |
2499 | WAKE_UCAST | | |
2500 | WAKE_MCAST | | |
2501 | WAKE_BCAST | | |
2502 | WAKE_ARP)) | |
2503 | return -EOPNOTSUPP; | |
2504 | ||
2505 | jme->reg_pmcs = 0; | |
2506 | ||
2507 | if (wol->wolopts & WAKE_PHY) | |
2508 | jme->reg_pmcs |= PMCS_LFEN | PMCS_LREN; | |
2509 | ||
2510 | if (wol->wolopts & WAKE_MAGIC) | |
2511 | jme->reg_pmcs |= PMCS_MFEN; | |
2512 | ||
2513 | jwrite32(jme, JME_PMCS, jme->reg_pmcs); | |
2514 | ||
2515 | return 0; | |
2516 | } | |
2517 | ||
2518 | static int | |
2519 | jme_get_settings(struct net_device *netdev, | |
2520 | struct ethtool_cmd *ecmd) | |
2521 | { | |
2522 | struct jme_adapter *jme = netdev_priv(netdev); | |
2523 | int rc; | |
2524 | ||
2525 | spin_lock_bh(&jme->phy_lock); | |
2526 | rc = mii_ethtool_gset(&(jme->mii_if), ecmd); | |
2527 | spin_unlock_bh(&jme->phy_lock); | |
2528 | return rc; | |
2529 | } | |
2530 | ||
2531 | static int | |
2532 | jme_set_settings(struct net_device *netdev, | |
2533 | struct ethtool_cmd *ecmd) | |
2534 | { | |
2535 | struct jme_adapter *jme = netdev_priv(netdev); | |
2536 | int rc, fdc = 0; | |
2537 | ||
2538 | if (ecmd->speed == SPEED_1000 && ecmd->autoneg != AUTONEG_ENABLE) | |
2539 | return -EINVAL; | |
2540 | ||
3ee94018 GFT |
2541 | /* |
2542 | * Check If user changed duplex only while force_media. | |
2543 | * Hardware would not generate link change interrupt. | |
2544 | */ | |
95252236 GFT |
2545 | if (jme->mii_if.force_media && |
2546 | ecmd->autoneg != AUTONEG_ENABLE && | |
2547 | (jme->mii_if.full_duplex != ecmd->duplex)) | |
2548 | fdc = 1; | |
2549 | ||
2550 | spin_lock_bh(&jme->phy_lock); | |
2551 | rc = mii_ethtool_sset(&(jme->mii_if), ecmd); | |
2552 | spin_unlock_bh(&jme->phy_lock); | |
2553 | ||
95252236 | 2554 | if (!rc) { |
3ee94018 GFT |
2555 | if (fdc) |
2556 | jme_reset_link(jme); | |
95252236 | 2557 | jme->old_ecmd = *ecmd; |
334fbbb7 GFT |
2558 | set_bit(JME_FLAG_SSET, &jme->flags); |
2559 | } | |
2560 | ||
2561 | return rc; | |
2562 | } | |
2563 | ||
2564 | static int | |
2565 | jme_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) | |
2566 | { | |
2567 | int rc; | |
2568 | struct jme_adapter *jme = netdev_priv(netdev); | |
2569 | struct mii_ioctl_data *mii_data = if_mii(rq); | |
2570 | unsigned int duplex_chg; | |
2571 | ||
2572 | if (cmd == SIOCSMIIREG) { | |
2573 | u16 val = mii_data->val_in; | |
2574 | if (!(val & (BMCR_RESET|BMCR_ANENABLE)) && | |
2575 | (val & BMCR_SPEED1000)) | |
2576 | return -EINVAL; | |
2577 | } | |
2578 | ||
2579 | spin_lock_bh(&jme->phy_lock); | |
2580 | rc = generic_mii_ioctl(&jme->mii_if, mii_data, cmd, &duplex_chg); | |
2581 | spin_unlock_bh(&jme->phy_lock); | |
2582 | ||
2583 | if (!rc && (cmd == SIOCSMIIREG)) { | |
2584 | if (duplex_chg) | |
2585 | jme_reset_link(jme); | |
2586 | jme_get_settings(netdev, &jme->old_ecmd); | |
2587 | set_bit(JME_FLAG_SSET, &jme->flags); | |
95252236 GFT |
2588 | } |
2589 | ||
2590 | return rc; | |
2591 | } | |
2592 | ||
2593 | static u32 | |
2594 | jme_get_link(struct net_device *netdev) | |
2595 | { | |
2596 | struct jme_adapter *jme = netdev_priv(netdev); | |
2597 | return jread32(jme, JME_PHY_LINK) & PHY_LINK_UP; | |
2598 | } | |
2599 | ||
2600 | static u32 | |
2601 | jme_get_msglevel(struct net_device *netdev) | |
2602 | { | |
2603 | struct jme_adapter *jme = netdev_priv(netdev); | |
2604 | return jme->msg_enable; | |
2605 | } | |
2606 | ||
2607 | static void | |
2608 | jme_set_msglevel(struct net_device *netdev, u32 value) | |
2609 | { | |
2610 | struct jme_adapter *jme = netdev_priv(netdev); | |
2611 | jme->msg_enable = value; | |
2612 | } | |
2613 | ||
2614 | static u32 | |
2615 | jme_get_rx_csum(struct net_device *netdev) | |
2616 | { | |
2617 | struct jme_adapter *jme = netdev_priv(netdev); | |
2618 | return jme->reg_rxmcs & RXMCS_CHECKSUM; | |
2619 | } | |
2620 | ||
2621 | static int | |
2622 | jme_set_rx_csum(struct net_device *netdev, u32 on) | |
2623 | { | |
2624 | struct jme_adapter *jme = netdev_priv(netdev); | |
2625 | ||
2626 | spin_lock_bh(&jme->rxmcs_lock); | |
2627 | if (on) | |
2628 | jme->reg_rxmcs |= RXMCS_CHECKSUM; | |
2629 | else | |
2630 | jme->reg_rxmcs &= ~RXMCS_CHECKSUM; | |
2631 | jwrite32(jme, JME_RXMCS, jme->reg_rxmcs); | |
2632 | spin_unlock_bh(&jme->rxmcs_lock); | |
2633 | ||
2634 | return 0; | |
2635 | } | |
2636 | ||
2637 | static int | |
2638 | jme_set_tx_csum(struct net_device *netdev, u32 on) | |
2639 | { | |
2640 | struct jme_adapter *jme = netdev_priv(netdev); | |
2641 | ||
2642 | if (on) { | |
2643 | set_bit(JME_FLAG_TXCSUM, &jme->flags); | |
2644 | if (netdev->mtu <= 1900) | |
79032644 MM |
2645 | netdev->features |= |
2646 | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; | |
95252236 GFT |
2647 | } else { |
2648 | clear_bit(JME_FLAG_TXCSUM, &jme->flags); | |
79032644 MM |
2649 | netdev->features &= |
2650 | ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM); | |
95252236 GFT |
2651 | } |
2652 | ||
2653 | return 0; | |
2654 | } | |
2655 | ||
2656 | static int | |
2657 | jme_set_tso(struct net_device *netdev, u32 on) | |
2658 | { | |
2659 | struct jme_adapter *jme = netdev_priv(netdev); | |
2660 | ||
2661 | if (on) { | |
2662 | set_bit(JME_FLAG_TSO, &jme->flags); | |
2663 | if (netdev->mtu <= 1900) | |
2664 | netdev->features |= NETIF_F_TSO | NETIF_F_TSO6; | |
2665 | } else { | |
2666 | clear_bit(JME_FLAG_TSO, &jme->flags); | |
2667 | netdev->features &= ~(NETIF_F_TSO | NETIF_F_TSO6); | |
2668 | } | |
2669 | ||
2670 | return 0; | |
2671 | } | |
2672 | ||
2673 | static int | |
2674 | jme_nway_reset(struct net_device *netdev) | |
2675 | { | |
2676 | struct jme_adapter *jme = netdev_priv(netdev); | |
2677 | jme_restart_an(jme); | |
2678 | return 0; | |
2679 | } | |
2680 | ||
2681 | static u8 | |
2682 | jme_smb_read(struct jme_adapter *jme, unsigned int addr) | |
2683 | { | |
2684 | u32 val; | |
2685 | int to; | |
2686 | ||
2687 | val = jread32(jme, JME_SMBCSR); | |
2688 | to = JME_SMB_BUSY_TIMEOUT; | |
2689 | while ((val & SMBCSR_BUSY) && --to) { | |
2690 | msleep(1); | |
2691 | val = jread32(jme, JME_SMBCSR); | |
2692 | } | |
2693 | if (!to) { | |
49d70c48 | 2694 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
95252236 GFT |
2695 | return 0xFF; |
2696 | } | |
2697 | ||
2698 | jwrite32(jme, JME_SMBINTF, | |
2699 | ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) | | |
2700 | SMBINTF_HWRWN_READ | | |
2701 | SMBINTF_HWCMD); | |
2702 | ||
2703 | val = jread32(jme, JME_SMBINTF); | |
2704 | to = JME_SMB_BUSY_TIMEOUT; | |
2705 | while ((val & SMBINTF_HWCMD) && --to) { | |
2706 | msleep(1); | |
2707 | val = jread32(jme, JME_SMBINTF); | |
2708 | } | |
2709 | if (!to) { | |
49d70c48 | 2710 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
95252236 GFT |
2711 | return 0xFF; |
2712 | } | |
2713 | ||
2714 | return (val & SMBINTF_HWDATR) >> SMBINTF_HWDATR_SHIFT; | |
2715 | } | |
2716 | ||
2717 | static void | |
2718 | jme_smb_write(struct jme_adapter *jme, unsigned int addr, u8 data) | |
2719 | { | |
2720 | u32 val; | |
2721 | int to; | |
2722 | ||
2723 | val = jread32(jme, JME_SMBCSR); | |
2724 | to = JME_SMB_BUSY_TIMEOUT; | |
2725 | while ((val & SMBCSR_BUSY) && --to) { | |
2726 | msleep(1); | |
2727 | val = jread32(jme, JME_SMBCSR); | |
2728 | } | |
2729 | if (!to) { | |
49d70c48 | 2730 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
95252236 GFT |
2731 | return; |
2732 | } | |
2733 | ||
2734 | jwrite32(jme, JME_SMBINTF, | |
2735 | ((data << SMBINTF_HWDATW_SHIFT) & SMBINTF_HWDATW) | | |
2736 | ((addr << SMBINTF_HWADDR_SHIFT) & SMBINTF_HWADDR) | | |
2737 | SMBINTF_HWRWN_WRITE | | |
2738 | SMBINTF_HWCMD); | |
2739 | ||
2740 | val = jread32(jme, JME_SMBINTF); | |
2741 | to = JME_SMB_BUSY_TIMEOUT; | |
2742 | while ((val & SMBINTF_HWCMD) && --to) { | |
2743 | msleep(1); | |
2744 | val = jread32(jme, JME_SMBINTF); | |
2745 | } | |
2746 | if (!to) { | |
49d70c48 | 2747 | netif_err(jme, hw, jme->dev, "SMB Bus Busy\n"); |
95252236 GFT |
2748 | return; |
2749 | } | |
2750 | ||
2751 | mdelay(2); | |
2752 | } | |
2753 | ||
2754 | static int | |
2755 | jme_get_eeprom_len(struct net_device *netdev) | |
2756 | { | |
2757 | struct jme_adapter *jme = netdev_priv(netdev); | |
2758 | u32 val; | |
2759 | val = jread32(jme, JME_SMBCSR); | |
2760 | return (val & SMBCSR_EEPROMD) ? JME_SMB_LEN : 0; | |
2761 | } | |
2762 | ||
2763 | static int | |
2764 | jme_get_eeprom(struct net_device *netdev, | |
2765 | struct ethtool_eeprom *eeprom, u8 *data) | |
2766 | { | |
2767 | struct jme_adapter *jme = netdev_priv(netdev); | |
2768 | int i, offset = eeprom->offset, len = eeprom->len; | |
2769 | ||
2770 | /* | |
2771 | * ethtool will check the boundary for us | |
2772 | */ | |
2773 | eeprom->magic = JME_EEPROM_MAGIC; | |
2774 | for (i = 0 ; i < len ; ++i) | |
2775 | data[i] = jme_smb_read(jme, i + offset); | |
2776 | ||
2777 | return 0; | |
2778 | } | |
2779 | ||
2780 | static int | |
2781 | jme_set_eeprom(struct net_device *netdev, | |
2782 | struct ethtool_eeprom *eeprom, u8 *data) | |
2783 | { | |
2784 | struct jme_adapter *jme = netdev_priv(netdev); | |
2785 | int i, offset = eeprom->offset, len = eeprom->len; | |
2786 | ||
2787 | if (eeprom->magic != JME_EEPROM_MAGIC) | |
2788 | return -EINVAL; | |
2789 | ||
2790 | /* | |
2791 | * ethtool will check the boundary for us | |
2792 | */ | |
2793 | for (i = 0 ; i < len ; ++i) | |
2794 | jme_smb_write(jme, i + offset, data[i]); | |
2795 | ||
2796 | return 0; | |
2797 | } | |
2798 | ||
2799 | static const struct ethtool_ops jme_ethtool_ops = { | |
2800 | .get_drvinfo = jme_get_drvinfo, | |
2801 | .get_regs_len = jme_get_regs_len, | |
2802 | .get_regs = jme_get_regs, | |
2803 | .get_coalesce = jme_get_coalesce, | |
2804 | .set_coalesce = jme_set_coalesce, | |
2805 | .get_pauseparam = jme_get_pauseparam, | |
2806 | .set_pauseparam = jme_set_pauseparam, | |
2807 | .get_wol = jme_get_wol, | |
2808 | .set_wol = jme_set_wol, | |
2809 | .get_settings = jme_get_settings, | |
2810 | .set_settings = jme_set_settings, | |
2811 | .get_link = jme_get_link, | |
2812 | .get_msglevel = jme_get_msglevel, | |
2813 | .set_msglevel = jme_set_msglevel, | |
2814 | .get_rx_csum = jme_get_rx_csum, | |
2815 | .set_rx_csum = jme_set_rx_csum, | |
2816 | .set_tx_csum = jme_set_tx_csum, | |
2817 | .set_tso = jme_set_tso, | |
2818 | .set_sg = ethtool_op_set_sg, | |
2819 | .nway_reset = jme_nway_reset, | |
2820 | .get_eeprom_len = jme_get_eeprom_len, | |
2821 | .get_eeprom = jme_get_eeprom, | |
2822 | .set_eeprom = jme_set_eeprom, | |
2823 | }; | |
2824 | ||
2825 | static int | |
2826 | jme_pci_dma64(struct pci_dev *pdev) | |
2827 | { | |
814c01dc | 2828 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 && |
e930438c YH |
2829 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) |
2830 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) | |
814c01dc GFT |
2831 | return 1; |
2832 | ||
2833 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250 && | |
e930438c YH |
2834 | !pci_set_dma_mask(pdev, DMA_BIT_MASK(40))) |
2835 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40))) | |
814c01dc GFT |
2836 | return 1; |
2837 | ||
284901a9 YH |
2838 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) |
2839 | if (!pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) | |
95252236 GFT |
2840 | return 0; |
2841 | ||
2842 | return -1; | |
2843 | } | |
2844 | ||
2845 | static inline void | |
2846 | jme_phy_init(struct jme_adapter *jme) | |
2847 | { | |
2848 | u16 reg26; | |
2849 | ||
2850 | reg26 = jme_mdio_read(jme->dev, jme->mii_if.phy_id, 26); | |
2851 | jme_mdio_write(jme->dev, jme->mii_if.phy_id, 26, reg26 | 0x1000); | |
2852 | } | |
2853 | ||
2854 | static inline void | |
2855 | jme_check_hw_ver(struct jme_adapter *jme) | |
2856 | { | |
2857 | u32 chipmode; | |
2858 | ||
2859 | chipmode = jread32(jme, JME_CHIPMODE); | |
2860 | ||
2861 | jme->fpgaver = (chipmode & CM_FPGAVER_MASK) >> CM_FPGAVER_SHIFT; | |
2862 | jme->chiprev = (chipmode & CM_CHIPREV_MASK) >> CM_CHIPREV_SHIFT; | |
19d96017 GFT |
2863 | jme->chip_main_rev = jme->chiprev & 0xF; |
2864 | jme->chip_sub_rev = (jme->chiprev >> 4) & 0xF; | |
95252236 GFT |
2865 | } |
2866 | ||
e48714ba SH |
2867 | static const struct net_device_ops jme_netdev_ops = { |
2868 | .ndo_open = jme_open, | |
2869 | .ndo_stop = jme_close, | |
2870 | .ndo_validate_addr = eth_validate_addr, | |
334fbbb7 | 2871 | .ndo_do_ioctl = jme_ioctl, |
e48714ba SH |
2872 | .ndo_start_xmit = jme_start_xmit, |
2873 | .ndo_set_mac_address = jme_set_macaddr, | |
2874 | .ndo_set_multicast_list = jme_set_multi, | |
2875 | .ndo_change_mtu = jme_change_mtu, | |
2876 | .ndo_tx_timeout = jme_tx_timeout, | |
2877 | .ndo_vlan_rx_register = jme_vlan_rx_register, | |
2878 | }; | |
2879 | ||
95252236 GFT |
2880 | static int __devinit |
2881 | jme_init_one(struct pci_dev *pdev, | |
2882 | const struct pci_device_id *ent) | |
2883 | { | |
2884 | int rc = 0, using_dac, i; | |
2885 | struct net_device *netdev; | |
2886 | struct jme_adapter *jme; | |
2887 | u16 bmcr, bmsr; | |
2888 | u32 apmc; | |
2889 | ||
2890 | /* | |
2891 | * set up PCI device basics | |
2892 | */ | |
2893 | rc = pci_enable_device(pdev); | |
2894 | if (rc) { | |
49d70c48 | 2895 | pr_err("Cannot enable PCI device\n"); |
95252236 GFT |
2896 | goto err_out; |
2897 | } | |
2898 | ||
2899 | using_dac = jme_pci_dma64(pdev); | |
2900 | if (using_dac < 0) { | |
49d70c48 | 2901 | pr_err("Cannot set PCI DMA Mask\n"); |
95252236 GFT |
2902 | rc = -EIO; |
2903 | goto err_out_disable_pdev; | |
2904 | } | |
2905 | ||
2906 | if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { | |
49d70c48 | 2907 | pr_err("No PCI resource region found\n"); |
95252236 GFT |
2908 | rc = -ENOMEM; |
2909 | goto err_out_disable_pdev; | |
2910 | } | |
2911 | ||
2912 | rc = pci_request_regions(pdev, DRV_NAME); | |
2913 | if (rc) { | |
49d70c48 | 2914 | pr_err("Cannot obtain PCI resource region\n"); |
95252236 GFT |
2915 | goto err_out_disable_pdev; |
2916 | } | |
2917 | ||
2918 | pci_set_master(pdev); | |
2919 | ||
2920 | /* | |
2921 | * alloc and init net device | |
2922 | */ | |
2923 | netdev = alloc_etherdev(sizeof(*jme)); | |
2924 | if (!netdev) { | |
49d70c48 | 2925 | pr_err("Cannot allocate netdev structure\n"); |
95252236 GFT |
2926 | rc = -ENOMEM; |
2927 | goto err_out_release_regions; | |
2928 | } | |
e48714ba | 2929 | netdev->netdev_ops = &jme_netdev_ops; |
95252236 | 2930 | netdev->ethtool_ops = &jme_ethtool_ops; |
95252236 | 2931 | netdev->watchdog_timeo = TX_TIMEOUT; |
79032644 MM |
2932 | netdev->features = NETIF_F_IP_CSUM | |
2933 | NETIF_F_IPV6_CSUM | | |
95252236 GFT |
2934 | NETIF_F_SG | |
2935 | NETIF_F_TSO | | |
2936 | NETIF_F_TSO6 | | |
2937 | NETIF_F_HW_VLAN_TX | | |
2938 | NETIF_F_HW_VLAN_RX; | |
2939 | if (using_dac) | |
2940 | netdev->features |= NETIF_F_HIGHDMA; | |
2941 | ||
2942 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
2943 | pci_set_drvdata(pdev, netdev); | |
2944 | ||
2945 | /* | |
2946 | * init adapter info | |
2947 | */ | |
2948 | jme = netdev_priv(netdev); | |
2949 | jme->pdev = pdev; | |
2950 | jme->dev = netdev; | |
2951 | jme->jme_rx = netif_rx; | |
2952 | jme->jme_vlan_rx = vlan_hwaccel_rx; | |
2953 | jme->old_mtu = netdev->mtu = 1500; | |
2954 | jme->phylink = 0; | |
2955 | jme->tx_ring_size = 1 << 10; | |
2956 | jme->tx_ring_mask = jme->tx_ring_size - 1; | |
2957 | jme->tx_wake_threshold = 1 << 9; | |
2958 | jme->rx_ring_size = 1 << 9; | |
2959 | jme->rx_ring_mask = jme->rx_ring_size - 1; | |
2960 | jme->msg_enable = JME_DEF_MSG_ENABLE; | |
2961 | jme->regs = ioremap(pci_resource_start(pdev, 0), | |
2962 | pci_resource_len(pdev, 0)); | |
2963 | if (!(jme->regs)) { | |
49d70c48 | 2964 | pr_err("Mapping PCI resource region error\n"); |
95252236 GFT |
2965 | rc = -ENOMEM; |
2966 | goto err_out_free_netdev; | |
2967 | } | |
95252236 GFT |
2968 | |
2969 | if (no_pseudohp) { | |
2970 | apmc = jread32(jme, JME_APMC) & ~JME_APMC_PSEUDO_HP_EN; | |
2971 | jwrite32(jme, JME_APMC, apmc); | |
2972 | } else if (force_pseudohp) { | |
2973 | apmc = jread32(jme, JME_APMC) | JME_APMC_PSEUDO_HP_EN; | |
2974 | jwrite32(jme, JME_APMC, apmc); | |
2975 | } | |
2976 | ||
2977 | NETIF_NAPI_SET(netdev, &jme->napi, jme_poll, jme->rx_ring_size >> 2) | |
2978 | ||
2979 | spin_lock_init(&jme->phy_lock); | |
2980 | spin_lock_init(&jme->macaddr_lock); | |
2981 | spin_lock_init(&jme->rxmcs_lock); | |
2982 | ||
2983 | atomic_set(&jme->link_changing, 1); | |
2984 | atomic_set(&jme->rx_cleaning, 1); | |
2985 | atomic_set(&jme->tx_cleaning, 1); | |
2986 | atomic_set(&jme->rx_empty, 1); | |
2987 | ||
2988 | tasklet_init(&jme->pcc_task, | |
164165da | 2989 | jme_pcc_tasklet, |
95252236 GFT |
2990 | (unsigned long) jme); |
2991 | tasklet_init(&jme->linkch_task, | |
164165da | 2992 | jme_link_change_tasklet, |
95252236 GFT |
2993 | (unsigned long) jme); |
2994 | tasklet_init(&jme->txclean_task, | |
164165da | 2995 | jme_tx_clean_tasklet, |
95252236 GFT |
2996 | (unsigned long) jme); |
2997 | tasklet_init(&jme->rxclean_task, | |
164165da | 2998 | jme_rx_clean_tasklet, |
95252236 GFT |
2999 | (unsigned long) jme); |
3000 | tasklet_init(&jme->rxempty_task, | |
164165da | 3001 | jme_rx_empty_tasklet, |
95252236 | 3002 | (unsigned long) jme); |
38ed0c21 | 3003 | tasklet_disable_nosync(&jme->linkch_task); |
95252236 GFT |
3004 | tasklet_disable_nosync(&jme->txclean_task); |
3005 | tasklet_disable_nosync(&jme->rxclean_task); | |
3006 | tasklet_disable_nosync(&jme->rxempty_task); | |
3007 | jme->dpi.cur = PCC_P1; | |
3008 | ||
3009 | jme->reg_ghc = 0; | |
3010 | jme->reg_rxcs = RXCS_DEFAULT; | |
3011 | jme->reg_rxmcs = RXMCS_DEFAULT; | |
3012 | jme->reg_txpfc = 0; | |
3013 | jme->reg_pmcs = PMCS_MFEN; | |
854a2e7c | 3014 | jme->reg_gpreg1 = GPREG1_DEFAULT; |
95252236 GFT |
3015 | set_bit(JME_FLAG_TXCSUM, &jme->flags); |
3016 | set_bit(JME_FLAG_TSO, &jme->flags); | |
3017 | ||
3018 | /* | |
3019 | * Get Max Read Req Size from PCI Config Space | |
3020 | */ | |
3021 | pci_read_config_byte(pdev, PCI_DCSR_MRRS, &jme->mrrs); | |
3022 | jme->mrrs &= PCI_DCSR_MRRS_MASK; | |
3023 | switch (jme->mrrs) { | |
3024 | case MRRS_128B: | |
3025 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_128B; | |
3026 | break; | |
3027 | case MRRS_256B: | |
3028 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_256B; | |
3029 | break; | |
3030 | default: | |
3031 | jme->reg_txcs = TXCS_DEFAULT | TXCS_DMASIZE_512B; | |
3032 | break; | |
ee289b64 | 3033 | } |
95252236 GFT |
3034 | |
3035 | /* | |
3036 | * Must check before reset_mac_processor | |
3037 | */ | |
3038 | jme_check_hw_ver(jme); | |
3039 | jme->mii_if.dev = netdev; | |
3040 | if (jme->fpgaver) { | |
3041 | jme->mii_if.phy_id = 0; | |
3042 | for (i = 1 ; i < 32 ; ++i) { | |
3043 | bmcr = jme_mdio_read(netdev, i, MII_BMCR); | |
3044 | bmsr = jme_mdio_read(netdev, i, MII_BMSR); | |
3045 | if (bmcr != 0xFFFFU && (bmcr != 0 || bmsr != 0)) { | |
3046 | jme->mii_if.phy_id = i; | |
3047 | break; | |
3048 | } | |
3049 | } | |
3050 | ||
3051 | if (!jme->mii_if.phy_id) { | |
3052 | rc = -EIO; | |
49d70c48 JP |
3053 | pr_err("Can not find phy_id\n"); |
3054 | goto err_out_unmap; | |
95252236 GFT |
3055 | } |
3056 | ||
3057 | jme->reg_ghc |= GHC_LINK_POLL; | |
3058 | } else { | |
3059 | jme->mii_if.phy_id = 1; | |
3060 | } | |
3061 | if (pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) | |
3062 | jme->mii_if.supports_gmii = true; | |
3063 | else | |
3064 | jme->mii_if.supports_gmii = false; | |
334fbbb7 GFT |
3065 | jme->mii_if.phy_id_mask = 0x1F; |
3066 | jme->mii_if.reg_num_mask = 0x1F; | |
95252236 GFT |
3067 | jme->mii_if.mdio_read = jme_mdio_read; |
3068 | jme->mii_if.mdio_write = jme_mdio_write; | |
3069 | ||
3070 | jme_clear_pm(jme); | |
51754572 | 3071 | jme_set_phyfifo_5level(jme); |
19d96017 | 3072 | pci_read_config_byte(pdev, PCI_REVISION_ID, &jme->pcirev); |
95252236 GFT |
3073 | if (!jme->fpgaver) |
3074 | jme_phy_init(jme); | |
3075 | jme_phy_off(jme); | |
3076 | ||
3077 | /* | |
3078 | * Reset MAC processor and reload EEPROM for MAC Address | |
3079 | */ | |
3080 | jme_reset_mac_processor(jme); | |
3081 | rc = jme_reload_eeprom(jme); | |
3082 | if (rc) { | |
49d70c48 | 3083 | pr_err("Reload eeprom for reading MAC Address error\n"); |
d1dfa1d1 | 3084 | goto err_out_unmap; |
95252236 GFT |
3085 | } |
3086 | jme_load_macaddr(netdev); | |
3087 | ||
3088 | /* | |
3089 | * Tell stack that we are not ready to work until open() | |
3090 | */ | |
3091 | netif_carrier_off(netdev); | |
95252236 | 3092 | |
95252236 GFT |
3093 | rc = register_netdev(netdev); |
3094 | if (rc) { | |
49d70c48 | 3095 | pr_err("Cannot register net device\n"); |
d1dfa1d1 | 3096 | goto err_out_unmap; |
95252236 GFT |
3097 | } |
3098 | ||
19d96017 | 3099 | netif_info(jme, probe, jme->dev, "%s%s chiprev:%x pcirev:%x macaddr:%pM\n", |
f8502ce4 JP |
3100 | (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC250) ? |
3101 | "JMC250 Gigabit Ethernet" : | |
3102 | (jme->pdev->device == PCI_DEVICE_ID_JMICRON_JMC260) ? | |
3103 | "JMC260 Fast Ethernet" : "Unknown", | |
3104 | (jme->fpgaver != 0) ? " (FPGA)" : "", | |
3105 | (jme->fpgaver != 0) ? jme->fpgaver : jme->chiprev, | |
19d96017 | 3106 | jme->pcirev, netdev->dev_addr); |
95252236 GFT |
3107 | |
3108 | return 0; | |
3109 | ||
95252236 GFT |
3110 | err_out_unmap: |
3111 | iounmap(jme->regs); | |
3112 | err_out_free_netdev: | |
3113 | pci_set_drvdata(pdev, NULL); | |
3114 | free_netdev(netdev); | |
3115 | err_out_release_regions: | |
3116 | pci_release_regions(pdev); | |
3117 | err_out_disable_pdev: | |
3118 | pci_disable_device(pdev); | |
3119 | err_out: | |
3120 | return rc; | |
3121 | } | |
3122 | ||
3123 | static void __devexit | |
3124 | jme_remove_one(struct pci_dev *pdev) | |
3125 | { | |
3126 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3127 | struct jme_adapter *jme = netdev_priv(netdev); | |
3128 | ||
3129 | unregister_netdev(netdev); | |
95252236 GFT |
3130 | iounmap(jme->regs); |
3131 | pci_set_drvdata(pdev, NULL); | |
3132 | free_netdev(netdev); | |
3133 | pci_release_regions(pdev); | |
3134 | pci_disable_device(pdev); | |
3135 | ||
3136 | } | |
3137 | ||
1c557819 GFT |
3138 | static void |
3139 | jme_shutdown(struct pci_dev *pdev) | |
3140 | { | |
3141 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3142 | struct jme_adapter *jme = netdev_priv(netdev); | |
3143 | ||
3144 | jme_powersave_phy(jme); | |
3145 | pci_pme_active(pdev, true); | |
3146 | } | |
3147 | ||
724f8805 | 3148 | #ifdef CONFIG_PM |
95252236 GFT |
3149 | static int |
3150 | jme_suspend(struct pci_dev *pdev, pm_message_t state) | |
3151 | { | |
3152 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3153 | struct jme_adapter *jme = netdev_priv(netdev); | |
3154 | ||
3155 | atomic_dec(&jme->link_changing); | |
3156 | ||
3157 | netif_device_detach(netdev); | |
3158 | netif_stop_queue(netdev); | |
3159 | jme_stop_irq(jme); | |
3160 | ||
3161 | tasklet_disable(&jme->txclean_task); | |
3162 | tasklet_disable(&jme->rxclean_task); | |
3163 | tasklet_disable(&jme->rxempty_task); | |
3164 | ||
95252236 GFT |
3165 | if (netif_carrier_ok(netdev)) { |
3166 | if (test_bit(JME_FLAG_POLL, &jme->flags)) | |
3167 | jme_polling_mode(jme); | |
3168 | ||
3169 | jme_stop_pcc_timer(jme); | |
95252236 GFT |
3170 | jme_disable_rx_engine(jme); |
3171 | jme_disable_tx_engine(jme); | |
3172 | jme_reset_mac_processor(jme); | |
3173 | jme_free_rx_resources(jme); | |
3174 | jme_free_tx_resources(jme); | |
3175 | netif_carrier_off(netdev); | |
3176 | jme->phylink = 0; | |
3177 | } | |
3178 | ||
3179 | tasklet_enable(&jme->txclean_task); | |
3180 | tasklet_hi_enable(&jme->rxclean_task); | |
3181 | tasklet_hi_enable(&jme->rxempty_task); | |
3182 | ||
3183 | pci_save_state(pdev); | |
1c557819 GFT |
3184 | jme_powersave_phy(jme); |
3185 | pci_enable_wake(jme->pdev, PCI_D3hot, true); | |
3186 | pci_set_power_state(pdev, PCI_D3hot); | |
95252236 GFT |
3187 | |
3188 | return 0; | |
3189 | } | |
3190 | ||
3191 | static int | |
3192 | jme_resume(struct pci_dev *pdev) | |
3193 | { | |
3194 | struct net_device *netdev = pci_get_drvdata(pdev); | |
3195 | struct jme_adapter *jme = netdev_priv(netdev); | |
3196 | ||
3197 | jme_clear_pm(jme); | |
3198 | pci_restore_state(pdev); | |
3199 | ||
4872b11f GFT |
3200 | jme_phy_on(jme); |
3201 | if (test_bit(JME_FLAG_SSET, &jme->flags)) | |
95252236 | 3202 | jme_set_settings(netdev, &jme->old_ecmd); |
4872b11f | 3203 | else |
95252236 GFT |
3204 | jme_reset_phy_processor(jme); |
3205 | ||
95252236 GFT |
3206 | jme_start_irq(jme); |
3207 | netif_device_attach(netdev); | |
3208 | ||
3209 | atomic_inc(&jme->link_changing); | |
3210 | ||
3211 | jme_reset_link(jme); | |
3212 | ||
3213 | return 0; | |
3214 | } | |
724f8805 | 3215 | #endif |
95252236 | 3216 | |
a3aa1884 | 3217 | static DEFINE_PCI_DEVICE_TABLE(jme_pci_tbl) = { |
95252236 GFT |
3218 | { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC250) }, |
3219 | { PCI_VDEVICE(JMICRON, PCI_DEVICE_ID_JMICRON_JMC260) }, | |
3220 | { } | |
3221 | }; | |
3222 | ||
3223 | static struct pci_driver jme_driver = { | |
3224 | .name = DRV_NAME, | |
3225 | .id_table = jme_pci_tbl, | |
3226 | .probe = jme_init_one, | |
3227 | .remove = __devexit_p(jme_remove_one), | |
3228 | #ifdef CONFIG_PM | |
3229 | .suspend = jme_suspend, | |
3230 | .resume = jme_resume, | |
3231 | #endif /* CONFIG_PM */ | |
1c557819 | 3232 | .shutdown = jme_shutdown, |
95252236 GFT |
3233 | }; |
3234 | ||
3235 | static int __init | |
3236 | jme_init_module(void) | |
3237 | { | |
49d70c48 | 3238 | pr_info("JMicron JMC2XX ethernet driver version %s\n", DRV_VERSION); |
95252236 GFT |
3239 | return pci_register_driver(&jme_driver); |
3240 | } | |
3241 | ||
3242 | static void __exit | |
3243 | jme_cleanup_module(void) | |
3244 | { | |
3245 | pci_unregister_driver(&jme_driver); | |
3246 | } | |
3247 | ||
3248 | module_init(jme_init_module); | |
3249 | module_exit(jme_cleanup_module); | |
3250 | ||
3251 | MODULE_AUTHOR("Guo-Fu Tseng <cooldavid@cooldavid.org>"); | |
3252 | MODULE_DESCRIPTION("JMicron JMC2x0 PCI Express Ethernet driver"); | |
3253 | MODULE_LICENSE("GPL"); | |
3254 | MODULE_VERSION(DRV_VERSION); | |
3255 | MODULE_DEVICE_TABLE(pci, jme_pci_tbl); | |
3256 |