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3320eae5 | 1 | /* drivers/net/ks8851.c |
3ba81f3e BD |
2 | * |
3 | * Copyright 2009 Simtec Electronics | |
4 | * http://www.simtec.co.uk/ | |
5 | * Ben Dooks <ben@simtec.co.uk> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
0dc7d2b3 JP |
12 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
13 | ||
3ba81f3e BD |
14 | #define DEBUG |
15 | ||
16 | #include <linux/module.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/netdevice.h> | |
19 | #include <linux/etherdevice.h> | |
20 | #include <linux/ethtool.h> | |
21 | #include <linux/cache.h> | |
22 | #include <linux/crc32.h> | |
23 | #include <linux/mii.h> | |
24 | ||
25 | #include <linux/spi/spi.h> | |
26 | ||
27 | #include "ks8851.h" | |
28 | ||
29 | /** | |
30 | * struct ks8851_rxctrl - KS8851 driver rx control | |
31 | * @mchash: Multicast hash-table data. | |
32 | * @rxcr1: KS_RXCR1 register setting | |
33 | * @rxcr2: KS_RXCR2 register setting | |
34 | * | |
35 | * Representation of the settings needs to control the receive filtering | |
36 | * such as the multicast hash-filter and the receive register settings. This | |
37 | * is used to make the job of working out if the receive settings change and | |
38 | * then issuing the new settings to the worker that will send the necessary | |
39 | * commands. | |
40 | */ | |
41 | struct ks8851_rxctrl { | |
42 | u16 mchash[4]; | |
43 | u16 rxcr1; | |
44 | u16 rxcr2; | |
45 | }; | |
46 | ||
47 | /** | |
48 | * union ks8851_tx_hdr - tx header data | |
49 | * @txb: The header as bytes | |
50 | * @txw: The header as 16bit, little-endian words | |
51 | * | |
52 | * A dual representation of the tx header data to allow | |
53 | * access to individual bytes, and to allow 16bit accesses | |
54 | * with 16bit alignment. | |
55 | */ | |
56 | union ks8851_tx_hdr { | |
57 | u8 txb[6]; | |
58 | __le16 txw[3]; | |
59 | }; | |
60 | ||
61 | /** | |
62 | * struct ks8851_net - KS8851 driver private data | |
63 | * @netdev: The network device we're bound to | |
64 | * @spidev: The spi device we're bound to. | |
65 | * @lock: Lock to ensure that the device is not accessed when busy. | |
66 | * @statelock: Lock on this structure for tx list. | |
67 | * @mii: The MII state information for the mii calls. | |
68 | * @rxctrl: RX settings for @rxctrl_work. | |
69 | * @tx_work: Work queue for tx packets | |
70 | * @irq_work: Work queue for servicing interrupts | |
71 | * @rxctrl_work: Work queue for updating RX mode and multicast lists | |
72 | * @txq: Queue of packets for transmission. | |
73 | * @spi_msg1: pre-setup SPI transfer with one message, @spi_xfer1. | |
74 | * @spi_msg2: pre-setup SPI transfer with two messages, @spi_xfer2. | |
75 | * @txh: Space for generating packet TX header in DMA-able data | |
76 | * @rxd: Space for receiving SPI data, in DMA-able space. | |
77 | * @txd: Space for transmitting SPI data, in DMA-able space. | |
78 | * @msg_enable: The message flags controlling driver output (see ethtool). | |
79 | * @fid: Incrementing frame id tag. | |
80 | * @rc_ier: Cached copy of KS_IER. | |
7d997466 | 81 | * @rc_ccr: Cached copy of KS_CCR. |
3ba81f3e | 82 | * @rc_rxqcr: Cached copy of KS_RXQCR. |
7d997466 | 83 | * @eeprom_size: Companion eeprom size in Bytes, 0 if no eeprom |
3ba81f3e BD |
84 | * |
85 | * The @lock ensures that the chip is protected when certain operations are | |
86 | * in progress. When the read or write packet transfer is in progress, most | |
87 | * of the chip registers are not ccessible until the transfer is finished and | |
88 | * the DMA has been de-asserted. | |
89 | * | |
90 | * The @statelock is used to protect information in the structure which may | |
91 | * need to be accessed via several sources, such as the network driver layer | |
92 | * or one of the work queues. | |
93 | * | |
94 | * We align the buffers we may use for rx/tx to ensure that if the SPI driver | |
95 | * wants to DMA map them, it will not have any problems with data the driver | |
96 | * modifies. | |
97 | */ | |
98 | struct ks8851_net { | |
99 | struct net_device *netdev; | |
100 | struct spi_device *spidev; | |
101 | struct mutex lock; | |
102 | spinlock_t statelock; | |
103 | ||
104 | union ks8851_tx_hdr txh ____cacheline_aligned; | |
105 | u8 rxd[8]; | |
106 | u8 txd[8]; | |
107 | ||
108 | u32 msg_enable ____cacheline_aligned; | |
109 | u16 tx_space; | |
110 | u8 fid; | |
111 | ||
112 | u16 rc_ier; | |
113 | u16 rc_rxqcr; | |
7d997466 SJ |
114 | u16 rc_ccr; |
115 | u16 eeprom_size; | |
3ba81f3e BD |
116 | |
117 | struct mii_if_info mii; | |
118 | struct ks8851_rxctrl rxctrl; | |
119 | ||
120 | struct work_struct tx_work; | |
121 | struct work_struct irq_work; | |
122 | struct work_struct rxctrl_work; | |
123 | ||
124 | struct sk_buff_head txq; | |
125 | ||
126 | struct spi_message spi_msg1; | |
127 | struct spi_message spi_msg2; | |
128 | struct spi_transfer spi_xfer1; | |
129 | struct spi_transfer spi_xfer2[2]; | |
130 | }; | |
131 | ||
132 | static int msg_enable; | |
133 | ||
3ba81f3e BD |
134 | /* shift for byte-enable data */ |
135 | #define BYTE_EN(_x) ((_x) << 2) | |
136 | ||
137 | /* turn register number and byte-enable mask into data for start of packet */ | |
138 | #define MK_OP(_byteen, _reg) (BYTE_EN(_byteen) | (_reg) << (8+2) | (_reg) >> 6) | |
139 | ||
140 | /* SPI register read/write calls. | |
141 | * | |
142 | * All these calls issue SPI transactions to access the chip's registers. They | |
143 | * all require that the necessary lock is held to prevent accesses when the | |
144 | * chip is busy transfering packet data (RX/TX FIFO accesses). | |
145 | */ | |
146 | ||
147 | /** | |
148 | * ks8851_wrreg16 - write 16bit register value to chip | |
149 | * @ks: The chip state | |
150 | * @reg: The register address | |
151 | * @val: The value to write | |
152 | * | |
153 | * Issue a write to put the value @val into the register specified in @reg. | |
154 | */ | |
155 | static void ks8851_wrreg16(struct ks8851_net *ks, unsigned reg, unsigned val) | |
156 | { | |
157 | struct spi_transfer *xfer = &ks->spi_xfer1; | |
158 | struct spi_message *msg = &ks->spi_msg1; | |
159 | __le16 txb[2]; | |
160 | int ret; | |
161 | ||
162 | txb[0] = cpu_to_le16(MK_OP(reg & 2 ? 0xC : 0x03, reg) | KS_SPIOP_WR); | |
163 | txb[1] = cpu_to_le16(val); | |
164 | ||
165 | xfer->tx_buf = txb; | |
166 | xfer->rx_buf = NULL; | |
167 | xfer->len = 4; | |
168 | ||
169 | ret = spi_sync(ks->spidev, msg); | |
170 | if (ret < 0) | |
0dc7d2b3 | 171 | netdev_err(ks->netdev, "spi_sync() failed\n"); |
3ba81f3e BD |
172 | } |
173 | ||
160d0fad BD |
174 | /** |
175 | * ks8851_wrreg8 - write 8bit register value to chip | |
176 | * @ks: The chip state | |
177 | * @reg: The register address | |
178 | * @val: The value to write | |
179 | * | |
180 | * Issue a write to put the value @val into the register specified in @reg. | |
181 | */ | |
182 | static void ks8851_wrreg8(struct ks8851_net *ks, unsigned reg, unsigned val) | |
183 | { | |
184 | struct spi_transfer *xfer = &ks->spi_xfer1; | |
185 | struct spi_message *msg = &ks->spi_msg1; | |
186 | __le16 txb[2]; | |
187 | int ret; | |
188 | int bit; | |
189 | ||
190 | bit = 1 << (reg & 3); | |
191 | ||
192 | txb[0] = cpu_to_le16(MK_OP(bit, reg) | KS_SPIOP_WR); | |
193 | txb[1] = val; | |
194 | ||
195 | xfer->tx_buf = txb; | |
196 | xfer->rx_buf = NULL; | |
197 | xfer->len = 3; | |
198 | ||
199 | ret = spi_sync(ks->spidev, msg); | |
200 | if (ret < 0) | |
0dc7d2b3 | 201 | netdev_err(ks->netdev, "spi_sync() failed\n"); |
160d0fad BD |
202 | } |
203 | ||
3ba81f3e BD |
204 | /** |
205 | * ks8851_rx_1msg - select whether to use one or two messages for spi read | |
206 | * @ks: The device structure | |
207 | * | |
208 | * Return whether to generate a single message with a tx and rx buffer | |
209 | * supplied to spi_sync(), or alternatively send the tx and rx buffers | |
210 | * as separate messages. | |
211 | * | |
212 | * Depending on the hardware in use, a single message may be more efficient | |
213 | * on interrupts or work done by the driver. | |
214 | * | |
215 | * This currently always returns true until we add some per-device data passed | |
216 | * from the platform code to specify which mode is better. | |
217 | */ | |
218 | static inline bool ks8851_rx_1msg(struct ks8851_net *ks) | |
219 | { | |
220 | return true; | |
221 | } | |
222 | ||
223 | /** | |
224 | * ks8851_rdreg - issue read register command and return the data | |
225 | * @ks: The device state | |
226 | * @op: The register address and byte enables in message format. | |
227 | * @rxb: The RX buffer to return the result into | |
228 | * @rxl: The length of data expected. | |
229 | * | |
230 | * This is the low level read call that issues the necessary spi message(s) | |
231 | * to read data from the register specified in @op. | |
232 | */ | |
233 | static void ks8851_rdreg(struct ks8851_net *ks, unsigned op, | |
234 | u8 *rxb, unsigned rxl) | |
235 | { | |
236 | struct spi_transfer *xfer; | |
237 | struct spi_message *msg; | |
238 | __le16 *txb = (__le16 *)ks->txd; | |
239 | u8 *trx = ks->rxd; | |
240 | int ret; | |
241 | ||
242 | txb[0] = cpu_to_le16(op | KS_SPIOP_RD); | |
243 | ||
244 | if (ks8851_rx_1msg(ks)) { | |
245 | msg = &ks->spi_msg1; | |
246 | xfer = &ks->spi_xfer1; | |
247 | ||
248 | xfer->tx_buf = txb; | |
249 | xfer->rx_buf = trx; | |
250 | xfer->len = rxl + 2; | |
251 | } else { | |
252 | msg = &ks->spi_msg2; | |
253 | xfer = ks->spi_xfer2; | |
254 | ||
255 | xfer->tx_buf = txb; | |
256 | xfer->rx_buf = NULL; | |
257 | xfer->len = 2; | |
258 | ||
259 | xfer++; | |
260 | xfer->tx_buf = NULL; | |
261 | xfer->rx_buf = trx; | |
262 | xfer->len = rxl; | |
263 | } | |
264 | ||
265 | ret = spi_sync(ks->spidev, msg); | |
266 | if (ret < 0) | |
0dc7d2b3 | 267 | netdev_err(ks->netdev, "read: spi_sync() failed\n"); |
3ba81f3e BD |
268 | else if (ks8851_rx_1msg(ks)) |
269 | memcpy(rxb, trx + 2, rxl); | |
270 | else | |
271 | memcpy(rxb, trx, rxl); | |
272 | } | |
273 | ||
274 | /** | |
275 | * ks8851_rdreg8 - read 8 bit register from device | |
276 | * @ks: The chip information | |
277 | * @reg: The register address | |
278 | * | |
279 | * Read a 8bit register from the chip, returning the result | |
280 | */ | |
281 | static unsigned ks8851_rdreg8(struct ks8851_net *ks, unsigned reg) | |
282 | { | |
283 | u8 rxb[1]; | |
284 | ||
285 | ks8851_rdreg(ks, MK_OP(1 << (reg & 3), reg), rxb, 1); | |
286 | return rxb[0]; | |
287 | } | |
288 | ||
289 | /** | |
290 | * ks8851_rdreg16 - read 16 bit register from device | |
291 | * @ks: The chip information | |
292 | * @reg: The register address | |
293 | * | |
294 | * Read a 16bit register from the chip, returning the result | |
295 | */ | |
296 | static unsigned ks8851_rdreg16(struct ks8851_net *ks, unsigned reg) | |
297 | { | |
298 | __le16 rx = 0; | |
299 | ||
300 | ks8851_rdreg(ks, MK_OP(reg & 2 ? 0xC : 0x3, reg), (u8 *)&rx, 2); | |
301 | return le16_to_cpu(rx); | |
302 | } | |
303 | ||
304 | /** | |
305 | * ks8851_rdreg32 - read 32 bit register from device | |
306 | * @ks: The chip information | |
307 | * @reg: The register address | |
308 | * | |
309 | * Read a 32bit register from the chip. | |
310 | * | |
311 | * Note, this read requires the address be aligned to 4 bytes. | |
312 | */ | |
313 | static unsigned ks8851_rdreg32(struct ks8851_net *ks, unsigned reg) | |
314 | { | |
315 | __le32 rx = 0; | |
316 | ||
317 | WARN_ON(reg & 3); | |
318 | ||
319 | ks8851_rdreg(ks, MK_OP(0xf, reg), (u8 *)&rx, 4); | |
320 | return le32_to_cpu(rx); | |
321 | } | |
322 | ||
323 | /** | |
324 | * ks8851_soft_reset - issue one of the soft reset to the device | |
325 | * @ks: The device state. | |
326 | * @op: The bit(s) to set in the GRR | |
327 | * | |
328 | * Issue the relevant soft-reset command to the device's GRR register | |
329 | * specified by @op. | |
330 | * | |
331 | * Note, the delays are in there as a caution to ensure that the reset | |
332 | * has time to take effect and then complete. Since the datasheet does | |
333 | * not currently specify the exact sequence, we have chosen something | |
334 | * that seems to work with our device. | |
335 | */ | |
336 | static void ks8851_soft_reset(struct ks8851_net *ks, unsigned op) | |
337 | { | |
338 | ks8851_wrreg16(ks, KS_GRR, op); | |
339 | mdelay(1); /* wait a short time to effect reset */ | |
340 | ks8851_wrreg16(ks, KS_GRR, 0); | |
341 | mdelay(1); /* wait for condition to clear */ | |
342 | } | |
343 | ||
344 | /** | |
345 | * ks8851_write_mac_addr - write mac address to device registers | |
346 | * @dev: The network device | |
347 | * | |
348 | * Update the KS8851 MAC address registers from the address in @dev. | |
349 | * | |
350 | * This call assumes that the chip is not running, so there is no need to | |
351 | * shutdown the RXQ process whilst setting this. | |
352 | */ | |
353 | static int ks8851_write_mac_addr(struct net_device *dev) | |
354 | { | |
355 | struct ks8851_net *ks = netdev_priv(dev); | |
160d0fad | 356 | int i; |
3ba81f3e BD |
357 | |
358 | mutex_lock(&ks->lock); | |
359 | ||
160d0fad BD |
360 | for (i = 0; i < ETH_ALEN; i++) |
361 | ks8851_wrreg8(ks, KS_MAR(i), dev->dev_addr[i]); | |
3ba81f3e BD |
362 | |
363 | mutex_unlock(&ks->lock); | |
364 | ||
365 | return 0; | |
366 | } | |
367 | ||
368 | /** | |
369 | * ks8851_init_mac - initialise the mac address | |
370 | * @ks: The device structure | |
371 | * | |
372 | * Get or create the initial mac address for the device and then set that | |
373 | * into the station address register. Currently we assume that the device | |
374 | * does not have a valid mac address in it, and so we use random_ether_addr() | |
375 | * to create a new one. | |
376 | * | |
377 | * In future, the driver should check to see if the device has an EEPROM | |
378 | * attached and whether that has a valid ethernet address in it. | |
379 | */ | |
380 | static void ks8851_init_mac(struct ks8851_net *ks) | |
381 | { | |
382 | struct net_device *dev = ks->netdev; | |
383 | ||
384 | random_ether_addr(dev->dev_addr); | |
385 | ks8851_write_mac_addr(dev); | |
386 | } | |
387 | ||
388 | /** | |
389 | * ks8851_irq - device interrupt handler | |
390 | * @irq: Interrupt number passed from the IRQ hnalder. | |
391 | * @pw: The private word passed to register_irq(), our struct ks8851_net. | |
392 | * | |
393 | * Disable the interrupt from happening again until we've processed the | |
394 | * current status by scheduling ks8851_irq_work(). | |
395 | */ | |
396 | static irqreturn_t ks8851_irq(int irq, void *pw) | |
397 | { | |
398 | struct ks8851_net *ks = pw; | |
399 | ||
400 | disable_irq_nosync(irq); | |
401 | schedule_work(&ks->irq_work); | |
402 | return IRQ_HANDLED; | |
403 | } | |
404 | ||
405 | /** | |
406 | * ks8851_rdfifo - read data from the receive fifo | |
407 | * @ks: The device state. | |
408 | * @buff: The buffer address | |
409 | * @len: The length of the data to read | |
410 | * | |
9ddc5b6f | 411 | * Issue an RXQ FIFO read command and read the @len amount of data from |
3ba81f3e BD |
412 | * the FIFO into the buffer specified by @buff. |
413 | */ | |
414 | static void ks8851_rdfifo(struct ks8851_net *ks, u8 *buff, unsigned len) | |
415 | { | |
416 | struct spi_transfer *xfer = ks->spi_xfer2; | |
417 | struct spi_message *msg = &ks->spi_msg2; | |
418 | u8 txb[1]; | |
419 | int ret; | |
420 | ||
0dc7d2b3 JP |
421 | netif_dbg(ks, rx_status, ks->netdev, |
422 | "%s: %d@%p\n", __func__, len, buff); | |
3ba81f3e BD |
423 | |
424 | /* set the operation we're issuing */ | |
425 | txb[0] = KS_SPIOP_RXFIFO; | |
426 | ||
427 | xfer->tx_buf = txb; | |
428 | xfer->rx_buf = NULL; | |
429 | xfer->len = 1; | |
430 | ||
431 | xfer++; | |
432 | xfer->rx_buf = buff; | |
433 | xfer->tx_buf = NULL; | |
434 | xfer->len = len; | |
435 | ||
436 | ret = spi_sync(ks->spidev, msg); | |
437 | if (ret < 0) | |
0dc7d2b3 | 438 | netdev_err(ks->netdev, "%s: spi_sync() failed\n", __func__); |
3ba81f3e BD |
439 | } |
440 | ||
441 | /** | |
442 | * ks8851_dbg_dumpkkt - dump initial packet contents to debug | |
443 | * @ks: The device state | |
444 | * @rxpkt: The data for the received packet | |
445 | * | |
446 | * Dump the initial data from the packet to dev_dbg(). | |
447 | */ | |
448 | static void ks8851_dbg_dumpkkt(struct ks8851_net *ks, u8 *rxpkt) | |
449 | { | |
0dc7d2b3 JP |
450 | netdev_dbg(ks->netdev, |
451 | "pkt %02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x\n", | |
452 | rxpkt[4], rxpkt[5], rxpkt[6], rxpkt[7], | |
453 | rxpkt[8], rxpkt[9], rxpkt[10], rxpkt[11], | |
454 | rxpkt[12], rxpkt[13], rxpkt[14], rxpkt[15]); | |
3ba81f3e BD |
455 | } |
456 | ||
457 | /** | |
458 | * ks8851_rx_pkts - receive packets from the host | |
459 | * @ks: The device information. | |
460 | * | |
461 | * This is called from the IRQ work queue when the system detects that there | |
462 | * are packets in the receive queue. Find out how many packets there are and | |
463 | * read them from the FIFO. | |
464 | */ | |
465 | static void ks8851_rx_pkts(struct ks8851_net *ks) | |
466 | { | |
467 | struct sk_buff *skb; | |
468 | unsigned rxfc; | |
469 | unsigned rxlen; | |
470 | unsigned rxstat; | |
471 | u32 rxh; | |
472 | u8 *rxpkt; | |
473 | ||
474 | rxfc = ks8851_rdreg8(ks, KS_RXFC); | |
475 | ||
0dc7d2b3 JP |
476 | netif_dbg(ks, rx_status, ks->netdev, |
477 | "%s: %d packets\n", __func__, rxfc); | |
3ba81f3e BD |
478 | |
479 | /* Currently we're issuing a read per packet, but we could possibly | |
480 | * improve the code by issuing a single read, getting the receive | |
481 | * header, allocating the packet and then reading the packet data | |
482 | * out in one go. | |
483 | * | |
484 | * This form of operation would require us to hold the SPI bus' | |
485 | * chipselect low during the entie transaction to avoid any | |
486 | * reset to the data stream comming from the chip. | |
487 | */ | |
488 | ||
489 | for (; rxfc != 0; rxfc--) { | |
490 | rxh = ks8851_rdreg32(ks, KS_RXFHSR); | |
491 | rxstat = rxh & 0xffff; | |
492 | rxlen = rxh >> 16; | |
493 | ||
0dc7d2b3 JP |
494 | netif_dbg(ks, rx_status, ks->netdev, |
495 | "rx: stat 0x%04x, len 0x%04x\n", rxstat, rxlen); | |
3ba81f3e BD |
496 | |
497 | /* the length of the packet includes the 32bit CRC */ | |
498 | ||
499 | /* set dma read address */ | |
500 | ks8851_wrreg16(ks, KS_RXFDPR, RXFDPR_RXFPAI | 0x00); | |
501 | ||
502 | /* start the packet dma process, and set auto-dequeue rx */ | |
503 | ks8851_wrreg16(ks, KS_RXQCR, | |
504 | ks->rc_rxqcr | RXQCR_SDA | RXQCR_ADRFE); | |
505 | ||
506 | if (rxlen > 0) { | |
507 | skb = netdev_alloc_skb(ks->netdev, rxlen + 2 + 8); | |
508 | if (!skb) { | |
509 | /* todo - dump frame and move on */ | |
510 | } | |
511 | ||
512 | /* two bytes to ensure ip is aligned, and four bytes | |
513 | * for the status header and 4 bytes of garbage */ | |
514 | skb_reserve(skb, 2 + 4 + 4); | |
515 | ||
516 | rxpkt = skb_put(skb, rxlen - 4) - 8; | |
517 | ||
518 | /* align the packet length to 4 bytes, and add 4 bytes | |
519 | * as we're getting the rx status header as well */ | |
520 | ks8851_rdfifo(ks, rxpkt, ALIGN(rxlen, 4) + 8); | |
521 | ||
522 | if (netif_msg_pktdata(ks)) | |
523 | ks8851_dbg_dumpkkt(ks, rxpkt); | |
524 | ||
525 | skb->protocol = eth_type_trans(skb, ks->netdev); | |
526 | netif_rx(skb); | |
527 | ||
528 | ks->netdev->stats.rx_packets++; | |
529 | ks->netdev->stats.rx_bytes += rxlen - 4; | |
530 | } | |
531 | ||
532 | ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr); | |
533 | } | |
534 | } | |
535 | ||
536 | /** | |
537 | * ks8851_irq_work - work queue handler for dealing with interrupt requests | |
538 | * @work: The work structure that was scheduled by schedule_work() | |
539 | * | |
540 | * This is the handler invoked when the ks8851_irq() is called to find out | |
541 | * what happened, as we cannot allow ourselves to sleep whilst waiting for | |
542 | * anything other process has the chip's lock. | |
543 | * | |
544 | * Read the interrupt status, work out what needs to be done and then clear | |
545 | * any of the interrupts that are not needed. | |
546 | */ | |
547 | static void ks8851_irq_work(struct work_struct *work) | |
548 | { | |
549 | struct ks8851_net *ks = container_of(work, struct ks8851_net, irq_work); | |
550 | unsigned status; | |
551 | unsigned handled = 0; | |
552 | ||
553 | mutex_lock(&ks->lock); | |
554 | ||
555 | status = ks8851_rdreg16(ks, KS_ISR); | |
556 | ||
0dc7d2b3 JP |
557 | netif_dbg(ks, intr, ks->netdev, |
558 | "%s: status 0x%04x\n", __func__, status); | |
3ba81f3e BD |
559 | |
560 | if (status & IRQ_LCI) { | |
561 | /* should do something about checking link status */ | |
562 | handled |= IRQ_LCI; | |
563 | } | |
564 | ||
565 | if (status & IRQ_LDI) { | |
566 | u16 pmecr = ks8851_rdreg16(ks, KS_PMECR); | |
567 | pmecr &= ~PMECR_WKEVT_MASK; | |
568 | ks8851_wrreg16(ks, KS_PMECR, pmecr | PMECR_WKEVT_LINK); | |
569 | ||
570 | handled |= IRQ_LDI; | |
571 | } | |
572 | ||
573 | if (status & IRQ_RXPSI) | |
574 | handled |= IRQ_RXPSI; | |
575 | ||
576 | if (status & IRQ_TXI) { | |
577 | handled |= IRQ_TXI; | |
578 | ||
579 | /* no lock here, tx queue should have been stopped */ | |
580 | ||
581 | /* update our idea of how much tx space is available to the | |
582 | * system */ | |
583 | ks->tx_space = ks8851_rdreg16(ks, KS_TXMIR); | |
584 | ||
0dc7d2b3 JP |
585 | netif_dbg(ks, intr, ks->netdev, |
586 | "%s: txspace %d\n", __func__, ks->tx_space); | |
3ba81f3e BD |
587 | } |
588 | ||
589 | if (status & IRQ_RXI) | |
590 | handled |= IRQ_RXI; | |
591 | ||
592 | if (status & IRQ_SPIBEI) { | |
593 | dev_err(&ks->spidev->dev, "%s: spi bus error\n", __func__); | |
594 | handled |= IRQ_SPIBEI; | |
595 | } | |
596 | ||
597 | ks8851_wrreg16(ks, KS_ISR, handled); | |
598 | ||
599 | if (status & IRQ_RXI) { | |
600 | /* the datasheet says to disable the rx interrupt during | |
601 | * packet read-out, however we're masking the interrupt | |
602 | * from the device so do not bother masking just the RX | |
603 | * from the device. */ | |
604 | ||
605 | ks8851_rx_pkts(ks); | |
606 | } | |
607 | ||
608 | /* if something stopped the rx process, probably due to wanting | |
609 | * to change the rx settings, then do something about restarting | |
610 | * it. */ | |
611 | if (status & IRQ_RXPSI) { | |
612 | struct ks8851_rxctrl *rxc = &ks->rxctrl; | |
613 | ||
614 | /* update the multicast hash table */ | |
615 | ks8851_wrreg16(ks, KS_MAHTR0, rxc->mchash[0]); | |
616 | ks8851_wrreg16(ks, KS_MAHTR1, rxc->mchash[1]); | |
617 | ks8851_wrreg16(ks, KS_MAHTR2, rxc->mchash[2]); | |
618 | ks8851_wrreg16(ks, KS_MAHTR3, rxc->mchash[3]); | |
619 | ||
620 | ks8851_wrreg16(ks, KS_RXCR2, rxc->rxcr2); | |
621 | ks8851_wrreg16(ks, KS_RXCR1, rxc->rxcr1); | |
622 | } | |
623 | ||
624 | mutex_unlock(&ks->lock); | |
625 | ||
626 | if (status & IRQ_TXI) | |
627 | netif_wake_queue(ks->netdev); | |
628 | ||
629 | enable_irq(ks->netdev->irq); | |
630 | } | |
631 | ||
632 | /** | |
633 | * calc_txlen - calculate size of message to send packet | |
634 | * @len: Lenght of data | |
635 | * | |
636 | * Returns the size of the TXFIFO message needed to send | |
637 | * this packet. | |
638 | */ | |
639 | static inline unsigned calc_txlen(unsigned len) | |
640 | { | |
641 | return ALIGN(len + 4, 4); | |
642 | } | |
643 | ||
644 | /** | |
645 | * ks8851_wrpkt - write packet to TX FIFO | |
646 | * @ks: The device state. | |
647 | * @txp: The sk_buff to transmit. | |
648 | * @irq: IRQ on completion of the packet. | |
649 | * | |
650 | * Send the @txp to the chip. This means creating the relevant packet header | |
651 | * specifying the length of the packet and the other information the chip | |
652 | * needs, such as IRQ on completion. Send the header and the packet data to | |
653 | * the device. | |
654 | */ | |
655 | static void ks8851_wrpkt(struct ks8851_net *ks, struct sk_buff *txp, bool irq) | |
656 | { | |
657 | struct spi_transfer *xfer = ks->spi_xfer2; | |
658 | struct spi_message *msg = &ks->spi_msg2; | |
659 | unsigned fid = 0; | |
660 | int ret; | |
661 | ||
0dc7d2b3 JP |
662 | netif_dbg(ks, tx_queued, ks->netdev, "%s: skb %p, %d@%p, irq %d\n", |
663 | __func__, txp, txp->len, txp->data, irq); | |
3ba81f3e BD |
664 | |
665 | fid = ks->fid++; | |
666 | fid &= TXFR_TXFID_MASK; | |
667 | ||
668 | if (irq) | |
669 | fid |= TXFR_TXIC; /* irq on completion */ | |
670 | ||
671 | /* start header at txb[1] to align txw entries */ | |
672 | ks->txh.txb[1] = KS_SPIOP_TXFIFO; | |
673 | ks->txh.txw[1] = cpu_to_le16(fid); | |
674 | ks->txh.txw[2] = cpu_to_le16(txp->len); | |
675 | ||
676 | xfer->tx_buf = &ks->txh.txb[1]; | |
677 | xfer->rx_buf = NULL; | |
678 | xfer->len = 5; | |
679 | ||
680 | xfer++; | |
681 | xfer->tx_buf = txp->data; | |
682 | xfer->rx_buf = NULL; | |
683 | xfer->len = ALIGN(txp->len, 4); | |
684 | ||
685 | ret = spi_sync(ks->spidev, msg); | |
686 | if (ret < 0) | |
0dc7d2b3 | 687 | netdev_err(ks->netdev, "%s: spi_sync() failed\n", __func__); |
3ba81f3e BD |
688 | } |
689 | ||
690 | /** | |
691 | * ks8851_done_tx - update and then free skbuff after transmitting | |
692 | * @ks: The device state | |
693 | * @txb: The buffer transmitted | |
694 | */ | |
695 | static void ks8851_done_tx(struct ks8851_net *ks, struct sk_buff *txb) | |
696 | { | |
697 | struct net_device *dev = ks->netdev; | |
698 | ||
699 | dev->stats.tx_bytes += txb->len; | |
700 | dev->stats.tx_packets++; | |
701 | ||
702 | dev_kfree_skb(txb); | |
703 | } | |
704 | ||
705 | /** | |
706 | * ks8851_tx_work - process tx packet(s) | |
707 | * @work: The work strucutre what was scheduled. | |
708 | * | |
709 | * This is called when a number of packets have been scheduled for | |
710 | * transmission and need to be sent to the device. | |
711 | */ | |
712 | static void ks8851_tx_work(struct work_struct *work) | |
713 | { | |
714 | struct ks8851_net *ks = container_of(work, struct ks8851_net, tx_work); | |
715 | struct sk_buff *txb; | |
3320eae5 | 716 | bool last = skb_queue_empty(&ks->txq); |
3ba81f3e BD |
717 | |
718 | mutex_lock(&ks->lock); | |
719 | ||
720 | while (!last) { | |
721 | txb = skb_dequeue(&ks->txq); | |
722 | last = skb_queue_empty(&ks->txq); | |
723 | ||
761172fb AA |
724 | if (txb != NULL) { |
725 | ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr | RXQCR_SDA); | |
726 | ks8851_wrpkt(ks, txb, last); | |
727 | ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr); | |
728 | ks8851_wrreg16(ks, KS_TXQCR, TXQCR_METFE); | |
3ba81f3e | 729 | |
761172fb AA |
730 | ks8851_done_tx(ks, txb); |
731 | } | |
3ba81f3e BD |
732 | } |
733 | ||
734 | mutex_unlock(&ks->lock); | |
735 | } | |
736 | ||
737 | /** | |
738 | * ks8851_set_powermode - set power mode of the device | |
739 | * @ks: The device state | |
740 | * @pwrmode: The power mode value to write to KS_PMECR. | |
741 | * | |
742 | * Change the power mode of the chip. | |
743 | */ | |
744 | static void ks8851_set_powermode(struct ks8851_net *ks, unsigned pwrmode) | |
745 | { | |
746 | unsigned pmecr; | |
747 | ||
0dc7d2b3 | 748 | netif_dbg(ks, hw, ks->netdev, "setting power mode %d\n", pwrmode); |
3ba81f3e BD |
749 | |
750 | pmecr = ks8851_rdreg16(ks, KS_PMECR); | |
751 | pmecr &= ~PMECR_PM_MASK; | |
752 | pmecr |= pwrmode; | |
753 | ||
754 | ks8851_wrreg16(ks, KS_PMECR, pmecr); | |
755 | } | |
756 | ||
757 | /** | |
758 | * ks8851_net_open - open network device | |
759 | * @dev: The network device being opened. | |
760 | * | |
761 | * Called when the network device is marked active, such as a user executing | |
762 | * 'ifconfig up' on the device. | |
763 | */ | |
764 | static int ks8851_net_open(struct net_device *dev) | |
765 | { | |
766 | struct ks8851_net *ks = netdev_priv(dev); | |
767 | ||
768 | /* lock the card, even if we may not actually be doing anything | |
769 | * else at the moment */ | |
770 | mutex_lock(&ks->lock); | |
771 | ||
0dc7d2b3 | 772 | netif_dbg(ks, ifup, ks->netdev, "opening\n"); |
3ba81f3e BD |
773 | |
774 | /* bring chip out of any power saving mode it was in */ | |
775 | ks8851_set_powermode(ks, PMECR_PM_NORMAL); | |
776 | ||
777 | /* issue a soft reset to the RX/TX QMU to put it into a known | |
778 | * state. */ | |
779 | ks8851_soft_reset(ks, GRR_QMU); | |
780 | ||
781 | /* setup transmission parameters */ | |
782 | ||
783 | ks8851_wrreg16(ks, KS_TXCR, (TXCR_TXE | /* enable transmit process */ | |
784 | TXCR_TXPE | /* pad to min length */ | |
785 | TXCR_TXCRC | /* add CRC */ | |
786 | TXCR_TXFCE)); /* enable flow control */ | |
787 | ||
788 | /* auto-increment tx data, reset tx pointer */ | |
789 | ks8851_wrreg16(ks, KS_TXFDPR, TXFDPR_TXFPAI); | |
790 | ||
791 | /* setup receiver control */ | |
792 | ||
793 | ks8851_wrreg16(ks, KS_RXCR1, (RXCR1_RXPAFMA | /* from mac filter */ | |
794 | RXCR1_RXFCE | /* enable flow control */ | |
795 | RXCR1_RXBE | /* broadcast enable */ | |
796 | RXCR1_RXUE | /* unicast enable */ | |
797 | RXCR1_RXE)); /* enable rx block */ | |
798 | ||
799 | /* transfer entire frames out in one go */ | |
800 | ks8851_wrreg16(ks, KS_RXCR2, RXCR2_SRDBL_FRAME); | |
801 | ||
802 | /* set receive counter timeouts */ | |
803 | ks8851_wrreg16(ks, KS_RXDTTR, 1000); /* 1ms after first frame to IRQ */ | |
804 | ks8851_wrreg16(ks, KS_RXDBCTR, 4096); /* >4Kbytes in buffer to IRQ */ | |
805 | ks8851_wrreg16(ks, KS_RXFCTR, 10); /* 10 frames to IRQ */ | |
806 | ||
807 | ks->rc_rxqcr = (RXQCR_RXFCTE | /* IRQ on frame count exceeded */ | |
808 | RXQCR_RXDBCTE | /* IRQ on byte count exceeded */ | |
809 | RXQCR_RXDTTE); /* IRQ on time exceeded */ | |
810 | ||
811 | ks8851_wrreg16(ks, KS_RXQCR, ks->rc_rxqcr); | |
812 | ||
813 | /* clear then enable interrupts */ | |
814 | ||
815 | #define STD_IRQ (IRQ_LCI | /* Link Change */ \ | |
816 | IRQ_TXI | /* TX done */ \ | |
817 | IRQ_RXI | /* RX done */ \ | |
818 | IRQ_SPIBEI | /* SPI bus error */ \ | |
819 | IRQ_TXPSI | /* TX process stop */ \ | |
820 | IRQ_RXPSI) /* RX process stop */ | |
821 | ||
822 | ks->rc_ier = STD_IRQ; | |
823 | ks8851_wrreg16(ks, KS_ISR, STD_IRQ); | |
824 | ks8851_wrreg16(ks, KS_IER, STD_IRQ); | |
825 | ||
826 | netif_start_queue(ks->netdev); | |
827 | ||
0dc7d2b3 | 828 | netif_dbg(ks, ifup, ks->netdev, "network device up\n"); |
3ba81f3e BD |
829 | |
830 | mutex_unlock(&ks->lock); | |
831 | return 0; | |
832 | } | |
833 | ||
834 | /** | |
835 | * ks8851_net_stop - close network device | |
836 | * @dev: The device being closed. | |
837 | * | |
838 | * Called to close down a network device which has been active. Cancell any | |
839 | * work, shutdown the RX and TX process and then place the chip into a low | |
840 | * power state whilst it is not being used. | |
841 | */ | |
842 | static int ks8851_net_stop(struct net_device *dev) | |
843 | { | |
844 | struct ks8851_net *ks = netdev_priv(dev); | |
845 | ||
0dc7d2b3 | 846 | netif_info(ks, ifdown, dev, "shutting down\n"); |
3ba81f3e BD |
847 | |
848 | netif_stop_queue(dev); | |
849 | ||
850 | mutex_lock(&ks->lock); | |
851 | ||
852 | /* stop any outstanding work */ | |
853 | flush_work(&ks->irq_work); | |
854 | flush_work(&ks->tx_work); | |
855 | flush_work(&ks->rxctrl_work); | |
856 | ||
857 | /* turn off the IRQs and ack any outstanding */ | |
858 | ks8851_wrreg16(ks, KS_IER, 0x0000); | |
859 | ks8851_wrreg16(ks, KS_ISR, 0xffff); | |
860 | ||
861 | /* shutdown RX process */ | |
862 | ks8851_wrreg16(ks, KS_RXCR1, 0x0000); | |
863 | ||
864 | /* shutdown TX process */ | |
865 | ks8851_wrreg16(ks, KS_TXCR, 0x0000); | |
866 | ||
867 | /* set powermode to soft power down to save power */ | |
868 | ks8851_set_powermode(ks, PMECR_PM_SOFTDOWN); | |
869 | ||
870 | /* ensure any queued tx buffers are dumped */ | |
871 | while (!skb_queue_empty(&ks->txq)) { | |
872 | struct sk_buff *txb = skb_dequeue(&ks->txq); | |
873 | ||
0dc7d2b3 JP |
874 | netif_dbg(ks, ifdown, ks->netdev, |
875 | "%s: freeing txb %p\n", __func__, txb); | |
3ba81f3e BD |
876 | |
877 | dev_kfree_skb(txb); | |
878 | } | |
879 | ||
880 | mutex_unlock(&ks->lock); | |
881 | return 0; | |
882 | } | |
883 | ||
884 | /** | |
885 | * ks8851_start_xmit - transmit packet | |
886 | * @skb: The buffer to transmit | |
887 | * @dev: The device used to transmit the packet. | |
888 | * | |
889 | * Called by the network layer to transmit the @skb. Queue the packet for | |
890 | * the device and schedule the necessary work to transmit the packet when | |
891 | * it is free. | |
892 | * | |
893 | * We do this to firstly avoid sleeping with the network device locked, | |
894 | * and secondly so we can round up more than one packet to transmit which | |
895 | * means we can try and avoid generating too many transmit done interrupts. | |
896 | */ | |
61357325 SH |
897 | static netdev_tx_t ks8851_start_xmit(struct sk_buff *skb, |
898 | struct net_device *dev) | |
3ba81f3e BD |
899 | { |
900 | struct ks8851_net *ks = netdev_priv(dev); | |
901 | unsigned needed = calc_txlen(skb->len); | |
61357325 | 902 | netdev_tx_t ret = NETDEV_TX_OK; |
3ba81f3e | 903 | |
0dc7d2b3 JP |
904 | netif_dbg(ks, tx_queued, ks->netdev, |
905 | "%s: skb %p, %d@%p\n", __func__, skb, skb->len, skb->data); | |
3ba81f3e BD |
906 | |
907 | spin_lock(&ks->statelock); | |
908 | ||
909 | if (needed > ks->tx_space) { | |
910 | netif_stop_queue(dev); | |
911 | ret = NETDEV_TX_BUSY; | |
912 | } else { | |
913 | ks->tx_space -= needed; | |
914 | skb_queue_tail(&ks->txq, skb); | |
915 | } | |
916 | ||
917 | spin_unlock(&ks->statelock); | |
918 | schedule_work(&ks->tx_work); | |
919 | ||
920 | return ret; | |
921 | } | |
922 | ||
923 | /** | |
924 | * ks8851_rxctrl_work - work handler to change rx mode | |
925 | * @work: The work structure this belongs to. | |
926 | * | |
927 | * Lock the device and issue the necessary changes to the receive mode from | |
928 | * the network device layer. This is done so that we can do this without | |
929 | * having to sleep whilst holding the network device lock. | |
930 | * | |
931 | * Since the recommendation from Micrel is that the RXQ is shutdown whilst the | |
932 | * receive parameters are programmed, we issue a write to disable the RXQ and | |
933 | * then wait for the interrupt handler to be triggered once the RXQ shutdown is | |
934 | * complete. The interrupt handler then writes the new values into the chip. | |
935 | */ | |
936 | static void ks8851_rxctrl_work(struct work_struct *work) | |
937 | { | |
938 | struct ks8851_net *ks = container_of(work, struct ks8851_net, rxctrl_work); | |
939 | ||
940 | mutex_lock(&ks->lock); | |
941 | ||
942 | /* need to shutdown RXQ before modifying filter parameters */ | |
943 | ks8851_wrreg16(ks, KS_RXCR1, 0x00); | |
944 | ||
945 | mutex_unlock(&ks->lock); | |
946 | } | |
947 | ||
948 | static void ks8851_set_rx_mode(struct net_device *dev) | |
949 | { | |
950 | struct ks8851_net *ks = netdev_priv(dev); | |
951 | struct ks8851_rxctrl rxctrl; | |
952 | ||
953 | memset(&rxctrl, 0, sizeof(rxctrl)); | |
954 | ||
955 | if (dev->flags & IFF_PROMISC) { | |
956 | /* interface to receive everything */ | |
957 | ||
958 | rxctrl.rxcr1 = RXCR1_RXAE | RXCR1_RXINVF; | |
959 | } else if (dev->flags & IFF_ALLMULTI) { | |
960 | /* accept all multicast packets */ | |
961 | ||
962 | rxctrl.rxcr1 = (RXCR1_RXME | RXCR1_RXAE | | |
963 | RXCR1_RXPAFMA | RXCR1_RXMAFMA); | |
4cd24eaf | 964 | } else if (dev->flags & IFF_MULTICAST && !netdev_mc_empty(dev)) { |
22bedad3 | 965 | struct netdev_hw_addr *ha; |
3ba81f3e | 966 | u32 crc; |
3ba81f3e BD |
967 | |
968 | /* accept some multicast */ | |
969 | ||
22bedad3 JP |
970 | netdev_for_each_mc_addr(ha, dev) { |
971 | crc = ether_crc(ETH_ALEN, ha->addr); | |
3ba81f3e BD |
972 | crc >>= (32 - 6); /* get top six bits */ |
973 | ||
974 | rxctrl.mchash[crc >> 4] |= (1 << (crc & 0xf)); | |
3ba81f3e BD |
975 | } |
976 | ||
b6a71bfa | 977 | rxctrl.rxcr1 = RXCR1_RXME | RXCR1_RXPAFMA; |
3ba81f3e BD |
978 | } else { |
979 | /* just accept broadcast / unicast */ | |
980 | rxctrl.rxcr1 = RXCR1_RXPAFMA; | |
981 | } | |
982 | ||
983 | rxctrl.rxcr1 |= (RXCR1_RXUE | /* unicast enable */ | |
984 | RXCR1_RXBE | /* broadcast enable */ | |
985 | RXCR1_RXE | /* RX process enable */ | |
986 | RXCR1_RXFCE); /* enable flow control */ | |
987 | ||
988 | rxctrl.rxcr2 |= RXCR2_SRDBL_FRAME; | |
989 | ||
990 | /* schedule work to do the actual set of the data if needed */ | |
991 | ||
992 | spin_lock(&ks->statelock); | |
993 | ||
994 | if (memcmp(&rxctrl, &ks->rxctrl, sizeof(rxctrl)) != 0) { | |
995 | memcpy(&ks->rxctrl, &rxctrl, sizeof(ks->rxctrl)); | |
996 | schedule_work(&ks->rxctrl_work); | |
997 | } | |
998 | ||
999 | spin_unlock(&ks->statelock); | |
1000 | } | |
1001 | ||
1002 | static int ks8851_set_mac_address(struct net_device *dev, void *addr) | |
1003 | { | |
1004 | struct sockaddr *sa = addr; | |
1005 | ||
1006 | if (netif_running(dev)) | |
1007 | return -EBUSY; | |
1008 | ||
1009 | if (!is_valid_ether_addr(sa->sa_data)) | |
1010 | return -EADDRNOTAVAIL; | |
1011 | ||
1012 | memcpy(dev->dev_addr, sa->sa_data, ETH_ALEN); | |
1013 | return ks8851_write_mac_addr(dev); | |
1014 | } | |
1015 | ||
1016 | static int ks8851_net_ioctl(struct net_device *dev, struct ifreq *req, int cmd) | |
1017 | { | |
1018 | struct ks8851_net *ks = netdev_priv(dev); | |
1019 | ||
1020 | if (!netif_running(dev)) | |
1021 | return -EINVAL; | |
1022 | ||
1023 | return generic_mii_ioctl(&ks->mii, if_mii(req), cmd, NULL); | |
1024 | } | |
1025 | ||
1026 | static const struct net_device_ops ks8851_netdev_ops = { | |
1027 | .ndo_open = ks8851_net_open, | |
1028 | .ndo_stop = ks8851_net_stop, | |
1029 | .ndo_do_ioctl = ks8851_net_ioctl, | |
1030 | .ndo_start_xmit = ks8851_start_xmit, | |
1031 | .ndo_set_mac_address = ks8851_set_mac_address, | |
1032 | .ndo_set_rx_mode = ks8851_set_rx_mode, | |
1033 | .ndo_change_mtu = eth_change_mtu, | |
1034 | .ndo_validate_addr = eth_validate_addr, | |
1035 | }; | |
1036 | ||
a4bdfff7 SJ |
1037 | /* Companion eeprom access */ |
1038 | ||
1039 | enum { /* EEPROM programming states */ | |
1040 | EEPROM_CONTROL, | |
1041 | EEPROM_ADDRESS, | |
1042 | EEPROM_DATA, | |
1043 | EEPROM_COMPLETE | |
1044 | }; | |
1045 | ||
1046 | /** | |
1047 | * ks8851_eeprom_read - read a 16bits word in ks8851 companion EEPROM | |
1048 | * @dev: The network device the PHY is on. | |
1049 | * @addr: EEPROM address to read | |
1050 | * | |
1051 | * eeprom_size: used to define the data coding length. Can be changed | |
1052 | * through debug-fs. | |
1053 | * | |
1054 | * Programs a read on the EEPROM using ks8851 EEPROM SW access feature. | |
1055 | * Warning: The READ feature is not supported on ks8851 revision 0. | |
1056 | * | |
1057 | * Rough programming model: | |
1058 | * - on period start: set clock high and read value on bus | |
1059 | * - on period / 2: set clock low and program value on bus | |
1060 | * - start on period / 2 | |
1061 | */ | |
1062 | unsigned int ks8851_eeprom_read(struct net_device *dev, unsigned int addr) | |
1063 | { | |
1064 | struct ks8851_net *ks = netdev_priv(dev); | |
1065 | int eepcr; | |
1066 | int ctrl = EEPROM_OP_READ; | |
1067 | int state = EEPROM_CONTROL; | |
1068 | int bit_count = EEPROM_OP_LEN - 1; | |
1069 | unsigned int data = 0; | |
1070 | int dummy; | |
1071 | unsigned int addr_len; | |
1072 | ||
1073 | addr_len = (ks->eeprom_size == 128) ? 6 : 8; | |
1074 | ||
1075 | /* start transaction: chip select high, authorize write */ | |
1076 | mutex_lock(&ks->lock); | |
1077 | eepcr = EEPCR_EESA | EEPCR_EESRWA; | |
1078 | ks8851_wrreg16(ks, KS_EEPCR, eepcr); | |
1079 | eepcr |= EEPCR_EECS; | |
1080 | ks8851_wrreg16(ks, KS_EEPCR, eepcr); | |
1081 | mutex_unlock(&ks->lock); | |
1082 | ||
1083 | while (state != EEPROM_COMPLETE) { | |
1084 | /* falling clock period starts... */ | |
1085 | /* set EED_IO pin for control and address */ | |
1086 | eepcr &= ~EEPCR_EEDO; | |
1087 | switch (state) { | |
1088 | case EEPROM_CONTROL: | |
1089 | eepcr |= ((ctrl >> bit_count) & 1) << 2; | |
1090 | if (bit_count-- <= 0) { | |
1091 | bit_count = addr_len - 1; | |
1092 | state = EEPROM_ADDRESS; | |
1093 | } | |
1094 | break; | |
1095 | case EEPROM_ADDRESS: | |
1096 | eepcr |= ((addr >> bit_count) & 1) << 2; | |
1097 | bit_count--; | |
1098 | break; | |
1099 | case EEPROM_DATA: | |
1100 | /* Change to receive mode */ | |
1101 | eepcr &= ~EEPCR_EESRWA; | |
1102 | break; | |
1103 | } | |
1104 | ||
1105 | /* lower clock */ | |
1106 | eepcr &= ~EEPCR_EESCK; | |
1107 | ||
1108 | mutex_lock(&ks->lock); | |
1109 | ks8851_wrreg16(ks, KS_EEPCR, eepcr); | |
1110 | mutex_unlock(&ks->lock); | |
1111 | ||
1112 | /* waitread period / 2 */ | |
1113 | udelay(EEPROM_SK_PERIOD / 2); | |
1114 | ||
1115 | /* rising clock period starts... */ | |
1116 | ||
1117 | /* raise clock */ | |
1118 | mutex_lock(&ks->lock); | |
1119 | eepcr |= EEPCR_EESCK; | |
1120 | ks8851_wrreg16(ks, KS_EEPCR, eepcr); | |
1121 | mutex_unlock(&ks->lock); | |
1122 | ||
1123 | /* Manage read */ | |
1124 | switch (state) { | |
1125 | case EEPROM_ADDRESS: | |
1126 | if (bit_count < 0) { | |
1127 | bit_count = EEPROM_DATA_LEN - 1; | |
1128 | state = EEPROM_DATA; | |
1129 | } | |
1130 | break; | |
1131 | case EEPROM_DATA: | |
1132 | mutex_lock(&ks->lock); | |
1133 | dummy = ks8851_rdreg16(ks, KS_EEPCR); | |
1134 | mutex_unlock(&ks->lock); | |
1135 | data |= ((dummy >> EEPCR_EESB_OFFSET) & 1) << bit_count; | |
1136 | if (bit_count-- <= 0) | |
1137 | state = EEPROM_COMPLETE; | |
1138 | break; | |
1139 | } | |
1140 | ||
1141 | /* wait period / 2 */ | |
1142 | udelay(EEPROM_SK_PERIOD / 2); | |
1143 | } | |
1144 | ||
1145 | /* close transaction */ | |
1146 | mutex_lock(&ks->lock); | |
1147 | eepcr &= ~EEPCR_EECS; | |
1148 | ks8851_wrreg16(ks, KS_EEPCR, eepcr); | |
1149 | eepcr = 0; | |
1150 | ks8851_wrreg16(ks, KS_EEPCR, eepcr); | |
1151 | mutex_unlock(&ks->lock); | |
1152 | ||
1153 | return data; | |
1154 | } | |
1155 | ||
1156 | /** | |
1157 | * ks8851_eeprom_write - write a 16bits word in ks8851 companion EEPROM | |
1158 | * @dev: The network device the PHY is on. | |
1159 | * @op: operand (can be WRITE, EWEN, EWDS) | |
1160 | * @addr: EEPROM address to write | |
1161 | * @data: data to write | |
1162 | * | |
1163 | * eeprom_size: used to define the data coding length. Can be changed | |
1164 | * through debug-fs. | |
1165 | * | |
1166 | * Programs a write on the EEPROM using ks8851 EEPROM SW access feature. | |
1167 | * | |
1168 | * Note that a write enable is required before writing data. | |
1169 | * | |
1170 | * Rough programming model: | |
1171 | * - on period start: set clock high | |
1172 | * - on period / 2: set clock low and program value on bus | |
1173 | * - start on period / 2 | |
1174 | */ | |
1175 | void ks8851_eeprom_write(struct net_device *dev, unsigned int op, | |
1176 | unsigned int addr, unsigned int data) | |
1177 | { | |
1178 | struct ks8851_net *ks = netdev_priv(dev); | |
1179 | int eepcr; | |
1180 | int state = EEPROM_CONTROL; | |
1181 | int bit_count = EEPROM_OP_LEN - 1; | |
1182 | unsigned int addr_len; | |
1183 | ||
1184 | addr_len = (ks->eeprom_size == 128) ? 6 : 8; | |
1185 | ||
1186 | switch (op) { | |
1187 | case EEPROM_OP_EWEN: | |
1188 | addr = 0x30; | |
1189 | break; | |
1190 | case EEPROM_OP_EWDS: | |
1191 | addr = 0; | |
1192 | break; | |
1193 | } | |
1194 | ||
1195 | /* start transaction: chip select high, authorize write */ | |
1196 | mutex_lock(&ks->lock); | |
1197 | eepcr = EEPCR_EESA | EEPCR_EESRWA; | |
1198 | ks8851_wrreg16(ks, KS_EEPCR, eepcr); | |
1199 | eepcr |= EEPCR_EECS; | |
1200 | ks8851_wrreg16(ks, KS_EEPCR, eepcr); | |
1201 | mutex_unlock(&ks->lock); | |
1202 | ||
1203 | while (state != EEPROM_COMPLETE) { | |
1204 | /* falling clock period starts... */ | |
1205 | /* set EED_IO pin for control and address */ | |
1206 | eepcr &= ~EEPCR_EEDO; | |
1207 | switch (state) { | |
1208 | case EEPROM_CONTROL: | |
1209 | eepcr |= ((op >> bit_count) & 1) << 2; | |
1210 | if (bit_count-- <= 0) { | |
1211 | bit_count = addr_len - 1; | |
1212 | state = EEPROM_ADDRESS; | |
1213 | } | |
1214 | break; | |
1215 | case EEPROM_ADDRESS: | |
1216 | eepcr |= ((addr >> bit_count) & 1) << 2; | |
1217 | if (bit_count-- <= 0) { | |
1218 | if (op == EEPROM_OP_WRITE) { | |
1219 | bit_count = EEPROM_DATA_LEN - 1; | |
1220 | state = EEPROM_DATA; | |
1221 | } else { | |
1222 | state = EEPROM_COMPLETE; | |
1223 | } | |
1224 | } | |
1225 | break; | |
1226 | case EEPROM_DATA: | |
1227 | eepcr |= ((data >> bit_count) & 1) << 2; | |
1228 | if (bit_count-- <= 0) | |
1229 | state = EEPROM_COMPLETE; | |
1230 | break; | |
1231 | } | |
1232 | ||
1233 | /* lower clock */ | |
1234 | eepcr &= ~EEPCR_EESCK; | |
1235 | ||
1236 | mutex_lock(&ks->lock); | |
1237 | ks8851_wrreg16(ks, KS_EEPCR, eepcr); | |
1238 | mutex_unlock(&ks->lock); | |
1239 | ||
1240 | /* wait period / 2 */ | |
1241 | udelay(EEPROM_SK_PERIOD / 2); | |
1242 | ||
1243 | /* rising clock period starts... */ | |
1244 | ||
1245 | /* raise clock */ | |
1246 | eepcr |= EEPCR_EESCK; | |
1247 | mutex_lock(&ks->lock); | |
1248 | ks8851_wrreg16(ks, KS_EEPCR, eepcr); | |
1249 | mutex_unlock(&ks->lock); | |
1250 | ||
1251 | /* wait period / 2 */ | |
1252 | udelay(EEPROM_SK_PERIOD / 2); | |
1253 | } | |
1254 | ||
1255 | /* close transaction */ | |
1256 | mutex_lock(&ks->lock); | |
1257 | eepcr &= ~EEPCR_EECS; | |
1258 | ks8851_wrreg16(ks, KS_EEPCR, eepcr); | |
1259 | eepcr = 0; | |
1260 | ks8851_wrreg16(ks, KS_EEPCR, eepcr); | |
1261 | mutex_unlock(&ks->lock); | |
1262 | ||
1263 | } | |
1264 | ||
3ba81f3e BD |
1265 | /* ethtool support */ |
1266 | ||
1267 | static void ks8851_get_drvinfo(struct net_device *dev, | |
1268 | struct ethtool_drvinfo *di) | |
1269 | { | |
1270 | strlcpy(di->driver, "KS8851", sizeof(di->driver)); | |
1271 | strlcpy(di->version, "1.00", sizeof(di->version)); | |
1272 | strlcpy(di->bus_info, dev_name(dev->dev.parent), sizeof(di->bus_info)); | |
1273 | } | |
1274 | ||
1275 | static u32 ks8851_get_msglevel(struct net_device *dev) | |
1276 | { | |
1277 | struct ks8851_net *ks = netdev_priv(dev); | |
1278 | return ks->msg_enable; | |
1279 | } | |
1280 | ||
1281 | static void ks8851_set_msglevel(struct net_device *dev, u32 to) | |
1282 | { | |
1283 | struct ks8851_net *ks = netdev_priv(dev); | |
1284 | ks->msg_enable = to; | |
1285 | } | |
1286 | ||
1287 | static int ks8851_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
1288 | { | |
1289 | struct ks8851_net *ks = netdev_priv(dev); | |
1290 | return mii_ethtool_gset(&ks->mii, cmd); | |
1291 | } | |
1292 | ||
1293 | static int ks8851_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | |
1294 | { | |
1295 | struct ks8851_net *ks = netdev_priv(dev); | |
1296 | return mii_ethtool_sset(&ks->mii, cmd); | |
1297 | } | |
1298 | ||
1299 | static u32 ks8851_get_link(struct net_device *dev) | |
1300 | { | |
1301 | struct ks8851_net *ks = netdev_priv(dev); | |
1302 | return mii_link_ok(&ks->mii); | |
1303 | } | |
1304 | ||
1305 | static int ks8851_nway_reset(struct net_device *dev) | |
1306 | { | |
1307 | struct ks8851_net *ks = netdev_priv(dev); | |
1308 | return mii_nway_restart(&ks->mii); | |
1309 | } | |
1310 | ||
a84afa40 SJ |
1311 | static int ks8851_get_eeprom_len(struct net_device *dev) |
1312 | { | |
1313 | struct ks8851_net *ks = netdev_priv(dev); | |
1314 | return ks->eeprom_size; | |
1315 | } | |
1316 | ||
1317 | static int ks8851_get_eeprom(struct net_device *dev, | |
1318 | struct ethtool_eeprom *eeprom, u8 *bytes) | |
1319 | { | |
1320 | struct ks8851_net *ks = netdev_priv(dev); | |
1321 | u16 *eeprom_buff; | |
1322 | int first_word; | |
1323 | int last_word; | |
1324 | int ret_val = 0; | |
1325 | u16 i; | |
1326 | ||
1327 | if (eeprom->len == 0) | |
1328 | return -EINVAL; | |
1329 | ||
1330 | if (eeprom->len > ks->eeprom_size) | |
1331 | return -EINVAL; | |
1332 | ||
1333 | eeprom->magic = ks8851_rdreg16(ks, KS_CIDER); | |
1334 | ||
1335 | first_word = eeprom->offset >> 1; | |
1336 | last_word = (eeprom->offset + eeprom->len - 1) >> 1; | |
1337 | ||
1338 | eeprom_buff = kmalloc(sizeof(u16) * | |
1339 | (last_word - first_word + 1), GFP_KERNEL); | |
1340 | if (!eeprom_buff) | |
1341 | return -ENOMEM; | |
1342 | ||
1343 | for (i = 0; i < last_word - first_word + 1; i++) | |
1344 | eeprom_buff[i] = ks8851_eeprom_read(dev, first_word + 1); | |
1345 | ||
1346 | /* Device's eeprom is little-endian, word addressable */ | |
1347 | for (i = 0; i < last_word - first_word + 1; i++) | |
1348 | le16_to_cpus(&eeprom_buff[i]); | |
1349 | ||
1350 | memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len); | |
1351 | kfree(eeprom_buff); | |
1352 | ||
1353 | return ret_val; | |
1354 | } | |
1355 | ||
1356 | static int ks8851_set_eeprom(struct net_device *dev, | |
1357 | struct ethtool_eeprom *eeprom, u8 *bytes) | |
1358 | { | |
1359 | struct ks8851_net *ks = netdev_priv(dev); | |
1360 | u16 *eeprom_buff; | |
1361 | void *ptr; | |
1362 | int max_len; | |
1363 | int first_word; | |
1364 | int last_word; | |
1365 | int ret_val = 0; | |
1366 | u16 i; | |
1367 | ||
1368 | if (eeprom->len == 0) | |
1369 | return -EOPNOTSUPP; | |
1370 | ||
1371 | if (eeprom->len > ks->eeprom_size) | |
1372 | return -EINVAL; | |
1373 | ||
1374 | if (eeprom->magic != ks8851_rdreg16(ks, KS_CIDER)) | |
1375 | return -EFAULT; | |
1376 | ||
1377 | first_word = eeprom->offset >> 1; | |
1378 | last_word = (eeprom->offset + eeprom->len - 1) >> 1; | |
1379 | max_len = (last_word - first_word + 1) * 2; | |
1380 | eeprom_buff = kmalloc(max_len, GFP_KERNEL); | |
1381 | if (!eeprom_buff) | |
1382 | return -ENOMEM; | |
1383 | ||
1384 | ptr = (void *)eeprom_buff; | |
1385 | ||
1386 | if (eeprom->offset & 1) { | |
1387 | /* need read/modify/write of first changed EEPROM word */ | |
1388 | /* only the second byte of the word is being modified */ | |
1389 | eeprom_buff[0] = ks8851_eeprom_read(dev, first_word); | |
1390 | ptr++; | |
1391 | } | |
1392 | if ((eeprom->offset + eeprom->len) & 1) | |
1393 | /* need read/modify/write of last changed EEPROM word */ | |
1394 | /* only the first byte of the word is being modified */ | |
1395 | eeprom_buff[last_word - first_word] = | |
1396 | ks8851_eeprom_read(dev, last_word); | |
1397 | ||
1398 | ||
1399 | /* Device's eeprom is little-endian, word addressable */ | |
1400 | le16_to_cpus(&eeprom_buff[0]); | |
1401 | le16_to_cpus(&eeprom_buff[last_word - first_word]); | |
1402 | ||
1403 | memcpy(ptr, bytes, eeprom->len); | |
1404 | ||
1405 | for (i = 0; i < last_word - first_word + 1; i++) | |
1406 | eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]); | |
1407 | ||
1408 | ks8851_eeprom_write(dev, EEPROM_OP_EWEN, 0, 0); | |
1409 | ||
1410 | for (i = 0; i < last_word - first_word + 1; i++) { | |
1411 | ks8851_eeprom_write(dev, EEPROM_OP_WRITE, first_word + i, | |
1412 | eeprom_buff[i]); | |
1413 | mdelay(EEPROM_WRITE_TIME); | |
1414 | } | |
1415 | ||
1416 | ks8851_eeprom_write(dev, EEPROM_OP_EWDS, 0, 0); | |
1417 | ||
1418 | kfree(eeprom_buff); | |
1419 | return ret_val; | |
1420 | } | |
1421 | ||
3ba81f3e BD |
1422 | static const struct ethtool_ops ks8851_ethtool_ops = { |
1423 | .get_drvinfo = ks8851_get_drvinfo, | |
1424 | .get_msglevel = ks8851_get_msglevel, | |
1425 | .set_msglevel = ks8851_set_msglevel, | |
1426 | .get_settings = ks8851_get_settings, | |
1427 | .set_settings = ks8851_set_settings, | |
1428 | .get_link = ks8851_get_link, | |
1429 | .nway_reset = ks8851_nway_reset, | |
a84afa40 SJ |
1430 | .get_eeprom_len = ks8851_get_eeprom_len, |
1431 | .get_eeprom = ks8851_get_eeprom, | |
1432 | .set_eeprom = ks8851_set_eeprom, | |
3ba81f3e BD |
1433 | }; |
1434 | ||
1435 | /* MII interface controls */ | |
1436 | ||
1437 | /** | |
1438 | * ks8851_phy_reg - convert MII register into a KS8851 register | |
1439 | * @reg: MII register number. | |
1440 | * | |
1441 | * Return the KS8851 register number for the corresponding MII PHY register | |
1442 | * if possible. Return zero if the MII register has no direct mapping to the | |
1443 | * KS8851 register set. | |
1444 | */ | |
1445 | static int ks8851_phy_reg(int reg) | |
1446 | { | |
1447 | switch (reg) { | |
1448 | case MII_BMCR: | |
1449 | return KS_P1MBCR; | |
1450 | case MII_BMSR: | |
1451 | return KS_P1MBSR; | |
1452 | case MII_PHYSID1: | |
1453 | return KS_PHY1ILR; | |
1454 | case MII_PHYSID2: | |
1455 | return KS_PHY1IHR; | |
1456 | case MII_ADVERTISE: | |
1457 | return KS_P1ANAR; | |
1458 | case MII_LPA: | |
1459 | return KS_P1ANLPR; | |
1460 | } | |
1461 | ||
1462 | return 0x0; | |
1463 | } | |
1464 | ||
1465 | /** | |
1466 | * ks8851_phy_read - MII interface PHY register read. | |
1467 | * @dev: The network device the PHY is on. | |
1468 | * @phy_addr: Address of PHY (ignored as we only have one) | |
1469 | * @reg: The register to read. | |
1470 | * | |
1471 | * This call reads data from the PHY register specified in @reg. Since the | |
1472 | * device does not support all the MII registers, the non-existant values | |
1473 | * are always returned as zero. | |
1474 | * | |
1475 | * We return zero for unsupported registers as the MII code does not check | |
1476 | * the value returned for any error status, and simply returns it to the | |
1477 | * caller. The mii-tool that the driver was tested with takes any -ve error | |
1478 | * as real PHY capabilities, thus displaying incorrect data to the user. | |
1479 | */ | |
1480 | static int ks8851_phy_read(struct net_device *dev, int phy_addr, int reg) | |
1481 | { | |
1482 | struct ks8851_net *ks = netdev_priv(dev); | |
1483 | int ksreg; | |
1484 | int result; | |
1485 | ||
1486 | ksreg = ks8851_phy_reg(reg); | |
1487 | if (!ksreg) | |
1488 | return 0x0; /* no error return allowed, so use zero */ | |
1489 | ||
1490 | mutex_lock(&ks->lock); | |
1491 | result = ks8851_rdreg16(ks, ksreg); | |
1492 | mutex_unlock(&ks->lock); | |
1493 | ||
1494 | return result; | |
1495 | } | |
1496 | ||
1497 | static void ks8851_phy_write(struct net_device *dev, | |
1498 | int phy, int reg, int value) | |
1499 | { | |
1500 | struct ks8851_net *ks = netdev_priv(dev); | |
1501 | int ksreg; | |
1502 | ||
1503 | ksreg = ks8851_phy_reg(reg); | |
1504 | if (ksreg) { | |
1505 | mutex_lock(&ks->lock); | |
1506 | ks8851_wrreg16(ks, ksreg, value); | |
1507 | mutex_unlock(&ks->lock); | |
1508 | } | |
1509 | } | |
1510 | ||
1511 | /** | |
1512 | * ks8851_read_selftest - read the selftest memory info. | |
1513 | * @ks: The device state | |
1514 | * | |
1515 | * Read and check the TX/RX memory selftest information. | |
1516 | */ | |
1517 | static int ks8851_read_selftest(struct ks8851_net *ks) | |
1518 | { | |
1519 | unsigned both_done = MBIR_TXMBF | MBIR_RXMBF; | |
1520 | int ret = 0; | |
1521 | unsigned rd; | |
1522 | ||
1523 | rd = ks8851_rdreg16(ks, KS_MBIR); | |
1524 | ||
1525 | if ((rd & both_done) != both_done) { | |
0dc7d2b3 | 1526 | netdev_warn(ks->netdev, "Memory selftest not finished\n"); |
3ba81f3e BD |
1527 | return 0; |
1528 | } | |
1529 | ||
1530 | if (rd & MBIR_TXMBFA) { | |
0dc7d2b3 | 1531 | netdev_err(ks->netdev, "TX memory selftest fail\n"); |
3ba81f3e BD |
1532 | ret |= 1; |
1533 | } | |
1534 | ||
1535 | if (rd & MBIR_RXMBFA) { | |
0dc7d2b3 | 1536 | netdev_err(ks->netdev, "RX memory selftest fail\n"); |
3ba81f3e BD |
1537 | ret |= 2; |
1538 | } | |
1539 | ||
1540 | return 0; | |
1541 | } | |
1542 | ||
1543 | /* driver bus management functions */ | |
1544 | ||
1545 | static int __devinit ks8851_probe(struct spi_device *spi) | |
1546 | { | |
1547 | struct net_device *ndev; | |
1548 | struct ks8851_net *ks; | |
1549 | int ret; | |
1550 | ||
1551 | ndev = alloc_etherdev(sizeof(struct ks8851_net)); | |
1552 | if (!ndev) { | |
1553 | dev_err(&spi->dev, "failed to alloc ethernet device\n"); | |
1554 | return -ENOMEM; | |
1555 | } | |
1556 | ||
1557 | spi->bits_per_word = 8; | |
1558 | ||
1559 | ks = netdev_priv(ndev); | |
1560 | ||
1561 | ks->netdev = ndev; | |
1562 | ks->spidev = spi; | |
1563 | ks->tx_space = 6144; | |
1564 | ||
1565 | mutex_init(&ks->lock); | |
1566 | spin_lock_init(&ks->statelock); | |
1567 | ||
1568 | INIT_WORK(&ks->tx_work, ks8851_tx_work); | |
1569 | INIT_WORK(&ks->irq_work, ks8851_irq_work); | |
1570 | INIT_WORK(&ks->rxctrl_work, ks8851_rxctrl_work); | |
1571 | ||
1572 | /* initialise pre-made spi transfer messages */ | |
1573 | ||
1574 | spi_message_init(&ks->spi_msg1); | |
1575 | spi_message_add_tail(&ks->spi_xfer1, &ks->spi_msg1); | |
1576 | ||
1577 | spi_message_init(&ks->spi_msg2); | |
1578 | spi_message_add_tail(&ks->spi_xfer2[0], &ks->spi_msg2); | |
1579 | spi_message_add_tail(&ks->spi_xfer2[1], &ks->spi_msg2); | |
1580 | ||
1581 | /* setup mii state */ | |
1582 | ks->mii.dev = ndev; | |
1583 | ks->mii.phy_id = 1, | |
1584 | ks->mii.phy_id_mask = 1; | |
1585 | ks->mii.reg_num_mask = 0xf; | |
1586 | ks->mii.mdio_read = ks8851_phy_read; | |
1587 | ks->mii.mdio_write = ks8851_phy_write; | |
1588 | ||
1589 | dev_info(&spi->dev, "message enable is %d\n", msg_enable); | |
1590 | ||
1591 | /* set the default message enable */ | |
1592 | ks->msg_enable = netif_msg_init(msg_enable, (NETIF_MSG_DRV | | |
1593 | NETIF_MSG_PROBE | | |
1594 | NETIF_MSG_LINK)); | |
1595 | ||
1596 | skb_queue_head_init(&ks->txq); | |
1597 | ||
1598 | SET_ETHTOOL_OPS(ndev, &ks8851_ethtool_ops); | |
1599 | SET_NETDEV_DEV(ndev, &spi->dev); | |
1600 | ||
1601 | dev_set_drvdata(&spi->dev, ks); | |
1602 | ||
1603 | ndev->if_port = IF_PORT_100BASET; | |
1604 | ndev->netdev_ops = &ks8851_netdev_ops; | |
1605 | ndev->irq = spi->irq; | |
1606 | ||
57dada68 BD |
1607 | /* issue a global soft reset to reset the device. */ |
1608 | ks8851_soft_reset(ks, GRR_GSR); | |
1609 | ||
3ba81f3e BD |
1610 | /* simple check for a valid chip being connected to the bus */ |
1611 | ||
1612 | if ((ks8851_rdreg16(ks, KS_CIDER) & ~CIDER_REV_MASK) != CIDER_ID) { | |
1613 | dev_err(&spi->dev, "failed to read device ID\n"); | |
1614 | ret = -ENODEV; | |
1615 | goto err_id; | |
1616 | } | |
1617 | ||
7d997466 SJ |
1618 | /* cache the contents of the CCR register for EEPROM, etc. */ |
1619 | ks->rc_ccr = ks8851_rdreg16(ks, KS_CCR); | |
1620 | ||
1621 | if (ks->rc_ccr & CCR_EEPROM) | |
1622 | ks->eeprom_size = 128; | |
1623 | else | |
1624 | ks->eeprom_size = 0; | |
1625 | ||
3ba81f3e BD |
1626 | ks8851_read_selftest(ks); |
1627 | ks8851_init_mac(ks); | |
1628 | ||
1629 | ret = request_irq(spi->irq, ks8851_irq, IRQF_TRIGGER_LOW, | |
1630 | ndev->name, ks); | |
1631 | if (ret < 0) { | |
1632 | dev_err(&spi->dev, "failed to get irq\n"); | |
1633 | goto err_irq; | |
1634 | } | |
1635 | ||
1636 | ret = register_netdev(ndev); | |
1637 | if (ret) { | |
1638 | dev_err(&spi->dev, "failed to register network device\n"); | |
1639 | goto err_netdev; | |
1640 | } | |
1641 | ||
0dc7d2b3 JP |
1642 | netdev_info(ndev, "revision %d, MAC %pM, IRQ %d\n", |
1643 | CIDER_REV_GET(ks8851_rdreg16(ks, KS_CIDER)), | |
1644 | ndev->dev_addr, ndev->irq); | |
3ba81f3e BD |
1645 | |
1646 | return 0; | |
1647 | ||
1648 | ||
1649 | err_netdev: | |
1650 | free_irq(ndev->irq, ndev); | |
1651 | ||
1652 | err_id: | |
1653 | err_irq: | |
1654 | free_netdev(ndev); | |
1655 | return ret; | |
1656 | } | |
1657 | ||
1658 | static int __devexit ks8851_remove(struct spi_device *spi) | |
1659 | { | |
1660 | struct ks8851_net *priv = dev_get_drvdata(&spi->dev); | |
1661 | ||
1662 | if (netif_msg_drv(priv)) | |
0dc7d2b3 | 1663 | dev_info(&spi->dev, "remove\n"); |
3ba81f3e BD |
1664 | |
1665 | unregister_netdev(priv->netdev); | |
1666 | free_irq(spi->irq, priv); | |
1667 | free_netdev(priv->netdev); | |
1668 | ||
1669 | return 0; | |
1670 | } | |
1671 | ||
1672 | static struct spi_driver ks8851_driver = { | |
1673 | .driver = { | |
1674 | .name = "ks8851", | |
1675 | .owner = THIS_MODULE, | |
1676 | }, | |
1677 | .probe = ks8851_probe, | |
1678 | .remove = __devexit_p(ks8851_remove), | |
1679 | }; | |
1680 | ||
1681 | static int __init ks8851_init(void) | |
1682 | { | |
1683 | return spi_register_driver(&ks8851_driver); | |
1684 | } | |
1685 | ||
1686 | static void __exit ks8851_exit(void) | |
1687 | { | |
1688 | spi_unregister_driver(&ks8851_driver); | |
1689 | } | |
1690 | ||
1691 | module_init(ks8851_init); | |
1692 | module_exit(ks8851_exit); | |
1693 | ||
1694 | MODULE_DESCRIPTION("KS8851 Network driver"); | |
1695 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); | |
1696 | MODULE_LICENSE("GPL"); | |
1697 | ||
1698 | module_param_named(message, msg_enable, int, 0); | |
1699 | MODULE_PARM_DESC(message, "Message verbosity level (0=none, 31=all)"); | |
e0626e38 | 1700 | MODULE_ALIAS("spi:ks8851"); |